YASKAWA VIPA System 300S+ User Manual

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CPU | 317-4PN23 | Manual

HB140 | CPU | 317-4PN23 | en | 18-01

VIPA System 300S

SPEED7 CPU 317PN

www.vipa.com/en/service-support/manuals

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VIPA GmbH

Ohmstr. 4

91074 Herzogenaurach

Telephone: 09132-744-0

Fax: 09132-744-1864

Email: info@vipa.com

Internet: www.vipa.com

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Table of contents

1 General.................................................................................................................... 6

1.2 About this manual............................................................................................. 7

1.3 Safety information............................................................................................. 8

2 Basics...................................................................................................................... 9

2.1 Safety information for users.............................................................................. 9

2.2 Operating structure of a CPU......................................................................... 10

2.2.1 General........................................................................................................ 10

2.2.2 Applications ................................................................................................ 10

2.2.3 Operands..................................................................................................... 10

2.3 CPU 317-4PN23............................................................................................. 12

2.4 General data................................................................................................... 14

3 Assembly and installation guidelines................................................................ 16

3.1 Overview......................................................................................................... 16

3.2 Installation dimensions................................................................................... 17

3.3 Assembly SPEED-Bus................................................................................... 18

3.4 Assembly standard bus.................................................................................. 21

3.5 Cabling........................................................................................................... 24

3.6 Installation guidelines..................................................................................... 25

4 Hardware description........................................................................................... 27

4.1 Properties....................................................................................................... 27

4.2 Structure......................................................................................................... 28

4.2.1 General........................................................................................................ 28

4.2.2 Interfaces..................................................................................................... 28

4.2.3 Memory management.................................................................................. 30

4.2.4 Slot for storage media................................................................................. 30

4.2.5 Battery backup for clock and RAM.............................................................. 30

4.2.6 Operating mode switch................................................................................ 31

4.2.7 LEDs............................................................................................................ 32

4.3 Technical data................................................................................................. 35

5 Deployment CPU 317-4PN23............................................................................... 43

5.1 Assembly........................................................................................................ 43

5.2 Start-up behavior............................................................................................ 43

5.3 Addressing...................................................................................................... 44

5.4 Hardware configuration - CPU........................................................................ 47

5.5 Hardware configuration - I/O modules............................................................ 48

5.6 Hardware configuration - Ethernet PG/OP channel........................................ 49

5.7 Hardware configuration - Communication...................................................... 50

5.8 Hardware configuration - SPEED-Bus............................................................ 50

5.8.1 Preconditions............................................................................................... 50

5.8.2 Proceeding.................................................................................................. 51

5.9 Setting standard CPU parameters.................................................................. 52

5.9.1 Parameterization via Siemens CPU............................................................ 52

5.9.2 Parameters CPU......................................................................................... 52

5.9.3 Parameters for DP....................................................................................... 55

5.9.4 Parameters for MPI/DP .............................................................................. 56

5.10 Setting VIPA specific CPU parameters......................................................... 56

VIPA System 300S

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5.10.1 Proceeding................................................................................................ 56

5.10.2 VIPA specific parameters.......................................................................... 57

5.11 Project transfer............................................................................................. 61

5.11.1 Transfer via MPI/PROFIBUS..................................................................... 61

5.11.2 Transfer via Ethernet................................................................................. 62

5.11.3 Transfer via memory card.......................................................................... 63

5.12 Accessing the web server............................................................................. 64

5.13 Operating modes.......................................................................................... 70

5.13.1 Overview.................................................................................................... 70

5.13.2 Function security....................................................................................... 72

5.14 Overall reset................................................................................................. 73

5.15 Firmware update........................................................................................... 74

5.16 Reset to factory settings............................................................................... 76

5.17 Deployment storage media - MMC, MCC..................................................... 77

5.18 Extended know-how protection.................................................................... 79

5.19 CMD - auto commands................................................................................. 80

5.20 Diagnostic entries......................................................................................... 81

5.21 Control and monitoring of variables with test functions................................ 82

6 Deployment PtP communication........................................................................ 84

6.1 Fast introduction............................................................................................. 85

6.2 Principle of the data transfer........................................................................... 86

6.3 Deployment of RS485 interface for PtP.......................................................... 86

6.4 Parametrization.............................................................................................. 89

6.4.1 FC/SFC 216 - SER_CFG - Parametrization PtP......................................... 89

6.5 Communication............................................................................................... 89

6.5.1 FC/SFC 217 - SER_SND - Send to PtP...................................................... 89

6.5.2 FC/SFC 218 - SER_RCV - Receive from PtP............................................. 90

6.6 Protocols and procedures .............................................................................. 90

6.7 Modbus - Function codes .............................................................................. 94

6.8 Modbus - Example communication................................................................ 98

7 Deployment PROFIBUS communication.......................................................... 100

7.1 Overview....................................................................................................... 100

7.2 Fast introduction........................................................................................... 101

7.3 Hardware configuration - CPU...................................................................... 102

7.4 Deployment as PROFIBUS DP master........................................................ 103

7.5 Deployment as PROFIBUS DP slave........................................................... 104

7.6 PROFIBUS installation guidelines................................................................ 106

7.7 Commissioning and Start-up behavior......................................................... 109

8 Deployment Ethernet communication - productive........................................ 110

8.1 Basics - Industrial Ethernet in automation.................................................... 110

8.2 Basics - ISO/OSI reference model................................................................ 111

8.3 Basics - Terms.............................................................................................. 113

8.4 Basics - Protocols......................................................................................... 114

8.5 Basics - IP address and subnet.................................................................... 115

8.6 Fast introduction........................................................................................... 117

8.7 Commissioning and initialization................................................................... 117

8.8 Hardware configuration - CPU via Ethernet.................................................. 118

8.9 Configure Siemens S7 connections............................................................. 120

8.10 Configure Open Communication................................................................ 126

VIPA System 300S

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8.11 NCM diagnostic - Help for error diagnostic................................................. 127

9 Deployment Ethernet communication - PROFINET........................................ 130

9.1 Basics PROFINET........................................................................................ 130

9.2 PROFINET installation guidelines................................................................ 132

9.3 PROFINET system limits.............................................................................. 133

9.4 Fast introduction PROFINET........................................................................ 135

9.5 Commissioning and Initialization.................................................................. 136

9.6 Hardware configuration - CPU...................................................................... 137

9.7 Parameters - PROFINET IO controller......................................................... 138

9.7.1 Precondition............................................................................................... 138

9.7.2 PN-IO......................................................................................................... 138

9.7.3 Port 1......................................................................................................... 139

9.8 Configuration PROFINET IO device............................................................. 140

9.9 Configuration PROFINET-I-Device / Shared-Device.................................... 141

9.10 Topology - Configuration............................................................................. 142

9.11 Device replacement without exchangeable medium/PG............................ 142

9.11.1 Replace device........................................................................................ 144

9.12 Commissioning and start-up behaviour...................................................... 145

9.13 PROFINET diagnostics.............................................................................. 146

9.13.1 Overview.................................................................................................. 146

9.13.2 Diagnostics with the configuration and engineering tool......................... 146

9.13.3 Diagnostics during runtime in the user program...................................... 146

9.13.4 Diagnostics via OB start information....................................................... 148

9.13.5 Diagnostics via status LEDs.................................................................... 149

10 Configuration with TIA Portal............................................................................ 150

10.1 TIA Portal - Work environment .................................................................. 150

10.1.1 General.................................................................................................... 150

10.1.2 Work environment of the TIA Portal........................................................ 150

10.2 TIA Portal - Hardware configuration - CPU ............................................... 152

10.3 TIA Portal - Hardware configuration - I/O modules..................................... 153

10.4 TIA Portal - Hardware configuration - Ethernet PG/OP channel................ 154

10.5 TIA Portal - Hardware configuration - PG/OP via PROFINET.................... 156

10.6 TIA Portal - Setting VIPA specific CPU parameters................................... 158

10.7 TIA Portal - VIPA-Include library................................................................. 162

10.8 TIA Portal - Project transfer........................................................................ 163

Appendix............................................................................................................. 165

A System specific event IDs............................................................................... 167

B Integrated blocks............................................................................................. 215

C SSL partial list................................................................................................. 219

VIPA System 300S

Table of contents

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1 General

This document contains proprietary information of VIPA and is not to be disclosed or used except in accordance with applicable agreements.

This material is protected by the copyright laws. It may not be reproduced, distributed, or altered in any fashion by any entity (either internal or external to VIPA), except in accordance with applicable agreements, contracts or licensing, without the express written consent of VIPA and the business management owner of the material.

For permission to reproduce or distribute, please contact: VIPA, Gesellschaft für Visualisierung und Prozessautomatisierung mbH Ohmstraße 4, D-91074 Herzogenaurach, Germany

Tel.: +49 9132 744 -0

Fax.: +49 9132 744-1864

EMail: info@vipa.de

http://www.vipa.com

Every effort has been made to ensure that the information contained in this document was complete and accurate at the time of publishing. Nevertheless, the authors retain the right to modify the information.

This customer document describes all the hardware units and functions known at the present time. Descriptions may be included for units which are not present at the customer site. The exact scope of delivery is described in the respective purchase contract.

Hereby, VIPA GmbH declares that the products and systems are in compliance with the essential requirements and other relevant provisions. Conformity is indicated by the CE marking affixed to the product.

For more information regarding CE marking and Declaration of Conformity (DoC), please contact your local VIPA customer service organization.

VIPA, SLIO, System 100V, System 200V, System 300V, System 300S, System 400V, System 500S and Commander Compact are registered trademarks of VIPA Gesellschaft für Visualisierung und Prozessautomatisierung mbH.

SPEED7 is a registered trademark of profichip GmbH.

SIMATIC, STEP, SINEC, TIA Portal, S7-300 and S7-400 are registered trademarks of Siemens AG.

Microsoft and Windows are registered trademarks of Microsoft Inc., USA.

Portable Document Format (PDF) and Postscript are registered trademarks of Adobe Systems, Inc.

All other trademarks, logos and service or product marks specified herein are owned by their respective companies.

Contact your local VIPA Customer Service Organization representative if you wish to report errors or questions regarding the contents of this document. If you are unable to locate a customer service centre, contact VIPA as follows:

CE Conformity Declaration

Conformity Information

Trademarks

Information product support

VIPA System 300S

General

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VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany

Telefax: +49 9132 744-1204

EMail: documentation@vipa.de

Contact your local VIPA Customer Service Organization representative if you encounter problems with the product or have questions regarding the product. If you are unable to locate a customer service centre, contact VIPA as follows:

VIPA GmbH, Ohmstraße 4, 91074 Herzogenaurach, Germany

Tel.: +49 9132 744-1150 (Hotline)

EMail: support@vipa.de

1.2 About this manual

This manual describes the SPEED7 CPU 317-4PN23 of the System 300S from VIPA. It contains a description of the construction, project implementation and usage.

Product Order no. as of state:

CPU-HW CPU-FW DPM-FW PN-IO controller-FW

CPU 317PN 317-4PN23 01 V3.7.3 V3.3.5 V1.1.20

The manual is targeted at users who have a background in automation technology.

The manual consists of chapters. Every chapter provides a self-contained description of a specific topic.

The following guides are available in the manual:

n An overall table of contents at the beginning of the manual n References with page numbers

The manual is available in:

n printed form, on paper n in electronic form as PDF-file (Adobe Acrobat Reader)

Important passages in the text are highlighted by following icons and headings:

DANGER!

Immediate or likely danger. Personal injury is possible.

CAUTION!

Damages to property is likely if these warnings are not heeded.

Technical support

Objective and contents

Target audience

Structure of the manual

Guide to the document

Availability

Icons Headings

VIPA System 300S

General

About this manual

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Supplementary information and useful tips.

1.3 Safety information

The system is constructed and produced for:

n communication and process control n general control and automation tasks n industrial applications n operation within the environmental conditions specified in the technical data n installation into a cubicle

DANGER!

This device is not certified for applications in

– in explosive environments (EX-zone)

The manual must be available to all personnel in the

n project design department n installation department n commissioning n operation

CAUTION! The following conditions must be met before using or commis-

sioning the components described in this manual:

– Hardware modifications to the process control system should only be

carried out when the system has been disconnected from power!

– Installation and hardware modifications only by properly trained per-

sonnel.

– The national rules and regulations of the respective country must be

satisfied (installation, safety, EMC ...)

National rules and regulations apply to the disposal of the unit!

Applications conforming with specifications

Documentation

Disposal

VIPA System 300S

General

Safety information

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2 Basics

2.1 Safety information for users

VIPA modules make use of highly integrated components in MOS-Technology. These components are extremely sensitive to over-voltages that can occur during electrostatic discharges. The following symbol is attached to modules that can be destroyed by electrostatic discharges.

The Symbol is located on the module, the module rack or on packing material and it indicates the presence of electrostatic sensitive equipment. It is possible that electrostatic sensitive equipment is destroyed by energies and voltages that are far less than the human threshold of perception. These voltages can occur where persons do not discharge themselves before handling electrostatic sensitive modules and they can damage components thereby, causing the module to become inoperable or unusable. Modules that have been damaged by electrostatic discharges can fail after a temperature change, mechanical shock or changes in the electrical load. Only the consequent implementation of protection devices and meticulous attention to the applicable rules and regulations for handling the respective equipment can prevent failures of electrostatic sensitive modules.

Modules must be shipped in the original packing material.

When you are conducting measurements on electrostatic sensitive modules you should take the following precautions:

n Floating instruments must be discharged before use. n Instruments must be grounded.

Modifying electrostatic sensitive modules you should only use soldering irons with grounded tips.

CAUTION!

Personnel and instruments should be grounded when working on electrostatic sensitive modules.

Handling of electrostatic sensitive modules

Shipping of modules

Measurements and alterations on electrostatic sensitive modules

VIPA System 300S

Basics

Safety information for users

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2.2 Operating structure of a CPU

2.2.1 General

The CPU contains a standard processor with internal program memory. In combination with the integrated SPEED7 technology the unit provides a powerful solution for process automation applications within the System 300S family. A CPU supports the following modes of operation:

n cyclic operation n timer processing n alarm controlled operation n priority based processing

Cyclicprocessing represents the major portion of all the processes that are executed in the CPU. Identical sequences of operations are repeated in a never-ending cycle.

Where a process requires control signals at constant intervals you can initiate certain operations based upon a timer, e.g. not critical monitoring functions at one-second intervals.

If a process signal requires a quick response you would allocate this signal to an alarm controlled procedure. An alarm can activate a procedure in your program.

The above processes are handled by the CPU in accordance with their priority. Since a timer or an alarm event requires a quick reaction, the CPU will interrupt the cyclic processing when these high-priority events occur to react to the event. Cyclic processing will resume, once the reaction has been processed. This means that cyclic processing has the lowest priority.

2.2.2 Applications

The program that is present in every CPU is divided as follows:

n System routine n User application

The system routine organizes all those functions and procedures of the CPU that are not related to a specific control application.

This consists of all the functions that are required for the processing of a specific control application. The operating modules provide the interfaces to the system routines.

2.2.3 Operands

The following series of operands is available for programming the CPU:

n Process image and periphery n Bit memory n Timers and counters n Data blocks

Cyclic processing

Timer processing

Alarm controlled processing

Priority based processing

System routine

User application

VIPA System 300S

Basics

Operating structure of a CPU > Operands

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The user application can quickly access the process image of the inputs and outputs PIO/ PII. You may manipulate the following types of data:

n individual Bits n Bytes n Words n Double words

You may also gain direct access to peripheral modules via the bus from user application. The following types of data are available:

n Bytes n Words n Blocks

The bit memory is an area of memory that is accessible by means of certain operations. Bit memory is intended to store frequently used working data.

You may access the following types of data:

n individual Bits n Bytes n Words n Double words

In your program you may load cells of the timer with a value between 10ms and 9990s. As soon as the user application executes a start-operation, the value of this timer is decremented by the interval that you have specified until it reaches zero.

You may load counter cells with an initial value (max. 999) and increment or decrement these when required.

A data block contains constants or variables in the form of bytes, words or double words. You may always access the current data block by means of operands.

You may access the following types of data:

n individual Bits n Bytes n Words n Double words

Process image and periphery

Bit Memory

Timers and counters

Data Blocks

VIPA System 300S

Basics

Operating structure of a CPU > Operands

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2.3 CPU 317-4PN23

The CPU 317-4PN23 bases upon the SPEED7 technology. This supports the CPU at programming and communication by means of co-processors that causes a power improvement for highest needs.

n The CPU is programmed in STEPÒ7 from Siemens. For this you may use the

SIMATIC Manager or TIA Portal from Siemens. Here the instruction set of the S7-400 from Siemens is used.

n Modules and CPUs of the System 300S from VIPA and Siemens may be used at the

bus as a mixed configuration.

n The user application is stored in the battery buffered RAM or on an additionally plug-

gable storage module.

n The CPU is configured as CPU 317-2 PN/DP (6ES7 317-2EK14-0AB0 V3.2) from

Siemens.

Please always use the CPU 317-2 PN/DP (6ES7 317-2EK14-0AB0 V3.2) from Siemens of the hardware catalog to configure this CPU from VIPA. For the project engineering, a thorough knowledge of the Siemens SIMATIC Manager and the hardware configurator from Siemens is required!

Overview

Access

VIPA System 300S

Basics

CPU 317-4PN23

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The CPU has an integrated memory. Information about the capacity of the memory may be found at the front of the CPU. The memory is divided into the following parts:

n Load memory 8Mbyte n Code memory (50% of the work memory) n Data memory (50% of the work memory) n Work memory 4Mbyte

– There is the possibility to extend the work memory to its maximum printed

capacity 8Mbyte by means of a memory extension card.

n The SPEED-Bus is a 32bit parallel bus developed from VIPA. n Via the SPEED-Bus you may connect up to 10 SPEED-Bus modules to your CPU. n In opposite to the "standard" backplane bus where the modules are plugged-in at the

right side of the CPU by means of single bus connectors, the modules at the SPEEDBus are plugged-in at the left side of the CPU via a special SPEED-Bus rail.

n VIPA delivers profile rails with integrated SPEED-Bus for 2, 6, or 10 SPEED-Bus

peripheral modules with different lengths.

n Each SPEED-Bus rail has a slot for an external power supply. This allows you to raise

the maximum current at the back plane bus. Only the "SLOT1 DCDC" allows you to plug-in either a SPEED-Bus module or an additional power supply (307-1FB70).

The CPU has a PROFIBUS/PtP interface with a fix pinout. After an overall reset the interface is deactivated. By appropriate configuration, the following functions for this interface may be enabled:

n PROFIBUS DP master operation: Configuration via PROFIBUS sub module with

‘Operation mode’ master in the hardware configuration.

n PROFIBUS DP slave operation: Configuration via PROFIBUS sub module with

‘Operation mode’ slave in the hardware configuration.

n PtP functionality: Configuration as virtual PROFIBUS master system by including the

VIPA SPEEDBUS.GSD.

The CPU has an integrated PROFINET IO controller which is to be configured via the PROFINET sub module in the hardware configurator from Siemens.

The CPU has an Ethernet interface for PG/OP communication. After assigning IP address parameters with your configuration tool, via the "PLC" functions you may directly access the Ethernet PG/OP channel and program res. remote control your CPU. You may also access the CPU with a visualization software via these connections.

n Wiring by means of spring pressure connections (CageClamps) at the front connector n Core cross-section 0.08...2.5mm

n Total isolation of the wiring at module change n Potential separation of all modules to the backplane bus

Dimensions of the basic enclosure:

n 2tier width: (WxHxD) in mm: 80x125x120

The CPU comes with an integrated power supply. The power supply is to be supplied with DC 24V. By means of the supply voltage, the internal electronic is supplied as well as the connected modules via backplane bus. The power supply is protected against inverse polarity and overcurrent.

Memory

SPEED-Bus

Integrated PROFIBUS DP master/slave respectively PtP functionality

Integrated PROFINET IO controller

Integrated Ethernet PG/OP channel

Operation Security

Dimensions/ Weight

Integrated power supply

VIPA System 300S

Basics

CPU 317-4PN23

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2.4 General data

Conformity and approval

Conformity

CE 2014/35/EU Low-voltage directive

2014/30/EU EMC directive

Approval

UL Refer to Technical data

others

RoHS 2011/65/EU Restriction of the use of certain hazardous substances in

electrical and electronic equipment

Protection of persons and device protection

Type of protection - IP20

Electrical isolation

to the field bus - electrically isolated

to the process level - electrically isolated

Insulation resistance -

Insulation voltage to reference earth

Inputs / outputs - AC / DC 50V, test voltage AC 500V

Protective measures - against short circuit

Environmental conditions to EN 61131-2

Climatic

Storage / transport EN 60068-2-14 -25…+70°C

Operation

Horizontal installation hanging EN 61131-2 0…+60°C

Horizontal installation lying EN 61131-2 0…+55°C

Vertical installation EN 61131-2 0…+50°C

Air humidity EN 60068-2-30 RH1 (without condensation, rel. humidity 10…95%)

Pollution EN 61131-2 Degree of pollution 2

Installation altitude max. - 2000m

Mechanical

Oscillation EN 60068-2-6 1g, 9Hz ... 150Hz

Shock EN 60068-2-27 15g, 11ms

VIPA System 300S

Basics

General data

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Mounting conditions

Mounting place - In the control cabinet

Mounting position - Horizontal and vertical

EMC Standard Comment

Emitted interference EN 61000-6-4 Class A (Industrial area)

Noise immunity

zone B

EN 61000-6-2 Industrial area

EN 61000-4-2

ESD

8kV at air discharge (degree of severity 3),

4kV at contact discharge (degree of severity 2)

EN 61000-4-3 HF field immunity (casing)

80MHz … 1000MHz, 10V/m, 80% AM (1kHz)

1.4GHz ... 2.0GHz, 3V/m, 80% AM (1kHz)

2GHz ... 2.7GHz, 1V/m, 80% AM (1kHz)

EN 61000-4-6 HF conducted

150kHz … 80MHz, 10V, 80% AM (1kHz)

EN 61000-4-4 Burst, degree of severity 3

EN 61000-4-5 Surge, degree of severity 3 *

Due to the high-energetic single pulses with Surge an appropriate external protective circuit with lightning protection

elements like conductors for lightning and overvoltage is necessary.

VIPA System 300S

Basics

General data

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3 Assembly and installation guidelines

3.1 Overview

This CPU is provided with a parallel SPEED-Bus that enables the additional connection of up to 10 modules from the SPEED-Bus periphery. While the standard peripheral modules are plugged-in at the right side of the CPU, the SPEED-Bus peripheral modules are connected via a SPEED-Bus bus connector at the left side of the CPU.

VIPA delivers profile rails with integrated SPEED-Bus for 2, 6 or 10 SPEED-Bus peripheral modules with different lengths.

The single modules are directly installed on a profile rail and connected via the backplane bus coupler. Before installing the modules you have to clip the backplane bus coupler to the module from the backside. The backplane bus couplers are included in the delivery of the peripheral modules.

With SPEED-Bus the bus connection happens via a SPEED-Bus rail integrated in the profile rail at the left side of the CPU. Due to the parallel SPEED-Bus not all slots must be occupied in sequence.

At slot (SLOT 1 DCDC) you may plug either a SPEED-Bus module or an additional power supply.

You may assemble the System 300 horizontally, vertically or lying. Please regard the allowed environment temperatures:

1 horizontal assembly: from 0 to 60°C 2 vertical assembly: from 0 to 50°C 3 lying assembly: from 0 to 55°C

General

Serial Standard bus

Parallel SPEED-Bus

SLOT 1 for additional power supply

Assembly possibilities

VIPA System 300S

Assembly and installation guidelines

Overview

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3.2 Installation dimensions

2tier width (WxHxD) in mm: 80 x 125 x 120Dimensions Basic enclo-

sure

Installation dimensions

VIPA System 300S

Assembly and installation guidelines

Installation dimensions

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3.3 Assembly SPEED-Bus

For the deployment of SPEED-Bus modules, a pre-manufactured SPEED-Bus rail is required. This is available mounted on a profile rail with 2, 6 or 10 extension slots.

Order

number

Number of modules SPEED-

Bus/Standard bus

A B C D E

391-1AF10 2/6 530 100 268 510 10

391-1AF30 6/2 530 100 105 510 10

391-1AF50 10/0 530 20 20 510 10

391-1AJ10 2/15 830 22 645 800 15

391-1AJ30 6/11 830 22 480 800 15

391-1AJ50 10/7 830 22 320 800 15

Measures in mm

Pre-manufactured SPEEDBus profile rail

Dimensions

VIPA System 300S

Assembly and installation guidelines

Assembly SPEED-Bus

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1. Bolt the profile rail with the background (screw size: M6), so that you still have minimum 65mm space above and 40mm below the profile rail. Please look for a lowimpedance connection between profile rail and background.

2. Connect the profile rail with the protected earth conductor. The minimum cross-section of the cable to the protected earth conductor has to be 10mm2.

1. Dismantle the according protection flaps of the SPEED-Bus slot with a screw driver (open and pull down).

For the SPEED-Bus is a parallel bus, not every SPEED-Bus slot must be used in series. Leave the protection flap installed at an unused SPEED-Bus slot.

2. At deployment of a DC 24V power supply, install it at the shown position at the profile rail at the left side of the SPEED-Bus and push it to the left to the isolation bolt of the profile rail.

3. Fix the power supply by screwing.

Installation of the profile rail

Installation SPEED-Bus module

VIPA System 300S

Assembly and installation guidelines

Assembly SPEED-Bus

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4. To connect the SPEED-Bus modules, plug it between the triangular positioning helps to a slot marked with "SLOT ..." and pull it down.

5. Only the "SLOT1 DCDC" allows you to plug-in either a SPEED-Bus module or an additional power supply.

6. Fix the CPU by screwing.

1. To deploy the SPEED7-CPU exclusively at the SPEED-Bus, plug it between the tri-

angular positioning helps to the slot marked with "CPU SPEED7" and pull it down.

2. Fix the CPU by screwing.

1. If also standard modules shall be plugged, take a bus coupler and click it at the

CPU from behind like shown in the picture. Plug the CPU between the triangular positioning helps to the slot marked with "CPU SPEED7" and pull it down.

2. Fix the CPU by screwing.

Repeat this procedure with the peripheral modules, by clicking a backplane bus coupler, stick the module right from the modules you've already fixed, click it downwards and connect it with the backplane bus coupler of the last module and bolt it.

Installation CPU without Standard-Bus-Modules

Installation CPU with Standard-Bus-Modules

Installation Standard-BusModules

VIPA System 300S

Assembly and installation guidelines

Assembly SPEED-Bus

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CAUTION!

– The power supplies must be released before installation and repair

tasks, i.e. before handling with the power supply or with the cabling you must disconnect current/voltage (pull plug, at fixed connection switch off the concerning fuse)!

– Installation and modifications only by properly trained personnel!

3.4 Assembly standard bus

The single modules are directly installed on a profile rail and connected via the backplane bus connector. Before installing the modules you have to clip the backplane bus connector to the module from the backside. The backplane bus connector is delivered together with the peripheral modules.

Order number A B C

390-1AB60 160 140 10

390-1AE80 482 466 8.3

390-1AF30 530 500 15

390-1AJ30 830 800 15

390-9BC00* 2000 Drillings only left 15

*) Unit pack: 10 pieces

Measures in mm

General

Profile rail

VIPA System 300S

Assembly and installation guidelines

Assembly standard bus

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For the communication between the modules the System 300S uses a backplane bus connector. Backplane bus connectors are included in the delivering of the peripheral modules and are clipped at the module from the backside before installing it to the profile rail.

Bus connector

VIPA System 300S

Assembly and installation guidelines

Assembly standard bus

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Please regard the allowed environment temperatures:

1 horizontal assembly: from 0 to 60°C 2 vertical assembly: from 0 to 50°C 3 lying assembly: from 0 to 55°C

1. Bolt the profile rail with the background (screw size: M6), so that you still have minimum 65mm space above and 40mm below the profile rail.

2. If the background is a grounded metal or device plate, please look for a low-impedance connection between profile rail and background.

3. Connect the profile rail with the protected earth conductor. For this purpose there is a bolt with M6-thread.

4. The minimum cross-section of the cable to the protected earth conductor has to be 10mm2.

5. Stick the power supply to the profile rail and pull it to the left side to the grounding bolt of the profile rail.

6. Fix the power supply by screwing.

7. Take a backplane bus connector and click it at the CPU from the backside like

shown in the picture.

8. Stick the CPU to the profile rail right from the power supply and pull it to the power supply.

9. Click the CPU downwards and bolt it like shown.

10. Repeat this procedure with the peripheral modules, by clicking a backplane bus

connector, stick the module right from the modules you've already fixed, click it downwards and connect it with the backplane bus connector of the last module and bolt it.

Assembly possibilities

Approach

VIPA System 300S

Assembly and installation guidelines

Assembly standard bus

HB140 | CPU | 317-4PN23 | en | 18-01 23

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3.5 Cabling

CAUTION!

– The power supplies must be released before installation and repair

tasks, i.e. before handling with the power supply or with the cabling you must disconnect current/voltage (pull plug, at fixed connection switch off the concerning fuse)!

– Installation and modifications only by properly trained personnel!

For the cabling of power supply of a CPU, a green plug with CageClamp technology is deployed. The connection clamp is realized as plug that may be clipped off carefully if it is still cabled.

Here wires with a cross-section of 0.08mm2 to 2.5mm2 may be connected. You can use flexible wires without end case as well as stiff wires.

1 Test point for 2mm test tip 2 Locking (orange) for screwdriver 3 Round opening for wires

The picture on the left side shows the cabling step by step from top view.

1. For cabling you push the locking vertical to the inside with a suiting screwdriver and hold the screwdriver in this position.

2. Insert the de-isolated wire into the round opening. You may use wires with a crosssection from 0.08mm2 to 2.5mm

3. By removing the screwdriver the wire is connected safely with the plug connector via a spring.

CageClamp technology (green)

VIPA System 300S

Assembly and installation guidelines

Cabling

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3.6 Installation guidelines

The installation guidelines contain information about the interference free deployment of a PLC system. There is the description of the ways, interference may occur in your PLC, how you can make sure the electromagnetic compatibility (EMC), and how you manage the isolation.

Electromagnetic compatibility (EMC) means the ability of an electrical device, to function error free in an electromagnetic environment without being interfered respectively without interfering the environment.

The components of VIPA are developed for the deployment in industrial environments and meets high demands on the EMC. Nevertheless you should project an EMC planning before installing the components and take conceivable interference causes into account.

Electromagnetic interferences may interfere your control via different ways:

n Electromagnetic fields (RF coupling) n Magnetic fields with power frequency n Bus system n Power supply n Protected earth conductor

Depending on the spreading medium (lead bound or lead free) and the distance to the interference cause, interferences to your control occur by means of different coupling mechanisms.

There are:

n galvanic coupling n capacitive coupling n inductive coupling n radiant coupling

In the most times it is enough to take care of some elementary rules to guarantee the EMC. Please regard the following basic rules when installing your PLC.

n Take care of a correct area-wide grounding of the inactive metal parts when installing

your components. – Install a central connection between the ground and the protected earth conductor

system. – Connect all inactive metal extensive and impedance-low. – Please try not to use aluminium parts. Aluminium is easily oxidizing and is there-

fore less suitable for grounding.

n When cabling, take care of the correct line routing.

– Organize your cabling in line groups (high voltage, current supply, signal and data

lines). – Always lay your high voltage lines and signal respectively data lines in separate

channels or bundles. – Route the signal and data lines as near as possible beside ground areas (e.g.

suspension bars, metal rails, tin cabinet).

General

What does EMC mean?

Possible interference causes

Basic rules for EMC

VIPA System 300S

Assembly and installation guidelines

Installation guidelines

HB140 | CPU | 317-4PN23 | en | 18-01 25

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n Proof the correct fixing of the lead isolation.

– Data lines must be laid isolated. – Analog lines must be laid isolated. When transmitting signals with small ampli-

tudes the one sided laying of the isolation may be favourable. – Lay the line isolation extensively on an isolation/protected earth conductor rail

directly after the cabinet entry and fix the isolation with cable clamps. – Make sure that the isolation/protected earth conductor rail is connected impe-

dance-low with the cabinet. – Use metallic or metallised plug cases for isolated data lines.

n In special use cases you should appoint special EMC actions.

– Consider to wire all inductivities with erase links. – Please consider luminescent lamps can influence signal lines.

n Create a homogeneous reference potential and ground all electrical operating sup-

plies when possible. – Please take care for the targeted employment of the grounding actions. The

grounding of the PLC serves for protection and functionality activity. – Connect installation parts and cabinets with your PLC in star topology with the

isolation/protected earth conductor system. So you avoid ground loops. – If there are potential differences between installation parts and cabinets, lay suffi-

ciently dimensioned potential compensation lines.

Electrical, magnetically and electromagnetic interference fields are weakened by means of an isolation, one talks of absorption. Via the isolation rail, that is connected conductive with the rack, interference currents are shunt via cable isolation to the ground. Here you have to make sure, that the connection to the protected earth conductor is impedancelow, because otherwise the interference currents may appear as interference cause.

When isolating cables you have to regard the following:

n If possible, use only cables with isolation tangle. n The hiding power of the isolation should be higher than 80%. n Normally you should always lay the isolation of cables on both sides. Only by means

of the both-sided connection of the isolation you achieve high quality interference suppression in the higher frequency area. Only as exception you may also lay the isolation one-sided. Then you only achieve the absorption of the lower frequencies. A one-sided isolation connection may be convenient, if:

– the conduction of a potential compensating line is not possible. – analog signals (some mV respectively µA) are transferred. – foil isolations (static isolations) are used.

n With data lines always use metallic or metallised plugs for serial couplings. Fix the

isolation of the data line at the plug rack. Do not lay the isolation on the PIN 1 of the plug bar!

n At stationary operation it is convenient to strip the insulated cable interruption free

and lay it on the isolation/protected earth conductor line.

n To fix the isolation tangles use cable clamps out of metal. The clamps must clasp the

isolation extensively and have well contact.

n Lay the isolation on an isolation rail directly after the entry of the cable in the cabinet.

Lead the isolation further on to your PLC and don't lay it on there again!

CAUTION! Please regard at installation!

At potential differences between the grounding points, there may be a compensation current via the isolation connected at both sides.

Remedy: Potential compensation line

Isolation of conductors

VIPA System 300S

Assembly and installation guidelines

Installation guidelines

HB140 | CPU | 317-4PN23 | en | 18-01 26

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4 Hardware description

4.1 Properties

n SPEED7 technology and SPEED-Bus integrated n 4Mbyte work memory integrated (2Mbyte code, 2Mbyte data) n Work memory expandable to max. 8Mbyte (4Mbyte code, 4Mbyte data) n 8Mbyte load memory n X3: PROFIBUS DP/PtP interface: PROFIBUS DP master (DP-V0, DP-V1) n X8: PROFINET IO controller: PROFINET in accordance with conformance class A

with integrated Ethernet CP

n X5: Ethernet PG/OP channel n X2: MPI interface n Slot for external memory cards (lockable) n Status LEDs for operating state and diagnostics n Real-time clock battery buffered n I/O address range digital/analog 8191byte n 2048 timer n 2048 counter n 16384 flag byte

Type Order number Description

CPU 317PN 317-4PN23 SPEED-Bus, MPI interface, card slot, real time clock, Ethernet

interface for PG/OP, PROFIBUS DP master, PROFINET IO controller

CPU 317-4PN23

Ordering data

VIPA System 300S

Hardware description

Properties

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4.2 Structure

4.2.1 General

1 LED status indication PROFIBUS DP master 2 Storage media slot (lockable) 3 LED status indication CPU part 4 LED status indication PROFINET IO controller 5 Operating mode switch CPU 6 X5: Ethernet PG/OP channel 7 X2: MPI interface 8 X3: PROFIBUS DP/PtP interface 9 X8: PROFINET IO controller 10 X1: Slot for DC 24V power supply

The components 6 - 10 are under the front flap!

4.2.2 Interfaces

The CPU has an integrated power supply:

n The power supply has to be provided with DC 24V. For this serves the double DC 24V

slot, that is underneath the flap.

n Via the power supply not only the internal electronic is provided with voltage, but by

means of the backplane bus also the connected modules.

n The power supply is protected against polarity inversion and overcurrent. n The internal electronic is galvanically connected with the supply voltage.

CPU 317-4PN23

X1: Power supply

VIPA System 300S

Hardware description

Structure > Interfaces

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9pin SubD jack:

n The MPI interface serves for the connection between programming unit and CPU. n By means of this the project engineering and programming happens. n MPI serves for communication between several CPUs or between HMIs and CPU. n Standard setting is MPI Address 2.

8pin RJ45 jack:

n The RJ45 jack serves the interface to the Ethernet PG/OP channel. n This interface allows you to program res. remote control your CPU, to access the

internal web site or to connect a visualization.

n Configurable connections are not possible. n For online access to the CPU via Ethernet PG/OP channel valid IP address parame-

ters have to be assigned to this.

9pin SubD jack:

The CPU has a PROFIBUS/PtP interface with a fix pinout. After an overall reset the interface is deactivated. By appropriate configuration, the following functions for this interface may be enabled:

n PROFIBUS DP master operation

– Configuration via PROFIBUS sub module X1 (MPI/DP) with ‘Operation mode’

master in the hardware configuration.

n PROFIBUS DP slave operation

– Configuration via PROFIBUS sub module X1 (MPI/DP) with ‘Operation mode’

slave in the hardware configuration.

n PtP functionality

– Using the PtP functionality the RS485 interface is allowed to connect via serial

point-to-point connection to different source res. target systems. – Here the following protocols are supported: ASCII, STX/ETX, 3964R, USS and

Modbus-Master (ASCII, RTU). – The activation of the PtP functionality happens by embedding the

SPEEDBUS.GSD from VIPA in the hardware catalog. After the installation the

CPU may be configured in a PROFIBUS master system and here the interface

may be switched to PtP communication.

8pin RJ45 jack:

n PROFINET IO controller to connect PROFINET IO devices n Ethernet PG/OP channel n Ethernet Siemens S7 connection n Ethernet open communication

X2: MPI interface

X5: Ethernet PG/OP channel

X3: PROFIBUS/PtP interface with configurable functionality

X8: PROFINET IO controller

VIPA System 300S

Hardware description

Structure > Interfaces

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4.2.3 Memory management

The CPU has an integrated memory. Information about the capacity of the memory may be found at the front of the CPU. The memory is divided into the following parts:

n Load memory 8Mbyte n Code memory (50% of the work memory) n Data memory (50% of the work memory) n Work memory 4Mbyte

– There is the possibility to extend the work memory to its maximum printed

capacity 8Mbyte by means of a memory extension card.

4.2.4 Slot for storage media

At this slot the following storage media can be plugged:

n SD respectively MCC (Multimedia card)

– External memory card for programs and firmware.

n MCC - Memory configuration card

– External memory card (MMC) for programs and firmware with the possibility to

unlock additional work memory. – The additional memory can be purchased separately.

Chapter 5.17 ‘Deploy-

ment storage media - MMC, MCC’ on page 77

– To activate the corresponding card is to be installed and an Overall reset is to be

established.

Chapter 5.14 ‘Overall reset’ on page 73

4.2.5 Battery backup for clock and RAM

A rechargeable battery is installed on every CPU to safeguard the contents of the RAM when power is removed. This battery is also used to buffer the internal clock. The rechargeable battery is maintained by a charging circuit that receives its power from the internal power supply and that maintain the clock and RAM for a max. period of 30 days.

– Please connect the CPU at least for 24 hours to the power supply, so

that the internal accumulator/battery is loaded accordingly.

– Please note that in case of repeated discharge cycles (charging/

buffering) can reduce the buffer time continuously. Only after a charging time of 24 hours there is a buffer for max. 30 days.

CAUTION!

– After a power reset and with an empty battery the CPU starts with a

BAT error and executes an overall reset. The loading procedure is not influenced by the BAT error.

– The BAT error can be deleted again, if once during power cycle the

time between switching on and off the power supply is at least 30sec. and the battery is fully loaded. Otherwise with a short power cycle the BAT error still exists and an overall reset is executed.

Memory

VIPA System 300S

Hardware description

Structure > Battery backup for clock and RAM

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4.2.6 Operating mode switch

n With the operating mode switch you may switch the CPU between STOP and RUN. n During the transition from STOP to RUN the operating mode START-UP is driven by

the CPU.

n Placing the switch to MR (Memory Reset), you request an overall reset with following

load from memory card, if a project there exists.

VIPA System 300S

Hardware description

Structure > Operating mode switch

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4.2.7 LEDs

(RUN)

green

(STOP)

yellow

(SFAIL)

red

(FRCE)

yellow

(MMC)

yellow

Meaning

Boot-up after PowerON - as soon as the CPU is supplied with 5V, the green PW-LED (Power) is on.

10Hz

Firmware is loaded.

Initialization: Phase 1

Initialization: Phase 2

Initialization: Phase 3

Initialization: Phase 4

Operation

X X X CPU is in STOP state.

2Hz

X X X CPU is in start-up state. As long as the OB 100 is processed, the

RUN LED blinks for at least 3s.

X X CPU is in state RUN without error.

X X X X There is a system fault. More information can be found in the

diagnostics buffer of the CPU.

X X X X Variables are forced.

X X X X Accessing the memory card

10Hz

Configuration is loaded.

Overall reset

2Hz

X X X Overall reset is requested

10Hz

X X X Overall reset is executed.

Factory reset

Reset to factory setting is executed.

Reset to factory setting finished without error

Firmware update

2Hz 2Hz

The alternate blinking indicates that there is new firmware on the memory card.

2Hz 2Hz

The alternate blinking indicates that a firmware update is executed.

Firmware update finished without error.

10Hz 10Hz 10Hz 10Hz

Error during Firmware update.

not relevant: X

LEDs CPU

VIPA System 300S

Hardware description

Structure > LEDs

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Ethernet PG/OP channel

L/A

(Link/Activity)

green

(Speed)

green

Meaning

X The Ethernet PG/OP channel is physically connected to Ethernet.

X There is no physical connection.

flickers

X Shows Ethernet activity.

The Ethernet interface of the Ethernet PG/OP channel has a transfer rate of 100Mbit.

The Ethernet interface of the Ethernet PG/OP channel has a transfer rate of 10Mbit.

not relevant: X

Dependent on the mode of operation the LEDs show information about the state of operation of the PROFIBUS part according to the following pattern:

Master operation

(RUN)

green

(ERR)

red

green

red

Meaning

Master has no project, this means the interface is deactivated respectively PtP is active.

Master has bus parameters and is in RUN without slaves.

2Hz

Master is in "clear" state (safety state). The inputs of the slaves may be read. The outputs are disabled.

Master is in "operate" state, this means data exchange between master and slaves. The outputs may be accessed.

CPU is in RUN state, at least 1 slave is missing.

2Hz

CPU is in STOP, at least 1 slave is missing.

Initialization error at faulty parametrization.

Wait state for start command from CPU.

Slave operation

(RUN)

green

(ERR)

red

green

red

Meaning

Slave has no configuration respectively PtP is active.

2Hz

Slave is without master.

LEDs PROFIBUS/PtP interface X3

VIPA System 300S

Hardware description

Structure > LEDs

HB140 | CPU | 317-4PN23 | en | 18-01 33

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(RUN)

green

(ERR)

red

green

red

Meaning

2Hz 2Hz

Alternate blinking at configuration faults.

Slave exchanges data with the master.

MT (Maintenance)

yellow

BF (Bus error)

red

Meaning

n Bus error, no connection to sub net/switch n wrong transfer rate n Full-duplex-transmission is not activated

2Hz

n Failure of a connected IO device n At least one IO device is not access-able n Faulty configuration

X Maintenance event is pending.

4Hz 4Hz

The alternate blinking indicates that a firmware update of the PROFINET IO controller is executed.

Firmware update of the PROFINET IO controller is finished without error.

2Hz

X With a suited configuration tool you can cause the MT LED to

blink by means of the function ‘Member blink test’ . This can be useful for e.g. identification of the module.

not relevant: X

L/A (Link/Activity)

green

S (Speed)

green

Meaning

X The PROFINET IO controller is physically connected to the

Ethernet interface.

X There is no physical connection.

flickers

X Shows Ethernet activity of the PROFINET IO controller.

The Ethernet interface of the PROFINET IO controller has a transfer rate of 100Mbit.

The Ethernet interface of the PROFINET IO controller has a transfer rate of 10Mbit.

not relevant: X

LEDs PROFINET IO controller X8

VIPA System 300S

Hardware description

Structure > LEDs

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4.3 Technical data

Order no. 317-4PN23

Type CPU 317PN

SPEED-Bus

Technical data power supply

Power supply (rated value) DC 24 V

Power supply (permitted range) DC 20.4...28.8 V

Reverse polarity protection

Current consumption (no-load operation) 270 mA

Current consumption (rated value) 1.5 A

Inrush current 6 A

I²t 0.28 A²s

Max. current drain at backplane bus 3 A

Max. current drain load supply -

Power loss 10 W

Load and working memory

Load memory, integrated 8 MB

Load memory, maximum 8 MB

Work memory, integrated 4 MB

Work memory, maximal 8 MB

Memory divided in 50% program / 50% data

Memory card slot SD/MMC-Card with max. 2 GB

Hardware configuration

Racks, max. 4

Modules per rack, max. 8 in multiple-, 32 in a single-rack configuration

Number of integrated DP master 1

Number of DP master via CP 4

Operable function modules 8

Operable communication modules PtP 16

Operable communication modules LAN 8

Status information, alarms, diagnostics

Status display yes

Interrupts no

Process alarm no

Diagnostic interrupt no

Diagnostic functions yes

Diagnostics information read-out possible

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

Supply voltage display green LED

Group error display red SF LED

Channel error display none

Command processing times

Bit instructions, min. 0.01 µs

Word instruction, min. 0.01 µs

Double integer arithmetic, min. 0.01 µs

Floating-point arithmetic, min. 0.06 µs

Timers/Counters and their retentive characteristics

Number of S7 counters 2048

S7 counter remanence adjustable 0 up to 2048

S7 counter remanence adjustable C0 .. C7

Number of S7 times 2048

S7 times remanence adjustable 0 up to 2048

S7 times remanence adjustable not retentive

Data range and retentive characteristic

Number of flags 16384 Byte

Bit memories retentive characteristic adjustable adjustable 0 up to 16384

Bit memories retentive characteristic preset MB0 .. MB15

Number of data blocks 8190

Max. data blocks size 64 KB

Number range DBs 1 ... 8190

Max. local data size per execution level 3072 Byte

Max. local data size per block 3072 Byte

Blocks

Number of OBs 24

Maximum OB size 64 KB

Total number DBs, FBs, FCs -

Number of FBs 8191

Maximum FB size 64 KB

Number range FBs 0 ... 8190

Number of FCs 8191

Maximum FC size 64 KB

Number range FCs 0 ... 8190

Maximum nesting depth per priority class 16

Maximum nesting depth additional within an error OB 4

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

Time

Real-time clock buffered

Clock buffered period (min.) 6 w

Type of buffering Vanadium Rechargeable Lithium Battery

Load time for 50% buffering period 20 h

Load time for 100% buffering period 48 h

Accuracy (max. deviation per day) 10 s

Number of operating hours counter 8

Clock synchronization

Synchronization via MPI Master/Slave

Synchronization via Ethernet (NTP) Slave

Address areas (I/O)

Input I/O address area 8192 Byte

Output I/O address area 8192 Byte

Process image adjustable

Input process image preset 256 Byte

Output process image preset 256 Byte

Input process image maximal 8192 Byte

Output process image maximal 8192 Byte

Digital inputs 65536

Digital outputs 65536

Digital inputs central 1024

Digital outputs central 1024

Integrated digital inputs -

Integrated digital outputs -

Analog inputs 4096

Analog outputs 4096

Analog inputs, central 256

Analog outputs, central 256

Integrated analog inputs -

Integrated analog outputs -

Communication functions

PG/OP channel

Global data communication

Number of GD circuits, max. 8

Size of GD packets, max. 22 Byte

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

S7 basic communication

S7 basic communication, user data per job 76 Byte

S7 communication

S7 communication as server

S7 communication as client -

S7 communication, user data per job 160 Byte

Number of connections, max. 32

Functionality Sub-D interfaces

Type X2

Type of interface RS485

Connector Sub-D, 9-pin, female

Electrically isolated

MPI

MP²I (MPI/RS232) -

DP master -

DP slave -

Point-to-point interface -

5V DC Power supply max. 90mA, isolated

24V DC Power supply max. 100mA, non-isolated

Type X3

Type of interface RS485

Connector Sub-D, 9-pin, female

Electrically isolated

MPI -

MP²I (MPI/RS232) -

DP master yes

DP slave yes

Point-to-point interface

5V DC Power supply max. 90mA, isolated

24V DC Power supply max. 100mA, non-isolated

Functionality MPI

Number of connections, max. 32

PG/OP channel

Routing

Global data communication

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

S7 basic communication

S7 communication

S7 communication as server

S7 communication as client -

Transmission speed, min. 19.2 kbit/s

Transmission speed, max. 12 Mbit/s

Functionality PROFIBUS master

Number of connections, max. 32

PG/OP channel

Routing

S7 basic communication

S7 communication

S7 communication as server

S7 communication as client -

Activation/deactivation of DP slaves

Direct data exchange (slave-to-slave communication) -

DPV1

Transmission speed, min. 9.6 kbit/s

Transmission speed, max. 12 Mbit/s

Number of DP slaves, max. 124

Address range inputs, max. 8 KB

Address range outputs, max. 8 KB

User data inputs per slave, max. 244 Byte

User data outputs per slave, max. 244 Byte

Functionality PROFIBUS slave

Number of connections, max. 32

PG/OP channel

Routing

S7 communication

S7 communication as server

S7 communication as client -

Direct data exchange (slave-to-slave communication) -

DPV1

Transmission speed, min. 9.6 kbit/s

Transmission speed, max. 12 Mbit/s

Automatic detection of transmission speed -

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

Transfer memory inputs, max. 244 Byte

Transfer memory outputs, max. 244 Byte

Address areas, max. 32

User data per address area, max. 32 Byte

Point-to-point communication

PtP communication

Interface isolated

RS232 interface -

RS422 interface -

RS485 interface

Connector Sub-D, 9-pin, female

Transmission speed, min. 150 bit/s

Transmission speed, max. 115.5 kbit/s

Cable length, max. 500 m

Point-to-point protocol

ASCII protocol

STX/ETX protocol

3964(R) protocol

RK512 protocol -

USS master protocol

Modbus master protocol

Modbus slave protocol -

Special protocols -

Properties PROFINET I/O controller

Realtime Class -

Conformance Class PROFINET IO

Number of PN IO devices 128

IRT support -

Shared Device supported -

MRP Client supported -

Prioritized start-up -

Number of PN IO lines 1

Address range inputs, max. 4 KB

Address range outputs, max. 4 KB

Transmiting clock 1 ms

Update time 1 ms .. 512 ms

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

Isochronous mode -

Parallel operation as controller and I-Device -

Functionality RJ45 interfaces

Type X5

Type of interface Ethernet 10/100 MBit

Connector RJ45

Electrically isolated

PG/OP channel

Number of connections, max. 4

Productive connections -

Fieldbus -

Type X8

Type of interface Ethernet 10/100 MBit

Connector RJ45

Electrically isolated

PG/OP channel

Number of connections, max. 8

Productive connections

Fieldbus -

Ethernet communication CP

Number of configurable connections, max. 24

Number of productive connections by Siemens NetPro, max.

S7 connections BSEND, BRCV, GET, PUT, Connection of active and pas-

sive data handling

User data per S7 connection, max. 32 KB

TCP-connections FETCH PASSIV, WRITE PASSIV, Connection of passive

data handling

User data per TCP connection, max. 64 KB

ISO-connections -

User data per ISO connection, max. -

ISO on TCP connections (RFC 1006) FETCH PASSIV, WRITE PASSIV, Connection of passive

data handling

User data per ISO on TCP connection, max. 32 KB

UDP-connections -

User data per UDP connection, max. -

UDP-multicast-connections -

VIPA System 300S

Hardware description

Technical data

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Order no. 317-4PN23

UDP-broadcast-connections -

Ethernet open communication

Number of connections, max. 24

ISO on TCP connections (RFC 1006) TSEND, TRCV, TCON, TDISCON

User data per ISO on TCP connection, max. 8 KB

TCP-Connections native TSEND, TRCV, TCON, TDISCON

User data per native TCP connection, max. 8 KB

User data per ad hoc TCP connection, max. 1460 Byte

UDP-connections TUSEND, TURCV

User data per UDP connection, max. 1472 Byte

Management & diagnosis

Protocols ICMP

DCP

Web based diagnosis -

NCM diagnosis

Housing

Material PPE

Mounting Rail System 300

Mechanical data

Dimensions (WxHxD) 80 mm x 125 mm x 120 mm

Net weight 440 g

Weight including accessories -

Gross weight -

Environmental conditions

Operating temperature 0 °C to 60 °C

Storage temperature -25 °C to 70 °C

Certifications

UL certification yes

KC certification yes

VIPA System 300S

Hardware description

Technical data

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5 Deployment CPU 317-4PN23

5.1 Assembly

Information about assembly and cabling: Ä Chapter 3 ‘Assembly and installation guidelines’ on page 16

5.2 Start-up behavior

After the power supply has been switched on, the CPU changes to the operating mode the operating mode lever shows.

When the CPU is delivered it has been reset. After a STOP®RUN transition the CPU switches to RUN without program.

The CPU switches to RUN with the program stored in the battery buffered RAM.

n The accumulator/battery is automatically loaded via the integrated power supply and

guarantees a buffer for max. 30 days. If this time is exceeded, the battery may be totally discharged. This means that the battery buffered RAM is deleted.

n In this state, the CPU executes an overall reset. If a memory card is plugged, pro-

gram code and data blocks are transferred from the memory card into the work memory of the CPU. If no memory card is plugged, the CPU transfers permanent stored "protected" blocks into the work memory if available.

n Depending on the position of the operating mode switch, the CPU switches to RUN, if

OB 81 exists, res. remains in STOP. This event is stored in the diagnostic buffer as: "Start overall reset automatically (unbuffered PowerON)".

CAUTION!

After a power reset and with an empty battery the CPU starts with a BAT error and executes an overall reset. The BAT error can be deleted again, if once during power cycle the time between switching on and off the power supply is at least 30sec. and the battery is fully loaded. Otherwise with a short power cycle the BAT error still exists and an overall reset is executed.

Turn on power supply

Default boot procedure, as delivered

Boot procedure with valid configuration in the CPU

Boot procedure with empty battery

VIPA System 300S

Deployment CPU 317-4PN23

Start-up behavior

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5.3 Addressing

The CPU 317-4PN23 provides an I/O area (address 0 ... max. peripheral address) and a process image of the in- and outputs (each address 0 ... 255). The process image stores the signal states additionally in a separate memory area.

The process image this divided into two parts:

n process image to the inputs (PII) n process image to the outputs (PIQ)

The process image is updated automatically when a cycle has been completed.

Maximally 8 modules per row may be configured by the CPU 317-4PN23.

For the project engineering of more than 8 modules you may use line interface connections. For this you set in the hardware configurator the module IM 360 from the hardware catalog to slot 3 of your 1. profile rail. Now you may extend your system with up to 3 profile rails by starting each with an IM 361 from Siemens at slot 3. Considering the max total current with the CPU 317-4PN23 from VIPA up to 32 modules may be arranged in a row. Here the installation of the line connections IM 360/361 from Siemens is not required.

Further 10 modules at the SPEED-Bus may be connected. CPs and DP masters that are additionally virtual configured at the standard bus are taken into the count of 32 modules at the standard bus.

You may access the modules with read res. write accesses to the peripheral bytes or the process image.

To define addresses a hardware configuration may be used. For this, click on the properties of the according module and set the wanted address.

CAUTION!

Please take care not to configure a double address assignment at connection via external PROFIBUS DP masters - required for project engineering of a SPEED-Bus system! At external DP master systems, the Siemens hardware configurator does not execute an address check!

If you do not like to use a hardware configuration, an automatic addressing comes into force. At the automatic address allocation DIOs occupy depending on the slot location always 4byte and AIOs, FMs, CPs always 16byte at the standard bus and 256byte at the SPEED-Bus. Depending on the slot location the start address from where on the according module is stored in the address range is calculated with the following formulas:

Standard-Bus

n DIOs: Start address = 4×(slot-1) n AIOs, FMs, CPs: Start address = 16×(slot-1)+256

Backplane bus periphery

Max. number of pluggable modules

Define addresses by hardware configuration

Automatic addressing

VIPA System 300S

Deployment CPU 317-4PN23

Addressing

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SPEED-Bus

n DIOs: Start address = 4×(slot-101)+128 n AIOs, FMs, CPs: Start address = 256×(slot-101)+2048

VIPA System 300S

Deployment CPU 317-4PN23

Addressing

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The following sample shows the functionality of the automatic address allocation separated for standard bus and SPEED-Bus:

Example for automatic address allocation

VIPA System 300S

Deployment CPU 317-4PN23

Addressing

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5.4 Hardware configuration - CPU

The configuration of the CPU takes place at the Siemens ‘hardware configurator’ . The hardware configurator is part of the Siemens SIMATIC Manager. It serves for project engineering. The modules, which may be configured here are listed in the hardware catalog. If necessary you have to update the hardware catalog with ‘Options è Update Catalog’.

For project engineering a thorough knowledge of the Siemens SIMATIC Manager and the Siemens hardware configurator is required.

Please consider that this SPEED7-CPU has 4 ACCUs. After an arithmetic operation (+I, -I, *I, /I, +D, -D, *D, /D, MOD, +R, -R, *R, /R) the content of ACCU 3 and ACCU 4 is loaded into ACCU 3 and 2. This may cause conflicts in applications that presume an unmodified ACCU 2.

For more information may be found in the manual "VIPA Operation list SPEED7" at "Differences between SPEED7 and 300V programming".

To be compatible with the Siemens SIMATIC Manager the following steps should be executed:

1. Start the Siemens hardware configurator with a new project.

2. Insert a profile rail from the hardware catalog.

3. Place at ‘Slot’ -Number 2 the CPU 317-2 PN/DP (6ES7 317-2EK14-0AB0 V3.2).

4. The integrated PROFIBUS DP master (X3) is to be configured and connected via

the sub module X1 (MPI/DP). In the operation mode PROFIBUS the CPU may further more be accessed via the MPI interface (X2) with address 2 und 187.5kbit/s.

5. The PROFINET IO controller is to be configured via the sub module ‘X2 PN-IO’ .

Precondition

Proceeding

VIPA System 300S

Deployment CPU 317-4PN23

Hardware configuration - CPU

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5.5 Hardware configuration - I/O modules

After the hardware configuration place the System 300 modules in the plugged sequence starting with slot 4.

For parametrization double-click during the project engineering at the slot overview on the module you want to parameterize. In the appearing dialog window you may set the wanted parameters. By using the SFCs 55, 56 and 57 you may alter and transfer parameters for wanted modules during runtime. For this you have to store the module specific parameters in so called "record sets". More detailed information about the structure of the record sets is to find in the according module description.

For the project engineering of more than 8 modules you may use line interface connections. For this you set in the hardware configurator the module IM 360 from the hardware catalog to slot 3 of your 1. profile rail. Now you may extend your system with up to 3 profile rails by starting each with an IM 361 from Siemens at slot 3. Considering the max. total current with the VIPA SPEED7 CPUs up to 32 modules may be arranged in a row. Here the installation of the line connections IM 360/361 from Siemens is not required.

Hardware configuration of the modules

Parametrization

Bus extension with IM 360 and IM 361

VIPA System 300S

Deployment CPU 317-4PN23

Hardware configuration - I/O modules

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5.6 Hardware configuration - Ethernet PG/OP channel

The CPU 317-4PN23 has an integrated Ethernet PG/OP channel. This channel allows you to program and remote control your CPU. The PG/OP channel also gives you access to the internal web page that contains information about firmware version, connected I/O devices, current cycle times etc. With the first start-up respectively after an overall reset the Ethernet PG/OP channel does not have any IP address. For online access to the CPU via Ethernet PG/OP channel valid IP address parameters have to be assigned to this by means of the Siemens SIMATIC Manager. This is called "initialization".

1. Install your System 300S with your CPU.

2. Wire the system by connecting cables for voltage supply and signals.

3. Connect the Ethernet jack of the Ethernet PG/OP channel to Ethernet

4. Switch on the power supply.

After a short boot time the CP is ready for communication. He possibly has no IP address data and requires an initialization.

The initialization via PLC functions takes place with the following proceeding:

Determine the current Ethernet (MAC) address of your Ethernet PG/OP channel. This always may be found as 1. address under the front flap of the CPU on a sticker on the left side.

You get valid IP address parameters from your system administrator. The assignment of the IP address data happens online in the Siemens SIMATIC Manager starting with version V 5.3 & SP3 with the following proceeding:

Start the Siemens SIMATIC Manager and set via ‘Options è Set PG/PC interface’

the access path to ‘TCP/IP -> Network card ....’ .

Open with ‘PLC è Edit Ethernet Node n’ the dialog window with the same name.

3. To get the stations and their MAC address, use the [Browse] button or type in the MAC Address. The Mac address may be found at the 1. label beneath the front flap of the CPU.

4. Choose if necessary the known MAC address of the list of found stations.

5. Either type in the IP configuration like IP address, subnet mask and gateway.

6. Confirm with [Assign IP configuration].

Direct after the assignment the Ethernet PG/OP channel may be reached online by these address data. The value remains as long as it is reassigned, it is overwritten by a hardware configuration or an factory reset is executed.

Overview

Assembly and commissioning

"Initialization" via PLC functions

Assign IP address parameters

VIPA System 300S

Deployment CPU 317-4PN23

Hardware configuration - Ethernet PG/OP channel

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1. Open the Siemens hardware configurator und configure the Siemens CPU 317-2 PN/DP (6ES7 317-2EK14-0AB0 V3.2).

2. Configure the modules at the standard bus.

3. For the Ethernet PG/OP channel you have to configure a Siemens CP 343-1

(SIMATIC 300 \ CP 300 \ Industrial Ethernet \CP 343-1 \ 6GK7 343-1EX11 0XE0) always below the really plugged modules.

4. Open the property window via double-click on the CP 343-1EX11 and enter for the CP at ‘Properties’ the IP address data, which you have assigned before.

5. Assign the CP to a ‘Subnet’ . Without assignment the IP address data are not used!

6. Transfer your project.

5.7 Hardware configuration - Communication

The hardware configuration is described at the following pages:

Chapter 7.4 ‘Deployment as PROFIBUS DP master’ on page 103

Chapter 7.5 ‘Deployment as PROFIBUS DP slave’ on page 104

Chapter 6.3 ‘Deployment of RS485 interface for PtP’ on page 86

Chapter 8.8 ‘Hardware configuration - CPU via Ethernet’ on page 118

Chapter 9.4 ‘Fast introduction PROFINET’ on page 135

5.8 Hardware configuration - SPEED-Bus

5.8.1 Preconditions

Since the VIPA specific CPU parameters may be set and the modules at the SPEED-Bus may be configured, the installation of the SPEEDBUS.GSD from VIPA in the hardware catalog is necessary. The CPU and its SPEED-Bus modules may be configured in a PROFIBUS master after installation.

Take IP address parameters in project

VIPA System 300S

Deployment CPU 317-4PN23

Hardware configuration - SPEED-Bus > Preconditions

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The GSD (Geräte-Stamm-Datei) is online available in the following language versions. Further language versions are available on inquires:

Name Language

SPEEDBUS.GSD German (default)

SPEEDBUS.GSG German

SPEEDBUS.GSE English

The GSD files may be found at www.vipa.com at the service area.

The integration of the SPEEDBUS.GSD takes place with the following proceeding:

1. Go to the service area of www.vipa.com.

Load from the download area at ‘Config files è PROFIBUS’ the according file for your System 300S.

3. Extract the file to your work directory.

4. Start the hardware configurator from Siemens.

5. Close every project.

Select ‘Options è Install new GSD-file’.

7. Navigate to the directory VIPA_System_300S and select SPEEDBUS.GSD an.

The SPEED7 CPUs and modules of the System 300S from VIPA may now be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O / VIPA_SPEEDBUS.

5.8.2 Proceeding

The embedding of the CPU 317-4PN23 and its modules at the SPEED-Bus happens by means of a virtual PROFIBUS master system with the following approach:

Perform a hardware configuration for the CPU.

Chapter 5.4 ‘Hardware configura-

tion - CPU’ on page 47

2. Since the SPEED-Bus modules are to be linked as a virtual PROFIBUS system, configure always as last module a Siemens DP master CP 342-5 (342-5DA02 V5.0). Link the DP master to a new PROFIBUS net and switch it to DP master operating mode.

3. To this master system you assign every SPEED-Bus module as "VIPA_SPEEDBUS" slave starting with the CPU. Here the PROFIBUS address corresponds to the slot no. Beginning with 100 for the CPU. Place at slot 0 of every slave the assigned module

Due to the fact that some SPEED-Bus CPs from VIPA are similar in project engineering and parametrization to the corresponding CP from Siemens, for each SPEED-Bus CP a corresponding Siemens CP is to be placed and linked at the standard bus.

More information about the configuration of the according SPEED-Bus module may be found in the according manual.

Installation of the SPEEDBUS.GSD

VIPA System 300S

Deployment CPU 317-4PN23

Hardware configuration - SPEED-Bus > Proceeding

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5.9 Setting standard CPU parameters

5.9.1 Parameterization via Siemens CPU

Since the CPU is to be configured as Siemens CPU 317-2 PN/DP (6ES7 317-2EK14-0AB0 V3.2) in the Siemens hardware configurator, the standard parameters of the VIPA CPU may be set with "Object properties" of the CPU during hardware configuration. Via a double-click on the CPU 317-2 PN/DP (6ES7 317-2EK14-0AB0 V3.2) the parameter window of the CPU may be accessed. Using the registers you get access to every standard parameter of the CPU.

5.9.2 Parameters CPU

The CPU does not evaluate each parameter, which may be set at the hardware configuration. The parameters of the following registers are not supported: Synchronous cycle interrupts, communication and web. The following parameters are currently supported:

n Short description

– The short description of the Siemens CPU is CPU 317-2 PN/DP (6ES7

317-2EK14-0AB0 V3.2).

n Order No. / Firmware

– Order number and firmware are identical to the details in the "hardware catalog"

window.

n Name

– The Name field provides the short description of the CPU. – If you change the name the new name appears in the Siemens SIMATIC Man-

ager.

n Plant designation

– Here is the possibility to specify a plant designation for the CPU. – This plant designation identifies parts of the plant according to their function. – Its structure is hierarchic according to IEC 1346-1.

n Location designation

– The location designation is part of the resource designation. – Here the exact location of your module within a plant may be specified.

n Comment

– In this field information about the module may be entered.

Parameterization via Siemens CPU

Supported parameters

General

VIPA System 300S

Deployment CPU 317-4PN23

Setting standard CPU parameters > Parameters CPU

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n Startup when expected/actual configuration differs

– If the checkbox for ‘Startup when expected/actual configuration differ’ is dese-

lected and at least one module is not located at its configured slot or if another type of module is inserted there instead, then the CPU does not switch to RUN mode and remains in STOP mode.

– If the checkbox for ‘Startup when expected/actual configuration differ’ is selected,

then the CPU starts even if there are modules not located in their configured slots of if another type of module is inserted there instead, such as during an initial system start-up.

n Monitoring time for ready message by modules [100ms]

– This operation specifies the maximum time for the ready message of every con-

figured module after PowerON.

– Here connected PROFIBUS DP slaves are also considered until they are parame-

terized.

– If the modules do not send a ready message to the CPU by the time the moni-

toring time has expired, the actual configuration becomes unequal to the preset configuration.

n Monitoring time for transfer of parameters to modules [100ms]

– The maximum time for the transfer of parameters to parameterizable modules. – Here connected PROFINET IO devices also considered until they are parameter-

ized.

– If not every module has been assigned parameters by the time this monitoring

time has expired; the actual configuration becomes unequal to the preset configuration.

n Update OB 1 process image cyclically

– This parameter is not relevant.

n Scan cycle monitoring time

– Here the scan cycle monitoring time in milliseconds may be set. – If the scan cycle time exceeds the scan cycle monitoring time, the CPU enters the

STOP mode.

– Possible reasons for exceeding the time are:

- Communication processes

- a series of interrupt events

- an error in the CPU program

n Minimum scan cycle time

– This parameter is not relevant.

n Scan cycle load from Communication

– Using this parameter you can control the duration of communication processes,

which always extend the scan cycle time so it does not exceed a specified length.

– If the cycle load from communication is set to 50%, the scan cycle time of OB 1

can be doubled. At the same time, the scan cycle time of OB 1 is still being influenced by asynchronous events (e.g. hardware interrupts) as well.

n Size of the process image input/output area

– Here the size of the process image max. 2048 for the input/output periphery may

be fixed (default: 128).

n OB85 call up at I/O access error

– The preset reaction of the CPU may be changed to an I/O access error that

occurs during the update of the process image by the system.

– The VIPA CPU is preset such that OB 85 is not called if an I/O access error

occurs and no entry is made in the diagnostic buffer either.

n Clock memory

– Activate the check box if you want to use clock memory and enter the number of

the memory byte.

Startup

Cycle / Clock memory

VIPA System 300S

Deployment CPU 317-4PN23

Setting standard CPU parameters > Parameters CPU

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The selected memory byte cannot be used for temporary data storage.

n Number of Memory bytes from MB0

– Enter the number of retentive memory bytes from memory byte 0 onwards.

n Number of S7 Timers from T0

– Enter the number of retentive S7 timers from T0 onwards. Each S7 timer occu-

pies 2bytes.

n Number of S7 Counters from C0

– Enter the number of retentive S7 counter from C0 onwards.

n Areas

– This parameter is not supported.

n Priority

– Here the priorities are displayed, according to which the hardware interrupt OBs

are processed (hardware interrupt, time-delay interrupt, async. error interrupts).

n Priority

– This value is fixed to 2.

n Active

– By enabling ‘Active’ the time-of-day interrupt function is enabled.

n Execution

– Select how often the interrupts are to be triggered. – Intervals ranging from every minute to yearly are available. The intervals apply to

the settings made for start date and time.

n Start date/time

– Enter date and time of the first execution of the time-of-day interrupt.

n Process image partition

– This parameter is not supported.

n Priority

– Here the priorities may be specified according to which the corresponding cyclic

interrupt is processed.

– With priority "0" the corresponding interrupt is deactivated.

n Execution

– Enter the time intervals in ms, in which the watchdog interrupt OBs should be pro-

cessed.

– The start time for the clock is when the operating mode switch is moved from

STOP to RUN.

n Phase offset

– Enter the delay time in ms for current execution for the watch dog interrupt. This

should be performed if several watchdog interrupts are enabled.

– Phase offset allows to distribute processing time for watchdog interrupts across

the cycle.

n Process image partition

– This parameter is not supported.

Retentive Memory

Interrupts

Time-of-day interrupts

Cyclic interrupts

VIPA System 300S

Deployment CPU 317-4PN23

Setting standard CPU parameters > Parameters CPU

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n Report cause of STOP

– Activate this parameter, if the CPU should report the cause of STOP to PG

respectively OP on transition to STOP.

n Number of messages in the diagnostics buffer

– This parameter is ignored. The CPU always has a diagnostics buffer (circular

buffer) for 100 diagnostics messages.

n Synchronization type

– Here you specify whether clock should synchronize other clocks or not.

– as slave: The clock is synchronized by another clock. – as master: The clock synchronizes other clocks as master. – none: There is no synchronization

n Time interval

– Time intervals within which the synchronization is to be carried out.

n Correction factor

– Lose or gain in the clock time may be compensated within a 24 hour period by

means of the correction factor in ms.

– If the clock is 1s slow after 24 hours, you have to specify a correction factor of

"+1000" ms.

n Level of protection: Here 1 of 3 protection levels may be set to protect the CPU from

unauthorized access. – Protection level 1 (default setting):

No password adjustable, no restrictions

– Protection level 2 with password:

Authorized users: read and write access Unauthorized user: read access only

– Protection level 3:

Authorized users: read and write access Unauthorized user: no read and write access

5.9.3 Parameters for DP

The properties dialog of the PROFIBUS part is opened via a double click to the sub module DP.

n Short description: Here the short description "DP" for PROFIBUS DP is specified. n Order no.: Nothing is shown here. n Name: Here "DP" is shown. If you change the name, the new name appears in the

Siemens SIMATIC Manager.

n Interface: The PROFIBUS address is shown here. n Properties: With this button the properties of the PROFIBUS DP interface may be

preset.

n Comment: You can enter the purpose of the PROFIBUS interface.

n Diagnostics: A diagnostics address for PROFIBUS DP is to be preset here. In the

case of an error the CPU is informed via this address.

n Operating mode: Here the operating mode of the PROFIBUS part may be preset.

More may be found at chapter "Deployment PROFIBUS Communication".

n Configuration: Within the operating mode "DP-Slave" you may configure your slave

system. More may be found at chapter "Deployment PROFIBUS communication".

n Clock: These parameters are not supported.

Diagnostics/Clock

Protection

General

Address

VIPA System 300S

Deployment CPU 317-4PN23

Setting standard CPU parameters > Parameters for DP

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5.9.4 Parameters for MPI/DP

The properties dialog of the MPI interface is opened via a double click to the sub module MPI/DP.

n Short description: Here the short description "MPI/DP" for the MPI interface is speci-

fied.

n Order no.: Nothing is shown here. n Name: At Name "MPI/DP" for the MPI interface is shown. If you change the name, the

new name appears in the Siemens SIMATIC Manager.

n Type: Please regard only the type "MPI" is supported by the VIPA CPU. n Interface: Here the MPI address is shown. n Properties: With this button the properties of the MPI interface may be preset. n Comment: You can enter the purpose of the MPI interface.

n Diagnostics: A diagnostics address for the MPI interface is to be preset here. In the

case of an error the CPU is informed via this address.

n Operating mode, Configuration, Clock: These parameters are not supported.

5.10 Setting VIPA specific CPU parameters

5.10.1 Proceeding

Except of the VIPA specific CPU parameters the CPU parameterization takes place in the parameter dialog of the CPU from Siemens. With installing of the SPEEDBUS.GSD the VIPA specific parameters may be set during hardware configuration. Here the following parameters may be accessed:

n Function RS485 (PtP, Synchronization between DP master and CPU) n Token Watch n Number remanence flag, timer, counter n Priority OB 28, OB 29 n Call OB 80 on cyclic interrupt error

Since the VIPA specific CPU parameters may be set, the installation of the SPEEDBUS.GSD from VIPA in the hardware catalog is necessary. The CPU may be configured in a PROFIBUS master system and the appropriate parameters may be set after installation.

General

Address

Overview

Requirements

VIPA System 300S

Deployment CPU 317-4PN23

Setting VIPA specific CPU parameters > Proceeding

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The GSD (Geräte-Stamm-Datei) is online available in the following language versions. Further language versions are available on inquires:

Name Language

SPEEDBUS.GSD German (default)

SPEEDBUS.GSG German

SPEEDBUS.GSE English

The GSD files may be found at www.vipa.com at the service area.

The integration of the SPEEDBUS.GSD takes place with the following proceeding:

1. Go to the service area of www.vipa.com.

Load from the download area at ‘Config files è PROFIBUS’ the according file for your System 300S.

3. Extract the file to your work directory.

4. Start the hardware configurator from Siemens.

5. Close every project.

Select ‘Options è Install new GSD-file’.

7. Navigate to the directory VIPA_System_300S and select SPEEDBUS.GSD an.

The SPEED7 CPUs and modules of the System 300S from VIPA may now be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O / VIPA_SPEEDBUS.

The embedding of the CPU 317-4PN23 happens by means of a virtual PROFIBUS master system with the following approach:

Perform a hardware configuration for the CPU.

Chapter 5.4 ‘Hardware configura-

tion - CPU’ on page 47

2. Configure always as last module a Siemens DP master CP 342-5 (342-5DA02 V5.0). Connect and parametrize it at operation mode "DP-Master".

3. Connect the slave system "VIPA_SPEEDbus". After installing the SPEEDBUS.GSD this may be found in the hardware catalog at Profibus-DP / Additional field devices / I/O / VIPA / VIPA_SPEEDBUS.

4. For the slave system set the PROFIBUS address 100.

5. Configure at slot 0 the VIPA CPU 317-4PN23 of the hardware catalog from

VIPA_SPEEDbus.

6. By double clicking the placed CPU 317-4PN23 the properties dialog of the CPU may be opened.

The hardware configuration, which is shown here, is only required, if you want to customize the VIPA specific parameters.

5.10.2 VIPA specific parameters

The following parameters may be accessed by means of the properties dialog of the VIPA-CPU.

Installation of the SPEEDBUS.GSD

Hardware configuration

VIPA System 300S

Deployment CPU 317-4PN23

Setting VIPA specific CPU parameters > VIPA specific parameters

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5.10.2.1 Function RS485 X3

Using this parameter the RS485 interface may be switched to PtP communication (point to point) respectively the synchronization between DP master system and CPU may be

set:

Deactivated Deactivates the RS485 interface.

PtP With this operating mode the PROFIBUS

DP master is deactivated and the RS485 interface acts as an interface for serial point-to-point communication. Here data may be exchanged between two stations by means of protocols.

PROFIBUS DP async PROFIBUS DP master operation asyn-

chronous to CPU cycle The RS485 interface is preset at default to PROFIBUS DP async. Here CPU cycle and cycles of every VIPA PROFIBUS DP master run independently.

PROFIBUS DP syncIn The CPU is waiting for DP master input

data.

PROFIBUS DP syncOut The DP master system is waiting for CPU

output data.

PROFIBUS DP syncInOut CPU and DP master system are waiting on

each other and form thereby a cycle.

Default: PROFIBUS DP async

5.10.2.1.1 Synchronization between master system and CPU

Normally the cycles of CPU and DP master run independently. The cycle time of the CPU is the time needed for one OB1 cycle and for reading respectively writing the inputs respectively outputs. The cycle time of a DP master depends among others on the number of connected slaves and the baud rate, thus every plugged DP master has its own cycle time. Due to the asynchronism of CPU and DP master the whole system gets relatively high response times. The synchronization behavior between every VIPA PROFIBUS DP master and the CPU may be configured by means of a hardware configuration as shown above. The different modes for the synchronization are in the following described.

In PROFIBUS DP SyncInOut mode CPU and DP master system are waiting on each other and form thereby a cycle. Here the whole cycle is the sum of the longest DP master cycle and CPU cycle. By this synchronization mode you receive global consistent in-/ output data, since within the total cycle the same input and output data are handled successively by CPU and DP master system. If necessary the time of the Watchdog of the bus parameters should be increased at this mode.

Overview

PROFIBUS DP SyncInOut

VIPA System 300S

Deployment CPU 317-4PN23

Setting VIPA specific CPU parameters > VIPA specific parameters

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In this operating mode the cycle time of the VIPA DP master system depends on the CPU cycle time. After CPU start-up the DP master gets synchronized. As soon as their cycle is passed they wait for the next synchronization impulse with output data of the CPU. So the response time of your system can be improved because output data were directly transmitted to the DP master system. If necessary the time of the Watchdog of the bus parameters should be increased at this mode.

In the operating mode PROFIBUS DP SyncIn the CPU cycle is synchronized to the cycle of the VIPA PROFIBUS DP master system. Here the CPU cycle depends on the VIPA DP master with the longest cycle time. If the CPU gets into RUN it is synchronized with each PROFIBUS DP master. As soon as the CPU cycle is passed, it waits for the next synchronization impulse with input data of the DP master system. If necessary the Scan Cycle Monitoring Time of the CPU should be increased.

PROFIBUS DP SyncOut

PROFIBUS-DP SyncIn

VIPA System 300S

Deployment CPU 317-4PN23

Setting VIPA specific CPU parameters > VIPA specific parameters

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5.10.2.2 Token Watch

By presetting the PROFIBUS bus parameters within the hardware configuration a token time for the PROFIBUS results. The token time defines the duration until the token reaches the DP master again. Per default this time is supervised. Due to this monitoring disturbances on the bus can affect a reboot of the DP master. Here with the parameter Token Watch the monitoring of the token time can be switched off respectively on.

Default: On

5.10.2.3 Number remanence flag

Here the number of flag bytes may be set. With 0 the value Retentive memory > Number of memory bytes starting with MB0 set at the parameters of the Siemens CPU is used. Otherwise the adjusted value (1 ... 8192) is used. Default: 0

5.10.2.4 Priority of OB 28 and OB 29

The priority fixes the order of interrupts of the corresponding interrupt OB. Here the following priorities are supported: 0 (Interrupt-OB is deactivated), 2, 3, 4, 9, 12, 16, 24. Default: 24

5.10.2.5 Call OB 80 on cyclic interrupt error

Once during a cyclic interrupt OB (OB 28, 29, 32 ... 35) the same cyclic interrupt is requested, the interrupt requests are collected and processed sequentially. Via the parameter ‘OB 80 for cyclic interrupt’ you can set here for the corresponding cyclic interrupt group that on a cyclic interrupt instead of the sequential processing the OB 80 is to be called. With this parameter you have the following settings:

n Deactivated (default)

– At a cyclic interrupt error the interrupt requests are collected and processed

sequentially.

n for OB...

– At a cyclic interrupt error of the corresponding cyclic interrupt OB, the OB 80 is

called.

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Setting VIPA specific CPU parameters > VIPA specific parameters

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5.11 Project transfer

There are the following possibilities for project transfer into the CPU:

n Transfer via MPI/PROFIBUS n Transfer via Ethernet n Transfer via memory card

5.11.1 Transfer via MPI/PROFIBUS

For transfer via MPI/PROFIBUS the CPU has the following interface:

n X2: MPI interface n X3: PROFIBUS interface

The structure of a MPI net is electrically identical with the structure of a PROFIBUS net. This means the same rules are valid and you use the same components for the build-up. The single participants are connected with each other via bus interface plugs and PROFIBUS cables. Per default the MPI net runs with 187.5kbaud. VIPA CPUs are delivered with MPI address 2.

The MPI programming cables are available at VIPA in different variants. The cables provide a RS232 res. USB plug for the PC and a bus enabled RS485 plug for the CPU. Due to the RS485 connection you may plug the MPI programming cables directly to an already plugged plug on the RS485 jack. Every bus participant identifies itself at the bus with an unique address, in the course of the address 0 is reserved for programming devices.

A cable has to be terminated with its surge impedance. For this you switch on the terminating resistor at the first and the last participant of a network or a segment. Please make sure that the participants with the activated terminating resistors are always power supplied. Otherwise it may cause interferences on the bus.

1 MPI programming cable 2 Activate the terminating resistor via switch 3 MPI network

1. Connect your PC to the MPI jack of your CPU via a MPI programming cable.

2. Load your project in the Siemens SIMATIC Manager.

Choose in the menu ‘Options è Set PG/PC interface’.

4. Select in the according list the "PC Adapter (MPI)"; if appropriate you have to add it first, then click on [Properties].

Overview

General

Net structure

MPI programming cable

Terminating resistor

Proceeding transfer via MPI interface

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5. Set in the register MPI the transfer parameters of your MPI net and type a valid

address.

6. Switch to the register Local connection.

7. Set the COM port of the PC and the transfer rate 38400baud for the MPI program-

ming cable.

Transfer your project via ‘PLC è Load to module’ via MPI to the CPU and save it with ‘PLC è Copy RAM to ROM’ on a memory card if one is plugged.

1. Connect your PC to the PROFIBUS jack of your CPU via a MPI programming cable.

2. Load your project in the Siemens SIMATIC Manager.

Choose in the menu ‘Options è Set PG/PC interface’.

4. Select in the according list the "PC Adapter (PROFIBUS)"; if appropriate you have to add it first, then click at [Properties].

5. Set in the register PROFIBUS the transfer parameters of your PROFIBUS net and enter a valid PROFIBUS address. The PROFIBUS address must be assigned to the DP master by a project before.

6. Switch to the register Local connection.

7. Set the COM port of the PC and the transfer rate 38400baud for the MPI program-

ming cable.

Transfer your project via ‘PLC è Load to module’ via PROFIBUS to the CPU and save it with ‘PLC è Copy RAM to ROM’ on a memory card if one is plugged.

Transfer via PROFIBUS is available by DP master, if projected as master and assigned with a PROFIBUS address before.

Within selecting the slave mode you have additionally to select the option "Test, commissioning, routing".

5.11.2 Transfer via Ethernet

For transfer via Ethernet the CPU has the following interface:

n X5: Ethernet PG/OP channel n X8: PROFINET IO Controller

So that you may access the Ethernet PG/OP channel you have to assign IP address parameters by means of the "initialization". Ä Chapter 5.6 ‘Hardware configuration -

Ethernet PG/OP channel’ on page 49

1. For the transfer, connect, if not already done, the appropriate Ethernet port to your Ethernet.

2. Open your project with the Siemens SIMATIC Manager.

Set via ‘Options è Set PG/PC Interface’ the access path to "TCP/IP ® Network

card .... ".

Proceeding transfer via PROFIBUS interface

Initialization

Transfer

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Click to ‘PLC è Download’ Download ® the dialog "Select target module" is opened. Select your target module and enter the IP address parameters of the Ethernet PG/OP channel for connection. Provided that no new hardware configuration is transferred to the CPU, the entered Ethernet connection is permanently stored in the project as transfer channel.

5. With [OK] the transfer is started.

System dependent you get a message that the projected system differs from target system. This message may be accepted by [OK].

Your project is transferred and may be executed in the CPU after

transfer.

5.11.3 Transfer via memory card

The memory card serves as external storage medium. There may be stored several projects and sub-directories on a memory card. Please regard that your current project is stored in the root directory and has one of the following file names:

n S7PROG.WLD n AUTOLOAD.WLD

1. Start the Siemens SIMATIC Manager with your project.

Create with ‘File è Memory Card File è New’ a new wld file.

3. Copy the blocks from the project blocks folder and the System data into the wld file.

4. Copy the wld file at a suited memory card. Plug this into your CPU and start it

again.

The transfer of the application program from the memory card into the CPU takes place depending on the file name after an overall reset or PowerON.

S7PROG.WLD is read from the memory card after overall reset.

AUTOLOAD.WLD is read from the memory card after PowerON.

The short flashing of the MC LED of the CPU indicates the transfer process. Please regard that your user memory serves for enough space for your user program, otherwise your user program is not completely loaded and the SF LED gets on.

Proceeding transfer via memory card

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Project transfer > Transfer via memory card

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5.12 Accessing the web server

There is a web server, which can be accessed via the IP address of the Ethernet PG/OP channel with an Internet browser. At the web page information about the CPU and its connected modules can be found. Ä Chapter 5.6 ‘Hardware configuration - Ethernet

PG/OP channel’ on page 49

It is assumed that there is a connection between PC and CPU with Internet browser via the Ethernet PG/OP channel. This may be tested by Ping to the IP address of the Ethernet PG/OP channel.

The web page is built dynamically and depends on the number of modules, which are connected to the CPU. The web page only shows information. The shown values cannot be changed.

CPU

Here order number, serial number and the version of firmware and hardware of the CPU are listed. [Expert View] takes you to the advanced "Expert View".

Info - Expert View

Runtime Information

Operation Mode STOP CPU: Status information

Mode Switch RUNP

System Time 01.09.09 00:35:30:812 CPU: Date, time

OB1-Cycle Time cur = 0us, min = 0us, max = 0us, avg =

0us

CPU: Cyclic time:

min = minimum

cur = current

max = maximum

avg = average

Interface Information

Access to the web server

Structure of the web page

Info - Overview

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Accessing the web server

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X2 (RS485/COM1) MPI Operating mode RS485

n MPI: MPI operation

X3 (RS485/COM2) DPM-async

n DPM: DP master operation or

PtP: point to point operation

X5 PG/OP Ethernet Port

X8 PROFINET Port

Card Information

Type SD

Product S/N 6BC34010

Size 493617152 bytes

Free 492355584 bytes

Active Feature Set Information

Status Memory Extension present

Memory Usage

LoadMem 0 / 8388608 Bytes CPU: Information to memory con-

figuration

Load memory, working memory (code/data)

WorkMemCode 0 / 2097152 Bytes

WorkMemData 0 / 2097152 Bytes

PG/OP Network Information

Device Name VIPA 317-4PN23 CPU Ethernet PG/OP channel:

IP Address 172.16.129.210 Address information

Subnet Mask 255.255.255.0

Gateway Address 172.16.129.210

MAC Address 00:20:D5:77:30:36

CPU Firmware Information

File System V1.0.2 Information for the support

PRODUCT VIPA 317-4PN23

V3.7.3

Px000283.pkg

Name, firmware version, package

HARDWARE V0.1.0.0

5679H-V20

HX000027.110

CPU: Information for the support

Bx000227 V6.6.29.255

Ax000086 V1.2.1.0

Ax000056 V0.2.2.0

fx000007.wld V1.1.8.0

ARM Processor Load

Last Value 0%

Maximum load 41%

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Data

Currently nothing is displayed here.

Parameter

Currently nothing is displayed here.

Here the IP address data of your Ethernet PG/OP channel are shown.

DP master

Info - Expert View

Internal Information Slot 201 VIPA 342-1DA70

Module Type 0xCB2C0010

Module Firmware Information

PRODUCT VIPA 342-1DA70

V3.3.5

Px000182.pkg

Name, firmware-version, package

BB000218 V5.3.0.0 Information for support

AB000068 V4.1.7.0

Runtime Information

Cycle Time cur = 0us, min = 65535000us, max =

0us, avg = 0us, cnt = 0

CPU cycle time:

min = minimal

cur = current

max = maximal

Info - Overview

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Accessing the web server

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PROFINET-IO controller

Info - Expert View

Internal Information CPU component: 31x-PN

Module Type 0xACDB0080 Information for support

Module Firmware Information

Bb000429 V1.1.0.12

AB000125 V0.1.0.3

PRODUCT VIPA 31x-PN

V1.1.2.0

Px000300.pkg

Hx000075 V1.1.0.0

Expert View ...

Hardware

Station type VIPA PN-CONTROLLER

Vendor ID 0x022B

Device ID 0x0101

Component Hx000075.122

Semi-product number 5686C-V22

Rack slot number 2

Flash

Package file name Px000300.pkg

Firmware file name Bb000429

Firmware version 1.1.19.255

System date/time

System date/time Tue Nov 10 05:27:54 2009

CPU load

Measurement cycle time 100 ms

Info - Overview

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Accessing the web server

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Hardware

Last value 5%

Average of last 10 values 5%

Minimum load 5%

Maximum load 97%

Network

IP address 172.16.129.210

Subnet mask 255.255.255.0

Gateway address 172.16.129.210

MAC address 00:20:D5:77:91:10

Link mode 100 Mbps - Full duplex

EMAC statistics

Frames Transmitted OK 119

Single Collision Frame 0

Multiple Collision Frame 0

Frames Received OK 231

Frame Check Sequence Error 0

Alignment Error 0

Deferred Transmission Frame 0

Late Collision Register 0

Excessive Collision 0

Carrier Sense Error 1

Transmit Underrun Error 0

Code Error 0

Excessive Length Error 0

Receive Jabber 0

Undersize Frame 0

SQE Test Error 1

Discard RX Frame 0

Queue overflow 0

Unexpected frame received 0

VBUS - Digital In/Out 16Info - Overview

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Accessing the web server

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Data - Input data

Offset Width Value (dec) Value (hex)

0 1 0 00

1 1 0 00

Data - Output data

Offset Width Value (dec) Value (hex) New Value

(hex)

0 1 0 00 00

1 1 0 00 00

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5.13 Operating modes

5.13.1 Overview

The CPU can be in one of 4 operating modes:

n Operating mode STOP n Operating mode START-UP n Operating mode RUN n Operating mode HOLD

Certain conditions in the operating modes START-UP and RUN require a specific reaction from the system program. In this case the application interface is often provided by a call to an organization block that was included specifically for this event.

n The application program is not processed. n If there has been a processing before, the values of counters, timers, flags and the

process image are retained during the transition to the STOP mode.

n Outputs are inhibited, i.e. all digital outputs are disabled. n RUN-LED off n STOP-LED on

n During the transition from STOP to RUN a call is issued to the start-up organization

block OB 100. The processing time for this OB is not monitored. The START-UP OB may issue calls to other blocks.

n All digital outputs are disabled during the START-UP, i.e. outputs are inhibited. n RUN-LED

blinks as soon as the OB 100 is operated and for at least 3s, even if the start-up time is shorter or the CPU gets to STOP due to an error. This indicates the start-up.

n STOP-LED off

When the CPU has completed the START-UP OB, it assumes the operating mode RUN.

n The application program in OB 1 is processed in a cycle. Under the control of alarms

other program sections can be included in the cycle.

n All timers and counters being started by the program are active and the process

image is updated with every cycle.

n The BASP-signal (outputs inhibited) is deactivated, i.e. all digital outputs are enabled. n RUN-LED on n STOP-LED off

The CPU offers up to 3 breakpoints to be defined for program diagnosis. Setting and deletion of breakpoints happens in your programming environment. As soon as a breakpoint is reached, you may process your program step by step.

For the usage of breakpoints, the following preconditions have to be fulfilled:

n Testing in single step mode is possible with STL. If necessary switch the view via

‘View è STL’ to STL.

n The block must be opened online and must not be protected.

Activate ‘View è Breakpoint Bar’.

2. Set the cursor to the command line where you want to insert a breakpoint.

Operating mode STOP

Operating mode STARTUP

Operating mode RUN

Operating mode HOLD

Precondition

Approach for working with breakpoints

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Set the breakpoint with ‘Debug è Set Breakpoint’.

The according command line is marked with a circle.

To activate the breakpoint click on ‘Debug è Breakpoints Active’.

The circle is changed to a filled circle.

5. Bring your CPU into RUN.

When the program reaches the breakpoint, your CPU switches to the state HOLD, the breakpoint is marked with an arrow and the register contents are monitored.

6. Now you may execute the program code step by step via ‘Debug

è Execute Next Statement’ or run the program until the next breakpoint via ‘Debug è Resume’.

Delete (all) breakpoints with the option ‘Debug è Delete All Breakpoints’.

n The RUN-LED blinks and the STOP-LED is on. n The execution of the code is stopped. No level is further executed. n All times are frozen. n The real-time clock runs is just running. n The outputs were disabled (BASP is activated). n Configured CP connections remain exist.

The usage of breakpoints is always possible. Switching to the operating mode test operation is not necessary.

With more than 2 breakpoints, a single step execution is not possible.

Behavior in operating state HOLD

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5.13.2 Function security

The CPUs include security mechanisms like a Watchdog (100ms) and a parameterizable cycle time surveillance (parameterizable min. 1ms) that stop res. execute a RESET at the CPU in case of an error and set it into a defined STOP state. The VIPA CPUs are developed function secure and have the following system properties:

Event concerns Effect

RUN ® STOP general BASP (Befehls-Ausgabe-Sperre, i.e. command output

lock) is set.

central digital outputs The outputs are disabled.

central analog outputs The outputs are disabled.

n Voltage outputs issue 0V n Current outputs 0...20mA issue 0mA n Current outputs 4...20mA issue 4mA

If configured also substitute values may be issued.

decentral outputs Same behavior as the central digital/analog outputs.

decentral inputs The inputs are cyclically be read by the decentralized

station and the recent values are put at disposal.

STOP ® RUN res. PowerON general First the PII is deleted, then OB 100 is called. After

the execution of the OB, the BASP is reset and the cycle starts with: Delete PIO ® Read PII ® OB 1.

decentral inputs The inputs are once be read by the decentralized sta-

tion and the recent values are put at disposal.

RUN general The program execution happens cyclically and can

therefore be foreseen: Read PII ® OB 1 ® Write PIO.

PII: Process image inputs, PIO: Process image outputs

VIPA System 300S

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5.14 Overall reset

During the overall reset the entire user memory is erased. Data located in the memory card is not affected. If you have assigned IP address data to your PROFINET IO controller, these remain until there is a new PowerON.

You have 2 options to initiate an overall reset:

n initiate the overall reset by means of the operating mode switch n initiate the overall reset by means of the Siemens SIMATIC Manager

You should always issue an overall reset to your CPU before loading an application program into your CPU to ensure that all blocks have been cleared from the CPU.

Proceeding

1. Your CPU must be in STOP mode. For this switch the operating mode switch of the CPU to STOP.

The ST LED is on.

2. Switch the operating mode switch to MR position for about 3 seconds.

The ST LED changes from blinking to permanently on.

3. Place the operating mode switch in the position STOP and switch it to MR and quickly back to STOP within a period of less than 3 seconds.

The overall reset is carried out. Here the ST LED flashes.

4. The overall reset has been completed when the ST LED is permanently on.

For the following proceeding you must be online connected to your CPU.

1. For an overall reset the CPU must be switched to STOP state. You may place the CPU in STOP by the menu command ‘PLC è Operating mode’.

2. You may request the overall reset by means of the menu command ‘PLC

è Clean/Reset’.

A dialog window opens. Here you can bring your CPU in STOP state, if not already done, and start the overall reset. During the overall reset procedure the ST LED blinks. When the ST LED is on permanently the overall reset procedure has been completed.

If there is a project S7PROG.WLD on the memory card, the CPU attempts to reload this project from memory card. ® The MC LED is on. When the reload has been completed the LED expires. The operating mode of the CPU will be STOP respectively RUN, depending on the position of the operating mode switch.

The Reset to factory setting deletes completely the internal RAM of the CPU and resets this to delivery state. Please regard that the MPI address is also set back to default 2!

Chapter 5.16 ‘Reset to factory settings’ on page 76

Overview

Overall reset by means of the operating mode switch

Overall reset by means of the Siemens SIMATIC Manager

Automatic reload

Reset to factory setting

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Overall reset

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5.15 Firmware update

n There is the opportunity to execute a firmware update for the CPU and its compo-

nents via memory card. For this an accordingly prepared memory card must be in the CPU during the startup.

n So a firmware files can be recognized and assigned with startup, a pkg file name is

reserved for each updateable component an hardware release, which begins with "px" and differs in a number with six digits. The pkg file name of every updateable component may be found at a label right down the front flap of the module.

n After PowerON and CPU STOP the CPU checks if there is a *.pkg file on the memory

card. If this firmware version is different to the existing firmware version, this is indicated by blinking of the LEDs and the firmware may be installed by an update request.

The latest firmware versions are to be found in the service area at www.vipa.com. For example the following files are necessary for the firmware update of the CPU 317-4PN23 and its components with hardware release 01:

n 317-4PN23, Hardware release 01: Px000283.pkg n PROFIBUS DP Master: Px000182.pkg n PROFINET IO controller: Px000180.pkg

CAUTION!

– When installing a new firmware you have to be extremely careful.

Under certain circumstances you may destroy the CPU, for example if the voltage supply is interrupted during transfer or if the firmware file is defective. In this case, please call the VIPA-Hotline!

– Please regard that the version of the update firmware has to be dif-

ferent from the existing firmware otherwise no update is executed.

The CPU has an integrated website that monitors information about firmware version of the SPEED7 components. The Ethernet PG/OP channel provides the access to this web site. The CPU has an integrated website that monitors information about firmware version of the SPEED7 components. The Ethernet PG/OP channel provides the access to this web site. ‘PLC è Assign Ethernet Address’. After that you may access the PG/OP channel with a web browser via the IP address of the project engineering.

Chapter

5.12 ‘Accessing the web server’ on page 64

n Go to www.vipa.com n Click on ‘Service è Download è Firmware’.

Overview

Latest firmware at www.vipa.com

Display the firmware version of the SPEED7 system via Web Site

Load firmware and transfer it to memory card

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n Navigate via ‘System 300S è CPU’ to your CPU and download the zip file to your

PC.

n Extract the zip file and copy the extracted pkg files to your memory card.

CAUTION!

With a firmware update an overall reset is automatically executed. If your program is only available in the load memory of the CPU it is deleted! Save your program before executing a firmware update! After the firmware update you should execute a Ä Chapter 5.16 ‘Reset to factory settings’ on page 76.

1. Switch the operating mode switch of your CPU in position STOP.

2. Turn off the power supply.

3. Plug the memory card with the firmware files into the CPU. Please take care of the

correct plug-in direction of the memory card.

4. Turn on the power supply.

After a short boot-up time, the alternate blinking of the LEDs SF and FC shows that at least a more current firmware file was found at the memory card.

5. You start the transfer of the firmware as soon as you tip the operating mode switch downwards to MR within 10s and then leave the switch in STOP position.

During the update process, the LEDs SF and FC are alternately blinking and the MC LED is on. This may last several minutes.

6. The update is successful finished when the LEDs PW, ST, SF, FC and MC are on. If they are blinking fast, an error occurred.

7. Turn power OFF and ON.

Now it is checked by the CPU, whether further firmware updates are to be executed. If so, again the LEDs SF and FC flash after a short start-up period. Continue with step 5. If the LEDs do not flash, the firmware update is finished.

8. Now execute a Reset to factory setting. After that the CPU is ready for duty.

Chapter 5.16 ‘Reset to factory settings’ on page 76

Transfer firmware from memory card into CPU

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5.16 Reset to factory settings

n With the following proceeding the internal RAM of the CPU is completely deleted and

the CPU is reset to delivery state.

n Please regard that the MPI address is also reset to default 2 and the IP address of

the Ethernet PG/OP channel is reset to 0.0.0.0!

n A factory reset may also be executed by the command FACTORY_RESET.

Chapter 5.19 ‘CMD - auto commands’ on page 80

1. Switch the CPU to STOP.

2. Push the operating mode switch down to position MR for 30 seconds. Here the ST

LED blinks. After a few seconds the ST LED changes to static light. Now the ST LED changes between static light and blinking. Start here to count the static light of the ST LED.

3. After the 6. Static light release the operating mode switch and tip it downwards to MR.

For the confirmation of the resetting procedure the green RN LED lights up once. This means that the RAM was deleted completely.

If the ST LED is on, only an overall reset has been performed and the reset to factory setting has been failed. In this case you can repeat the procedure. A factory reset can only be executed if the ST LED has static light for exact 6 times.

4. The update is successful finished when the LEDs PW, ST, SF, FC and MC are on.

5. Turn power OFF and ON.

After a firmware update of the CPU you always should execute a factory reset.

Proceeding

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5.17 Deployment storage media - MMC, MCC

At this slot the following storage media can be plugged:

n SD respectively MMC (Multimedia card)

– External memory card for programs and firmware.

n MCC - Memory configuration card

– External memory card (MMC) for programs and firmware with the possibility to

unlock additional work memory. – The additional memory can be purchased separately. – To activate the corresponding card is to be installed and an overall reset is to be

established.

Chapter 5.14 ‘Overall reset’ on page 73

To avoid malfunctions, you should use memory cards of VIPA. These correspond to the industrial standard. A list of the currently available memory cards can be found at www.vipa.com

You can cause the CPU to load a project automatically respectively to execute a command file by means of pre-defined file names.

n The MMCs of VIPA are pre-formatted with the PC format FAT and can be accessed

via a card reader.

n After PowerON respectively an overall reset the CPU checks, if there is a memory

card plugged with data valid for the CPU.

n Push the memory card into the slot until it snaps in leaded by a spring mechanism.

This ensures contacting. By sliding down the sliding mechanism, a just installed memory card can be protected against drop out.

To remove, slide the sliding mechanism up again and push the storage media against the spring pressure until it is unlocked with a click.

CAUTION!

If the media was already unlocked by the spring mechanism, with shifting the sliding mechanism, a just installed memory card can jump out of the slot!

Please note that the write protection function of SD cards is not evaluated!

n The MCC is a MMC with the possibility to unlock additional work memory. n By plugging the MCC into the MCC slot and then an overall reset the according

memory expansion is released. There may only one memory expansion be activated at one time.

n On the MCC there is the file memory.key. This file may not be altered or deleted.

Overview

MMC

MCC

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n You may use the MCC also as "normal" MMC for storing your project. n If the memory expansion on the MCC exceeds the maximum extendible memory

range of the CPU, the maximum possible memory of the CPU is automatically used.

n You may determine the recent memory extension and the remaining time after pulling

the MCC via the integrated web page.

Chapter 5.12 ‘Accessing the web server’

on page 64

n When the MCC memory configuration has been taken over you may find the diagnos-

tics entry 0xE400 in the diagnostics buffer of the CPU.

n After pulling the MCC the entry 0xE401 appears in the diagnostics buffer, the SF-LED

is on and after 72 hours the CPU switches to STOP. A reboot is only possible after plugging-in the MCC again or after an overall reset.

n After re-plugging the MCC, the SF LED extinguishes and 0xE400 is entered into the

diagnostics buffer. You may reset the memory configuration of your CPU to the initial status at any time by executing an overall reset without MCC.

CAUTION!

Please regard that the MCC must remain plugged when you’ve executed the memory expansion at the CPU. Otherwise the CPU switches to STOP after 72 hours. The MCC cannot be exchanged with a MCC of the same memory configuration. The activation code is fixed to the MCC by means of an unique serial number. Here the functionality as an external memory card is not affected.

To the following times an access takes place on a storage medium:

After overall reset

n The CPU checks if a MCC is plugged. If so, the according additional memory is

unlocked.

n The CPU checks whether a project S7PROG.WLD exists. If so, it is automatically

loaded.

After PowerON

n The CPU checks whether a project AUTOLOAD.WLD exists. If so, an overall reset is

executed and the project is automatically loaded.

n The CPU checks whether a command file with the name VIPA_CMD.MMC exists. If

so the command file is loaded and the commands are executed.

n After PowerON and CPU STOP the CPU checks if there is a *.pkg file (firmware file).

If so, this is shown by the CPU by blinking LEDs and the firmware may be installed by an update request.

Chapter 5.15 ‘Firmware update’ on page 74

Once in STOP state

n If a memory card is plugged, which contains a command file VIPA_CMD.MMC, the

command file is loaded and the containing instructions are executed.

The FC/SFC 208 ... FC/SFC 215 and FC/SFC 195 allow you to include the memory card access into your user application. More can be found in the manual operation list (HB00_OPL_SP7) of your CPU.

Accessing the storage medium

VIPA System 300S

Deployment CPU 317-4PN23

Deployment storage media - MMC, MCC

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5.18 Extended know-how protection

Besides the "standard" Know-how protection the SPEED7 CPUs from VIPA provide an "extended" know-how protection that serves a secure block protection for accesses of 3. persons.

n Standard protection

– The standard protection from Siemens transfers also protected blocks to the PG

but their content is not displayed. – But with according manipulation the know-how protection is not guaranteed.

n Extended protection

– The "extended" know-how protection developed by VIPA offers the opportunity to

store blocks permanently in the CPU. – With the "extended" protection you transfer the protected blocks to a memory card

into a WLD-file named protect.wld. – By plugging the memory card and then an overall reset the blocks in the pro-

tect.wld are permanently stored in the CPU. – You may protect OBs, FBs and FCs. – When back-reading the protected blocks into the PG, exclusively the block header

are loaded. The block code that is to be protected remains in the CPU and cannot

be read.

Create a new wld file in your project engineering tool with ‘File è Memory Card file è New’.

2. Rename the wld file to "protect.wld".

3. Transfer the according blocks into the file by dragging them with the mouse from

the project to the file window of protect.wld.

4. Transfer the file protect.wld to a memory card.

Plug the memory card into the CPU and execute an overall reset. Ä Chapter 5.14 ‘Overall reset’ on page 73

The overall reset stores the blocks in protect.wld permanently in the CPU protected from accesses of 3. persons.

Protected blocks are overwritten by a new protect.wld. Using a PG 3. persons may access protected blocks but only the block header is transferred to the PG. The block code that is to be protected remains in the CPU and cannot be read.

Protected blocks in the RAM of the CPU may be substituted at any time by blocks with the same name. This change remains up to next overall reset. Protected blocks may permanently be overwritten only if these are deleted at the protect.wld before. By transferring an empty protect.wld from the memory card with an overall reset, you may delete all protected blocks in the CPU.

Due to the fact that reading of a "protected" block from the CPU monitors no symbol labels it is convenient to provide the "block covers" for the end user. For this, create a project of all protected blocks. Delete all networks in the blocks so that these only contain the variable definitions in the according symbolism.

Overview

Protect blocks with protect.wld

Protection behaviour

Change respectively delete protected blocks

Usage of protected blocks

VIPA System 300S

Deployment CPU 317-4PN23

Extended know-how protection

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5.19 CMD - auto commands

A command file at a memory card is automatically executed under the following conditions:

n CPU is in STOP and memory card is stuck n After each PowerON

The command file is a text file, which consists of a command sequence to be stored as vipa_cmd.mmc in the root directory of the memory card. The file has to be started by CMD_START as 1. command, followed by the desired commands (no other text) and must be finished by CMD_END as last command.

Text after the last command CMD_END e.g. comments is permissible, because this is ignored. As soon as the command file is recognized and executed each action is stored at the memory card in the log file logfile.txt. In addition for each executed command a diagnostics entry may be found in the diagnostics buffer.

Please regard the command sequence is to be started with CMD_START and ended with CMD_END.

Command Description Diagnostics

entry

CMD_START In the first line CMD_START is to be located. 0xE801

There is a diagnostic entry if CMD_START is missing 0xE8FE

WAIT1SECOND Waits about 1 second. 0xE803

WEBPAGE The current web page of the CPU is stored at the memory card as"

webpage.htm".

0xE804

LOAD_PROJECT The function "Overall reset and reload from MMC" is executed. The

wld file located after the command is loaded else "s7prog.wld" is loaded.

0xE805

SAVE_PROJECT The recent project (blocks and hardware configuration) is stored as

"s7prog.wld" at the memory card. If the file just exists it is renamed to "s7prog.old". If your CPU is password protected so you have to add this as parameter. Otherwise there is no project written. Example: SAVE_PROJECT password

0xE806

FACTORY_RESET Executes "factory reset". 0xE807

DIAGBUF The current diagnostics buffer of the CPU is stored as "diagbuff.txt"

at the memory card.

0xE80B

SET_NETWORK IP parameters for Ethernet PG/OP channel may be set by means of

this command. The IP parameters are to be given in the order IP address, subnet mask and gateway in the format x.x.x.x each separated by a comma. Enter the IP address if there is no gateway used.

0xE80E

SET_MPI_ADDRESS This lets you adjust the MPI interface on the value that follows the

command. The setting is retained even after power cycle, firmware update or battery failure. With Ä Chapter 5.16 ‘Reset to factory settings’ on page 76 you get the default setting.

0xE814

CMD_END In the last line CMD_END is to be located. 0xE802

The structure of a command file is shown in the following. The corresponding diagnostics entry is put in parenthesizes.

Overview

Command file

Commands

Examples

VIPA System 300S

Deployment CPU 317-4PN23

CMD - auto commands

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Example 1

CMD_START

Marks the start of the command sequence (0xE801)

LOAD_PROJECT proj.wld

Execute an overall reset and load "proj.wld" (0xE805)

WAIT1SECOND

Wait ca. 1s (0xE803)

WEBPAGE

Store web page as "webpage.htm" (0xE804)

DIAGBUF

Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B)

CMD_END

Marks the end of the command sequence (0xE802)

... arbitrary text ...

Text after the command CMD_END is not evaluated.

Example 2

CMD_START

Marks the start of the command sequence (0xE801)

LOAD_PROJECT proj2.wld

Execute an overall reset and load "proj2.wld" (0xE805)

WAIT1SECOND

Wait ca. 1s (0xE803)

WAIT1SECOND

Wait ca. 1s (0xE803)

IP parameter (0xE80E)

SET_NETWORK 172.16.129.210,255.255.224.0,172.16.129.210

WAIT1SECOND

Wait ca. 1s (0xE803)

WAIT1SECOND

Wait ca. 1s (0xE803)

SET_MPI_ADDRESS 4

MPI address 4 is set (0xE814)

WEBPAGE

Store web page as "webpage.htm" (0xE804)

DIAGBUF

Store diagnostics buffer of the CPU as "diagbuff.txt" (0xE80B)

CMD_END

Marks the end of the command sequence (0xE802)

... arbitrary text ...

Text after the command CMD_END is not evaluated.

The parameters IP address, subnet mask and gateway may be received from the system administrator.

Enter the IP address if there is no gateway used.

5.20 Diagnostic entries

Appendix A ‘System specific event IDs’ on page 167

n You may read the diagnostics buffer of the CPU via the Siemens SIMATIC Manager.

Besides of the standard entries in the diagnostics buffer, the VIPA CPUs support some additional specific entries as Event-IDs.

n To monitor the diagnostics entries you choose in the Siemens SIMATIC manager

‘PLC è Module information’. Via the register "Diagnostics Buffer" you reach the diagnostics window.

n The current content of the diagnostic buffer is stored at the memory card by means of

the CMD DIAGBUF.

Chapter 5.19 ‘CMD - auto commands’ on page 80

n The diagnostic is independent from the operating mode of the CPU. You may store a

max. of 100 diagnostic entries in the CPU.

Accessing diagnostic data

VIPA System 300S

Deployment CPU 317-4PN23

Diagnostic entries

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5.21 Control and monitoring of variables with test functions

n For troubleshooting purposes and to display the status of certain variables you can

access certain test functions via the menu item Debug of the Siemens SIMATIC Manager.

n The status of the operands and the RLO can be displayed by means of the test func-

tion ‘Debug è Monitor’.

n The status of the operands and the RLO can be displayed by means of the test func-

tion ‘PLC è Monitor/Modify Variables’.

n This test function displays the current status and the RLO of the different operands

while the program is being executed.

n It is also possible to enter corrections to the program. n The processing of the states may be interrupted by means of jump commands or by

timer and process-related interrupts.

n At the breakpoint the CPU stops collecting data for the status display and instead of

the required data it only provides the PG with data containing the value 0.

n The interruption of the processing of statuses does not change the execution of the

program. It only shows that the data displayed is no longer valid.

When using the test function "Monitor" the PLC must be in RUN mode!

For this reason, jumps or time and process alarms can result in the value displayed during program execution remaining at 0 for the items below:

n the result of the logical operation RLO n Status / ACCU 1 n ACCU 2 n Condition byte n absolute memory address SAZ. In this case SAZ is followed by a "?".

Overview

‘Debug è Monitor’

VIPA System 300S

Deployment CPU 317-4PN23

Control and monitoring of variables with test functions

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This test function returns the condition of a selected operand (inputs, outputs, flags, data word, counters or timers) at the end of program execution. This information is obtained from the corresponding area of the selected operands. During the controlling of variables respectively in operating mode STOP the input area is directly read. Otherwise only the process image of the selected operands is displayed.

n Control of outputs

– Serves to check the wiring and proper operation of output modules. – If the CPU is in RUN mode, so only outputs can be controlled , which are not con-

trolled by the user program. Otherwise values would be instantly overwritten. – If the CPU is in STOP - even without user program, so you need to disable the

command output lock BASP ( ‘Enable PO’ ). Then you can control the outputs

arbitrarily

n Controlling variables

– The following variables may be modified: I, Q, M, T, C and D. – The process image of binary and digital operands is modified independently of the

operating mode of the CPU. – When the operating mode is RUN the program is executed with the modified

process variable. When the program continues they may, however, be modified

again without notification.

n Forcing variables

– You can pre-set individual variables of a user program with fixed values so that

they can not be changed or overwritten by the user program of the CPU. – By pre-setting of variables with fixed values, you can set certain situations for

your user program and thus test the programmed functions.

CAUTION!

Please consider that controlling of output values represents a potentially dangerous condition.

Even after a power cycle forced variables remain forced with its value, until the force function is disabled.

These functions should only be used for test purposes respectively for troubleshooting. More information about the usage of these functions may be found in the manual of your configuration tool.

‘PLC è Monitor/Modify Variables’

VIPA System 300S

Deployment CPU 317-4PN23

Control and monitoring of variables with test functions

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6 Deployment PtP communication

VIPA System 300S

Deployment PtP communication

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6.1 Fast introduction

The CPU has a PROFIBUS/PtP interface with a fix pinout. After an overall reset the interface is deactivated. By appropriate configuration the PtP function (point to point) can be enabled:

n PtP functionality

– Using the PtP functionality the RS485 interface is allowed to connect via serial

point-to-point connection to different source res. target systems. – The activation of the PtP functionality happens by embedding the

SPEEDBUS.GSD from VIPA in the hardware catalog. After the installation the

CPU may be configured in a PROFIBUS master system and here the interface

may be switched to PtP communication.

The protocols res. procedures ASCII, STX/ETX, 3964R, USS and Modbus are supported.

The parametrization of the serial interface happens during runtime using the FC/SFC 216 (SER_CFG). For this you have to store the parameters in a DB for all protocols except ASCII.

The FCs/SFCs are controlling the communication. Send takes place via FC/SFC 217 (SER_SND) and receive via FC/SFC 218 (SER_RCV). The repeated call of the FC/SFC 217 SER_SND delivers a return value for 3964R, USS and Modbus via RetVal that contains, among other things, recent information about the acknowledgement of the partner station. The protocols USS and Modbus allow to evaluate the receipt telegram by calling the FC/SFC 218 SER_RCV after SER_SND. The FCs/SFCs are included in the consignment of the CPU.

The following FCs/SFCs are used for the serial communication:

FC/SFC Description

FC/SFC 216 SER_CFG RS485 parameterize

FC/SFC 217 SER_SND RS485 send

FC/SFC 218 SER_RCV RS485 receive

More information about the usage of these blocks may be found in the manual "SPEED7 Operation List" from VIPA.

General

Protocols

Parametrization

Communication

Overview FCs/SFCs for serial communication

VIPA System 300S

Deployment PtP communication

Fast introduction

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6.2 Principle of the data transfer

The data transfer is handled during runtime by using FC/SFCs. The principle of data transfer is the same for all protocols and is shortly illustrated in the following.

n Data, which are written into the according data channel by the CPU, is stored in a

FIFO send buffer (first in first out) with a size of 2x1024byte and then put out via the interface.

n When the interface receives data, this is stored in a FIFO receive buffer with a size of

2x1024byte and can there be read by the CPU.

n If the data is transferred via a protocol, the embedding of the data to the according

protocol happens automatically.

n In opposite to ASCII and STX/ETX, the protocols 3964R, USS and Modbus require

the acknowledgement of the partner.

n An additional call of the FC/SFC 217 SER_SND causes a return value in RetVal that

includes among others recent information about the acknowledgement of the partner.

n Further on for USS and Modbus after a SER_SND the acknowledgement telegram

must be evaluated by a call of the FC/SFC 218 SER_RCV.

1 Program 2 Protocol 3 FIFO buffer 4 Interface

6.3 Deployment of RS485 interface for PtP

Per default, the RS485 interface is deactivated. Via hardware configuration the RS485 interfaces may be switched to PtP operation (point to point) via the parameter Function RS485 of the Properties.

RS485 PtP communication

Activate RS485 to PtP operation

Requirements

VIPA System 300S

Deployment PtP communication

Deployment of RS485 interface for PtP

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The GSD (Geräte-Stamm-Datei) is online available in the following language versions. Further language versions are available on inquires:

Name Language

SPEEDBUS.GSD German (default)

SPEEDBUS.GSG German

SPEEDBUS.GSE English

The GSD files may be found at www.vipa.com at the service area.

The integration of the SPEEDBUS.GSD takes place with the following proceeding:

1. Go to the service area of www.vipa.com.

Load from the download area at ‘Config files è PROFIBUS’ the according file for your System 300S.

3. Extract the file to your work directory.

4. Start the hardware configurator from Siemens.

5. Close every project.

Select ‘Options è Install new GSD-file’.

7. Navigate to the directory VIPA_System_300S and select SPEEDBUS.GSD an.

The SPEED7 CPUs and modules of the System 300S from VIPA may now be found in the hardware catalog at PROFIBUS-DP / Additional field devices / I/O / VIPA_SPEEDBUS.

The embedding of the CPU 317-4PN23 happens by means of a virtual PROFIBUS master system with the following approach:

Perform a hardware configuration for the CPU

Chapter 5.4 ‘Hardware configura-

tion - CPU’ on page 47

2. Configure always as last module a Siemens DP master CP 342-5 (342-5DA02 V5.0). Connect and parameterize it at operation mode "DP-Master".

3. Connect the slave system "VIPA_SPEEDbus". After installing the SPEEDBUS.GSD this may be found in the hardware catalog at PROFIBUS DP / Additional field devices / I/O / VIPA / VIPA_SPEEDBUS.

4. For the slave system set the PROFIBUS address 100.

5. Configure at slot 0 the VIPA CPU 317-4PN23 of the hardware catalog from

VIPA_SPEEDbus.

6. By double clicking the placed CPU 317-4PN23 the properties dialog of the CPU may be opened.

As soon as the project is transferred together with the PLC user program to the CPU, the parameters will be taken after start-up.

The hardware configuration, which is shown here, is only required, if you want to customize the VIPA specific parameters.

Installation of the SPEEDBUS.GSD

Proceeding

VIPA System 300S

Deployment PtP communication

Deployment of RS485 interface for PtP

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1. By double clicking the CPU 317-4PN23 placed in the slave system the properties dialog of the CPU may be opened.

2. Switch the Parameter ‘Function RS485 X3’ to ‘PtP’ .

n Logical states represented by voltage differences between the two cores of a twisted

pair cable

n Serial bus connection in two-wire technology using half duplex mode n Data communications up to a max. distance of 500m n Data communication rate up to 115.2kbaud

9pin SubD jack

Pin RS485

1 n.c.

2 M24V

3 RxD/TxD-P (Line B)

4 RTS

5 M5V

6 P5V

7 P24V

8 RxD/TxD-N (Line A)

9 n.c.

Setting PtP parameters

Properties RS485

RS485

VIPA System 300S

Deployment PtP communication

Deployment of RS485 interface for PtP

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1 RS485 interface 2 Periphery

*) For traffic-free data transfer use a terminating resistor of approximately 120W .

6.4 Parametrization

6.4.1 FC/SFC 216 - SER_CFG - Parametrization PtP

The parametrization happens during runtime deploying the FC/SFC 216 (SER_CFG). You have to store the parameters for STX/ETX, 3964R, USS and Modbus in a DB.

6.5 Communication

6.5.1 FC/SFC 217 - SER_SND - Send to PtP

This block sends data via the serial interface. The repeated call of the FC/SFC 217 SER_SND delivers a return value for 3964R, USS and Modbus via RETVAL that contains, among other things, recent information about the acknowledgement of the partner station. The protocols USS and Modbus require to evaluate the receipt telegram by calling the FC/SFC 218 SER_RCV after SER_SND.

Connection

VIPA System 300S

Deployment PtP communication

Communication > FC/SFC 217 - SER_SND - Send to PtP

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6.5.2 FC/SFC 218 - SER_RCV - Receive from PtP

This block receives data via the serial interface. Using the FC/SFC 218 SER_RCV after SER_SND with the protocols USS and Modbus the acknowledgement telegram can be read.

More information about the usage of these blocks may be found in the manual "SPEED7 Operation List" from VIPA.

6.6 Protocols and procedures

The CPU supports the following protocols and procedures:

n ASCII communication n STX/ETX n 3964R n USS n Modbus

ASCII data communication is one of the simple forms of data exchange. Incoming characters are transferred 1 to 1. At ASCII, with every cycle the read FC/SFC is used to store the data that is in the buffer at request time in a parametrized receive data block. If a telegram is spread over various cycles, the data is overwritten. There is no reception acknowledgement. The communication procedure has to be controlled by the concerning user application. For this you can use the FB 1 - Receive_ASCII.

More information about the usage of this block may be found in the manual "SPEED7 Operation List" from VIPA.

STX/ETX is a simple protocol with start and end ID, where STX stands for Start of Text and ETX for End of Text.

n Any data transferred from the periphery must be preceded by a Start followed by the

data characters and the end character. Depending of the byte width the following ASCII characters can be transferred: 5bit: not allowed: 6bit: 20...3Fh, 7bit: 20...7Fh, 8bit: 20...FFh.

n The effective data, which includes all the characters between Start and End are trans-

ferred to the CPU when the End has been received.

n When data is send from the CPU to a peripheral device, any user data is handed to

the FC/SFC 217 (SER_SND) and is transferred with added Start- and End-ID to the communication partner.

n You may work with 1, 2 or no Start- and with 1, 2 or no End-ID. n If no End-ID is defined, all read characters are transferred to the CPU after a parame-

terizable character delay time (Timeout).

As Start-res. End-ID all Hex values from 01h to 1Fh are permissible. Characters above 1Fh are ignored. In the user data, characters below 20h are not allowed and may cause errors. The number of Start- and End-IDs may be different (1 Start, 2 End res. 2 Start, 1 End or other combinations). For not used start and end characters you have to enter FFh in the hardware configuration.

Message structure:

Overview

ASCII

STX/ETX

VIPA System 300S

Deployment PtP communication

Protocols and procedures

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The 3964R procedure controls the data transfer of a point-to-point link between the CPU and a communication partner. The procedure adds control characters to the message data during data transfer. These control characters may be used by the communication partner to verify the complete and error free receipt.

The procedure employs the following control characters:

n STX: Start of Text n DLE: Data Link Escape n ETX: End of Text n BCC: Block Check Character n NAK: Negative Acknowledge

You may transfer a maximum of 255byte per message.

Procedure

When a DLE is transferred as part of the information it is repeated to distinguish between data characters and DLE control characters that are used to establish and to terminate the connection (DLE duplication). The DLE duplication is reversed in the receiving station.

The 3964R procedure requires that a lower priority is assigned to the communication partner. When communication partners issue simultaneous send commands, the station with the lower priority will delay its send command.

The USS protocol (Universelle serielle Schnittstelle = universal serial interface) is a serial transfer protocol defined by Siemens for the drive and system components. This allows to build-up a serial bus connection between a superordinated master and several slave systems. The USS protocol enables a time cyclic telegram traffic by presetting a fix telegram length.

The following features characterize the USS protocol:

n Multi point connection n Master slave access procedure n Single master system

3964

USS

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Deployment PtP communication

Protocols and procedures

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n Max. 32 participants n Simple and secure telegram frame

It is essential:

n You may connect 1 master and max. 31 slaves at the bus n The single slaves are addressed by the master via an address sign in the telegram. n The communication happens exclusively in half-duplex operation. n After a send command, the acknowledgement telegram must be read by a call of the

FC/SFC 218 SER_RCV.

The telegrams for send and receive have the following structure:

Master slave telegram

STX LGE ADR PKE IND PWE STW HSW BCC

02h H L H L H L H L H L

Slave master telegram

STX LGE ADR PKE IND PWE ZSW HIW BCC

02h H L H L H L H L H L

with

STX - Start sign

STW - Control word

LGE - Telegram length

ZSW - State word

ADR - Address

HSW - Main set value

PKE - Parameter ID

HIW - Main effective value

IND - Index

BCC - Block Check Character

PWE - Parameter value

A request can be directed to a certain slave ore be send to all slaves as broadcast message. For the identification of a broadcast message you have to set bit 5 to 1 in the ADR byte. Here the slave addr. (bit 0 ... 4) is ignored. In opposite to a "normal" send command, the broadcast does not require a telegram evaluation via FC/SFC 218 SER_RCV. Only write commands may be sent as broadcast.

n The Modbus protocol is a communication protocol that fixes a hierarchic structure

with one master and several slaves.

n Physically, Modbus works with a serial half-duplex connection. There are no bus con-

flicts occurring, because the master can only communicate with one slave at a time.

n After a request from the master, this waits for a preset delay time for an answer of the

slave. During the delay time, communication with other slaves is not possible.

Broadcast with set bit 5 in ADR byte

Modbus

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Deployment PtP communication

Protocols and procedures

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n After a send command, the acknowledgement telegram must be read by a call of the

FC/SFC 218 SER_RCV.

n The request telegrams send by the master and the respond telegrams of a slave have

the following structure:

Telegram structure

Start sign Slave address Function Code Data Flow control End sign

n A request can be directed to a special slave or at all slaves as broadcast message. n To mark a broadcast message, the slave address 0 is used. n In opposite to a "normal" send command, the broadcast does not require a telegram

evaluation via FC/SFC 218 SER_RCV.

n Only write commands may be sent as broadcast.

Modbus offers 2 different transfer modes. The mode selection happens during runtime by using the FC/SFC 216 SER_CFG.

n ASCII mode: Every byte is transferred in the 2 sign ASCII code. The data are marked

with a start and an end sign. This causes a transparent but slow transfer.

n RTU mode: Every byte is transferred as one character. This enables a higher data

pass through as the ASCII mode. Instead of start and end sign, a time control is used.

The following Modbus Protocols are supported by the RS485 interface:

n Modbus RTU Master n Modbus ASCII Master

Broadcast with slave address = 0

ASCII, RTU mode

Supported Modbus protocols

VIPA System 300S

Deployment PtP communication

Protocols and procedures

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6.7 Modbus - Function codes

Modbus has some naming conventions:

n Modbus differentiates between bit and word access; bits = "Coils" and words = "Reg-

ister".

n Bit inputs are referred to as "Input-Status" and bit outputs as "Coil-Status". n word inputs are referred to as "Input-Register" and word outputs as "Holding-Reg-

ister".

Normally the access at Modbus happens by means of the ranges 0x, 1x, 3x and 4x.

0x and 1x gives you access to digital bit areas and 3x and 4x to analog word areas.

For the CPs from VIPA is not differentiating digital and analog data, the following assignment is valid:

0x - Bit area for master output data

Access via function code 01h, 05h, 0Fh

1x - Bit area for master input data

Access via function code 02h

3x - word area for master input data

Access via function code 04h

4x - word area for master output data

Access via function code 03h, 06h, 10h

A description of the function codes follows below.

With the following Modbus function codes a Modbus master can access a Modbus slave: With the following Modbus function codes a Modbus master can access a Modbus slave. The description always takes place from the point of view of the master:

Naming convention

Range definitions

Overview

VIPA System 300S

Deployment PtP communication

Modbus - Function codes

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Code Command Description

01h Read n bits Read n bits of master output area 0x

02h Read n bits Read n bits of master input area 1x

03h Read n words Read n words of master output area 4x

04h Read n words Read n words master input area 3x

05h Write 1 bit Write 1 bit to master output area 0x

06h Write 1 word Write 1 word to master output area 4x

0Fh Write n bits Write n bits to master output area 0x

10h Write n words Write n words to master output area 4x

Point of View of "Input" and "Output" data

The description always takes place from the point of view of the master. Here data, which were sent from master to slave, up to their target are designated as "output" data (OUT) and contrary slave data received by the master were designated as "input" data (IN).

If the slave announces an error, the function code is send back with an "ORed" 80h.

Without an error, the function code is sent back.

Slave answer: Function code OR 80h ® Error

Function code ® OK

1 word

High-byte Low-byte

The shown check sums CRC at RTU and LRC at ASCII mode are automatically added to every telegram. They are not shown in the data block.

Code 01h: Read n bits of master output area 0x

Code 02h: Read n bits of master input area 1x

Respond of the slave

Byte sequence in a word

Check sum CRC, RTU, LRC

Read n bits 01h, 02h

VIPA System 300S

Deployment PtP communication

Modbus - Function codes

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Command telegram

Slave address Function code Address 1. bit Number of bits Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Respond telegram

Slave address Function code Number of

read bytes

Data 1. byte Data 2. byte ... Check sum

CRC/LRC

1byte 1byte 1byte 1byte 1byte 1word

max. 250byte

03h: Read n words of master output area 4x

04h: Read n words master input area 3x

Command telegram

Slave address Function code Address 1. bit Number of words Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Respond telegram

Slave address Function code Number of

read bytes

Data 1. word Data 2. word ... Check sum

CRC/LRC

1byte 1byte 1byte 1word 1word 1word

max. 125words

Code 05h: Write 1 bit to master output area 0x

A status change is via "Status bit" with following values:

"Status bit" = 0000h ® Bit = 0

"Status bit" = FF00h ® Bit = 1

Command telegram

Slave address Function code Address bit Status bit Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Respond telegram

Slave address Function code Address bit Status bit Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Read n words 03h, 04h

Write 1 bit 05h

VIPA System 300S

Deployment PtP communication

Modbus - Function codes

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Code 06h: Write 1 word to master output area 4x

Command telegram

Slave address Function code Address word Value word Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Respond telegram

Slave address Function code Address word Value word Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Code 0Fh: Write n bits to master output area 0x

Please regard that the number of bits has additionally to be set in byte.

Command telegram

Slave

address

Function

code

Address 1.

bit

Number of

bits

Number of

bytes

Data 1.

byte

Data 2.

byte

... Check sum

CRC/LRC

1byte 1byte 1word 1word 1byte 1byte 1byte 1byte 1word

max. 250byte

Respond telegram

Slave address Function code Address 1. bit Number of bits Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Code 10h: Write n words to master output area 4x

Command telegram

Slave

address

Function

code

Address 1.

word

Number of

words

Number of

bytes

Data 1.

word

Data 2.

word

... Check sum

CRC/LRC

1byte 1byte 1word 1word 1byte 1word 1word 1word 1word

max. 125words

Respond telegram

Slave address Function code Address 1. word Number of words Check sum

CRC/LRC

1byte 1byte 1word 1word 1word

Write 1 word 06h

Write n bits 0Fh

Write n words 10h

VIPA System 300S

Deployment PtP communication

Modbus - Function codes

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6.8 Modbus - Example communication

The example establishes a communication between a master and a slave via Modbus. The following combination options are shown:

n CPU 31xS as Modbus RTU master n CPU 21xSER-1 as Modbus RTU slave n Siemens SIMATIC Manager and possibilities for the project transfer n Modbus cable connection

1. Assemble a Modbus system consisting of a CPU 31xS as Modbus master and a CPU 21xSER-1 as Modbus slave and Modbus cable.

2. Execute the project engineering of the master! For this you create a PLC user application with the following structure:

n OB 100:

Call SFC 216 (configuration as Modbus RTU master) with timeout setting and error evaluation.

n OB 1:

Call SFC 217 (SER_SND) where the data is send with error evaluation. Here you have to build up the telegram according to the Modbus rules. Call SFC 218 (SER_RECV) where the data is received with error evaluation.

3. Execute the project engineering of the slave! The PLC user application at the slave has the following structure:

n OB 100:

Call SFC 216 (configuration as Modbus RTU slave) with timeout setting and Modbus address in the DB and error evaluation.

n OB 1:

Call SFC 217 (SER_SND) for data transport from the slave CPU to the output buffer. Call SFC 218 (SER_RECV) for the data transport from the input buffer to the CPU. Allow an according error evaluation for both directions.

Structure for the according PLC programs for master and slave:

Overview

Approach

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Deployment PtP communication

Modbus - Example communication

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VIPA System 300S

Deployment PtP communication

Modbus - Example communication

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7 Deployment PROFIBUS communication

7.1 Overview

n PROFIBUS is an international standard applicable to an open and serial field bus for

building, manufacturing and process automation that can be used to create a low (sensor-/actuator level) or medium (process level) performance network of programmable logic controllers.

n PROFIBUS comprises an assortment of compatible versions. The following details

refer to PROFIBUS DP.

n PROFIBUS DP is a special protocol intended mainly for automation tasks in a manu-

facturing environment. DP is very fast, offers Plug'n'Play facilities and provides a costeffective alternative to parallel cabling between PLC and remote I/O. PROFIBUS DP was designed for high-speed data communication on the sensor-actuator level.

n The data transfer referred to as "Data Exchange" is cyclical. During one bus cycle,

the master reads input values from the slaves and writes output information to the slaves.

The PROFIBUS DP master is to be configured in the hardware configurator from Siemens. Therefore the configuration happens by the sub module X1 (MPI/DP) of the Siemens CPU.

After the transmission of the data to the CPU, the configuration data are internally passed on to the PROFIBUS master part.

During the start-up the DP master automatically includes his data areas into the address range of the CPU. Project engineering in the CPU is not required.

Via the PROFIBUS DP master PROFIBUS DP slaves may be coupled to the CPU. The DP master communicates with the DP slaves and links up its data areas with the address area of the CPU.

At every POWER ON res. overall reset the CPU fetches the I/O mapping data from the master. At DP slave failure, the ER-LED is on and the OB 86 is requested. If this is not available, the CPU switches to STOP and BASP is set. As soon as the BASP signal comes from the CPU, the DP master is setting the outputs of the connected periphery to zero. The DP master remains in the operating mode RUN independent from the CPU.

For the deployment in a super-ordinated master system you first have to project your slave system as Siemens CPU in slave operation mode with configured in-/output areas. Afterwards you configure your master system. Couple your slave system to your master system by dragging the CPU 31x from the hardware catalog at Configured stations onto the master system, choose your slave system and connect it.

PROFIBUS DP

CPU with DP master

Deployment of the DP master with CPU

DP slave operation

VIPA System 300S

Deployment PROFIBUS communication

Overview

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