XILINX XC95216 Product Specification
查询XC95216供应商
1
XC95216 In-System Programmable
CPLD
August 21, 2001 (Ve r si on 3.1)
10*
Features
• 10 ns pin-to-pin logic delays on all pins
to 111 MHz
•f
CNT
• 216 ma c roc ells with 48 00 usa ble ga t es
• Up to 166 us er I/O pin s
• 5 V in-system programmable
- Endurance of 10,000 program/erase cycles
- Program/erase over full commercial voltage and
temperature range
• Enhanced pin-locking a rchitecture
• Flexible 36V18 Function Block
- 90 product terms drive any or all of 18 macrocells
within Function Block
- Global and product term clocks, output enable s, set
and reset sign a l s
• Extensive IEEE S td 1149.1 boundary-scan (JTAG)
support
• Programmable power reduction mode in each
macrocell
• Slew rate control on individual outputs
• User programmable ground pin capability
• Extended pattern security features for design protection
• High-drive 24 mA outputs
• 3.3 V or 5 V I/O capability
• Advanc e d CM O S 5V FastFLASH tec hn ol ogy
• Supports parallel programming of more than one
XC9500 concurrently
• Available in 160-pin PQFP, 352-pin BGA, and 208-pin
HQFP pa cka ge s
Description
The XC95216 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpo se lo gi c i ntegratio n. It is com prised of twelve
36V18 Fu nct ion Blocks , prov idin g 4, 800 usable gate s wit h
propagation delays of 10 ns. See Figure 2 for the architec-
ture overview.
Product Specification
Power Manage me n t
Power diss ip ation can be r e du ce d in the X C95216 by c on figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
Opera tin g current for eac h de si gn can be approx im at e d for
specif i c op erating cond iti ons using the follow in g eq ua t io n:
(mA) =
I
CC
(1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f
MC
HP
Where:
MC
= Macrocells in high-performance mode
HP
MC
= Macrocells in low-power mode
LP
MC = Total number of macrocells used
f = Clock frequency (MHz)
Figure 1 shows a typical calculation for the XC95216
device.
600
400
(360)
(mA)
CC
Typical I
200
050
H
Low Power
Clock Frequency (MHz)
ance
erform
igh P
(500)
(340)
100
X5918
Figure 1: Typical ICC vs. Freq uency For XC95216
August 21, 2001 (Version 3.1) 1
XC95216 In-System Programmable CPLD
R
JTAG Port
I/O/GCK
I/O/GSR
I/O/GTS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
3
1
JTAG
Controller
In-System Programming Controller
36
18
Function
Block 1
Macrocells
1 to 18
36
18
Function
Block 2
Macrocells
I/O
1 to 18
Blocks
36
18
FastCONNECT Switch Matrix
Function
Block 3
Macrocells
1 to 18
3
1
18
2
36
Function
Block 4
Macrocells
1 to 18
36
18
Function
Block 12
Macrocells
1 to 18
X5917
Figure 2: XC95216 Architecture
Function Block outputs (indicated by the bold line) drive the I/O Blocks directly
2 August 21, 2001 (Version 3.1)
R
XC95216 In-System Programmable CPLD
Absolute Maximum Ratings
Symbol Parameter Value Units
V
CC
V
IN
V
TS
T
STG
T
SOL
Warning: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are
Recommended Operating Conditions
Symbol Parameter Min Max Units
V
CCINT
V
CCIO
V
IL
V
IH
V
O
Note: 1. Numbers in parenthesis are for industrial-temperature range versions.
Supply voltage relative to GND -0.5 to 7. 0 V
DC input voltage rela tive to GND -0.5 to VCC + 0.5 V
Voltage applied to 3-state output with respect to GND -0.5 to VCC + 0.5 V
Storage temperature -65 to +150 °C
Max soldering tem perature (10 s @ 1/16 in = 1.5 mm) +260 °C
stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under
Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Rating conditions for extended periods
of time may affect device reliability.
1
Supply voltage for internal logic and input buffer 4.75
(4.5)
5.25
(5.5)
Supply voltage for output drivers for 5 V operation 4.75 (4.5) 5.25 (5.5) V
Supply voltage for output drivers for 3.3 V operation 3.0 3.6 V
Low-level input voltage 0 0.80 V
High-level input voltage 2.0 V
Output voltage 0 V
+0.5 V
CCINT
CCIO
V
V
Endurance Characteristics
Symbol Parameter Min Max Units
t
N
DR
PE
Data Retention 20 - Years
Program/Erase Cycl es 10,000 - Cycles
August 21, 2001 (Version 3.1) 3
Loading...