Note:Ensure that there are no unintentional external pull-ups on the following GPIOs
and these GPIOs are NOT logic high unintentionally before SDX55M comes out of reset
GPIO_24, GPIO_54, GPIO_58, GPIO_59 and GPIO_75
U1601-3
GND1
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98
GND99
GND100
AF24
AF26
AF28
AG15
AG5
AG7
AH10
AH14
AH18
AH20
AH8
AJ1
AJ17
AJ37
AK10
AK14
AK2
AK32
AK36
AK4
AK8
C3
C35
D10
D14
D18
D22
D26
D30
D34
D4
D6
E11
E13
E15
E17
E19
E21
E23
E25
E27
E29
E31
E33
E35
E37
E7
E9
F10
F16
A1
GND1
A11
GND2
A15
GND3
A19
GND4
A23
GND5
A27
GND6
A3
GND7
A31
GND8
A35
GND9
A37
GND10
A7
GND11
AA11
GND12
AA13
GND13
AA15
GND14
AA17
GND15
AA21
GND16
AA23
GND17
AA25
GND18
AA31
GND19
AA5
GND20
AA9
GND21
AB18
GND22
AB20
GND23
AB26
GND24
AB28
GND25
AB30
GND26
AB36
GND27
AB4
GND28
AB6
GND29
AD10
GND30
AD12
GND31
AD14
GND32
AD16
GND33
AD28
GND34
AD30
GND35
AD36
GND36
AD8
GND37
AE1
GND38
AE11
GND39
AE17
GND40
AE19
GND41
AE21
GND42
AE23
GND43
AE27
GND44
AE5
GND45
AE9
GND46
AF16
GND47
AF18
GND48
AF20
GND49
AF22
GND50
SDX55M
U1601-4
GND2
F22
GND101
F24
GND102
F26
GND103
F28
GND104
F30
GND105
F34
GND106
F8
GND107
G29
GND108
G31
GND109
G33
GND110
G35
GND111
H30
GND112
H32
GND113
H34
GND114
J13
GND115
J15
GND116
J17
GND117
J19
GND118
J21
GND119
J23
GND120
J25
GND121
J27
GND122
J29
GND123
J33
GND124
J35
GND125
J37
GND126
K10
GND127
K12
GND128
K14
GND129
K20
GND130
K22
GND131
K24
GND132
K26
GND133
K28
GND134
K30
GND135
K32
GND136
K34
GND137
K8
GND138
L1
GND139
L33
GND140
L35
GND141
M30
GND142
M32
GND143
M34
GND144
N11
GND145
N13
GND146
N15
GND147
N17
GND148
N19
GND149
N21
GND150
N23
GND151
GND152
GND153
GND154
GND155
GND156
GND157
GND158
GND159
GND160
GND161
GND162
GND163
GND164
GND165
GND166
GND167
GND168
GND169
GND170
GND171
GND172
GND173
GND174
GND175
GND176
GND177
GND178
GND179
GND180
GND181
GND182
GND183
GND184
GND185
GND186
GND187
GND188
GND189
GND190
GND191
GND192
GND193
GND194
GND195
GND196
GND197
GND198
GND199
N25
N27
N33
N35
N9
P10
P12
P14
P16
P18
P20
P22
P24
P26
P30
R33
R35
T30
T32
T34
U1
U11
U13
U15
U17
U19
U25
U27
U33
U35
U9
V10
V12
V14
V16
V18
V20
V22
V24
V26
V28
V32
V34
V8
W33
W35
W37
Y30
SDX55M
SDX55M
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
Reserved(for 5G-sub 6G)
A2
Reserved(for 5G-sub 6G)
A2
Reserved(for 5G-sub 6G)
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
W1701
2
VREG_S7E_MX_0P752_SENSE_P<19>
DD
CC
VREG_S5E_CX_0P752_SENSE_P<19>
BB
AA
o
112
SHORT
VREG_S7E_MX_0P752
VREG_S5E_CX_0P752
5
U1601-8
AB10
12
C1703
12
1uF
+/-20%
DC 6.3V
0201
1
C1785
22uF
13
2
4
C1704
NM
0402
W1702
2
o
2
1
SHORT
2389.1mA
2490mA
12
C1705
NM
0402
1
C1706
22uF
2
VREG_S3E_0P824
3
4
21.4mA
AB22
AB24
AD24
AE25
W13
W15
W19
W21
AA29
AB12
AB14
AB16
AC11
AC13
AC15
AC17
AC19
AC21
AC23
AC25
AC27
AC29
AC9
AD18
AD20
AD22
AD26
W29
AB8
G23
G25
G27
H10
H8
K16
K18
L25
L27
M8
P28
P8
R19
R21
T14
T16
T28
T8
U21
U23
F32
VDDMX_1_1
VDDMX_1_2
VDDMX_1_3
VDDMX_1_4
VDDMX_1_5
VDDMX_1_6
VDDMX_1_7
VDDMX_1_8
VDDMX_1_9
VDDMX_1_10
VDDMX_1_11
VDDMX_1_12
VDDMX_1_13
VDDMX_1_14
VDDMX_1_15
VDDMX_1_16
VDDMX_1_17
VDDMX_1_18
VDDMX_1_19
VDDMX_1_20
VDDMX_1_21
VDDMX_1_22
VDDMX_1_23
VDDMX_1_24
VDDMX_1_25
VDDMX_1_26
VDDMX_1_27
VDDMX_1_28
VDDMX_1_29
VDDMX_1_30
VDDCX_1_1
VDDCX_1_2
VDDCX_1_3
VDDCX_1_4
VDDCX_1_5
VDDCX_1_6
VDDCX_1_7
VDDCX_1_8
VDDCX_1_9
VDDCX_1_10
VDDCX_1_11
VDDCX_1_12
VDDCX_1_13
VDDCX_1_14
VDDCX_1_15
VDDCX_1_16
VDDCX_1_17
VDDCX_1_18
VDDCX_1_19
VDDCX_1_20
VDD_ILDO_NAV
SDX55M
PWR1
VDD_MODEM_1
VDD_MODEM_2
VDD_MODEM_3
VDD_MODEM_4
VDD_MODEM_5
VDD_MODEM_6
VDD_MODEM_7
VDD_MODEM_8
VDD_MODEM_9
VDD_MODEM_10
VDD_MODEM_11
VDD_MODEM_12
VDD_MODEM_13
VDD_MODEM_14
VDD_MODEM_15
VDD_MODEM_16
VDD_MODEM_17
VDD_MODEM_18
VDD_MODEM_19
VDD_MODEM_20
VDD_MODEM_21
VDD_MODEM_22
VDD_MODEM_23
VDD_MODEM_24
VDD_MODEM_25
VDD_MODEM_26
VDD_MODEM_27
VDD_MODEM_28
VDD_MODEM_29
VDD_MODEM_30
VDD_MODEM_31
VDD_MODEM_32
VDD_MODEM_33
VDD_MODEM_34
VDD_MODEM_35
VDD_MODEM_36
VDD_MODEM_37
VDD_MODEM_38
VDD_MODEM_39
VDD_MODEM_40
VDD_MODEM_41
VDD_MODEM_42
VDD_MODEM_43
VDD_MODEM_44
VDD_MODEM_45
VDD_MODEM_46
VDD_MODEM_47
VDD_MODEM_48
VDD_MODEM_49
VDD_MODEM_50
VDD_MODEM_51
VDD_MODEM_52
VDD_MODEM_53
VDD_MODEM_54
VDD_MODEM_55
VDD_MODEM_56
VDD_MODEM_57
VDD_MODEM_58
VDD_MODEM_59
VDD_MODEM_60
VDD_MODEM_61
VDD_MODEM_62
VDD_MODEM_63
VDD_MODEM_64
VDD_MODEM_65
VDD_MODEM_66
VDD_MODEM_67
4
VREG_S1E_S6E_MODEM_0P752
C1735
22uF
13
C1736
22uF
2
4
13
2
4
12
RT1700
100K
±1%
0201
C1737
22uF
1
2
4
AA19
7800.9mA
AA27
G21
H12
H14
H16
H18
H20
H22
H24
H26
H28
J11
J9
L11
L13
L15
L17
L19
L21
L23
L9
M10
M12
M14
M16
M18
M20
M22
M24
M26
M28
R11
R13
R15
R17
R23
R25
R27
R9
T10
T12
T18
T20
T22
T24
T26
W11
W17
W23
W25
W27
W5
W9
Y10
Y12
Y14
Y16
Y18
Y20
Y22
Y24
Y26
Y28
Y4
Y6
Y8
4
3
VREG_L6E_RCM_1P8
o
MDM_SKIN_THERM <43>
3
VREG_S7E_MX_0P752
VREG_L14E_0P6
C1744
12
12
1uF
±20%
6.3V
0201
12
3
W1707
112
SHORT
W1708
112
SHORT
C1746
C1745
12
1uF
1uF
±20%
±20%
6.3V
6.3V
0201
0201
VREG_L1E_RCM_1P2VREG_L6E_RCM_1P8
C1751
C1752
1
1uF
1uF
±20%
±20%
6.3V
6.3V
2
0201
0201
2
2
12
12
VREG_IO_1P8
VREG_L4E_RCM_0P875
C1757
12
1uF
±20%
6.3V
0201
o
VREG_S1E_S6E_SENSE_P <19>
o
VREG_S1E_S6E_SENSE_M <19>
C1710
1uF
±20%
6.3V
0201
187.4mA
C1739
12
1uF
±20%
6.3V
0201
270.7mA
C1742
12
1uF
±20%
6.3V
0201
12
VREG_L11E_UIM1_1P8VREG_L13E_UIM2_1P8
C1711
12
1uF
±20%
6.3V
0201
VREG_L4E_RCM_0P875VREG_L1E_RCM_1P2
C1762
12
1uF
±20%
6.3V
0201
C1738
1uF
±20%
6.3V
0201
C1741
1uF
±20%
6.3V
0201
1
2
0.1mA
0mA
C1750
1uF
±20%
6.3V
0201
47.9mA
17.5mA
24.7mA
10mA
10mA
0mA
10mA
U1601-9
L29
VDDA_DDRSS1
N29
VDDA_DDRSS2
R29
VDDA_DDRSS3
U29
VDDA_DDRSS4
V30
VDDA_DDRSS_CC
J31
VDDIO_DDRSS1
L31
VDDIO_DDRSS2
N31
VDDIO_DDRSS3
U31
VDDIO_DDRSS4
R31
VDDIO_DDRSS_CK
AG1
VDDPX_0
AE37
VDDPX_3_1
AH2
VDDPX_3_2
AK22
VDDPX_3_3
AK34
VDDPX_3_4
B36
VDDPX_3_5
C1
VDDPX_3_6
R1
VDDPX_3_7
V2
VDDPX_4
W1
VDDPX_5
AF6
VDDPX_11
J1
VDDPX_12
AJ33
VDDPX_71
AG37
VDDPX_72
AJ21
VDDPX_73
AH4
VDDPX_74
AF14
VDDA_USB_SS_0P9
P32
VDDA_DDRSS_HV
W31
VDDA_DDRSS_PLL_HV
AF12
VDD_USB_HS_DVDD
SDX55M
2
PWR2
VDDA_QLINK0_LV_CK
VDDA_QLINK1_LV_CK_1
VDDA_QLINK1_LV_CK_2
2
VDDA_USB_HS_1P8
VDDA_USB_HS_3P3
VDDA_USB_SS_1P2
VDDA_PCIE_1P2
VDDA_PCIE_0P9_1
VDDA_PCIE_0P9_2
VDDA_QREF_0P9_1
VDDPX_VBIAS_UIM
VDDA_QLINK0_LV_1
VDDA_QLINK0_LV_2
VDDA_QLINK1_LV_1
VDDA_QLINK1_LV_2
VDDA_QREF_0P9_2
VDDA_QLINK0_HV
VDDA_QLINK1_HV
VDDA_QREF_1P8
VDD_QFPROM
VDD1_1
VDD1_2
VDD2_1
VDD2_2
VDD2_3
VDD2_4
VDD2_5
VDD2_6
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VREG_L5E_RCM_1P7 VREG_L10E_3P1 VREG_L1E_RCM_1P2
AE13
0.5mA
AG13
0.2mA
AE15
15mA
AF8
15mA
AF10
50.4mA
AG11
G9
V6
3mA
F18
480mA
F12
F14
F20
G17
G11
G15
AC7
G19
6mA
G13
AE7
1mA
AE29
94.5mA
AC37
C1773
12
1uF
±20%
G37
6.3V
0201
AA37
290mA
C37
K36
C1778
1
L37
1uF
±20%
R37
6.3V
2
0201
U37
D36
98mA
C1782
12
F36
1uF
±20%
H36
6.3V
0201
M36
T36
V36
Y36
C1764
C1763
12
12
1uF
1uF
±20%
±20%
6.3V
6.3V
0201
0201
C1769
C1768
12
1
1uF
2.2uF
±20%
+/-10%
6.3V
DC 10V
2
0201
0402
C1774
1
1uF
±20%
6.3V
2
0201
C1779
C1780
12
12
1uF
1uF
±20%
±20%
6.3V
6.3V
0201
0201
C1784
C1783
12
12
1uF
1uF
±20%
±20%
6.3V
6.3V
0201
0201
Title
Title
Title
Size Document Number
Size Document Number
Size Document Number
Date:Sheet
Date:Sheet
Date:Sheet
C1770
12
1uF
±20%
6.3V
0201
C1776
12
1uF
±20%
6.3V
0201
J11 MAIN
J11 MAIN
J11 MAIN
Reserved(for MM Wave)
A2
Reserved(for MM Wave)
A2
Reserved(for MM Wave)
A2
Monday, December 23, 2019
Monday, December 23, 2019
Monday, December 23, 2019
1
VREG_L1E_RCM_1P2 VREG_L4E_RCM_0P875
C1766
12
1uF
±20%
6.3V
0201
C1777
12
1uF
±20%
6.3V
0201
VREF_SDX
VREG_L5E_RCM_1P7VREG_L1E_RCM_1P2
VREG_L2E_1P13
VREG_L14E_0P6
1
VREG_L4E_RCM_0P875
VREG_L6E_RCM_1P8
5
DD
U1801-1
GND
VREG_L1E_RCM_1P2
1194.1mA
9
26
8
132
16
143
142
140
139
115
40
31
7
39
5
6
141
C1814
1
4.7uF
+/-20%
10V
2
0402
57
TEST_EN_VPP
47
CMN_GND0
56
CMN_GND1
64
CMN_GND2
65
CMN_GND3
73
CMN_GND4
81
CMN_GND5
82
CMN_GND6
90
CMN_GND7
30
NC1
125
NC2
122
NC3
PMX55
VREG_L2E_1P13
323.7mA
C1815
12
4.7uF
+/-20%
10V
0402
VREG_L3E_RCM_0P8
1282.3mA
VREG_L4E_RCM_0P875
C1816
1
1
4.7uF
+/-20%
10V
2
2
0402
1070.6mA
VREG_L5E_RCM_1P7
C1817
4.7uF
+/-20%
10V
0402
U1801-2
2
84
83
74
92
67
58
100
101
75
66
U1801-3
VDD_L1_L2_0
VDD_L1_L2_1
VDD_L3_L9
VDD_L4_L12_0
VDD_L4_L12_1
VDD_L5_L6
VDD_L7_L8_0
VDD_L7_L8_1
VDD_L10_L11_L13
VDD_L14
VDD_L15
VDD_L16
VREG_L14_S
PMX55
5
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
GPIO_07
GPIO_08
GPIO_10
GPIO_11
PMX55
GPIO
LREG
VREG_L1_0
VREG_L1_1
VREG_L2
VREG_L3
VREG_L4
VREG_L5
VREG_L6
VREG_L7
VREG_L8
VREG_L9
VREG_L10
VREG_L11
VREG_L12
VREG_L13
VREG_L14
VREG_L15
VREG_L16
R1813 NM 0201
1
BB_HP_EN<48>
CC
BB
S7E is for L14 input and
SDX_MX/SDX_VDDA_EBI0
C3219 is reserved
AA
o
1517.8mA
1565.4mA
1656.7mA
727.3mA
1177mA
140.4mA
C1843
1
±20%
10V
1uF
2
0201
400mA
414.8mA
W1800
1
SHORT
o
17
25
124
15
24
134
123
131
48
14
23
133
22
2
2
1
SLEEP_CLK<32,43,75>
VREG_S2E_1P224
VREG_S3E_0P824
VREG_S2E_1P224
VREG_S4E_1P904
VREG_S3E_0P824
VREG_BOB
VREG_S7E_MX_0P752
368.7mA
VREG_S2E_1P224
C1842
1
4.7uF
+/-20%
10V
meet ESL/DCR requirements
2
0402
VREG_S4E_1P904
VREG_L14E_0P6VREG_L16E_RCM_1P8
PMx55 LDO capacitor table
N1200(L1,L2,L3,L4,L7,L8,L9,L12,L14,L15)4.7uF min .22uF max
N1200(L14)2*10uF or 1*22uF min.44uF max
MVP150(L10,L11,L13)0.47uF min. 5uF max
LVP600(L5,L6,L16) 4.7uF min .23.5uF max
Pseudo capless allows users to place the LDO output capacitor physically/electrically far from the LDO output, near the load. The routing ESL/ESR between the PMIC pin and the remote Cout should meet the capless LDO spec.
All PMOS LDOs are considered pseudo-capless, unless it has internal PMIC load. If an internal PMIC load, the output cap must be placed close to the PMIC.
Required capacitance for each LDO type can be found in App Note: 80-VT310-125
4
VREG_IO_1P8VREG_L6E_RCM_1P8
o
PMIC_SPMI_CLK<17,19,32,43,48,53,74>
o
PMIC_SPMI_DATA<17,19,32,43,48,53,74>
R1803 NM 0201
o
AUTO_ON_N<43,55>
o
SDX_PS_HOLD<17>
o
PA_THERM1<8>
o
PA_THERM2<8>
WIFI_SKIN_THERM<75>
GND_XO_ADC
Use dedicated route with thin trace to XTAL Therm GND and PMIC pin
Locate GND via close as possible to PMIC pin
Option for Embedded_shorting_bar to ensure no accidental other connection to GND
o
o
AMNIENT_THERM<19>
o
PMK_XO_THERM<19>
o
GND_XO_ADC<19>
Y1800 GND
12
R1807 3.65K ±1% 0201
1
For PON decode
C1801
1
1nF
+/-10%
50V
2
0201
VPH_PWR
727.3mA
VREG_L6E_RCM_1P8
269.6mA
VREG_L8E_RCM_0P8
824.56mA
C1818
C1819
1
1
4.7uF
100nF
+/-20%
+/-10%
10V
6.3V
2
2
0402
0201
4
C1821
1
4.7uF
+/-20%
10V
2
0402
VREG_L10E_3P1
0.2mA
12
C1823
NM
0201
2
1
VPH_PWR
VREG_L11E_UIM1_1P8
VPH_PWR
2
1
2
VPH_PWR
0201
C1832
1uF
10V
±20%
Share S4E input
power routes
with S2E cap
70.1mA
These VPH power pins
are low current:
about 2mA max @
U1801-4
106
VPH_PWR1
41
VPH_PWR2
91
VIO_IN
33
VDD_AP_IO
118
SPMI_CLK
109
SPMI_DATA
97
CBL_PWR_N
114
KPD_PWR_N
80
RESIN_N
72
PON_1
113
PS_HOLD
50
VBUS_DET
107
NC
2
EXT_ECM1
29
EXT_ECM2
55
AMUX1
46
AMUX2
54
AMUX3
38
AMUX4
37
AMUX5
71
XO_THERM
63
GND_XOADC
W1801
1
SHORT
2
0201
2
C1831
1uF
10V
1
±20%
VREG_L13E_UIM2_1P8
PMX55
VREF_RGMII_GPIO_09
U1801-6
59
VDD_S2_0
68
VDD_S2_1
43
GND_S2_1
42
GND_S2_0
144
VDD_S3_0
145
VDD_S3_1
127
GND_S3_1
119
GND_S3_0
76
VDD_S4_0
77
VDD_S4_1
85
VDD_S4_2
111
GND_S4_1
110
GND_S4_0
PMX55
70.1mA
VREG_L14E_0P6
12
MISC
PON_RESET_N
SREG_2
368.7mA
VREG_L15E_1P2
C1827
22uF
+/-20%
6.3V
0402
SLEEP_CLK
VIO_OUT
FAULT_N
DVDD_BYP
AVDD_BYP
REF_BYP
REF_GND
VREF_MDM
VFB_S2
VSW_S2_0
VSW_S2_1
VFB_S3
VSW_S3_0
VSW_S3_1
VFB_S4
VSW_S4_0
VSW_S4_1
VSW_S4_2
400mA
C1828
1
4.7uF
+/-20%
10V
2
0402
3
3
117
99
130
105
116
108
32
49
98
89
414.8mA
1
C1829
NM
0201
2
12
PMX_AVDD_BYP
34
51
60
126
128
136
135
93
94
102
VREG_IO_1P8
o
SDX_SLEEP_CLK <17>
o
R1808 0R±5%0201
o
C1803 1uF 0201
2
1
6.3V ±20%
C1804 1uF 0201
1
6.3V ±20%
AVDD_BYP
Use dedicated GND via
C1805
12
at quiet area close to PMIC
100nF
+/-10%
REF_BYP
6.3V
Use dedicated route
0201
and GND via close as possible to PMIC pin
VREF_RGMII is 0.85 V, low current
VREF_RGMII can be optionally configured as GPIO_09
VREF_MDM is 1.25 V, low current
VREF_SDX
C1802
12
±20%
6.3V
1uF
0201
SDX_RESIN_N <17>
PM_FAULT_N <43,48,53>
2
1
2
o
AMNIENT_THERM <19>
RT1801
100K
±1%
0201
VREG_S2E_1P224
3574.6mA
L1806 470nH ±20% 0805
12
C1834
1
10uF
±20%
6.3V
2
0402
VREG_S3E_0P824
3588.3mA
L1807 470nH ±20% 0805
12
C1835
1
10uF
±20%
6.3V
2
0402
VREG_S4E_1P904
1492.8mA
L1808 1uH ±20%
2
1
0805
1
C1836
12
22uF
C1837
+/-20%
NM
6.3V
0402
0402
2
PMK_XO_THERM<19>
GND_XO_ADC<19>
Note:
Place XO as close to PMK8002 as possible, away from heat source in
all directions (including Z-direction for stacked PCB).
Route XTAL_IN and XTAL_OUT traces on surface layer only with length <10mm.
No trace shall be present in at-least two immediate layers below XTAL.
Refer to 80-VP447-10 for XO Layout App Note.
2
U1801-5
SREG_1
137
VDD_S1_0
138
0201
2
C1806
Share S7E input
power routes
with S5E cap
PMIC_SPMI_DATA<17,19,32,43,48,53,74>
PMIC_SPMI_CLK<17,19,32,43,48,53,74>
PM_DVDD_BYP<43>
3
HOT2
4
SENSOR
2
GND
2
1uF
10V
1
±20%
0201
C1810
1uF
10V
1 2
±20%
0201
2
C1811
1uF
10V
1
±20%
VPH_PWR
C1809
C1807
12
12
10uF
10uF
+/-20%
+/-20%
10V
10V
0402
0402
VPH_PWR
VPH_PWR
C1808
1
10uF
±20%
6.3V
2
0402
C1812
1
10uF
±20%
6.3V
2
0402
o
o
VDD_S1_1
121
GND_S1_1
112
GND_S1_0
78
VDD_S6_0
87
VDD_S6_1
104
GND_S6_1
103
GND_S6_0
61
VDD_S8_0
69
VDD_S8_1
36
GND_S8_1
35
GND_S8_0
1
VDD_S5_0
10
VDD_S5_1
28
GND_S5_1
27
GND_S5_0
3
VDD_S7_0
11
VDD_S7_1
21
GND_S7_1
13
GND_S7_0
PMX55
o
o
o
VREG_IO_1P8
Y1800
HOT1
38.4MHz
Dedicated trace from REF_BYP to cap.
Dedicated trace from REF_GND to cap.
Dedicated via to main ground plane right under PMIC pin (REF_GND)
or as close to the pin as possible.
Do NOT add via at cap.
REF_BYP and REF_GND should be
routed away from noisy traces
12
12
1
VFB_S1
RMT_GND_S1
VSW_S1_0
VSW_S1_1
VFB_S6
RMT_GND_S6
VSW_S6_0
VSW_S6_1
VFB_S8
RMT_GND_S8
VSW_S8_0
VSW_S8_1
VFB_S5
VSW_S5_0
VSW_S5_1
VFB_S7
VSW_S7_0
VSW_S7_1
C1830
100nF
+/-10%
6.3V
0201
C1838
100nF
+/-10%
6.3V
0201
13
14
5
6
3
2
PMK8002
70
96
120
129
62
88
86
95
53
79
44
52
45
18
19
20
4
12
SPMI_DATA
SPMI_CLK
DVDD_BYP
VDD_IO
XTAL_OUT
XTAL_IN
L1802 470nH ±20% 0805
1
L1803 470nH ±20% 0805
12
L1809_NM 470nH ±20% 0805
1
o
VREG_S5E_CX_0P752_SENSE_P <18>
L1804 1uH ±20% 0805
1
o
VREG_S7E_MX_0P752_SENSE_P <18>
L1805 470nH ±20% 0805
12
S7E is for VDD_MX/VDDA_EBI/L14E_INPUT, STAR-ROUTE is NEEDED.
Pay attention to the S7E bulk cap placement and the star-routing.
We use current SM8250 symbol as LP5 PKG, and it can be compatible with LP4x PKG
U3100-2
SDC2_CLK
SDC2_CMD
SDC2_DATA_0
SDC2_DATA_1
SDC2_DATA_2
SDC2_DATA_3
USB0_HS_DM
USB0_HS_DP
USB1_HS_DM
USB1_HS_DP
USB1_SS_RX_M
USB1_SS_RX_P
USB1_SS_TX_M
USB1_SS_TX_P
ZQ_A
ZQ_D
SPMI_CLK
SPMI_DATA
AE4
AE3
AF3
AF4
AD3
AD4
Y37
AC34
AC35
AA35
AA34
AB34
AB35
W34
W33
V33
V34
AM36
AM37
AJ36
AJ37
AL36
AL37
A19
AP19
A18
NC2
AP18
NC1
B19
C19
F24
12
R31263K
R3100 1R ±1% 0201
12
R3101 1R ±1% 0201
1
±1%0201
o
2
R3130
240R
±1%
0201
USB0_HS_DM <66,73>
o
USB0_HS_DP <66,73>
12
1
R3131
R3129
240R
240R
±1%
±1%
0201
0201
2
o
PMIC_SPMI_CLK <17,19,43,48,53,74>
o
PMIC_SPMI_DATA <17,19,43,48,53,74>
o
SP_ARI_PWR_ALARM <47>
1
R3132
2
VREG_S7C_0P6
Place all ZQ resistors close to SDM
12
SM8250 LP5: DNI R0508/R0507, and mount R0505/R0503
240R
±1%
0201
SM8250 LP4: Mount R0508/R0507/R0505/R0503
U3100-11
U34
DP_AUX_P
U33
DP_AUX_M
SM8250-LPDDR5
DNC8
DNC9
REFGEN_REXT0
REFGEN_REXT1
W3
Y32
V3
AB37
1
2
R3133100R
12
R3134100R
±1%0201
±1%0201
C3100
NM
0201
AA37
CXO
E19
SLEEP_CLK
C21
RESIN_N
C34
RESOUT_N
B33
C33
2
A34
.050201
D9
E10
D11
C11
D10
C10
U37
U35
T36
T37
V36
V37
R36
R37
W36
W37
AA5
AB4
AB3
Y3
Y4
A9
E29
AP32
AJ12
A33
D31
D30
SM8250-LPDDR5
MODE_0
MODE_1
PS_HOLD
SRST_N
TCK
TDI
TDO
TMS
TRST_N
UFS0_RESET
UFS0_REFCLK
UFS0_RX0_M
UFS0_RX0_P
UFS0_TX0_M
UFS0_TX0_P
UFS0_RX1_M
UFS0_RX1_P
UFS0_TX1_M
UFS0_TX1_P
UFS1_REFCLK
UFS1_RX0_M
UFS1_RX0_P
UFS1_TX0_M
UFS1_TX0_P
EBI02_CAL
DNC6
EBI13_CAL
DNC3
DNC1
DNC5
DNC4
QREFS_CXO_REXT
USB0_SS_RX0_M
USB0_SS_RX0_P
USB0_SS_RX1_M
USB0_SS_RX1_P
USB0_SS_TX0_M
USB0_SS_TX0_P
USB0_SS_TX1_M
USB0_SS_TX1_P
SP_ARI_POWER_ALARM
o
SDM_PS_HOLD<43>
UFS0_RESET_N<57>
UFS0_REF_CLK<57>
UFS0_L0_RX_M<57>
UFS0_L0_RX_P<57>
UFS0_L0_TX_M<57>
UFS0_L0_TX_P<57>
UFS0_L1_RX_M<57>
UFS0_L1_RX_P<57>
UFS0_L1_TX_M<57>
UFS0_L1_TX_P<57>
VREG_S7C_0P6
12
LN_BB_CLK1<43>
o
SLEEP_CLK<19,43,75>
o
SDM_RESIN_N<43>
12
1
R31281K
o
SDM_JTAG_SRST_N
1
TP3101TP0.3mm
SDM_JTAG_TCK
1
TP3102TP0.3mm
SDM_JTAG_TDI
1
TP3103TP0.3mm
SDM_JTAG_TDO
1
TP3104TP0.3mm
SDM_JTAG_TMS
1
TP3108TP0.3mm
SDM_JTAG_TRST_N
1
TP3109TP0.3mm
o
o
o
o
o
o
o
o
o
o
12
R3124
R3123
240R
240R
±1%
±1%
0201
0201
DD
CC
BB
Place Near SM8250
o
12
R3112
100K
±1%
0201
SDM_SKIN_THERM<48>
AA
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
SDM855 Control
A2
SDM855 Control
A2
SDM855 Control
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
AP_CTI_IN<17>
MDM2AP_ERR_FATAL<17>
AP_CTI_OUT<17>
MDM2AP_STATUS<17>
NFC_I2C_SDA<23,33>
DD
CC
TP3200
TP0.3mm
TP3201
TP0.3mm
1
1
NFC_I2C_SCL<23,33>
NFC_CLK_REQ<23>
S_IF<55>
CAMD_AVDD_EN<71>
CAMW_AVDD_EN1<71>
CAMW_AVDD_EN<71>
CAMF_AVDD_EN<71>
HST_BT_UART_CTS<75>
HST_BT_UART_RFR<75>
HST_BT_UART_TX<75>
HST_BT_UART_RX<75>
HST_WLAN_EN<75>
HST_BT_EN<75>
FL_STROBE_TRIG<51>
FOD_INT<66>
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
J33
K33
L34
L35
C36
C35
FOD_RST<66>
FOD_LDO_EN<66>
NFC_SE_SPI_MISO<23>
NFC_SE_SPI_MOSI<23>
NFC_SE_SPI_CLK<23>
NFC_SE_SPI_CS<23>
WCD_RESET_N<59>
o
o
SDM_DBG_UART_TX<61>
SDM_DBG_UART_RX<61>
TS_I2C_SDA<33,65>
R3230 2.2K .05 0201
1
R3231 2.2K .05 0201
12
BB
RGB_I2C_SDA<33,62>
RGB_I2C_SCL<33,62>
o
o
o
o
o
o
o
o
o
o
Note: External pulls or logic high on BOOT_CONFIG [4:1] (GPIOs - 27, 47, 76 and 90)
before RESOUT_N getting asserted high can force SM8250 device to boot from an unintended boot device.
VREG_S4A_1P8
2
D37
D35
E37
F37
E36
F36
H36
U3100-3
GPIO_0
GPIO_1
GPIO_2
GPIO_3
R6
GPIO_4
P6
GPIO_5
N6
GPIO_6
M6
GPIO_7
L6
GPIO_8
K6
GPIO_9
J6
GPIO_10
H6
GPIO_11
G6
GPIO_12
F6
GPIO_13
E6
GPIO_14
D6
GPIO_15
C5
GPIO_16
C6
GPIO_17
E7
GPIO_18
D7
GPIO_19
C7
GPIO_20
B7
GPIO_21
A7
GPIO_22
A6
GPIO_23
GPIO_24
GPIO_25
GPIO_26
GPIO_27
R5
GPIO_28
P5
GPIO_29
N5
GPIO_30
M5
GPIO_31
GPIO_32
GPIO_33
GPIO_34
GPIO_35
GPIO_36
4
SM8250-LPDDR5
GPIO_37
GPIO_38
GPIO_39
GPIO_40
GPIO_41
GPIO_42
GPIO_43
GPIO_44
GPIO_45
GPIO_46
GPIO_47
GPIO_48
GPIO_49
GPIO_50
GPIO_51
GPIO_52
GPIO_53
GPIO_54
GPIO_55
GPIO_56
GPIO_57
GPIO_58
GPIO_59
GPIO_60
GPIO_61
GPIO_62
GPIO_63
GPIO_64
GPIO_65
GPIO_66
GPIO_67
GPIO_68
GPIO_69
GPIO_70
GPIO_71
GPIO_72
GPIO_73
APPS_I2C_SDA<33,49,56,62>
APPS_I2C_SCL<33,49,56,62>
J36
J35
K35
AP33
AN33
AM32
AN32
G37
H37
J37
K37
G34
H33
J34
K34
M34
M35
N36
N35
N34
P34
R34
T34
A35
B35
B36
C37
M36
M37
V4
U4
T4
AN35
AP34
AP35
AN34
AM34
R3202 2.2K .05 0201
1
o
R3203 2.2K .05 0201
12
o
APPS
o
TS_I2C_SCL <33,65>
o
TS_RESET_N <65>
o
TS_INT_N <65>
o
FOD_SPI_MISO <66>
o
FOD_SPI_MOSI <66>
o
FOD_SPI_CLK <66>
o
FOD_SPI_CS <66>
o
APPS_I2C_SDA <33,49,56,62>
o
APPS_I2C_SCL <33,49,56,62>
o
LCD_RESET_N <65>
o
RGB_I2C_SDA <33,62>
o
RGB_I2C_SCL <33,62>
o
LCD_ID_DET1 <65>
o
ERR_INT_N <65>
o
MDM_UART_CTS <17>
o
MDM_UART_RFR <17>
o
MDM_UART_TX <17>
o
MDM_UART_RX <17>
o
AP2MDM_STATUS <17>
o
AP2MDM_ERR_FATAL <17>
o
MDM_IPC_HS_UART_TX <17>
o
MDM_IPC_HS_UART_RX <17>
o
HAP_I2C_SDA <33,66>
o
HAP_I2C_SCL <33,66>
o
CAMU_AVDD_EN <71>
o
TS_TA_INT_N <65>
o
USB_CC_DIR <55>
o
MDP_VSYNC_P <65>
o
MOTOR_SLEEP <72>
o
VCI_3P0_EN <65>
o
TP_3P3_EN <65>
2
3
2
R3200 2.2K .05 0201
HAP_I2C_SDA<33,66>
HAP_I2C_SCL<33,66>
o
R3201 2.2K .05 0201
o
1
12
2
1
VREG_S4A_1P8
CAMERAL I2C0
CAM_DOVDD_1P8
R3208 2.2K .05 0201
12
CCI_I2C_SDA0<34,67>
CCI_I2C_SCL0<34,67>
o
R3209 2.2K .05 0201
1
o
2
CAMERAL I2C0
CAM_DOVDD_1P8
R3210 2.2K .05 0201
12
CCI_I2C_SDA2<34,70>
CCI_I2C_SCL2<34,70>
o
R3211 2.2K .05 0201
12
o
CAMERAL I2C2
TP_L1C_1P8
R3216 3K ±1% 0201
12
TS_I2C_SDA<33,65>
TS_I2C_SCL<33,65>
CCI_I2C_SDA1<34,68,69>
CCI_I2C_SCL1<34,68,69>
o
R3217 3K ±1% 0201
12
o
R3206 2.2K .05 0201
12
o
R3207 2.2K .05 0201
12
o
CAM_DOVDD_1P8
CAMERAL I2C1
VREG_S4A_1P8
R3212 2.2K .05 0201
RGB1_I2C_SDA<33,62>
RGB1_I2C_SCL<33,62>
o
o
12
R3213 2.2K .05 0201
2
1
CCI_I2C_SDA3<34,70>
CCI_I2C_SCL3<34,70>
R3218 2.2K .05 0201
12
o
R3219 2.2K .05 0201
12
o
CAM_DOVDD_1P8
CAMERAL I2C3
VREG_L8C_1P8VREG_S4A_1P8
R3214 2.2K .05 0201
12
SSC_SENSOR_I2C_SDA<34,62,66,75>
SSC_SENSOR_I2C_SCL<34,62,66,75>
o
R3215 2.2K .05 0201
o
12
SPKR_I2C_SDA<34,61>
SPKR_I2C_SCL<34,61>
SENSOR I2C4
R3226 2.2K .05 0201
12
o
R3227 2.2K .05 0201
12
o
SPKR I2C
VREG_S4A_1P8
2
VREG_L8C_1P8
2
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
SDM855 GPIO-1
A3
SDM855 GPIO-1
A3
SDM855 GPIO-1
A3
Date:Sheetof
Date:Sheetof
Date:Sheet
3374Monday, December 23, 2019
3374Monday, December 23, 2019
3374Monday, December 23, 2019
1
of
2
VREG_L8C_1P8
R3204 2.2K .05 0201
1
NFC_I2C_SDA<23,33>
NFC_I2C_SCL<23,33>
o
R3205 2.2K .05 0201
1
o
NFC
4
AA
ALS1_I2C_SDA<34,62>
ALS1_I2C_SCL<34,62>
o
o
5
R3228 2.2K .05 0201
1
R3229 2.2K .05 0201
12
2
2
VREG_S4A_1P8
R3224 2.2K .05 0201
o
SSC_MAG_I2C_SCL<34,62,75>
SSC_MAG_I2C_SDA<34,62,75>
12
R3225 2.2K .05 0201
1
o
SENSOR I2C0
3
5
4
3
2
1
DD
o
PCIE0_RST_N<75>
PCIE0_WAKE_N<75>
o
NFC_EN<23>
L3300 56ohm ±25% 0201
12
L3301 56ohm ±25% 0201
1
L3302 56ohm ±25% 0201
1
L3303 56ohm ±25% 0201
1
L3304 56ohm ±25% 0201
1
CAMD_RSTN<70>
SPKR_INT<61>
ALS1_INT_N<62>
P_INT_N<62>
SPKR_PA_RST<61>
INFARED_SPI_MOSI<62>
SPKR_I2C_SDA<33,61>
SPKR_I2C_SCL<33,61>
ACCEL_INT<62>
ALS_INT_N<62>
GYRO_INT<62>
HST_SW_CTRL<75>
RGB1_I2C_SDA<66>
RGB1_I2C_SCL<66>
o
o
2
2
2
2
o
o
o
o
o
o
o
o
o
o
o
o
o
o
PCIE0_CLK_REQ_N<75>
o
PCIE2_RST_N<17>
PCIE2_CLK_REQ_N<17>
CC
CCI_I2C_SDA0<33,67>
CCI_I2C_SCL0<33,67>
CCI_I2C_SDA1<33,68,69>
CCI_I2C_SCL1<33,68,69>
CCI_I2C_SDA2<33,70>
CCI_I2C_SCL2<33,70>
CCI_I2C_SDA3<33,70>
CCI_I2C_SCL3<33,70>
BB
o
o
PCIE2_WAKE_N<17>
o
MDM_VFR_IRQ0<17>
o
MDM_VFR_IRQ1<17>
o
CAMU_RSTN<69>
o
CAMT_RSTN<70>
o
o
CAMW_MCLK0<67>
o
CAMD_MCLK4<70>
o
CAMU_MCLK2<69>
o
CAMF_MCLK3<68>
o
CAMT_MCLK1<70>
o
o
o
o
o
o
o
o
o
CAMW_RSTN<67>
o
NFC_DWL_REQ<23>
o
NFC_INT_REQ<23>
1
C3302
C3301
NM
NM
0201
0201
2
CAMF_RSTN<68>
12
1
1
1
C3300
C3304
C3303
NM
NM
NM
0201
0201
0201
2
2
2
AM33
AG37
AF37
AD37
AE37
U3100-4
D32
GPIO_127
GPIO_74
GPIO_75
GPIO_76
U3
GPIO_77
T3
GPIO_78
E8
GPIO_79
D8
GPIO_80
C9
GPIO_81
B9
GPIO_82
B8
GPIO_83
A8
GPIO_84
L36
GPIO_85
L37
GPIO_86
N37
GPIO_87
B32
GPIO_88
C32
GPIO_89
GPIO_90
GPIO_91
C4
GPIO_92
B4
GPIO_93
R3
GPIO_94
P3
GPIO_95
N3
GPIO_96
M3
GPIO_97
L3
GPIO_98
R4
GPIO_99
N4
GPIO_100
M4
GPIO_101
K3
GPIO_102
J3
GPIO_103
H3
GPIO_104
G3
GPIO_105
F3
GPIO_106
E3
GPIO_107
D3
GPIO_108
C3
GPIO_109
K4
GPIO_110
J4
GPIO_111
G4
GPIO_112
F4
GPIO_113
D4
GPIO_114
L5
GPIO_115
K5
GPIO_116
J5
GPIO_117
H5
GPIO_118
G5
GPIO_119
F5
GPIO_120
E5
GPIO_121
D5
GPIO_122
B5
GPIO_123
A5
GPIO_124
D34
GPIO_125
D33
GPIO_126
GPIO_128
GPIO_129
GPIO_130
GPIO_131
GPIO_132
GPIO_133
GPIO_134
GPIO_135
GPIO_136
GPIO_137
GPIO_138
GPIO_139
GPIO_140
GPIO_141
GPIO_142
GPIO_143
GPIO_144
GPIO_145
GPIO_146
GPIO_147
GPIO_148
GPIO_149
GPIO_150
GPIO_151
GPIO_152
GPIO_153
GPIO_154
GPIO_155
GPIO_156
GPIO_157
GPIO_158
GPIO_159
GPIO_160
GPIO_161
GPIO_162
GPIO_163
GPIO_164
GPIO_165
GPIO_166
GPIO_167
GPIO_168
GPIO_169
GPIO_170
GPIO_171
GPIO_172
GPIO_173
GPIO_174
GPIO_175
GPIO_176
GPIO_177
GPIO_178
GPIO_179
E35
E34
F35
G35
H35
B24
C24
E24
B23
C23
D23
E23
C22
D22
D21
E21
F21
F19
E25
D25
C25
D26
C26
D27
C27
B27
D28
B28
D29
C29
B29
B30
D18
E18
B17
C17
D17
E17
C16
D16
C15
D15
E15
E14
D14
B14
B13
C13
D13
D12
C12
B12
TP3303
TP0.3mm
1
SDM_WDOG_DISABLE
o
DIGITAL_HALL1_RSTN <62>
o
FORCED_USB_BOOT <53,73>
o
DIGITAL_HALL1_INT <62>
o
HAP_DRV_INT <66>
o
HAP_DRV_RSTN <66>
o
MOTOR_FAULT <72>
o
MOTOR_DIR <72>
o
SPKR_I2S_BCK <61>
o
SPKR_I2S_DOUT <61>
o
SPKR_I2S_DIN <61>
o
SPKR_I2S_WS <61>
o
HST_SLIM_CLK <75>
o
HST_SLIM_DATA <75>
o
WCD_SWR_TX_CLK <59>
o
WCD_SWR_TX_DATA0 <59>
o
WCD_SWR_TX_DATA1 <59>
o
WCD_SWR_RX_CLK <59>
o
WCD_SWR_RX_DATA0 <59>
o
WCD_SWR_RX_DATA1 <59>
o
VBUS_NTC_CTRL <66>
o
MOTOR_EN <72>
o
MOTOR_M1 <72>
o
SBU_UART_EN <61>
o
BQ25970_MASTER_INT <56>
o
MOTOR_M0 <72>
o
SSC_MAG_I2C_SDA <33,62,75>
o
SSC_MAG_I2C_SCL <33,62,75>
o
ALS1_I2C_SDA <33,62>
o
ALS1_I2C_SCL <33,62>
o
SSC_SPI1_MISO <62>
o
SSC_SPI1_MOSI <62>
o
SSC_SPI1_CLK <62>
o
SSC_SPI1_CS_N <62>
o
ALS2_I2C_SDA <75>
o
ALS2_I2C_SCL <75>
o
SSC_SENSOR_I2C_SDA <33,62,66,75>
o
SSC_SENSOR_I2C_SCL <33,62,66,75>
o
ALS2_INT <75>
o
HST_BLE_SNS_UART6_TX <75>
o
HST_BLE_SNS_UART6_RX <75>
o
HST_WLAN_UART_TX <75>
o
HST_WLAN_UART_RX <75>
SM8250-LPDDR5
AA
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
SDM855 GPIO-2
A2
SDM855 GPIO-2
A2
SDM855 GPIO-2
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
4
3
2
1
U3100-5
AJ6
CSI0_NC_CLK_P
AJ5
MIPI_WIDE_A0<67>
MIPI_WIDE_B0<67>
REAR CAMERA WIDE
DD
64M
REAR CAMERA ULTRA 13M
CC
BB
REAR CAMERA DEPTH
2M
MIPI_WIDE_C0<67>
MIPI_WIDE_A1<67>
MIPI_WIDE_B1<67>
MIPI_WIDE_C1<67>
MIPI_WIDE_A2<67>
MIPI_WIDE_B2<67>
MIPI_WIDE_C2<67>
MIPI_ULTRA_CLK_P<69>
MIPI_ULTRA_CLK_M<69>
MIPI_ULTRA_LANE0_P<69>
MIPI_ULTRA_LANE0_M<69>
MIPI_ULTRA_LANE1_P<69>
MIPI_ULTRA_LANE1_M<69>
MIPI_ULTRA_LANE2_P<69>
MIPI_ULTRA_LANE2_M<69>
MIPI_ULTRA_LANE3_P<69>
MIPI_ULTRA_LANE3_M<69>
MIPI_DEPTH_CLK_P<70>
MIPI_DEPTH_CLK_M<70>
MIPI_DEPTH_LANE0_P<70>
MIPI_DEPTH_LANE0_M<70>
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
o
AJ4
AJ3
AK6
AK5
AL6
AL5
AL4
AL3
AL10
AL9
AL8
AL7
AK10
AK9
AJ10
AJ9
AJ8
AJ7
AP8
AP7
AP6
AP5
AN8
AN7
AM8
AM7
AM6
AM5
CSI0_A0_CLK_M
CSI0_B0_LN0_P
CSI0_C0_LN0_M
CSI0_A1_LN1_P
CSI0_B1_LN1_M
CSI0_C1_LN2_P
CSI0_A2_LN2_M
CSI0_B2_LN3_P
CSI0_C2_LN3_M
CSI1_NC_CLK_P
CSI1_A0_CLK_M
CSI1_B0_LN0_P
CSI1_C0_LN0_M
CSI1_A1_LN1_P
CSI1_B1_LN1_M
CSI1_C1_LN2_P
CSI1_A2_LN2_M
CSI1_B2_LN3_P
CSI1_C2_LN3_M
CSI2_NC_CLK_P
CSI2_A0_CLK_M
CSI2_B0_LN0_P
CSI2_C0_LN0_M
CSI2_A1_LN1_P
CSI2_B1_LN1_M
CSI2_C1_LN2_P
CSI2_A2_LN2_M
CSI2_B2_LN3_P
CSI2_C2_LN3_M
SM8250-LPDDR5
CSI3_NC_CLK_P
CSI3_A0_CLK_M
CSI3_C0_LN0_M
CSI3_B1_LN1_M
CSI3_A2_LN2_M
CSI3_C2_LN3_M
CSI4_NC_CLK_P
CSI4_A0_CLK_M
CSI4_C0_LN0_M
CSI4_B1_LN1_M
CSI4_A2_LN2_M
CSI4_C2_LN3_M
CSI5_NC_CLK_P
CSI5_A0_CLK_M
CSI5_C0_LN0_M
CSI5_B1_LN1_M
CSI5_A2_LN2_M
CSI5_C2_LN3_M
DSI0_B0_LN0_M
DSI0_A1_LN1_M
DSI0_C1_CLK_M
DSI0_B2_LN2_M
DSI0_NC_LN3_M
DSI1_B0_LN0_M
DSI1_A1_LN1_M
DSI1_C1_CLK_M
DSI1_B2_LN2_M
DSI1_NC_LN3_M
CSI3_B0_LN0_P
CSI3_A1_LN1_P
CSI3_C1_LN2_P
CSI3_B2_LN3_P
CSI4_B0_LN0_P
CSI4_A1_LN1_P
CSI4_C1_LN2_P
CSI4_B2_LN3_P
CSI5_B0_LN0_P
CSI5_A1_LN1_P
CSI5_C1_LN2_P
CSI5_B2_LN3_P
DSI0_A0_LN0_P
DSI0_C0_LN1_P
DSI0_B1_CLK_P
DSI0_A2_LN2_P
DSI0_C2_LN3_P
DSI1_A0_LN0_P
DSI1_C0_LN1_P
DSI1_B1_CLK_P
DSI1_A2_LN2_P
DSI1_C2_LN3_P
AH16
AH15
AH14
AH13
AJ16
AJ15
AK16
AK15
AK14
AK13
AN16
AN15
AN14
AN13
AM16
AM15
AL16
AL15
AL14
AL13
AK20
AK19
AK18
AK17
AL20
AL19
AM20
AM19
AM18
AM17
AM26
AM27
AM28
AM29
AL26
AL27
AK26
AK27
AK28
AK29
AM22
AM23
AM24
AM25
AL22
AL23
AK22
AK23
AK24
AK25
o
MIPI_TELE_CLK_P <70>
o
MIPI_TELE_CLK_M <70>
o
MIPI_TELE_LANE0_P <70>
o
MIPI_TELE_LANE0_M <70>
o
MIPI_TELE_LANE1_P <70>
o
MIPI_TELE_LANE1_M <70>
o
MIPI_TELE_LANE2_P <70>
o
MIPI_TELE_LANE2_M <70>
o
MIPI_TELE_LANE3_P <70>
o
MIPI_TELE_LANE3_M <70>
o
MIPI_F_CLK_P <68>
o
MIPI_F_CLK_M <68>
o
MIPI_F_LANE0_P <68>
o
MIPI_F_LANE0_M <68>
o
MIPI_F_LANE1_P <68>
o
MIPI_F_LANE1_M <68>
o
MIPI_F_LANE2_P <68>
o
MIPI_F_LANE2_M <68>
o
MIPI_F_LANE3_P <68>
o
MIPI_F_LANE3_M <68>
o
MIPI_DSI0_LANE0_P <65>
o
MIPI_DSI0_LANE0_M <65>
o
MIPI_DSI0_LANE1_P <65>
o
MIPI_DSI0_LANE1_M <65>
o
MIPI_DSI0_CLK_P <65>
o
MIPI_DSI0_CLK_M <65>
o
MIPI_DSI0_LANE2_P <65>
o
MIPI_DSI0_LANE2_M <65>
o
MIPI_DSI0_LANE3_P <65>
o
MIPI_DSI0_LANE3_M <65>
REAR CAMERA TELE
8M
20M
FRONT CAMERA
DISPLAY
AA
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
SDM855 MIPI
A2
SDM855 MIPI
A2
SDM855 MIPI
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
DD
CC
4
3
2
1
BB
A
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
Reserved(for MIPI)
A4
Reserved(for MIPI)
A4
Reserved(for MIPI)
A4
of
Date:Sheetof
Date:Sheetof
5
4
3
Date:Sheet
2
3674Monday, December 23, 2019
3674Monday, December 23, 2019
3674Monday, December 23, 2019
1
5
PCIE0_REFCLK_M_WLAN<75>
PCIE0_REFCLK_P_WLAN<75>
o
o
4
U3100-6
Y6
PCIE0_REFCLK_M
Y7
PCIE0_REFCLK_P
3
2
1
PCIE0_RX0_M_WLAN<75>
PCIE0_RX0_P_WLAN<75>
DD
PCIE0_TX0_M_WLAN<75>
PCIE0_TX0_P_WLAN<75>
o
o
o
o
C3601 100nF
2
1
02016.3V
C3602 100nF
2
1
0201 6.3V
CC
+/-10%
+/-10%
W6
PCIE0_RX_M
W7
PCIE0_RX_P
U6
PCIE0_TX_M
U7
PCIE0_TX_P
AD7
PCIE1_REFCLK_M
AD6
PCIE1_REFCLK_P
AB7
PCIE1_RX0_M
AB6
PCIE1_RX0_P
AC7
PCIE1_RX1_M
AC6
PCIE1_RX1_P
AG7
PCIE1_TX0_M
AG6
PCIE1_TX0_P
AF7
PCIE1_TX1_M
AF6
PCIE1_TX1_P
BB
PCIE2_REFCLK_M_MDM<17>
PCIE2_REFCLK_P_MDM<17>
PCIE2_RX0_M_MDM<17>
PCIE2_RX0_P_MDM<17>
PCIE2_RX1_M_MDM<17>
PCIE2_RX1_P_MDM<17>
PCIE2_TX0_M_MDM<17>
PCIE2_TX0_P_MDM<17>
A
PCIE2_TX1_M_MDM<17>
PCIE2_TX1_P_MDM<17>
5
o
o
o
o
o
o
o
o
o
o
2
1
C3603220nF020110V±10%
2
1
C3604220nF020110V±10%
2
1
C3605220nF020110V±10%
2
1
C3606220nF020110V±10%
AE34
AE35
AG34
AG35
AF34
AF35
AJ34
AJ33
AK34
AK33
4
PCIE2_REFCLK_M
PCIE2_REFCLK_P
PCIE2_RX0_M
PCIE2_RX0_P
PCIE2_RX1_M
PCIE2_RX1_P
PCIE2_TX0_M
PCIE2_TX0_P
PCIE2_TX1_M
PCIE2_TX1_P
SM8250-LPDDR5
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
SDM855 RF INTF
A3
SDM855 RF INTF
A3
SDM855 RF INTF
A3
Date:Sheet
Date:Sheet
3
2
Date:Sheet
3774Monday, December 23, 2019
3774Monday, December 23, 2019
3774Monday, December 23, 2019
1
5
4
3
2
1
U3100-7
DD
VREF_MSM
U32
3mA
9mA
245mA
C3706
1uF
+/-20%
DC 6.3V
0201
C3709
1uF
+/-20%
DC 6.3V
0201
C3712
2.2uF
±20%
6.3V
0201
40mA
C3713
1uF
+/-20%
DC 6.3V
0201
38.4mA
AC33
V31
K29
A12
A29
AP12
AP29
A21
A22
A23
AP21
AP22
AP23
A14
A15
A16
A25
A26
A27
AP14
AP15
AP16
AP25
AP26
AP27
L26
H25
VDD_A_QREFS_1P25
VDD_A_QREFS_1P8
VDD_A_NPU_Q6_CS_1P8
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD2L_1
VDD2L_2
VDD2L_3
VDD2L_4
VDD2L_5
VDD2L_6
VDD2H_1
VDD2H_2
VDD2H_3
VDD2H_4
VDD2H_5
VDD2H_6
VDD2H_7
VDD2H_8
VDD2H_9
VDD2H_10
VDD2H_11
VDD2H_12
VDD_USB_HS_CORE
VDD_QFPROM
VDD_QFPROM_SP
SM8250-LPDDR5
C3701
12
VREG_S4A_1P8
VREG_L3A_0P9
CC
VDD2LLP5 only
100nF
+/-10%
6.3V
0201
C3703
12
1uF
+/-20%
DC 6.3V
0201
VREG_S1H_1P05
1
R3700
NM
0201
12
VREG_L12A_1P8
C3704
12
1uF
+/-20%
DC 6.3V
0201
2
C3705
1uF
+/-20%
DC 6.3V
0201
12
12
C3708
1uF
+/-20%
DC 6.3V
0201
C3702
1uF
+/-20%
DC 6.3V
0201
12
244mA
1
2
1957mA
12
C3710
1
1uF
+/-20%
DC 6.3V
2
0201
BB
A
VREG_S10A_0P75
VREG_S7A_S8A_S9A_0P75
VREG_S4C_S5C_0P75
VREG_S1A_S2A_S3A_0P75
VREG_S1C_S2C_0P75
VREG_L11A_0P75
5
W29
W30
AA22
AA21
AC13
AD27
P33
N13
N12
L12
J22
J23
U3100-1
VDD_APC0_1
GND4
VDD_APC1_1
GND1
VDD_MM_1
DNC2
VDD_CX_1
GND3
DNC7
VDD_GFX_1
VDD_LPI_CX_1
GND2
SM8250-LPDDR5
4
12
C3711
NM
0201
VREG_L5A_0P88
VREG_L12A_1P8
12
VDD_GFX_2
VDD_GFX_3
VDD_GFX_4
VDD_GFX_5
VDD_GFX_6
VDD_GFX_7
VDD_GFX_8
VDD_GFX_9
VDD_GFX_10
VDD_GFX_11
VDD_GFX_12
VDD_GFX_13
VDD_GFX_14
VDD_GFX_15
VDD_GFX_16
VDD_GFX_17
VDD_GFX_18
VDD_GFX_19
VDD_GFX_20
VDD_GFX_21
VDD_GFX_22
VDD_GFX_23
VDD_GFX_24
VDD_GFX_25
VDD_GFX_26
VDD_GFX_27
VDD_APC0_3
VDD_APC0_4
VDD_APC0_5
VDD_APC0_6
VDD_APC0_7
VDD_APC0_8
VDD_APC0_9
VDD_APC0_10
VDD_APC0_11
VDD_APC0_12
VDD_APC0_13
VDD_APC0_2
VDD_APC1_2
VDD_APC1_3
VDD_APC1_4
VDD_APC1_5
VDD_APC1_6
VDD_APC1_7
VDD_APC1_8
VDD_APC1_9
VDD_APC1_10
VDD_APC1_11
VDD_APC1_12
VDD_APC1_13
VDD_APC1_14
VDD_APC1_15
VDD_APC1_16
VDD_APC1_17
VDD_APC1_18
VDD_APC1_19
VDD_APC1_20
VDD_APC1_21
VDD_APC1_22
VDD_APC1_23
VDD_APC1_24
G12
G13
G14
G16
G18
H7
H9
H11
J8
12314mA
J10
J12
J18
K11
L14
L16
L18
M11
N7
P11
R8
R10
T9
T11
T13
U8
U10
U27
U29
V28
V30
W25
W27
W31
Y26
Y28
Y30
Y31
AA27
AA24
AA25
AA29
AA31
AB21
AB32
AC22
AC31
AD21
AD32
AE22
AE26
AE27
AE31
AF22
AF26
AF27
AF32
AG23
AG24
AG25
AG29
AG31
13
C3714
22uF
2
1926.8mA
C3718
1
1uF
+/-20%
DC 6.3V
2
0201
14590.1mA
C3723
22uF
3
4
C3715
22uF
12
13
2
4
C3719
1uF
+/-20%
DC 6.3V
0201
13
2
4
12
C3724
22uF
C3720
10uF
±20%
6.3V
0402
13
C3716
22uF
12
2
4
1
2
4
C3721
NM
0402
VREG_S7A_S8A_S9A_0P75
C3725
22uF
C3722
22uF
3
1
C3717
22uF
2
13
13
2
4
3
4
VREG_S1C_S2C_0P75
2
4
VREG_S10A_0P75
1
C3726
22uF
2
W3705
2
o
112
SHORT
W3706
112
SHORT
1
3
C3727
22uF
2
4
4
SNS_S1C_S2C_P <49>
o
SNS_S1C_S2C_M <49>
o
2
SNS_S10A_P <45>
2
o
SNS_S10A_M <45>
2
VDDGFX
VDDAPC0
W3703
112
SHORT
W3704
112
SHORT
2
o
SNS_S7A_S8A_S9A_P <45>
2
o
SNS_S7A_S8A_S9A_M <45>
VDDAPC1
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
SDM855 PWR1
A2
SDM855 PWR1
A2
SDM855 PWR1
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
1
2
W3701
112
SHORT
W3702
112
SHORT
3
5
4
3
2
1
C3807
22uF
C3802
12
10uF
±20%
6.3V
0402
1
VREG_S6C_0P88
3
2
4
C3803
22uF
13
C3808
1
1uF
+/-20%
DC 6.3V
2
0201
2
C3846
12
1uF
+/-20%
DC 6.3V
4
0201
C3809
12
12
1uF
+/-20%
DC 6.3V
0201
VREG_S1A_S2A_S3A_0P75
C3801
12
1uF
+/-20%
DC 6.3V
0201
VREG_S6C_0P88
VREG_L9A_1P2
VREG_L12A_1P8
C3847
1
1uF
+/-20%
DC 6.3V
2
0201
VREG_L5A_0P88
C3804
12
2.2uF
±20%
6.3V
0201
C3858
12
1uF
+/-20%
DC 6.3V
0201
C3859
12
1uF
+/-20%
DC 6.3V
0201
C3806
2.2uF
±20%
6.3V
0201
12
1
2
12
12
C3856
1uF
+/-20%
DC 6.3V
0201
C3860
1uF
+/-20%
DC 6.3V
0201
C3848
1uF
+/-20%
DC 6.3V
0201
C3853
2.2uF
±20%
6.3V
0201
930mA
12
VREG_L9A_1P2
29.4mA
26.2mA
1201.2mA
C3854
12
2.2uF
±20%
6.3V
0201
357.8mA
C3857
12
1uF
+/-20%
DC 6.3V
0201
103.4mA
270.8mA
C3861
1
1uF
+/-20%
DC 6.3V
2
0201
4.1mA
C3864
12
1uF
+/-20%
DC 6.3V
0201
C3879
1uF
+/-20%
DC 6.3V
0201
G8
G9
AG9
AH9
G28
G29
AH28
AH29
AK11
AH17
F11
G10
G11
AH10
AH11
AJ11
F30
G30
G31
AH30
AJ30
AJ31
E12
AK12
E27
AJ28
F9
AH8
F29
AJ29
E9
AH7
E30
AJ32
AG28
R13
U3100-8
SM8250-LPDDR5
VDD_A_EBI0_1
VDD_A_EBI0_2
VDD_A_EBI1_1
VDD_A_EBI1_2
VDD_A_EBI2_1
VDD_A_EBI2_2
VDD_A_EBI3_1
VDD_A_EBI3_2
VDD_A_CSI345_1P2
VDD_A_CSI4_5_0P9
VDD_IO_EBI0_1
VDD_IO_EBI0_2
VDD_IO_EBI0_3
VDD_IO_EBI1_1
VDD_IO_EBI1_2
VDD_IO_EBI1_3
VDD_IO_EBI2_1
VDD_IO_EBI2_2
VDD_IO_EBI2_3
VDD_IO_EBI3_1
VDD_IO_EBI3_2
VDD_IO_EBI3_3
VDD_D_EBI0
VDD_D_EBI1
VDD_D_EBI2
VDD_D_EBI3
VDD_A_PLL_EBI0
VDD_A_PLL_EBI1
VDD_A_PLL_EBI2
VDD_A_PLL_EBI3
VDD_A_HV_EBI0
VDD_A_HV_EBI1
VDD_A_HV_EBI2
VDD_A_HV_EBI3
VDD_A_APC_CS_1P8
VDD_A_GFX_CS_1P8
VDD_A_PCIE0_PLL_1P2
VDD_A_PCIE1_PLL_1P2
VDD_A_PCIE2_PLL_1P2
VDD_A_UFS0_1P2
VDD_A_UFS1_1P2
VDD_A_USB0_SS_DP_1P2
VDD_A_USB1_SS_1P2
VDD_A_DSI_1P2
VDD_A_USB_HS_1P8
VDD_A_USB_HS_3P1
VDD_A_UFS0_CORE
VDD_A_UFS1_CORE
VDD_A_PCIE0_CORE
VDD_A_PCIE1_CORE
VDD_A_PCIE2_CORE
VDD_A_USB0_SS_DP_CORE
VDD_A_USB1_SS_CORE
VDD_A_DSI_PLL_0P9
VDD_A_CSI0_0P9
VDD_A_CSI012_1P2
VDD_A_CSI1_2_0P9
VDD_A_CSI3_0P9
VDD_A_DSI_0P9
VDD_A_SP_SENSOR
AB8
16mA
AB9
25mA
C3867
C3866
12
AD34
1uF
1uF
25.5mA
+/-20%
+/-20%
DC 6.3V
DC 6.3V
0201
0201
Y34
18.8mA
Y8
18.3mA
Y35
33mA
AD35
15mA
AH26
53.4mA
AE33
1mA
AH34
0.4mA
Y33
89.8mA
AA7
87.1mA
AA6
73.5mA
AC8
98.8mA
AH33
98.8mA
AB33
173.7mA
AG33
AH23
19.2mA
AF8
78.7mA
AE8
AG8
AH18
AH24
J26
73.8mA
1.4mA
C3876
+/-20%
DC 6.3V
1uF
0201
VDDA
SNS_S6C_P<50>
SNS_S6C_M<50>
DD
W3803
2
o
112
SHORT
W3804
2
1
o
2
1
SHORT
VDDQ/VDDIO_EBI
VREG_S7C_0P6
W3805
2
o
SNS_S7C_P<50>
SNS_S7C_M<50>
CC
112
SHORT
W3806
o
112
SHORT
13
C3805
22uF
2
4
2
Share caps with VDDCX
BB
12
12
C3865
+/-20%
DC 6.3V
C3871
+/-20%
DC 6.3V
C3874
+/-20%
DC 6.3V
1uF
0201
1uF
0201
1uF
0201
VREG_L9A_1P2
C3868
12
1
1uF
+/-20%
DC 6.3V
2
0201
VREG_L12A_1P8
VREG_L2A_3P1
C3869
1
1uF
+/-20%
DC 6.3V
2
0201
VREG_L5A_0P88
C3870
12
12
1uF
+/-20%
DC 6.3V
0201
VREG_L18A_0P92
C3873
C3872
12
1uF
1uF
+/-20%
+/-20%
DC 6.3V
DC 6.3V
0201
0201
VREG_L5A_0P88 VREG_L9A_1P2
C3875
12
12
1uF
+/-20%
DC 6.3V
0201
VREG_L5A_0P88
C3878
1uF
+/-20%
DC 6.3V
0201
1
2
29.4mA
12
AA
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
SDM855 PWR2
A2
SDM855 PWR2
A2
SDM855 PWR2
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
12
R39180R
±5%0201
DD
VREG_S4A_1P8
108.5mA
C3982
12
1uF
+/-20%
DC 6.3V
0201
VDDPX_3
VREG_L6A_1P2
VREG_L12A_1P8
VREG_SP_1P85
C3988
C3987
1
1
1uF
1uF
+/-20%
+/-20%
DC 6.3V
DC 6.3V
2
2
0201
0201
CC
VREG_S7C_0P6
share caps with VDDIO_EBI
1
1
W3907
1
SHORT
W3908
1
SHORT
2
2
VREG_S4C_S5C_0P75
2
13
C3912
22uF
2
2
1
C3914
22uF
4
2
C3993
NM
0402
4
2
1
3
VDDMM
SNS_S4C_S5C_P<49,50>
BB
AA
SNS_S4C_S5C_M<49,50>
o
o
C3981
1
1uF
+/-20%
DC 6.3V
2
0201
C3986
12
1uF
+/-20%
DC 6.3V
0201
VREG_L4A_0P75
C3901
12
12
1uF
+/-20%
DC 6.3V
0201
C3994
1
10uF
±20%
6.3V
2
0402
VREG_L11A_0P75
12
4
1
2
12
C3989
4.7uF
±20%
6.3V
0402
C3996
1uF
+/-20%
DC 6.3V
0201
C3983
1uF
+/-20%
DC 6.3V
0201
C3980
1uF
+/-20%
DC 6.3V
0201
C3979
12
1uF
+/-20%
DC 6.3V
0201
0.1mA
176.7mA
397mA
5765.3mA
C3991
1
10uF
±20%
6.3V
2
0402
669mA
0.1mA
20mA
G23
V7
F7
F13
F16
F33
G19
G26
H34
L7
L33
T6
U36
W4
T35
U31
G25
V6
J24
K23
L24
A10
A11
A30
A31
AP10
AP11
AP30
AP31
AA9
AA11
AA13
AC9
AC11
AE9
AE11
AE13
AE15
AE17
AF16
AF18
AG11
AG13
AG15
AG17
H19
H20
H22
H23
U3100-9
VDD_PX0
VDD_PX2
VDD_PX3_1
VDD_PX3_2
VDD_PX3_3
VDD_PX3_4
VDD_PX3_5
VDD_PX3_6
VDD_PX3_7
VDD_PX3_8
VDD_PX3_9
VDD_PX3_10
VDD_PX3_11
VDD_PX10A
VDD_PX10B
VDD_PX11
VDD_PX13
VDD_PXVBIAS_SDC
VDD_LPI_MX_1
VDD_LPI_MX_2
VDD_LPI_MX_3
VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDD_MM_2
VDD_MM_3
VDD_MM_4
VDD_MM_5
VDD_MM_6
VDD_MM_7
VDD_MM_8
VDD_MM_9
VDD_MM_10
VDD_MM_11
VDD_MM_12
VDD_MM_13
VDD_MM_14
VDD_MM_15
VDD_MM_16
VDD_MM_17
VDD_LPI_CX_2
VDD_LPI_CX_3
VDD_LPI_CX_4
VDD_LPI_CX_5
SM8250-LPDDR5
VDD_CX_3
VDD_CX_4
VDD_CX_5
VDD_CX_6
VDD_CX_7
VDD_CX_8
VDD_CX_9
VDD_CX_10
VDD_CX_11
VDD_CX_12
VDD_CX_13
VDD_CX_14
VDD_CX_15
VDD_CX_16
VDD_CX_17
VDD_CX_18
VDD_CX_19
VDD_CX_20
VDD_CX_21
VDD_CX_22
VDD_CX_23
VDD_CX_24
VDD_CX_25
VDD_CX_26
VDD_CX_27
VDD_CX_28
VDD_CX_29
VDD_CX_30
VDD_CX_31
VDD_CX_32
VDD_CX_33
VDD_CX_34
VDD_CX_35
VDD_CX_36
VDD_CX_37
VDD_CX_38
VDD_CX_39
VDD_CX_40
VDD_CX_41
VDD_CX_42
VDD_CX_43
VDD_CX_44
VDD_CX_45
VDD_CX_46
VDD_CX_47
VDD_CX_48
VDD_CX_49
VDD_CX_50
VDD_CX_51
VDD_CX_52
VDD_CX_53
VDD_CX_54
VDD_CX_55
VDD_CX_2
3
H27
11353.7mA
H29
J21
J28
J30
J32
K21
K22
K27
K31
L20
L32
M19
M21
M23
M27
M31
M33
N16
N18
N20
N22
N24
N26
N32
P17
P21
P27
P31
R16
R18
R20
R22
R24
R26
R32
T21
T23
T25
T27
T29
T31
T33
U22
U24
V20
V21
V26
W22
W24
Y20
Y21
Y23
AB20
C3917
22uF
1
2
SNS_S3C_P<49>
SNS_S3C_M<49>
3
C3918
22uF
4
VDDMX
13
2
4
o
o
13
C3919
22uF
2
W3911
2
112
SHORT
W3912
2
1
2
1
SHORT
4
C3921
22uF
C3907
12
10uF
±20%
6.3V
0402
VREG_S3C_0P75
13
4
2
C3906
1
10uF
±20%
6.3V
2
0402
12
C3908
NM
0402
2
VREG_S1A_S2A_S3A_0P75
W3909
2
12
C3902
C3997
1
1
10uF
10uF
±20%
2
C3904
±20%
6.3V
0402
NM
6.3V
0402
2
0402
1
VDDCX
12
C3900
1uF
+/-20%
DC 6.3V
0201
J7
M13
M15
N14
P13
P15
R14
T16
T18
U11
U13
U15
V8
V16
V18
W9
W11
W13
W15
W17
Y18
AA15
AA17
AB18
AC15
AC17
AD18
AD20
AF20
AF21
AG20
AG22
6137.25mA
C3913
C3909
12
1
1uF
10uF
+/-20%
±20%
DC 6.3V
6.3V
2
0201
0402
2
1
SHORT
W3910
2
112
SHORT
U3100-10
VDD_MX_12
VDD_MX_13
VDD_MX_14
VDD_MX_15
VDD_MX_16
VDD_MX_17
VDD_MX_18
VDD_MX_19
VDD_MX_20
VDD_MX_21
VDD_MX_22
VDD_MX_23
VDD_MX_24
VDD_MX_25
VDD_MX_26
VDD_MX_27
VDD_MX_28
VDD_MX_29
VDD_MX_30
VDD_MX_31
VDD_MX_32
VDD_MX_1
VDD_MX_2
VDD_MX_3
VDD_MX_4
VDD_MX_5
VDD_MX_6
VDD_MX_7
VDD_MX_8
VDD_MX_9
VDD_MX_10
VDD_MX_11
SM8250-LPDDR5
o
SNS_S1A_S2A_S3A_P <44>
o
SNS_S1A_S2A_S3A_M <44>
1
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
Size Document Number
Size Document Number
Size Document Number
SDM855 PWR3
A2
SDM855 PWR3
A2
SDM855 PWR3
A2
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
DD
CC
4
3
2
1
BB
A
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
SDM855 PWR4
A4
SDM855 PWR4
A4
SDM855 PWR4
A4
Date:Sheet
Date:Sheet
5
4
3
Date:Sheet
2
4174Monday, December 23, 2019
4174Monday, December 23, 2019
4174Monday, December 23, 2019
1
5
DD
4
3
2
1
U3100-12
A1
GND5
A2
GND6
A3
GND7
A4
GND8
A13
GND9
A17
GND10
A20
GND11
A24
GND12
A28
GND13
A32
GND14
A36
GND15
A37
GND16
A38
GND17
A39
B10
B11
B15
B16
B18
B20
B21
B22
B25
B26
B31
B34
B37
B38
B39
C14
C18
C20
C28
C30
C31
C38
C39
D19
D20
D24
D36
D39
B1
B2
B3
B6
C1
C2
C8
D1
GND18
GND231
GND232
GND233
GND234
GND235
GND236
GND237
GND238
GND239
GND240
GND241
GND242
GND243
GND244
GND245
GND246
GND247
GND248
GND249
GND250
GND251
GND252
GND253
GND254
GND255
GND256
GND257
GND258
GND259
GND260
GND261
GND262
GND263
GND264
GND265
GND266
SM8250-LPDDR5
CC
BB
GND267
GND268
GND269
GND270
GND271
GND272
GND273
GND274
GND275
GND276
GND277
GND278
GND279
GND280
GND281
GND282
GND283
GND284
GND285
GND286
GND287
GND288
GND289
GND290
GND291
GND292
GND293
GND294
GND295
GND296
GND297
GND298
GND299
GND300
GND301
GND302
GND303
GND304
GND305
GND306
GND307
GND308
GND309
GND310
GND311
GND312
GND313
GND314
GND315
GND316
E2
E4
E11
E13
E16
E20
E22
E26
E28
E31
E32
E33
E38
F1
F8
F10
F12
F14
F15
F17
F18
F20
F22
F23
F25
F26
F27
F28
F31
F32
F34
F39
G2
G7
G15
G17
G20
G21
G22
G24
G27
G32
G33
G36
G38
H1
H4
H8
H10
H12
U3100-13
H18
GND317
H24
GND318
H26
GND319
H28
GND320
H30
GND321
H31
GND322
H32
GND323
H39
GND324
J2
GND325
J9
GND326
J11
GND327
J20
GND328
J31
GND329
J38
GND330
K1
GND331
K7
GND332
K12
GND333
K18
GND334
K19
GND335
K25
GND336
K28
GND337
K30
GND338
K32
GND339
K36
GND340
K39
GND341
L2
GND342
L4
GND343
L11
GND344
L13
GND345
L15
GND346
L17
GND347
L21
GND348
L23
GND349
L27
GND350
L31
GND351
L38
GND352
M1
GND353
M7
GND354
M12
GND355
M17
GND356
M22
GND357
M25
GND358
M32
GND359
M39
GND360
N2
GND361
N11
GND362
N27
GND363
N31
GND364
N33
GND365
N38
GND366
SM8250-LPDDR5
GND367
GND368
GND369
GND370
GND371
GND372
GND373
GND374
GND375
GND376
GND377
GND378
GND379
GND380
GND381
GND382
GND383
GND384
GND385
GND386
GND387
GND388
GND389
GND390
GND391
GND392
GND393
GND394
GND395
GND396
GND397
GND398
GND399
GND400
GND401
GND402
GND403
GND404
GND405
GND406
GND407
GND408
GND409
GND410
GND411
GND412
GND413
GND414
GND415
GND416
P1
P4
P7
P12
P16
P19
P23
P25
P32
P35
P36
P37
P39
R2
R7
R9
R11
R27
R31
R33
R35
R38
T1
T5
T7
T8
T10
T12
T14
T15
T17
T19
T22
T24
T26
T28
T30
T32
T39
U2
U5
U18
U20
U26
U30
U38
V1
V5
V9
V10
V12
V14
V15
V17
V19
V23
V25
V27
V29
V32
V35
V39
W19
W21
W28
W32
W35
W38
Y10
Y12
Y14
Y16
Y22
Y24
Y27
Y29
Y36
Y39
AA2
AA3
AA4
AA8
AA19
AA23
AA26
AA28
AA30
AA32
AA33
AA36
AA38
AB1
AB5
AB10
W2
W5
W8
Y1
Y5
Y9
U3100-14
GND417
GND418
GND419
GND420
GND421
GND422
GND423
GND424
GND425
GND426
GND427
GND428
GND429
GND430
GND431
GND432
GND433
GND434
GND435
GND436
GND437
GND438
GND439
GND440
GND441
GND442
GND443
GND444
GND445
GND446
GND447
GND448
GND449
GND450
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
SM8250-LPDDR5
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
GND77
GND78
GND79
GND80
GND81
GND82
GND83
GND84
AB12
AB14
AB16
AB22
AB26
AB27
AB31
AB36
AB39
AC2
AC3
AC4
AC5
AC19
AC21
AC26
AC27
AC32
AC36
AC37
AC38
AD1
AD5
AD8
AD9
AD10
AD12
AD14
AD16
AD22
AD26
AD31
AD33
AD36
AD39
AE2
AE5
AE6
AE7
AE19
AE21
AE32
AE36
AE38
AF1
AF5
AF9
AF10
AF12
AF14
AF31
AF33
AF36
AF39
AG2
AG3
AG4
AG5
AG10
AG12
AG14
AG16
AG18
AG19
AG21
AG26
AG27
AG30
AG32
AG36
AG38
AH1
AH3
AH4
AH5
AH6
AH12
AH19
AH20
AH21
AH22
AH25
AH27
AH31
AH32
AH35
AH36
AH37
AH39
AJ2
AJ13
AJ14
AJ17
AJ18
AJ19
AJ20
AJ21
AJ22
AJ23
AJ24
U3100-15
GND85
GND86
GND87
GND88
GND89
GND90
GND91
GND92
GND93
GND94
GND95
GND96
GND97
GND98
GND99
GND100
GND101
GND102
GND103
GND104
GND105
GND106
GND107
GND108
GND109
GND110
GND111
GND112
GND113
GND114
GND115
GND116
GND117
GND118
GND119
GND120
GND121
GND122
GND123
GND124
GND125
GND126
GND127
GND128
GND129
GND130
GND131
GND132
GND133
GND134
SM8250-LPDDR5
GND135
GND136
GND137
GND138
GND139
GND140
GND141
GND142
GND143
GND144
GND145
GND146
GND147
GND148
GND149
GND150
GND151
GND152
GND153
GND154
GND155
GND156
GND157
GND158
GND159
GND160
GND161
GND162
GND163
GND164
GND165
GND166
GND167
GND168
GND169
GND170
GND171
GND172
GND173
GND174
GND175
GND176
GND177
GND178
GND179
GND180
GND181
GND182
GND183
GND184
AJ25
AJ26
AJ27
AJ35
AJ38
AK1
AK3
AK4
AK7
AK8
AK21
AK30
AK31
AK32
AK35
AK36
AK37
AK39
AL1
AL2
AL11
AL12
AL17
AL18
AL21
AL24
AL25
AL28
AL29
AL30
AL31
AL32
AL33
AL34
AL35
AL38
AL39
AM1
AM2
AM3
AM4
AM9
AM10
AM11
AM12
AM13
AM14
AM21
AM30
AM31
AM35
AM38
AM39
AN1
AN2
AN3
AN4
AN5
AN6
AN9
AN10
AN11
AN12
AN17
AN18
AN19
AN20
AN21
AN22
AN23
AN24
AN25
AN26
U3100-16
GND185
GND186
GND187
GND188
GND189
GND190
GND191
GND192
GND193
GND194
GND195
GND196
GND197
GND198
GND199
GND200
GND201
GND202
GND203
GND204
GND205
GND206
GND207
SM8250-LPDDR5
GND208
GND209
GND210
GND211
GND212
GND213
GND214
GND215
GND216
GND217
GND218
GND219
GND220
GND221
GND222
GND223
GND224
GND225
GND226
GND227
GND228
GND229
GND230
AN27
AN28
AN29
AN30
AN31
AN36
AN37
AN38
AN39
AP1
AP2
AP3
AP4
AP9
AP13
AP17
AP20
AP24
AP28
AP36
AP37
AP38
AP39
AA
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
SDM855 GND
A3
SDM855 GND
A3
SDM855 GND
A3
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
Date:Sheet
Monday, December 23, 2019
5
4
3
2
Date:Sheet
1
5
4
3
2
1
Note: Refer to 80-VP447-10 for XO Layout App Note.
Layout Note:
No trace shall be present in at-least two immediate layers below XTAL.
Route XTAL_IN and XTAL_OUT traces on surface layer only, with length
between 3mm and 10mm.
Pseudo capless allows users to place the LDO output capacitor physically/electrically far from the LDO output, near the load. The routing ESL/ESR between the PMIC pin and the remote Cout should meet the capless LDO spec.
All PMOS LDOs are considered pseudo-capless, unless it has internal PMIC load. If an internal PMIC load, the output cap must be placed close to the PMIC.
Required capacitance for each LDO type can be found in App Note: 80-VT310-125
Note: Similar to PM8250, please
ensure that a minimum of three
10uF bulk capacitors are present on
PM8150L/A VPH_PWR primarily to
CC
support the SMPS buck regulators
even if BoB or Lighting Modules are
unused. For PM8150L, the three
10uF bulk capacitors on VPH_PWR
are fulfilled by the 10uF capacitors
for BoB, WLED, and LCDB. For the
PM8150A, the three 10uF bulk
capacitors on VPH_PWR are
fulfilled by the 10uF caps for BoB,
OLEDB, ELVDD, and ELVSS.
Note: GPIO_04 and GPIO_11 of PM8150B are for internal usage. Keep them float.
Keep GPIO_03 of PM8150B float. Don't use it for other purpose.
GPIO_06 of PM8150B is dedicated for SMB_STAT. Don't use it for other purpose.
A
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
PM855B CTRL&GND
A4
PM855B CTRL&GND
A4
PM855B CTRL&GND
A4
of
Date:Sheetof
Date:Sheetof
5
4
3
Date:Sheet
2
5374Monday, December 23, 2019
5374Monday, December 23, 2019
5374Monday, December 23, 2019
1
5
4
3
2
1
DD
VPH_PWR
U5200-3
2
HAP_PWM_IN_1
16
HAP_PWM_IN_2
43
VDD_HAP
44
PGND_HAP
±20%
6.3V
C5307
VREG_BOB
12
1uF
0201
CC
45
GND_HAP_HRLED
71
VDD_HR_LED
PM8150B
VSW_HAP_P_1
VSW_HAP_M_1
VSW_HAP_M_2
VSW_HAP_M_3
HR_LED_1
HR_LED_2
29
1
15
30
58
57
BB
A
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
PM855B HAPTIC
A4
PM855B HAPTIC
A4
PM855B HAPTIC
A4
of
Date:Sheetof
Date:Sheetof
5
4
3
Date:Sheet
2
5474Monday, December 23, 2019
5474Monday, December 23, 2019
5474Monday, December 23, 2019
1
5
DD
CC
Note:
1. 100k 4250B thermistor is strongly recommended. If another thermistor is selected,
please see KB-180725132908 and document 80-PF777-77 on createpoint for special considerations
2. Do not place any capacitance on BATT_THERM or BATT_ID nets.
Ensure battery pack also does not contain ANY capacitance
BB
A
Dedicated trace from pin directly to the battery terminal
Dedicated trace from pin directly to the battery terminal
5
USB_CC1<66,73>
USB_CC2<66>
USB_CC_DIR<33>
AUTO_ON_N<19,43>
PM8150B_USB_SBU1<61>
PM8150B_USB_SBU2<61>
o
o
o
o
o
o
USB0_HS_DP_DET<66>
USB0_HS_DM_DET<66>
BATT_BS<55,56,73>
BATT_B+<55,56,73>
IBATT_SENSE_P<55>
IBATT_SENSE_M<55>
PACK_SNS_M<55,56>
BATT_THERM<55,73>
CONN_THERM<66>
PACK_SNS_M<55,56>
BATT_THERM<55,73>
BATT_BS<55,56,73>
o
o
o
CR5404
USB_OVP_VBUS
C5400
1
1uF
±10%
25V
2
0402
C5402
12
220pF
±5%
50V
0201
o
o
o
o
o
o
o
o
o
VPH_PWR
CR5403
PESD3V3V1BCSF
12
4
C5403
1
220pF
±5%
50V
2
0201
R5401 100K ±5% 0201
1
C5411
1
1uF
+/-20%
10V
2
0201
PESD3V3V1BCSF
12
4
1
1
2
2
TP5401
TP0.3mm
1
2
W5402
SHORT
70
84
98
112
126
66
52
65
50
64
99
100
113
114
24
25
11
12
13
23
56
36
37
49
63
89
88
104
118
117
102
101
115
87
116
103
90
75
76
67
PACK_SNS_P <56>
o
2
W5401
2
SHORT
1
1
1
7
WP10-SM04VA10-R15000
U5200-1
USB_IN_1
USB_IN_2
USB_IN_3
USB_IN_4
USB_IN_5
CC1_ID
CC2
CC_OUT
SMB_EN
SYS_OK
BA_N_1
BA_N_2
BA_N_3
BA_N_4
SBU1
SBU2
DC_IN_EN_1
DC_IN_EN_2
DC_IN_EN_3
DC_IN_PON
DC_IN_PSNS
USB_DP
USB_DM
VBATT_SNS_M
VBATT_SNS_P
OPTION_2
OPTION_1
ISNS_SMB_M
ISNS_SMB_P
PACK_SNS_M
BATT_ID
BATT_THERM_1
BATT_THERM_2
CONN_THERM
SMB_THERM
AMUX_1
GND_ADC
GND_MBG
REF_GND_MBG_ADC
VDD_VCONN
PM8150B
J5400
G2
G3
GNDG1GND
GND
2
2
1
334
556
7
4
6
8
8
GNDG4GND
GND
G5
G6
MID_CHG_1
MID_CHG_2
MID_CHG_3
MID_CHG_4
MID_CHG_5
MID_CHG_6
MID_CHG_7
MID_CHG_8
MID_CHG_9
BOOT_CAP
VSW_CHG_1
VSW_CHG_2
VSW_CHG_3
VSW_CHG_4
VSW_CHG_5
VSW_CHG_6
VSW_CHG_7
VSW_CHG_8
PGND_CHG_1
PGND_CHG_2
PGND_CHG_3
PGND_CHG_4
VPH_PWR_1
VPH_PWR_2
VPH_PWR_3
VPH_PWR_4
VBATT_PWR_1
VBATT_PWR_2
VBATT_PWR_3
VBATT_PWR_4
IUSB_OUT_1
IUSB_OUT_2
VARB_CHG
BOOT_PWR
REF_GND_CHG
GND_PSUB_CHG
GND_CHG
12
C5422
220pF
±5%
50V
0201
3
Note:
USB_IN_MID
69
82
83
96
97
110
111
124
125
68
80
81
94
95
108
109
122
123
12
C5404
27nF
+/-10%
DC 16V
0402
MID_CHG node needs a total of at least 2x4.7uF 35V cap (total effective capacitance of 5uF at 5V considering voltage derating).
OEMs can also use 1x10uF 35V cap if it meets this total effective capacitance requirement
C5401
1
10uF
+/-20%
25V
2
0603
2
1
L5400
1uH
±20%
0806
C5405
10uF
±20%
10V
0402
C5406
12
10uF
±20%
10V
0402
12
2
VPH_PWR
C5407
10uF
±20%
10V
0402
C5479
12
33pF
5%
50V
0201
CR5401
PTVSHC2EN4V8UA
12
1
21
79
93
107
121
78
92
106
120
77
91
105
119
41
42
53
54
38
55
40
VBATT
1
VBAT
R5402
2mR
±1%
0805
2
1
2
2
1
CR5402 PTVSHC2EN4V8UA
3
VBATT
12
C5408
10uF
+/-20%
6.3V
0402
C5458
12
33pF
5%
50V
0201
VREG_BOB
12
0201
R5406
NM
3
Q5400
D
PMZ290UNE2
1
G
S
o
S_IO <55>
2
C5409
12
4.7uF
±20%
10V
0402
C5413
12
10uF
±20%
10V
0402
CR5406
CR5405
ESD54191CZ-2/TR
12
1
2
PESD3V3V1BCSF
C5410
12
100nF
+/-10%
DC 10V
0201
W5403
1
2
1
SHORT
12
C5414
NM
0201
o
BATT_B+ <55,56,73>
o
S_IO <55>
1
C5412
15pF
5%
25V
0201
2
W5404
1
SHORT
o
IBATT_SENSE_P <55>
2
2
S_IF<33>
o
IBATT_SENSE_M <55>
2
o
Title
Title
Title
SizeDocument Number
SizeDocument Number
SizeDocument Number
A3
A3
A3
Date:Sheet
Date:Sheet
Date:Sheet
R5405
12
470R
±5%
0201
J11 MAIN
J11 MAIN
J11 MAIN
PM855B Charger
PM855B Charger
PM855B Charger
Monday, December 23, 2019
Monday, December 23, 2019
Monday, December 23, 2019
VREG_S4A_1P8
1
5
DD
USB_VBUS
NTLJS5D0N03C
S2
1
D
S1
G
Q5500
CC
C5513
1
1uF
+/-10%
35V
2
0402
BB
C5507
1
100pF
5%
50V
2
0201
4
7
4
3
C5512
12
10nF
±10%
50V
0201
APPS_I2C_SDA<33,49,62>
APPS_I2C_SCL<33,49,62>
BQ25970_MASTER_INT<34>
VREG_S4A_1P8
R5509
1
10K
.01
0201
o
o
2
USB_OVP_VBUS
o
1
2
C5514
4.7uF
+/-20%
25V
0402
C6
D6
E6
F6
D7
E7
G7
F7
C7
H5
A1
B1
C1
D1
E1
F1
G1
H1
U5500
VBUS1
VBUS2
VBUS3
VBUS4
OVPGATE
VAC
SDA
SCL
INT
TSBUS
GND
GND
GND
GND
GND
GND
GND
GND
bq25970
Master
3
CDRVH
CDRVL_ADDRMS
REGN
PMID1
PMID2
PMID3
PMID4
PMID5
PMID6
CFH1_1
CFH1_2
CFH1_3
CFH1_4
CFL1_1
CFL1_2
CFL1_3
CFL1_4
VOUT8
VOUT7
VOUT6
VOUT5
VOUT4
VOUT3
VOUT2
VOUT1
CFH2_1
CFH2_2
CFH2_3
CFH2_4
CFL2_1
CFL2_2
CFL2_3
CFL2_4
BATP_SYNCIN
BATN
SRP
SRN
TSBAT_SYNCOUT
H6
H7
G6
B5
C5
D5
E5
F5
G5
E4
F4
G4
H4
E2
F2
G2
H2
H3
G3
F3
E3
D3
C3
B3
A3
A4
B4
C4
D4
A2
B2
C2
D2
A7
B7
A6
B6
A5
C5500 220nF 0402
2
1
50V ±20%
C5501
12
10uF
+/-20%
25V
0603
C5503
1
22uF
+/-20%
16V
2
0704
C5508
1
47uF
+/-20%
6.3V
2
0603
C5509
12
22uF
+/-20%
16V
0704
1
R5500
100R
±1%
0201
2
12
C5502
4.7uF
+/-20%
10V
0402
1
2
1
2
1
R5501
100R
±1%
0201
2
C5504
22uF
+/-20%
16V
0704
C5510
22uF
+/-20%
16V
0704
C5505
1
22uF
+/-20%
16V
2
0704
VBATT
C5511
1
100pF
5%
50V
2
0201
C5506
1
22uF
+/-20%
16V
2
0704
R5502 NM 0201
1
1
R5503 NM 0201
2
C5515
12
100pF
5%
50V
0201
2
2
PACK_SNS_P <55>
o
o
PACK_SNS_M <55>
o
BATT_BS <55,73>
o
BATT_B+ <55,73>
1
AA
Title
Title
Title
F1 MAIN
F1 MAIN
F1 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
SMB1390&WL POWER
A3
SMB1390&WL POWER
A3
SMB1390&WL POWER
A3
of
Date:Sheet
Date:Sheetof
5
4
3
2
Date:Sheet
5674Monday, December 23, 2019
of
5674Monday, December 23, 2019
5674Monday, December 23, 2019
1
5
4
3
2
1
TP5600
TP0.3mm
DD
1
TP5601
TP0.3mm
1
U5600-1
FLASH MEMORY
UFS0_RESET_N<32>
UFS0_REF_CLK<32>
UFS0_L0_TX_P<32>
UFS0_L0_TX_M<32>
UFS0_L0_RX_M<32>
UFS0_L0_RX_P<32>
UFS0_L1_TX_P<32>
UFS0_L1_TX_M<32>
UFS0_L1_RX_M<32>
UFS0_L1_RX_P<32>
CC
BB
o
o
o
o
o
o
o
o
o
o
H2
H1
K1
K2
D1
D2
M1
M2
B2
B11
B12
C1
C2
C3
C11
C12
D3
D12
D13
D14
E1
E2
E3
E12
F12
F13
F14
G1
G2
G3
G10
G12
H3
H5
H10
H12
H13
H14
J12
F1
F2
F3
J1
J2
J3
J5
RESET_N
REF_CLK
RXDP0
RXDN0
TXDN0
TXDP0
RXDP1
RXDN1
TXDN1
TXDP1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VDDIQ2
VDDI
VDDIQ
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VCCQ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
A9
A3
A8
B8
B9
C8
C9
E8
K8
N8
N9
P8
P9
A4
A5
B4
B5
C4
C5
E5
F5
K3
K5
K12
K13
K14
L1
L2
L3
L12
M3
M4
M5
M12
M13
M14
N2
N3
N4
N5
N11
N12
P4
P5
P11
P12
C5601
1
1uF
±20%
6.3V
2
0201
750mA
C5603
12
4.7uF
±20%
6.3V
0402
750.5mA
C5605
12
4.7uF
±20%
6.3V
0402
12
1
2
C5607
1uF
±20%
6.3V
0201
C5608
1uF
±20%
6.3V
0201
1
2
1
2
C5604
100nF
+/-10%
6.3V
0201
C5606
100nF
+/-10%
6.3V
0201
VREG_L17A_2P5
VREG_L6A_1P2
KLUDG4UHDB-B2D1
A
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
MEMORY
A4
MEMORY
A4
MEMORY
A4
of
Date:Sheetof
Date:Sheetof
5
4
3
Date:Sheet
2
5774Monday, December 23, 2019
5774Monday, December 23, 2019
5774Monday, December 23, 2019
1
5
DD
4
3
2
1
U5600-2
FLASH MEMORY
B3
RFU1
B13
RFU2
C10
RFU3
C13
RFU4
C14
RFU5
E13
RFU6
E14
RFU7
G13
RFU8
CC
TP5701
TP0.3mm
1
BB
TP5704
TP0.3mm
1
G14
J13
J14
L13
L14
M6
M7
M10
N6
N7
N10
N13
E10
F10
G5
J10
K10
P10
RFU9
RFU10
RFU11
RFU12
RFU13
RFU14
RFU15
RFU16
RFU17
RFU18
RFU19
RFU20
P3
RFU21
P6
RFU22
P7
RFU23
E6
VSF1
E7
VSF2
E9
VSF3
VSF4
VSF5
VSF6
VSF7
VSF8
VSF9
NC1
NC2
NC17
NC18
NC19
NC20
NC21
NC3
NC4
NC5
NC22
NC23
NC24
NC6
NC25
NC26
NC27
NC28
NC29
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
A1
A2
A6
A7
A10
A11
A12
A13
A14
B1
B6
B7
B10
B14
C6
C7
D4
K6
K7
K9
M8
M9
M11
N1
N14
P1
P2
P13
P14
KLUDG4UHDB-B2D1
A
Title
Title
Title
J11 MAIN
J11 MAIN
J11 MAIN
SizeDocument Number
SizeDocument Number
SizeDocument Number
MEMORY-2
A4
MEMORY-2
A4
MEMORY-2
A4
Date:Sheet
Date:Sheet
5
4
3
Date:Sheet
2
5874Monday, December 23, 2019
5874Monday, December 23, 2019
5874Monday, December 23, 2019
1
5
4
3
2
1
DD
C5852
12
100nF
+/-10%
6.3V
0201
C5855
12
470nF
0201
6.3V
±10%
2
12
L5826
0R
±5%
0402
60mA
1
C5851
1
U5800
30
RESET_N
10
AMIC1_INM
5
AMIC1_INP
11
AMIC2_INM
16
AMIC2_INP
9
AMIC3_INM
4
AMIC3_INP
8
AMIC4_INM
3
AMIC4_INP
7
AMIC5_INM
2
AMIC5_INP
15
AMIC6_INM
14
AMIC6_INP
13
AMIC7_INM
19
AMIC7_INP
6
MIC_BIAS1
1
MIC_BIAS2
17
MIC_BIAS3
12
MIC_BIAS4
28
GND_MIC_BIAS
44
SWR_RX_CLK
60
SWR_RX_DATA_0
55
SWR_RX_DATA_1
33
SWR_TX_CLK
22
SWR_TX_DATA_0
27
SWR_TX_DATA_1
25
SWR_TX_DATA_2
58
HPH_L
52
HPH_R
40
HPH_REF_L
41
HPH_REF_R
51
AUX_OUT_M
56
AUX_OUT_P
45
EAR_OUT_M
50
EAR_OUT_P
39
GPIO_0
34
GPIO_1
42
MBHC_HSDET_L
46
MBHC_HSDET_G
35
GND
WCD9385
VDD_TXRX
VDD_PX
VDD_MIC_BIAS
VDD_CX
VDD_BUCK
VSW_BUCK
VOUT_BUCK
PA_VPOS
GND_BUCK
FLYB_VNEG_DAC
VSW_FLYB
FLYB_VNEG_OUT
PA_VNEG
LDO_H
GND
CCOMP
GND_CCOMP
GND_RXTX
GND_A
GND_D
36
20
18
21
38
32
37
47
43
59
49
54
53
23
48
29
24
31
57
26
C5817
12
100nF
+/-10%
6.3V
0201
o
o
o
o
o
o
o
TP5804
TP0.3mm
1
WCD_SWR_RX_CLK<34>
WCD_SWR_RX_DATA0<34>
WCD_SWR_RX_DATA1<34>
WCD_SWR_TX_CLK<34>
WCD_SWR_TX_DATA0<34>
WCD_SWR_TX_DATA1<34>
12
TP5807
TP0.3mm
C5847
NM
0201
TP5805
TP5806
TP0.3mm
TP0.3mm
1
1
1
o
o
o
o
o
o
12
12
1
C5849
C5848
NM
NM
0201
0201
2
TP5809
TP5808
TP0.3mm
TP0.3mm
1
1
C5850
NM0201
o
EAR_M<61>
o
EAR_P<61>
NOTE 1: ROUTE AN ISOLATED GROUND TRACE FROM CCOMP_REF
TO THE CAP GROUND, THEN VIA TO THE MAIN GROUND PLANE
NOTE 2: PLACE VDD_BUCK CAP AS CLOSE TO CHIP EDGE AS POSSIBLE
AND MINIMIZE LOOP INDUCTANCE
NOTE 3: USE SHORT AND WIDE TRACES FOR BUCK AND FLYBACK
RELATED NETS
NOTE 4: ANALOG MIC INPUTS SHOULD BE ISOLATED WITH GROUND
FROM NOISY OR SWITCHING SIGNALS AND SUPPLIES
WCD_RESET_N<33>
CDC_MAIN_M<66>
CDC_MAIN_P<66>
HPHMIC_M<61>
HPHMIC_P<61>
CDC_MIC3_N<61>
CDC_MIC3_P<61>
WCD_MIC_BIAS1
CC
CDC_HPH_REF_L<61>
CDC_HPH_REF_R<61>
BB
CDC_HSDET_L<61>
WCD_MIC_BIAS3
C5818
1
100nF
+/-10%
6.3V
2
0201
CDC_HPH_L<61>
CDC_HPH_R<61>
WCD_MIC_BIAS2
C5800
12
470nF
0201
6.3V
±10%
o
o
o
o
o
1uF
±20%
10V
2
0201
C5853
12
1uF
±20%
10V
0201
L5823 1000ohm ±25% 0603
12
L5825 1000ohm ±25% 0603
1
C5860
C5859
1
12
1uF
470nF
±20%
0201
6.3V
6.3V
2
0201
±10%
C5861
1
100nF
+/-10%
6.3V
2
0201
12
C58621uF
02016.3V±20%
VREG_S4A_1P8
VREG_BOB
30mA
C5854
12
100nF
+/-10%
6.3V
0201
650mA
2
L5824
0R
±5%
0402
C5856
12
2.2uF
±20%
6.3V
0201
1
2
Note: Pls make sure C4008/C4009 can meet minimal capacitance requirement (0.4uF)@1.8V whether your use 1uF or 2.2uF
Always use the same power rail for
VDD_S2 and S2_PVDD
o
C7385
1
100nF
+/-10%
6.3V
2
0201
C7362
1
1uF
+/-20%
10V
2
0201
C7363
1
1uF
+/-20%
10V
2
0201
U7302-2
12
GPIO_01
4
GPIO_02
10
GPIO_03
9
GPIO_04
32
KPD_PWR_N
37
PON_RESET_N
38
PS_HOLD
41
PON_1
40
RF_CLK1
47
LN_BB_CLK1
20
VDD_IO
46
XO_THERM
16
SPMI_CLK
23
SPMI_DATA
48
VREG_XO_RF
33
GND_CLKS_XO
PM-8009-1-WLNSP49D-HR-00-0
U7302-1
3
VDD_S1
1
GND_S1
5
VDD_S2
7
GND_S2
13
S2_PVDD
30
VDD_L2
27
VDD_L5_L6
34
VDD_L7
PM-8009-1-WLNSP49D-HR-00-0
VREG_S1
VSW_S1
VREG_S2
VSW_S2
VREG_L1
VREG_L2
VREG_L3
VREG_L4
VREG_L5
VREG_L6
VREG_L7
18
CMN_GND
24
CMN_GND
GND_XO
AVDD_BYP
REF_BYP
REF_GND
VPH_PWR
BAT_ID
XTAL_IN
XTAL_OUT
C7366
12
10uF
±20%
6.3V
0402
8
L7301 470nH ±20% 0805
2
14
L7302 470nH ±20% 0805
6
25
26
39
45
31
19
17
43
44
11
42
49
C7367
12
10uF
±20%
6.3V
0402
VPH_PWR
Pin 17 VPH_PWR :Connect directly to VPH_PWR plane, not direclty connected to any SMPS or other noisy power pin
1
C7368
NM
VREG_S2F_0P95
0402
2
C7387
12
100nF
+/-10%
6.3V
0201
CAMW_DVDD_1P1
968mA
1
1
2
2
GND_WLP_TST
TEST_EN_VPP
BAT_THERM
SLEEP_CLK
S1F will supply L1F_L4F_L3F INTERNALLY
Make sure VREG_S1 is routed with thick track as it carries VIN for L1F L3F L4F
15
36
29
22
28
21
35
C7375
12
C7373
C7374
1
1
10uF
10uF
±20%
±20%
6.3V
6.3V
2
2
0402
0402
4.7uF
±20%
6.3V
0402
C7386
1
1uF
±20%
6.3V
2
0201
CAMT_DVDD_1P2
C7376
1
2.2uF
±20%
6.3V
2
0201
CAMU_DVDD_1P2
CAMF_DVDD_1P05
C7377
12
2.2uF
±20%
6.3V
0201
PM8009_AVDD_BYP should be routed
away from noisy traces
Trace from pin to cap and ONE dedicated via from cap to main ground plane.
DCR < 200mOhm and ESL < 10nH
VPH Do NOT connect to any other ground.
Dedicated trace from REF_BYP to cap.
Dedicated trace from REF_GND to cap.
Dedicated via to main ground plane right under PMIC pin (REF_GND) or as close to the pin as possible.
Do NOT add via at cap.
REF_BYP and REF_GND should be
routed away from noisy traces