5
D D
4
3
2
1
C C
Wistron Confidential
PV1
2009/12/28 REV :PV-01
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Cover
Cover
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Cover
PATEK
PATEK
PATEK
Hsichih, Taipei
1
1 57 Monday, March 15, 2010
1 57 Monday, March 15, 2010
1 57 Monday, March 15, 2010
SA
SA
SA
5
4
3
2
1
SYSTEM DC/DC
Patek DIS Block Diagram
D D
DDRIII
800/1066/1333
DDRIII
800/1066/1333
Slot 0
Slot 1
DDRIII Channel A
8
DDRIII Channel B
8
AMD CPU
Champlain
S1G4 package
4,5,6,7
HT3.0
16X16
RJ45
CONN
29
C C
ATHEROS
10/100/1000
Mini-Card
WLAN
PCIEAR8131
28
27
PCIE+USB 2.0
North Bridge
AMD RS880M
CPU I/F
INTEGRATED GRAHPICS
LVDS, CRT I/F
9,10,11,12
A-Link 4x1
Express Card
34
Thermal Sensor
GMT G781
26
23
PCIE+USB 2.0
South Bridge
AMD SB820M
SMBUS
Accelerometer
B B
ST HP302DL
27
MODEM
MDC V1.5
HP Vulcan
31
HD Audio
INTERNAL
D-MIC
Pre-AMP
MIC IN
HEADPHONE
A A
TLV2462
33
2CH SPEAKER
5
AUDIO CODEC
IDT 92HD80
32
4
SD/MMC
MS/MS Pro/xD
14 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
6 SATA ports
4 PCIe GPP
ACPI 1.1
LPC I/F
PCI/PCI BRIDGE
15,16,17,18,19
USB 2.0
RealTek
RTS5138
25
25
USB 2.0
Mini-Card
WWAN
SIM Card
57
57
3
Clock Generator
ICS9LPRS480
VRAM
DDR3
PCIE
USB 2.0
SATAII
SATAII+USB2.0
LPC Bus
SPI
20
4
ATI
M93-S3-LP
/ Park-S3
45,46,47,48,49
Fringer printer
VFS451
CAMERA
BLUETOOTH
USB x 3
SMSC KBC1098
SPI
Flash ROM
2 MB
VRAM
64MBx16 64MBx16
DDR3
KBC
Touch
PAD
4
51 50
R.G.B
LVDS
HDMI
22
CRT
1600X1200@75
LCD
WXGA+
HDMI
GPU DC/DC
APL5930/RT8209B
13
14
22
OUTPUTS INPUTS
14
24
24
+1.5V_PCIE
e-SATA
LPC debug
30
<Core Design>
<Core Design>
<Core Design>
Int.
KB
31 21 31
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
+GPU_PCIE
+VGA_CORE +5VALW
HDD
26
ODD
26
24
21
A3
A3
A3
38
52
Block Diagram
Block Diagram
Block Diagram
PATEK
PATEK
PATEK
RT8205A
INPUTS
DCBATOUT
OUTPUTS
+5VALW
+3VALW
SYSTEM DC/DC
RT8209B
INPUTS
+5VALW
OUTPUTS
+1.1VALW
SYSTEM DC/DC
G972
INPUTS
+3VS
OUTPUTS
+1.8VS
SYSTEM DC/DC
G9091/RT9205
INPUTS
+3VS +2.5VS_LDO_CPU
+1.5VS
OUTPUTS
+1.05VS
SYSTEM DC/DC
RT8207
INPUTS
+5VALW
OUTPUTS
+1.5V
+0.75V
MAXIM CHARGER
BQ24740
INPUTS
DCBATOUT
OUTPUTS
BT+
18V 3.0A
5V 100mA
CPU DC/DC
ISL6265/RT8209B
INPUTS
DCBATOUT
+5VALW
OUTPUTS
+VCC_CORE
+VDDNB
+NB_VDDC
PCB 6 LAYER
L1:
L2:
L3:
L4:
L5:
L6:
1
Signal 1
GND
Signal 2
Signal 3
VCC
Signal 4
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
2 57 Monday, March 15, 2010
2 57 Monday, March 15, 2010
2 57 Monday, March 15, 2010
+5VL
+3VL
39
41
38
37
40
42
36
54
SA
SA
SA
5
RS880M strapping
4
3
2
1
STRAP_DEBUG_BUS_GPIO_ENABLEb
D D
Enables the Test Debug Bus using GPIO.(PIN: RS880M--> VSYNC)
0 : Enable 1 : Disable
RS880: Enables Side port memory ( RS880 use HSYNC)
0 : Enable 1 : Disable
SUS_STAT#
Selects Loading of STRAPS From EEPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
*
0 : I2C Master can load strap values from EEPROM if connected,
or use default values if not connected
*
*
PCIE routing
Page 9
LANE 0
LANE 3
LANE 4
LAN
NEW CARD
WLAN
USB table
Pair Device
USB-FSD1 FPR
USB-9 Bluetooth
USB-8 WLAN
USB-7 WWAN
Page 18
USB-6 USB Card Reader
USB-5 Right Side
SB820M strapping
Note: SB820 has 15K internal PU FOR PCI_AD[27:23]
C C
PULL
HIGH
PULL
LOW
PULL
HIGH
B B
PULL
LOW
USE PCI
PLL
BYPASS
PCI PLL
AZ_SDOUT#
LOW POWER
MODE
PERFORMANCE
MODE
DEFAULT
PCI_AD26 PCI_AD27
Disable ILA
AUTORUN
Enable ILA
AUTORUN
PCI_AD25 PCI_AD23
USE FC
PLL
BYPASS FC
PLL
PCI_CLK1
Allow
PCIE GEN2
DEFAULT
Force
PCIE GEN1
PCI_AD24
USE DEFAULT
PCIE STRAPS
USE EEPROM
PCIE STRAPS
PCI_CLK2
WatchDOG
(NB_PWRGD)
ENABLED
WatchDog
(NB_PWRGD)
DISABLED
DEFAULT
Disable PCI
MEM BOOT
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
Enable PCI
MEM BOOT
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
PCI_CLK4 PCI_CLK3
non_Fusion
CLOCK mode
DEFAULT
Fusion
CLOCK mode
LPC_CLK_KBC
(LPCCLK0)
ENABLE EC
DISABLE EC
DEFAULT
LPC_CLK_DB
(LPCCLK1)
CLKGEN
ENABLED
Use Internal)
(
CLKGEN
DISABLED
(Use External)
DEFAULT
SB_GPO200 , SB_GPO199
ROM TYPE:
H, H = Reserved
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM
DEFAULT
USB-4 USB Camera
USB-3 Right Side
USB-2 Left Side (e-SATA combo)
USB-1 New Card
USB-0 Left Side (S/W Debug port)
SMBUS Control Table
THERMAL
SOURCE
AB1A_DATA
AB1A_CLK
SB_SMB_CLK1
A A
SB_SMB_DAT1
SB_SMB_CLK0
SB_SMB_DAT0
CPU_SIC_SB700
CPU_SID_SB700
5
SMSC1098
SB820M
SB820M
CPU
BATT
SENSOR
V X X X X X
X
X V V V V
X X X X X X
CLK GEN SODIMM G-SENSOR
X X X X
4
SMSC1098
X
X
SB-TSI
X
X
X
V
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
NOTES
NOTES
NOTES
PATEK
PATEK
PATEK
Hsichih, Taipei
1
SA
SA
3 57 Monday, March 15, 2010
3 57 Monday, March 15, 2010
3 57 Monday, March 15, 2010
SA
5
4
3
2
1
HT
+1.1VS
C1
C1
1
1
2
D D
NB0CADOUT[15..0] 9
NB0CADOUTJ[15..0] 9
C C
LDT_PW ROK
LDT_RST#_CPU
LDT_REQ#
091222-1
RN141
RN141
1
2 3
SRN300J-3-GP
SRN300J-3-GP
DY
DY
4
R5
R5
1 2
300R2J-4-GP
300R2J-4-GP
+1.5VS
2
SCD22U25V3KX-GP
SCD22U25V3KX-GP
091221-1
HDT_RST# 6
C2
C2
1
1
2
2
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1 2
R3 0R0402-PAD-1-GP R3 0R0402-PAD-1-GP
C3
1 2
S1G3 & S1G4 not support LDT_REQ#
NB0HTTCLKOUT1 9
091221-1
CPU_LDT_RST# 15
B B
CPU_PW RGD 15
1 2
R6 0R0402-PAD- 1 -GP R6 0R0402-PAD- 1 -GP
1 2
R7 0R0402-PAD-1-GP R7 0R0402-PAD-1-GP
LDT_RST#_CPU 10
LDT_PW ROK 36
NB0HTTCLKOUT0 9
NB0HTTCLKOUTJ1 9
NB0HTTCLKOUTJ0 9
NB0HTTCTLOUT1 9
NB0HTTCTLOUT0 9
NB0HTTCTLOUTJ1 9
NB0HTTCTLOUTJ0 9
C4
1 2
SC180P50V2JN-1GPC3SC180P50V2JN-1GP
SC180P50V2JN-1GPC4SC180P50V2JN-1GP
LDT_RST#_CPU
LDT_PW ROK
CPU_LDT_STOP#
NB0CADOUT15
NB0CADOUT14
NB0CADOUT13
NB0CADOUT11
NB0CADOUT10 CPUCADOUT8
NB0CADOUT9
NB0CADOUT8
NB0CADOUT7
NB0CADOUT6
NB0CADOUT5
NB0CADOUT4
NB0CADOUT3
NB0CADOUT2
NB0CADOUT1
NB0CADOUT0
NB0CADOUTJ15
NB0CADOUTJ14
NB0CADOUTJ13
NB0CADOUTJ12
NB0CADOUTJ11
NB0CADOUTJ10
NB0CADOUTJ9
NB0CADOUTJ8
NB0CADOUTJ7
NB0CADOUTJ6
NB0CADOUTJ5
NB0CADOUTJ4
NB0CADOUTJ3
NB0CADOUTJ2
NB0CADOUTJ1
NB0CADOUTJ0
NB0HTTCLKOUT1
NB0HTTCLKOUT0
NB0HTTCLKOUTJ1
NB0HTTCLKOUTJ0
NB0HTTCTLOUT1
NB0HTTCTLOUT0
NB0HTTCTLOUTJ1
NB0HTTCTLOUTJ0
1
CPU VLDT MAX 1.5A
CPU1A
CPU1A
D1
V_HT_A1
D2
V_HT_A2
D3
V_HT_A3
D4
V_HT_A4
RESET*
B7
PWROK
A7
LDTSTOP*
F10
N5
HT_RXD_P15
M3
HT_RXD_P14
L5
HT_RXD_P13
K3
HT_RXD_P12
H3
HT_RXD_P11
G5
HT_RXD_P10
F3
HT_RXD_P9
E5
HT_RXD_P8
N3
HT_RXD_P7
L1
HT_RXD_P6
L3
HT_RXD_P5
J1
HT_RXD_P4
G1
HT_RXD_P3
G3
HT_RXD_P2
E1
HT_RXD_P1
E3
HT_RXD_P0
P5
HT_RXD_N15
M4
HT_RXD_N14
M5
HT_RXD_N13
K4
HT_RXD_N12
H4
HT_RXD_N11
H5
HT_RXD_N10
F4
HT_RXD_N9
F5
HT_RXD_N8
N2
HT_RXD_N7
M1
HT_RXD_N6
L2
HT_RXD_N5
K1
HT_RXD_N4
H1
HT_RXD_N3
G2
HT_RXD_N2
F1
HT_RXD_N1
E2
HT_RXD_N0
J5
HT_RXCLK_P1
J3
HT_RXCLK_P0
K5
HT_RXCLK_N1
J2
HT_RXCLK_N0
P3
HT_RXCTL_P1
N1
HT_RXCTL_P0
P4
HT_RXCTL_N1
P1
HT_RXCTL_N0
DANUB
DANUB
SEC 1 OF 6
SEC 1 OF 6
LDT
LDT
V_HT_B1
V_HT_B2
V_HT_B3
V_HT_B4
LDTREQ*
HT_TXD_P15
HT_TXD_P14
HT_TXD_P13
HT_TXD_P12
HT_TXD_P11
HT_TXD_P10
HT_TXD_P9
HT_TXD_P8
HT_TXD_P7
HT_TXD_P6
HT_TXD_P5
HT_TXD_P4
HT_TXD_P3
HT_TXD_P2
HT_TXD_P1
HT_TXD_P0
HT_TXD_N15
HT_TXD_N14
HT_TXD_N13
HT_TXD_N12
HT_TXD_N11
HT_TXD_N10
HT_TXD_N9
HT_TXD_N8
HT_TXD_N7
HT_TXD_N6
HT_TXD_N5
HT_TXD_N4
HT_TXD_N3
HT_TXD_N2
HT_TXD_N1
HT_TXD_N0
HT_TXCLK_P1
HT_TXCLK_P0
HT_TXCLK_N1
HT_TXCLK_N0
HT_TXCTL_P1
HT_TXCTL_P0
HT_TXCTL_N1
HT_TXCTL_N0
HTREF1
HTREF0
AE2
AE3
AE4
AE5
C6
T4
V5
V4
Y5
AB5
AB4
AD5
AD4
T1
U2
V1
W2
AA2
AB1
AC2
AD1
T3
U5
V3
W5
AA5
AB3
AC5
AD3
R1
U3
U1
W3
AA3
AA1
AC3
AC1
Y4
Y1
Y3
W1
T5
R2
R5
R3
P6
R6
DY
DY
C7
C7
1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
L0_REF1
L0_REF0
C5
1 2
SC4D7U25V5KX-GPC5SC4D7U25V5KX-GP
LDT_REQ#
CPUCADOUT15
CPUCADOUT14
CPUCADOUT13
CPUCADOUT12
CPUCADOUT11
CPUCADOUT10 NB0CADOUT12
CPUCADOUT9
CPUCADOUT7
CPUCADOUT6
CPUCADOUT5
CPUCADOUT4
CPUCADOUT3
CPUCADOUT2
CPUCADOUT1
CPUCADOUT0
CPUCADOUTJ15
CPUCADOUTJ14
CPUCADOUTJ13
CPUCADOUTJ12
CPUCADOUTJ11
CPUCADOUTJ10
CPUCADOUTJ9
CPUCADOUTJ8
CPUCADOUTJ7
CPUCADOUTJ6
CPUCADOUTJ5
CPUCADOUTJ4
CPUCADOUTJ3
CPUCADOUTJ2
CPUCADOUTJ1
CPUCADOUTJ0
CPUHTTCLKOUT1
CPUHTTCLKOUT0
CPUHTTCLKOUTJ1
CPUHTTCLKOUTJ0
CPUHTTCTLOUT1
CPUHTTCTLOUT0
CPUHTTCTLOUTJ1
CPUHTTCTLOUTJ0
R10 44D2R2F-GP R10 44D2R2F-GP
R11
R11
44D2R2F-GP
44D2R2F-GP
PLACE WITHIN 1"
5MIL TRACE
10MIL SPACE
LAYOUT: PLACE CLOSE TO CPU
ALONG HT POWER SHAPE
C6
091215-1
1 2
SC4D7U25V5KX-GPC6SC4D7U25V5KX-GP
CPUHTTCLKOUT1 9
CPUHTTCLKOUT0 9
CPUHTTCLKOUTJ1 9
CPUHTTCLKOUTJ0 9
CPUHTTCTLOUT1 9
CPUHTTCTLOUT0 9
CPUHTTCTLOUTJ1 9
CPUHTTCTLOUTJ0 9
1 2
1 2
+1.1VS
CPUCADOUT[15..0] 9
CPUCADOUTJ[15..0] 9
+1.5VS +1.8VS
R2
R2
300R2J-4-GP
300R2J-4-GP
CPU_LDT_STOP# 15
A A
1 2
091222-1
U155
U155
1
NC#1
2
A
GND3Y
74LVC1G07GW-GP
74LVC1G07GW-GP
5
VCC
5
4
090817-1
1 2
R2283
R2283
2K2R2F-GP
2K2R2F-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C994
C994
LDT_STP#_CPU 10
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
CPU(1/4) HT
CPU(1/4) HT
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
A3
A3
A3
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
CPU(1/4) HT
PATEK
PATEK
PATEK
Hsichih, Taipei
1
SA
SA
4 57 Monday, March 15, 2010
4 57 Monday, March 15, 2010
4 57 Monday, March 15, 2010
SA
5
CPU1C
CPU1C
M_A_DQ[63..0] 8
SEC 3 OF 6
SEC 3 OF 6
MEMORY_A
M_A_DQ63
M_A_DQ62
M_A_DQ61
M_A_DQ60
M_A_DQ59
M_A_DQ58
M_A_DQ57
D D
C C
B B
M_A_DQ56
M_A_DQ55
M_A_DQ54
M_A_DQ53
M_A_DQ52
M_A_DQ51
M_A_DQ50
M_A_DQ49
M_A_DQ48
M_A_DQ47
M_A_DQ46
M_A_DQ45
M_A_DQ44
M_A_DQ43
M_A_DQ42
M_A_DQ41
M_A_DQ40
M_A_DQ39
M_A_DQ38
M_A_DQ37
M_A_DQ36
M_A_DQ35
M_A_DQ34
M_A_DQ33
M_A_DQ32
M_A_DQ31
M_A_DQ30
M_A_DQ29
M_A_DQ28
M_A_DQ27
M_A_DQ26
M_A_DQ25
M_A_DQ24
M_A_DQ23
M_A_DQ22
M_A_DQ21
M_A_DQ20
M_A_DQ19
M_A_DQ18
M_A_DQ17
M_A_DQ16
M_A_DQ15
M_A_DQ14
M_A_DQ13
M_A_DQ12
M_A_DQ11
M_A_DQ10
M_A_DQ9
M_A_DQ8
M_A_DQ7
M_A_DQ6
M_A_DQ5
M_A_DQ4
M_A_DQ3
M_A_DQ2
M_A_DQ1
M_A_DQ0
M_A_A15
M_A_A14
M_A_A13
M_A_A12
M_A_A11
M_A_A10
M_A_A9
M_A_A8
M_A_A7
M_A_A6
M_A_A5
M_A_A4
M_A_A3
M_A_A2
M_A_A1
M_A_A0
AA12
AB12
AA14
AB14
W11
AD13
AB13
AD15
AB15
AB17
W14
W16
AD17
AD19
AD21
AB21
AB18
AA18
AA20
AA22
W21
W22
AA21
AB22
AB24
Y12
Y17
Y14
Y18
Y20
Y22
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
K19
K24
V24
K20
L22
R21
K22
L19
L21
M24
L20
M22
M19
N22
M20
N21
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
M_A_A[15..0] 8
MEMORY_A
CLK5
CLK1
CLK7
CLK4
DANUB
DANUB
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_P7
MA_DQS_P6
MA_DQS_P5
MA_DQS_P4
MA_DQS_P3
MA_DQS_P2
MA_DQS_P1
MA_DQS_P0
MA_DQS_N7
MA_DQS_N6
MA_DQS_N5
MA_DQS_N4
MA_DQS_N3
MA_DQS_N2
MA_DQS_N1
MA_DQS_N0
MA_CLK5_P
MA_CLK5_N
MA_CLK1_P
MA_CLK1_N
MA_CLK7_P
MA_CLK7_N
MA_CLK4_P
MA_CLK4_N
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS*
MA_CAS*
MA_WE*
MA1_CS1*
MA1_CS0*
MA0_CS1*
MA0_CS0*
MA_CKE1
MA_CKE0
MA1_ODT1
MA1_ODT0
MA0_ODT1
MA0_ODT0
4
3
CPU1D
CPU1D
2
1
M_B_DQ[63..0] 8
SEC 4 OF 6
SEC 4 OF 6
MEMORY_B
Y13
AB16
Y19
AC24
F24
E19
C15
E12
W12
Y15
AB19
AD23
G22
C22
G16
G13
W13
W15
AB20
AC23
G21
C21
G15
H13
N19
N20
E16
F16
Y16
AA16
P19
P20
J21
R23
R20
R19
T22
T24
V20
U20
U19
T20
J20
J22
V19
U21
V22
T19
M_A_DM7
M_A_DM6
M_A_DM5
M_A_DM4
M_A_DM3
M_A_DM2
M_A_DM1
M_A_DM0
M_A_DQS7
M_A_DQS6
M_A_DQS5
M_A_DQS4
M_A_DQS3
M_A_DQS2
M_A_DQS1
M_A_DQS0
M_A_DQS#7
M_A_DQS#6
M_A_DQS#5
M_A_DQS#4
M_A_DQS#3
M_A_DQS#2
M_A_DQS#1
M_A_DQS#0
090803-1
M_A_CLK_DDR1
M_A_CLK_DDR1#
M_A_CLK_DDR2
M_A_CLK_DDR2#
MA1_ODT1
MA1_ODT0
M_A_ODT1
M_A_ODT0
M_A_BS#2
M_A_BS#1
M_A_BS#0
M_A_RAS#
M_A_CAS#
M_A_WE#
M_A_CS1#
M_A_CS0#
M_A_CKE1
M_A_CKE0
TP1 TPAD14-GP TP1 TPAD14-GP
1
TP2 TPAD14-GP TP2 TPAD14-GP
1
M_B_DQ63
M_B_DQ62
M_B_DQ61
M_A_DM[7..0] 8
M_A_DQS[7..0] 8
M_A_DQS#[7..0] 8
M_A_CLK_DDR1 8
M_A_CLK_DDR1# 8
M_A_CLK_DDR2 8
M_A_CLK_DDR2# 8
M_A_BS#2 8
M_A_BS#1 8
M_A_BS#0 8
M_A_RAS# 8
M_A_CAS# 8
M_A_WE# 8 M_B_WE# 8
M_A_CS1# 8
M_A_CS0# 8
M_A_CKE1 8
M_A_CKE0 8
M_A_ODT1 8
M_A_ODT0 8
M_B_DQ60
M_B_DQ59
M_B_DQ58
M_B_DQ57
M_B_DQ56
M_B_DQ55
M_B_DQ54
M_B_DQ53
M_B_DQ52
M_B_DQ50
M_B_DQ49
M_B_DQ48
M_B_DQ47
M_B_DQ46
M_B_DQ45
M_B_DQ44
M_B_DQ43
M_B_DQ42
M_B_DQ41
M_B_DQ40
M_B_DQ39
M_B_DQ38
M_B_DQ37
M_B_DQ36
M_B_DQ35
M_B_DQ34
M_B_DQ33
M_B_DQ32
M_B_DQ31
M_B_DQ30
M_B_DQ29
M_B_DQ28
M_B_DQ27
M_B_DQ26
M_B_DQ25
M_B_DQ24
M_B_DQ23
M_B_DQ22
M_B_DQ21
M_B_DQ20
M_B_DQ19
M_B_DQ18
M_B_DQ17
M_B_DQ16
M_B_DQ15
M_B_DQ14
M_B_DQ13
M_B_DQ12
M_B_DQ11
M_B_DQ10
M_B_DQ9
M_B_DQ8
M_B_DQ7
M_B_DQ6
M_B_DQ5
M_B_DQ4
M_B_DQ3
M_B_DQ2
M_B_DQ1
M_B_DQ0
M_B_A15
M_B_A14
M_B_A13
M_B_A12
M_B_A11
M_B_A10
M_B_A9
M_B_A8
M_B_A7
M_B_A6
M_B_A5
M_B_A4
M_B_A3
M_B_A2
M_B_A1
M_B_A0
AD11
AF11
AF14
AE14
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
C24
C20
C25
D24
D20
D18
C18
D14
C14
D12
G11
C11
W24
M26
Y11
E24
E23
B24
B20
A21
A20
A19
A16
A15
A13
E11
B14
A14
A11
L25
L26
T26
K26
L24
N25
L23
N26
N23
P26
N24
P24
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
J24
MB_ADD15
J23
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
M_B_A[15..0] 8
MEMORY_B
CLK5
CLK1
CLK7
CLK4
DANUB
DANUB
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DQS_P7
MB_DQS_P6
MB_DQS_P5
MB_DQS_P4
MB_DQS_P3
MB_DQS_P2
MB_DQS_P1
MB_DQS_P0
MB_DQS_N7
MB_DQS_N6
MB_DQS_N5
MB_DQS_N4
MB_DQS_N3
MB_DQS_N2
MB_DQS_N1
MB_DQS_N0
MB_CLK5_P
MB_CLK5_N
MB_CLK1_P
MB_CLK1_N
MB_CLK7_P
MB_CLK7_N
MB_CLK4_P
MB_CLK4_N
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS*
MB_CAS*
MB_WE*
MB1_CS0*
MB0_CS1*
MB0_CS0*
MB_CKE1
MB_CKE0
MB1_ODT0
MB0_ODT1
MB0_ODT0
AD12
AC16
AE22
AB26
E25
A22
B16
A12
AF12
AE16
AF21
AC25
F26
A24
D16
C12
AE12
AD16
AF22
AC26
E26
A23
C16
B12
P22
R22
A17
A18
AF18
AF17
R26
R25
J26
U26
R24
U25
U24
U23
U22
W25
V26
H26
J25
Y26
W23
W26
M_B_DM7
M_B_DM6
M_B_DM5
M_B_DM4
M_B_DM3
M_B_DM2
M_B_DM1
M_B_DM0
M_B_DQS7
M_B_DQS6 M_B_DQ51
M_B_DQS5
M_B_DQS4
M_B_DQS3
M_B_DQS2
M_B_DQS1
M_B_DQS0
M_B_DQS#7
M_B_DQS#6
M_B_DQS#5
M_B_DQS#4
M_B_DQS#3
M_B_DQS#2
M_B_DQS#1
M_B_DQS#0
M_B_CLK_DDR1
M_B_CLK_DDR1#
M_B_CLK_DDR2
M_B_CLK_DDR2#
MB1_ODT0
M_B_ODT1
M_B_ODT0
090803-1
M_B_BS#2
M_B_BS#1
M_B_BS#0
M_B_RAS#
M_B_CAS#
M_B_WE#
M_B_CS1#
M_B_CS0#
M_B_CKE1
M_B_CKE0
TP3 TPAD14-GP TP3 TPAD14-GP
1
M_B_CLK_DDR1 8
M_B_CLK_DDR1# 8
M_B_CLK_DDR2 8
M_B_CLK_DDR2# 8
M_B_BS#2 8
M_B_BS#1 8
M_B_BS#0 8
M_B_RAS# 8
M_B_CAS# 8
M_B_CS1# 8
M_B_CS0# 8
M_B_CKE1 8
M_B_CKE0 8
M_B_ODT1 8
M_B_ODT0 8
M_B_DM[7..0] 8
M_B_DQS[7..0] 8
M_B_DQS#[7..0] 8
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
CPU(2/4) DDR III
CPU(2/4) DDR III
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU(2/4) DDR III
PATEK
PATEK
PATEK
Hsichih, Taipei
1
5 57 Monday, March 15, 2010
5 57 Monday, March 15, 2010
5 57 Monday, March 15, 2010
SA
SA
SA
5
+2.5VS_VDDA +2.5VS_LDO_CPU
L18
L18
1 2
PBY160808T-600Y-N-GP
PBY160808T-600Y-N-GP
1 2
C8
C8
SC180P50V2JN-1GP
D D
SC180P50V2JN-1GP
091215-1
C9
1 2
SC4D7U25V5KX-GPC9SC4D7U25V5KX-GP
SC3300P50V2KX-1GP
SC3300P50V2KX-1GP
1 2
ROUTE AS DIFF PAIR
CPU_VDD1_RUN_FB_H 36
CPU_VDD1_RUN_FB_L 36
CPU_VDD0_RUN_FB_H 36
CPU_VDD0_RUN_FB_L 36
CPU_VDDNB_RUN_FB_H 36
CPU_VDDNB_RUN_FB_L 36
1 2
R18 0R0402-PAD-1-GP R18 0R0402-PAD-1-GP
1 2
R19 0R0402-PAD-1-GP R19 0R0402-PAD-1-GP
091221-1
CPU_CLK 15,20
C C
CPU_CLK# 15,20
LAYOUT: PLACE 169 OHM NO MORE THAN 500 MILS FROM CPU
1 2
1 2
C13
C13
SC3900P50V2KX-2GP
SC3900P50V2KX-2GP
C14
C14
SC3900P50V2KX-2GP
SC3900P50V2KX-2GP
R21
R21
169R2F-GP
169R2F-GP
1 2
CLKCPU_IN
CLKCPU#_IN
091224-1
+1.5V
HDT Connectors
+1.5V
DY
DY
1 2
C18
300R2J-4-GP
300R2J-4-GP
C18
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
HDT1
HDT1
1
3
5
7
9
11
13
15
17
19
21
23
SMC-CONN26A-FP
SMC-CONN26A-FP
20.F0357.025
20.F0357.025
DY
DY
THERM_SCI# 18,23
5
2
4
6
8
10
12
14
16
18
20
22
24
26
SRN1KJ-7-GP
SRN1KJ-7-GP
+3VALW
R58
R58
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
R33
R33
DBREQJ
DBRDY
TCK
TMS
B B
TDI
TRST_L
TDO
A A
+1.1VS
LDT_RST#_HDT
RN105
RN105
1 2
CBE
CH3904GP-GP-U
CH3904GP-GP-U
R32 300R2J-4-GP
R32 300R2J-4-GP
1 2
+1.5V
4
1
2 3
CPU_ALERT#_U
Q18
Q18
091012-1
DY
DY
CPU_ALERT#_L
C10
C10
TP121 TPAD14-GP TP121 TPAD14-GP
TP122 TPAD14-GP TP122 TPAD14-GP
TP123 TPAD14-GP TP123 TPAD14-GP
TP124 TPAD14-GP TP124 TPAD14-GP
TP5 TPAD14-GP TP5 TPAD14-GP
TP6 TPAD14-GP TP6 TPAD14-GP
TP7 TPAD14-GP TP7 TPAD14-GP
TP8 TPAD14-GP TP8 TPAD14-GP
TP9 TPAD1 4-GP TP9 TPAD1 4-GP
TP10 TPAD14-GP TP10 TPAD14-GP
TP11 TPAD14-GP TP11 TPAD14-GP
4
1
1
C11
C11
SCD22U25V3KX-GP
SCD22U25V3KX-GP
2
2
CPU_NB_FB_1
CPU_NB_FB_0
DBRDY
TMS
1
TCK
1
TRST_L
1
TDI
1
R26 510R2F-L-GP R26 510R2F-L-GP
1 2
R28 510R2F-L-GP R28 510R2F-L-GP
1 2
1
1
1
1
R34
R34
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
1
1
1
091221-1
M_A_RST# 8
M_B_RST# 8
4
TP4 TPAD14-GP TP4 TPAD14-GP
TP56
1
CPU_TEST25
CPU_TEST25#
CPU_TEST19
CPU_TEST18
CPU_TEST12
CPU_TEST17
CPU_TEST16
CPU_TEST15
CPU_TEST14
CPU_TEST10
CPU_TEST9
CPU_TEST8
CPU_TEST7
CPU_TEST6
NC
NC
AB6
G10
AA9
AC9
AD9
AF9
H10
AC8
AA6
W18
M11
H19
H18
AA7
H16
B18
3
090930-1
+1.5V
4
RN104
RN104
SRN1KJ-7-GP
THERMTRIP*
PROCHOT*
ALERT*
MEMHOT*
THERMDC
THERMDA
VTT_SENSE
M_VREF
M_ZN
DBREQ*
TEST29
TEST29*
TEST28
TEST28*
TEST27
TEST24
TEST23
TEST22
TEST21
TEST20
SRN1KJ-7-GP
SID
SIC
SVD
SVC
M_P
TDO
1
AF6
AC7
AE6
CPU_MEMHOT#_L
AA8
W7
W8
AF5
AF4
A4
A6
CPU_VDDR_SENSE
Y10
W17
MEMZN
AE10
MEMZP
AF10
E10
AE9
TP_FBCLKOUT
C9
TP_FBCLKOUT#
C8
J7
H8
CPU_TEST27
AF8
CPU_TEST24
AE7
CPU_TEST23
AD7
CPU_TEST22
AE8
CPU_TEST21
AB8
CPU_TEST20
AF7
2 3
CPU1B
CPU1B
SEC 2 OF 6
SEC 2 OF 6
MISC
VDDA
F8
VDDA
F9
VDD1_FB
Y6
VDD1_FB*
VDD0_FB
F6
VDD0_FB*
E6
VDDNB_FB
H6
VDDNB_FB*
G6
VDDIO_FB
W9
VDDIO_FB*
Y9
CLKIN
A9
CLKIN*
A8
DBRDY
TMS
TCK
TRST*
TDI
TEST25
E9
TEST25*
E8
TEST19
G9
TEST18
TEST12
TEST17
D7
TEST16
E7
TEST15
F7
TEST14
C7
TEST10
K8
TEST9
C2
TEST8
C4
TEST7
C3
TEST6
NC
NC
RSVD
B3
RSVD
RSVD
RSVD
D5
RSVD
RSVD
RSVD
RSVD
B5
RSVD
C5
RSVD
A5
RSVD
C1
RSVD
A3
DANUB
DANUB
MISC
+1.5V
+1.5V
4
R55
R55
DY
DY
1 2
1KR2J-1-GP
1KR2J-1-GP
1
2 3
RN107
RN107
SRN1KJ-7-GP
SRN1KJ-7-GP
CPU_SID
CPU_SIC
TP14 TPAD14-GP TP14 TPAD14-GP
1
R24
R24
1 2
39D2R2F-L-GP
39D2R2F-L-GP
R27
R27
39D2R2F-L-GP
39D2R2F-L-GP
1 2
DBREQJ
TDO
R35 80D6R2F-L-GP R35 80D6R2F-L-GP
1 2
1 2
DY
DY
091224-1
1
R39
R39
091223-2
RN142
CPU_TEST19
CPU_TEST18
CPU_TEST24
CPU_TEST22
RN142
1
2
3
4 5
SRN1KJ-4-GP
SRN1KJ-4-GP
3
8
7
6
CPU_TEST27
CPU_TEST12
CPU_TEST21
CPU_TEST20
091223-2
RN143
RN143
1
2
3
4 5
SRN1KJ-4-GP
SRN1KJ-4-GP
2
R2315
R2315
1 2
300R2J-4-GP
300R2J-4-GP
CPU_THERMDC
CPU_THERMDA
1 2
R45 0R0402-PAD-1-GP R45 0R0402-PAD-1-GP
1 2
R43 0R0402-PAD-1-GP R43 0R0402-PAD-1-GP
CPU_SVD 36
CPU_SVC 36
+1.5V
1 2
C17
C17
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
TP125 TPAD14-GP TP125 TPAD14-GP
1KR2J-1-GP
1KR2J-1-GP
HDT_RST# 4
8
7
6
2
R2316
R2316
1 2
1KR2J-1-GP
1KR2J-1-GP
THERMTRIP#
CPU_PROCHOT#_CPU
CPU_ALERT#_L
CPU_MEMHOT#_L 8
TP15 TPAD14-GP TP15 TPAD14-GP
1
TP16 TPAD14-GP TP16 TPAD14-GP
1
091221-1
+1.5V
1
+1.5V
4
RN61
RN61
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
PROCHOT#_CPU_B
THERMTRIP#_B
B
E
Q19
Q19
C
CH3904GP-GP-U
CH3904GP-GP-U
091012-1
C
CPU_THERMTRIP# 18,23,46
CPU_PROCHOT# 23
B
E
Q21
Q21
CH3904GP-GP-U
CH3904GP-GP-U
091016-1
CPU_PROCHOT#_CPU 15,55
+1.5V
VREF_DDR_CLAW
1 2
C15
C15
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
CPU_SID_SB700 18
CPU_SIC_SB700 18
1 2
C12
C12
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
1 2
1 2
C16
C16
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
R25 1KR2F-3-GP R25 1KR2F-3-GP
R23 1KR2F-3-GP R23 1KR2F-3-GP
LAYOUT: Locate close to CPU.
M_VREF
SHORTER THAN 6 INCHES
15MIL TRACE, 20 MIL SPACE
+1.5VS
1 2
R38
R38
4K7R2J-2-GP
4K7R2J-2-GP
DY
DY
C
PATEK
PATEK
PATEK
+3VS
1 2
R46
R46
4K7R2J-2-GP
4K7R2J-2-GP
DY
DY
LDT_RST#_HDT
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
1
6 57 Monday, March 15, 2010
6 57 Monday, March 15, 2010
6 57 Monday, March 15, 2010
DY
DY
091012-1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Q18_B
B
E
Q2
Q2
CH3904GP-GP-U
CH3904GP-GP-U
1 2
R56 0R2J-2-GP
R56 0R2J-2-GP
DY
DY
CPU(3/4) CONTROL
CPU(3/4) CONTROL
CPU(3/4) CONTROL
SA
SA
SA
5
4
3
2
1
LAYOUT: PLACE UNDER CPU ON BACK
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VDDNB
VDDNB
VDDNB
VDDNB
VDDNB
+1.5V@9A VCORE 36A
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
VDDR 1.5A
+1.05VS
A10
AA10
AB10
AC10
AD10
B10
C10
D10
W10
+VDDNB
V16
T16
P16
M16
K16
VDDNB CORE
0.9V 4A
CPU1F
CPU1F
SEC 6 OF 6
SEC 6 OF 6
GROUND
D D
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
C C
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
B B
F21
F23
F25
H7
H9
H21
H23
J4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GROUND
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+VCC_CORE +1.5V
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M17
N4
N6
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
AC6
+VCC_CORE
N11
M10
L15
L13
L11
K14
K12
K10
J15
J13
J11
W4
V14
V12
V10
U15
U13
U11
T14
T12
T10
R11
P10
AD2
AC4
M8
M6
M2
G4
CPU1E
CPU1E
SEC 5 OF 6
SEC 5 OF 6
POWER
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD0
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
VDD1
POWER
N9
N7
L9
L7
L4
K6
J9
H2
Y2
V8
V6
U9
U7
T8
T6
T2
R9
R7
R4
P8
DANUB
DANUB
+VCC_CORE
+VCC_CORE
+VDDNB
+1.5V
22uF x 4, 0.22uF x 1, 0.01uF x 1, 180pF x1
DY
DY
1 2
C19
C19
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
1 2
C20
C20
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C21
C21
1 2
1
1
C22
C22
2
2
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
22uF x 4, 0.22uF x 1, 0.01uF x 1, 180pF x1
1 2
1 2
C36
C36
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C51
C51
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C37
C37
1
1
2
2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
1 2
1 2
C34
C34
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
22uF x 3
C49
C49
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C35
C35
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
C50
C50
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
22u x 2 0.22u X 2 180pF x1
C66
C68
C68
C66
1 2
SCD22U25V3KX-GP
SCD22U25V3KX-GP
DY
DY
C62
C61
C61
C62
1
1
1
1
2
2
2
2
DY
DY
DY
DY
SCD22U25V3KX-GP
SCD22U25V3KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
1 2
C60
C60
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
091102-1
C23
C23
C38
C38
SC180P50V2JN-1GP
SC180P50V2JN-1GP
DY
DY
SCD22U25V3KX-GP
SCD22U25V3KX-GP
DY
DY
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1 2
C24
C24
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
091102-1
1 2
C39
C39
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
DY
DY
DY
DY
091102-1
1 2
C25
C25
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1 2
C40
C40
SC180P50V2JN-1GP
SC180P50V2JN-1GP
+1.05VS
+1.05VS
DY
DY
C26
C26
1 2
1 2
C41
C41
091102-1
+1.5V
C52
C52
1
1
2
2
DY
DY
DY
DY
SCD22U25V3KX-GP
SCD22U25V3KX-GP
CPU MEMORY VTT
LAYOUT: PLACE CLOSE TO CPU socket
C31
C31
1 2
180p x 4
C46
C46
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
091215-1
DY
DY
C32
C32
1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DY
DY
C47
C47
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
DY
DY
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
C33
C33
1 2
C48
C48
4.7u x 4 0.22u X 4
DY
DY
DY
DY
C30
C30
1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DY
DY
C45
C45
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C27
C27
C28
C28
C29
1 2
1
1
2
2
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C29
1
1
2
2
DY
DY
SCD22U25V3KX-GP
SCD22U25V3KX-GP
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1n x 4
DY
DY
1 2
1 2
C42
C42
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C43
C43
1 2
C44
C44
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
CPU VDDIO
LAYOUT: PLACE CLOSE TO CPU BETWEEN CPU AND MEMORY
SC180P50V2JN-1GP
SC180P50V2JN-1GP
DY
DY
C67
C67
1 2
4.7u x 4 0.22u X 4 180p x 2 0.01u X 1
DY
DY
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1
1
2
2
C53
C53
+1.5V
DY
DY
SCD22U25V3KX-GP
SCD22U25V3KX-GP
DY
DY
1
1
2
2
C54
C54
C55
C55
1 2
SCD22U25V3KX-GP
SCD22U25V3KX-GP
091102-1
C73
C73
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
C56
C56
1 2
0.1u X 1
C57
C57
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
C58
C58
C59
1 2
C59
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C65
C65
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
091215-1
DY
DY
C64
C64
1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DY
DY
C63
C63
1 2
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
DANUB
DANUB
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
091102-1
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
CPU(4/4) POWER
CPU(4/4) POWER
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU(4/4) POWER
PATEK
PATEK
PATEK
Hsichih, Taipei
1
7 57 Monday, March 15, 2010
7 57 Monday, March 15, 2010
7 57 Monday, March 15, 2010
SA
SA
SA
5
DIMM1
M_B_A[15..0] 5
D D
C C
B B
M_B_BS#2 5
M_B_BS#0 5
M_B_BS#1 5 M_A_BS#2 5
M_B_DQ[63..0] 5
M_B_DQS#[7..0] 5
M_B_DQS[7..0] 5
M_B_ODT0 5
DDR_VREF _S3
DDR_VREF _DQ_S3
M_B_ODT1 5
C84
C84
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
MEM_VTT
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_RST# 6
1 2
C85
C85
MEM_VTT
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C88
C88
DIMM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P- 21-GP
DDR3-204P- 21-GP
62.10017.J71
62.10017.J71
H = 5.2mm
091223-1
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
M_B_DM0
11
DM0
M_B_DM1
28
DM1
M_B_DM2
46
DM2
M_B_DM3
63
DM3
M_B_DM4
136
DM4
M_B_DM5
153
DM5
M_B_DM6
170
DM6
M_B_DM7
187
DM7
200
SDA
202
SCL
EVENT#
VDDSPD
SA0
SA1
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1.5V MEM_VTT
1 2
DY
DY
TC1
TC1
SE330U2VDM-L- GP
SE330U2VDM-L- GP
M_B_EVENT#
198
199
DIMM2_SA0
197
201
77
122
DIMM_TEST1
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
DE-COUPLING FOR CHANNEL A SODIMM
A A
+1.5V
1 2
1 2
1 2
1 2
1 2
DY
DY
DY
DY
DY
C90
C90
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
DY
C91
C91
C92
C92
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
DY
DY
DY
DY
C93
C93
C94
C94
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C95
C95
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
C97
C97
C96
C96
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
C100
C98
C98
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C100
C99
C99
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DE-COUPLING FOR CHANNEL A SODIMM (ONE CAP PER POWER PIN)
5
SB_SMB_DAT0 18,20,23,27
SB_SMB_CLK0 18,20,23,27
1 2
TP12 TPAD14-GP TP12 TPAD14-GP
1
+1.5V
1 2
C114
C114
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
091102-1
1 2
C101
C101
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
4
M_B_RAS# 5
M_B_WE# 5
M_B_CAS# 5
M_B_CS0# 5
M_B_CS1# 5
M_B_CKE0 5
M_B_CKE1 5
M_B_CLK_DDR 1 5
M_B_CLK_DDR 1# 5
M_B_CLK_DDR 2 5
M_B_CLK_DDR 2# 5
M_B_DM[7..0] 5
R108
R108
4K7R2J-2-GP
4K7R2J-2-GP
+0.75V
4
+3VS
CPU_MEMHOT #_L 6
091221-1
R61
R61
1 2
0R0603-PAD-1- GP
0R0603-PAD-1- GP
+3VS
1 2
C79
C79
SC1U6D3V2KX- GP
SC1U6D3V2KX- GP
Check if SB need
Memhot event
MEM_VTT
1 2
DY
DY
R60 0R2J-2-GP
R60 0R2J-2-GP
1 2
DY
DY
R107 0R 2J-2-GP
R107 0R 2J-2-GP
DDR_VREF _DQ_S3
M_A_EVENT#
M_B_EVENT#
DDR_VREF _S3
+1.5V
1 2
DY
DY
3
M_A_A[15..0] 5
M_A_BS#0 5
M_A_BS#1 5
M_A_DQ[63..0] 5
M_A_DQS#[7..0] 5
M_A_DQS[7..0] 5
M_A_ODT0 5
M_A_ODT1 5
C86
C86
C87
C87
1 2
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DE-COUPLING FOR CHANNEL B SODIMM
1 2
DY
DY
C102
C102
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
DY
DY
DY
DY
C115
C103
C103
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C115
C104
C104
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_RST# 6
MEM_VTT
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
1 2
DY
DY
DY
DY
C219
C219
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MEM_VTT
1 2
C232
C232
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
109
108
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
10
27
45
62
135
152
169
186
12
29
47
64
137
154
171
188
116
120
126
1
30
203
204
C89
C89
1 2
1 2
C108
C108
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DE-COUPLING FOR CHANNEL B SODIMM (ONE CAP PER POWER PIN)
3
DIMM2
DIMM2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
VREF_CA
VREF_DQ
RESET#
VTT1
VTT2
DDR3-204P- 20-GP
DDR3-204P- 20-GP
62.10017.J61
62.10017.J61
H = 9.2mm
1 2
C109
C109
C110
C110
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RAS#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
EVENT#
VDDSPD
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
1 2
2
NP1
NP1
NP2
NP2
110
113
WE#
115
114
121
73
74
101
CK0
103
102
CK1
104
M_A_DM0
11
DM0
M_A_DM1
28
DM1
M_A_DM2
46
DM2
M_A_DM3
63
DM3
M_A_DM4
136
DM4
M_A_DM5
153
DM5
M_A_DM6
170
DM6
M_A_DM7
187
DM7
SB_SMB_DAT0
200
SDA
SB_SMB_CLK0
202
SCL
SA0
SA1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
M_A_EVENT#
198
199
197
201
77
122
DIMM_TEST2
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
1 2
1 2
C112
C112
C113
C111
C111
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C113
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
TP13 TPAD14-GP TP13 TPAD14-GP
1
+1.5V
2
M_A_RAS# 5
M_A_WE# 5
M_A_CAS# 5
M_A_CS0# 5
M_A_CS1# 5
M_A_CKE0 5
M_A_CKE1 5
M_A_CLK_DDR 1 5
M_A_CLK_DDR 1# 5
M_A_CLK_DDR 2 5
M_A_CLK_DDR 2# 5
M_A_DM[7..0] 5
+3VS
1 2
C80
C80
SC1U6D3V2KX- GP
SC1U6D3V2KX- GP
DDR_VREF_CA
+1.5V
R113
R113
1KR2F-3-GP
1KR2F-3-GP
1 2
R112
R112
1 2
1KR2F-3-GP
1KR2F-3-GP
Change to signle R
LAYOUT: Locate close to DIMM
DDR_VREF_DQ
+1.5V
R114
R114
1KR2F-3-GP
1KR2F-3-GP
1 2
R115
R115
1 2
1KR2F-3-GP
1KR2F-3-GP
Change to signle R
LAYOUT: Locate close to DIMM
MEM_VTT
1 2
C233
C233
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
1 2
C81
C81
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C117
C117
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
DDR_VREF _S3
1 2
1 2
C82
C82
C83
C83
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DDR_VREF _DQ_S3
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
1 2
C118
C118
C116
C116
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DDR3-SOCKET/ CAP
DDR3-SOCKET/ CAP
DDR3-SOCKET/ CAP
PATEK
PATEK
PATEK
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
8 57 Monday, March 15, 2010
8 57 Monday, March 15, 2010
8 57 Monday, March 15, 2010
SA
SA
SA
5
CPUCADOUT0
CPUCADOUTJ0
1 2
ALINK_NBRX_SBTX_P0 15
ALINK_NBRX_SBTX_N0 15
ALINK_NBRX_SBTX_P1 15
ALINK_NBRX_SBTX_N1 15
ALINK_NBRX_SBTX_P2 15
ALINK_NBRX_SBTX_N2 15
ALINK_NBRX_SBTX_P3 15
ALINK_NBRX_SBTX_N3 15
CPUCADOUT1
CPUCADOUTJ1
CPUCADOUT2
CPUCADOUTJ2
CPUCADOUT3
CPUCADOUTJ3
CPUCADOUT4
CPUCADOUTJ4
CPUCADOUT5
CPUCADOUTJ5
CPUCADOUT6
CPUCADOUTJ6
CPUCADOUT7
CPUCADOUTJ7
CPUCADOUT8
CPUCADOUTJ8
CPUCADOUT9
CPUCADOUTJ9
CPUCADOUT10
CPUCADOUTJ10
CPUCADOUT11
CPUCADOUTJ11
CPUCADOUT12
CPUCADOUTJ12
CPUCADOUT13
CPUCADOUTJ13
CPUCADOUT14
CPUCADOUTJ14
CPUCADOUT15
CPUCADOUTJ15
R62
R62
301R2F-GP
301R2F-GP
PEG_RXP15
PEG_RXN15
PEG_RXP14
PEG_RXN14
PEG_RXP13
PEG_RXN13
PEG_RXP12
PEG_RXN12
PEG_RXP11
PEG_RXN11
PEG_RXP10
PEG_RXN10
PEG_RXP9
PEG_RXN9
PEG_RXP8
PEG_RXN8
PEG_RXP7
PEG_RXN7
PEG_RXP6
PEG_RXN6
PEG_RXP5
PEG_RXN5
PEG_RXP4
PEG_RXN4
PEG_RXP3
PEG_RXN3
PEG_RXP2
PEG_RXN2
PEG_RXP1
PEG_RXN1
PEG_RXP0
PEG_RXN0
SSID = N.B
D D
CPUCADOUT[15..0] 4
CPUCADOUTJ[15..0] 4
CPUHTTCLKOUT0 4
CPUHTTCLKOUTJ0 4
CPUHTTCLKOUT1 4
CPUHTTCLKOUTJ1 4
CPUHTTCTLOUT0 4
C C
LANE REVERSE
PEG_RXN[15..0] 45
PEG_RXP[15..0] 45
B B
NEW CARD
WLAN
A A
A-LINK
5
CPUHTTCTLOUTJ0 4
CPUHTTCTLOUT1 4
CPUHTTCTLOUTJ1 4
Place < 100mils from pin C23 and A24
PCIE_RXP0 28
PCIE_RXN0 28
PCIE_RXP3 26
PCIE_RXN3 26
PCIE_RXP4 27
PCIE_RXN4 27
4
U1001A
U1001A
Y25
HT_RXCAD0P
Y24
HT_RXCAD0N
V22
HT_RXCAD1P
V23
HT_RXCAD1N
V25
HT_RXCAD2P
V24
HT_RXCAD2N
U24
HT_RXCAD3P
U25
HT_RXCAD3N
T25
HT_RXCAD4P
T24
HT_RXCAD4N
P22
HT_RXCAD5P
P23
HT_RXCAD5N
P25
HT_RXCAD6P
P24
HT_RXCAD6N
N24
HT_RXCAD7P
N25
HT_RXCAD7N
AC24
HT_RXCAD8P
AC25
HT_RXCAD8N
AB25
HT_RXCAD9P
AB24
HT_RXCAD9N
AA24
HT_RXCAD10P
AA25
HT_RXCAD10N
Y22
HT_RXCAD11P
Y23
HT_RXCAD11N
W21
HT_RXCAD12P
W20
HT_RXCAD12N
V21
HT_RXCAD13P
V20
HT_RXCAD13N
U20
HT_RXCAD14P
U21
HT_RXCAD14N
U19
HT_RXCAD15P
U18
HT_RXCAD15N
T22
HT_RXCLK0P
T23
HT_RXCLK0N
AB23
HT_RXCLK1P
AA22
HT_RXCLK1N
M22
HT_RXCTL0P
M23
HT_RXCTL0N
R21
HT_RXCTL1P
R20
HT_RXCALP HT_TXCALP
HT_RXCALN
C23
A24
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
4
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
RS880M-GP
RS880M-GP
U1001B
U1001B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
RS880M-GP
RS880M-GP
PART 1 OF 6
PART 1 OF 6
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
PCIE I/F GFX
PCIE I/F GFX
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCE_CALRP
PCE_CALRN
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
B25
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
AD7
AE7
AE6
AD6
AB6
AC6
AD5
AE5
AC8
AB8
3
HT_TXCALN
Place < 100mils from pin B25 and B24
GTXP0
GTXN0
GTXP1
GTXN1
GTXP2
GTXN2
GTXP3
GTXN3
GTXP4
GTXN4
GTXP5
GTXN5
GTXP6
GTXN6
GTXP7
GTXN7
GTXP8
GTXN8
GTXP9
GTXN9
GTXP10
GTXN10
GTXP11
GTXN11
GTXP12
GTXN12
GTXP13
GTXN13
GTXP14
GTXN14
GTXP15
GTXN15
PCIE_TXP0_NB
PCIE_TXN0_NB
PCIE_TXP3_NB
PCIE_TXN3_NB
PCIE_TXP4_NB
PCIE_TXN4_NB
ALINK_NBTX_SBRX_P0
ALINK_NBTX_SBRX_N0
ALINK_NBTX_SBRX_P1
ALINK_NBTX_SBRX_N1
ALINK_NBTX_SBRX_P2
ALINK_NBTX_SBRX_N2
ALINK_NBTX_SBRX_P3
ALINK_NBTX_SBRX_N3
PCE_PCAL
PCE_NCAL
Place < 100mils from pin AC8 and AB8
3
NB0CADOUT0
NB0CADOUTJ0
NB0CADOUT1
NB0CADOUTJ1
NB0CADOUT2
NB0CADOUTJ2
NB0CADOUT3
NB0CADOUTJ3
NB0CADOUT4
NB0CADOUTJ4
NB0CADOUT5
NB0CADOUTJ5
NB0CADOUT6
NB0CADOUTJ6
NB0CADOUT7
NB0CADOUTJ7
NB0CADOUT8
NB0CADOUTJ8
NB0CADOUT9
NB0CADOUTJ9
NB0CADOUT10
NB0CADOUTJ10
NB0CADOUT11
NB0CADOUTJ11
NB0CADOUT12
NB0CADOUTJ12
NB0CADOUT13
NB0CADOUTJ13
NB0CADOUT14
NB0CADOUTJ14
NB0CADOUT15
NB0CADOUTJ15
NB0HTTCLKOUT0 4
NB0HTTCLKOUTJ0 4
NB0HTTCLKOUT1 4
NB0HTTCLKOUTJ1 4
NB0HTTCTLOUT0 4
NB0HTTCTLOUTJ0 4
NB0HTTCTLOUT1 4
NB0HTTCTLOUTJ1 4
1 2
C122 SCD1U10V2KX-5GP
C122 SCD1U10V2KX-5GP
1 2
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
DIS
C124 SCD1U10V2KX-5GP
C124 SCD1U10V2KX-5GP
1 2
C126 SCD1U10V2KX-5GP
C126 SCD1U10V2KX-5GP
1 2
C127 SCD1U10V2KX-5GP
C127 SCD1U10V2KX-5GP
1 2
C128 SCD1U10V2KX-5GP
C128 SCD1U10V2KX-5GP
1 2
C129 SCD1U10V2KX-5GP
C129 SCD1U10V2KX-5GP
1 2
C130 SCD1U10V2KX-5GP
C130 SCD1U10V2KX-5GP
1 2
C131 SCD1U10V2KX-5GP
C131 SCD1U10V2KX-5GP
1 2
C132 SCD1U10V2KX-5GP
C132 SCD1U10V2KX-5GP
1 2
C133 SCD1U10V2KX-5GP
C133 SCD1U10V2KX-5GP
1 2
C134 SCD1U10V2KX-5GP
C134 SCD1U10V2KX-5GP
1 2
C135 SCD1U10V2KX-5GP
C135 SCD1U10V2KX-5GP
1 2
C136 SCD1U10V2KX-5GP
C136 SCD1U10V2KX-5GP
1 2
C137 SCD1U10V2KX-5GP
C137 SCD1U10V2KX-5GP
1 2
C138 SCD1U10V2KX-5GP
C138 SCD1U10V2KX-5GP
1 2
C139 SCD1U10V2KX-5GP
C139 SCD1U10V2KX-5GP
1 2
C140 SCD1U10V2KX-5GP
C140 SCD1U10V2KX-5GP
1 2
C141 SCD1U10V2KX-5GP
C141 SCD1U10V2KX-5GP
1 2
C142 SCD1U10V2KX-5GP
C142 SCD1U10V2KX-5GP
1 2
C143 SCD1U10V2KX-5GP
C143 SCD1U10V2KX-5GP
1 2
C144 SCD1U10V2KX-5GP
C144 SCD1U10V2KX-5GP
1 2
C145 SCD1U10V2KX-5GP
C145 SCD1U10V2KX-5GP
1 2
C146 SCD1U10V2KX-5GP
C146 SCD1U10V2KX-5GP
1 2
C147 SCD1U10V2KX-5GP
C147 SCD1U10V2KX-5GP
1 2
C148 SCD1U10V2KX-5GP
C148 SCD1U10V2KX-5GP
1 2
C149 SCD1U10V2KX-5GP
C149 SCD1U10V2KX-5GP
1 2
C150 SCD1U10V2KX-5GP
C150 SCD1U10V2KX-5GP
1 2
C151 SCD1U10V2KX-5GP
C151 SCD1U10V2KX-5GP
1 2
C152 SCD1U10V2KX-5GP
C152 SCD1U10V2KX-5GP
1 2
C153 SCD1U10V2KX-5GP
C153 SCD1U10V2KX-5GP
1 2
C154 SCD1U10V2KX-5GP
C154 SCD1U10V2KX-5GP
1 2
C155 SCD1U10V2KX-5GP
C155 SCD1U10V2KX-5GP
1 2
R64 1K27R2F-L-GP R64 1K27R2F-L-GP
R65 2KR2F-3-GP R65 2KR2F-3-GP
C156 SCD1U10V2KX-5GP C156 SCD1U10V2KX-5GP
1 2
C157 SCD1U10V2KX-5GP C157 SCD1U10V2KX-5GP
1 2
C955 SCD1U10V2KX-5GP C955 SCD1U10V2KX-5GP
1 2
C956 SCD1U10V2KX-5GP C956 SCD1U10V2KX-5GP
1 2
C158 SCD1U10V2KX-5GP C158 SCD1U10V2KX-5GP
1 2
1 2
C159 SCD1U10V2KX-5GP C159 SCD1U10V2KX-5GP
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
DIS
DIS
1 2
1 2
R63
R63
301R2F-GP
301R2F-GP
PEG_TXP15
PEG_TXN15
PEG_TXP14
PEG_TXN14
PEG_TXP13
PEG_TXN13
PEG_TXP12
PEG_TXN12
PEG_TXP11
PEG_TXN11
PEG_TXP10
PEG_TXN10
PEG_TXP9
PEG_TXN9
PEG_TXP8
PEG_TXN8
PEG_TXP7
PEG_TXN7
PEG_TXP6
PEG_TXN6
PEG_TXP5
PEG_TXN5
PEG_TXP4
PEG_TXN4
PEG_TXP3
PEG_TXN3
PEG_TXP2
PEG_TXN2
PEG_TXP1
PEG_TXN1
PEG_TXP0
PEG_TXN0
091001-1
C160 SCD1U10V2KX-5GP
C160 SCD1U10V2KX-5GP
C161 SCD1U10V2KX-5GP
C161 SCD1U10V2KX-5GP
C162 SCD1U10V2KX-5GP
C162 SCD1U10V2KX-5GP
C163 SCD1U10V2KX-5GP
C163 SCD1U10V2KX-5GP
C164 SCD1U10V2KX-5GP
C164 SCD1U10V2KX-5GP
C165 SCD1U10V2KX-5GP
C165 SCD1U10V2KX-5GP
C166 SCD1U10V2KX-5GP
C166 SCD1U10V2KX-5GP
C167 SCD1U10V2KX-5GP
C167 SCD1U10V2KX-5GP
+1.1VS
NB0CADOUT[15..0] 4
NB0CADOUTJ[15..0] 4
091001-1
LANE REVERSE
PCIE_TXP0 28
PCIE_TXN0 28
PCIE_TXP3 26
PCIE_TXN3 26
PCIE_TXP4 27
PCIE_TXN4 27
ALINK_NBTX_C_SBRX_P0 15
ALINK_NBTX_C_SBRX_N0 15
ALINK_NBTX_C_SBRX_P1 15
ALINK_NBTX_C_SBRX_N1 15
ALINK_NBTX_C_SBRX_P2 15
ALINK_NBTX_C_SBRX_N2 15
ALINK_NBTX_C_SBRX_P3 15
ALINK_NBTX_C_SBRX_N3 15
2
PEG_TXP[15..0] 45
PEG_TXN[15..0] 45
2
1
LAN LAN
NEW CARD
WLAN
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
RS880M_HT LINK&PCIe(1/4)
RS880M_HT LINK&PCIe(1/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
RS880M_HT LINK&PCIe(1/4)
A3
A3
A3
PATEK
PATEK
PATEK
Hsichih, Taipei
1
9 57 Monday, March 15, 2010
9 57 Monday, March 15, 2010
9 57 Monday, March 15, 2010
SA
SA
SA
5
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
+1.8VS
1 2
R75
R75
1KR2J-1-GP
100307-1
ALLOW_LDTSTOP 15
D D
LDT_RST#_CPU 4
PLT_RST# 15,21,22,26,27,28,47
100307-1
LDT_STP#_CPU 4
1 2
R73 0R0402-PAD-1-GP R73 0R0402-PAD-1-GP
1 2
DY
DY
R79 0R2J-2-GP
R79 0R2J-2-GP
1 2
R80 0R0402-PAD-1-GP R80 0R0402-PAD-1-GP
C172
C172
SC330P50V2KX-3GP
SC330P50V2KX-3GP
DY
DY
1KR2J-1-GP
NB_ALLOW_LDTSTOP
SYSREST#
1 2
Close to NB ball
C C
R90
R90
NB_PWRGD
1 2
+1.8VS
300R2J-4-GP
300R2J-4-GP
ENABLE External CLK GEN
B B
+1.8VS
SBK160808T-221Y-N-GP
SBK160808T-221Y-N-GP
A A
+1.8VS
SBK160808T-221Y-N-GP
SBK160808T-221Y-N-GP
20 mA
L6
L6
1 2
C179
L7
L7
1 2
C179
C181
C181
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
+1.8V_VDDA18HTPLL
12
+1.8V_VDDA18PCIEPLL
12
5
1 2
C180
C180
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C182
C182
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
STRP_DATA
NB_VDDC
EXT
EXT
EXT
EXT
STRP_DATA 54
4
+1.1VS
1 2
R82
R82
4K7R2J-2-GP
4K7R2J-2-GP
EXTCLK_EN
1 2
R85
R85
4K7R2J-2-GP
4K7R2J-2-GP
10KR2J-3-GP
10KR2J-3-GP
090709-1
GPIO MODE
0 1
1.1V 0.95V
4
091224-1
TP131 TPAD14-GP TP131 TPAD14-GP
NB_PWRGD 18
CLK_NB_14M 20
R1266
R1266
1 2
+3VS
+1.8VS
+1.8VS
+1.1VS
+1.8VS
1
CLK_NBHT_CLK 15,20
CLK_NBHT_CLK# 15,20
EXT
EXT
EXT
EXT
CLK_NB_GFX 20
CLK_NB_GFX# 20
CLK_NB_GPPSB 15,20
CLK_NB_GPPSB# 15,20
TP127 TPAD14-GP TP127 TPAD14-GP
TP128 TPAD14-GP TP128 TPAD14-GP
TP129 TPAD14-GP TP129 TPAD14-GP
091224- 1
+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL
LDT_STP#_CPU
NB_ALLOW_LDTSTOP
1 2
R83 0R2J-2-G P
R83 0R2J-2-G P
1 2
R84 0R2J-2-GP
R84 0R2J-2-GP
TP17 TPAD14-GP TP17 TPAD14-GP
1
TP18 TPAD14-GP TP18 TPAD14-GP
1
1
1
1
TP21 TPAD14-GP TP21 TPAD14-GP
1
RX881 NC
NB_REFCLK_P 15
NB_REFCLK_N 15
4
VGA_HSYNC_R
VGA_VSYNC_R
SYSREST#
NB_REFCLK_P
NB_REFCLK_N
CLK_NBGPP_CLK
CLK_NBGPP_CLK#
I2C_CLK_TP
I2C_DAT_TP
DDC_DAT0_TP
RS780_AUX_CAL
NB_REFCLK_P
NB_REFCLK_N
RN21
RN21
2 3
1
INT
INT
SRN4K7J-8-GP
SRN4K7J-8-GP
3
3KR2J-2-GP
3KR2J-2-GP
U1001C
U1001C
F12
AVDD1
E12
AVDD2
F14
AVDDDI
G15
AVSSDI
H15
AVDDQ
H14
AVSSQ
E17
C_Pr
F17
Y
F15
COMP_Pb
G18
RED
G17
REDb
E18
GREEN
F18
GREENb
E19
BLUE
F19
BLUEb
A11
DAC_HSYNC
B11
DAC_VSYNC
F8
DAC_SCL
E8
DAC_SDA
G14
DAC_RSET
A12
PLLVDD
D14
PLLVDD18
B12
PLLVSS
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESET#
A10
POWERGOOD
C10
LDTSTOP#
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN
F11
REFCLK_N
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP
V3
GPPSB_REFCLKN
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N
A8
DDC_CLK0/AUX0P
B7
DDC_CLK1/AUX1P
A7
DDC_DATA1/AUX1N
B10
STRP_DATA
G11
RESERVED
C8
AUX_CAL
RS880M-GP
RS880M-GP
CLK_NB_GFX#
CLK_NB_GFX
3
R66
R66
+3VS
2
1
STRAP_DEBUG_BUS_GPIO_ENABLEb
Enables the Test Debug Bus using GPIO.(PIN: RS780M--> VSYNC)
0 : Enable 1 : Disable
1 2
DY
DY
1 2
1 2
R67
R67
3KR2J-2-GP
3KR2J-2-GP
VGA_VSYNC_R
VGA_HSYNC_R
R71
R71
3KR2J-2-GP
3KR2J-2-GP
PART 3 OF 6
PART 3 OF 6
CRT/TVOUT
CRT/TVOUT
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
LVTM
LVTM
RS880: Enables Side port memory ( RS880 use HSYNC)
0 : Enable 1 : Disable
SUS_STAT#
Selects Loading of STRAPS From EEPROM
*
0 : I2C Master can load strap values from EEPROM if connected,
or use default values if not connected
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
VDDLTP18
VSSLTP18
VDDLT18_1
VDDLT18_2
VDDLT33_1
VDDLT33_2
VSSLT1
VSSLT2
VSSLT3
VSSLT4
VSSLT5
VSSLT6
VSSLT7
LVDS_DIGON
LVDS_BLON
LVDS_ENA_BL
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
A13
B13
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
E9
F7
G12
*
*
+1.8VS
+1.8VS
+3VS
R94
R94
4K7R2J-2-GP
4K7R2J-2-GP
DY
DY
1 2
1 2
R76
R76
3KR2J-2-GP
3KR2J-2-GP
NB_SUS_STAT#
091224-1
NB_TMDS_TP
MIS.
MIS.
TMDS_HPD
HPD
SUS_STAT#
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
2
D9
D10
D12
AE8
AD8
TESTMODE_NB
D13
1
NB_HPD
NB_SUS_STAT#
TP130 TPAD14-GP TP130 TPAD14-GP
1
TP19 TPAD14-GP TP19 TPAD14-GP
1 2
DY
DY
R91 0R2J-2-GP
R91 0R2J-2-GP
NB_DXP1 23
NB_DXN1 23
TP126 TPAD14-GP TP126 TPAD14-GP
1
1 2
R93
R93
1K8R2F-GP
1K8R2F-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
091224-1
RS880M_LVDS&CRT(2/4)
RS880M_LVDS&CRT(2/4)
RS880M_LVDS&CRT(2/4)
To G781
PATEK
PATEK
PATEK
SUS_STAT# 18
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
10 57 Monday, March 15, 2010
10 57 Monday, March 15, 2010
10 57 Monday, March 15, 2010
SA
SA
SA
5
D D
C C
4
AB12
AE16
AE15
AA12
AB16
AB14
AD14
AD13
AD15
AC16
AE13
AC14
AD16
AE17
AD17
W12
AD18
AB13
AB18
W14
AE12
AD12
V11
Y14
Y12
V14
V15
U1001D
U1001D
MEM_A0
MEM_A1
MEM_A2
MEM_A3
MEM_A4
MEM_A5
MEM_A6
MEM_A7
MEM_A8
MEM_A9
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_BA0
MEM_BA1
MEM_BA2
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
MEM_CKP
MEM_CKN
MEM_COMPP
MEM_COMPN
RS880M-GP
RS880M-GP
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
MEM_DQ3/DVO_D0
MEM_DQ4
MEM_DQ5/DVO_D1
MEM_DQ6/DVO_D2
MEM_DQ7/DVO_D4
MEM_DQ8/DVO_D3
MEM_DQ9/DVO_D5
MEM_DQ10/DVO_D6
MEM_DQ11/DVO_D7
MEM_DQ12
MEM_DQ13/DVO_D9
MEM_DQ14/DVO_D10
MEM_DQ15/DVO_D11
MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN
MEM_DQS1P
MEM_DQS1N
MEM_DM0
MEM_DM1/DVO_D8
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18
IOPLLVDD
IOPLLVSS
MEM_VREF
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
3
15 mA
without side port
+1.8VS
26 mA
+1.1VS
2
1
without side port
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
RS880M Side Port(3/4)
RS880M Side Port(3/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
RS880M Side Port(3/4)
A3
A3
A3
PATEK
PATEK
PATEK
Hsichih, Taipei
1
of
11 57 Monday, March 15, 2010
11 57 Monday, March 15, 2010
11 57 Monday, March 15, 2010
SA
SA
SA
5
4
3
2
1
SSID = N.B
D D
091221-1
600 mA
L8
+1.1VS
220 ohm @ 100MHz,2A
+1.1VS
220 ohm @ 100MHz,2A
C C
+1.1VS
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
700 mA
PBY201209T-221Y-N-GP
PBY201209T-221Y-N-GP
220 ohm @ 100MHz,2A
B B
L8
1 2
0R0805-PAD-1-GP
0R0805-PAD-1-GP
091221-1
L10
L10
1 2
0R0805-PAD-1-GP
0R0805-PAD-1-GP
700 mA
400 mA
220 ohm @ 100MHz,2A
L11
L11
1 2
+1.8VS
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C205
C205
L12
L12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
1 2
C210
C210
100107-1
+1.8VS
10 mA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C216
C216
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C183
C183
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C192
C192
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C206
C206
80mil Width
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C211
C211
+1.1V_RUN_VDDHT
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C184
C184
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
091102-1
+1.2V_RUN_VDDHTTX
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
100107-1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
+1.1V_RUN_VDDHTRX
C193
C193
1 2
1 2
C207
C207
+1.8V_RUN_VDDA18PCIE
1 2
C212
C212
C185
C185
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C186
C186
1 2
C194
C194
1 2
1 2
C208
C208
C213
C213
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
091102-1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C214
C214
C195
C195
1 2
1 2
C209
C209
U1001E
U1001E
J17
VDDHT_1
K16
L16
M16
P16
R16
T16
H18
G19
F20
E21
D22
B23
A23
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
J10
P10
K10
M10
L10
W9
AA9
AB9
AD9
AE9
AE11
AD11
T10
R10
U10
H9
Y9
F9
G9
1 2
C215
C215
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_MEM1
VDD18_MEM2
RS880M-GP
RS880M-GP
PART 5/6
PART 5/6
POWER
POWER
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD33_1
VDD33_2
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
+1.1V_RUN_VDDPCIE
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C187
C187
091102-1
7.6A
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C196
C196
C197
C197
1 2
1 2
without side port
100107-1
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
C217
C217
Place C377 close to C188
100mil Width
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C188
C188
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C198
C198
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
C199
C199
1 2
1 2
C189
C189
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C200
C200
1 2
100107-1
+3VS
C218
C218
1 2
C190
C190
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2.5 A
DY
DY
C201
C201
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
091224-1
1 2
C191
C191
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C202
C202
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
100107-1
L9 change to 68.00206.371
11 ohm
091228-1
L9
L9
1 2
PBY160808T-110Y-N-GP
1 2
C377
C377
PBY160808T-110Y-N-GP
220 ohm @ 100MHz, 2A
+NB_VDDC 0.95V~1.1V
+NB_VDDC
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
1 2
1 2
C203
C203
C204
C204
+1.1VS
W22
W24
W25
AD25
W11
W15
AC12
AA14
AB11
AB15
AB17
AB19
AE20
AB21
D23
E22
G22
G24
G25
H19
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
Y21
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
Y18
K11
A25
J22
L17
L22
L24
L25
L12
U1001F
U1001F
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
RS880M-GP
RS880M-GP
PART 6/6
PART 6/6
GROUND
GROUND
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
without side port
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
RS880M PWR&GND(4/4)
RS880M PWR&GND(4/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
RS880M PWR&GND(4/4)
A3
A3
A3
PATEK
PATEK
PATEK
Hsichih, Taipei
1
12 57 Monday, March 15, 2010
12 57 Monday, March 15, 2010
12 57 Monday, March 15, 2010
SA
SA
SA
5
CRT I/F & CONNECTOR
D D
C C
M93_RED 46
M93_GREEN 46
M93_BLUE 46
C221
C221
091225-1
SC10P50V2JN-4GP
SC10P50V2JN-4GP
Layout Note:
* Must be a ground return path between this ground and the ground on
the VGA connector.
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT
CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
4
Layout Note:
Place these resistors
close to the CRT-out
connector
L13
L13
1 2
NBQ160808T-470Y-N-GP
NBQ160808T-470Y-N-GP
L14
L14
1 2
NBQ160808T-470Y-N-GP
NBQ160808T-470Y-N-GP
L15
L15
1 2
NBQ160808T-470Y-N-GP
1 2
1 2
C222
C222
SC10P50V2JN-4GP
SC10P50V2JN-4GP
C223
C223
1 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
M93_RED
M93_GREEN
M93_BLUE
NBQ160808T-470Y-N-GP
C224
C224
1 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
1 2
R100
R100
150R2F-1-GP
150R2F-1-GP
C225
C225
R101
R101
3
DY
DY
1 2
JVGA_VS
JVGA_HS
DY
DY
1 2
C228
C228
1 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
12
15
14
13
C1193
C1193
CRT_R
CRT_G
CRT_B
C226
C226
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
091225-1
C230
C230
DY
DY
DY
DY
12
DDC_CRT_DAT
DDC_CRT_CLK
CRT_R
CRT_G
CRT_B
1 2
C229
C229
C227
C227
DY
DY
1 2
1 2
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
R102
R102
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
150R2F-1-GP
+5VS_CRT
C220
C220
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CRT1
CRT1
9
VCC_CRT
DDCDATA_ID1
DDCCLK_ID3
1
CRT_RED
2
CRT_GREEN
3
CRT_BLUE
VSYNC
HSYNC
D-SUB-15-27-GP-U2
D-SUB-15-27-GP-U2
2
R1249
R1249
10KR2J-3-GP
10KR2J-3-GP
NC#4
NC#11
GND
GND
GND
GND
GND
GND
GND
4
11
5
6
7
8
10
16
17
091125-1
10KR2J-3-GP
10KR2J-3-GP
1 2
Q87
Q87
DMP2305U-7-GP
DMP2305U-7-GP
G
CRTVDD_EN#_1
R1248
R1248
1 2
CRTVDD_EN#
D S
S
1
69.50007.691
+5VS_CRT_FUSE
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
D
Q88
Q88
.
.
.
.
.
.
. .
. .
2N7002E-1-GP
2N7002E-1-GP
G
1 2
C1194
C1194
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
+5VS
F1
F1
1 2
091019-1 091021-1
+5VS_CRT +5VS_CRT
1 2
EC1370
EC1370
EC1369
EC1369
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SB_PWRGD 18,30
DY
DY
1 2
+5VS_CRT
U3
U3
1
OE#
VGA_HSYNC 46
B B
VGA_VSYNC 46
2
A
GND3Y
74AHCT1G125G W - 1-GP
74AHCT1G125GW -1-GP
U4
U4
1
OE#
2
A
GND3Y
74AHCT1G125G W - 1-GP
74AHCT1G125GW -1-GP
VCC
VCC
5
4
5
4
Hsync & Vsync level shift
1 2
HSYNC_5
VSYNC_5
091009-1
C231
C231
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SRN33J-5-GP-U
SRN33J-5-GP-U
2 3
1
RN12
RN12
4
JVGA_HS
JVGA_VS
SC22P50V2JN-4GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
AFTP82 AFTE14P-GP AFTP82 AFTE14P-GP
AFTP85 AFTE14P-GP AFTP85 AFTE14P-GP
AFTP86 AFTE14P-GP AFTP86 AFTE14P-GP
AFTP87 AFTE14P-GP AFTP87 AFTE14P-GP
AFTP88 AFTE14P-GP AFTP88 AFTE14P-GP
0804 check ok
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
1
1
1
1
CRT_R
CRT_G
CRT_B
GND
+5VS_CRT
+5VS_CRT
4
1
RN11
RN11
SRN4K7J-8-GP
SRN4K7J-8-GP
2 3
DDC_CRT_DAT 46
DDC_CRT_CLK 46
SC22P50V2JN-4GP
0803??
SC22P50V2JN-4GP
SC22P50V2JN-4GP
DDC_CRT_DAT& DDC_CRT_CLK
The signal is 5V-tolerant on RS880M.
ESD
+5VS_CRT
D3
A A
CRT_R
D3
3
BAV99-8-GP
BAV99-8-GP
1 2
5
+5VS_CRT
DDC_CRT_DAT
close to connector
D5
D5
1
2
3 4
BAV99S-GP
BAV99S-GP
6
5
DDC_CRT_CLK
4
CRT_G
+5VS_CRT
D6
D6
1
2
3 4
BAV99S-GP
BAV99S-GP
CRT_B
6
5
3
JVGA_VS
+5VS_CRT
D4
D4
1
2
3 4
BAV99S-GP
BAV99S-GP
6
5
2
JVGA_HS
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CRT CONNECTOR
CRT CONNECTOR
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
CRT CONNECTOR
A3
A3
A3
PATEK
PATEK
PATEK
1
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
13 57 Monday, March 15, 2010
13 57 Monday, March 15, 2010
13 57 Monday, March 15, 2010
SA
SA
SA
5
LVDS CONNECTOR
LVDS1
LVDS1
NP1
NP2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
D D
C C
TXA_CLK- 45
TXA_CLK+ 45
TXA_OUT0- 45
TXA_OUT0+ 45
TXA_OUT1- 45
TXA_OUT1+ 45
TXA_OUT2- 45
TXA_OUT2+ 45
TXB_CLK- 45
TXB_CLK+ 45
TXB_OUT0- 45
TXB_OUT0+ 45
TXB_OUT1- 45
TXB_OUT1+ 45
TXB_OUT2- 45
TXB_OUT2+ 45
1st: 20.F1619.040
2nd:
R2328
BRIGHTNESS_C
R2328
1 2
1KR2J-1-GP
1KR2J-1-GP
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
42
ETY-CONN 4 0 E-GP-U
ETY-CONN40E-GP-U
091021-1
1016
USB_4ÂUSB_4+
DISP_OFF#
DCBATOUT_LVDS
1 2
C673
C673
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
BRIGHTNESS 45
+5VS_CAMERA
EC3037
EC3037
1 2
EMI
EMI
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
R196
R196
1 2
10KR2J-3-GP
10KR2J-3-GP
SIZE_DET0_L
BRIGHTNESS_C
LCD_SCL 46
LCD_SDA 46
091222-1
4
EC2
EC2
091021-1
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
1 2
RN62
SRN4K7J-8-GP
SRN4K7J-8-GP
C629
C629
1 2
EMI
EMI
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
RN62
1
2 3
+3VS_LVDS
091015-1
LCD_SCL
LCD_SDA
091015-1
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
POLYSW-1D1A24V-1-GP
POLYSW-1D1A24V-1-GP
4
DY
DY
R290
R290
100KR2J-1-GP
100KR2J-1-GP
C649
C649
F2
F2
1 2
F4
F4
1 2
+3VS
100309-1
1 2
+3VS
1 2
DY
DY
091021-1
SC1U6D3V2ZY-GP
SC1U6D3V2ZY-GP
R2327
R2327
1 2
1KR2J-1-GP
1KR2J-1-GP
DY
DY
C572
C572
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
091215-1
+LCDVDD
EC3036
EC3036
1 2
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+3VS +3VS_LVDS
091022-1
DCBATOUT_C DCBATOUT_LVDS
3
+5VS_CAMERA
1 2
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
SIZE_DET0 30
USB_4ÂUSB_4+
EC202
EC202
EC168
EC168
1 2
1 2
EC203
EC203
DY
DY
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SIZE_DET0
(Pin17)
17.3" 0
15.6" 1
AFTP80 AFTE14P-GP AFTP80 AFTE14P-GP
AFTP81 AFTE14P-GP AFTP81 AFTE14P-GP
AFTP83 AFTE14P-GP AFTP83 AFTE14P-GP
AFTP84 AFTE14P-GP AFTP84 AFTE14P-GP
1
1
1
1
+5VS_CAMERA
USB_4+
USB_4ÂGND
091022-1
1016
LCD_SCL
22KR2J-GP
22KR2J-GP
+3VS
DCBATOUT_C
1 2
C905
C905
R40
R40
2
D1020
D1020
1
2
3 4
BAV99S-GP
BAV99S-GP
1 2
DY
DY
SC68P50V2JN-1GP
SC68P50V2JN-1GP
+3VS
6
5
1 2
C106
C106
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
PDTC124EU-1-GP
PDTC124EU-1-GP
LCD_SDA
DMP3130L-7-GP
DMP3130L-7-GP
D S
Q40
Q40
R1
R1
B
R2
R2
Q68
Q68
G
+3VS
BRIGHTNESS
091028-1
LCDVIN_ON
LCDVIN_ON_D
C
E
1
D1019
D1019
1
2
3 4
BAV99S-GP
BAV99S-GP
1 2
R37
R37
220KR2J-L2-GP
220KR2J-L2-GP
1 2
R29
R29
220KR2J-L2-GP
220KR2J-L2-GP
6
5
DCBATOUT
1 2
C375
C375
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DISP_OFF#
Camera Power&Interface
+5VS
Layout 40 mil
LCD Power&Discharge
+LCDVDD
+3VALW
091125-1
U19
BC1
BC1
SC1U10V3KX-3GP
SC1U10V3KX-3GP
U19
1
IN#1
2
OUT
3
EN
4
GND
G5281RC1U-GP
G5281RC1U-GP
GND
IN#8
IN#7
IN#6
IN#5
9
8
7
6
5
LID_SW# 18,21,30
BKLT_EN 46
G
D S
40mil
CAM_PW R CAM_OFF#_C
1 2
C3046
C3046
DMP2305U-7-GP
DMP2305U-7-GP
Q102
Q102
F3
F3
1 2
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
100204-1
+5VS_CAMERA
1 2
C3047
C3047
L_VDD_EN 45
L_VDD_EN
R293
R293
100KR2J-1-GP
100KR2J-1-GP
1 2
1 2
1 2
EC4
EC4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
R2329
R2329
220KR2J-L2-GP
220KR2J-L2-GP
R2331
R2331
10KR2J-3-GP
10KR2J-3-GP
Q101
Q101
C
R1
R1
E
R2
R2
PDTC124EU- 1 - G P
PDTC124EU-1-GP
+5VS
1 2
WEBCAM_OFF#_1
1 2
C3045
C3045
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
B B
091021-1
WEBCAM_OFF# 18
B
+3VL
R298
R298
100KR2J-1-GP
100KR2J-1-GP
1 2
1 2
R2297
R2297
10KR2J-3-GP
10KR2J-3-GP
100114-1
CH751H-40-1-GP
CH751H-40-1-GP
1 2
100129-1
A A
USB20_N4 18
USB20_P4 18
DLW21HN900SQ2LGP-U
DLW21HN900SQ2LGP-U
EMI
EMI
5
TR1
TR1
1
2
3
4
USB_4-
USB_4+
SCD1U16V2KX-3GP
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
SCD1U16V2KX-3GP
DY
DY
+3VALW
4
1 2
R302 100KR2J-1-GP
R302 100KR2J-1-GP
100309-1
+3VS_LCDVDD
3
U20
U20
1
2
3 4
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
DY
DY
LCDVDD_DCHG
6
5
L_VDD_EN
R301
R301
150R2J-L1-GP-U
150R2J-L1-GP-U
1 2
DY
DY
2
+LCDVDD
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
LVDS Connector/CAMERA
LVDS Connector/CAMERA
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
LVDS Connector/CAMERA
A3
A3
A3
PATEK
PATEK
PATEK
+3VS
D11
D11
A K
R295
R295
2KR2J-1-GP
2KR2J-1-GP
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
1
1 2
R294
R294
10KR2J-3-GP
10KR2J-3-GP
DY
DY
14 57 Monday, March 15, 2010
14 57 Monday, March 15, 2010
14 57 Monday, March 15, 2010
DISP_OFF#
SA
SA
SA
5
NPCI_RST# 30
1 2
C246 SC150P50V2KX-GP
C246 SC150P50V2KX-GP
DY
DY
PLTRST#
ALINK_NBRX_SBTX_P0 9
ALINK_NBRX_SBTX_N0 9
ALINK_NBRX_SBTX_P1 9
ALINK_NBRX_SBTX_N1 9
ALINK_NBRX_SBTX_P2 9
D D
ALINK_NBRX_SBTX_N2 9
ALINK_NBRX_SBTX_P3 9
ALINK_NBRX_SBTX_N3 9
091001-1
Place R <100mils form pins AD28, AD29
+1.1VS_PCIE_VDDR
1 2
C255 SCD1U10V2KX-5GP C255 SCD1U10V2KX-5GP
1 2
C248 SCD1U10V2KX-5GP C248 SCD1U10V2KX-5GP
1 2
C249 SCD1U10V2KX-5GP C249 SCD1U10V2KX-5GP
1 2
C250 SCD1U10V2KX-5GP C250 SCD1U10V2KX-5GP
1 2
C251 SCD1U10V2KX-5GP C251 SCD1U10V2KX-5GP
1 2
C252 SCD1U10V2KX-5GP C252 SCD1U10V2KX-5GP
1 2
C253 SCD1U10V2KX-5GP C253 SCD1U10V2KX-5GP
1 2
C254 SCD1U10V2KX-5GP C254 SCD1U10V2KX-5GP
ALINK_NBTX_C_SBRX_P0 9
ALINK_NBTX_C_SBRX_N0 9
ALINK_NBTX_C_SBRX_P1 9
ALINK_NBTX_C_SBRX_N1 9
ALINK_NBTX_C_SBRX_P2 9
ALINK_NBTX_C_SBRX_N2 9
ALINK_NBTX_C_SBRX_P3 9
ALINK_NBTX_C_SBRX_N3 9
R125 590R2F-GP R125 590R2F-GP
1 2
R126 2KR2F-3-GP R126 2KR2F-3-GP
1 2
R1278 33R2J-2-GP R1278 33R2J-2-GP
1 2
R124 33R2J-2-GP R124 33R2J-2-GP
ALINK_NBRX_C_SBTX_P0
ALINK_NBRX_C_SBTX_N0
ALINK_NBRX_C_SBTX_P1
ALINK_NBRX_C_SBTX_N1
ALINK_NBRX_C_SBTX_P2
ALINK_NBRX_C_SBTX_N2
ALINK_NBRX_C_SBTX_P3
ALINK_NBRX_C_SBTX_N3
GPP PCIE
RN13
CLK_NB_GPPSB 10,20
NB_REFCLK_P 10
CPU_CLK# 6,20
CPU_CLK 6,20
CLK_PCIE_WLAN 20,27
CLK_PCIE_WLAN# 20,27
0R4P2R-PAD
0R4P2R-PAD
RN18
RN18
CLK_NB_GPPSB# 10,20
CLK_PCIE_SB 20
CLK_PCIE_SB# 20
100315-1
SRN0J-6-GP
SRN0J-6-GP
RN17
RN17
0R4P2R-PAD
0R4P2R-PAD
RN19
RN19
4
0R4P2R-PAD
0R4P2R-PAD
SRN0J-6-GP
SRN0J-6-GP
SRN0J-6-GP
SRN0J-6-GP
4
4
0R4P2R-PAD
0R4P2R-PAD
RN20
RN20
RN
RN
RN14
RN14
INT
INT
RN
RN
2 3
1
RN15
RN15
RN16
RN16
NB ALINK
C C
NB_REFCLK_N 10
HT
CLK_NBHT_CLK 10,20
CLK_NBHT_CLK# 10,20
CPU
GFX
LAN GUAM
B B
CLK_PCIE_PEG 20,45
CLK_PCIE_PEG# 20,45
CLK_PCIE_LAN 20,28
CLK_PCIE_LAN# 20,28
100315-1
WLAN
CLK_PCIE_NEW 20,26
CLK_PCIE_NEW# 20,26
NEW
RN13
SRN0J-6-GP
SRN0J-6-GP
RN
RN
1
4
2 3
INT
INT
4
INT
INT
4
CLK_NB_GFX_SB
2 3
1
2 3
1
2 3
1
4
CLK_PCIE_NEW_SB
CLK_PCIE_NEW#_SB LPCCLK0_R
RN
RN
1
4
2 3
INT
INT
NB_REFCLK_P_R
NB_REFCLK_N_R
CLK_NBHT_CLK_SB
2 3
CLK_NBHT_CLK#_SB
1
CPU_CLK_SB
2 3
CPU_CLK#_SB
1
EC300
EC300
EC301
EC301
1 2
DY
DY
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1 2
Device_CLK1_sel:
bit[1:0]=10, 48Mhz
A A
091001-1
5
CLK48_5138 20,25
C543
C543
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
XTAL-25MHZ-96GP
XTAL-25MHZ-96GP
C306
C306
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
R144
R144
22R2J-2-GP
22R2J-2-GP
X2
X2
1 2
1 2
INT
INT
4
1 2
A_RST#
NB_PCIE_CALRP
NB_PCIE_CALRN
CLK_PCIE_LAN_SB
CLK_PCIE_LAN#_SB
CLK_PCIE_WLAN_SB
CLK_PCIE_WLAN#_SB
EC303
EC303
EC302
EC302
1 2
DY
DY
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
INT_48M_USB
SB_25M_X1
1 2
R138
R138
1MR2J-1-GP
1MR2J-1-GP
SB_25M_X2
4
3
2
1
091021-1 091021-1
U1009A
U1009A
P1
PCIE_RST#
L1
A_RST#
AD26
A_TX0P
AD27
A_TX0N
AC28
A_TX1P
AC29
A_TX1N
AB29
A_TX2P
AB28
A_TX2N
AB26
A_TX3P
AB27
A_TX3N
AE24
A_RX0P
AE23
A_RX0N
AD25
A_RX1P
AD24
A_RX1N
AC24
A_RX2P
AC25
A_RX2N
AB25
A_RX3P
AB24
A_RX3N
AD29
PCIE_CALRP
AD28
PCIE_CALRN
AA28
GPP_TX0P
AA29
GPP_TX0N
Y29
GPP_TX1P
Y28
GPP_TX1N
Y26
GPP_TX2P
Y27
GPP_TX2N
W28
GPP_TX3P
W29
GPP_TX3N
AA22
GPP_RX0P
Y21
GPP_RX0N
AA25
GPP_RX1P
AA24
GPP_RX1N
W23
GPP_RX2P
V24
GPP_RX2N
W24
GPP_RX3P
W25
GPP_RX3N
M23
PCIE_RCLKP/NB_LNK_CLKP
P23
PCIE_RCLKN/NB_LNK_CLKN
U29
NB_DISP_CLKP
U28
NB_DISP_CLKN
T26
NB_HT_CLKP
T27
NB_HT_CLKN
V21
CPU_HT_CLKP
T21
CPU_HT_CLKN
V23
SLT_GFX_CLKP
T23
SLT_GFX_CLKN
L29
GPP_CLK0P
L28
GPP_CLK0N
N29
GPP_CLK1P
N28
GPP_CLK1N
M29
GPP_CLK2P
M28
GPP_CLK2N
T25
GPP_CLK3P
V25
GPP_CLK3N
L24
GPP_CLK4P
L23
GPP_CLK4N
P25
GPP_CLK5P
M25
SC33P50V2JN-3GP
SC33P50V2JN-3GP
GPP_CLK5N
P29
GPP_CLK6P
P28
GPP_CLK6N
N26
GPP_CLK7P
N27
GPP_CLK7N
T29
GPP_CLK8P
T28
GPP_CLK8N
L25
14M_25M_48M_OSC
L26
25M_X1
L27
25M_X2
SB820M-1-GP
SB820M-1-GP
1 2
PCI EXPRESS INTERFACES
PCI EXPRESS INTERFACES
Part 1 of 5
Part 1 of 5
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCICLK4/14M_OSC/GPO39
PCI CLKS
PCI CLKS
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
REQ1#/GPIO40
REQ2#/CLK_REQ8#/GPIO41
PCI INTERFACE LPC
PCI INTERFACE LPC
REQ3#/CLK_REQ5#/GPIO42
GNT1#/GPO44
GNT2#/GPO45
GNT3#/CLK_REQ7#/GPIO46
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LDRQ1#/CLK_REQ6#/GPIO49
SERIRQ/GPIO48
ALLOW_LDTSTP/DMA_ACTIVE#
CLOCK GENERATOR
CLOCK GENERATOR
CPU
CPU
INTRUDER_ALERT#
VDDBT_RTC_G
RTC
RTC
PCICLK0
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
CBE0#
CBE1#
CBE2#
CBE3#
FRAME#
DEVSEL#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
GNT0#
CLKRUN#
LOCK#
LPCCLK0
LPCCLK1
LAD0
LAD1
LAD2
LAD3
LFRAME#
LDRQ0#
PROCHOT#
LDT_PG
LDT_STP#
LDT_RST#
32K_X1
32K_X2
RTCCLK
3
W2
W1
W3
W4
Y1
PCIRST#_SB
V2
AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
SB_GPIO42
AC12
AD12
AJ5
AH6
SB_GPIO46
AB12
AB11
AD7
AJ6
AG6
AG4
PCI_PIRQH#
AJ4
H24
LPCCLK1_R
H25
LPC_LAD0_R
J27
LPC_LAD1_R
J26
LPC_LAD2_R
H29
LPC_LAD3_R
H28
SB_LPC_FRAME#
G28
NB_LDRQ0#
J25
AA18
AB19
G21
H21
K19
G22
J24
C1
C2
RTC_CLK
D2
INTRUDER_ALERT#
B2
B1
1
PCI_AD23 19
PCI_AD24 19
PCI_AD25 19
PCI_AD26 19
PCI_AD27 19
PCI_AD28 19
PCI_AD29 19
PCI_SERR# 21,30
1
1
PM_CLKRUN# 30
091221-1
GPIO33
0R0402-PAD-1-GP
0R0402-PAD-1-GP
CPU_PROCHOT#_CPU 6,55
CPU_PW RGD 4
CPU_LDT_STOP# 4
CPU_LDT_RST# 4
32K_X1
32K_X2
+RTCVCC
TP31 TPAD14-GP TP31 TPAD14-GP
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
TP34 TPAD14-GP TP34 TPAD14-GP
TP59 TPAD14-GP TP59 TPAD14-GP
R137
R137
1 2
LPCCLK0_R 19
LPCCLK1_R 19
R142 33R2J-2-GP R142 33R2J-2-GP
1 2
R143 33R2J-2-GP
R143 33R2J-2-GP
1 2
DEBUG
DEBUG
R134 22R2J-2-GP R134 22R2J-2-GP
1 2
TP32 TPAD14-GP TP32 TPAD14-GP
1
TP33 TPAD14-GP TP33 TPAD14-GP
1
TP36 TPA D14-GP TP36 TPA D14-GP
1
1 2
R2305 1MR2J-1-GP
R2305 1MR2J-1-GP
DY
DY
091103-1
PCI_CLK1 19
PCI_CLK2 19
PCI_CLK3 19
PCI_CLK4 19
C247
C247
1 2
DY
DY
PLTRST#
ACCEL_INT# 27
091020-1
SIRQ 21,30
091016-1
+RTCVCC
U8
U8
1
B
2
A
DY
DY
3
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
R127
R127
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
+RTCVCC
1 2
1 2
C257
C257
C258
C258
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+3VS
DY
DY
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CH715FGP-GP-U
CH715FGP-GP-U
R131
R131
22KR2F-GP
22KR2F-GP
check if BIOS need this
090930-1
KBC
DEBUG
C259 SC33P50V2JN-3GP C259 SC33P50V2JN-3GP
C260 SC33P50V2JN-3GP
C260 SC33P50V2JN-3GP
LPC_FRAME# 21,30
ALLOW_LDTSTOP 10
2
LPC_CLK_KBC 30
LPC_CLK_DB 21
1 2
1 2
DEBUG
DEBUG
+3VALW
5
VCC
4
Y
3
091012-1
D9
D9
1
2
PLT_RST# 10,21,22,26,27,28,47
1 2
C256
C256
DY
DY
SC150P50V2KX-GP
SC150P50V2KX-GP
R129
R129
VBAT_R
1 2
1KR2J-1-GP
1KR2J-1-GP
100126-1
3D3V_AUX_S5_5_51125
VBAT_RTC
1
PWR
2
GND
NP1
NP1
NP2
NP2
BAT-BB10201-C1401-7H-GP
BAT-BB10201-C1401-7H-GP
091103-1
RN22
LPC_LAD3_R
LPC_LAD2_R
LPC_LAD1_R
LPC_LAD0_R
RN22
1
2
3
4 5
SRN22J-3-GP-U
SRN22J-3-GP-U
091006-1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
SB820_PCIe&PCI(1/5)
SB820_PCIe&PCI(1/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SB820_PCIe&PCI(1/5)
A3
A3
A3
LPC_AD3 CLK_NB_GFX#_SB
8
LPC_AD2
7
LPC_AD1
6
LPC_AD0
32K_X1
R135
R135
20MR3-GP
20MR3-GP
X-32D768KHZ-38GPU
X-32D768KHZ-38GPU
32K_X2
2nd: 82.30001.B81
2nd: 82.30001.B81
PATEK
PATEK
PATEK
1 2
1 2
4
X1
X1
1
2 3
1 2
82.30001.691
82.30001.691
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
1
RTC1
RTC1
LPC_AD[0..3] 21,30
C261
C261
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
091001-1
C302
C302
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
15 57 Monday, March 15, 2010
15 57 Monday, March 15, 2010
15 57 Monday, March 15, 2010
SA
SA
SA
5
4
3
2
1
SSID = S.B
SATA_TXP0 26
SATA HDD
D D
SATA ODD
ESATA
C C
B B
SATA_TXN0 26
SATA_RXN0 26
SATA_RXP0 26
SATA_TXP1 26
SATA_TXN1 26
SATA_RXN1 26
SATA_RXP1 26
SATA_TXP2 24
SATA_TXN2 24
SATA_RXN2 24
SATA_RXP2 24
PLACE SATA AC DECOUPLING
CAPS CLOSE TO SB700
C548 SCD01U16V2KX-3GP C548 SCD01U16V2KX-3GP
C547 SCD01U16V2KX-3GP C547 SCD01U16V2KX-3GP
C549 SCD01U16V2KX-3GP C549 SCD01U16V2KX-3GP
C546 SCD01U16V2KX-3GP C546 SCD01U16V2KX-3GP
C545 SCD01U16V2KX-3GP C545 SCD01U16V2KX-3GP
C544 SCD01U16V2KX-3GP C544 SCD01U16V2KX-3GP
Very Close to SB820
+1.1VS_AVDD_SATA
091020-1
C550
C550
1 2
DY
DY
SC12P50V2JN-3GP
SC12P50V2JN-3GP
XTAL-25MHZ-96GP
XTAL-25MHZ-96GP
C551
C551
1 2
DY
DY
SC12P50V2JN-3GP
SC12P50V2JN-3GP
100307-1
KBC_SPI_SO 30
KBC_SPI_SI 30
KBC_SPI_CLK 30
KBC_SPI_CS0# 30
R2289 33R2J-2- GP R2289 33R2J-2- GP
R1267 33R2J-2-GP R1267 33R2J-2-GP
R1268 0R0402-PAD-1-GP R1268 0R0402-PAD-1-GP
091221-1
R141 931R2F-1-GP R141 931R2F-1-GP
X3
X3
DY
DY
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1KR2F-3-GP
1KR2F-3-GP
R140
R140
1 2
1 2
SATA_LED# 22
1 2
DY
DY
SATA_TXP0_SB700
SATA_TXN0_SB700
SATA_TXP1_SB700
SATA_TXN1_SB700
SATA_TXP2_SB700
SATA_TXN2_SB700
SATA_CALP
SATA_CALN
SATA_X1
R149
R149
1MR2J-1-GP
1MR2J-1-GP
SATA_X2
SB_SPI_DO
SB_SPI_CLK
SB_SPI_CS0#
U1009B
U1009B
AH9
SATA_TX0P
AJ9
SATA_TX0N
AJ8
SATA_RX0N
AH8
SATA_RX0P
AH10
SATA_TX1P
AJ10
SATA_TX1N
AG10
SATA_RX1N
AF10
SATA_RX1P
AG12
SATA_TX2P
AF12
SATA_TX2N
AJ12
SATA_RX2N
AH12
SATA_RX2P
AH14
SATA_TX3P
AJ14
SATA_TX3N
AG14
SATA_RX3N
AF14
SATA_RX3P
AG17
SATA_TX4P
AF17
SATA_TX4N
AJ17
SATA_RX4N
AH17
SATA_RX4P
AJ18
SATA_TX5P
AH18
SATA_TX5N
AH19
SATA_RX5N
AJ19
SATA_RX5P
AB14
SATA_CALRP
AA14
SATA_CALRN
AD11
SATA_ACT#/GPIO67
AD16
SATA_X1
AC16
SATA_X2
J5
SPI_DI/GPIO164
E2
SPI_DO/GPIO163
K4
SPI_CLK/GPIO162
K9
SPI_CS1#/GPIO165
G2
ROM_RST#/GPIO161
SB820M-1-GP
SB820M-1-GP
Part 2 of 5
Part 2 of 5
SERIAL ATA
SERIAL ATA
HW MONITOR
HW MONITOR
SPI ROM
SPI ROM
FC_CLK
FC_FBCLKOUT
FC_FBCLKIN
FC_OE#/GPIOD145
FC_AVD#/GPIOD146
FC_WE#/GPIOD148
FC_CE1#/GPIOD149
FC_CE2#/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147
FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143
FLASH
FLASH
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
TEMP_COMM
VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
NC#G27
NC2#Y2
AH28
AG28
AF26
AF28
AG29
AG26
AF27
AE29
AF29
AH27
AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26
W5
W6
Y9
W7
V9
W8
B6
A6
A5
B5
C7
A3
B4
A4
C5
A7
B7
B8
A8
G27
Y2
091217-1
SB_GPIO58
R2291 0R2J-2-GP
R2291 0R2J-2-GP
SB_TEMP_COMP
SB_GPIO176
WWAN_DET# 57
1 2
R2290 0R0402-PAD-1-GP R2290 0R0402-PAD-1-GP
R2319 0R2J-2-GP
R2319 0R2J-2-GP
R2317 10KR2J-3-GP R2317 10KR2J-3-GP
1 2
1 2
1 2
DY
DY
WLAN_TRANSMIT_OFF# 27
BT_OFF 24
R171
R171
1 2
10KR2J-3-GP
10KR2J-3-GP
DY
DY
HDD_HALTLED 22
DY
DY
091221-1 091027-1
1 2
R2325 0R0402-PAD-1-GP R2325 0R0402-PAD-1-GP
+3VS
1 2
DY
DY
091217-1
close to R171
C3040
C3040
SC33P50V2JN-3GP
SC33P50V2JN-3GP
091019-1
WWAN_TRANSMIT_OFF# 57
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
SB820_SATA&IDE(2/5)
SB820_SATA&IDE(2/5)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
Date: Sheet of
SB820_SATA&IDE(2/5)
A3
A3
A3
PATEK
PATEK
PATEK
Hsichih, Taipei
1
16 57 Monday, March 15, 2010
16 57 Monday, March 15, 2010
16 57 Monday, March 15, 2010
SA
SA
SA
5
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
12
131mA
C610
C610
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
100107-1
12
C613
C613
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C614
C614
C612
C612
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
DY
DY
DY
DY
12
12
+3VS
C615
1 2
D D
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C615
1 2
C611
C611
71mA
GPIOD not used
091019-1
L51
L51
20mil Width
Close to SB820
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
+1.1VS +1.1VS_PCIE_VDDR
L54
L54
1 2
PBY160808T-600Y-N-GP
PBY160808T-600Y-N-GP
42R 4A
+3.3V_VDDPL_PCIE +3VS
12
C588
C588
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
091102-1
C589
C589
1 2
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
C599
C599
1 2
1 2
091019-1
C C
20mil Width
L45
L45
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C581
C581
12
1 2
C578
C578
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
43mA
091102-1
C600
C600
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
93mA
R161
R161
1 2
0R2J-2-GP
0R2J-2-GP
600mA
1 2
C595
C595
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
100107-1
1 2
DY
DY
C596
C596
Close to SB820
+1.1VS +1.1VS_AVDD_SATA
L59
L59
1 2
PBY160808T-600Y-N-GP
PBY160808T-600Y-N-GP
C598
C598
1 2
42R 4A
091102-1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
L49
L49
+3VALW
B B
1 2
PBY160808T-221Y-N-GP
PBY160808T-221Y-N-GP
091019-1
+1.1VALW
L50
L50
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
100107-1
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
C628
C628
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+3VS_AVDD_USB
DY
DY
1 2
C555
C555
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
+1.1VALW _AVDD_USB
C591
C591
C577
C577
1 2
DY
DY
1 2
C553
C553
SC1U10V3KX-3GP
SC1U10V3KX-3GP
100107-1
1 2
1 2
DY
DY
C626
C626
1 2
C557
C557
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
567mA
1 2
C635
C635
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
658mA
1 2
C554
C554
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
1 2
C556
C556
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TBDmA
1 2
C636
C636
1 2
C552
C552
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
VDDIO_18_FC
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
091102-1
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
U1009C
U1009C
AH1
VDDIO_33_PCIGP
V6
VDDIO_33_PCIGP
Y19
VDDIO_33_PCIGP
AE5
VDDIO_33_PCIGP
AC21
VDDIO_33_PCIGP
AA2
VDDIO_33_PCIGP
AB4
VDDIO_33_PCIGP
AC8
VDDIO_33_PCIGP
AA7
VDDIO_33_PCIGP
AA9
VDDIO_33_PCIGP
AF7
VDDIO_33_PCIGP
AA19
VDDIO_33_PCIGP
AF22
VDDIO_18_FC
AE25
VDDIO_18_FC
AF24
VDDIO_18_FC
AC22
VDDIO_18_FC
POWER
POWER
AE28
VDDPL_33_PCIE
U26
VDDAN_11_PCIE
V22
VDDAN_11_PCIE
V26
VDDAN_11_PCIE
V27
C597
C597
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
V28
V29
W22
W26
AD14
AJ20
AF18
AH20
AG19
AE18
AD18
AE16
A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19
C11
D11
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDPL_33_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_11_USB_S
VDDAN_11_USB_S
SB820M-1-GP
SB820M-1-GP
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
FLASH I/O
FLASH I/O
GBE LAN
GBE LAN
PCI EXPRESS SERIAL ATA
PCI EXPRESS SERIAL ATA
USB I/O
USB I/O
PLL CLKGEN I/O
PLL CLKGEN I/O
CORE S0 3.3V_S5 I/O
CORE S0 3.3V_S5 I/O
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDRF_GBE_S
VDDIO_33_GBE_S
VDDCR_11_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
VDDIO_GBE_S
CORE S5
CORE S5
VDDCR_11_USB_S
VDDCR_11_USB_S
VDDPL_33_SYS
VDDPL_11_SYS_S
VDDPL_33_USB_S
VDDAN_33_HWM_S
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDCR_11_S
VDDCR_11_S
VDDIO_AZ_S
VDDXL_33_S
3
N13
R15
N17
U13
U17
V12
V18
W12
W18
K28
K29
J28
K26
J21
J20
K21
J22
V1
GBE PHY not used
M10
L7
L9
M6
P8
A21
D21
B21
K10
L10
J9
T6
T8
F26
G26
+3.3VALW _VDDIO_AZ
M8
A11
B11
47mA
M21
62mA
L22
17mA
F19
5mA
D6
+3.3VALW _VDDXL
L20
100107-1
+1.1VS
DY
DY
1 2
C604
C604
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
TBDmA
DY
DY
1 2
1 2
C571
C571
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
C605
C605
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
12
C561
C561
C637
C637
100107-1
32mA
+3.3VALW _VDDIO_AZ
TBDmA
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
+3VS_VDDPL
+1.1VALW _VDDPL
+3VALW _AVDD_HWM
C638
C638
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
091016-1
+3VS_AVDD_USB
+3.3VALW _VDDXL +3VALW
C639
C639
1 2
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
12
2
510mA
12
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
113mA
C562
C562
1 2
DY
DY
100107-1
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Decoupled along with the
VDDAN_33_USB_S power rail.
Separate ferrite bead are not required
L60
L60
091102-1 091102-1
DY
DY
1 2
C606
C606
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C582
C582
1 2
C618
C618
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
R156
R156
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
091221-1
+1.1VALW _VDDCR_USB
197mA
C590
C590
12
1 2
C566
C566
DY
DY
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
1 2
C603
C603
C608
C608
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L64
L64
1 2
PBY160808T-600Y-N-GP
PBY160808T-600Y-N-GP
42R 4A
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C570
C570
1 2
12
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
+3VALW
C558
C558
1 2
12
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
+3VALW
C593
C593
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
091019-1
+1.1VS +1.1VS_SB_CLKGEN
12
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
C594
C594
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
L53
L53
091019-1
C592
C592
+1.1VALW +3.3V_VDDPL_SATA +3VS
C579
C579
1 2
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.1VALW
1
U1009E
U1009E
Part 5 of 5
Y14
VSSIO_SATA
Y16
C607
C607
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AB16
AC14
AE12
AE14
AF11
AF13
AF16
AG8
AH7
AH11
AH13
AH16
AJ11
AJ13
AJ16
G11
M19
M22
M24
M26
AF9
AJ7
B10
K11
D10
D12
D14
D17
F12
F14
F16
F18
H12
H14
H16
H18
K12
K14
K16
K18
H19
P21
P20
P22
P24
P26
T20
T22
T24
V20
A9
B9
E9
F9
C9
D9
J11
J19
Y4
D8
J23
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
EFUSE
VSSAN_HWM
VSSXL
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
SB820M-1-GP
SB820M-1-GP
Part 5 of 5
GROUND
GROUND
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSPL_SYS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8
M20
H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
A A
+3VS_VDDPL
C601
C601
1 2
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
5
12
C602
C602
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
+3VS
L44
L44
091019-1
C619
C619
1 2
L58
L58
1 2
BLM15AG221SS1D-GP
C620
C620
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
4
BLM15AG221SS1D-GP
091019-1
090930-1
3
12
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
+3VALW _AVDD_HWM
DY
DY
12
C609
C609
R157
R157
1 2
SCD1U10V2MX-3GP
SCD1U10V2MX-3GP
0R2J-2-GP
0R2J-2-GP
DY
DY
+3VALW +1.1VALW +1.1VALW _VDDPL
<Core Design>
<Core Design>
<Core Design>
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Title
Title
Title
SB820_PWR&GND(3/5)
SB820_PWR&GND(3/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
SB820_PWR&GND(3/5)
A3
A3
A3
PATEK
PATEK
PATEK
Hsichih, Taipei
1
SA
SA
SA
of
17 57 Monday, March 15, 2010
17 57 Monday, March 15, 2010
17 57 Monday, March 15, 2010
5
SSID = S.B
+3VALW
RN64
RN64
SRN10KJ-5-GP
SRN10KJ-5-GP
D D
+3VALW
C C
+3VS
B B
A A
1
2 3
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
LANLINK_STATUS# 28,29 PCIE_WAKE# 26,27,28
LANLINK_STATUS#_SB 28
8209A_PGOOD 41
+3VALW
R167 10KR2J-3-GP
R167 10KR2J-3-GP
DY
DY
R168 2K2R2F-GP
R168 2K2R2F-GP
DY
DY
R169 2K2R2F-GP
R169 2K2R2F-GP
DY
DY
R170 2K2R2F-GP
R170 2K2R2F-GP
R178 10KR2J-3-GP R178 10KR2J-3-GP
TP132 TPAD14-GP TP132 TPAD14-GP
TP133 TPAD14-GP TP133 TPAD14-GP
TP134 TPAD14-GP TP134 TPAD14-GP
1 2
R172 10KR2J-3-GP
R172 10KR2J-3-GP
DY
DY
PM_SLP_S5#
4
PM_SLP_S3#
PWRBTN#_SB
R160
R160
10KR2J-3-GP
10KR2J-3-GP
PCIE_WAKE#
R164
R164
10KR2J-3-GP
10KR2J-3-GP
CPU_THERMTRIP#
R165
R165
10KR2J-3-GP
10KR2J-3-GP
R166
R166
10KR2J-3-GP
10KR2J-3-GP
R566
R566
DY
DY
0R2J-2-GP
0R2J-2-GP
1 2
DY
DY
1 2
1 2
1 2
1 2
SB_TEST0
1
SB_TEST1
1
SB_TEST2
1
SHUTDOW N#/GPIO5
+3.3VALW _VDDIO_AZ
5
PWRBTN#_SB
100303-1
SYS_RESET#
091217-1
R152
R152
0R2J-2-GP
0R2J-2-GP
1 2
100128-1
1 2
SB_RSMRST#_R
SB_RSMRST#_R
SB_TEST2
SB_TEST1
SB_TEST0
HDA_SPKR
HDA_SYNC_CODEC 32
HDA_RST#_CODEC 32
HDA_BITCLK_CODEC 32
HDA_SDOUT_CODEC 32
HDA_SDIN0 32
HDA_SDIN1 31
HDA_SYNC_MDC 31
HDA_RST#_MDC 31
HDA_BITCLK_MDC 31
HDA_SDOUT_MDC 31
ow Power Mode
L
1 2
R174 10KR2J-3-GP
R174 10KR2J-3-GP
1 2
R176 10KR2J-3-GP R176 10KR2J-3-GP
Performance Mode
DY
DY
1 2
C3050
C3050
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Internal 10K PU
KB_RST# 30
DY
DY
12
DY
DY
C643
C643
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
NEWCARD_CLKREQ# 20,26
DY
DY
SB_AZ_SDOUT
100221-1
CLK_PCIE_LAN_REQ# 20,28
ADP_PRES 30,43,53,55
LID_SW# 14,21,30
GATEA20 30
G
Q96
Q96
S
CLKREQ_WLAN# 20,27
100307-1
R175
R175
R177
R177
DY
DY
DY
DY
1 2
1 2
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
PWRBTN#_SB 21,28,30
. .
. .
CPU_THERMTRIP# 6,23,46
0R0402-PAD-1-GP
0R0402-PAD-1-GP
DY
DY
SRN33J-4-GP
SRN33J-4-GP
1
2
3
4 5
4 5
3
2
1
SRN33J-4-GP
SRN33J-4-GP
100114-1
100114-1
CH751H-40-1-GP
CH751H-40-1-GP
...
...
D
2N7002E-1-GP
2N7002E-1-GP
100307-1
1 2
TP136 TPAD14-GP TP136 TPAD14-GP
D67
D67
1SS355GP-GP
1SS355GP-GP
RN98
RN98
RN99
RN99
A K
DY
DY
R146
R146
4
PCIE_WAKE# 26,27,28
D66
D66
PM_SLP_S3# 26,28,30,37,38,40,42,46,52,53
PM_SLP_S5# 26,28,40,53
D64
D64
1
8
7
6
6
7
8
4
LID_SW#_SB
A K
1SS355GP-GP
1SS355GP-GP
SB_PWRGD 13,30
SUS_STAT# 10
GATEA20_SB
A K
KB_RST#_SB
RUNSCI_EC# 30
NB_PWRGD 10
PM_RSMRST# 30
0R0402-PAD-1-GP
0R0402-PAD-1-GP
0R0402-PAD-1-GP
0R0402-PAD-1-GP
100307-1
R139 0R0402-PAD-1-GP R139 0R0402-PAD-1-GP
1 2
WEBCAM_OFF# 14
MC2_DISABLE_SB 27
HDA_SPKR 32
R136 0R0402-PAD-1-GP R136 0R0402-PAD-1-GP
1 2
1
TP80 TPAD14-GP TP80 TPAD14-GP
LP_EN# 28
SB_CLKREQ_NEW CARD#
NEW_CPPE# 26
THERM_SCI# 6,23
R182
R182
DY
DY
1 2
10KR2J-3-GP
10KR2J-3-GP
R154
R154
0R2J-2-GP
0R2J-2-GP
1 2
DY
DY
R153
R153
1 2
0R0402-PAD-1-GP
0R0402-PAD-1-GP
R162
R162
1 2
1 2
SB_CLKREQ_PCIE_LAN#
SB_CLKREQ_WLAN#
SB_CLKREQ1#
SHUTDOW N#/GPIO5
TP91 TPAD14-GP TP91 TPAD14-GP
TP92 TPAD14-GP TP92 TPAD14-GP
TP135 TPAD14-GP TP135 TPAD14-GP
C640 SC33P50V2JN-3GP
C640 SC33P50V2JN-3GP
1 2
DY
EMI
EMI
PCIE_WAKE#_1
SB_PWRGD
SUS_STAT#
SB_TEST0
SB_TEST1
SB_TEST2
L ANLINK_STATUS#_SB
SYS_RESET#
SB_WAKE#
NB_PWRGD_W 14
SB_RSMRST#_R
R163
R163
SB_CLKREQ_NEW CARD#
SB_SMB_CLK0
SB_SMB_DAT0
SB_SMB_CLK1
SB_SMB_DAT1
SB_JTAG_TDO
SB_JTAG_TCK
1
SB_JTAG_TDI
1
SB_TRST#
1
SB_AZ_BITCLK
SB_AZ_SDOUT
SB_AZ_SYNC
SB_AZ_RST#
C642 SC33P50V2JN-3GPDYC642 SC33P50V2JN-3GP
C641 SC33P50V2JN-3GPDYC641 SC33P50V2JN-3GP
C644 SC33P50V2JN-3GPDYC644 SC33P50V2JN-3GP
12
12
1 2
DY
DY
3
U1009D
U1009D
J2
PCI_PME#/GEVENT4#
K1
RI#/GEVENT22#
D3
SPI_CS3#/GBE_STAT1/GEVENT21#
F1
SLP_S3#
H1
SLP_S5#
F2
PWR_BTN#
H5
PWR_GOOD
G6
SUS_STAT#
B3
TEST0
C4
TEST1/TMS
F6
TEST2
AD21
GA20IN/GEVENT0#
AE21
KBRST#/GEVENT1#
K2
LPC_PME#/GEVENT3#
J29
LPC_SMI#/GEVENT23#
H2
GEVENT5#
J1
SYS_RESET#/GEVENT19#
H6
WAKE#/GEVENT8#
F3
IR_RX1/GEVENT20#
J6
THRMTRIP#/SMBALERT#/GEVENT2#
AC19
NB_PWRGD
G1
RSMRST#
AD19
CLK_REQ4#/SATA_IS0#/GPIO64
AA16
CLK_REQ3#/SATA_IS1#/GPIO63
AB21
SMARTVOLT1/SATA_IS2#/GPIO50
AC18
CLK_REQ0#/SATA_IS3#/GPIO60
AF20
SATA_IS4#/FANOUT3/GPIO55
AE19
SATA_IS5#/FANIN3/GPIO59
AF19
SPKR/GPIO66
AD22
SCL0/GPIO43
AE22
SDA0/GPIO47
F5
SCL1/GPIO227
F4
SDA1/GPIO228
AH21
CLK_REQ2#/FANIN4/GPIO62
AB18
CLK_REQ1#/FANOUT4/GPIO61
E1
IR_LED#/LLB#/GPIO184
AJ21
SMARTVOLT2/SHUTDOWN#/GPIO51
H4
DDR3_RST#/GEVENT7#
D5
GBE_LED0/GPIO183
D7
GBE_LED1/GEVENT9#
G5
GBE_LED2/GEVENT10#
K3
GBE_STAT0/GEVENT11#
AA20
CLK_REQG#/GPIO65/OSCIN/IDLEEXT#
H3
BLINK/USB_OC7#/GEVENT18#
D1
USB_OC6#/IR_TX1/GEVENT6#
E4
USB_OC5#/IR_TX0/GEVENT17#
D4
USB_OC4#/IR_RX0/GEVENT16#
E8
USB_OC3#/AC_PRES/TDO/GEVENT15#
F7
USB_OC2#/TCK/GEVENT14#
E7
USB_OC1#/TDI/GEVENT13#
F8
USB_OC0#/TRST#/GEVENT12#
M3
AZ_BITCLK
N1
AZ_SDOUT
L2
AZ_SDIN0/GPIO167
M2
AZ_SDIN1/GPIO168
M1
AZ_SDIN2/GPIO169
M4
AZ_SDIN3/GPIO170
N2
AZ_SYNC
P2
AZ_RST#
T1
GBE_COL
T4
GBE_CRS
L6
GBE_MDCK
L5
GBE_MDIO
T9
GBE_RXCLK
U1
GBE_RXD3
U3
GBE_RXD2
T2
GBE_RXD1
U2
GBE_RXD0
T5
GBE_RXCTL/RXDV
V5
GBE_RXERR
P5
GBE_TXCLK
M5
GBE_TXD3
P9
GBE_TXD2
T7
GBE_TXD1
P7
GBE_TXD0
M7
GBE_TXCTL/TXEN
P4
GBE_PHY_PD
M9
GBE_PHY_RST#
V7
GBE_PHY_INTR
E23
PS2_DAT/SDA4/GPIO187
E24
PS2_CLK/SCL4/GPIO188
F21
SPI_CS2#/GBE_STAT2/GPIO166
G29
FC_RST#/GPO160
D27
PS2KB_DAT/GPIO189
F28
PS2KB_CLK/GPIO190
F29
PS2M_DAT/GPIO191
E27
PS2M_CLK/GPIO192
SB820M-1-GP
SB820M-1-GP
3
Part 4 of 5
Part 4 of 5
HD AUDIO
HD AUDIO
GBE LAN
GBE LAN
USBCLK/14M_25M_48M_OSC
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD1N
USB_FSD0P/GPIO185
USB_FSD0N
USB_HSD13P
USB_HSD13N
USB 1.1 USB MISC EMBEDDED CTRL
USB 1.1 USB MISC EMBEDDED CTRL
USB_HSD12P
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
GPIO
GPIO
USB OC
USB OC
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/GPIO199
EC_PWM3/EC_TIMER3/GPIO200
EMBEDDED CTRL
EMBEDDED CTRL
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9P
USB_HSD9N
USB_HSD8P
USB_HSD8N
USB_HSD7P
USB_HSD7N
USB_HSD6P
USB 2.0
USB 2.0
USB_HSD6N
USB_HSD5P
USB_HSD5N
USB_HSD4P
USB_HSD4N
USB_HSD3P
USB_HSD3N
USB_HSD2P
USB_HSD2N
USB_HSD1P
USB_HSD1N
USB_HSD0P
USB_HSD0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
A10
G19
J10
H11
H9
J8
B12
A12
F11
E11
E14
E12
J12
J14
A13
B13
D13
C13
G12
G14
G16
G18
D16
C16
B14
A14
E18
E16
J16
J18
B17
A17
A16
B16
D25
F23
B26
E26
F25
E22
F22
E21
G24
G25
E28
E29
D29
D28
C29
C28
B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22
2
CLK48_USB
USB_PCOMP
GPIO193
GPIO194
R158
R158
11K8R2F-GP
11K8R2F-GP
2 3
1
1 2
USB20_P13 22
USB20_N13 22
USB20_P11 24
USB20_N11 24
USB20_P9 27
USB20_N9 27
USB20_P7 57
USB20_N7 57
USB20_P6 25
USB20_N6 25
USB20_P5 24
USB20_N5 24
USB20_P4 14
USB20_N4 14
USB20_P3 24
USB20_N3 24
USB20_P2 24
USB20_N2 24
USB20_P1 26
USB20_N1 26
USB20_P0 24
USB20_N0 24
4
DY
DY
SB_GPO199 19
SB_GPO200 19
CLK48_USB 20
USB-FSD1 FPR
USB-9 Bluetooth
USB-8 WLAN
USB-7 WWAN
USB-6 USB Card Reader
USB-5 Right Side
USB-4 USB Camera
USB-3 Right Side
USB-2 Left Side (e-SATA combo)
USB-1 New Card
USB-0 Left Side (S/W Debug port)
RN53
RN53
SRN10KJ-5-GP
SRN10KJ-5-GP
CPU_SIC_SB700 6
CPU_SID_SB700 6
Strap Pin / define to use LPC or SPI ROM
+3VALW
SB_SMB_CLK1
SB_SMB_DAT1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
SB820_USB&GPIO(4/5)
SB820_USB&GPIO(4/5)
ize Document Number Rev
Size Document Number Rev
Size Document Number Rev
S
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
SB820_USB&GPIO(4/5)
A3
A3
A3
1
Place R near pin14. Route it with 10mils
Trace width and 25mils spacing to any
signals in X, Y, Z directions.
+3VALW
Need to check
eakage
l
4
RN102
RN102
SRN2K2J-3-GP
SRN2K2J-3-GP
1
2 3
RN103
RN103
SRN2K2J-3-GP
SRN2K2J-3-GP
SB_SMB_CLK0 8,20,23,27
SB_SMB_DAT0 8,20,23,27
Wistron Incorporated
Wistron Incorporated
Wistron Incorporated
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei
Hsichih, Taipei
Hsichih, Taipei
PATEK
PATEK
PATEK
1
+3VS
4
1
2 3
SA
SA
18 57 Monday, March 15, 2010
18 57 Monday, March 15, 2010
18 57 Monday, March 15, 2010
SA