Wistron LZ57, B570, IdeaPad V570, IdeaPad Z570 Schematic
5
D D
4
3
2
1
Discrete/UMA Schematics Document
Sandy Bridge
C C
Intel PCH
2011-01-19
REV : XXX
B B
A A
5
DY :None Installed
UMA:UMA platform installed
PARK:DIS PARK platform installed
MADISON:DIS MADISON platform installed
Colay :Manual modify BOM
MUX : PX
4
3
2
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
Taipei Hsien 221, Taiw an, R.O.C.
Cover Page
Cover Page
Cover Page
LZ57
LZ57
LZ57
1102
1102
1102
of
of
1
-1
-1
-1
5
USB BD
POWER BD
48.4IH03.0SA
D D
Finger Printer BD
48.4IH04.0SA
IO BD
48.4IH02.0SA
AV BD
##OnMainBoard
NVIDIA
VRAM
1GB/512MB
N12P-GE/GV
83.84,85,86,87
C C
B B
SD/MMC+/MS/
MS Pro/xD
HDMI
LCD
CRT
74
51
49
50
BD
USB x 2
Bluetooth
CAMERA
Finger Print
CardReader
Realtek
RTS5139
63
49
64
Internal DMIC
HP1
I/O BD
MIC IN
A A
2CH SPEAKER
5
4
3
Block Diagram
(UMA/Optimus co-lay)
88,89,90,91
DDR3
800MHz
Azalia
CODEC
Realtek
RTC8111E
G1454
4
29
4
PCIe x 16
(Discrete only)
HDMI
LVDS
RGB CRT
USB2.0 x 5
USB 2.0 x 1
AZALIA
Intel CPU
Sandy Bridge
DDRIII: 1066/1333/1666 MHz
FDI x 4 x 2
(UMA only)
PCH
Cougar Point
14 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
SATA ports (6)
PCIE ports (8)
17,18,19,20,21,22,23,24,25
SPI
Flash ROM
60
4MB
G-Sensor
79
4,5,6,7,8,9,10
DMI x 4
Intel
LPC I/F
ACPI 1.1
KBC
NUVOTON
NPCE795
Touch
PAD
69
Project code : 91.4PA01.001
PCB P/N : 10290
Revision : -SC
DDRIII 1066/1333/1666 Channel A
DDRIII 1066/1333/1666 Channel B
PCIE x 1
PCIE x 1/USB2.0 x 1
PCIE x 1/USB2.0 x 1
PCIE x 1
USB 2.0 x 1/SATA x 1
SATA x 2
LPC Bus
LPC debug port
SMBus
27
Int.
KB
Thermal
EMC2103-2-AP
69 25
3
GLAN RJ45
RTL8111E
Mini-Card
WLAN
Mini-Card
WWAN
NEC
uPD720200
E-SATA/USB
comb
71
Fan
28
31
65
66
35
28
2
DDRIII
1066/1333/1666
1066/1333/1666
CONN
SIM
USB 3.0 x 1
57
HDD
56
ODD
56
2
MB
SYSTEM DC/DC
RT8208B
INPUTS
DCBATOUT
Slot 0
14
Slot 1DDRIII
15
59
66
62
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
48
OUTPUTS
0D85V_S0
Block Diagram
Block Diagram
Block Diagram
LZ57
LZ57
LZ57
1
CPU DC/DC
NCP6131
INPUTS
DCBATOUT
SYSTEM DC/DC
UP6111CQHC
INPUTS
DCBATOUT
SYSTEM DC/DC
UP6183AQAG
INPUTS
DCBATOUT 5V_S5
SYSTEM DC/DC
UP6111C
INPUTS
DCBATOUT
SYSTEM DC/DC
NCP5911
INPUTS
DCBATOUT
RT8208B
INPUTS
DCBATOUT
TI CHARGER
BQ24745
INPUTS
+DC_IN_S5
26
RT9025
INPUTS
3D3V_S5 1D8V_S0
SYSTEM DC/DC
G9091-180T11U
INPUTS OUTPUTS
26
3D3V_S5
3D3V_S0
INPUTS OUTPUTS
5V_S5
PCB LAYER
L1:Top
L2:GND
L3:Signal
L4:Signal
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
1
42~44
OUTPUTS
VCC_CORE
OUTPUTS
1D05V_VTT
OUTPUTS
5V_AUX_S5
3D3V_AUX_S5
3D3V_S5
OUTPUTS
1D5V_S3
DDR_VREF_S3
OUTPUTS
VCC_GFXCORE
VGA
OUTPUTS
VGA_CORE
OUTPUTS
DCBATOUT+PBATT
LDO
OUTPUTS
1D5V_S5
1D8V_VGA_S0
LDO
RT9026
0D75V_S0
L5:VCC
L6:Signal
L7:GND
L8:Signal
2 102
2 102
2 102
of
of
of
44
40
24,93
-1
-1
-1
45
41
46
92
47
46
PCH Strapping
Name Schematics Notes
SPKR
INIT3_3V# Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55
GNT2#/GPIO53
4 4
GNT1#/GPIO51
SPI_MOSI
NV_ALE
NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.
HAD_DOCK_EN#
/GPIO[33]
3 3
HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
HDA_SYNC
GPIO15
GPIO8
2 2
GPIO27
A
Huron River Schematic Checklist Rev.0_7
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with
No Reboot Mode with TCO Disabled:
8.2-kȍ
- 10-kȍ weak pull-up resistor.
GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.
Enable Danbury:
Disable Danbury:
Enable Danbury:
Disable Danbury:
Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.
High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.
Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no
confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality
Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.
GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.
Left floating, no pull-down required.
Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]
Leave floating (internal pull-down)
B
C
Processor Strapping
Pin Name Strap Description Configuration (Default value for each bit is
CFG[2]
PCI-Express Static
Lane Reversal
CFG[4]
CFG[6:5]
PCI-Express
Port Bifurcation
Straps
PEG DEFER TRAINING
CFG[7]
VOLTAGE DESCRIPTION
POWER PLANE
5V
5V_S0
3.3V
3D3V_S0
1.8V
1D8V_S0
1.5V
1D5V_S0
1.05V
1D05V_VTT
0.95 - 0.85V
0D85V_S0
0.75V
0D75V_S0
0.35V to 1.5V
VCC_CORE
0.4 to 1.25V
VCC_GFXCORE
1.8V
1D8V_VGA_S0
3.3V
3D3V_VGA_S0
1V
1V_VGA_S0
5V_USBX_S3
5V
1D5V_S3
1.5V
DDR_VREF_S3
0.75V
6V-14.1V
BT+
6V-14.1V
DCBATOUT
5V
5V_S5
5V
5V_AUX_S5
3.3V
3D3V_S5
3.3V
3D3V_AUX_S5
3.3V3D3V_LAN_S5
3.3V
3D3V_AUX_KBC
3D3V_AUX_S5
3.3V
1 unless specified otherwise)
1:
Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
0:
Disabled - No Physical Display Port attached to
1:
Embedded DisplayPort.
Enabled - An external Display Port device is
0:
connectd to the EMBEDDED display Port
11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled
1:
PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training
0:
Voltage Rails
ACTIVE IN
S0
S3
All S states
WOL_EN
DSW, Sx ON for supporting Deep Sleep states
G3, Sx
D
Huron River Schematic Checklist Rev.0_7
CPU Core Rail
Graphics Core Rail
AC Brick Mode only
Legacy WOL
Powered by Li Coin Cell in G3
and +V3ALW in Sx
Default
Value
1
0
11
1
E
USB Table
Pair
PCIE Routing
LANE1 Mini Card2(WWAN)
LANE2
Onboard LAN
LANE3 Card Reader
LANE4 Mini Card1(WLAN)
1 1
LANE5
USB3.0
LANE6
Intel GBE LAN
LANE7
Dock
LANE8 New Card
SATA Table
Pair
SATA
Device
HDD1
0
HDD2
1
N/A
2
N/A
3
ODD
4
ESATA
5
A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
B
Device
Touch Panel / 3G SIM
USB Ext. port 1 (HS)
Fingerprint
BLUETOOTH
Mini Card2 (WWAN)
CARD READER
X
X
USB Ext. port 4 / E-SATA /USB CHARGER
USB Ext. port 2
USB Ext. port 3
Mini Card1 (WLAN)
CAMERA
New Card
SMBus ADDRESSES
2
I C / SMBus Addresses
Device
EC SMBus 1
Battery
CHARGER
EC SMBus 2
PCH
eDP
PCH SMBus
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
G-Sensor
MINI
C
Address Hex Bus Ref Des
HURON RIVER ORB
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
D
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
Table of Content
Table of Content
Table of Content
LZ57
LZ57
LZ57
of
of
of
3102
3102
3102
E
-1
-1
-1
A
SSID = CPU
D D
C C
Signal Routing Guideline:
B B
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.
NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.
5
Note:
Intel DMI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Intel FDI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.
Note:
Lane reversal does not apply to
FDI sideband signals.
DMI_TXN[3:0]19
DMI_TXP[3:0]19
DMI_RXN[3:0]19
DMI_RXP[3:0]19
FDI_TXN[7:0]19
FDI_TXP[7:0]19
FDI_FSYNC019
FDI_FSYNC119
FDI_IN T19
FDI_LSYNC019
FDI_LSYNC119
1D05V_VTT
R402 24D9R2F-L-GPR402 24D9R2F-L-GP
1 2
R403
R403
1 2
DY
DY
Do Not Stuff
Do Not Stuff
4
CPU1A
CPU1A
SANDY
B27
B25
A25
B24
B28
B26
A24
B23
G21
E22
F21
D21
G22
D22
F20
C21
A21
H19
E19
F18
B21
C20
D18
E17
A22
G19
E20
G18
B20
C19
D19
F17
J18
J17
H20
J19
H17
A18
A17
B16
C15
D15
C17
F16
C16
G15
C18
E16
D16
F15
DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3
DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3
DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3
DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3
FDI0_TX#0
FDI0_TX#1
FDI0_TX#2
FDI0_TX#3
FDI1_TX#0
FDI1_TX#1
FDI1_TX#2
FDI1_TX#3
FDI0_TX0
FDI0_TX1
FDI0_TX2
FDI0_TX3
FDI1_TX0
FDI1_TX1
FDI1_TX2
FDI1_TX3
FDI0_FSYNC
FDI1_FSYNC
FDI_INT
FDI0_LSYNC
FDI1_LSYNC
EDP_COMPIO
EDP_ICOMPO
EDP_HPD
EDP_AUX
EDP_AUX#
EDP_TX0
EDP_TX1
EDP_TX2
EDP_TX3
EDP_TX#0
EDP_TX#1
EDP_TX#2
EDP_TX#3
62.10055.321
62.10055.321
SANDY
FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7
FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7
DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3
DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3
DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3
DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3
DP_COMP
eDP_HPD
3
Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.
1 OF 9
1 OF 9
PEG_IRCOMP_R
J22
PEG_ICOMPI
J21
PEG_ICOMPO
H22
PEG_RCOMPO
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
DMI
DMI
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
Intel(R) FDI
Intel(R) FDI
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX#10
PEG_TX#11
PCI EXPRESS* - GRAPHICS
PCI EXPRESS* - GRAPHICS
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
eDP
eDP
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32
J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32
M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25
M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_C_TXN15
PEG_C_TXN14
PEG_C_TXN13
PEG_C_TXN12
PEG_C_TXN11
PEG_C_TXN10
PEG_C_TXN9
PEG_C_TXN8
PEG_C_TXN7
PEG_C_TXN6
PEG_C_TXN5
PEG_C_TXN4
PEG_C_TXN3
PEG_C_TXN2
PEG_C_TXN1
PEG_C_TXN0
PEG_C_TXP15
PEG_C_TXP14
PEG_C_TXP13
PEG_C_TXP12
PEG_C_TXP11
PEG_C_TXP10
PEG_C_TXP9
PEG_C_TXP8
PEG_C_TXP7
PEG_C_TXP6
PEG_C_TXP5
PEG_C_TXP4
PEG_C_TXP3
PEG_C_TXP2
PEG_C_TXP1
PEG_C_TXP0
2
R401 24D9R2F-L-GPR401 24D9R2F-L-GP
1 2
PEG_RXN[0..15]
PEG_RXP[0..15]
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
OPS
1D05V_VTT
PEG_RXN[0..15] 83
PEG_RXP[0..15] 83
NOTE.
If PEG is not implemented, the RX&TX pairs can be left as No Connect
PEG Static Lane Reversal
C401 SCD1U10V2KX-5GP
C401 SCD1U10V2KX-5GP
12
C402 SCD1U10V2KX-5GP
C402 SCD1U10V2KX-5GP
12
C403 SCD1U10V2KX-5GP
C403 SCD1U10V2KX-5GP
12
C404 SCD1U10V2KX-5GP
C404 SCD1U10V2KX-5GP
12
C405 SCD1U10V2KX-5GP
C405 SCD1U10V2KX-5GP
12
C406 SCD1U10V2KX-5GP
C406 SCD1U10V2KX-5GP
12
C407 SCD1U10V2KX-5GP
C407 SCD1U10V2KX-5GP
12
C408 SCD1U10V2KX-5GP
C408 SCD1U10V2KX-5GP
12
C409 SCD1U10V2KX-5GP
C409 SCD1U10V2KX-5GP
12
C410 SCD1U10V2KX-5GP
C410 SCD1U10V2KX-5GP
12
C411 SCD1U10V2KX-5GP
C411 SCD1U10V2KX-5GP
12
C412 SCD1U10V2KX-5GP
C412 SCD1U10V2KX-5GP
12
C413 SCD1U10V2KX-5GP
C413 SCD1U10V2KX-5GP
12
C414 SCD1U10V2KX-5GP
C414 SCD1U10V2KX-5GP
12
C415 SCD1U10V2KX-5GP
C415 SCD1U10V2KX-5GP
12
C416 SCD1U10V2KX-5GP
C416 SCD1U10V2KX-5GP
12
C417 SCD1U10V2KX-5GP
C417 SCD1U10V2KX-5GP
12
C418 SCD1U10V2KX-5GP
C418 SCD1U10V2KX-5GP
12
C419 SCD1U10V2KX-5GP
C419 SCD1U10V2KX-5GP
12
C420 SCD1U10V2KX-5GP
C420 SCD1U10V2KX-5GP
12
C421 SCD1U10V2KX-5GP
C421 SCD1U10V2KX-5GP
12
C422 SCD1U10V2KX-5GP
C422 SCD1U10V2KX-5GP
12
C423 SCD1U10V2KX-5GP
C423 SCD1U10V2KX-5GP
12
C424 SCD1U10V2KX-5GP
C424 SCD1U10V2KX-5GP
12
C425 SCD1U10V2KX-5GP
C425 SCD1U10V2KX-5GP
12
C426 SCD1U10V2KX-5GP
C426 SCD1U10V2KX-5GP
12
C427 SCD1U10V2KX-5GP
C427 SCD1U10V2KX-5GP
12
C428 SCD1U10V2KX-5GP
C428 SCD1U10V2KX-5GP
12
C429 SCD1U10V2KX-5GP
C429 SCD1U10V2KX-5GP
12
C430 SCD1U10V2KX-5GP
C430 SCD1U10V2KX-5GP
12
C431 SCD1U10V2KX-5GP
C431 SCD1U10V2KX-5GP
12
C432 SCD1U10V2KX-5GP
C432 SCD1U10V2KX-5GP
12
PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
PEG_TXN[0..15]
PEG_TXP[0..15]
1
PEG_TXN[0..15] 83
PEG_TXP[0..15] 83
delete R404&RN 401 @20100630
5
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
4
3
2
Taipei Hsien 221, Taiw an, R.O.C.
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
LZ57
LZ57
LZ57
4102
4102
4102
1
of
of
of
A
-1
-1
-1
A
Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.
CLK_DP_N_R
CLK_DP_P_R
RN502
RN502
1
2 3
Do Not Stuff
Do Not Stuff
DY
DY
1
4
1D05V_VTT
20100722 SA confirm.
1D05V_VTT
RN501
XDP_TMS
XDP_TDI
XDP_TDO
XDP_TCLK
XDP_TRST#
XDP_DBRESET#
RN501
1
8
2
7
3
6
4 5
SRN51J-1-GP
SRN51J-1-GP
R511 51R2J-2-G PR511 51R2J-2-GP
1 2
1 2
R516 1KR 2J-1-GPR516 1KR2J-1-GP
3D3V_S0
R503
R503
1 2
H_PROCHOT#
12
C502
C502
SC47P50V2JN-3GP
SC47P50V2JN-3GP
10KR2J-3-GP
10KR2J-3-GP
5
H_CPUPWRGD_R
H_SNB_IVB#18
H_PROCHOT#27,42
H_THERMTRIP#22,36
H_PM_SYNC19
H_CPUPWRGD11,22,36,97
PM_DRAM_PWRGD19,37
VDDPWRGOOD37
1
TP501Do Not Stuff TP501Do Not Stuff
1
TP502Do Not Stuff TP502Do Not Stuff
H_PECI22,27
R513
R513
1 2
56R2J-4-GP
56R2J-4-GP
R504
R504
1 2
R505
R505
1 2
DY
DY
SSID = CPU
1D05V_VTT
R501
R501
1 2
62R2J-GP
62R2J-GP
D D
Connect EC to PROCHOT# through inverting OD buffer.
C C
20100722 follow Astro add buffer
B B
DY
DY
U501
U501
NC#11VCC
PLT_RST#,18,27,31,35,36,65,66,71,83,97
2
3
A
GND
Do Not Stuff
Do Not Stuff
Y
1 2
5
4
R517
R517
0R2J-2-GP
0R2J-2-GP
DY
DY
12
C503
C503
BUFO_CPU_RST#
SKTOCC#_R
H_CATERR#
H_PROCHOT#_R
H_CPUPWRGD_R
Do Not Stuff
Do Not Stuff
VDDPWRGOOD
Do Not Stuff
Do Not Stuff
BUF_CPU_RST#
1D05V_VTT3D3V_S0
12
Do Not Stuff
Do Not Stuff
DY
DY
R512
R512
Do Not Stuff
Do Not Stuff
R510
R510
1 2
1K5R2F-2-GP
1K5R2F-2-GP
4
CPU1B
CPU1B
SANDY
SANDY
C26
SNB_IVB#
AN34
AL33
AN33
AL32
AN32
AM34
AP33
AR33
12
V8
R509
R509
750R2F-GP
750R2F-GP
SKTOCC#
CATERR#
PECI
PROCHOT#
THERMTRIP#
PM_SYNC
UNCOREPWRGOOD
SM_DRAMPWROK
RESET#
BUF_CPU_RST#
MISCTHERMALPWR MANAGEMENT
MISCTHERMALPWR MANAGEMENT
3
2 OF 9
2 OF 9
BCLK
BCLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
SM_DRAMRST#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
DDR3
MISC
DDR3
MISC
PRDY#
PREQ#
TCK
TMS
TRST#
TDI
TDO
DBR#
BPM#0
BPM#1
JTAG & BPM
JTAG & BPM
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
XDP_PREQ#
XDP_PRDY#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
XDP_TDO
XDP_TDI
XDP_TRST#
XDP_TCLK
XDP_TMS
XDP_DBRESET#
2
A28
A27
CLK_DP_P_R
A16
CLK_DP_N_R
A15
R502
R502
1 2
4K99R2F-L-GP
SM_RCOMP_0
R506 140R2F-GPR506 140R2F-GP
SM_RCOMP_1
R507 25D5R2F- G PR507 25D5R2F- G P
SM_RCOMP_2
R508 200R2F-L-G PR508 200R2F-L-GP
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_DBRESET#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
XDP_PREQ# 11
XDP_PRDY# 11
XDP_BPM0 11
XDP_BPM1 11
XDP_BPM2 11
XDP_BPM3 11
XDP_BPM4 11
XDP_BPM5 11
XDP_BPM6 11
XDP_BPM7 11
XDP_TDO 11
XDP_TDI 11
XDP_TRST# 11
XDP_TCLK 11
XDP_TMS 11
XDP_DBRESET# 11,19
4K99R2F-L-GP
R8
AK1
A5
A4
Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.
AP29
AP27
AR26
AR27
AP30
AR28
AP26
AL35
AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32
1 2
1 2
1 2
CLK_EXP_P 20
CLK_EXP_N 20
CLK_DP_P_R 20
CLK_DP_N_R 20
SM_DRAMRST# 37
BOM
BOM
5
4
3
2
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
LZ57
LZ57
LZ57
Taipei Hsien 221, Taiw an, R.O.C.
5102
5102
5102
of
of
of
Title
Title
Title
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
1
A
-1
-1
-1
5
4
3
2
1
SSID = CPU
4 OF 9
3 OF 9
CPU1C
CPU1C
SANDY
M_A_DQ[63:0]14 M_B_DQ[63:0]15
D D
C C
B B
M_A_DQ[63:0]
M_A_BS014
M_A_BS114
M_A_BS214
M_A_CAS#14
M_A_RAS#14
M_A_WE#14
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
AP11
AN11
AL12
AM12
AM11
AL11
AP12
AN12
AJ14
AH14
AL15
AK15
AL14
AK14
AJ15
AH15
AE10
AF10
C5
D5
D3
D2
D6
C6
C2
C3
F10
F8
G10
G9
F9
F7
G8
G7
K4
K5
K1
J1
J5
J4
J2
K2
M8
N10
N8
N7
M10
M9
N9
M7
AG6
AG5
AK6
AK5
AH5
AH6
AJ5
AJ6
AJ8
AK8
AJ9
AK9
AH8
AH9
AL9
AL8
V6
AE8
AD9
AF9
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
SANDY
3 OF 9
AB6
SA_CLK0
AA6
SA_CLK#0
V9
SA_CKE0
AA5
SA_CLK1
AB5
SA_CLK#1
V10
SA_CKE1
AB4
SA_CLK2
AA4
SA_CLK#2
W9
SA_CKE2
AB3
SA_CLK3
AA3
SA_CLK#3
W10
SA_CKE3
AK3
SA_CS#0
AL3
SA_CS#1
AG1
SA_CS#2
AH1
SA_CS#3
AH3
SA_ODT0
AG3
SA_ODT1
AG2
SA_ODT2
AH2
SA_ODT3
C4
SA_DQS#0
G6
SA_DQS#1
J3
SA_DQS#2
M6
SA_DQS#3
AL6
SA_DQS#4
AM8
SA_DQS#5
AR12
SA_DQS#6
AM15
SA_DQS#7
D4
SA_DQS0
F6
SA_DQS1
K3
SA_DQS2
N6
SA_DQS3
AL5
SA_DQS4
AM9
SA_DQS5
AR11
SA_DQS6
AM14
SA_DQS7
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
AD10
SA_MA0
W1
SA_MA1
W2
SA_MA2
W7
SA_MA3
V3
SA_MA4
V2
SA_MA5
W3
SA_MA6
W6
SA_MA7
V1
SA_MA8
W5
SA_MA9
AD8
SA_MA10
V4
SA_MA11
W4
SA_MA12
AF8
SA_MA13
V5
SA_MA14
V7
SA_MA15
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CKE0 14
M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_A_DIM0_CKE1 14
M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14
M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14
M_A_DQS#[7:0] 14
M_A_DQS[7:0] 14
M_A_A[15:0] 14
M_B_DQ[63:0]
M_B_BS015
M_B_BS115
M_B_BS215
M_B_CAS#15
M_B_RAS#15
M_B_WE#15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
CPU1D
CPU1D
SANDY
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
SB_BS1
SB_BS2
SB_CAS#
SB_RAS#
SB_WE#
SANDY
C9
A7
D10
C8
A9
A8
D9
D8
G4
F4
F1
G1
G5
F5
F2
G2
J7
J8
K10
K9
J9
J10
K8
K7
M5
N4
N2
N1
M4
N5
M2
M1
AM5
AM6
AR3
AP3
AN3
AN2
AN1
AP2
AP5
AN9
AT5
AT6
AP6
AN8
AR6
AR5
AR9
AJ11
AT8
AT9
AH11
AR8
AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15
AA9
AA7
R6
AA10
AB8
AB9
4 OF 9
AE2
SB_CLK0
AD2
SB_CLK#0
R9
SB_CKE0
AE1
SB_CLK1
AD1
SB_CLK#1
R10
SB_CKE1
AB2
SB_CLK2
AA2
SB_CLK#2
T9
SB_CKE2
AA1
SB_CLK3
AB1
SB_CLK#3
T10
SB_CKE3
AD3
SB_CS#0
AE3
SB_CS#1
AD6
SB_CS#2
AE6
SB_CS#3
AE4
SB_ODT0
AD4
SB_ODT1
AD5
SB_ODT2
AE5
SB_ODT3
M_B_DQS#0
D7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
F3
K6
N3
AN5
AP9
AK12
AP15
C7
G3
J6
M3
AN6
AP8
AK11
AP14
AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DIM0_CLK_DDR0 15
M_B_DIM0_CLK_DDR#0 15
M_B_DIM0_CKE0 15
M_B_DIM0_CLK_DDR1 15
M_B_DIM0_CLK_DDR#1 15
M_B_DIM0_CKE1 15
M_B_DIM0_CS#0 15
M_B_DIM0_CS#1 15
M_B_DIM0_ODT0 15
M_B_DIM0_ODT1 15
M_B_DQS#[7:0] 15
M_B_DQS[7:0] 15
M_B_A[15:0] 15
A A
5
4
3
2
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
Taipei Hsien 221, Taiw an, R.O.C.
CPU (DDR)
CPU (DDR)
CPU (DDR)
LZ57
LZ57
LZ57
6102
6102
6102
of
of
1
-1
-1
-1
SSID = CPU
5
CFG0
B4:VREF_DQ CHA
D1:VREF_DQ CHB
12
12
R712
R712
1KR2F-3-GP
1KR2F-3-GP
H_VCCP_SEL
AK28
AK29
CFG2
AL26
AL27
CFG4
AK26
CFG5
AL29
CFG6
AL30
CFG7
AM31
AM32
AM30
AM28
AM26
AN28
AN31
AN26
AM27
AK31
AN29
AJ31
AH31
AJ33
AH33
AJ26
B4
D1
F25
F24
F23
D24
G25
G24
E23
D23
C30
A31
B30
B29
D30
B31
A30
C29
J20
B18
A19
J15
CFG011
D D
SB_0923'10
M3 - Processor Generated SO-DIMM VREF_DQ
M_VREF_DQ_DIMM014,37
M_VREF_DQ_DIMM115
M_VREF_CA_DIMM014
M_VREF_CA_DIMM115
C C
CFG2
B B
12
R702
R702
1KR2J-1-GP
1KR2J-1-GP
OPS
OPS
DY
DY
R708 Do Not Stuff
R708 Do Not Stuff
1 2
DY
DY
R709 Do Not Stuff
R709 Do Not Stuff
1 2
R707 Do Not Stuff
R707 Do Not Stuff
1 2
DY
DY
R706 Do Not Stuff
R706 Do Not Stuff
1 2
DY
DY
20100725
PEG Static Lane Reversal
CFG2
M_VREF_DQ_DIMM0_C
M_VREF_CA_DIMM0_C
R711
R711
1KR2F-3-GP
1KR2F-3-GP
20 mils
R710 Do Not Stuff
R710 Do Not Stuff
1 2
DY
DY
1: Normal Operation; Lane #
definition matches socket pin map definition
0:Lane Reversed
CPU1E
CPU1E
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD#AJ31
RSVD#AH31
RSVD#AJ33
RSVD#AH33
RSVD#AJ26
RSVD#B4
RSVD#D1
RSVD#F25
RSVD#F24
RSVD#F23
RSVD#D24
RSVD#G25
RSVD#G24
RSVD#E23
RSVD#D23
RSVD#C30
RSVD#A31
RSVD#B30
RSVD#B29
RSVD#D30
RSVD#B31
RSVD#A30
RSVD#C29
RSVD#J20
RSVD#B18
RSVD#A19
RSVD#J15
SANDY
SANDY
4
RSVD#L7
RSVD#AG7
RSVD#AE7
RSVD#AK2
RSVD#W8
RSVD#AT26
RSVD#AM33
RSVD#AJ27
RSVD#T8
RSVD#J16
RSVD#H16
RSVD#G16
RSVD#AR35
RSVD#AT34
RSVD#AT33
RSVD#AP35
RSVD#AR34
RSVD#B34
RSVD#A33
RSVD#A34
RSVD#B35
RSVD#C35
RESERVED
RESERVED
RSVD#AJ32
RSVD#AK32
RSVD#AH27
RSVD#AN35
RSVD#AM35
RSVD#AT2
RSVD#AT1
RSVD#AR1
3
5 OF 9
5 OF 9
L7
AG7
AE7
AK2
W8
AT26
AM33
AJ27
T8
J16
H16
G16
AR35
AT34
AT33
AP35
AR34
B34
A33
A34
B35
C35
AJ32
AK32
AH27
AN35
CLK_XDP_ITP_P 11
AM35
CLK_XDP_ITP_N 11
AT2
AT1
AR1
2
1
CFG4
CFG5
CFG6
12
12
R701
R701
R704
R704
DY
DY
DY
A A
DY
1KR2J-1-GP
1KR2J-1-GP
CFG7
12
R705
R705
Do Not Stuff
Do Not Stuff
DY
DY
12
R703
R703
Do Not Stuff
Do Not Stuff
DY
DY
PCIE Port Bifurcation Straps
CFG[6:5]
Do Not Stuff
Do Not Stuff
PEG DEFER TRAINING
CFG7
5
Display Port Presence Strap
1: Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0: Enabled; An external Display Port device is
connected to the Embedded Display Port
11: x16 - Device 1 functions 1 and 2 disabled
10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
1: PEG Train immediately following xxRESETB de assertion
0: PEG Wait for BIOS for training
4
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (RESERVED)
CPU (RESERVED)
CPU (RESERVED)
LZ57
LZ57
LZ57
1
-1
-1
-1
7102
7102
7102
of
of
of
5
SSID = CPU
PROCESSOR CORE POWER
VCC_CORE
D D
C C
B B
A A
53A
12
12
12
12
12
12
C801
C801
C802
C802
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C817
C817
C815
C815
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C821
C821
C816
C816
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C837
C837
C836
C836
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VCC Output Decoupling Recommendation:
4 x 470 uF at Bottom Socket Edge
8 x 22 uF at Top Socket Cavity
8 x 22 uF at Top Socket Edge
8 x 22 uF at Bottom Socket Cavity
5
12
12
C803
C803
C818
C818
C822
C822
C835
C835
C811
C811
C804
C804
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C819
C819
C820
C820
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C824
C824
C823
C823
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C833
C833
C834
C834
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C825
C825
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C832
C832
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4
POWER
POWER
CPU1F
CPU1F
SANDY
VCC_CORE
12
C827
C827
C826
C826
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C828
C828
C831
C831
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
4
SANDY
AG35
VCC
AG34
VCC
AG33
VCC
AG32
VCC
AG31
VCC
AG30
VCC
AG29
VCC
AG28
VCC
AG27
VCC
AG26
VCC
AF35
VCC
AF34
VCC
AF33
VCC
AF32
VCC
AF31
VCC
AF30
VCC
AF29
VCC
AF28
VCC
AF27
VCC
AF26
VCC
AD35
VCC
AD34
VCC
AD33
VCC
AD32
VCC
AD31
VCC
AD30
VCC
AD29
VCC
AD28
VCC
AD27
VCC
AD26
VCC
AC35
VCC
AC34
VCC
AC33
VCC
AC32
VCC
AC31
VCC
AC30
VCC
AC29
VCC
AC28
VCC
AC27
VCC
AC26
VCC
AA35
VCC
AA34
VCC
AA33
VCC
AA32
VCC
AA31
VCC
AA30
VCC
AA29
VCC
AA28
VCC
AA27
VCC
AA26
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
CORE SUPPLY
CORE SUPPLY
3
6 OF 9
6 OF 9
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
PEG AND DDR
PEG AND DDR
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VIDALERT#
VIDSCLK
VIDSOUT
VCC_SENSE
VSS_SENSE
VCCIO_SENSE
VSSIO_SENSE
SENSE LINES SVID
SENSE LINES SVID
3
AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12
E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
J23
AJ29
AJ30
AJ28
AJ35
AJ34
B10
A10
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
2
VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
5 x 22 uF & 5 x 0805 no-stuff at Bottom
7 x 22 uF & 2 x 0805 no-stuff at Top
12
C805
C805
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
No-stuff sites outside the socket may be removed.
No-stuff sites inside the socket cavity need to remain.
12
12
C812
C812
Do Not Stuff
Do Not Stuff
DY
DY
12
C807
C807
C806
C806
Do Not Stuff
Do Not Stuff
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C813
C813
C814
C814
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
12
12
C809
C809
C808
C808
Do Not Stuff
Do Not Stuff
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C830
C830
C829
C829
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C810
C810
Do Not Stuff
Do Not Stuff
C842
C842
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C839
C839
C838
C838
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C844
C844
C843
C843
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R804 need to close to CPU
R804 130R2F-1-GPR804 130R2F-1-GP
H_CPU_SVIDDAT
1 2
S-HS_20100610 V1.0
R803 43R2J-GPR803 43R2J-GP
1 2
VCCIO_SENSE 45
VSSIO_SENSE 45
VR_SVID_ALE RT# 42
H_CPU_SVIDCLK 42
H_CPU_SVIDDAT 42
VCC_CORE
R801, R802 need to close to CPU
12
R801
R801
100R2F-L1-GP-U
100R2F-L1-GP-U
12
R802
R802
100R2F-L1-GP-U
100R2F-L1-GP-U
2
VCCSENSE 42
VSSSENSE 42
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
1D05V_VTT
12
12
C840
C840
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_VTT
12
C845
C845
Do Not Stuff
Do Not Stuff
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
CPU (VCC_CORE)
CPU (VCC_CORE)
CPU (VCC_CORE)
LZ57
LZ57
LZ57
1
C841
C841
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_VTT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
8 102
8 102
8 102
1
-1
-1
-1
of
of
5
SSID = CPU
VCC_GFXCORE
D D
DY
DY
C C
Disabling Guidelines for External Graphics Designs:
Can connect to GND if motherboard only supports external
graphics and if GFX VR is not stuffed.
Can be left floating (Gfx VR keeps VAXG rail from floating)
B B
if the VR is stuffed
VAXG Output Decoupling Recommendation:
2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity
4 x 22 uF at Top Socket Edge
2 x 22 uF at Bottom Socket Cavity
4 x 22 uF at Bottom Socket Edge
PROCESSOR VAXG: 24A
12
12
12
12
C901
C901
Do Not Stuff
Do Not Stuff
12
C907
C907
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D8V_S0
12
C903
C903
C902
C902
Do Not Stuff
Do Not Stuff
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C908
C908
C918
C918
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
PROCESSOR VCCPLL: 1.2A
12
12
TC902
TC902
ST330U2VDM-4-GP
ST330U2VDM-4-GP
VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF
A A
5
4
3
2
1
Close to CPU
VCC_GFXCORE
POWER
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VCCPLL
VCCPLL
VCCPLL
POWER
SANDY
SANDY
GRAPHICS
GRAPHICS
1.8V RAIL
1.8V RAIL
CPU1G
CPU1G
AT24
AT23
12
12
C904
C904
C905
C905
C906
C906
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C920
C920
C921
C919
C919
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C923
C923
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C921
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C924
C924
C922
C922
Do Not Stuff
Do Not Stuff
DY
DY
SC1U10V2KX-1GP
SC1U10V2KX-1GP
4
AT21
AT20
AT18
AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17
AL24
AL23
AL21
AL20
AL18
AL17
AK24
AK23
AK21
AK20
AK18
AK17
AJ24
AJ23
AJ21
AJ20
AJ18
AJ17
AH24
AH23
AH21
AH20
AH18
AH17
B6
A6
A2
7 OF 9
7 OF 9
AK35
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
AK34
Refer to the latest Huron River Mainstream PDG
(Doc# 436735) for more details on S3 power
reduction implementation.
+V_SM_VREF_CNT should have 10 mil trace width
+V_SM_VREF_CNT
AL1
SM_VREF
VREFMISC
VREFMISC
AF7
VDDQ
AF4
VDDQ
AF1
VDDQ
AC7
VDDQ
AC4
VDDQ
AC1
VDDQ
Y7
VDDQ
Y4
VDDQ
Y1
VDDQ
U7
VDDQ
U4
VDDQ
U1
VDDQ
P7
VDDQ
P4
VDDQ
P1
VDDQ
DDR3 -1.5V RAILS
DDR3 -1.5V RAILS
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
SA RAIL
SA RAIL
VCCSA_SENSE
FC_C22
VCCSA_VID1
3
PROCESSOR VCCSA: 6A
M27
M26
L26
J26
J25
J24
H26
H25
VCCSA_SENSE
H23
H_FC_C22
C22
VCCSA_SEL
C24
VCC_AXG_SENSE 42
VSS_AXG_SENSE 42
+V_SM_VREF_CNT 37
Routing Guideline:
Power from DDR_VREF_S3 and +V_SM_VREF_CNT
should have 10 mils trace width.
PROCESSOR VDDQ: 10A
12
12
12
12
C909
C909
C910
C910
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C916
C916
C915
DY
DY
0D85V_S0
C915
Do Not Stuff
Do Not Stuff
12
R902
R902
Notice:pull-high 100k or 10k
100R2F-L1-GP-U
100R2F-L1-GP-U
1
23
RN901
RN901
SRN1KJ-7-GP
SRN1KJ-7-GP
4
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VCCSA_SENSE 48
H_FC_C22 48
VCCSA_SEL 48
2
12
C911
C911
C912
C912
C913
C913
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C917
C917
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VDDQ Output Decoupling Recommendation:
1 x 330 uF
0D85V_S0
6 x 10 uF
12
TC903
TC903
ST330U2VDM-4-GP
ST330U2VDM-4-GP
VCCSA Output Decoupling Recommendation:
1 x 330 uF
2 x 10 uF at Bottom Socket Cavity
1 x 10 uF at Bottom Socket Edge
20100721 standard schematic update
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
VCC_AXG_SENSE
VSS_AXG_SENSE
S-HR_20100609 V1.0
1D5V_DDR_S0
12
C914
C914
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
LZ57
LZ57
LZ57
12
R906
R906
100R2F-L1-GP-U
100R2F-L1-GP-U
12
R907
R907
100R2F-L1-GP-U
100R2F-L1-GP-U
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
9102
9102
9102
of
of
1
-1
-1
-1
5
4
3
2
1
SSID = CPU
8 OF 9
CPU1H
CPU1H
AT35
VSS
AT32
VSS
AT29
VSS
AT27
VSS
AT25
VSS
AT22
VSS
D D
C C
B B
AT19
AT16
AT13
AT10
AR25
AR22
AR19
AR16
AR13
AR10
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10
AM29
AM25
AM22
AM19
AM16
AM13
AM10
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10
AJ25
VSS
VSS
SANDY
SANDY
VSS
VSS
AT7
VSS
AT4
VSS
AT3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AR7
VSS
AR4
VSS
AR2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AP7
VSS
AP4
VSS
AP1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AN7
VSS
AN4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AM7
VSS
AM4
VSS
AM3
VSS
AM2
VSS
AM1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL7
VSS
AL4
VSS
AL2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK7
VSS
AK4
VSS
VSS
VSS
VSS
8 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CPU1I
AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH26
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2
CPU1I
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
P9
P8
P6
P5
P3
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34
L33
L30
L27
L9
L8
L6
L5
L4
L3
L2
L1
K35
K32
K29
K26
J34
J31
H33
H30
H27
H24
H21
H18
H15
H13
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29
SANDY
SANDY
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
9 OF 9
9 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3
A A
5
4
3
2
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
Taipei Hsien 221, Taiw an, R.O.C.
CPU (VSS)
CPU (VSS)
CPU (VSS)
LZ57
LZ57
LZ57
10 102
10 102
10 102
1
of
of
-1
-1
-1
5
4
3
2
1
D D
C C
B B
XDP_PREQ#5
XDP_PRDY#5
XDP_BPM05
XDP_BPM15
XDP_BPM25
XDP_BPM35
XDP_BPM45
XDP_BPM55
XDP_BPM65
XDP_BPM75
XDP_TDO5
XDP_TDI5
XDP_TRST#5
XDP_TCLK5
XDP_TMS5
XDP_DBRESET#5,19
H_CPUPWRGD5,22,36,97
1D05V_VTT
12
DY
DY
C1101
C1101
Do Not Stuff
Do Not Stuff
CAD Note: The resistor
for HOOK2 should be
placed such that the
stub is very small
on CFG0 net
XDP_PREQ#
XDP_PRDY#
XDP_BPM0
XDP_BPM1
XDP_BPM2
XDP_BPM3
XDP_BPM4
XDP_BPM5
XDP_BPM6
XDP_BPM7
XDP_TDO
XDP_TDI
XDP_TRST#
XDP_TCLK
XDP_TMS
XDP_DBRESET#
H_CPUPWRGD
CFG07
PM_PWRBTN#19,27,97
SYS_PWROK19,36,37
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
H_CPUPWRGD
SB_0923'10
TP8515 Do N ot StuffTP8515 D o N ot Stuff
TP8516 Do N ot StuffTP8516 Do N ot Stuff
TP8517 Do N ot StuffTP8517 Do N ot Stuff
TP8518 Do N ot StuffTP8518 Do N ot Stuff
TP8519 Do N ot StuffTP8519 Do N ot Stuff
TP8520 Do N ot StuffTP8520 Do N ot Stuff
TP8521 Do N ot StuffTP8521 Do N ot Stuff
TP8522 Do N ot StuffTP8522 Do N ot Stuff
TP8523 Do N ot StuffTP8523 Do N ot Stuff
TP8524 Do N ot StuffTP8524 Do N ot Stuff
TP8525 Do N ot StuffTP8525 Do N ot Stuff
TP8526 Do N ot StuffTP8526 Do N ot Stuff
TP8527 Do N ot StuffTP8527 Do N ot Stuff
TP8529 Do N ot StuffTP8529 Do N ot Stuff
TP8528 Do N ot StuffTP8528 Do N ot Stuff
TP8530 Do N ot StuffTP8530 Do N ot Stuff
1 2
DY
DY
1 2
DY
DY
R1103 Do Not Stuff
R1103 Do Not Stuff
1 2
DY
DY
R1104 Do Not Stuff
R1104 Do Not Stuff
1 2
DY
DY
R1101 Do Not Stuff
R1101 Do Not Stuff
R1102 Do Not Stuff
R1102 Do Not Stuff
SML0_DATA20
SML0_CLK20
H_CPUPWRGD_XDP
XDP_HOOK2
PM_PWRBTN#_XDP
H_SYS_PWROK_XDP
TP8533 Do N ot StuffTP8533 D o N ot Stuff
1
TP8531 Do N ot StuffTP8531 D o N ot Stuff
1
TP8534 Do N ot StuffTP8534 D o N ot Stuff
1
TP8532 Do N ot StuffTP8532 D o N ot Stuff
1
TP8535 Do N ot StuffTP8535 D o N ot Stuff
1
TP8536 Do N ot StuffTP8536 D o N ot Stuff
1
TP8537 Do N ot StuffTP8537 D o N ot Stuff
1
RN1102
RN1102
1
4
2 3
DY
DY
Do Not Stuff
TP8538Do Not Stuff TP 8538Do Not Stuff
TP8539Do Not Stuff TP 8539Do Not Stuff
TP8540Do Not Stuff TP 8540Do Not Stuff
TP8541Do Not Stuff TP 8541Do Not Stuff
BCLK_ITP_P
1
BCLK_ITP_N
1
1
XDP_RST#_R
1
1
2 3
DY
DY
1 2
DY
DY
4
Do Not Stuff
Do Not Stuff
RN1101
RN1101
Do Not Stuff
Do Not Stuff
R1105
R1105
Do Not Stuff
PCIE_CLK_XDP_P 20
PCIE_CLK_XDP_N 20
1D05V_VTT
PLT_RST# 5,18,27,31,35,36,65,66,71,83,97
CLK_XDP_ITP_P 7
CLK_XDP_ITP_N 7
A A
5
4
3
2
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
XDP
XDP
XDP
LZ57
LZ57
LZ57
Taipei Hsien 221, Taiw an, R.O.C.
11 102
11 102
11 102
1
of
of
-1
-1
-1
5
D D
C C
4
3
2
1
(Blanking)
B B
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
LZ57
LZ57
LZ57
12 102
12 102
12 102
of
of
of
1
-1
-1
-1
5
D D
C C
4
3
2
1
(Blanking)
B B
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
LZ57
LZ57
LZ57
13 102
13 102
13 102
of
of
of
1
-1
-1
-1
5
SSID = MEMORY
DDR_VREF_S3
R1405
R1405
Do Not Stuff
Do Not Stuff
D D
C C
B B
A A
1 2
12
DDR_VREF_S3
1 2
12
0D75V_S0
M_VREF_CA_ DIMM0
12
C1423
C1423
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R1404
R1404
Do Not Stuff
Do Not Stuff
M_VREF_D Q_DIMM0
12
C1411
C1411
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C1419
C1419
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C1424
C1424
C1425
C1425
Do Not Stuff
Do Not Stuff
12
C1412
C1412
C1413
C1413
Do Not Stuff
Do Not Stuff
Place these caps
close to VTT1 and
VTT2.
12
12
C1421
C1421
C1420
C1420
Do Not Stuff
Do Not Stuff
5
M_A_A[15: 0] 6
M_A_BS26
M_A_BS06
M_A_BS16
M_A_DQ[63:0]6
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C1422
C1422
C1418
C1418
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Do Not Stuff
Do Not Stuff
M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6
M_A_DIM0_O DT06
M_A_DIM0_O DT16
M_VREF_CA_ DIMM07
M_VREF_D Q_DIMM07,37
DDR3_DRAMRST#15,37
0D75V_S0
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
4
H =4mm
4
DM2
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-108-GP
DDR3-204P-108-GP
2nd = 62.10024.E01
2nd = 62.10024.E01
NP1
NP2
RAS#
WE#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0
CK0#
CK1
CK1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
SDA
SCL
EVENT#
VDDSPD
SA0
SA1
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
62.10017.X41
62.10017.X41
3
NP1
NP2
110
113
115
114
121
73
74
101
103
102
104
11
28
46
63
136
153
170
187
200
202
198
199
SA0_DIM0
197
SA1_DIM0
201
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206
1D5V_S3
Main(62.10017.X41)
Main(62.10017.X41)
M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6
M_A_DIM0_CS #0 6
M_A_DIM0_CS #1 6
M_A_DIM0_CK E0 6
M_A_DIM0_CK E1 6
M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6
M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6
PCH_SMBDATA 15, 20,65,66
PCH_SMBCLK 15, 20,65,66
TS#_DIMM0_1 15
3
12
12
C1402
C1402
C1401
C1401
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D5V_S3
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
Layout Note:
Place these Caps near
SO-DIMMA.
3D3V_S0
Do Not Stuff
Do Not Stuff
12
TC1401
TC1401
DY
DY
12
C1414
C1414
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
SA0_DIM0
SA1_DIM0
10KR2J-3-GP
10KR2J-3-GP
SODIMM A DECOUPLING
12
12
C1403
C1403
C1404
C1404
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C1416
C1416
C1415
C1415
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
2
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
12
12
R1401
R1401
R1402
R1402
10KR2J-3-GP
10KR2J-3-GP
Thermal EVENT
TS#_DIMM0_1
12
12
12
12
C1406
C1406
C1405
C1405
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1417
C1417
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
BOM
BOM
BOM
Title
Title
Title
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
R1403
R1403
1 2
10KR2J-3-GP
10KR2J-3-GP
12
12
C1408
C1408
C1407
C1407
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
LZ57
LZ57
LZ57
3D3V_S0
12
C1409
C1409
DY
DY
Do Not Stuff
Do Not Stuff
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
C1410
C1410
Do Not Stuff
Do Not Stuff
1
14 102
14 102
14 102
of
of
of
-1
-1
-1
5
SSID = MEMORY
M_B_A[15 :0] 6
D D
M_B_BS26
M_B_BS06
M_B_BS16
C1522
C1522
C1517
C1517
12
M_B_DQ[63:0]6
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C1520
C1520
C1521
C1521
Do Not Stuff
Do Not Stuff
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_B_DQS#[7:0] 6
M_B_DQS[7:0] 6
M_B_DIM0_ ODT06
M_B_DIM0_ ODT16
M_VREF_CA_ DIMM17
M_VREF_D Q_DIMM17
DDR3_DRAMRST#14,37
0D75V_S0
DDR_VREF_S3
R1504
R1504
Do Not Stuff
Do Not Stuff
1 2
M_VREF_CA_ DIMM1
12
C1523
C1523
C C
B B
A A
DDR_VREF_S3
0D75V_S0
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R1503
R1503
Do Not Stuff
Do Not Stuff
1 2
M_VREF_D Q_DIMM1
12
C1515
C1515
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
DY
DY
12
C1524
C1524
DY
DY
12
C1516
C1516
DY
DY
Place these caps
close to VTT1 and
VTT2.
12
C1518
C1518
Do Not Stuff
Do Not Stuff
5
12
Do Not Stuff
Do Not Stuff
12
Do Not Stuff
Do Not Stuff
C1519
C1519
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ1 0
M_B_DQ1 1
M_B_DQ1 2
M_B_DQ1 3
M_B_DQ1 4
M_B_DQ1 5
M_B_DQ1 6
M_B_DQ1 7
M_B_DQ1 8
M_B_DQ1 9
M_B_DQ2 0
M_B_DQ2 1
M_B_DQ2 2
M_B_DQ2 3
M_B_DQ2 4
M_B_DQ2 5
M_B_DQ2 6
M_B_DQ2 7
M_B_DQ2 8
M_B_DQ2 9
M_B_DQ3 0
M_B_DQ3 1
M_B_DQ3 2
M_B_DQ3 3
M_B_DQ3 4
M_B_DQ3 5
M_B_DQ3 6
M_B_DQ3 7
M_B_DQ3 8
M_B_DQ3 9
M_B_DQ4 0
M_B_DQ4 1
M_B_DQ4 2
M_B_DQ4 3
M_B_DQ4 4
M_B_DQ4 5
M_B_DQ4 6
M_B_DQ4 7
M_B_DQ4 8
M_B_DQ4 9
M_B_DQ5 0
M_B_DQ5 1
M_B_DQ5 2
M_B_DQ5 3
M_B_DQ5 4
M_B_DQ5 5
M_B_DQ5 6
M_B_DQ5 7
M_B_DQ5 8
M_B_DQ5 9
M_B_DQ6 0
M_B_DQ6 1
M_B_DQ6 2
M_B_DQ6 3
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
4
H = 8mm
4
DM1
DM1
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
109
108
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
10
27
45
62
135
152
169
186
12
29
47
64
137
154
171
188
116
120
126
1
30
203
204
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
VREF_CA
VREF_DQ
RESET#
VTT1
VTT2
DDR3-204P-109-GP
DDR3-204P-109-GP
EVENT#
VDDSPD
NC#/TEST
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
RAS#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
NC#1
NC#2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
3
NP1
NP1
NP2
NP2
110
113
WE#
115
114
121
73
74
101
CK0
103
102
CK1
104
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
200
SDA
202
SCL
198
199
SA0_DIM1
197
SA0
SA1_DIM1
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
1D5V_S3
M_B_RAS# 6
M_B_WE# 6
M_B_CAS# 6
M_B_DIM0_ CS#0 6
M_B_DIM0_ CS#1 6
M_B_DIM0_CKE0 6
M_B_DIM0_CKE1 6
M_B_DIM0_CLK_DDR0 6
M_B_DIM0_CLK_DDR#0 6
M_B_DIM0_CLK_DDR1 6
M_B_DIM0_CLK_DDR#1 6
PCH_SMBDATA 14,20,65,66
PCH_SMBCLK 14,20,65,66
TS#_DIMM0_1 14
12
C1501
C1501
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Layout Note:
Place these Caps near
SO-DIMMB.
PART NUMBER
62.10017.Q31
Height TYPE
9.2mm STANDARD
62.10017.N11 9.2mm REVERSED
62.10017.X51
62.10017.X51
3
12
DY
DY
C1502
C1502
Do Not Stuff
Do Not Stuff
1D5V_S3
2
3D3V_S0
SODIMM B DECOUPLING
12
12
2
1
3D3V_S0
12
R1501
R1501
10KR2J-3-GP
10KR2J-3-GP
SA1_DIM1
SA0_DIM1
12
R1502
R1502
10KR2J-3-GP
10KR2J-3-GP
12
12
C1503
C1503
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
12
C1511
C1511
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C1505
C1505
C1506
C1504
C1504
C1512
C1512
C1506
Do Not Stuff
Do Not Stuff
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
C1514
C1514
C1513
C1513
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
BOM
BOM
BOM
Title
Title
Title
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
12
12
C1507
C1507
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
12
12
C1508
C1508
C1509
C1509
C1510
C1510
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
21F, 88, Sec.1 , Hsin Tai Wu Rd. , Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
LZ57
LZ57
LZ57
1
15 102
15 102
15 102
of
of
of
-1
-1
-1
5
D D
4
3
2
1
C C
B B
A A
5
(Blanking)
4
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
3
Date: Sheet
2
Taipei Hsien 221, Taiwan, R.O.C.
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
LZ57
LZ57
LZ57
16 102
16 102
16 102
of
of
of
1
-1
-1
-1
5
D D
3D3V_S0
RN1701
RN1701
SRN2K2J-1-GP
SRN2K2J-1-GP
RN1702
RN1702
SRN100KJ-6-GP
SRN100KJ-6-GP
4
4
L_CTRL_DATA
L_CTRL_CLK
L_BKLT_EN
LVDS_VDD_EN
L_DDC_DATA(PAGE17):
This signal is on the LVDS interface.
This signal needs to be left NC if eDP is
used for the local flat panel display
1
2 3
1
2 3
Place near PCH
C C
Impedance:90 ohm
Close to PCH side
CRT_BLUE
CRT_GREEN
B B
CRT_RED
678
RN1705
RN1705
SRN150F-1-GP
SRN150F-1-GP
123
4 5
4
12
R1701
R1701
2K37R2F-GP
2K37R2F-GP
3
4 OF 10
PCH1D
PCH1D
AM47
AM49
AF37
AF36
AE48
AE47
AK39
AK40
AN48
AK47
AJ48
AN47
AK49
AJ47
AF40
AF39
AH45
AH47
AF49
AF45
AH43
AH49
AF47
AF43
J47
M45
P45
T40
K47
T45
P39
N48
P49
T49
T39
M40
M47
M49
T43
T42
L_BKLTEN
L_VDD_EN
L_BKLTCTL
L_DDC_CLK
L_DDC_DATA
L_CTRL_CLK
L_CTRL_DATA
LVD_IBG
LVD_VBG
LVD_VREFH
LVD_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3
LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3
LVDSB_CLK#
LVDSB_CLK
LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3
LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3
CRT_BLUE
CRT_GREEN
CRT_RED
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_VSYNC
DAC_IREF
CRT_IRTN
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
LVDS
LVDS
CRT
CRT
L_BKLT_EN27
LVDS_VDD_EN49
L_BKLT_CTRL49
LVDS_DDC_CLK_R49
LVDS_DDC_DATA_R49
LVDSA_CLK#49
LVDSA_CLK49
LVDSA_DATA0#49
LVDSA_DATA1#49
LVDSA_DATA2#49
LVDSA_DATA049
LVDSA_DATA149
LVDSA_DATA249
CRT_BLUE50
CRT_GREEN50
CRT_RED50
CRT_DDC_CLK50
CRT_DDC_DATA50
CRT_HSYNC50
CRT_VSYNC50
TP1701Do Not Stuff TP1701Do Not Stuff
R1702
R1702
1KR2D-1-GP
1KR2D-1-GP
LVDS_DDC_CLK_R
LVDS_DDC_DATA_R
L_CTRL_CLK
L_CTRL_DATA
LVDS_IBG
LVDS_VBG
1
DAC_IREF_R
12
4 OF 10
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
AP43
AP45
AM42
AM40
AP39
AP40
P38
M39
AT49
AT47
AT40
AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49
P46
P42
AP47
AP49
AT38
AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49
M43
M36
AT45
AT43
BH41
BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42
2
DDBP_DATA2#
DDBP_DATA2
DDBP_DATA1#
DDBP_DATA1
DDBP_DATA0#
DDBP_DATA0
DDBP_CLK#
DDBP_CLK
Impedance:90 ohm
3D3V_S0
4
RN1706
RN1706
DDI Port B Detect:(SDVO_CTRL_ DATA)
SRN2K2J-1-GP
SRN2K2J-1-GP
1: Port B detected
1
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
2 3
0: Port B not detected
C1701 SCD1U10V2KX-5GPC1701 SCD1U10V2KX-5GP
C1702 SCD1U10V2KX-5GPC1702 SCD1U10V2KX-5GP
C1703 SCD1U10V2KX-5GPC1703 SCD1U10V2KX-5GP
C1704 SCD1U10V2KX-5GPC1704 SCD1U10V2KX-5GP
C1705 SCD1U10V2KX-5GPC1705 SCD1U10V2KX-5GP
C1706 SCD1U10V2KX-5GPC1706 SCD1U10V2KX-5GP
C1707 SCD1U10V2KX-5GPC1707 SCD1U10V2KX-5GP
C1708 SCD1U10V2KX-5GPC1708 SCD1U10V2KX-5GP
Close to Connector side
1
PCH_HDMI_CLK 51
PCH_HDMI_DATA 51
HDMI_PCH_DET 51
HDMI_DATA2_R# 51
HDMI_DATA2_R 51
HDMI_DATA1_R# 51
HDMI_DATA1_R 51
HDMI_DATA0_R# 51
HDMI_DATA0_R 51
HDMI_CLK_R# 51
HDMI_CLK_R 51
Impedance:100 ohm
A A
5
4
3
2
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
LZ57
LZ57
LZ57
17 102
17 102
17 102
1
of
of
of
-1
-1
-1
5
SSID = PCH
RN1801
D D
INT_PIRQA#
INT_PIRQE#
INT_PIRQC#
3D3V_S0
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
C C
GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19
0 0 LPC
0 1 Reserved
B B
A A
RN1801
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
R1801 Do Not Stuff
R1801 Do Not Stuff
12
DY
DY
override/Top-Block
Swap Override enabled
High = Default
R1802
R1802
1 2
DY
DY
Do Not Stuff
Do Not Stuff
R1803
R1803
1 2
DY
DY
Do Not Stuff
Do Not Stuff
BOOT BIOS Strap
11
3D3V_S0
PLT_RST#,27,31,35,36,65,66,71,83,97
12
R1816
R1816
DY
DY
12
DY
20100629
DY
Do Not Stuff
Do Not Stuff
5
10
INT_PIRQH#
9
INT_PIRQG#
8
INT_PIRQD#INT_PIRQB#
7
INT_PIRQF#
PCI_GNT3#
BBS_BIT1
BBS_BIT0
Reserved 01
SPI(Default)
U1801
U1801
5
VCC
4
Y
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
R1807
R1807
1 2
C1801
C1801
Do Not Stuff
Do Not Stuff
GND
1
B
2
A
3
0R2J-2-GP
0R2J-2-GP
3D3V_S0
BBS_BIT0 21
CLK_PCI_LPC65,71
CLK_PCI_KBC27
PCI_PLTRST#
USB30_SMI#35
12
DY
DY
DGPU_HOLD_RST#83
DGPU_PWR _EN#93
DCR_EN#49
SC_1025'10
C1802
C1802
Do Not Stuff
Do Not Stuff
4
DGPU_HOLD_RST#
DGPU_PWR _EN#
SRN10KJ-5-GP
SRN10KJ-5-GP
3D3V_S0
DY
DY
TP1805Do Not Stuff TP1805Do Not Stuff
1
DGPU_PWR _EN#
DGPU_PWM_SELECT#
TP1804Do Not Stuff TP1804Do Not Stuff
1
SC_1026'10
dGPU_LED78
SATA_ODD_DA#27,56
USB30_SMI#
Do Not Stuff
Do Not Stuff
R1804 22R2J-2-G PR1804 22R2J-2-G P
1 2
R1805 22R2J-2-G PR1805 22R2J-2-G P
1 2
R1806 22R2J-2-G PR1806 22R2J-2-G P
1 2
EC1802
EC1802
EC1801
EC1801
1 2
1 2
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
KBC CLK EMI
4
RN1803
RN1803
1
2 3
R1814
R1814
Do Not Stuff
Do Not Stuff
1 2
TP1801Do Not Stuff TP 1801Do Not Stuff
Do Not Stuff
Do Not Stuff
R1818
R1818
1 2
R1813
R1813
1 2
1 2
R1815Do Not Stuff R1815Do Not Stuff
1 2
R1817
R1817
TP1802Do Not Stuff TP 1802Do Not Stuff
4
1
0R2J-2-GP
0R2J-2-GP
INT_PIRQH#
1
3D3V_S5
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
DGPU_SELECT#
BBS_BIT1
PCI_GNT3#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
PCI_PME#
PCI_PLTRST#
CLK_PCI_LPC_R
CLK_PCI_FB_R
CLK_PCI_KBC_R
BG26
BJ26
BH25
BJ16
BG16
AH38
AH37
AK43
AK45
AH12
AM4
AM5
AB46
AB45
AY16
BG46
BE28
BC30
BE32
BJ32
BC28
BE30
BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28
AW30
USB_OC#2_3
USB_OC#4_5
PCH1E
PCH1E
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
C18
TP10
N30
TP11
H3
TP12
TP13
TP14
TP15
Y13
TP16
K24
TP17
L24
TP18
TP19
TP20
B21
TP21
M20
TP22
TP23
TP24
TP25
TP26
TP27
TP28
TP29
TP30
TP31
TP32
TP33
TP34
TP35
TP36
TP37
TP38
TP39
TP40
K40
PIRQA#
K38
PIRQB#
H38
PIRQC#
G38
PIRQD#
C46
REQ1#/GPIO50
C44
REQ2#/GPIO52
E40
REQ3#/GPIO54
D47
GNT1#/GPIO51
E42
GNT2#/GPIO53
F46
GNT3#/GPIO55
G42
PIRQE#/GPIO2
G40
PIRQF#/GPIO3
C42
PIRQG#/GPIO4
D44
PIRQH#/GPIO5
K10
PME#
C6
PLTRST#
H49
CLKOUT_PCI0
H43
CLKOUT_PCI1
J48
CLKOUT_PCI2
K42
CLKOUT_PCI3
H40
CLKOUT_PCI4
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
Cougar
Cougar
Point
Point
RN1802
RN1802
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
3
RSVD
RSVD
PCI
PCI
NVRAM
NVRAM
USB
USB
10
USB_OC#12_13
9
USB_OC#8_9USB_OC#6_7
8
PCH_GPIO14USB_OC#10_11
7
USB_OC#0_1
5 OF 10
5 OF 10
RSVD#AY7
RSVD#AV7
RSVD#AU3
RSVD#BG4
RSVD#AT10
RSVD#BC8
RSVD#AU2
RSVD#AT4
RSVD#AT3
RSVD#AT1
RSVD#AY3
RSVD#AT5
RSVD#AV3
RSVD#AV1
RSVD#BB1
RSVD#BA3
RSVD#BB5
RSVD#BB3
RSVD#BB7
RSVD#BE8
RSVD#BD4
RSVD#BF6
RSVD#AV5
DF_TVS
RSVD#AV10
RSVD#AT8
RSVD#AY5
RSVD#BA2
RSVD#AT12
RSVD#BF3
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
2
20100725 Annie modify
AY7
AV7
AU3
BG4
AT10
BC8
AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6
NV_ALE
AV5
NV_CLE
AY1
NV_RCOMP
AV10
AT8
AY5
BA2
AT12
USB Ext. port 1 (HS)
BF3
External debug port use on Huron river platform
C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29
N28
M28
L30
K30
G30
E30
C30
A30
L32
K32
G32
E32
C32
A32
USB_RBIAS
C33
B33
USB_OC#0_1
A14
USB_OC#2_3
K20
USB_OC#4_5
B17
USB_OC#6_7
C16
USB_OC#8_9
L16
USB_OC#10_11
A16
USB_OC#12_13
D14
PCH_GPIO14
C14
OC[3:0]# for Device 29 (Ports 0-7)
OC[7:4]# for Device 26 (Ports 8-13)
3D3V_S5
1
R1811
R1811
22D6R2F-L1-GP
22D6R2F-L1-GP
2
TP1803 Do Not StuffTP1803 Do Not Stuff
USB_PN1 62
USB_PP1 62
USB_PN2 64
USB_PP2 64
USB_PN3 63
USB_PP3 63
USB_PN4 66
USB_PP4 66
USB_PN5 82
USB_PP5 82
USB_PN8 57
USB_PP8 57
USB_PN9 82
USB_PP9 82
USB_PN10 82
USB_PP10 82
USB_PN11 65
USB_PP11 65
USB_PN12 49
USB_PP12 49
1 2
SW program ing USB_OC#12_13 for US B 9
CRB : 2.2K
CEKLT: 1K
NV_CLE
1 2
DMI & FDI Termination Voltage
Set to Vss when LOW
NV_CLE
Set to Vcc when HIGH
Danbury Technology:
Disabled when Low.
Enable when High.
USB Table
Pair
X
0
USB Ext. port 1 (Left Side)
1
Fingerprint
2
BLUETOOTH
3
Mini Card2 (WWAN)
4
CARD READER
5
X
6
X
7
E-SATA /USB Ext. port 4
8
USB Ext. port 2(CardReader BD)
9
USB Ext. port 3(RJ45_BD)
10
Mini Card1 (WLAN)
11
CAMERA
12
X
13
USB_OC#0_1 62
USB_OC#8_9 62CLK_PCI_FB20
USB_OC#10_11 61
USB_OC#12_13 61
R1820
R1820
0R2J-2-GP
0R2J-2-GP
LZ57_6L
LZ57_6L
1 2
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
LZ57
LZ57
LZ57
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
1
+V_NVRAM_VCCQ
12
R1808
R1808
2K2R2J-2-GP
2K2R2J-2-GP
R1809
R1809
1KR2J-1-GP
1KR2J-1-GP
NV_ALE
H_SNB_IVB# 5
+V_NVRAM_VCCQ
12
DY
DY
R1810
R1810
Do Not Stuff
Do Not Stuff
Device
-1_1209'10
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
18 102
18 102
18 102
of
of
of
1
-1
-1
-1
5
SSID = PCH
Signal Routing Guideline:
D D
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.
1D05V_VTT
R1901 49D9R2F- GPR1901 49D9R2F-GP
R1902 750R2F-G PR1902 750R2F-G P
SYS_PWROK
R1926
R1926
1 2
DY
DY
Do Not Stuff
Do Not Stuff
1 2
C C
100KR2J-1-GP
100KR2J-1-GP
PM_DRAM_PWRGD5,37
S0_PWR_GOOD after PM_SLP_S3# delay 200 ms
SUS_PWR_ACK20,27
B B
A A
PWROK
R1904
R1904
XDP_DBRESET#5,11
3D3V_S0
SYS_PWROK11,36,37
S0_PWR_GOOD27,36
RUNPWROK36,37,45,46,47
PM_PWRBTN#11,27,97
AC_PRESENT27
BATLOW#20
3D3V_S5
8
7
6
DY
DY
20100729
5
DMI_RXN[3:0]4
DMI_RXP[3:0]4
DMI_TXN[3:0]4
DMI_TXP[3:0]4
DMI_RXN04
DMI_RXN14
DMI_RXN24
DMI_RXN34
DMI_RXP04
DMI_RXP14
DMI_RXP24
DMI_RXP34
DMI_TXN04
DMI_TXN14
DMI_TXN24
DMI_TXN34
DMI_TXP04
DMI_TXP14
DMI_TXP24
DMI_TXP34
1 2
1 2
R1924
R1924
1 2
0R2J-2-GP
0R2J-2-GP
RN1901
RN1901
PCIE_CLK_LAN_RQ1#
1
2
3
45
SRN10KJ-6-GP
SRN10KJ-6-GP
R1921 10KR2J-3-GPR1921 10KR2J-3-GP
12
R1922 Do Not Stuff
R1922 Do Not Stuff
12
R1920 10KR2J-3-GPR1920 10KR2J-3-GP
12
PWRBTN#
This signal has an internal pull-up resistor
R1908
R1908
12
10KR2J-3-GP
10KR2J-3-GP
DMI_COMP_R
RBIAS_CPY
R1903
R1903
12
Do Not Stuff
Do Not Stuff
DY
DY
R1925 Do Not Stuff
R1925 Do Not Stuff
1 2
R1905
R1905
1 2
10KR2J-3-GP
10KR2J-3-GP
R1923
R1923
1 2
DY
DY
PWROK
R1906 0R2J-2-GPR1906 0R2J-2-GP
1 2
R1907
R1907
1 2
Do Not Stuff
Do Not Stuff
DY
DY
PM_RI#
AC_PRESENT
PM_RI#
PCIE_WAKE#
PM_PWRBTN# 3V_5V_POK_#
PM_SLP_LAN#
PM_RSMRST#
SUSACK#SUS_PWR_ACK
SYS_RESET#
Do Not Stuff
Do Not Stuff
MEPWROK
PM_RSMRST#
PCIE_CLK_LAN_RQ1# 20,31
PCIE_WAKE#
CRB : 1K
CEKLT: 10K
4
PCH1C
PCH1C
AW24
AW20
BC24
BE20
BG18
BG20
BE24
BC20
BJ18
BJ20
BB18
AV18
AY24
AY20
AY18
AU18
BJ24
BG25
BH21
4
Cougar
Cougar
DMI0RXN
DMI1RXN
Point
Point
DMI2RXN
DMI3RXN
DMI0RXP
DMI1RXP
DMI2RXP
DMI3RXP
DMI0TXN
DMI1TXN
DMI2TXN
DMI3TXN
DMI0TXP
DMI1TXP
DMI2TXP
DMI3TXP
DMI_ZCOMP
DMI_IRCOMP
DMI2RBIAS
C12
SUSACK#
K3
SYS_RESET#
P12
SYS_PWROK
L22
PWROK
L10
APWROK
B13
DRAMPWROK
C21
RSMRST#
K16
SUSWARN#/SUSPWRDNACK/GPIO30
E20
PWRBTN#
H20
ACPRESENT/GPIO31
E10
BATLOW#/GPIO72
A10
RI#
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
3 OF 10
3 OF 10
BJ14
FDI_RXN0
AY14
FDI_RXN1
BE14
FDI_RXN2
BH13
FDI_RXN3
BC12
FDI_RXN4
BJ12
FDI_RXN5
BG10
FDI_RXN6
BG9
FDI_RXN7
BG14
FDI_RXP0
BB14
FDI_RXP1
BF14
FDI_RXP2
BG13
FDI_RXP3
BE12
FDI_RXP4
BG12
FDI_RXP5
BJ10
FDI_RXP6
DMI
FDI
DMI
FDI
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
System Power Management
System Power Management
SLP_LAN#/GPIO29
3D3V_AUX_S5
R1916
R1916
10KR2J-3-GP
10KR2J-3-GP
1 2
BH9
FDI_RXP7
AW16
FDI_INT
AV12
FDI_FSYNC0
BC10
FDI_FSYNC1
AV14
FDI_LSYNC0
BB10
FDI_LSYNC1
A18
DSWVRMEN
E22
DPWROK
B9
WAKE#
N3
G8
N14
D10
H4
SLP_S4#
F4
SLP_S3#
G10
SLP_A#
G16
SLP_SUS#
AP14
PMSYNCH
K14
R1909
R1909
12
100KR2J-1-GP
100KR2J-1-GP
Q1901
Q1901
6
2N7002KDW-G P
2N7002KDW-G P
84.2N702.A3F
84.2N702.A3F
2nd = 84.DM601.03F
2nd = 84.DM601.03F
DSWODVREN
PCH_DPWROK
PM_SUS_STAT#
SUS_CLK
PM_SLP_S5#
SLP_S4#_R
SLP_S3#_R
PM_SLP_A#
PM_SLP_SUS#
H_PM_SYNC
PM_SLP_LAN#
PM_RSMRST#
2345
1
3
FDI_TXN[7:0] 4
FDI_TXP[7:0] 4
FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4
FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4
FDI_IN T 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4
R1912
R1912
1 2
1KR2J-1-GP
1KR2J-1-GP
R1910 0R2J-2-GPR1910 0R2J-2-GP
1 2
R1911 Do Not Stuff
R1911 Do Not Stuff
1 2
DY
DY
PCIE_WAKE# 31,35,65,66
PM_CLKRUN# 27
TP1901 Do Not S tuffTP1901 Do N o t S tuff
1
1
TP1902 Do Not S tuffTP1902 Do N o t S tuff
1
TP1903Do Not StuffTP1903Do Not Stuff
1
TP1904Do Not StuffTP1904Do Not Stuff
H_PM_SYNC 5
1
TP1905Do Not StuffTP1905Do Not Stuff
2
For platforms not supporting Deep S4/S5
1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)
2.DPWROK and RSMRST# will rise at the same time (connected o n bo ard)
3.SLP_SUS# and SUSACK# are left as ‘no connect’
4.SUSWARN# used as SUSPWRDNACK/GPIO30
R1913
R1913
1 2
Do Not Stuff
Do Not Stuff
R1914
R1914
1 2
Do Not Stuff
Do Not Stuff
R1915
R1915
1 2
Do Not Stuff
Do Not Stuff
RSMRST#_KBC 27
3V_5V_POK 41
PM_RSMRST#
RTC_AUX_S5
PCH_SUSCLK_KBC 27
PM_SLP_S4# 27,46
PM_SLP_S3# 27,36,37,47,92
2
DSWODVREN - On Die DSW VR Enable
HIGH Enabled (DEFAULT)
LOW Disabled
DSWODVREN
PM_CLKRUN#
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
LZ57
LZ57
LZ57
1
R1917 330KR2J-L1- GPR1917 330KR2J-L1- GP
1 2
R1918 Do Not Stuff
R1918 Do Not Stuff
1 2
DY
DY
R1919 8K2R2J-3- GPR1919 8K2R2J-3-GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
19 102
19 102
19 102
of
of
of
1
RTC_AUX_S5
3D3V_S0
-1
-1
-1
5
SSID = PCH
20100705_Standard
D D
PCIE_RXN265
PCIE_RXP265
PCIE_TXN265
PCIE_TXP265
PCIE_RXN431
PCIE_RXP431
PCIE_TXN431
PCIE_TXP431
PCIE_RXN535
PCIE_RXP535
PCIE_TXN535
PCIE_TXP535
C C
20100705_Standard
C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP
1 2
C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP
1 2
C2005 SCD1U10V2KX-5GPC2005 SCD1U10V2KX-5GP
1 2
C2006 SCD1U10V2KX-5GPC2006 SCD1U10V2KX-5GP
1 2
C2009 SCD1U10V2KX-5GP
C2009 SCD1U10V2KX-5GP
1 2
C2010 SCD1U10V2KX-5GP
C2010 SCD1U10V2KX-5GP
1 2
USB3.0
USB3.0
USB3.0
USB3.0
::$1&/.
PCIE_CLK_LAN_RQ1#19,31
R2016
R2016
1 2
10KR2J-3-GP
10KR2J-3-GP
CLK_PCIE_WLAN#65
CLK_PCIE_WLAN65
CLK_PCIE_LAN#31
CLK_PCIE_LAN31
CLK_PCIE_USB3#35
CLK_PCIE_USB335
CLK_PCIE_WLAN_REQ#21,65
USB3_PEGB_CLKREQ#35
PCIE_CLK_RQ2#
5
PCIE_CLK_XDP_N11
PCIE_CLK_XDP_P11
:/$1&/.
/$1&/.
B B
86%&/.
3D3V_S0
PCIECLKRQ1# and PCIECLKRQ 2#
support S0 power only
A A
S-HR_20100614 V1.1
CLK_PCIE_WWAN_REQ#
USB3_PEGB_CLKREQ#
PEG_B_CLKRQ#22
PCIE_TXN2_C
PCIE_TXP2_C
PCIE_TXN4_C
PCIE_TXP4_C
PCIE_TXN5_C
PCIE_TXP5_C
PCIE_CLK_RQ2#
PCIE_CLK_REQ5#
PCIE_CLK_REQ6#
CLK_PCIE_NEW_REQ#
4
PCH1B
PCH1B
BG34
PERN1
BJ34
PERP1
AV32
PETN1
AU32
PETP1
BE34
PERN2
BF34
PERP2
BB32
PETN2
AY32
PETP2
BG36
PERN3
BJ36
PERP3
AV34
PETN3
AU34
PETP3
BF36
PERN4
BE36
PERP4
AY34
PETN4
BB34
PETP4
BG37
PERN5
BH37
PERP5
AY36
PETN5
BB36
PETP5
BJ38
PERN6
BG38
PERP6
AU36
PETN6
AV36
PETP6
BG40
PERN7
BJ40
PERP7
AY40
PETN7
BB40
PETP7
BE38
PERN8
BC38
PERP8
AW38
PETN8
AY38
PETP8
Y40
CLKOUT_PCIE0N
Y39
CLKOUT_PCIE0P
J2
PCIECLKRQ0#/GPIO73
AB49
CLKOUT_PCIE1N
AB47
CLKOUT_PCIE1P
M1
PCIECLKRQ1#/GPIO18
AA48
CLKOUT_PCIE2N
AA47
CLKOUT_PCIE2P
V10
PCIECLKRQ2#/GPIO20
Y37
CLKOUT_PCIE3N
Y36
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
Y43
CLKOUT_PCIE4N
Y45
CLKOUT_PCIE4P
L12
PCIECLKRQ4#/GPIO26
V45
CLKOUT_PCIE5N
V46
CLKOUT_PCIE5P
L14
PCIECLKRQ5#/GPIO44
AB42
CLKOUT_PEG_B_N
AB40
CLKOUT_PEG_B_P
E6
PEG_B_CLKRQ#/GPIO56
V40
CLKOUT_PCIE6N
V42
CLKOUT_PCIE6P
T13
PCIECLKRQ6#/GPIO45
V38
CLKOUT_PCIE7N
V37
CLKOUT_PCIE7P
K12
PCIECLKRQ7#/GPIO46
AK14
CLKOUT_ITPXDP_N
AK13
CLKOUT_ITPXDP_P
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
4
Cougar
Cougar
Point
Point
W-WAN
WLAN
Card Reader
LAN
USB3.0
PCI-E*
PCI-E*
Intel GBE LAN
Dock
NEW CARD
3
2 OF 10
2 OF 10
EC_SWI#
SMBALERT#/GPIO11
SMBDATA
SML0ALERT#/GPIO60
Link
Link
SML0CLK
SML0DATA
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_DATA1
CL_RST1#
SMBUSController
SMBUSController
SML1ALERT#/PCHHOT#/GPIO74
SMBCLK
CL_CLK1
E12
SMB_CLK
H14
SMB_DATA
C9
DRAMRST_CNTRL_PCH
A12
SML0_CLK
C8
SML0_DATA
G12
PCH_GPIO74
C13
SML1_CLK
E14
SML1_DATA
M16
CL_CLK
M7
CL_DATA
T11
CL_RST#
P10
1
1
1
EC_SWI# 27
SML0_CLK 11
SML0_DATA 11
SML1_CLK 27
SML1_DATA 27
TP2001 Do Not S tuffTP2001 Do N o t S tuff
TP2002 Do Not S tuffTP2002 Do N o t S tuff
TP2003 Do Not S tuffTP2003 Do N o t S tuff
DRAMRST_CNTRL_PCH 37
-1_1214'10
PEG_CLKREQ#_R
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKOUT_DP_N
CLKOUT_DP_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_GND1_N
CLKIN_GND1_P
CLKIN_SATA_N
CLKIN_SATA_P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
M10
AB37
AB38
AV22
AU22
AM12
AM13
BF18
BE18
BJ30
BG30
G24
E24
AK7
AK5
K45
H45
V47
V49
Y47
K43
F47
H47
K49
3
CLKOUT_DP_N
CLKOUT_DP_P
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_CPYCLK_N
CLK_BUF_CPYCLK_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
CLK_BUF_REF14
CLK_PCI_FB
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
JTAG_TCK
CLK_48_USB30
LAN_25M
DGPU_PRSNT#
PEG_A_CLKRQ#/GPIO47
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLOCKS
CLOCKS
CLKIN_DOT_96N
CLKIN_DOT_96P
CLKIN_PCILOOPBACK
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
FLEX CLOCKS
FLEX CLOCKS
– Prioritize 27/14/24/48/25-MHz FLEX on FLEX1 and FLEX3
– Do not configure 27/14/24/48/25-MHz FLEX clock on FLEX0
and FLEX2
if more than 2 PCI clocks + PCI loopback are routed.
R2003
R2003
1 2
Do Not Stuff
Do Not Stuff
RN2017 Do Not Stuff
RN2017 Do Not Stuff
1
2 3
RN2008 SR N10KJ-5-GPRN2008 SR N10KJ-5-GP
90D9R2F-1-GP
90D9R2F-1-GP
1 2
+VCCDIFFCLKN
R2007
R2007
1
TP2004 Do N ot StuffTP2004 D o N ot Stuff
1
TP2005 Do N ot StuffTP2005 D o N ot Stuff
1
TP2006 Do N ot StuffTP2006 D o N ot Stuff
4
DY
DY
2 3
1
CLK_PCI_FB 18
20100706
PEG_CLKREQ# 83
CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83
CLK_EXP_N 5
CLK_EXP_P 5
CLK_DP_N_R 5
CLK_DP_P_R 5
4
CLK_BUF_REF14
2
PEG_CLKREQ#_R
DY
DY
SMB_DATA
SMB_CLK
R2017
R2017
1 2
10KR2J-3-GP
10KR2J-3-GP
CLK_BUF_EXP_N
CLK_BUF_EXP_P
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P
CLK_BUF_CKSSCD_N
CLK_BUF_CKSSCD_P
20100706
2
3D3V_S5
12
R2004
R2004
10KR2J-3-GP
10KR2J-3-GP
12
R2005
R2005
Do Not Stuff
Do Not Stuff
3D3V_S0
XTAL25_IN
XTAL25_OUT
RN9407
RN9407
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
RN9408
RN9408
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
RN9406
RN9406
1
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
R2017 RN9407 RN9408 RN9406
need very close to PCH
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
SMB_CLK
SMB_DATA
SML0_DATA
SML0_CLK
SML1_CLK
SML1_DATA
20100729 follow CRB change to 1K
DRAMRST_CNTRL_PCH
SRN2K2J-1-GP
SRN2K2J-1-GP
1
4
2 3
RN2007
RN2007
2nd = 84.DM601.03F
2nd = 84.DM601.03F
84.2N702.A3F
84.2N702.A3F
2N7002KDW-G P
2N7002KDW-G P
1
6
2345
Q2001
Q2001
XTAL25_IN
1 2
DY
DY
R2008 Do Not Stuff
R2008 Do Not Stuff
R2008 and C2008 CO-LAY
R2006
R2006
1M1R2J-GP
1M1R2J-GP
UMA
UMA
UMA_DIS#
DGPU_PRSNT#
10KR2J-3-GP
10KR2J-3-GP
R2011
R2011
OPS
OPS
10KR2J-3-GP
10KR2J-3-GP
3D3V_S5
1 2
UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2002
RN2002
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
1 2
LZ57
LZ57
LZ57
1 2
3D3V_S0 3D3V_S0
12
12
R2012
R2012
R2013
R2013
10KR2J-3-GP
10KR2J-3-GP
12
12
R2010
R2010
DY
DY
Do Not Stuff
Do Not Stuff
4
4
4
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
1
4
4
2 3
1
R2009
R2009
1 2
1KR2J-1-GP
1KR2J-1-GP
PCH_SMBDATA 14,15,65,66
PCH_SMBCLK 14,15,65,66
SC12P50V2JN-3GP
SC12P50V2JN-3GP
X2001
X2001
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
82.30020.851
82.30020.851
2nd = 82.30020.791
2nd = 82.30020.791
SC12P50V2JN-3GP
SC12P50V2JN-3GP
UMA_DIS# 22
RN2001
RN2001
1
2
3
45
8
7
6
R2014
R2014
10KR2J-3-GP
10KR2J-3-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
1
3D3V_S5
RN2003
RN2003
1
SRN2K2J-1-GP
SRN2K2J-1-GP
23
RN2004
RN2004
23
SRN2K2J-1-GP
SRN2K2J-1-GP
1
RN2005
RN2005
SRN2K2J-1-GP
SRN2K2J-1-GP
4
C2008
C2008
12
C2007
C2007
12
20100706
SUS_PWR_ACK 19,27
PCH_GPIO74
PCIE_CLK_REQ5#
BATLOW# 19
20100706
CLK_PCIE_WWAN_REQ#
PCIE_CLK_REQ6#
USB3_PEGB_CLKREQ#
CLK_PCIE_NEW_REQ#
EC_SWI#
20 102
20 102
20 102
of
of
of
-1
-1
-1
5
SSID = PCH
RTC_X1
4
SC6P50V2CN-1GP
SC6P50V2CN-1GP
HDA_SDOUT
HDA_SPKR
R2103 1KR2J-1-GPR2103 1KR2J-1-GP
1 2
R2122 Do Not Stuff
R2122 Do Not Stuff
1 2
DY
DY
Low = 1.8V (Default)
High = 1.5V
5
RTC_X2
12
C2102
C2102
RN2101
RN2101
1
2 3
SRN33J-5-GP-U
SRN33J-5-GP-U
SRN33J-5-GP-U
SRN33J-5-GP-U
2 3
1
RN2102
RN2102
Flash Descriptor Security Overide
HDA_SDOUT
No Reboot Strap
HDA_SPKR
SA 0902'10
1 2
D D
C C
B B
R2101 10MR2J-L-GPR2101 10MR 2J-L-GP
X2101
X2101
1
SC6P50V2CN-1GP
SC6P50V2CN-1GP
12
C2101
C2101
2 3
X-32D768KHZ-34GPU
X-32D768KHZ-34GPU
HDA_CODEC_SYNC29
HDA_CODEC_SDOUT29
HDA_CODEC_RST#29
HDA_CODEC_BITCLK29
+3VS_+1.5VS_HDA_IO
DY
DY
R2102 Do Not Stuff
R2102 Do Not Stuff
1 2
NO REBOOT STRAP
3D3V_S0
DY
DY
R2106 Do Not Stuff
R2106 Do Not Stuff
1 2
+3VS_+1.5VS_HDA_IO
3D3V_S5
This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310
PLL ODVR VOLTAGE
HDA_SYNC
A A
HDA_SYNC
4
HDA_SDOUT
HDA_RST#
HDA_BITCLK
4
Low = Default
High = Enable
Low = Default
High = No Reboot
HDA_SYNC
RTC_AUX_S5
SRN20KJ-GP-U
SRN20KJ-GP-U
1
2 3
RN2104
RN2104
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2104
C2104
4
4
12
12
4
C2103
C2103
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
21
G2101
G2101
Do Not Stuff
Do Not Stuff
ME_UNLOCK27
TP_LED#78
20100629 SA
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TCK_BUF
INTVRMEN- Integrated SUS
1.05V VRM Enable
High - Enable internal VRs
Low - Enable extern al VRs
RTC_AUX_S5
HDA_SPKR29
HDA_SDIN029
R2107 1KR2J-1-GPR2107 1KR2J-1-GP
1 2
SPI_CLK_R27,60
SPI_CS0#_R27,60
SC_1025'2010
SPI_SI_R27,60
SPI_SO_R27,60
R2118 Do Not Stuff
R2118 Do Not Stuff
1 2
R2119 Do Not Stuff
R2119 Do Not Stuff
1 2
R2120 Do Not Stuff
R2120 Do Not Stuff
1 2
DY
DY
R2115 Do Not Stuff
R2115 Do Not Stuff
1 2
DY
DY
R2116 Do Not Stuff
R2116 Do Not Stuff
1 2
DY
DY
R2117 Do Not Stuff
R2117 Do Not Stuff
1 2
R2121
R2121
1 2
4K7R2J-2-GP
4K7R2J-2-GP
DY
DY
DY
DY
DY
DY
1M1R2J-GP
1M1R2J-GP
1 2
330KR2F-L-GP
330KR2F-L-GP
TP2101Do Not Stuff TP2101Do Not Stuff
TP2102Do Not Stuff TP2102Do Not Stuff
TP2103Do Not Stuff TP2103Do Not Stuff
TP2104Do Not Stuff TP2104Do Not Stuff
3D3V_S5
RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
R2104
R2104
SM_INTRUDER#
12
PCH_INTVRMEN
R2105
R2105
HDA_BITCLK
HDA_SYNC
HDA_RST#
HDA_SDOUT
1 2
R2111 Do Not StuffR2111 Do Not Stuff
TP2106Do Not Stuff TP2106Do Not Stuff
1
PCH_JTAG_TCK_BUF
1
PCH_JTAG_TMS
1
PCH_JTAG_TDI
1
PCH_JTAG_TDO
1
PCH_SPI_CLK
R2108
R2108
1 2
Do Not Stuff
Do Not Stuff
PCH_SPI_CS0#
R2109
R2109
1 2
Do Not Stuff
Do Not Stuff
R2110
R2110
PCH_SPI_SI
12
33R2J-2-GP
33R2J-2-GP
PCH_GPIO33
PCH_GPIO13
3
3
PCH1A
PCH1A
A20
RTCX1
C20
RTCX2
D20
RTCRST#
G22
SRTCRST#
K22
INTRUDER#
C17
INTVRMEN
N34
HDA_BCLK
L34
HDA_SYNC
T10
SPKR
K34
HDA_RST#
E34
HDA_SDIN0
G34
HDA_SDIN1
C34
HDA_SDIN2
A34
HDA_SDIN3
A36
HDA_SDO
C36
HDA_DOCK_EN#/GPIO33
N32
HDA_DOCK_RST#/GPIO13
J3
JTAG_TCK
H7
JTAG_TMS
K5
JTAG_TDI
H1
JTAG_TDO
T3
SPI_CLK
Y14
SPI_CS0#
T1
SPI_CS1#
V4
SPI_MOSI
U3
SPI_MISO
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
Cougar
Cougar
Point
Point
JTAG
JTAG
CLK_PCIE_WLAN_REQ#20,65
RTCIHDA
RTCIHDA
SPI
SPI
1 OF 10
1 OF 10
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
LPC
LPC
FWH4/LFRAME#
LDRQ0#
LDRQ1#/GPIO23
SERIRQ
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA 6G
SATA 6G
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATA3RCOMPO
SATA3COMPI
SATA3RBIAS
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA_LED#
INT_S ERIRQ
C38
A38
B37
C37
D36
E36
K36
V5
AM3
AM1
AP7
AP5
AM10
AM8
AP11
AP10
AD7
AD5
AH5
AH4
AB8
AB10
AF3
AF1
Y7
Y5
AD3
AD1
Y3
Y1
AB3
AB1
Y11
Y10
AB12
AB13
AH1
P3
V14
P1
2
2
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
SATA_TXN4_C
SATA_TXP4_C
SATA_TXN5_C
SATA_TXP5_C
SATA_COMP
SATA3_COMP
RBIAS_SATA3
BBS_BIT0
RN2207
RN2207
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
LPC_AD[0..3]
LA57
LA57
LA57
LA57
8
7
6
1
LPC_AD[0..3] 27,65,71
LPC_FRAME# 27,65,71
APS_LED 78
INT_S ERIRQ 27
SATA_RXN0_C 56
C2105 S CD01U16V2KX-3GPC2105 SCD01U16V2KX-3GP
1 2
C2106
C2106
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C2111 S CD01U16V2KX-3GP
C2111 S CD01U16V2KX-3GP
1 2
C2112
C2112
1 2
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SATA_RXP0_C 56
SATA_TXN0 56
SATA_TXP0 56
SATA_RXN1_C 66
SATA_RXP1_C 66
SATA_TXN1 66
SATA_TXP1 66
Move Cap close to Connector.
SATA_RXN4_C 56
C2109 S CD01U16V2KX-3GPC2109 SCD01U16V2KX-3GP
1 2
C2110 S CD01U16V2KX-3GPC2110 SCD01U16V2KX-3GP
1 2
C2107 S CD01U16V2KX-3GPC2107 SCD01U16V2KX-3GP
1 2
C2108 S CD01U16V2KX-3GPC2108 SCD01U16V2KX-3GP
1 2
R2112 37D4R2F- GPR2112 37D4R2F-GP
1 2
R2113 49D9R2F- GPR2113 49D9R2F-GP
1 2
R2114 750R2F-G PR2114 750R2F-GP
1 2
SATA_LED# 68,78
SATA_DET#0 22
BBS_BIT0 18
3D3V_S0
BOM
BOM
BOM
Title
Title
Title
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
SATA_RXP4_C 56
SATA_TXN4 56
SATA_TXP4 56
SATA_RXN5_C 57
SATA_RXP5_C 57
SATA_TXN5 57
SATA_TXP5 57
1D05V_VTT
1D05V_VTT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
LZ57
LZ57
LZ57
1
21 102
21 102
21 102
HDD1
SATA
SSD
ODD
ESATA
of
of
-1
-1
-1
5
3D3V_S0
RN2201
RN2201
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2103
RN2103
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2202
RN2202
1
2 3
PCH_GPIO24
PCH_GPIO12
USB3_PWR_ON
PLL_ODVR_EN
PCH_GPIO15
5
H_RCIN#
3D3V_S03D3V_S0
1 2
PCH_TEMP_ALERT#PCH_GPIO27PCH_GPIO27
DY
DY
1 2
8
7
6
8
7
6
4
SATA_ODD_PRSNT#
R2224
R2224
10KR2J-3-GP
10KR2J-3-GP
R2225
R2225
Do Not Stuff
Do Not Stuff
3D3V_S0
RN2205
RN2205
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
R2227
R2227
10KR2J-3-GP
10KR2J-3-GP
R2201
R2201
1 2
8
7
6
12
1KR2J-1-GP
1KR2J-1-GP
20100720 SW
NC_FP_DET#
12
20100725
3D3V_S5
1G_512M
1G_512M
R2220
R2220
10KR2J-3-GP
10KR2J-3-GP
LA57
LA57
R2202 200KR2F-L-GPR2202 200KR2F-L-GP
1 2
3D3V_S0
SRN10KJ-5-GP
SRN10KJ-5-GP
2 3
1
D D
GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.
DY
DY
DY
DY
C C
PSW_CLR#
PCH_GPIO48
MFG_MODE
SATA_DET#021 USB3_PWR_ON35
PEG_B_CLKRQ#20
B B
A A
RN2203
RN2203
R2226
R2226
Do Not Stuff
Do Not Stuff
1 2
R2223
R2223
Do Not Stuff
Do Not Stuff
1 2
EC_SCI#
DGPU_HPD_INTR#
EC_SMI#
S_GPIO
PCH_GPIO22
4
1
2
3
4 5
1
2
3
4 5
SRN10KJ-5-GP
SRN10KJ-5-GP
4
SSID = PCH
Note:
For PCH debug with XDP, need to NO STUFF R2218
Color_Engine#49
3D3V_S0
12
R2214
R2214
2G
2G
10KR2J-3-GP
10KR2J-3-GP
12
R2215
R2215
10KR2J-3-GP
10KR2J-3-GP
S_GPIO GPIO0
R2218
R2218
1 2
EC_SCI#27
PCH_GPIO15
R2213
R2213
SATA_ODD_PRSNT#56
DGPU_PWROK92,93
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
21
12
R2216
R2216
1G
1G
[VRAM_SIZE1:VRAM_SIZE2]
LL=512M / HL=1G / LH=2G
10KR2J-3-GP
10KR2J-3-GP
VRAM_SIZE1
VRAM_SIZE2
12
R2217
R2217
512M_2G
512M_2G
10KR2J-3-GP
10KR2J-3-GP
4
1 2
R2221
R2221
1 2
Do Not Stuff
Do Not Stuff
TP2202
TP2202
1
PCH_GPIO27
PSW_CLR#
TP2204
TP2204
1
G2201
G2201
PCH_TEMP_ALERT#
1
TP2205Do Not Stuff TP2205Do Not Stuff
100R2J-2-GP
100R2J-2-GP
EC_SMI#
DGPU_HPD_INTR#H_A20GATE
EC_SCI#
ICC_EN#
PCH_GPIO12
PCH_GPIO16
Do Not Stuff
Do Not Stuff
DGPU_PWROK
PCH_GPIO22
PCH_GPIO24
PLL_ODVR_EN
NC_FP_DET#
DMI_OVRVLTG
FDI_OVRVLTG
MFG_MODE
GFX_CRB_DET
PCH_GPIO48
USB3_PWR_ON
PCH1F
PCH1F
T7
BMBUSY#/GPIO0
A42
TACH1/GPIO1
H36
TACH2/GPIO6
E38
TACH3/GPIO7
C10
GPIO8
C4
LAN_PHY_PWR_CTRL/GPIO12
G2
GPIO15
U2
SATA4GP/GPIO16
D40
TACH0/GPIO17
T5
SCLOCK/GPIO22
E8
GPIO24/MEM_LED
E16
GPIO27
P8
GPIO28
K1
STP_PCI#/GPIO34
K4
GPIO35
V8
SATA2GP/GPIO36
M5
SATA3GP/GPIO37
N2
SLOAD/GPIO38
M3
SDATAOUT0/GPIO39
V13
SDATAOUT1/GPIO48
V3
SATA5GP/GPIO49
D6
GPIO57
A4
NCTF_VSS#A4
A44
NCTF_VSS#A44
A45
NCTF_VSS#A45
A46
NCTF_VSS#A46
A5
NCTF_VSS#A5
A6
NCTF_VSS#A6
B3
NCTF_VSS#B3
B47
NCTF_VSS#B47
BD1
NCTF_VSS#BD1
BD49
NCTF_VSS#BD49
BE1
NCTF_VSS#BE1
BE49
NCTF_VSS#BE49
BF1
NCTF_VSS#BF1
BF49
NCTF_VSS#BF49
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
6 OF 10
6 OF 10
C40
Cougar
Cougar
Point
Point
NCTF TEST PIN:
NCTF TEST PIN:
TACH4/GPIO68
B41
TACH5/GPIO69
C41
TACH6/GPIO70
A40
TACH7/GPIO71
P4
A20GATE
AU16
PECI
P5
RCIN#
AY11
PROCPWRGD
AY10
THRMTRIP#
GPIO
GPIO
CPU/MISC
CPU/MISC
NCTF_VSS#BG2
NCTF_VSS#BG48
NCTF_VSS#BH3
NCTF_VSS#BH47
NCTF_VSS#BJ44
NCTF_VSS#BJ45
NCTF_VSS#BJ46
NCTF
NCTF
D1,D49,E1,E49,F1,F49
D1,D49,E1,E49,F1,F49
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
A4,A44,A45,A46,A5,A6,B3,B47,BD1,BD49,BE1,BE49,BF1,BF49
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
BG2,BG48,BH3,BH47,BJ4,BJ44,BJ45,BJ46,BJ5,BJ6,C2,C48
INIT3_3V#
TS_VSS
TS_VSS
TS_VSS
TS_VSS
NC#P37
NCTF_VSS#BJ4
NCTF_VSS#BJ5
NCTF_VSS#BJ6
NCTF_VSS#C2
NCTF_VSS#C48
NCTF_VSS#D1
NCTF_VSS#D49
NCTF_VSS#E1
NCTF_VSS#E49
NCTF_VSS#F1
NCTF_VSS#F49
ICC_EN#
T14
AH8
AK11
AH10
AK10
P37
BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49
1 2
PLL ON DIE VR ENABLE
NOTE:This signal has a weak internal pull-up
20K
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)
PLL_ODVR_EN
3
DY
DY
R2212
R2212
1 2
Do Not Stuff
Do Not Stuff
UMA_DIS#
VRAM_SIZE1
VRAM_SIZE2
H_PECI_R
PCH_THERMTRIP_R
INIT3_ 3V#
TS_VSS
R2219
R2219
1 2
Do Not Stuff
Do Not Stuff
3D3V_S0
12
DY
DY
12
3D3V_S0
12
DY
DY
12
R2211
R2211
1KR2J-1-GP
1KR2J-1-GP
2
SATA_ODD_PWRGT 56
UMA_DIS# 20
H_A20GATE 27
H_RCIN# 27
H_CPUPW RGD 5,11,36,97
R2204 390R2J-1-G PR2204 390R2J - 1-GP
TP2201
TP2201
1
R2207
R2207
Do Not Stuff
Do Not Stuff
FDI_OVRVLTG
R2208
R2208
10KR2J-3-GP
10KR2J-3-GP
R2209
R2209
Do Not Stuff
Do Not Stuff
DMI_OVRVLTG
R2210
R2210
10KR2J-3-GP
10KR2J-3-GP
2
1
INTERNAL GFX EXTERNAL GFX
R2205 DY 10K
R2206 100K DY
3D3V_S0
12
R2205
R2205
Do Not Stuff
Do Not Stuff
DY
DY
SB 0923'10
R2203
R2203
1 2
Do Not Stuff
Do Not Stuff
DY
DY
1 2
Do Not Stuff
Do Not Stuff
TS Signal Disable Guideline:
TS_VSS1, TS_VSS2, TS_VSS3 and TS_VSS4
should not float on the motherboard. They should
be tied to GND directly.
H_PECI 5,27
H_THERMTRIP# 5,36
PCH_THERMTRIP_R
GFX_CRB_DET
12
R2206
R2206
100KR2J-1-GP
100KR2J-1-GP
R2222
R2222
12
1D05V_VTT
DY
DY
Do Not Stuff
Do Not Stuff
20100729 follow Annie CRB
FDI TERMINATION VOLTAGE OVERRIDE
GPIO37
(FDI_OVRVLTG)
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
DMI TERMINATION VOLTAGE OVERRIDE
GPIO36
(DMI_OVRVLTG)
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)
Integrated Clock Chip Enable
ICC_EN#
HIGH (R2211 DY)- DISABLED [DEFAULT]
LOW (R2211)- ENABLED
GPIO8 has a weak[20K] internal pull up.
Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
PCH (GPIO/CPU)
PCH (GPIO/CPU)
PCH (GPIO/CPU)
LZ57
LZ57
LZ57
1
22 102
22 102
22 102
of
of
of
-1
-1
-1
5
(1uFx3)
(10uFx1_0603)
(1uF x4)
VCCAPLLEXP
12
C2324
C2324
6A
1D05V_VTT
12
1D05V_VTT
2.925A(Total current of VCCIO)
12
12
C2305
C2305
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Do Not Stuff
Do Not Stuff
1.3A
C2301
C2301
C2306
C2306
12
12
C2302
C2302
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1D05V_VTT
TP2301Do Not Stuff TP 2301Do Not Stuff
1
12
12
C2307
C2307
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SSID = PCH
D D
C C
20100629 added
1D05V_VTT
L2302
L2302
DY
DY
1 2
Do Not Stuff
Do Not Stuff
DY
DY
0.266A (Totally VCC3_3 current)
3D3V_S0
(0.1uF x1)
0.159A(Totally current of VCCVRM)
R2302
R2302
1D5V_S0_1D8V_S0
B B
1 2
Do Not Stuff
Do Not Stuff
SA 0901'10
C2326
C2326
1 2
1
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP2302Do Not Stuff TP 2302Do Not Stuff
1D05V_VTT
0.042A (Totally current of VCCDMI)
12
C2303
C2303
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VCCAPLLEXP
(10uF x1)
12
C2308
C2308
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
VCCFDIPLL
+1.05VS_VCC_DMI
4
C2304
C2304
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2309
C2309
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2310
C2310
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VCCAFDI_VRM
AA23
AC23
AD21
AD23
AF21
AF23
AG21
AG23
AG24
AG26
AG27
AG29
AJ23
AJ26
AJ27
AJ29
AJ31
AN19
BJ22
AN16
AN17
AN21
AN26
AN27
AP21
AP23
AP24
AP26
AT24
AN33
AN34
BH29
AP16
BG6
AP17
AU20
PCH1G
PCH1G
Cougar
Cougar
VCCCORE
Point
Point
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCCORE
VCCIO
VCCAPLLEXP
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCC3_3
VCCVRM
VCCAFDIPLL
VCCIO
VCCDMI
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
POWER
POWER
VCC CORE
VCC CORE
VCCIO
VCCIO
FDI
FDI
CRTLVDS
CRTLVDS
DMI
DMI
NAND / SPI HVCMOS
NAND / SPI HVCMOS
7 OF 10
7 OF 10
VCCADAC
VSSADAC
VCCALVDS
VSSALVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCC3_3
VCC3_3
VCCVRM
VCCDMI
VCCCLKDMI
VCCDFTERM
VCCDFTERM
VCCDFTERM
VCCDFTERM
VCCSPI
3
+VCCA_DAC_1_2
U48
U47
+3VS_VCCA_LVDS
AK36
AK37
AM37
AM38
AP36
AP37
V33
V34
AT16
+1.05VS_VCC_DMI
AT20
AB36
+1.05VS_VCC_DMI_CCI
AG16
AG17
AJ16
AJ17
V1
(0.1uF/0.01uF x1)
(10uF x1_0603)
1 2
+1.8VS_VCCTX_LVDS
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2313
C2313
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
R2303
R2303
Do Not Stuff
Do Not Stuff
DY
DY
R2309
R2309
Do Not Stuff
Do Not Stuff
1 2
12
C2319
C2319
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2325
C2325
1 2
SA 0901'10
12
C2320
C2320
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
0.02A
12
C2321
C2321
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2322
C2322
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2323
C2323
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C2315
C2315
C2314
C2314
0.001A
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
0.06A
12
12
C2317
C2317
C2316
C2316
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
3D3V_S0
(0.1uFx1)
1D5V_S0_1D8V_S0
1D05V_VTT
R2306
R2306
1 2
Do Not Stuff
Do Not Stuff
(1uF x1)
1D05V_VTT
R2307
R2307
1 2
Do Not Stuff
Do Not Stuff
(1uFx1)
(10uFx1)
+V_NVRAM_VCCQ 1D8V_S0
0.19A
0.02A
(1uFx1)
2
L2301
L2301
1 2
HCB1608KF-181-GP
HCB1608KF-181-GP
R2304
R2304
1 2
Do Not Stuff
Do Not Stuff
R2305
R2305
1 2
12
C2318
C2318
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R2308
R2308
1 2
(0.01uF x2)
(22uF x1)
(0.1uFx1)
VCCSPI
The same BIOS SPI ROM power
3D3V_S0
3D3V_DAC_S0
R2312
R2312
1 2
Do Not Stuff
Do Not Stuff
SB_0927'10
3D3V_S0
1D8V_S0
0R0805-PAD
0R0805-PAD
3.3V CRT LDO
5V_S0 3D3V_DAC_S0
C2311
C2311
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
R2313
R2313
12
0R2J-2-GP
0R2J-2-GP
R2314
R2314
12
DY
DY
Do Not Stuff
Do Not Stuff
12
DY
DY
SB_0927'10
20100722 modify
3D3V_S5
3D3V_S0
U2301
U2301
1
VIN
VOUT
2
GND
EN3NC#4
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2nd = 74.09198.G7F
2nd = 74.09198.G7F
1
5
4
12
C2312
C2312
DY
DY
Do Not Stuff
Do Not Stuff
VCCVRM(Internal PLL and VRMs):
A.1.5V for Mobile
B.1.8 V for Desktop
co-operate with R2103
A A
5
4
1D5V_S0
1 2
DY
DY
R2311 Do Not Stuff
R2311 Do Not Stuff
1 2
R2310 0R3J-0-U-GPR2310 0R 3J-0-U-GP
1D5V_S0_1D8V_S01D8V_S0
3
2
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
Taipei Hsien 221, Taiw an, R.O.C.
PCH (POWER1)
PCH (POWER1)
PCH (POWER1)
LZ57
LZ57
LZ57
1
23 102
23 102
23 102
of
of
-1
-1
-1
5
SSID = PCH
SSID = PCH
3D3V_AUX_S5
R2418
R2418
+VCCPDSW
1 2
DY
DY
12
Do Not Stuff
Do Not Stuff
1D05V_VTT
D D
1 2
R2419
R2419
Do Not Stuff
Do Not Stuff
3D3V_S0
R2416
R2416
1 2
1R2F-GP
1R2F-GP
C C
1D05V_VTT
B B
1D05V_VTT
1D05V_VTT
A A
R2417
R2417
Do Not Stuff
Do Not Stuff
DY
DY
+VCCAPLL_CPY_PCH_C
DY
DY
R2420
R2420
Do Not Stuff
Do Not Stuff
DY
DY
20100625 V1.2
R2401
R2401
1 2
DY
DY
Do Not Stuff
Do Not Stuff
+V3.3S_VCC_CLKF33_C
L2402
L2402
1 2
IND-10UH-218-GP
IND-10UH-218-GP
L2403
L2403
1 2
IND-10UH-218-GP
IND-10UH-218-GP
R2404
R2404
1 2
R2405
R2405
1 2
DY
DY
12
12
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
C2438
C2438
Do Not Stuff
Do Not Stuff
12
IND-10UH-218-GP
IND-10UH-218-GP
0.08A
5
DY
DY
Do Not Stuff
Do Not Stuff
1 2
0.08A
12
12
VCCACLK
1 2
Do Not Stuff
Do Not Stuff
C2442
C2442
L2401
L2401
(1uFx1)
(220uFx1)
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+VCCDIFFCLK
C2412
C2412
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+V1.05S_SSCVCC
C2413
C2413
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DCPSUSBYP
Do Not Stuff
Do Not Stuff
+VCCSUS1
+VCCAPLL_CPY_PCH
L2404
L2404
DY
DY
DCPSUS
(10uFx1)
(1uFx1)
12
C2409
C2409
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1uFx1)
(220uFx1)
12
C2410
C2410
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
C2439
C2439
12
3D3V_S5
C2441
C2441
(0.1uFx1)
1 2
Do Not Stuff
Do Not Stuff
DY
DY
C2440
C2440
12
DY
DY
Do Not Stuff
Do Not Stuff
1D05V_VTT
1.01A (Total cur r e nt of VCCASW)
+V3.3S_VCC_CLKF33
C2401
C2401
12
12
C2402
C2402
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C2411
C2411
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1D05V_VTT
(1uFx1)
R2406
R2406
1 2
Do Not Stuff
Do Not Stuff
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(0.1uFx1)
1D05V_VTT
0.001A
(0.1uFx2)
(4.7uFx1_0603)
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
RTC_AUX_S5
(0.1uFx2)
(1uFx1)
12
(1uFx1)
6uA
4
TP2401Do Not Stuff TP 2401Do Not Stuff
1
R2403
R2403
0.002A
1 2
Do Not Stuff
Do Not Stuff
TP2405Do Not Stuff TP2405Do Not Stuff
TP2404Do Not Stuff TP 2404Do Not Stuff
1
(10uFx1)
1D05V_VTT
TP2402Do Not Stuff TP 2402Do Not Stuff
1
C2404
C2404
C2403
C2403
12
12
12
(22uFx2_0603)
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
+VCCRTCEXT
0.16A (Totally current of VCCVRM
(0.1uFx1)
1D5V_S0_1D8V_S0
SA 0901'10
+VCCDIFFCLKN
C2414
C2414
C2417
C2417
12
12
12
0.055A
C2420
C2420
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
4
(1uFx1)
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2415
C2415
TP2406Do Not Stuff TP2406Do Not Stuff
12
12
VCCACLK
+VCCPDSW
DCPSUSBYP
1
+V3.3S_VCC_CLKF33
+VCCAPLL_CPY_PCH
+VCCSUS1
12
C2406
C2406
C2407
C2407
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1uFx3)
C2443
C2443
1 2
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
+VCCDIFFCLK
0.095A
+V1.05S_SSCVCC
(1uFx1)
+VCCSST
12
DCPSUS
1
12
C2418
C2418
C2419
C2419
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2422
C2422
C2421
C2421
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AD49
BH23
AL29
AL24
AA19
AA21
AA24
AA26
AA27
AA29
AA31
12
C2408
C2408
AC26
AC27
AC29
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AC31
AD29
AD31
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
BD47
BF47
AF17
AF33
AF34
AG34
AG33
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCH1J
PCH1J
VCCACLK
T16
VCCDSW3_3
V12
DCPSUSBYP
T38
VCC3_3
VCCAPLLDMI2
VCCIO
DCPSUS
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
VCCASW
W21
VCCASW
W23
VCCASW
W24
VCCASW
W26
VCCASW
W29
VCCASW
W31
VCCASW
W33
VCCASW
N16
DCPRTC
Y49
VCCVRM
VCCADPLLA
VCCADPLLB
VCCIO
VCCDIFFCLKN
VCCDIFFCLKN
VCCDIFFCLKN
VCCSSC
V16
DCPSST
T17
DCPSUS
V19
DCPSUS
BJ8
V_PROC_IO
A22
VCCRTC
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
POWER
POWER
Clock and Miscellaneous
Clock and Miscellaneous
CPURTC
CPURTC
Cougar
Cougar
Point
Point
PCI/GPIO/LPCMISC
PCI/GPIO/LPCMISC
SATA USB
SATA USB
HDA
HDA
3
10 OF 10
10 OF 10
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCIO
V5REF_SUS
DCPSUS
VCCSUS3_3
V5REF
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCIO
VCCIO
VCCIO
VCCIO
VCCAPLLSATA
VCCVRM
VCCIO
VCCIO
VCCIO
VCCASW
VCCASW
VCCASW
VCCSUSHDA
N26
P26
P28
T27
T29
T23
T24
V23
V24
P24
T26
M26
AN23
AN24
P34
N20
N22
P20
P22
AA16
W16
T34
AJ2
AF13
AH13
AH14
AF14
AK1
AF11
AC16
AC17
AD17
T21
V21
T19
P32
2
12
C2423
C2423
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
0.097A (Totally current of VCCSUS3_3)
1D05V_VTT
+5VA_PCH_VCC5REFSUS
+VCCA_USBSUS
+V3.3A_VCCPSUS
+5VS_PCH_VCC5REF
+V3.3A_VCCPSUS
C2428
C2428
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2430
C2430
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2429
C2429
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2432
C2432
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+V1.05S_VCCAPLL_SATA3
1D5V_S0_1D8V_S0
C2435
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
0.01A
C2433
C2433
C2435
12
1D05V_VTT
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2424
C2424
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2425
C2425
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
12
C2437
C2437
DY
DY
Do Not Stuff
Do Not Stuff
0.001A
12
12
12
12
C2434
C2434
12
DY
DY
Do Not Stuff
Do Not Stuff
12
+3VS_+1.5VS_HDA_IO
(0.1uFx1)
2
(0.1uFx1)
TP2403 Do Not StuffTP2403 Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1D05V_VTT
(1uFx1)
3D3V_S5
3D3V_S5
(0.1uFx1)
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
3D3V_S5
21
D2401
D2401
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
83.R0304.A8F
1 2
12
C2426
C2426
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R2408
R2408
10R2J-2-GP
10R2J-2-GP
0.001A
3D3V_S0
21
D2402
D2402
CH751H-40PT-GP
CH751H-40PT-GP
83.R0304.A8F
12
3D3V_S5
12
C2436
C2436
DY
DY
Do Not Stuff
Do Not Stuff
+3VS_+1.5VS_HDA_IO
R2409 0R3J-0-U-GPR2409 0R3J-0-U-GP
R2415 Do Not Stuff
R2415 Do Not Stuff
R2413 Do Not Stuff
R2413 Do Not Stuff
PCH (POWER2)
PCH (POWER2)
PCH (POWER2)
LZ57
LZ57
LZ57
83.R0304.A8F
1 2
10R2J-2-GP
10R2J-2-GP
C2427
C2427
SC1U10V2KX-1GP
SC1U10V2KX-1GP
U2401
U2401
1
VIN
2
GND
EN3NC#4
Do Not Stuff
Do Not Stuff
1 2
1 2
DY
DY
1 2
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
2nd = 83.R2004.B8F
2nd = 83.R2004.B8F
3D3V_S5
R2410
R2410
(1uFx1)
3D3V_S0
(0.1uFx2)
12
C2431
C2431
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3D3V_S0
(0.1uFx1)
1D05V_VTT
(1uFx1)
1D05V_VTT
R2411
R2411
DY
DY
(10uFx1)
1A
1D05V_VTT
(1uFx1)
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet of
R2407
R2407
DY
DY
1
VOUT
1
5V_S5
(0.1uFx1)
5V_S0
(1uFx1)
5
4
1D5V_S5
DY
DY
12
C2416
C2416
DY
DY
Do Not Stuff
Do Not Stuff
3D3V_S5
1D5V_S0
1D5V_S5
24 102
24 102
24 102
of
of
C2405
C2405
12
Do Not Stuff
Do Not Stuff
-1
-1
-1
5
SSID = PCH
D D
C C
B B
A A
PCH1H
PCH1H
H5
VSS
Cougar
AA17
AA2
AA3
AA33
AA34
AB11
AB14
AB39
AB4
AB43
AB5
AB7
AC19
AC2
AC21
AC24
AC33
AC34
AC48
AD10
AD11
AD12
AD13
AD19
AD24
AD26
AD27
AD33
AD34
AD36
AD37
AD38
AD39
AD4
AD40
AD42
AD43
AD45
AD46
AD8
AE2
AE3
AF10
AF12
AD14
AD16
AF16
AF19
AF24
AF26
AF27
AF29
AF31
AF38
AF4
AF42
AF46
AF5
AF7
AF8
AG19
AG2
AG31
AG48
AH11
AH3
AH36
AH39
AH40
AH42
AH46
AH7
AJ19
AJ21
AJ24
AJ33
AJ34
AK12
AK3
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
5
Cougar
VSS
Point
Point
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
8 OF 10
8 OF 10
4
AK38
VSS
AK4
VSS
AK42
VSS
AK46
VSS
AK8
VSS
AL16
VSS
AL17
VSS
AL19
VSS
AL2
VSS
AL21
VSS
AL23
VSS
AL26
VSS
AL27
VSS
AL31
VSS
AL33
VSS
AL34
VSS
AL48
VSS
AM11
VSS
AM14
VSS
AM36
VSS
AM39
VSS
AM43
VSS
AM45
VSS
AM46
VSS
AM7
VSS
AN2
VSS
AN29
VSS
AN3
VSS
AN31
VSS
AP12
VSS
AP19
VSS
AP28
VSS
AP30
VSS
AP32
VSS
AP38
VSS
AP4
VSS
AP42
VSS
AP46
VSS
AP8
VSS
AR2
VSS
AR48
VSS
AT11
VSS
AT13
VSS
AT18
VSS
AT22
VSS
AT26
VSS
AT28
VSS
AT30
VSS
AT32
VSS
AT34
VSS
AT39
VSS
AT42
VSS
AT46
VSS
AT7
VSS
AU24
VSS
AU30
VSS
AV16
VSS
AV20
VSS
AV24
VSS
AV30
VSS
AV38
VSS
AV4
VSS
AV43
VSS
AV8
VSS
AW14
VSS
AW18
VSS
AW2
VSS
AW22
VSS
AW26
VSS
AW28
VSS
AW32
VSS
AW34
VSS
AW36
VSS
AW40
VSS
AW48
VSS
AV11
VSS
AY12
VSS
AY22
VSS
AY28
VSS
4
3
PCH1I
PCH1I
AY4
AY42
AY46
AY8
B11
B15
B19
B23
B27
B31
B35
B39
B7
F45
BB12
BB16
BB20
BB22
BB24
BB28
BB30
BB38
BB4
BB46
BC14
BC18
BC2
BC22
BC26
BC32
BC34
BC36
BC40
BC42
BC48
BD46
BD5
BE22
BE26
BE40
BF10
BF12
BF16
BF20
BF22
BF24
BF26
BF28
BD3
BF30
BF38
BF40
BF8
BG17
BG21
BG33
BG44
BG8
BH11
BH15
BH17
BH19
H10
BH27
BH31
BH33
BH35
BH39
BH43
BH7
D3
D12
D16
D18
D22
D24
D26
D30
D32
D34
D38
D42
D8
E18
E26
G18
G20
G26
G28
G36
G48
H12
H18
H22
H24
H26
H30
H32
H34
F3
COUGAR-GP-U2-NF
COUGAR-GP-U2-NF
3
2
9 OF 10
9 OF 10
Cougar
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
Cougar
Point
Point
H46
VSS
K18
VSS
K26
VSS
K39
VSS
K46
VSS
K7
VSS
L18
VSS
L2
VSS
L20
VSS
L26
VSS
L28
VSS
L36
VSS
L48
VSS
M12
VSS
P16
VSS
M18
VSS
M22
VSS
M24
VSS
M30
VSS
M32
VSS
M34
VSS
M38
VSS
M4
VSS
M42
VSS
M46
VSS
M8
VSS
N18
VSS
P30
VSS
N47
VSS
P11
VSS
P18
VSS
T33
VSS
P40
VSS
P43
VSS
P47
VSS
P7
VSS
R2
VSS
R48
VSS
T12
VSS
T31
VSS
T37
VSS
T4
VSS
W34
VSS
T46
VSS
T47
VSS
T8
VSS
V11
VSS
V17
VSS
V26
VSS
V27
VSS
V29
VSS
V31
VSS
V36
VSS
V39
VSS
V43
VSS
V7
VSS
W17
VSS
W19
VSS
W2
VSS
W27
VSS
W48
VSS
Y12
VSS
Y38
VSS
Y4
VSS
Y42
VSS
Y46
VSS
Y8
VSS
BG29
VSS
N24
VSS
AJ3
VSS
AD47
VSS
B43
VSS
BE10
VSS
BG41
VSS
G14
VSS
H16
VSS
T36
VSS
BG22
VSS
BG24
VSS
C22
VSS
AP13
VSS
M14
VSS
AP3
VSS
AP1
VSS
BE16
VSS
BC16
VSS
BG28
VSS
BJ28
VSS
BOM
BOM
BOM
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet of
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
PCH (VSS)
PCH (VSS)
PCH (VSS)
LZ57
LZ57
LZ57
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
25 102
25 102
25 102
of
of
1
-1
-1
-1
5
D D
C C
4
3
2
1
(Blanking)
B B
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
LZ57
LZ57
LZ57
26 102
26 102
26 102
of
of
of
1
-1
-1
-1
A
20100707
SSID = KBC
3D3V_AUX_KBC
12
C2701
C2701
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
D D
CPU_Current
12
R2709
R2709
Do Not Stuff
Do Not Stuff
DY
DY
C C
AD_OFF
1KR2J-1-GP
1KR2J-1-GP
5
R2702
R2702
1 2
Do Not Stuff
Do Not Stuff
12
12
12
12
Do Not Stuff
Do Not Stuff
C2706
C2706
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SUS_PWR_ACK19,20
WIRELESS_LED78
NC_EC_ENABLE
1
BLUETOOTH_EN63
S0_PWR_GOOD19,36
AC_PRESENT19
C2707
C2707
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AD_IA40
C2714 Do Not Stuff
C2714 Do Not Stuff
1 2
DY
DY
CAMERA_EN49
GSENSE_TST79
3G_EN66
TP2709Do Not Stuff TP2709Do Not Stuff
DC_BATFULL78
AD_OFF38
S5_ENABLE36,97
BAT_IN#39
LID_CLOSE#70
RSMRST#_KBC19
PM_SLP_S4#19,46
ME_UNLOCK21
TP2706Do Not Stuff TP2706Do Not Stuff
RTC_AUX_S5
WIFI_RF_EN65
NUM_LED68,78
USB_PWR_EN#61,62
CAP_LED68,78
EC_SWI#20
EC_SCI#22
12
C2708
C2708
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
NC_DBC_EN
1
12
12
C2704
C2704
C2705
C2705
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
GSENSE_X79
CPU_Current42
GSENSE_Y79
AV_INT78
TP2705Do Not Stuff TP2705Do Not Stuff
R2770
R2770
12
C2709
C2709
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
PCB_VER_AD
ADT_TYPE
MODEL_ID_AD
CHG_USB_DET#
1
KBC_PWRBTN_EC#
AC_IN_KBC
KBC_VCORF
C2712
C2712
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
12
C2710
C2710
R2715
R2715
1 2
Do Not Stuff
Do Not Stuff
DY
DY
D2701
D2701
1
2
BAS16-6-GP
BAS16-6-GP
83.00016.K11
83.00016.K11
2ND = 83.00016.F11
2ND = 83.00016.F11
R2716
R2716
1 2
Do Not Stuff
Do Not Stuff
D2704
D2704
1
DY
DY
2
BAS16-6-GP
BAS16-6-GP
83.00016.K11
83.00016.K11
2ND = 83.00016.F11
2ND = 83.00016.F11
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3
U2701A
U2701A
104
VREF
97
GPIO90/AD0
98
GPIO91/AD1
99
GPIO92/AD2
100
GPIO93/AD3
101
GPIO94/DA0
105
GPIO95/DA1
106
GPIO96/DA2
79
GPIO2
95
GPIO3
96
GPIO4
108
GPIO5
93
GPIO6
94
GPIO7
114
GPIO16
6
GPIO24
109
GPIO30
14
GPIO34
15
GPIO36
80
GPIO41
17
GPIO42/TCK
20
GPIO43/TMS
21
GPIO44/TDI
23
GPIO46/TRST#
26
GPIO51
73
GPIO70
74
GPIO71
75
GPIO72
82
GPIO75
83
GPO76/SHBM
84
GPIO77
91
GPIO81
110
GPO82/TEST#
112
GPO84/XORTR#
107
GPIO97
44
VCORF
NPCE795PA0DX-GP-U
NPCE795PA0DX-GP-U
2ND = 71.00795.A0G
2ND = 71.00795.A0G
ECSWI#_KBC
3
ECSCI#_KBC
VBAT
VCC19VCC46VCC76VCC88VCC
GND18GND45GND78GND89GND
115
GND5AGND
116
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4
102
VDD
AVCC
GPIO11/CLKRUN#
GPIO65/SMI#
ECSCI#/GPIO54
GPIO10/LPCPD#
GPIO67/PWUREQ#
GPIO85/GA20
KBRST#/GPIO86
GPIO52/PSDAT3/RDY#
GPIO50/PSCLK3/TDO
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1
GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
GPIO47/SCL4
GPIO53/SDA4
F_SDI/F_SDIO1
F_SDIO/F_SDIO0
C2702
C2702
1 OF 2
1 OF 2
LRESET#
LCLK
LFRAME#
LAD3
LAD2
LAD1
LAD0
SERIRQ
F_CS0#
F_SCK
103
EC_AGND
R2711
R2711
Do Not Stuff
Do Not Stuff
1 2
B B
4
3D3V_S0
12
12
C2703
C2703
DY
DY
Do Not Stuff
Do Not Stuff
C2711
C2711
DY
DY
1 2
Do Not Stuff
Do Not Stuff
PLT_RST#_EC
R2735
R2735
1 2
7
Do Not Stuff
Do Not Stuff
2
CLK_PCI_KBC 18
LPC_FRAME#_1
R2730 33R2J-2-GPR2730 33R2J-2-GP
12
3
LPC_AD3
1
LPC_AD2
128
127
126
125
8
9
29
124
123
121
122
27
25
11
10
71
72
70
69
67
68
119
120
24
28
EC_SPI_CS#_C
90
EC_SPI_CLK_C BAT_SCL
92
EC_SPI_DI_C
86
87
NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.
LPC_AD1
LPC_AD0_1
R2729 33R2J-2-GPR2729 33R2J-2-GP
12
INT_SERIRQ 21
PM_CLKRUN# 19
PANEL_BLEN
R2775
R2775
1 2
ECSCI#_KBC
Do Not Stuff
Do Not Stuff
VGA_SW#_ 1
R2774
R2774
1 2
Do Not Stuff
Do Not Stuff
ECSWI#_KBC
H_A20G ATE 22
H_RCIN# 22
BLON_OUT 49
PCIE_RST#
PCIE_RST# 83
GSENSE_ON# 79
HDMI_IN# 5 1
TPDATA 69
TPCLK 69
BAT_SCL 39,40
BAT_SDA 3 9,40
SML1_CLK 20
SML1_DATA 20
LAN_PWR_ON 31
GSENSOR_ID
PROCHOT_EC
CHG_ON# 40
12
12
R2737 Do Not StuffR2737 Do Not Stuff
1 2
EC_SPI_DO_C
12
R2722
R2722
NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.
EC_GPIO47 High Active
PROCHOT_EC
G
12
R2732
R2732
S
2ND = 84.2N702.031
2ND = 84.2N702.031
100KR2J-1-GP
100KR2J-1-GP
33R2J-2-GPR2736 33R2J-2-GPR2736
33R2J-2-GPR2719 33R2J-2-GPR2719
33R2J-2-GP
33R2J-2-GP
Q2702
Q2702
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
LPC_AD[0..3] 21,65,71
<------ TP
3D3V_AUX_KBC
-1'20101129
PCB_Version_BOM Ctrl
PCB_Version_BOM Ctrl
PCB_VER_AD
PLT_RST# 5,11,18,31,35,36,65,66,71,83,97
LPC_FRAME# 21,65,71
LPC_AD0
SC_1025'2010
L_BKLT_EN 17
VGA_SW# 68
<------ BATTERY / CHARGER
<------PCH / eDP
SPI_CS0#_R 21,60
SPI_CLK_R 21,60
SPI_SO_R 21,60
SPI_SI_R 21,60
H_PROCHOT#_EC
R2733
R2733
1 2
D
Do Not Stuff
Do Not Stuff
12
12
1D05V_VTT
R2724
R2724
47KR2F-GP
47KR2F-GP
R2726
R2726
100KR2F-L1-GP
100KR2F-L1-GP
SC_1025'2010
PURE_HW_SHUTDOWN#28,36,86
H_PROCHOT# 5,42
SATA_ODD_DA#18,56
PM_PWRBTN#11,19,97
WIRELESS_SW#68
PM_SLP_S3#19,36,37,47,92
CHARGE_LED78
KBC_BEEP29
STOP_CHG#40
KBC_NOVO_BTN#68
E51_RxD65
E51_TxD65
AMP_MUTE#29
PCH_SUSCLK_KBC19
H_PECI5,22
Need very close to EC
TP2708Do Not Stuff TP2708Do Not Stuff
1
CHG_USB_OC#
TP2711Do Not Stuff TP2711Do Not Stuff
1
TP2707Do Not Stuff TP2707Do Not Stuff
1
PWRLED68,78
R2721 43R2J-GPR2721 43R2J-GP
1 2
R2720
R2720
1 2
R2723
R2723
12
10KR2J-3-GP
10KR2J-3-GP
SATA_ODD_DA#
LED_Brightness
AD_DETECT
ECRST#
EC_VTT
12
Do Not Stuff
Do Not Stuff
C2716
C2716
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PURE_HW_SHUTDOWN#_B
84.T3906.A11
84.T3906.A11
2nd = 84.C3906.A11
2nd = 84.C3906.A11
PECI
U2701B
U2701B
31
GPIO56/TA1
117
GPIO20/TA2
63
GPIO14/TB1
64
GPIO01/TB2
32
GPIO15/A_PWM
118
GPIO21/B_PWM
62
GPIO13/C_PWM
65
GPIO32/D_PWM
81
GPIO66/G_PWM
66
GPIO33/H_PWM
22
GPIO45/E_PWM
16
GPIO40/F_PWM
85
VCC_POR#
113
GPIO87/SIN_CR
111
GPO83/SOUT_CR/TRIST#
30
GPIO55/CLKOUT
77
GPIO00/EXTCLK
13
PECI
12
VTT
NPCE795PA0DX-GP-U
NPCE795PA0DX-GP-U
3
65W_90W#
High: 65W / Low 90W
DISCRETE#
High: UMA / Low: Discrete
2 OF 2
2 OF 2
KCOL0
53
KBSOUT0/JENK#
KCOL1
52
KBSOUT1/TCK
KCOL2
51
KBSOUT2/TMS
KCOL3
50
KBSOUT3/TDI
KCOL4
49
KBSOUT4/JEN0#
KCOL5
48
KBSOUT5/TDO
KCOL6
47
KBSOUT6/RDY#
KCOL7
43
KBSOUT7
KCOL8
42
KBSOUT8
KCOL9
41
KBSOUT9/SDP_VIS#
KCOL10
40
KBSOUT10/P80_CLK
KCOL11
39
KBSOUT11/P80_DAT
KCOL12
38
KBSOUT12/GPIO64
KCOL13
37
KBSOUT13/GPIO63
KCOL14
36
KBSOUT14/GPIO62
KCOL15
35
KBSOUT15/GPIO61 /XOR_OUT
12
E
MMBT3906-4-GP
MMBT3906-4-GP
B
DY
DY
Q2701
Q2701
C
KCOL16
34
GPIO60/KBSOUT16
KCOL17
33
GPIO57/KBSOUT17
KROW0
54
KBSIN0
KROW1
55
KBSIN1
KROW2
56
KBSIN2
KROW3
57
KBSIN3
KROW4
58
KBSIN4
KROW5
59
KBSIN5
KROW6
60
KBSIN6
KROW7
61
KBSIN7
Prevent BIOS data loss solution
3D3V_AUX_S5
ECRST#
12
R2705
R2705
10KR2J-3-GP
10KR2J-3-GP
C2715
C2715
PURE_HW_SHUTDOWN#
Do Not Stuff
Do Not Stuff
1
2
Do Not Stuff
Do Not Stuff
KCOL[0..17] 69
KROW[0..7] 69
U2702
U2702
GND
RESET#
Do Not Stuff
Do Not Stuff
3D3V_AUX_KBC
12
R2707
R2707
10KR2F-2-ML-GP
10KR2F-2-ML-GP
65W/120W
65W/120W
ADT_TYPE
DY
DY
-1'20101129
12
R2701
R2701
10KR2F-2-ML-GP
10KR2F-2-ML-GP
90W/120W
90W/120W
3D3V_AUX_S5
3
VCC
LILI Multi GPIO setting
AD_DETECT
AD_DETECT38
SML1_CLK
Q2703
Q2703
2345
SML1_DATA
1
6
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
84.DMN66.03F
84.DMN66.03F
3D3V_S0
2ND = 84.27002.F3F
2ND = 84.27002.F3F
SMBC_THERM
SMBD_THERM
RN48
RN48
SRN10KJ-5-GP
SRN10KJ-5-GP
SMBC_THERM 28,78,86
SMBD_THERM 28,78,86
1234
3D3V_S0
2
R2707 R2701
Stuff
DY
65W
90W
Stuff
DY
120W
Stuff Stuff
AC_IN_KBC
12
R2706
R2706
DY
DY
Do Not Stuff
Do Not Stuff
EC GPIO standard PH/PL
RN2701
RN2701
BAT_SDA
BAT_IN#
S5_ENABLE
ECRST#
LID_CLOSE#
HDMI_IN#
PCIE_RST#
E51_RxD
BLUETOOTH_EN
MODEL_ID_AD
DY
8
7
1 2
SRN4K7J-8-GP
SRN4K7J-8-GP
RN2703
RN2703
SRN100KJ-6-GP
SRN100KJ-6-GP
RN2705
RN2705
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2702
RN2702
SRN10KJ-5-GP
SRN10KJ-5-GP
RN2704
RN2704
SRN10KJ-5-GP
SRN10KJ-5-GP
R2708 Do Not StuffDYR2708 Do Not Stuff
3D3V_AUX_KBC
1234
1234
1
2
3456
1234
1234
Model_ID_BOM Ctrl OPS: 64.14335.6DL
Model_ID_BOM Ctrl OPS: 64.14335.6DL
12
R2727
R2727
100KR2F-L1-GP
100KR2F-L1-GP
12
R2728
R2728
100KR2F-L1-GP
100KR2F-L1-GP
R2712
R2712
1 2
Do Not Stuff
Do Not Stuff
R2725
R2725
1 2
3D3V_AUX_KBC
3D3V_S0
MODEL_ID_AD(Pin100) Pull-Low Register VoltagePull-High Register
V/B 57 UMA 100.0 K 2.001 V64.9 K
V/B 57 OPTIMUS 1.867 V76.8 K
Z 57 UMA
Z 57 OPTIMUS
3D3V_S0
1
12
R2718
R2718
G Sensor ID:
100.0 K
100.0 K
100.0 K
High: ST
Low:ADI
100KR2J-1-GP
100KR2J-1-GP
12
R2710
R2710
DY
DY
Do Not Stuff
Do Not Stuff
3D3V_AUX_S5
SA 0824'10
12
R2704
R2704
330KR2J-L1-GP
330KR2J-L1-GP
KBC_PWRBTN_EC#
12
12
R2703
R2703
12
470R2J-2-GP
470R2J-2-GP
G2701
G2701
DY
DY
DY
DY
C2717
C2717
R2776
R2776
Do Not Stuff
Do Not Stuff
2 1
100KR2J-1-GP
100KR2J-1-GP
Do Not Stuff
Do Not Stuff
SC_1025'10
3D3V_AUX_S5
SA 0824'10
12
R2714
R2714
10KR2J-3-GP
10KR2J-3-GP
KBC_NOVO_BTN#
1.650 V100.0 K
1.32 V143.0 K(64.14335.L0L)
GSENSOR_ID
AC_IN 40
KBC_PWRBTN#68,97
3D3V_AU X_S53D3V_AUX_KBC
Do Not Stuff
Do Not Stuff
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
KBC Nuvoton NPCE795
KBC Nuvoton NPCE795
KBC Nuvoton NPCE795
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
LZ57
LZ57
LZ57
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
27 102
27 102
27 102
of
of
of
A
-1
-1
-1
5
SSID = Thermal
Close to PCH on top side.
SA 0905 change to 390p
3
D D
C C
TP66
TP66
Do Not Stuff
B B
A A
Do Not Stuff
E
B
C
Q6
Q6
MMBT3904WT1G-GP
MMBT3904WT1G-GP
2
E
B
C
Q42
Q42
MMBT3904WT1G-GP
MMBT3904WT1G-GP
between CPU, VGA and DIMM on bottom side
H_THERMDA
H_THERMDC
REMOTE2+
REMOTE2-
SC 1203
THERM_SCI#
1
pin6, ALERT# OD
pin7, SYS_SHDN# OD
5
SMBC_THERM27,78,86
SMBD_THERM27,78,86
Thermal sensor
12
C2800
C2800
SC390P50V2KX-GP
SC390P50V2KX-GP
12
C2801
C2801
Do Not Stuff
Do Not Stuff
DY
DY
C2804
C2804
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
R272 Do Not StuffR272 Do Not Stuff
4
2200p close to smsc2103 chip
3D3V_S0
12
R260
R260
68R2-GP
68R2-GP
U31
4
3
2
1
16
15
7
6
9
8
EMC2103-2-AP-GP
EMC2103-2-AP-GP
PURE_HW_SHUTDOWN#27,36,86
U31
VDD
DP1
DN1
DP2/DN3
ND2/DP3
SYS_SHDN#
ALERT#
SMCLK
SMDATA
2103_VDD
THERM_SYS_SHDN# SHDN_SEL
THERM_SCI#_R
REMOTE2-
12
C2802
C2802
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
REMOTE2+
SHDN_SEL
SHDN --> 2N3904 ON External diode
2103_4
4
GPIO1
2103_5
5
GPIO2
10
TACH
11
PWM
TRIP_SET
14
TRIP_SET
13
SHDN_SEL
12
GND
17
GND
D2803
D2803
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
2ND = 83.BAT54.D81
2ND = 83.BAT54.D81
3rd = 83.BAT54.S81
3rd = 83.BAT54.S81
12
R2801
R2801
DY
DY
Do Not Stuff
Do Not Stuff
3
T8
1
MMBT3904WT1G-GP
MMBT3904WT1G-GP
CPU backside or inside the socket
CPU TEMP:
H_THERMDA and H_THERMDC routing 10mil trace width
and spacing. Locate Capacity near Thermal diode.
3D3V_S0
12
R2800
R2800
6K8R2J-GP
6K8R2J-GP
TP65 Do Not StuffTP65 Do Not Stuff
1
TP67 Do Not StuffTP67 Do Not Stuff
1
FAN_TACH_R
R2805 2K05R2F-GPR 2805 2K05R 2F -GP
1 2
T8 = 105
3D3V_AUX_S5
3
2ND = 84.2N702.031
2ND = 84.2N702.031
84.2N702.J31
84.2N702.J31
2N7002K-2-GP
2N7002K-2-GP
DY
DY
1
2
D
12
C2805
C2805
DY
DY
Do Not Stuff
Do Not Stuff
3
C
E
Q2802
Q2802
B
Q9
Q9
S
G
RN49
RN49
2 3
1
4
SRN10KJ-5-GP
SRN10KJ-5-GP
D2802
D2802
CH551H-30PT-GP
CH551H-30PT-GP
2ND = 83.5R003.08F
2ND = 83.5R003.08F
3rd = 83.R5003.G8F
3rd = 83.R5003.G8F
83.R5003.C8F
83.R5003.C8F
THERM_SYS_SHDN#
IMVP_PWRGD_G
2ND = 83.R5003.H8H
2ND = 83.R5003.H8H
3rd = 83.5R003.08F
3rd = 83.5R003.08F
3D3V_S0
FAN_TACH
21
FAN_PWM
SA 0905
3D3V_S0
12
R2802
R2802
100KR2J-1-GP
100KR2J-1-GP
2
2200p close to smsc2103 chip
Close to connector
D2801
D2801
21
C2806
FAN_TACH
FAN_PWM
R2803
R2803
1 2
DY
DY
R2804
R2804
1 2
2
DY
DY
Do Not Stuff
Do Not Stuff
0R2J-2-GP
0R2J-2-GP
C2806
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
R427
R427
Do Not Stuff
Do Not Stuff
12
1 2
3D3V_S0
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
4 WIRE PWM Fan Control circuit
1
H_THERMDA
12
C2803
C2803
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
H_THERMDC
5V_S0
12
R2806
R2806
10KR2J-3-GP
10KR2J-3-GP
FAN_PWM_C
12
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
Do Not Stuff
Do Not Stuff
EC2801
EC2801
FAN_TACH
FAN_PWM_C
IMVP_PWRGD 36,42
BOM
BOM
BOM
Title
Title
Title
Thermal P2800/Fan Controllor P2793
Thermal P2800/Fan Controllor P2793
Thermal P2800/Fan Controllor P2793
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
12
DY
DY
EC2802
EC2802
AFTP1133AF TP1133
1
4
3
2
1
SC_1025'10
2ND = 20.F1426.004
2ND = 20.F1426.004
1
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
LZ57
LZ57
LZ57
20.F0765.004
20.F0765.004
ACES-CON4-4-GP
ACES-CON4-4-GP
FAN1
FAN1
5 6
AFTP1128AF TP1128
AFTP1131AF TP1131
28 102
28 102
28 102
1
1
of
of
of
AFTP1134AF TP1134
-1
-1
-1
5
R587
R587
1 2
Do Not Stuff
Do Not Stuff
D D
ALC_AGND
ALC_AGND
AUD_PORTA_R
AUD_PORTA_L
AUD_SENSE_PORT_A
AUD_5VA
20KR2F-L-GP
20KR2F-L-GP
AUD_DMIC_1_278
HDA_CODEC_SYNC_C HDA_CODEC_SDOUT_C
12
C2928
C2928
5
AUD_PORTA_R82
AUD_PORTA_L82
AUD_SENSE_PORT_A82
C C
AUD_DMIC_CLK78
B B
20100720_AUD
A A
SC33P50V2JN-3GP
SC33P50V2JN-3GP
AUD_3VD3D3V_S0
C704
C704
12
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Place next to pin 1
R619
R619
JDREF
12
AUD_3VD
71.AL272.00G
71.AL272.00G
12
C701
C701
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Q2902
Q2902
D
2N7002K-2-GP
2N7002K-2-GP
R2928
R2928
1 2
Do Not Stuff
Do Not Stuff
DY
DY
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
C699
C699
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
L_LINE_IN_C
R_LINE_IN_C
U69
U69
37
MONO-OUT
38
AVDD2
39
LOUT2-L/PORT-A-L
40
JDREF
41
LOUT2-R/PORT-A-R
42
AVSS2
43
NC#43
44
DMIC-CLK3/4
45
SPDIFO2
46
DMIC-CLK1/2
47
EAPD
48
SPDIFO1
ALC272-GR-GP
ALC272-GR-GP
AUD_SDATA_OUT
G
S
AUD_3VD
4
R64575R2J-1-GP R64575R2J-1-GP
12
ALC_AGND
R64675R2J-1-GP R64675R2J-1-GP
12
C725
C725
R6165K1R2F-2-GP R6165K1R2F-2-GP
12
SENSEB
HP_OUT_L_AUD
HP_OUT_R_AUD
33
36
35
34
32
SENSE-B
HPOUT-L/PORT-I-L
LOUT1-L/PORT-D-L
HPOUT-R/PORT-I-R
LOUT1-R/PORT-D-R
ALC272
ALC272
DVDD1GPIO0/DMIC-DATA1/22GPIO1/DMIC-DATA3/43DVSS4SDATA-OUT5BITCLK6DVSS7SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP-IN
CBN
C724
C724
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
SC2D2U10V3ZY-1GP
12
12
CBP
CPVEE
28
30
31
29
CBP
CBN
CPVEE
MIC1-VREFO
AUD_SDATAIN
22R2J-2-GP
22R2J-2-GP
HDA_CODEC_BITCLK_C
12
C698
C698
SC10P50V2JN-4GP
SC10P50V2JN-4GP
MIC1_VREF
ALC_AGND
26
27
VREF
AVSS1
LINE1-R/PORT-C-R
LINE1-L/PORT-C-L
MIC1-R/PORT-B-R
MIC1-L/PORT-B-L
MIC2-R/PORT-F-R
MIC2-L/PORT-F-L
LINE2-R/PORT-E-R
LINE2-L/PORT-E-L
R589
R589
SB version
12
R2926
R2926
33KR2F-GP
33KR2F-GP
12
C2929
C2929
Do Not Stuff
Do Not Stuff
DY
HDA_CODEC_SDOUT21HDA_CODEC_SYNC21
DY
4
MIC1_VREF 82
ACL_VREF
AUD_5VA
12
25
AVDD1
LINE2-VREFO
MIC2-VREFO
LINE1-VREFO
SENSE-A
12
AUD_PC_BEEP
DVDD-IO
AUD_SYNC
12
12
R588Do Not Stuff R588Do Not Stuff
DY;main(84.2N702.E31)
DY;main(84.2N702.E31)
Q2903
Q2903
D
Do Not Stuff
Do Not Stuff
R2930
R2930
1 2
0R2J-2-GP
0R2J-2-GP
Do Not Stuff
Do Not Stuff
2ND = 84.2N702.031
2ND = 84.2N702.031
3
Place close
to Pin 25
C728
C728
C715
C715
12
C723
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
24
23
22
21
20
19
18
17
16
15
14
13
HDA_CODEC_RST# 21
G
S
C723
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
ALC_AGNDALC_AGND
-1'20101129
AUD_PORTC_R
AUD_PORTC_L
MIC2-VREFO
SC2D2U16V3KX-GP
SC2D2U16V3KX-GP
AUD_MIC2_L_C AUD_MIC2_L_2
AUD_MIC2_R_C
C2925
C2925
LZ57
LZ57
AUD_SENSE_PORT
AUD_3VD
R2932
R2932
0R2J-2-GP
0R2J-2-GP
1 2
C697
C697
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
C702
C702
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
HDA_SDIN0 21
HDA_CODEC_BITCLK 21
AUD_3VD
12
R2927
R2927
Do Not Stuff
Do Not Stuff
DY
DY
AUD_SDATA_OUTAUD_SYNC
3
R644
R644
1 2
Do Not Stuff
Do Not Stuff
12
C727
C727
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Place close
to Pin 27
C722
C722
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C713 SC4D7U6D3V3KX-GPC713 SC4D7U6D3V3KX-GP
1 2
C712 SC4D7U6D3V3KX-GPC712 SC4D7U6D3V3KX-GP
1 2
R2929
R2929
1 2
C2924
C2924
12
AUD_MIC2_R_2
12
SC2D2U16V3KX-GP
SC2D2U16V3KX-GP
R607 20KR2J-L2-GPR607 20KR2J-L2-GP
1D5V_S0
R2931
R2931
Do Not Stuff
Do Not Stuff
DY
DY
1 2
HDA_SPKR21
KBC_BEEP27
1KR2J-1-GP
1KR2J-1-GP
LZ57
LZ57
LZ57
LZ57
SRN1KJ-7-G P
SRN1KJ-7-G P
4
RN68
RN68
AUD_SENSE_PORT_C
1 2
20100713 vendor request
SB_0928'10
1 2
1 2
C368
C433
C433
C368
1 2
1 2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
C718
C718
12
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Place close
to Pin 38
R604
R604
10KR2J-3-GP
10KR2J-3-GP
R597
R597
10KR2J-3-GP
10KR2J-3-GP
AUD_PORTC_R_C
AUD_PORTC_L_C
23
1
LA57
LA57
LA57
LA57
LZ57
LZ57
LA57
LA57
LZ57
LZ57
LZ57
LZ57
LA57
LA57
5VA_OP_S0
C397SCD1U10V2KX-4G P C397SCD1U10V2KX-4G P
C380SC4D7U10V5ZY-3GP C380SC4D7U10V5ZY-3GP
20KR2F-L-GP
20KR2F-L-GP
RIN+_R
1 2
LIN+_R
1 2
20KR2F-L-GP
20KR2F-L-GP
2
AUD_5VA5V_S0
C714
C714
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
AMP_MUTE#27
HDA_CODEC_RST#21
INT_MIC2_R 78
20100709
AUD_SENSE_PORT_C 82
R254 42K2R2F-L-GP
R254 42K2R2F-L-GP
1 2
R293
R293
51KR2F-L-GP
51KR2F-L-GP
1 2
R279 42K2R2F-L-GP
R279 42K2R2F-L-GP
1 2
R297
R297
51KR2F-L-GP
51KR2F-L-GP
1 2
R262 42K2R2F-L-GP
R262 42K2R2F-L-GP
1 2
47KR2F-GP
47KR2F-GP
R294
R294
1 2
R291 42K2R2F-L-GP
R291 42K2R2F-L-GP
1 2
LZ57
LZ57
R296
R296
1 2
47KR2F-GP
47KR2F-GP
R_LINE_IN
R257
R257
RIN+
L_LINE_IN
LIN+
R292
R292
2
5V_S0 5VA_OP_S0
R2933
R2933
0R2J-2-GP
0R2J-2-GP
1 2
12
12
R586
R586
4K7R2J-2-GP
C706
C706
AUD_PORTC_R_C 82
AUD_PORTC_L_C 82
AUD_SPK_L+_LLIN+
AUD_SPK_L-_LL_LINE_IN
AUD_SPK_R+_LRIN+
AUD_SPK_R-_LR_LINE_IN
4K7R2J-2-GP
R584
R584
1 2
Do Not Stuff
Do Not Stuff
1 2
R591
R591
DY
DY
Do Not Stuff
Do Not Stuff
U35
U35
2
VCC
11
15
16
13
BYPASS
VCC
SHUTDOWN
7
RIN-
8
6
G1454R41U-GP
G1454R41U-GP
LVO1
RIN+
LVO2
LIN-
RVO1
LIN+
RVO2
VSS
NC#6
NC#13
VSS
GND
BOM
BOM
BOM
Title
Title
Title
Size Document Nu m ber Rev
Size Document Nu m ber Rev
Size Document Nu m ber Rev
Custom
Custom
Custom
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
Date: Sheet
5V_S5
DY
DY
12
AUD_PC_BEEPKBC_BEEP_R
C700
C700
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AUD_SD#
R_LINE_IN_C
L_LINE_IN_C
BYPASS
5
1451_SD
14
AUD_SPK_L-_L
1
AUD_SPK_L+_L
4
AUD_SPK_R-_L
12
AUD_SPK_R+_L
9
3
10
17
1
R299
R299
Do Not Stuff
Do Not Stuff
1 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
12
C381
C381
ALC_AGND
Q21
Q21
G
D
S
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
C369SCD47U6D3V2KX-GPC369SCD47U6D3V2KX-GP
1 2
C435SCD47U6D3V2KX-GP C4 3 5SCD47U6D3V2KX-GP
1 2
Codec_ALC272
Codec_ALC272
Codec_ALC272
LA57
LA57
LA57
R259 20KR2F-L-GPR259 20KR2F-L-GP
R_LINE_IN_R
1 2
L_LINE_IN_R
1 2
-1'20101129
C362
C362
1 2
SC10U6D3V5KX-4GP
SC10U6D3V5KX-4GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
G94
G94
Do Not Stuff
Do Not Stuff
1 2
SB 0923'10
5V_S0
5V_S5
Do Not Stuff
Do Not Stuff
10KR2J-3-GP
10KR2J-3-GP
12
R295
R295
1451_SD
Do Not Stuff
Do Not Stuff
12
R286
R286
DY
DY
R_LINE_IN
20KR2F-L-GP
20KR2F-L-GP
L_LINE_IN
R289
R289
AUD_SPK_L-_L 58
AUD_SPK_L+_L 58
AUD_SPK_R-_L 58
AUD_SPK_R+_L 58
of
29 102
of
29 102
of
29 102
DY
DY
12
R298
R298
-1
-1
-1
5
D D
4
3
2
1
blanking
C C
B B
BOM
BOM
BOM
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Tuesday, March 29, 2011
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
reserved
reserved
reserved
LZ57
LZ57
LZ57
30 102
30 102
30 102
of
of
of
1
-1
-1
-1
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