Wistron Leopard2 Schematic

A

CLK GEN

3

Leopard2 Block Diagram

ICS954206

4 4

31

1394 Conn

27,28

PCMCIA 1 SLOT

SD/MS 6 in 1

29 28

29

Power Switch

TPS2220A

PCI 7411

CARDBUS 1394 SD/MS/MMC/SM

Card Slost

3 3

Mini-PCI

34

802.11a/b/g

RJ45 CONN

RJ11 CONN

31

10/100 RTL8100C

31

MODEM

MDC Card

30,31

PCI BUS

35

AC97-LINK

B

4,5

Mobile CPU

Dothan

Host BUS 400/533MHz

6,7,8,9,10

Alviso

DMI I/F 100MHz

21,22,23,24

ICH6-M

PEG

C

Project code: 91.4C701.001 PCB P/N : 48.4C701.011 REVISION : 05202 -1

DDRII*2

13,14,15

VGA

ATI M26P

USB 2.0

11,12

SVIDEO/COMP

BLUE THUMB

D

DDR-SDRAM

16,17

HY5DS573222F-28

LVDS

TVOUT

RGB CRT

DAUGHTER BOARD

USB x 2 USB x 2

P EIDE

HDD

LCD

CRT

E

SYSTEM DC/DC

42

45

19

18

40

TPS5130

INPUTS

DCBATOUT

OUTPUTS

1D8V_S3 5V_S3 3V_AUX

SYSTEM DC/DC

MAX8743

INPUTS

DCBATOUT

OUTPUTS

1D05V_S0 1D2V_VGA_S0

MAXIM CHARGER

MAX8725

INPUTS

OUTPUTS

BT+

DCBATOUT

35

26

CPU DC/DC

41

INPUTS

18V 4.0A

5V 100mA

MAX1907

OUTPUTS VCC_CORE

S EIDE

DVD/ CD-RW

26

DCBATOUT

0.844~1.3V 27A

2 2

MIC IN

18

AC'97 CODEC

31

AD1981B

LINE OUT

OP AMP

G1420B

33

Docking

18

KBC

NS97551

PCI EXPRESS/ USB2.0

LPC Bus

36

LPC Debug Conn

EXPRESSCARD

38

DAUGHTER BOARD

Comsumer

35 3837

IR

1 1

A

B

37

Touch Pad

C

Int. KB

Thermal & Fan

G768D

25

FlashRom

4Mb (512kB)

D

26

PCB LAYER

Signal 1

L1:

GND

L2:

Signal 2

26

Power Switch

TPS2231

Title

Size Document Number Rev

A3

Date: Sheet

Block Diagram

L3:

Signal 3

L4:

VCC

L5:

Signal 4

L6:

GNDL7: Signal 5L8:

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

147Monday, July 11, 2005

E

-1

of

-1

A

B

C

D

E

ICH6-M Integrated Pull-up and Pull-down Resistors

ACZ_BIT_CLK, EE_DOUT, EE_CS, GNT[5]#/GPO[17], GNT[6]#/GPO[16],

4 4

LAD[3:0]#/FB[3:0]#, LDRQ[0], PME#, PWRBTN#,

LAN_RXD[2:0]

ACZ_RST#, ACZ_SDIN[2:0], ACZ_SYNC, ACZ_SDOUT,ACZ_BITCLK, SPKR

USB[7:0][P,N]

DD[7],

LAN_CLK

3 3

ICH6-M IDE Integrated Series

DPRSLP#, EE_DIN,

TP[3]

SDDREQ

LDRQ[1]/GPI[41],

DPRSLPVR,

ICH6 internal 20K pull-ups

ICH6 internal 10K pull-ups

ICH6 internal 20K pull-downs

ICH6 internal 15K pull-downs

ICH6 internal 11.5K pull-downs

ICH6 internal 100K pull-downs

ICH6-M EDS 14308 0.8V1

Termination Resistors

DD[15:0], DDACK#, DCS3#,

IORDY,

IDEIRQ

DIOR#, DREQ,DIOW#,

DA[2:0],

DCS1#,

approximately 33 ohm

Power name description

5V_S0= 5 Voltage power up on system work(S0 state) 5V_S3= 5 Voltage suspend to RAM(S3 state) 5V_S5= 5 Voltage soft off(S5 state) 3D3V_S0= 3.3 Voltage power up on system work(S0 state) 3D3V_S3= 3.3 Voltage suspend to RAM(S3 state) 3D3V_S5= 3.3 Voltage soft off(S5 state) LVDDR_2D8V= 2.8 Voltage power up on system work(S0 state) 1D8V_S3= 1.8 Voltage suspend to RAM(S3 state) 2D5V_S0= 2.5 Voltage power up on system work(S0 state)

VCC_CORE_S0= CPU VID Voltage power up on system work(S0 state) 1D5V_VCCA_S0= 1.5 Voltage power up on system work(S0 state) 1D5V_S0= 1.5 Voltage power up on system work(S0 state) 1D5V_S5= 1.5 Voltage soft off(S5 state) DDR_VREF= 0.9 Voltage power up on system work(S0 state) 1D2V_VGA_S0= 1.2 Voltage power up on system work(S0 state) for VGA VRAM_VDDQ= 1.8 Voltage power up on system work(S0 state) for VRAM 1D05V_S0= 1.05 Voltage power up on system work(S0 state) CORE_GMCH_S0= 1.05 Voltage power up on system work(S0 state) for ALVISO core power VCCP_GMCH_S0= 1.05 Voltage power up on system work(S0 state)for ALVISO BUSIO power

PCI RESOURCE TABLE

2 2

1 1

A

B

C

DEVICE IDSEL

Mini-PCI

Cardbus Controller TI7411

LAN

Blue Thumb

D

AD21

AD22

AD23

AD24

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

PCI IRQ

P_INTE#

(CARBUS)P_INTG# (1394)P_INTF# (CARD READER)P_INTG#

P_INTE#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ITP

Leopard2

REQ# / GNT#

REQ0#/GNT0#

REQ1#/GNT1#

REQ2#/GNT2#

247Wednesday, July 06, 2005

E

-1

of

-1

A

L17

1 2

MLB-201209-11

4 4

3D3V_S0

L38

1 2

MLB-201209-11

12

3D3V_APWR_S0 3D3V_48MPWR_S0

12

C519

C519 SC10U10V6ZY-U

SC10U10V6ZY-U

C199

C199 SC4D7U10V5ZY

SC4D7U10V5ZY

12

3D3V_CLKGEN_S0

C532

C532 SCD1U16V

SCD1U16V

C524

C524 SCD1U16V

SCD1U16V

DY

12

C523

C523 SCD1U16V

SCD1U16V

B

3D3V_S03D3V_S0

1 2

4D7R3

R196

12

R196

C538

C538 SCD1U16V

SCD1U16V

12

C543

C543 SCD1U16V

SCD1U16V

C218

C218 SC4D7U10V5ZY

SC4D7U10V5ZY

12

DY

12

C219

C219 SCD1U16V

SCD1U16V

DY

C525

C525 SCD1U16V

SCD1U16V

12

DY

C

C518

C518 SCD1U16V

SCD1U16V

12

DY

C539

C539 SCD1U16V

SCD1U16V

3D3V_S0

12

R200

R200 10KR2

10KR2

R221

R221 10KR2

10KR2

DY

ITP_EN

D

DummyR200(up side),Mounting R221(down side)

--SRC7 on

Mounting R200(up side),DummyR221(down side)

--CPU2_ITP on

E

CLK_PWRGD#25,41

CPU

266M 133M

166M

400M

20 23 25 27 30 32

19 22 24 26 31 33

52 53 46 47

CLK_XOUT CLK_XIN

49

X150X2

SRCCLKC1 SRCCLKC2 SRCCLKC3 SRCCLKC4_SATA SRCCLKC5 SRCCLKC6

SRCCLKT1 SRCCLKT2 SRCCLKT3 SRCCLKT4_SATA SRCCLKT5 SRCCLKT6

REF0 REF1/FSLC/TEST_SEL SCLK SDATA

51

1 2

R589

1 2

R220

B

10

22R2

33R2

VTT_PWRGD#/PD

34

GND2GND6GND13GND29GND45GND

GNDA

38

SS_SEL

VDDSRC21VDDSRC28VDDSRC

SEL100_96MHZ#/PCICLK_F1

9

ITP_EN

7

CPUCLKC2_ITP/SRCCLKC7

CPUCLKT2_ITP/SRCCLKT7

55

1 2

C544 SC22PC544 SC22P

1 2

C545 SC22PC545 SC22P

RN20

CLK_PCIE_NEW#26

3 3

CLK_PCIE_NEW26

CLK_MCH_3GPLL#7

CLK_MCH_3GPLL7

CLK_PCIE_ICH#22

CLK_PCIE_ICH22

TP_SRCC6 CLK_SRCT6

TP31TPAD30 TP31TPAD30

TP_SRCT6 CLK_SRCC6

TP30TPAD30 TP30TPAD30

PREQ2#26

CLK_ICH1422

CLK_CODEC32 CPU_SEL04,7 SMBC_ICH11,24

SMBD_ICH11,24

CLK_PCIE_PEG#13

CLK_PCIE_PEG13

2 2

3D3V_S0

12

R606

R606 10KR2

10KR2

1 1

12

REQSEL

R605

R605 DUMMY-R2

DUMMY-R2

4

SRN33-2-U2

SRN33-2-U2 RN18

RN18

4

SRN33-2-U2

SRN33-2-U2 RN19

RN19

4

SRN33-2-U2

SB

R584

R568

1 2

R602

1 2

R601

2K2R2

RN21

4

SRN33-2-U2

A

CLK_SRCC1

1

CLK_SRCT1

23

CLK_SRCC3

1

CLK_SRCT3

23

CLK_SRCC5

1

CLK_SRCT5

23

12

DY

0R2-0

12

0R2-0

DY

22R2

22R2 22R2

22R2

12

R222

CLK_SRCC2

1

CLK_SRCT2

23

3D3V_CLKGEN_S0

R197

FS_C

0 0

0 1 1 100M 1 1

X7

X-14D31818M-17

1 2

CLK_REF14

PCLK_KBC36

PM_STPPCI#22

CLK_ICHPCI22

NEAR CLKGEN

1 2

FS_B

0 0 1 1 0 0 1 1

FS_A

10KR2

FS_A

0

01200M 1 00333M 1 0 1 Reserved

3D3V_APWR_S0 3D3V_48MPWR_S0 3D3V_CLKGEN_S0

37

42

11

48

VDDA

VDD48

VDDPCI1VDDPCI

VDDREF

VDDCPU

CPU_STOP#

CPUCLKC0 CPUCLKC1

CPUCLKT0 CPUCLKT1

FSLA/USB_48MHZ

FSLB/TEST_MODE

96MHZ_SSC/SRCCLKC0 96MHZ_SST/SRCCLKT0

DOTC_96MHZ DOTT_96MHZ

IREF

ITP_EN/PCICLK_F08PCI/SRC_STOP#

PCICLK256PCICLK33PCICLK44PCICLK5

5

39

CLK_IREF

475R2F

REQSEL

CLK_PCI3

CLK_PCI4

CLK_PCI5

CLK_CPU_BCLK

CLK_CPU_BCLK#

close to CPU

U72

33R2

33R2 33R2

33R2

54 43 40 35

44 41 36

12 16

18 17

15 14

ICS954206AG

12

R181

12

R600

12

R218

12

R219

TP33

TP33 TPAD30

TPAD30 TP32

TP32 TPAD30

TPAD30

CLK_CPUT1 CLK_CPUC1

CLK_CPUC2 CLK_CPUT2

CLK_CPUT0 CLK_CPUC0

FS_A

CLK_SRCC0 CLK_SRCT0

DOT96C DOT96T

C

RN22

1 2 3

SRN33-2-U2

SRN33-2-U2 RN24

RN24

2 3

DY

1

SRN33-2-U2

RN25

1 2 3

SRN33-2-U2

RN23

1 2 3

SRN33-2-U2

SRN33-2-U2 R199 33R2R199 33R2 R201 33R2R201 33R2

PCLK_PCM 27 PCLK_LAN 30 PCLK_MINI 34

SS3 SS2 SS1 SS0 Spread Amount%

000 0000

0 0 0 0 0 1 +-0.3 1 1 1 1 1 11 11

4

R592 10R2R592 10R2

1 2

R593 33R2R593 33R2

1 2

SC

4

12 12

CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6

PM_STPCPU# 22,41

CLK_XDP_CPU# 4 CLK_XDP_CPU 4

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

CLK48_USB 22 CLK48_CARDBUS 27 CPU_SEL1 4,7

DREFSSCLK# 7 DREFSSCLK 7

DREFCLK# 7 DREFCLK 7

ICS954206AG Spread Spectrum Select

1

0

1

0

1

0

1 1

1

11

0

0 00 001

1

0 1

0 1 1

1

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

-0.8

-1.0

-1.25

-1.5

-1.75

-2.0

-2.5

-3.0

+-0.4 +-0.5 +-0.6 +-0.8 +-1.0 +-1.25 +-1.5

D

DREFCLK DREFCLK# CLK_PCIE_NEW CLK_PCIE_NEW# CLK_XDP_CPU CLK_XDP_CPU# CLK_CPU_BCLK CLK_CPU_BCLK# CLK_MCH_BCLK CLK_MCH_BCLK#

DREFSSCLK DREFSSCLK# CLK_MCH_3GPLL CLK_MCH_3GPLL# CLK_PCIE_PEG CLK_PCIE_PEG# CLK_PCIE_ICH CLK_PCIE_ICH#

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Clock Generator (ICS954206AG )

3D3V_S0

12

R590

R590 10KR2

10KR2

H/L: 100/96MHz

SS_SEL

12

R591

R591 10KR2

10KR2

DY

1 2

49D9R2F

R202

1 2

49D9R2F

R198

1 2

49D9R2F

R582

1 2

49D9R2F

R580

1 2

DY

49D9R2F

R603

1 2

DY

49D9R2F

R594

1 2

49D9R2F

R596

1 2

49D9R2F

R595

1 2

49D9R2F

R585

1 2

49D9R2F

R586

1 2

49D9R2F

R194

1 2

49D9R2F

R195

1 2

49D9R2F

R566

1 2

49D9R2F

R567

1 2

49D9R2F

R581

1 2

49D9R2F

R583

1 2

49D9R2F

R569

1 2

49D9R2F

R570

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

347Monday, July 11, 2005

E

-1

A

H_A#[31..3]6

U53A

62.10055.011

PZ47903

4 4

H_ADSTB#06

H_REQ#[4..0]6

3 3

H_ADSTB#16

H_A20M#21

H_FERR#21

H_IGNNE#21

H_STPCLK#21

H_INTR21

H_NMI21

H_SMI#21

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31

CPU

2 2

PZ47903

P4

A3#

U4

A4#

V3

A5#

R3

A6#

V2

A7#

W1

A8#

T4

A9#

W2

A10#

Y4

A11#

Y1

A12#

U1

A13#

AA3

A14#

Y3

A15#

AA2

A16#

U3

ADSTB#0

R2

REQ0#

P3

REQ1#

T2

REQ2#

P1

REQ3#

T1

REQ4#

AF4

A17#

AC4

A18#

AC7

A19#

AC3

A20#

AD3

A21#

AE4

A22#

AD2

A23#

AB4

A24#

AC6

A25#

AD5

A26#

AE2

A27#

AD6

A28#

AF3

A29#

AE1

A30#

AF1

A31#

AE5

ADSTB#1

C2

A20M#

D3

FERR#

A3

IGNNE#

C6

STPCLK#

D1

LINT0

D4

LINT1

B4

SMI#

ITP Conn.

ADDR GROUP 0

ADDR GROUP 1

THERMTRIP#

HCLK THERM XTP/ITP SIGNALS CONTROL

TCK(PIN 5)

TCK(PIN A13)

FBO(PIN 11)

VCCP_GMCH_S0

H_CPURST# XDP_TDO CPU_PROCHOT#

1 1

XDP_TDI XDP_TMS XDP_TRST#

XDP_TCK

R391

R391 R386

R386 R384

R384

1 2

R387

1 2

R389

1 2

R388

1 2

R390

12

54D9R2F

12

54D9R2F

12

56R2J

56R2J 150R2

150R2 39D2R2F

39D2R2F 680R2

680R2 27D4R2F

27D4R2F

All place within 2" to CPU

A

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM#0 BPM#1 BPM#2 BPM#3 PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

PROCHOT#

THERMDA THERMDC

ITP_CLK1 ITP_CLK0

BCLK1 BCLK0

B

N2 L1 J3

L4 H2 M2

N4 A4

B5 J2 B11

H_RS#0

H1

H_RS#1

K1

H_RS#2

L2 M3

K3 K4

C8 B8 A9 C9 A10

XDP_BPM#5

B10

XDP_TCK

A13

XDP_TDI

C12

TDI

A12 C11 B13 A7

B17 B18 A18

C17 A15

A16 B14 B15

B

XDP_TDO XDP_TMS XDP_TRST# DBR#

CPU_PROCHOT#

H_ADS# 6 H_BNR# 6 H_BPRI# 6

H_DEFER# 6 H_DRDY# 6 H_DBSY# 6

H_BREQ#0 6

H_INIT# 21 H_LOCK# 6

H_TRDY# 6 H_HIT# 6

H_HITM# 6

THERMDP1 25 THERMDN 25 PM_THRMTRIP-A# 7,21

PM_THRMTRIP-I# 7,21 CLK_XDP_CPU# 3 CLK_XDP_CPU 3 CLK_CPU_BCLK# 3 CLK_CPU_BCLK 3

VCCP_GMCH_S0

H_IERR#

H_CPURST# 6

H_RS#[2..0] 6

VCCP_GMCH_S0

12

VCC_CORE_S0

R393

R393 56R2J

56R2J

12

R396

R396 56R2J

56R2J

R27

R27 150R2

150R2

Place testpoint on H_IERR# with a GND

0.1" away

PM_THRMTRIP# should connect to ICH6 and Alviso without T-ing

( No stub)

CPU_SEL03,7 CPU_SEL13,7

C

VCCP_GMCH_S0

1 2

R34

C

R383

R383 R385

R385

1KR2F

H_DSTBN#06 H_DSTBP#06

H_DINV#06

H_DSTBN#16 H_DSTBP#16

H_DINV#16

1 2 1 2

12

R33

R33 2KR2F

2KR2F

0R0402-PAD

BSEL[1:0] Freq.(MHz) L H 100 L L 133

CPU_SEL0_CPU CPU_SEL1_CPU

Layout Note:

0.5" max length.

TP2TP2

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

GTLREF

PSI#

C20 D24 C26

C25 C23 C22 D25

H23 G25

M26 H24

G24 M23

N24 M25 H26 N25

C16 C14

AF7 AC1

AD26

A19 A25 A22 B21 A24 B26 A21 B20

B24 E24 B23

E23

L23

F25

K25 K24 L24

E26

J23 J25

L26

J26

E1

C3

D

U53B

U53B PZ47903

PZ47903

62.10055.011

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12#

DATA GRP 0DATA GRP 1

D13# D14# D15# DSTBN0# DSTBP0# DINV0#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#

PSI# BSEL0

BSEL1

MISC

RSVD2 RSVD3 RSVD4 RSVD5

GTLREF0

D

Y26

D32#

AA24

D33#

T25

D34#

U23

D35#

V23

D36#

R24

D37#

R26

D38#

R23

D39#

AA23

D40#

U26

D41#

V24

D42#

U25

D43#

V26

D44#

DATA GRP 2

Y23

D45#

AA26

D46#

Y25

D47#

W25

DSTBN2#

W24

DSTBP2#

T24

DINV2#

AB25

D48#

AC23

D49#

AB24

D50#

AC20

D51#

AC22

D52#

AC25

D53#

AD23

D54#

AE22

D55#

AF23

D56#

AD24

D57#

AF20

D58#

AE21

D59#

AD21

D60#

DATA GRP 3

AF25

D61#

AF22

D62#

AF26

D63#

AE24

DSTBN3#

AE25

DSTBP3#

AD20

DINV3#

P25

COMP0

P26

COMP1

AB2

COMP2

AB1

COMP3

G1

DPRSTP#

B7

DPSLP#

C19

DPWR#

SLP#

TEST1 TEST2

E4 A6

C5 F23

PWRGOOD

E

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0

R402 27D4R2FR402 27D4R2F

COMP1

R403 54D9R2FR403 54D9R2F

COMP2

R35 27D4R2FR35 27D4R2F

COMP3

R36 54D9R2FR36 54D9R2F

TEST1 TEST2

12

R29

R29 1KR2

1KR2

DY

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6

Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .

H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6

1 2 1 2 1 2 1 2

H_DPRSLP# 21 H_DPSLP# 21 H_DPWR# 6

H_CPUSLP# 6,21

R392

R392 1KR2

1KR2

DY

H_D#[63..0] 6

VCCP_GMCH_S0

12

R395

R395 200R2J

200R2J

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (1 of 2)

Leopard2

447Monday, July 11, 2005

E

H_PWRGD 21

of

-1

A

VCC_CORE_S0 VCC_CORE_S0

4 4

3 3

2 2

1 1

AA11 AA13 AA15 AA17 AA19 AA21

AA5 AA7

AA9 AB10 AB12 AB14 AB16 AB18 AB20 AB22

AB6

AB8 AC11 AC13 AC15 AC17 AC19

AC9 AD10 AD12 AD14 AD16 AD18

AD8 AE11 AE13 AE15 AE17 AE19

AE9

AF10 AF12 AF14 AF16 AF18

AF8 D18 D20 D22

D6

D8 E17 E19 E21

E5

E7

E9 F18 F20 F22

F6

F8

G21

Layout Note:

U53C

PZ47903

62.10055.011

VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58

VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71

VCCA0 VCCA1 VCCA2 VCCA3

VCCP0 VCCP1 VCCP2 VCCP3 VCCP4 VCCP5 VCCP6 VCCP7 VCCP8

VCCP9 VCCP10 VCCP11 VCCP12 VCCP13 VCCP14 VCCP15 VCCP16 VCCP17 VCCP18 VCCP19 VCCP20 VCCP21 VCCP22 VCCP23 VCCP24

VCCQ0 VCCQ1

VID0 VID1 VID2 VID3 VID4 VID5

VCCSENSE

VSSSENSE

VCCSENSE and VSSSENSE lines should be of equal length.

Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.

G5 H22 H6 J21 J5 K22 U5 V22 V6 W21 W5 Y22 Y6

F26 B1 N1 AC26

D10 D12 D14 D16 E11 E13 E15 F10 F12 F14 F16 K6 L21 L5 M22 M6 N21 N5 P22 P6 R21 R5 T22 T6 U21

P23 W4

E2 F2 F3 G3 G4 H4

AE7 AF6

TP_VCCA1 TP_VCCA2 TP_VCCA3

CPU_D10

1D5V_VCCA_S0

1 2

R394

TP_VCCSENSE

TP_VSSSENSE

54D9R2F

C17

SCD01U16V2KX

TP1TP1 TP3TP3 TP20TP20

0R2-0

H_VID0 41 H_VID1 41 H_VID2 41 H_VID3 41 H_VID4 41 H_VID5 41

12

R40

DY

12

VCCP_GMCH_S0

12

R39

R39 54D9R2F

54D9R2F

DY

B

12

C15

C15 SC10U10V6ZY-U

SC10U10V6ZY-U

AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25

AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26

AC2 AC5

AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24

AD1

AD4

AD7

AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25

AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26

AF11 AF13 AF15 AF17 AF19 AF21 AF24

A11 A14 A17 A20 A23 A26 AA1 AA4 AA6 AA8

AB3 AB5 AB7 AB9

AE3 AE6 AE8

AF2 AF5 AF9

B12 B16 B19 B22 B25

C10 C13 C15 C18 C21 C24

D11

U53D

A2

VSS0

A5

VSS1

A8

VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74

B3

VSS75

B6

VSS76

B9

VSS77 VSS78 VSS79 VSS80 VSS81 VSS82

C1

VSS83

C4

VSS84

C7

VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91

D2

VSS92

D5

VSS93

D7

VSS94

D9

VSS95 VSS96

VSS97 VSS98

VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191

D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4 R6 R22 R25 T3 T5 T21 T23 T26 U2 U6 U22 U24 V1 V4 V5 V21 V25 W3 W6 W22 W23 W26 Y2 Y5 Y21 Y24

PZ47903

62.10055.011

C

VCCP_GMCH_S0

12

C21

C21 SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_S0

1 2 3

12

BC85

BC85 SC1U10V3ZY

SC1U10V3ZY

DY

0.1u *10 150u *1

12

C20

C20 SCD1U10V2MX-1

SCD1U10V2MX-1

VCC_CORE_S0

C29

C29 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C18

C19

SC10U6D3V5MX

12

SC10U6D3V5MX

I max = 120 mA

U52

SHDN# GND IN

G913C-U

DY

12

C30

C25

SCD1U10V2MX-1

12

C23

C24

SC10U6D3V5MX

SET

OUT

12

C16

C16 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C33

C35

SC10U6D3V5MX

1D5V_VCCA_S0

5 4

12

SC10U6D3V5MX

D

12

BC2

BC2 SC1U10V3ZY

SC1U10V3ZY

DY

12

C28

C31

C31 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C42

C36

SC10U6D3V5MX

BC84

BC84 SC22P

SC22P

DY

1D5V_VCCA_SET

12

C22

C22 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C39

C40

DY

SC10U6D3V5MX

12

R398

R398 49K9R2F

49K9R2F

DY

12

C32

C32 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C41

C50

DY

SC10U6D3V5MX

SC10U10V5ZY-L

12

TC1

TC1 ST100U6D3VM-U

ST100U6D3VM-U

12

C318

DY

SC10U10V5ZY-L

12

R397

R397 12K7R3F

12K7R3F

DY

12

C319

DY

SC10U10V5ZY-L

1D5V_VCCA_S0 1D5V_S0

12

C322

C321

DY

SC10U10V5ZY-L

R28

12

C323

DY

SC10U10V5ZY-L

1 2

12

C325

DY

SC10U10V5ZY-L

0R2-0

12

C324

E

12

C326

DY

SC10U10V5ZY-L

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

A

B

C

D

Date: Sheet of

CPU (2 of 2)

Leopard2

SC

547Sunday, July 03, 2005

E

of

SC

A

B

C

D

E

Trace 10 mil wide with 20 mil spacing

H_XRCOMP

12

R97

R97 24D9R2F

24D9R2F

4 4

VCCP_GMCH_S0

R96

R96 54D9R2F

54D9R2F

1 2

H_XSCOMP

VCCP_GMCH_S0

12

R105

R105 221R3F

221R3F

H_XSWING

12

R95

R95 100R2F

3 3

100R2F

1 2

C95

C95 SCD1U16V

SCD1U16V

VCCP_GMCH_S0

Trace 10 mil wide with 20 mil spacing

Alviso Strapping Signals and Configuration

Pin Name

CFG[2:0]

CFG[4:3] Reserved CFG5 DMI x2 Select

2 2

CFG6 Reserved 0 = DDR2

CFG7

CFG8

CFG9

CFG[11:10] CFG[13:12]

CFG[15:14] Reversed CFG16

CFG17 CFG18

1 1

CFG19

CFG20 SDVOCRTL

_DATA

All strap signals are sampled with respect to the leading

NOTE:

edge of the Alviso GMCH PWORK In signal.

Strap Description Configuration

CPU Strap

Reserved PCI Express Graphics

Lane Reversal Reserved XOR/ALL Z test

straps

FSB Dynamic ODT

Reversed GMCH core VCC

Select CPU VTT Select

Reversed SDVO Present

A

H_YRCOMP

12

R118

R118 24D9R2F

24D9R2F

R109

R109 54D9R2F

54D9R2F

1 2

H_YSCOMP

12

R116

R116 221R3F

221R3F

H_YSWING

12

R117

R117 100R2F

100R2F

001 = FSB533FSB Frequency Select

101 = FSB400

others = Reversed

0 = DMI x2

1 = DMI x4

1 = DDR1

0 = Reserved

1 = Dothan

0 = Reserve Lanes

1 = Normal

00 = Reserved 01 = XOR mode enabled 10 = All Z mode enabled

11 = Normal Operation

0 = Dynamic ODT Disabled

1 = Dynamic ODT Enabled

0 = 1.05V

1 = 1.5V

0 = 1.05V

1 = 1.2V

C128

C128 SCD1U16V

SCD1U16V

1 2

REV.NO. 1.0 REF. NO. 15577

(Default)

0 = No SDVO device present

1= SDVO device present

U19A

H_D#[63..0]4 H_A#[31..3] 4

page 183

(Default)

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_XRCOMP H_XSCOMP H_XSWING H_YRCOMP H_YSCOMP H_YSWING

(Default)

ALVISO-GM:71.0GMCH.08U ALVISO-PM:71.0GMCH.0BU

E4 E1 F4 H7 E2 F1 E3 D3 K7 F2

J7

J8 H6 F3 K8 H5 H1 H2 K5 K6

J4

G3

H3

J1 L5 K4

J5 P7 L7

J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6

W6

U3 V5

W8 W7

U2 U1 Y5 Y2 V4 Y7

W1 W3

Y3 Y6

W2

C1 C2 D1 T1 L1 P1

U19A

HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#

HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING

ALVISO-GM

HADSTB#0 HADSTB#1

HCPURST#

HOST

HDSTBN#0 HDSTBN#1 HDSTBN#2 HDSTBN#3 HDSTBP#0 HDSTBP#1 HDSTBP#2 HDSTBP#3

HCPUSLP#

HA3# HA4# HA5# HA6# HA7# HA8#

HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#

HADS#

HVREF HBNR#

HBPRI#

HBREQ0#

HCLKINN HCLKINP

HDBSY#

HDEFER#

HDINV#0 HDINV#1 HDINV#2 HDINV#3

HDPWR#

HDRDY#

HEDRDY#

HHIT# HHITM# HLOCK#

HPCREQ#

HREQ#0 HREQ#1 HREQ#2 HREQ#3 HREQ#4

HRS0# HRS1# HRS2#

HTRDY#

G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13

F8 B9 E13 J11 A5 D5 E7 H10

AB1 AB2

C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3 H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4 H_RS#0 H_RS#1 H_RS#2

H_CPUSLP#_GMCH

H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4

H_BNR# 4 H_BPRI# 4 H_BREQ#0 4 H_CPURST# 4

CLK_MCH_BCLK# 3 CLK_MCH_BCLK 3

H_DBSY# 4 H_DEFER# 4

H_DPWR# 4 H_DRDY# 4

H_HIT# 4 H_HITM# 4 H_LOCK# 4

H_TRDY# 4

VCCP_GMCH_S0

H_VREF

12

C384

C384 SCD1U10V2KX

SCD1U10V2KX

1 2

R54 0R0402-PADR54 0R0402-PAD

ALVISO-GML:71.0GMCH.0JU

B

C

12

R457

R457 100R2F

100R2F

12

R458

R458 200R2F

200R2F

H_DINV#[3..0] 4

H_DSTBN#[3..0] 4

H_DSTBP#[3..0] 4

H_REQ#[4..0] 4

H_RS#[2..0] 4

D

VID

VR_ON

Vcc_core

Vccp

Vcc_mch

MCH_PWERGD

CLK_ENABLE#

VGATE TO ICH6

H_CPUSLP# 4,21

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

Power On Sequencing

>3mS

Vboot Vvid

>100uS

3~10mS

647Monday, July 11, 2005

E

10~30uS

Vboot

<10uS

CORE_GMCH_S0

12

H_DPWR#

GMCH (1 of 5)

Leopard2

R519

R519 0R2-0

0R2-0

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

-1

of

-1

A

U19B

AA31

DMIRXN0

AB35

DMIRXN1

AC31

DMIRXN2

AD35

DMIRXN3

Y31

DMIRXP0

AA35

DMIRXP1

AB31

DMIRXP2

AC35

DMIRXP3

AA33

DMITXN0

AB37

DMITXN1

AC33

DMITXN2

AD37

DMITXN3

Y33

DMITXP0

AA37

DMITXP1

AB33

DMITXP2

AC37

DMITXP3

AM33

SM_CK0

AL1

SM_CK1

AE11

SM_CK2

AJ34

SM_CK3

AF6

SM_CK4

AC10

SM_CK5

AN33

SM_CK0#

AK1

SM_CK1#

AE10

SM_CK2#

AJ33

SM_CK3#

AF5

SM_CK4#

AD10

SM_CK5#

AP21

SM_CKE0

AM21

SM_CKE1

AH21

SM_CKE2

AK21

SM_CKE3

AN16

SM_CS0#

AM14

SM_CS1#

AH15

SM_CS2#

AG16

SM_CS3#

AF22

SM_OCDCOMP0

AF16

SM_OCDCOMP1

AP14

SM_ODT0

AL15

SM_ODT1

AM11

SM_ODT2

AN10

SM_ODT3

AK10

SMRCOMPN

AK11

SMRCOMPP

AF37

SMVREF0

AD1

SMVREF1

AE27

SMXSLEWIN

AE28

SMXSLEWOUT

AF9

SMYSLEWIN

AF10

SMYSLEWOUT

ALVISO-GM

Ref ALVISO EDS-1 Page 115

For Dothan-B

R420

R420 1KR2

1KR2

CFG2 CFG1 CFG0

R419

CFG2=0(R419):133MHZ CFG2=1(R420):100MHZ

CPU_SEL0 3,4 CPU_SEL1 3,4

CFG(2..1) FREQ.(MHz) 10 400 00 533 11 Reserved

R535

R535 40D2R2F

40D2R2F

10KR2

FOR DDR2

R533

R533 80D6R2F

80D6R2F

M_RCOMPN M_RCOMPP

R543

R543 80D6R2F

80D6R2F

DMI_TXN[3..0]22

DMI_TXP[3..0]22

DMI_RXN[3..0]22

DMI_RXP[3..0]22

12

R534

R534 40D2R2F

40D2R2F

PM_EXTTS#0

PM_EXTTS#1

M_CLK_DDR011 M_CLK_DDR111

M_CLK_DDR311 M_CLK_DDR411

M_CLK_DDR#011 M_CLK_DDR#111

M_CLK_DDR#311 M_CLK_DDR#411

M_CKE011,12 M_CKE111,12 M_CKE211,12 M_CKE311,12

M_CS#011,12 M_CS#111,12 M_CS#211,12 M_CS#311,12

M_OCDCOMP0 M_OCDCOMP1

M_ODT011,12 M_ODT111,12 M_ODT211,12 M_ODT311,12

DDR_VREF_S3

A

12

C154

C154 SCD1U10V2MX-1

SCD1U10V2MX-1

R465

R465 10KR2

10KR2

4 4

3 3

Layout Note: Route as short as possible

12

2 2

2D5V_S0

1 2

R498

1 2

R471

1D8V_S3

12

1 1

12

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2

DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

M_RCOMPN M_RCOMPP

SMXSLEW SMYSLEW

VCCP_GMCH_S0

12

R437

R437 10KR2

10KR2

12

R438

4K7R2

DY

12

4K7R2

DY

B

CFG/RSVD

RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27

BM_BUSY#

EXT_TS0# EXT_TS1#

THRMTRIP#

PM

PWROK

DREF_CLKN DREF_CLKP

DREF_SSCLKN

CLK

DREF_SSCLKP

NC

B

CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

RSTIN#

DMI

DDR MUXING

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9

NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8

NC9 NC10 NC11

CFG1

H13 G14

CFG3 PEG_COMP

F16

CFG4

F15

CFG5

G15

CFG6

E16

CFG7

D17

CFG8

J16

CFG9

D15

CFG10

E15

CFG11

D14

CFG12

E14

CFG13

H12

CFG14

C14

CFG15

H15

CFG16

J15

CFG17

H14

CFG18

G22

CFG19

G23

CFG20

D23 G25 G24 J17 A31 A30 D26 D25

J23

PM_EXTTS#0

J21

PM_EXTTS#1

H22 F5 AD30 AE29

A24 A23 C37 D37

AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37

CFG0

G16

When Low 2.2K Ohm

1 2

R441 DUMMY-R2R441 DUMMY-R2

1 2

R440 DUMMY-R2R440 DUMMY-R2

1 2

R464 DUMMY-R2R464 DUMMY-R2

1 2

R469 2K2R2R469 2K2R2

1 2

R442 DUMMY-R2R442 DUMMY-R2

1 2

R461 DUMMY-R2R461 DUMMY-R2

1 2

R439 DUMMY-R2R439 DUMMY-R2

1 2

R468 DUMMY-R2R468 DUMMY-R2

1 2

R69 DUMMY-R2R69 DUMMY-R2

1 2

R466 DUMMY-R2R466 DUMMY-R2

1 2

R459 DUMMY-R2R459 DUMMY-R2

1 2

R467 DUMMY-R2R467 DUMMY-R2

1 2

R463 DUMMY-R2R463 DUMMY-R2

1 2

R460 DUMMY-R2R460 DUMMY-R2

1 2

R462 DUMMY-R2R462 DUMMY-R2

RST1#

1 2

R52

1 2

R536

1KR2

C

CFG2

Note: CRT_RED, CRT_GREEN, CRT_BLUE, are ground referenced.

Place 150 Ohm termination resistors close to GMCH

PM_BMBUSY# 22

PM_THRMTRIP-A# 4,21 PWROK 25

100R2

DREFCLK# 3 DREFCLK 3 DREFSSCLK# 3 DREFSSCLK 3

PLT_RST1# 13,24,26

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

Strapping

CFG16 CFG17

Intel suggest NC Due to votusly DVO

Intel design guide suggest Ref no.:14511 page 210

Note: Intel design guide suggest(page 203) If the LVDS interface is not implementd, all signals associated with the interface can be left as no connects.

CFG[17:3] have internal pullup resistors. CFG[19:18] have internal pulldown resistors

C

CLK_MCH_3GPLL#3

CLK_MCH_3GPLL3

CORE_GMCH_S0

Alviso will provide SDVO_CTRLCLK and CTRLDATA pulldowns on-die

SDVO_DAT

TP22TPAD30 TP22TPAD30

SDVO_CLK

TP23TPAD30 TP23TPAD30

R494 0R2-0R494 0R2-0

1 2

R495 0R2-0R495 0R2-0

1 2

R493 0R2-0R493 0R2-0

1 2

R492 0R2-0R492 0R2-0

1 2

H24

H25 AB29 AC29

A15

C16

A17

B15

B16

B17

E24

E23

E21

D21

C20

B20

A19

B19

H21

G21

E25

F25

C23

C22

F23

F22

F26

C33

C31

F28

F27

B30

B29

C25

C24

B34

B33

B32

A34

A33

B31

C29

D28

C27

C28

D27

C26

J18

J20

D

U19G

SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP

TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC

DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET

LBKLT_CRTL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL

LACLKN LACLKP LBCLKN LBCLKP

LADATAN0 LADATAN1 LADATAN2

LADATAP0 LADATAP1 LADATAP2

LBDATAN0 LBDATAN1 LBDATAN2

LBDATAP0 LBDATAP1 LBDATAP2

ALVISO-GM

D

E

EXP_COMPI

EXP_ICOMPO

EXP_RXN0

MISCTVVGALVDS

EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8

EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15

EXP_RXP0

EXP_RXP1

EXP_RXP2

EXP_RXP3

EXP_RXP4

EXP_RXP5

EXP_RXP6

EXP_RXP7

EXP_RXP8

EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15

EXP_TXN0

EXP_TXN1

EXP_TXN2

EXP_TXN3

EXP_TXN4

EXP_TXN5

EXP_TXN6

PCI-EXPRESS GRAPHICS

EXP_TXN7

EXP_TXN8

EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15

EXP_TXP0

EXP_TXP1

EXP_TXP2

EXP_TXP3

EXP_TXP4

EXP_TXP5

EXP_TXP6

EXP_TXP7

EXP_TXP8

EXP_TXP9

EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

D36 D34

PEG_RXN0

E30

PEG_RXN1

F34

PEG_RXN2

G30

PEG_RXN3

H34

PEG_RXN4

J30

PEG_RXN5

K34

PEG_RXN6

L30

PEG_RXN7

M34

PEG_RXN8

N30

PEG_RXN9

P34

PEG_RXN10

R30

PEG_RXN11

T34

PEG_RXN12

U30

PEG_RXN13

V34

PEG_RXN14

W30

PEG_RXN15

Y34

PEG_RXP0

D30

PEG_RXP1

E34

PEG_RXP2

F30

PEG_RXP3

G34

PEG_RXP4

H30

PEG_RXP5

J34

PEG_RXP6

K30

PEG_RXP7

L34

PEG_RXP8

M30

PEG_RXP9

N34

PEG_RXP10

P30

PEG_RXP11

R34

PEG_RXP12

T30

PEG_RXP13

U34

PEG_RXP14

V30

PEG_RXP15

W34

TXN0

E32

TXN1

F36

TXN2

G32

TXN3

H36

TXN4

J32

TXN5

K36

TXN6

L32

TXN7

M36

TXN8

N32

TXN9

P36

TXN10

R32

TXN11

T36

TXN12

U32

TXN13

V36

TXN14

W32

TXN15

Y36

TXP0

D32

TXP1

E36

TXP2

F32

TXP3

G36 H32

TXP5

J36

TXP6

K32

TXP7

L36 M32

TXP9

N36

TXP10

P32

TXP11

R36

TXP12

T32

TXP13

U36

TXP14

V32

TXP15

W36

2D5V_S0

GMCH (2 of 5)

Leopard2

R473

PEG_RXN[15..0] 13

PEG_RXP[15..0] 13

1 2

PEG_TXN0

SCD1U16V

PEG_TXN1

SCD1U16V

PEG_TXN2

SCD1U16V

PEG_TXN3

SCD1U16V

PEG_TXN4

SCD1U16V

PEG_TXN5

SCD1U16V

PEG_TXN6

SCD1U16V

PEG_TXN7

SCD1U16V

PEG_TXN8

SCD1U16V

PEG_TXN9

SCD1U16V

PEG_TXN10

SCD1U16V

PEG_TXN11

SCD1U16V

PEG_TXN12

SCD1U16V

PEG_TXN13

SCD1U16V

PEG_TXN14

SCD1U16V

PEG_TXN15

SCD1U16V

PEG_TXP0

SCD1U16V

PEG_TXP1

SCD1U16V

PEG_TXP2

SCD1U16V

PEG_TXP3

SCD1U16V

PEG_TXP4TXP4

SCD1U16V

PEG_TXP5

SCD1U16V

PEG_TXP6

SCD1U16V

PEG_TXP7

SCD1U16V

PEG_TXP8TXP8

SCD1U16V

PEG_TXP9

SCD1U16V

PEG_TXP10

SCD1U16V

PEG_TXP11

SCD1U16V

PEG_TXP12

SCD1U16V

PEG_TXP13

SCD1U16V

PEG_TXP14

SCD1U16V

PEG_TXP15

SCD1U16V

C372

C372 C107

C107 C387

C387 C108

C108 C386

C386 C116

C116 C409

C409 C118

C118 C410

C410 C117

C117 C430

C430 C131

C131 C429

C429 C130

C130 C452

C452 C142

C142 C373

C373 C97

C97 C389

C389 C106

C106 C388

C388 C105

C105 C407

C407 C119

C119 C408

C408 C115

C115 C431

C431 C129

C129 C432

C432 C132

C132 C453

C453 C143

C143

When High 1K Ohm

1 2

R470 DUMMY-R2R470 DUMMY-R2

1 2

R497 DUMMY-R2R497 DUMMY-R2

1 2

R496 DUMMY-R2R496 DUMMY-R2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

747Thursday, July 07, 2005

E

PEG_TXN[15..0]

PEG_TXP[15..0]

of

24D9R2F

13

1D5V_S0

12

CFG18 CFG19 CFG20

-1

A

4 4

U19C

M_A_DQ[63..0]11

3 3

2 2

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AG35 AH35

AL35 AL37

AH36

AJ35

AK37

AL34 AM36 AN35 AP32 AM31 AM34 AM35

AL32 AM32 AN31 AP31 AN28 AP28

AL30 AM30 AM28

AL28 AP27 AM27 AM23 AM22

AL23 AM24 AN22 AP22

AM9

AL9 AL6

AP7 AP11 AP10

AL7

AM7 AN5 AN6 AN3

AP3

AP6

AM6

AL4

AM3

AK2

AK3

AG2 AG1

AL3

AM2 AH3 AG3

AF3

AE3

AD6 AC4

AF2

AF1

AD4 AD5

U19C

SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63

ALVISO-GM

SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#

DDR SYSTEM MEMORY A

SA_RCVENIN#

SA_RCVENOUT#

SA_BS0# SA_BS1# SA_BS2#

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13

SA_CAS# SA_RAS#

SA_WE#

B

AK15 AK16 AL21

AJ37 AP35 AL29 AP24 AP9 AP4 AJ2 AD3

AK36 AP33 AN29 AP23 AM8 AM4 AJ1 AE5

AK35 AP34 AN30 AN23 AN8 AM5 AH1 AE4

AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15

AN15 AP16 AF29 AF28 AP15

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

GMCH_TP48 GMCH_TP49

M_A_BS#0 11,12 M_A_BS#1 11,12 M_A_BS#2 11,12 M_A_DM[7..0] 11

M_A_DQS[7..0] 11

M_A_DQS#[7..0] 11

M_A_A[13..0] 11,12

M_A_CAS# 11,12 M_A_RAS# 11,12

TP29 TPAD30TP29 TPAD30 TP28 TPAD30TP28 TPAD30

M_A_WE# 11,12

C

M_B_DQ[63..0]11

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AE31 AE32 AG32 AG36 AE34 AE33

AF31

AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31

AJ31 AK30

AJ30 AH29 AH28 AK29 AH30 AH27 AG28

AF24 AG23

AJ22 AK22 AH24 AH23 AG22

AJ21 AG10

AG9 AG8

AH8 AH11 AH10

AJ9

AK9

AJ7

AK6

AJ4 AH5 AK8

AJ8

AJ5 AK4 AG5 AG4 AD8 AD9 AH4 AG6 AE8 AD7 AC5 AB8 AB6 AA8 AC8 AC7 AA4 AA5

U19D

SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37 SBDQ38 SBDQ39 SBDQ40 SBDQ41 SBDQ42 SBDQ43 SBDQ44 SBDQ45 SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63

ALVISO-GM

D

SB_BS0# SB_BS1# SB_BS2#

SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7

SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

DDR SYSTEM MEMORY B

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13

SB_CAS# SB_RAS#

SB_RCVENIN#

SB_RCVENOUT#

SB_WE#

AJ15 AG17 AG21

AF32 AK34 AK27 AK24 AJ10 AK5 AE7 AB7

AF34 AK32 AJ28 AK23 AM10 AH6 AF8 AB4

AF35 AK33 AK28 AJ23 AL10 AH7 AF7 AB5

AH17 AK17 AH18 AJ18 AK18 AJ19 AK19 AH19 AJ20 AH20 AJ16 AG18 AG20 AG15

AH14 AK14 AF15 AF14 AH16

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

GMCH_TP50 GMCH_TP51

E

M_B_BS#0 11,12 M_B_BS#1 11,12 M_B_BS#2 11,12 M_B_DM[7..0] 11

M_B_DQS[7..0] 11

M_B_DQS#[7..0] 11

M_B_A[13..0] 11,12

M_B_CAS# 11,12 M_B_RAS# 11,12

TP27 TPAD30TP27 TPAD30 TP26 TPAD30TP26 TPAD30

M_B_WE# 11,12

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

GMCH (3 of 5)

Leopard2

E

847Thursday, July 07, 2005

of

-1

A

4 4

1D5V_DLVDS_S0

3 3

H17

B26

3D3V_S0 2D5V_S0

U59

2

VOUT

3

12

C359

C359 SCD1U10V2MX-1

SCD1U10V2MX-1

VIN

1

GND

APL5308-25AC-TR

12

C63

U19E

F17

E17

D18

C18

F18

E18

H18

VCCA_TVDACA0

VCCA_TVDACA1

VCCA_TVBG

VCCA_TVDACB0

VCCA_TVDACB1

VCCA_TVDACC0

VCCA_TVDACC1

G18

VSSA_TVBG

D19

B25

VCCD_LVDS0

VCCD_TVDAC

VCCDQ_TVDAC

B

G10

AE26

AP25

VCCSM15

12

AN25

AM25

VCCSM16

VCCSM17

1 2

C75

C75 SC10U10V5ZY-L

SC10U10V5ZY-L

AL25

AK25

AJ25

AH25

VCCSM18

VCCSM19

VCCSM20

VCCSM21

POWER

GAP-CLOSE-PWR

AG25

VCCSM22

VCCSM23

12

C76

C76 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C160

C160 SCD1U10V2MX-1

SCD1U10V2MX-1

Note: All VCCSM

C161

C161 SCD1U10V2MX-1

SCD1U10V2MX-1

V1.8_DDR_CAP5

AP29

AD28

AD27

AC27

VCCSM1

VCCSM2

VCCSM3

VCCSM4

VCCSM5

pins shorted internally

1 2

AP26

AN26

AM26

AL26

VCCSM6

VCCSM7

VCCSM8

VCCSM9

C165

C165 SCD1U10V2MX-1

SCD1U10V2MX-1

AK26

AJ26

AH26

AG26

AF26

VCCSM10

VCCSM11

VCCSM12

VCCSM13

VCCSM14

12

V1.8_DDR_CAP1

V1.8_DDR_CAP2

A25

A35

VCCD_LVDS1

VCCD_LVDS2

AM37

AH37

B22

B21

A21

VCCHV0

VCCHV1

VCCHV2

VCCA_LVDS

VCCSM0

AF25

AE25

VCCSM24

2D5V_S02D5V_TVDAC_S0

AE24

AE23

VCCSM25

VCCSM26

C

12

C449

C449 SC10U10V5ZY-L

SC10U10V5ZY-L

AE22

AE21

AE20

AE19

VCCSM27

VCCSM28

VCCSM29

VCCSM30

1D5V_S0

2D5V_S0 2D5V_ALVDS_S0

2D5V_S0 2D5V_TXLVDS_S0

G11

1 2

GAP-CLOSE-PWR

G13

1 2

GAP-CLOSE-PWR

G12

1 2

GAP-CLOSE-PWR

12

C79

C79 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C84

C84 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C81

C81 SCD1U10V2MX-1

SCD1U10V2MX-1

FOR DDR2

12

C447

C447 SC10U10V5ZY-L

SC10U10V5ZY-L

AE18

AE17

AE16

VCCSM31

VCCSM32

VCCSM33

AE15

AE14

VCCSM34

VCCSM35

12

TC9

TC9 ST100U4VBM-U

ST100U4VBM-U

DY

AP13

AN13

AM13

AL13

AK13

AJ13

AH13

AG13

AF13

AE13

AP12

VCCSM36

VCCSM37

VCCSM38

VCCSM39

VCCSM40

VCCSM41

VCCSM42

VCCSM43

VCCSM44

VCCSM45

VCCSM46

VCCSM47

1D5V_DLVDS_S0

12

C80

C80 SC10U10V5ZY-L

SC10U10V5ZY-L

12

C83

C83 SCD01U16V3KX

SCD01U16V3KX

12

C82

C82 SC4D7U10V5ZY

SC4D7U10V5ZY

1D8V_S3

Note: All VCCSM

AN12

AM12

AL12

AK12

AJ12

AH12

VCCSM48

VCCSM49

VCCSM50

VCCSM51

VCCSM52

VCCSM53

pins shorted internally

C164

1 2

SCD1U10V2MX-1

AG12

AF12

AE12

AD11

AC11

AB11

VCCSM54

VCCSM55

VCCSM56

VCCSM57

VCCSM58

VCCSM59

AB10

VCCSM60

AB9

VCCSM61

D

V1.8_DDR_CAP6

AP8

VCCSM62

V1.8_DDR_CAP4

12

C159

C159 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C158

C158 SCD1U10V2MX-1

SCD1U10V2MX-1

2D5V_TXLVDS_S02D5V_ALVDS_S0

V1.8_DDR_CAP3

AM1

AE1

B28

VCCSM63

VCCSM64

VCCTX_LVDS0

E

1D5V_S01D5V_DDRDLL_S0

G15

1 2

12

C472

C472 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C385

C385 SC10U10V5ZY-L

SC10U10V5ZY-L

R37

VCC3G2

VCC3G3

N37

L37

VCC3G4

J37

VCC3G5

VCC3G6

Y29

VCCA_3GPLL0

AE37

W37

AF20

AP19

A28

A27

VCCA_SM0

VCCTX_LVDS1

VCCTX_LVDS2

U37

AF19

AF18

VCC3G0

VCC3G1

VCCA_SM1

VCCA_SM2

VCCA_SM3

GAP-CLOSE-PWR

C166

C166 ST100U6D3VM-U

ST100U6D3VM-U

C451

C451 SC10U10V5ZY-L

SC10U10V5ZY-L

Y28

12

TC22

TC22 ST100U6D3VM-U

ST100U6D3VM-U

DY

1D5V_3GPLL_S0

1 2

12

C473

C473 SC10U10V5ZY-L

SC10U10V5ZY-L

C450

C450 SCD1U10V2MX-1

SCD1U10V2MX-1

2D5V_3GBG_S0 2D5V_S0

12

Y27

G37

F37

VSSA_3GBG

VCCA_3GBG

VCCA_3GPLL2

VCCA_3GPLL1

1D5V_S01D5V_PCIE_S0

G55

1 2

GAP-CLOSE-PWR

1D5V_S0

G54

GAP-CLOSE-PWR

G14

1 2

C96

GAP-CLOSE-PWR

SCD1U10V2MX-1

VCC0

VCC1

VCC2

VCC3

VCC4

VCC5

VCC6

VCC7

VCC8

VCC9

VCC10

VCC11

VCC12

VCC13

VCC14

VCC15

VCC16

VCC17

VCC18

VCC19

VCC20

VCC21

VCC22

VCC23

VCC24

VCC25

VCC26

VCC27

VCC28

VCC29

VCC30

VCC31

VCC32

VCC33

VCC34

VCC35

VCC36

VCC37

VCC38

VCC39

VCC40

VCC41

VCC42

VCC43

VCC44

VCC45

VCC46

VCC47

VCC48

VCCH_MPLL1

VCCH_MPLL0

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_CRTDAC0

VCCA_CRTDAC1

VSSA_CRTDAC

VCC_SYNC

VTT0

VTT1

VTT2

VTT3

VTT4

VTT5

VTT6

VTT7

VTT8

VTT9

VTT10

VTT11

VTT12

VTT13

VTT14

VTT15

VTT16

VTT17

VTT18

VTT19

VTT20

VTT21

VTT22

SC4D7U6D3V5KX

2 2

CORE_GMCH_S0

12

1 1

12

C448

C448 SC10U10V5ZY-L

SC10U10V5ZY-L

12

C403

C403 SC10U10V5ZY-L

SC10U10V5ZY-L

A

C404

SC10U10V5ZY-L

12

J29

T29

K29

R29

N29

M29

12

C406

C406 SCD1U10V2MX-1

SCD1U10V2MX-1

T28

V28

P28

U28

R28

N28

GMCH_CORE_VCC

C405

C405 SCD1U10V2MX-1

SCD1U10V2MX-1

J28

L28

K28

H28

M28

12

C428

C428 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_S0

12

G53

GAP-CLOSE-PWR

G28

T27

V27

U27

B

L27

P27

R27

N27

M27

L2

1 2

IND-D1UH

L31

1 2

IND-D1UH

L11

1 2

IND-D1UH

L13

1 2

IND-D1UH

K27

J27

H27

J25

K26

K25

H26

12

C78

C78 SC10U6D3V5MX

SC10U6D3V5MX

DY

12

C370

C370 SC10U6D3V5MX

SC10U6D3V5MX

DY

12

C139

C139 SC10U6D3V5MX

SC10U6D3V5MX

DY

12

C153

C153 SC10U6D3V5MX

SC10U6D3V5MX

DY

K24

T20

K23

K22

K21

K20

U20

W20

12

V19

K19

V18

U19

W18

1D5V_HMPLL_S0

1D5V_DPLLA_S0

C77

C77 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_DPLLB_S0

C371

C371 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_HPLL_S0

C141

C141 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_MPLL_S0

C140

C140 SCD1U10V2MX-1

SCD1U10V2MX-1

T18

K18

K17

AC2

F19

B23

AC1

E19

C35

AA1

AA2

G19

C

J13

K13

K12

H20

W11

VCCP_GMCH_S0

12

C103

SCD1U10V2MX-1

V11

U11

2D5V_S0

T11

P11

R11

N11

R55 10R2R55 10R2

12

C102

ST100U6D3VM-U

L11

K11

M11

W10

1 2

12

T10

V10

U10

R10

C114

C114 SC10U10V6ZY-U

SC10U10V6ZY-U

VTT23Y9VTT24W9VTT25U9VTT26R9VTT27P9VTT28N9VTT29M9VTT30L9VTT31J9VTT32N8VTT33M8VTT34N7VTT35M7VTT36N6VTT37M6VTT38A6VTT39N5VTT40M5VTT41N4VTT42M4VTT43N3VTT44M3VTT45N2VTT46M2VTT47B2VTT48V1VTT49N1VTT50M1VTT51

J10

P10

K10

N10

M10

VCCP_GMCH_CAP1

12

C74

C74 SCD47U16V3ZY

SCD47U16V3ZY

VCCP_GMCH_S0

D6

21

SSM5818SL

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

D

Date: Sheet of

12

C73

C73 SCD47U16V3ZY

SCD47U16V3ZY

12

C427

C427 SC4D7U10V5ZY

SC4D7U10V5ZY

GMCH (4 of 5)

G1

VCCP_GMCH_CAP2

VCCP_GMCH_CAP3

VCCP_GMCH_CAP4

12

C127

C104

C104 SCD22U16V3ZY

SCD22U16V3ZY

12

C426

C426 SC4D7U10V5ZY

SC4D7U10V5ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

947Thursday, July 07, 2005

E

-1

A

4 4

L29

H29

G29

F29

E29

D29

A29

AC28

AB28

AA28

W28

E28

AN27

AL27

AJ27

AG27

AF27

AB27

AA27

W27

G27

E27

B27

J26

G26

E26

A26

AN24

U19F

ALVISO-GM

3 3

AL24

VSS109

VSS110

VSS111

VSS112

VSS113

VSS114

VSS115

VSS116

VSS117

VSS118

VSS119

VSS120

VSS121

VSS122

VSS123

VSS124

VSS125

VSS126

VSS127

VSS128

VSS129

VSS261

VSS262

VSS263

VSS264

VSS265

VSS266

VSS267

VSS259P2VSS258T2VSS257V2VSS256

VSS255

VSS254

VSS253

VSS252

VSS251A3VSS250C3VSS249

VSS248

VSS247

VSS246

AA3

AB3

AC3

VSS245C4VSS244H4VSS243L4VSS242P4VSS241U4VSS240Y4VSS239

AJ3

AF4

AN4

VSSALVDS

B36

VSS260L2VSS268J2VSS269G2VSS270D2VSS271

Y1

AL2

AE2

AD2

AH2

AN2

B

W31

V31

U31

T31

R31

P31

N31

M31

L31

K31

J31

H31

G31

F31

E31

D31

AP30

AE30

AC30

AB30

AA30

Y30

C30

AM29

AJ29

AG29

AD29

AA29

W29

V29

U29

P29

VSS76

VSS77

VSS78

VSS79

VSS80

VSS81

VSS82

VSS83

VSS84

VSS85

VSS86

VSS87

VSS88

VSS89

VSS90

VSS91

VSS92

VSS93

VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

VSS102

VSS103

VSS104

VSS105

VSS106

VSS107

VSS108

VSS238

VSS237E5VSS236W5VSS235

VSS234

AL5

AP5

VSS233B6VSS232J6VSS231L6VSS230P6VSS229T6VSS228

AA6

VSS227

VSS226

VSS225

VSS224G7VSS223V7VSS222

VSS221

VSS220

VSS219

VSS218C8VSS217E8VSS216L8VSS215P8VSS214Y8VSS213

AJ6

AE6

AA7

AC6

AK7

AN7

AG7

VSS212A9VSS211H9VSS210K9VSS209T9VSS208V9VSS207

AL8

AA9

VSS206

AC9

AD31

AE9

VSS75

VSS205

AG31

VSS74

VSS

VSS204

AH9

C

AA34

C34

AL33

AF33

AD33

W33

V33

U33

T33

R33

P33

N33

M33

L33

K33

J33

H33

G33

F33

E33

D33

AN32

AJ32

AD32

AC32

AB32

AA32

Y32

C32

A32

AL31

VSS44

VSS45

VSS46

VSS47

VSS48

VSS49

VSS50

VSS51

VSS52

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

VSS67

VSS68

VSS69

VSS70

VSS71

VSS72

VSS73

VSS196

VSS195

VSS194

VSS193

VSS192

VSS191

VSS190

VSS189

VSS188

VSS187

VSS186

VSS185

VSS184

VSS183

VSS182

VSS181

VSS180

VSS179

VSS178

VSS177

VSS176

VSS175

VSS203

VSS202

VSS201

VSS200

VSS199

VSS198

VSS197

J12

L10

F11

Y11

Y10

D10

AN9

H11

AA11

AA10

B12

AJ11

AL11

AF11

AN11

AG11

D12

J14

F14

A14

B14

K14

AJ14

AG14

VSS174

K15

A16

C15

D16

AL14

H16

AN14

D

AJ36

AF36

AE36

AD36

AC36

AB36

AA36

C36

AE35

Y35

W35

V35

U35

T35

R35

P35

N35

M35

L35

K35

J35

H35

G35

F35

E35

D35

B35

AN34

AH34

AD34

AC34

AB34

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS37

VSS38

VSS39

VSS40

VSS41

VSS42

VSS43

VSS173

VSS172

VSS171

VSS170

VSS169

VSS168

VSS167

VSS166

VSS165

VSS164

VSS163

VSS162

VSS161

VSS160

VSS159

VSS158

VSS157

VSS156

VSS155

VSS154

VSS153

VSS152

VSS151

VSS150

VSS149

VSS148

VSS147

VSS146

VSS145

VSS144

VSS143

VSS142

VSS141

J19

K16

AL16

C17

G17

A18

B18

AJ17

AF17

AN17

U18

T19

C19

H19

W19

AL18

F20

G20

F21

V20

A22

C21

AK20

E22

D22

AF21

AN21

A20

E20

D20

AN19

AG19

E

AL36

K37

H37

E37

AN36

VSS7

VSS8

VSS9

VSS10

VSS140

VSS139

VSS138

VSS137

J22

H23

AL22

AF23

AH22

M37

VSS6

VSS136

B24

P37

VSS5

VSS135

D24

T37

VSS4

VSS134

F24

V37

VSS3

VSS133

J24

Y37

VSS2

VSS132

AG24

AG37

VSS1

VSS131

AJ24

VSS0

VSS130

VCC_NCTF6

VSS_NCTF6

P26

VCC_NCTF5

VSS_NCTF5

Y25

R26

AA25

VCC_NCTF4

VSS_NCTF4

T26

VCC_NCTF3

VSS_NCTF3

AB25

CORE_GMCH_S0

W26

V26

U26

VCC_NCTF0

VCC_NCTF1

VCC_NCTF2

VSS_NCTF2

VSS_NCTF1

VSS_NCTF0

Y26

AA26

AB26

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

GMCH (5 of 5)

Leopard2

10 47Thursday, July 07, 2005

E

-1

of

-1

AD14

AC14

AD13

VCCSM_NCTF24

VCCSM_NCTF25

VCCSM_NCTF26

VCCSM_NCTF27

VCCP_GMCH_S0

FOR DDR2

AC18

AD17

AC17

AD16

AC16

AD15

AC15

VCCSM_NCTF17

VCCSM_NCTF18

VCCSM_NCTF19

VCCSM_NCTF20

VCCSM_NCTF21

VCCSM_NCTF22

VCCSM_NCTF23

AD21

AC21

AD20

AC20

AD19

AC19

AD18

VCCSM_NCTF13

VCCSM_NCTF14

VCCSM_NCTF15

VCCSM_NCTF16

AD23

AC23

AD22

AC22

VCCSM_NCTF7

VCCSM_NCTF8

VCCSM_NCTF9

VCCSM_NCTF10

VCCSM_NCTF11

VCCSM_NCTF12

VTT_NCTF17

VTT_NCTF16

VTT_NCTF15

VTT_NCTF14

VTT_NCTF13

L12

T12

P12

N12

R12

M12

B

VCCSM_NCTF6

VTT_NCTF12

AC24

U12

VCCSM_NCTF5

VTT_NCTF11

AD24

V12

AC25

VCCSM_NCTF4

VTT_NCTF10

W12

VCCSM_NCTF3

VTT_NCTF9

AD26

AC26

AD25

L13

VCCSM_NCTF2

VTT_NCTF8

M13

VCCSM_NCTF1

VTT_NCTF7

N13

VCCSM_NCTF0

VTT_NCTF6

N17

M17

L17

VCC_NCTF77

VCC_NCTF78

VTT_NCTF5

VTT_NCTF4

VTT_NCTF3

T13

P13

R13

U13

VCC_NCTF76

VTT_NCTF2

L18

W17

V17

U17

T17

P17

V13

VCC_NCTF75

VTT_NCTF1

W13

VCC_NCTF74

VTT_NCTF0

M18

VCC_NTTF69

VCC_NCTF70

VCC_NCTF71

VCC_NCTF72

VCC_NCTF73

N18

Y12

N19

M19

L19

Y18

R18

P18

VCC_NCTF63

VCC_NCTF64

VCC_NCTF65

VCC_NCTF66

VCC_NCTF67

VCC_NCTF68

VSS_NCTF68

VSS_NCTF67

VSS_NCTF66

VSS_NCTF65

VSS_NCTF64

VSS_NCTF63

L14

Y13

N14

M14

AA12

AA13

N20

M20

L20

Y19

R19

P19

VCC_NCTF56

VCC_NCTF57

VCC_NCTF58

VCC_NCTF59

VCC_NCTF60

VCC_NCTF61

VCC_NCTF62

NCTF

VSS_NCTF62

VSS_NCTF61

VSS_NCTF60

VSS_NCTF59

VSS_NCTF58

VSS_NCTF57

VSS_NCTF56

T14

P14

V14

R14

U14

W14

P21

N21

M21

L21

Y20

R20

P20

VCC_NCTF53

VCC_NCTF54

VCC_NCTF55

VSS_NCTF55

VSS_NCTF54

VSS_NCTF53

L15

Y14

AA14

AB14

C

V21

U21

T21

VCC_NCTF49

VCC_NCTF50

VCC_NCTF51

VCC_NCTF52

VCC_NCTF47

VCC_NCTF48

VSS_NCTF52

VSS_NCTF51

VSS_NCTF50

VSS_NCTF49

VSS_NCTF48

VSS_NCTF47

T15

P15

N15

R15

U15

M15

R22

P22

N22

M22

L22

W21

VCC_NCTF41

VCC_NCTF42

VCC_NCTF43

VCC_NCTF44

VCC_NCTF45

VCC_NCTF46

VSS_NCTF46

VSS_NCTF45

VSS_NCTF44

VSS_NCTF43

VSS_NCTF42

VSS_NCTF41

L16

V15

Y15

W15

AA15

AB15

M23

L23

W22

V22

U22

T22

VCC_NCTF35

VCC_NCTF36

VCC_NCTF37

VCC_NCTF38

VCC_NCTF39

VCC_NCTF40

VSS_NCTF40

VSS_NCTF39

VSS_NCTF38

VSS_NCTF37

VSS_NCTF36

VSS_NCTF35

T16

P16

N16

R16

U16

M16

V23

U23

T23

R23

P23

N23

VCC_NCTF29

VCC_NCTF30

VCC_NCTF31

VCC_NCTF32

VCC_NCTF33

VCC_NCTF34

VSS_NCTF34

VSS_NCTF33

VSS_NCTF32

VSS_NCTF31

VSS_NCTF30

VSS_NCTF29

V16

Y16

R17

W16

AA16

AB16

R24

P24

N24

M24

L24

W23

VCC_NCTF23

VCC_NCTF24

VCC_NCTF25

VCC_NCTF26

VCC_NCTF27

VCC_NCTF28

VSS_NCTF28

VSS_NCTF27

VSS_NCTF26

VSS_NCTF25

VSS_NCTF24

VSS_NCTF23

Y17

AA17

AB17

AA18

AB18

AA19

M25

L25

W24

V24

U24

T24

VCC_NCTF17

VCC_NCTF18

VCC_NCTF19

VCC_NCTF20

VCC_NCTF21

VCC_NCTF22

VSS_NCTF22

VSS_NCTF21

VSS_NCTF20

VSS_NCTF19

VSS_NCTF18

VSS_NCTF17

Y21

R21

AB19

AA20

AB20

AA21

D

V25

U25

T25

R25

P25

N25

VCC_NCTF13

VCC_NCTF14

VCC_NCTF15

VCC_NCTF16

VSS_NCTF16

VSS_NCTF15

VSS_NCTF14

VSS_NCTF13

Y22

AB21

AA22

AB22

N26

M26

L26

W25

VCC_NCTF7

VCC_NCTF8

VCC_NCTF9

VCC_NCTF10

VCC_NCTF11

VCC_NCTF12

VSS_NCTF12

VSS_NCTF11

VSS_NCTF10

VSS_NCTF9

VSS_NCTF8

VSS_NCTF7

Y23

Y24

AA23

AB23

AA24

AB24

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Date: Sheet

1D8V_S3

AC13

AB13

AD12

AC12

U19H

2 2

ALVISO-GM

1 1

A

AB12

VCCSM_NCTF28

VCCSM_NCTF29

VCCSM_NCTF30

VCCSM_NCTF31

A

DM2

M_B_A[13..0]8,12

4 4

M_B_BS#28,12 M_B_BS#08,12

M_B_BS#18,12

M_B_DQ[63..0]8

3 3

2 2

M_B_DQS#[7..0]8

M_B_DQS[7..0]8

1 1

M_ODT27,12 M_ODT37,12

12

SC2D2U6D3V3MX-1

C548

12

BC123

BC123 SCD1U16V

SCD1U16V

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

102 101 100

99 98 97 94 92 93 91

105

90 89

116

86 84 85

107 106

17 19

14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74

76 123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

11

29

49

68 129 146 167 186

13

31

51

70 131 148 169 188

114 119

202

DM2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

5

DQ0

7

DQ1 DQ2 DQ3

4

DQ4

6

DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

/DQS0 /DQS1 /DQS2 /DQS3 /DQS4 /DQS5 /DQS6 /DQS7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

1

VREF

2

VSS GND

DDR2-200P-4

/RAS

/WE

/CAS /CS0

/CS1

CKE0 CKE1

CK0

/CK0

CK1

/CK1 DM0

DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

NORMAL TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

Hi 9.2 mm

A

B

108 109 113

110 115

79 80

30 32

164 166

M_B_DM0

10

M_B_DM1

26

M_B_DM2

52

M_B_DM3

67

M_B_DM4

130

M_B_DM5

147

M_B_DM6

170

M_B_DM7

185 195

197 199 198

200 50

69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201

1 2

R229

12

R230

R230 10KR2

10KR2

1D8V_S3

10KR2

M_B_RAS# 8,12 M_B_WE# 8,12 M_B_CAS# 8,12

M_CS#2 7,12 M_CS#3 7,12

M_CKE2 7,12 M_CKE3 7,12

M_CLK_DDR3 7 M_CLK_DDR#3 7

M_CLK_DDR4 7 M_CLK_DDR#4 7 M_B_DM[7..0] 8

SMBD_ICH 3,24 SMBC_ICH 3,24

3D3V_S0

12

BC122

SCD1U16V

12

Place near DM1

M_CLK_DDR4

12

C231

C231 SC10P50V2JN-1

SC10P50V2JN-1

DY

M_CLK_DDR#4 M_CLK_DDR3

12

C244

C244 SC10P50V2JN-1

SC10P50V2JN-1

DY

M_CLK_DDR#3

High 9.2mm

B

C

M_A_DQ[63..0]8

3D3V_S0

C547

C547 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

DY

M_A_DQS#[7..0]8

M_A_DQS[7..0]8

DDR_VREF_S3DDR_VREF_S3

SBSB

C

M_A_A[13..0]8,12

M_A_BS#28,12 M_A_BS#08,12

M_A_BS#18,12

M_ODT07,12 M_ODT17,12

12

SC2D2U6D3V3MX-1

C205

12

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

BC43

BC43 SCD1U16V

SCD1U16V

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

102 101 100

99 98 97 94 92 93 91

105

90 89

116

86 84 85

107 106

5

7 17 19

4

6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76

123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

11 29 49 68

129 146 167 186

13 31 51 70

131 148 169 188

114 119

1

2

202

DM1

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

/DQS0 /DQS1 /DQS2 /DQS3 /DQS4 /DQS5 /DQS6 /DQS7

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF VSS

GND

DDR2-200P-5

Low5.2 mm

D

108

/RAS

109

/WE

113

/CAS

110

/CS0

115

/CS1

79

CKE0

80

CKE1

30

CK0

32

/CK0

164

CK1

166

/CK1 DM0

DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

VDDSPD

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

NORMAL TYPE

GND

D

SCL

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

M_A_DM0

10

M_A_DM1

26

M_A_DM2

52

M_A_DM3

67

M_A_DM4

130

M_A_DM5

147

M_A_DM6

170

M_A_DM7

185

SMBD_ICH

195

SMBC_ICH

197 199 198

200

12

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201

R175

R175 10KR2

10KR2

Title

Size Document Number Rev

Custom

Date: Sheet

12

1D8V_S3

M_A_RAS# 8,12 M_A_WE# 8,12 M_A_CAS# 8,12

M_CS#0 7,12 M_CS#1 7,12

M_CKE0 7,12 M_CKE1 7,12

M_CLK_DDR0 7 M_CLK_DDR#0 7

M_CLK_DDR1 7 M_CLK_DDR#1 7

M_A_DM[7..0] 8

BC44

SCD1U16V

R176

R176 10KR2

10KR2

Place near DM2

DY

DDR2 Socket

E

3D3V_S0

12

C220

C220 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

DY

M_CLK_DDR0

12

C511

C511 SC10P50V2JN-1

SC10P50V2JN-1

M_CLK_DDR#0 M_CLK_DDR1

12

C510

C510 SC10P50V2JN-1

SC10P50V2JN-1

M_CLK_DDR#1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2 -1

11 47Thursday, July 07, 2005

of

E

of

A

B

C

D

PARALLEL TERMINATION Decoupling Capacitor

E

Put decap near power(0.9V) and pull-up resistor

DDR_VREF

4 4

3 3

2 2

1 1

DDR_VREF

R561 56R2JR561 56R2J R608 56R2JR608 56R2J R562 56R2JR562 56R2J R609 56R2JR609 56R2J

RN30

A

RN28

8 7 6

SRN56-1

1 2 1 2 1 2 1 2

8 7 6

RN26

8 7 6

SRN56-1

SRN56-1 RN27

RN27

8 7 6

SRN56-1

SRN56-1 RN31

RN31

8 7 6

SRN56-1

SRN56-1 RN29

RN29

8 7 6

SRN56-1

SRN56-1 RN15

RN15

8 7 6

SRN56-1

SRN56-1 RN13

RN13

8 7 6

SRN56-1

SRN56-1 RN14

RN14

8 7 6

SRN56-1

SRN56-1 RN16

RN16

8 7 6

SRN56-1

SRN56-1 RN17

RN17

8 7 6

SRN56-1

SRN56-1 RN12

RN12

8 7 6

SRN56-1

1 2 3 45

SRN56-1

1 2 3 45

M_B_A10 M_B_A11

M_B_A1

M_A_A12 M_B_A3

M_B_A0 M_B_A2 M_B_A7

M_B_A13

M_B_A4 M_B_A6

M_B_A5 M_B_A8 M_B_A9 M_B_A12

M_A_A8 M_A_A1 M_A_A4 M_A_A2

M_A_A13 M_A_A10

M_A_A0 M_A_A3

M_A_A5 M_A_A11 M_A_A7 M_A_A6

M_A_A9

M_B_BS#1 8,11

M_CS#1 7,11 M_CS#3 7,11

M_B_BS#2 8,11

M_ODT2 7,11 M_ODT3 7,11

M_CS#2 7,11

M_B_RAS# 8,11 M_B_CAS# 8,11 M_B_WE# 8,11 M_B_BS#0 8,11

M_CKE2 7,11

M_CKE3 7,11

M_CS#0 7,11 M_ODT0 7,11

M_A_BS#1 8,11 M_A_RAS# 8,11

M_CKE0 7,11 M_A_BS#2 8,11 M_CKE1 7,11

M_A_WE# 8,11 M_A_BS#0 8,11 M_A_CAS# 8,11 M_ODT1 7,11

B

M_A_A[13..0] 8,11 M_B_A[13..0] 8,11

1D8V_S3

12

DY

Put decap near power(0.9V) and pull-up resistor

12

C554

C499

C499 SCD1U16V

SCD1U16V

DY

12

C553

C553 SCD1U16V

SCD1U16V

DY

12

C236

C236 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C233

C233 SCD1U16V

SCD1U16V

C554 SCD1U16V

SCD1U16V

C550

C550 SCD1U16V

SCD1U16V

12

DY

C

12

C193

C193 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C201

C201 SCD1U16V

SCD1U16V

DY

12

C235

C235 SCD1U16V

SCD1U16V

DY

C500

C500 SCD1U16V

SCD1U16V

C556

C556 SCD1U16V

SCD1U16V

Place these Caps near DM1

Place these Caps near DM2

12

C501

C501 SCD1U16V

SCD1U16V

12

C492

C492 SCD1U16V

SCD1U16V

12

C204

C204 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C192

C191

SCD1U16V

DY

C240

C240 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C241

C241 SCD1U16V

SCD1U16V

DY

12

DY

12

C242

SCD1U16V

12

C502

C502 SCD1U16V

SCD1U16V

12

C557

C557 SCD1U16V

SCD1U16V

12

C203

C203 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C202

C202 SCD1U16V

SCD1U16V

C243

C243 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

C551

C551 SCD1U16V

SCD1U16V

DY

C558

C558 SCD1U16V

SCD1U16V

12

C503

C503 SCD1U16V

SCD1U16V

12

C552

C552 SCD1U16V

SCD1U16V

DY

12

C232

C232 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

D

C555

C555 SCD1U16V

SCD1U16V

DY

C495

C495 SCD1U16V

SCD1U16V

12

C234

C234 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C200

C200 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

12

C493

C493 SCD1U16V

SCD1U16V

DY

12

C496

C496 SCD1U16V

SCD1U16V

12

C190

C190 SC2D2U6D3V3MX-1

SC2D2U6D3V3MX-1

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

12

C497

C497 SCD1U16V

SCD1U16V

DY

12

C504

C504 SCD1U16V

SCD1U16V

DDR2 Termination Resistor

C498

C498 SCD1U16V

SCD1U16V

DY

C559

C559 SCD1U16V

SCD1U16V

12

C494

C494 SCD1U16V

SCD1U16V

C560

C560 SCD1U16V

SCD1U16V

Leopard2 -1

C562

C562 SCD1U16V

SCD1U16V

12

C561

C561 SCD1U16V

SCD1U16V

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

12 47Thursday, July 07, 2005

of

A

12

R443

R443 1MR2

C65

1MR2

BC90

BC90 SC6P50V3DN

SC6P50V3DN

12

BC95

SC22P

4 4

SCD1U16V3KX

P2779A_XIN

X5

XTAL-27MHZ-3-U1

1 2

P2779A_XOUT

1 2

620R3F

R56

P2779A_LF

12

U57

1

XIN/CLKIN

2

XOUT

3

PD#

4

LF

P2779A-08ST

C64

C64 SC270P50V

SC270P50V

VDD REF

MODOUT

VSS

XTALIN_M24

adjust SWING at 1.2v

PEG_TXP[15..0]7 PEG_TXN[15..0]7

3 3

2 2

1 1

PEG_RXP[15..0]7 PEG_RXN[15..0]7

3D3V_S0

12

R504

R504 10KR2

10KR2

STERE0SYNC PWRGD_MASK

12

R503

R503 DUMMY-R2

DUMMY-R2

3D3V_S0

12

1 2

R481

R481 DUMMY-R2

DUMMY-R2

R480

R480 0R2-0

0R2-0

ATI suggest 0 ohm

DY

R525

M24_RST#22

PLT_RST1#7,24,26

1 2

0R2-0

0R2-0 R524

R524

1 2

0R2-0

U62

1

A

2

B GND3Y

NC7S08-U

VCC

LUMA_VGA18

CRMA_VGA18

COMP_VGA18

DDC_CLK & DATA level shift

3D3V_S03D3V_S0 3D3V_S0

12

R445

R445 4K7R2

4K7R2

VGA_DDCDATA DDC_DATA

VGA_DDCCLK DDC_CLK

12

A

R446

R446 4K7R2

4K7R2

2 3

G

S

12

R57

R57 0R2-0

0R2-0

1

Q37

Q37 2N7002

2N7002

D

Q38 2N7002

2 3

S

0703 -1

G

1

D

5

4

3D3V_S0

PERSTBPERSTB

R71

R71 150R2

150R2

3D3V_S0

12

R505

R505 4K7R2

4K7R2

1D2V_VDDR_S0

12

R73

R73 150R2

150R2

DDC_DATA 20

DDC_CLK 20

R506

R506 4K7R2

4K7R2

R74

R74 150R2

150R2

B

3D3V_SS_S0

8

P2779A_REF

7

VGA_GPIO16

6 5

EDID_CLK 19,25 EDID_DAT 19,25

DDC3_CLK 19,25 DDC3_DATA 19,25

R70 10KR2R70 10KR2

B

3D3V_S0

12

C360

C360 SCD1U16V

SCD1U16V

12

R444

R444 182R3F

182R3F

12

R474

R474 105R3F

105R3F

CLK_PCIE_PEG3

CLK_PCIE_PEG#3

R447 150R2FR447 150R2F

1 2

R520 100R2FR520 100R2F

1 2

R448 10KR2F-UR448 10KR2F-U

1 2 1 2

R98 10KR2R98 10KR2

1 2

715R3

R502

1 2 1 2

10KR2

R501

R99 1KR2R99 1KR2

1 2

R537 1KR2R537 1KR2

1 2

R138 1KR2R138 1KR2

1 2

R472

R472 0R5J-1

0R5J-1

PEG_RXP0 PEG_RXN0 PEG_RXP1 PEG_RXN1 PEG_RXP2 PEG_RXN2 PEG_RXP3 PEG_RXN3 PEG_RXP4 PEG_RXN4 PEG_RXP5 PEG_RXN5 PEG_RXP6 PEG_RXN6 PEG_RXP7 PEG_RXN7 PEG_RXP8 PEG_RXN8 PEG_RXP9 PEG_RXN9 PEG_RXP10 PEG_RXN10 PEG_RXP11 PEG_RXN11 PEG_RXP12 PEG_RXN12 PEG_RXP13 PEG_RXN13 PEG_RXP14 PEG_RXN14 PEG_RXP15 PEG_RXN15

SCD1U16V

SCD1U16V C110

C110

1 2

C109C109

C391C391

1 2

C392C392

C111C111

1 2

C112C112

C393C393

1 2

C390C390

C120C120

1 2

C121C121

C412C412

1 2

C414C414

C123C123

1 2

C122C122

C413C413

1 2

C411C411

C137C137

1 2

C134C134

C435C435

1 2

C436C436

C135C135

1 2

C133C133

C433C433

1 2

C434C434

C136C136

1 2

C146C146

C455C455

1 2

C456C456

C145C145

1 2

C147C147

C454C454

1 2

C457C457

PEG_TXP0

PEG_TXN0

PEG_TXP1

PEG_TXN1

PEG_TXP2

PEG_TXN2

PEG_TXP3

PEG_TXN3

PEG_TXP4

PEG_TXN4

PEG_TXP5

PEG_TXN5

PEG_TXP6

PEG_TXN6

PEG_TXP7

PEG_TXN7

PEG_TXP8

PEG_TXN8

PEG_TXP9

PEG_TXN9

PEG_TXP10

PEG_TXN10

PEG_TXP11

PEG_TXN11

PEG_TXP12

PEG_TXN12

PEG_TXP13

PEG_TXN13

PEG_TXP14

PEG_TXN14

PEG_TXP15

PEG_TXN15

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

PEG_CALRP PEG_CALRN PEG_CALI

PEG_TESTIN

PERSTB PWRGD_MASK

ATI_R2SET

DDC3_CLK DDC3_DATA

ATI_SSIN ATI_SSOUT

XTALIN_M24

TESTEN TEST_YCLK TEST_MCLK

STERE0SYNC

RXP0 RXN0 RXP1 RXN1 RXP2 RXN2 RXP3 RXN3 RXP4 RXN4 RXP5 RXN5 RXP6 RXN6 RXP7 RXN7 RXP8 RXN8 RXP9 RXN9 RXP10 RXN10 RXP11 RXN11 RXP12 RXN12 RXP13 RXN13 RXP14 RXN14 RXP15 RXN15

AH30 AG30 AG29

AF29 AE29 AE30 AD30 AD29 AC29 AB29 AB30 AA30 AA29

Y29 W29 W30

V30

V29

U29

T29

T30

R30

R29

P29

N29

N30 M30 M29

L29 K29 K30

J30

AF26 AE26 AC25 AB25 AC27 AB27 AC26 AB26

Y25

W25

Y27

W27

Y26

W26

U25 T25 U27 T27 U26 T26 P25 N25 P27 N27 P26 N26

L25

K25

L27

K27

L26

K26

AF27 AE27

AC23 AB24 AB23

AE25 AD25

AD24 AH21 AK21

AJ22 AK22

AJ24 AK24

AG22 AG23

AJ23 AH24

AH28

AJ29

AH27

AF25 AH25

M26-P-1

U20A

PCIE_RX0P PCIE_RX0N PCIE_RX1P PCIE_RX1N PCIE_RX2P PCIE_RX2N PCIE_RX3P PCIE_RX3N PCIE_RX4P PCIE_RX4N PCIE_RX5P PCIE_RX5N PCIE_RX6P PCIE_RX6N PCIE_RX7P PCIE_RX7N PCIE_RX8P PCIE_RX8N PCIE_RX9P PCIE_RX9N PCIE_RX10P PCIE_RX10N PCIE_RX11P PCIE_RX11N PCIE_RX12P PCIE_RX12N PCIE_RX13P PCIE_RX13N PCIE_RX14P PCIE_RX14N PCIE_RX15P PCIE_RX15N

PCIE_TX0P PCIE_TX0N PCIE_TX1P PCIE_TX1N PCIE_TX2P PCIE_TX2N PCIE_TX3P PCIE_TX3N PCIE_TX4P PCIE_TX4N PCIE_TX5P PCIE_TX5N PCIE_TX6P PCIE_TX6N PCIE_TX7P PCIE_TX7N PCIE_TX8P PCIE_TX8N PCIE_TX9P PCIE_TX9N PCIE_TX10P PCIE_TX10N PCIE_TX11P PCIE_TX11N PCIE_TX12P PCIE_TX12N PCIE_TX13P PCIE_TX13N PCIE_TX14P PCIE_TX14N PCIE_TX15P PCIE_TX15N

PCIE_REFCLKP PCIE_REFCLKN

PCIE_CALRP PCIE_CALRN PCIE_CALI

PCIE_TEST PERSTB

PERSTB_MASK R2SET Y_G

C_R_PR COMP_B_PB

H2SYNC V2SYNC

DDC3CLK DDC3DATA

SSIN SSOUT

XTALIN XTALOUT

TESTEN

E8

TEST_YCLK

B6

TEST_MCLK PLLTEST

STEREOSYNC

C

1 OF 6

AJ5

GPIO_0

AH5

GPIO_1

AJ4

GPIO_2

AK4

GPIO_3

AH4

GPIO_4

AF4

GPIO_5

AJ3

GPIO_6

AK3

GPIO_7

AH3

GPIO_8

AJ2

GPIO_9

AH2

GPIO_10

AH1

GPIO_11

AG3

GPIO_12

AG1

GPIO_13

AG2

GPIO_14

C6

GPIO_17

VREFG

TXCLK_LN TXCLK_LP

DIGON

BLON TX0M

TX0P

TX1M

TX1P

TX2M

TX2P TXCM TXCP

DDC2CLK

HPD1

HSYNC

VSYNC

RSET

DDC1CLK

DPLUS

DMINUS

AF3 AF2

AE10 AH6

AJ6 AK6 AH7 AK7 AJ7 AH8 AJ8 AH9 AJ9 AK9 AH10 AE6 AG6 AF6 AE7 AF7 AE8 AG8 AF8 AE9 AF9 AG10 AF10

AJ10 AK10 AJ11 AH11

AG4 AH15

AH16 AJ16 AJ17 AJ18 AK18 AJ20 AJ21 AK19 AJ19 AG16 AG17 AF16 AF17 AE18 AE19 AF19 AF20 AG19 AG20

AE12 AG12

AK13 AJ13 AJ14 AJ15 AK15 AK16 AJ12 AK12

AE13 AE14

AF12 AK27

R

AJ27

G

AJ26

B

AJ25 AK25

AH26 AG25

AF24 AG24 AF11

AE11

GPIO_PWRCNTL

GPIO_MEMSSIN

DVOVMODE DVPDATA_0

DVPDATA_1 DVPDATA_2 DVPDATA_3 DVPDATA_4 DVPDATA_5 DVPDATA_6 DVPDATA_7 DVPDATA_8 DVPDATA_9

DVO / EXT TMDS / GPIO

DVPDATA_10 DVPDATA_11 DVPDATA_12 DVPDATA_13 DVPDATA_14 DVPDATA_15 DVPDATA_16 DVPDATA_17 DVPDATA_18 DVPDATA_19 DVPDATA_20 DVPDATA_21 DVPDATA_22

PCI EXPRESS

DVPDATA_23

DVPCNTL_0 DVPCNTL_1 DVPCNTL_2 DVPCNTL_3

TXOUT_L0N TXOUT_L0P TXOUT_L1N TXOUT_L1P TXOUT_L2N TXOUT_L2P TXOUT_L3N TXOUT_L3P

TXOUT_U0N

TXOUT_U0P

LVDS

TXOUT_U1N

TXOUT_U1P

TXOUT_U2N

TXOUT_U2P

TXOUT_U3N

TXOUT_U3P

TXCLK_UN TXCLK_UP

DAC2

DDC2DATA

TMDS

SS

DAC1

DDC1DATA

CLK

GPIO_AUXWIN

THERM

VGA_GPIO0 VGA_GPIO1 VGA_GPIO2 VGA_GPIO3 VGA_GPIO4

VGA_GPIO5 VGA_GPIO6 VGA_GPIO7 VGA_GPIO8 VGA_GPIO9

VGA_GPIO10

VGA_GPIO11

VGA_GPIO12

VGA_GPIO13 VGA_GPIO14

VGA_GPIO16

DVOMODE

DY

R435 0R2-0

1 2

R434 0R2-0

1 2

DY

DVPCNTL_0

1 2

DVPCNTL_1

1 2

DVPCNTL_2

1 2

DVPCNTL_3

1 2

ATI_VREFG

R477

R478

150R2

1 2

ATI_RSET

VGA_DDCDATA VGA_DDCCLK

GPIO_AUXWIN

1 2

R515

SB

R479

R479 150R2

150R2

R499

R500

D

VGA_GPIO14

ATI_MODE_0 15 VGA_PWRCNTL 45

1 2

0R2-0

DVPDATA_0 15 DVPDATA_1 15 DVPDATA_2 15

EDID_DAT EDID_CLK

R78 0R2-0R78 0R2-0 R77 0R2-0R77 0R2-0 R75 0R2-0R75 0R2-0 R76 0R2-0R76 0R2-0

12

R513

R513 10KR2

10KR2

HPD

1 2

R514

1 2

499R3F

1 2

4K7R2

THERMDP_M24 25 THERMDN_M24 25

D

E

DY

1 2

R654 0R2-0

ATI_MODE_0

1 2

SB

VGA_ALERT# 25

R653

DVOMODE=VSS 3.3V MODE

0R2-0

DVOMODE=VDDC to 1.8V 1.8V MODE DVOMODE=GND NO USE DVPDATA

STRAPS

PLL_CAL_FORCE_EN PCIE_MODE(1:0) CAL_OFF BYPASS_PLL ICOMP DEBUG_ACCESS ROMIDCFG(3:0)

MULTIFUNC(1:0) VIP_DEVICE DWNGR0

ATI Ref. Datasheets(page 3-32) DOC.NO.:CHS-216M24-03

GPIO[0..13] are internal

12

R508

R508 100R2F

100R2F

R507

R507 100R2F

100R2F

pull-down.

VGA_GPIO0

R82

VGA_GPIO2 VGA_GPIO4 VGA_GPIO1 VGA_GPIO11 VGA_GPIO13 VGA_GPIO12 VGA_GPIO10 VGA_GPIO6 VGA_GPIO9 VGA_GPIO5 VGA_GPIO7 VGA_GPIO8 VGA_GPIO3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ATI(1 of 3)

Leopard2

E

3D3V_S0

TXAOUT0- 19 TXAOUT0+ 19 TXAOUT1- 19 TXAOUT1+ 19 TXAOUT2- 19 TXAOUT2+ 19

TXACLK- 19 TXACLK+ 19 TXBOUT0- 19 TXBOUT0+ 19 TXBOUT1- 19 TXBOUT1+ 19 TXBOUT2- 19 TXBOUT2+ 19

TXBCLK- 19 TXBCLK+ 19

LCDVDD_ON 19 BL_ON 36

VGA_RED 20 VGA_GREEN 20 VGA_BLUE 20

VGA_HSYNC 20 VGA_VSYNC 20

12

C381

C381 SCD1U16V

SCD1U16V

100KR2

Title

Size Document Number Rev

A3

Date: Sheet of

Date: Sheet

GPIO0CAL_BG_BACKUP GPIO1

GPIO(3:2)

GPIO4 GPIO5 GPIO6 GPIO8

GPIO(9,13:11)

LCDDATA(17:16) LCDDATA(20) LCDDATA(21)

(internal pull-down)

1 2

10KR2

DUMMY-R2

1 2

DY

R85

1 2

DY

R516

1 2

DY

R83

1 2

DY

R100

1 2

DY

R107

1 2

DY

R510

1 2

DY

R106

1 2

DY

R87

1 2

DY

R101

1 2

DY

R517

1 2

DY

R86

1 2

DY

R511

1 2

DY

R84

of

13 47Monday, July 11, 2005

3D3V_S0

R509

10KR2

10KR2 10KR2

10KR2

DEFAULTPIN

0000

00

3D3V_S0

12

0 0 00 0 0 0 0

0 0

-1

A

VRAM_VDDQ

12

C458

C424

SCD01U16V3KX

DY

4 4

VRAM_VDDQ VRAM_VDDQ

12

C422

C467

DY

SC1U10V3ZY

C344

SC1U10V3ZY

3 3

2D5V_S0

2 2

1 2

MLB-201209-11

1 1

VRAM_VDDQ

L37

1 2

MLB-201209-11

C400

SCD01U16V3KX

12

C461

DY

SC1U10V3ZY

3D3V_S0

12

1D8V_VGA_S0

L32

SC10U10V6ZY-U

12

C481

SC10U10V6ZY-U

12

SCD01U16V3KX

U55

1

SHDN#

2

GND

3

IN

G913C-U

1 2

MLB-201209-11

12

C364

1D8V_VGA_S0

VDDRH

12

C476

C476 SC1U10V3ZY

SC1U10V3ZY

A

12

C479

12

C486

LVDDR_2D8V

L33

12

C363

C363 SC1U10V3ZY

SC1U10V3ZY

MLB-201209-11

C468

SCD01U16V3KX

12

C470

C470 SC10U10V6ZY-U

SC10U10V6ZY-U

DY

SC10U10V6ZY-U

SET OUT

1 2

MLB-201209-11

C365

1D8V_VGA_S0

R449

A2VDD_2D5V

L25

1 2

MLB-201209-11

12

C347

SC10U10V6ZY-U

L3

1 2

12

C475

SCD01U16V3KX

C343

C343 SC22P

SC22P

LVDDR_2D8V

5 4

L4

SC10U10V6ZY-U

12

C376

SC10U10V6ZY-U

1 2

0R5J-1

C355

1D8V_VGA_S0

12

C396

SC1U10V3ZY

1 2

MLB-201209-11

12

C348

SC10U10V6ZY-U

12

C85

SC10U10V6ZY-U

12

SCD01U16V3KX

LVDDR_2D8V

12

2D8V_SET

12

C90

12

C377

SC1U10V3ZY

12

SC10U10V6ZY-U

A2VDDQ_1D8V

1D8V_VGA_S0

L26

12

C353

C353 SC1U10V3ZY

SC1U10V3ZY

PVDD_1D8V

12

C86

SC1U10V3ZY

12

C469

SCD01U16V3KX

12

R417

R417 124KR2F

124KR2F

12

R418

R418 100KR2F

100KR2F

LVDDR_2D8V_S0

12

C397

SCD1U16V2KX-1

LPVDD_1D8V

12

C378

SC1U10V3ZY

LVDDR_1D8V

12

C354

C398

SC1U10V3ZY

1D8V_VGA_S0

L36

1 2

MLB-201209-11

12

C464

12

C349

SC1U10V3ZY

SC100P

12

SC100P

AVDD_1D8V

L34

1 2

MLB-201209-11

SC10U10V6ZY-U

1.8V

SCD01U16V3KX

1.8V

VDDRH

C374

1.8V

MPVDD_1D8V

12

C477

B

2.8V

1.8V

2.5V

1.8V

VDD1DI_1D8V

12

C395

SC1U10V3ZY

12

C478

C478 SC1U10V3ZY

SC1U10V3ZY

B

A15 A21 A28

A3

A9 AA1 AA4 AA7 AA8

AD4

B1 B30 D11 D14 D17 D20 D23 D26

D5

D8 E27

F4 G10 G13 G15 G19 G22 G27

G7 H10 H13 H15 H17 H19 H22

J1 J4 J7

J8 K23 K24 L23

L8

M4

N4 N7 N8 R1 R4 T7 T8 V4 V7 V8

AE16 AE17 AE15

AF15

AH19 AH13

AF13 AF14

F18

N6

AF21

AE20

AF23

AH23

AE23 AE22

AK28

A7

1.8V

U20D

VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1

LVDDR_25 LVDDR_25 LVDDR_18 LVDDR_18

LPVDD TPVDD

TXVDDR TXVDDR

VDDRH0 VDDRH1

A2VDD A2VDD

A2VDDQ AVDD

VDD1DI VDD2DI

PVDD MPVDD

M26-P-1

4 OF 6

I/O

POWER

I/O

POWER

VDDC VDDC VDDC VDDC VDDC

VDD15 VDD15 VDD15 VDD15 VDD15 VDD15 VDD15 VDD15

VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3 VDDR3

VDDR4 VDDR4 VDDR4 VDDR4 VDDR4

PCIE_VDDR_12 PCIE_VDDR_12 PCIE_VDDR_12 PCIE_VDDR_12 PCIE_VDDR_12

PCIE_PVDD_12 PCIE_PVDD_12 PCIE_PVDD_12

PCIE_PVDD_18 PCIE_PVDD_18 PCIE_PVDD_18 PCIE_PVDD_18

NC#D9 NC#D13 NC#D19 NC#D25

NC#E4 NC#T4

NC#AB4

AVSSQ

LVSSR

LPVSS

TPVSS TXVSSR

TXVSSR TXVSSR

VSSRH0 VSSRH1

A2VSSN A2VSSN

A2VSSQ

AVSSN

VSS1DI VSS2DI

PVSS

MPVSS

1.2V

AC13 AC15 AC17 AD13 AD15

AC11 AC20 H11 H20 M23 P8 Y23 Y8

AC19 AC21 AC22 AC8 AD19 AD21 AD7

AC10 AC9 AD10 AD9 AG7

AG26 AG27 AG28 AJ30 AK29

N23 N24 P23

T23 U23 V23 W23

D9 D13 D19 D25 E4 T4 AB4

AD22 AF18

AG15 AG18 AH17

AH18 AH12

AG13 AG14 AH14

F19 M6

AH20 AG21

AF22 AH22

AE24 AE21

AJ28 A6

C

1.5V

3.3V

1.2V

1.8V

C

C421

SC10U10V6ZY-U

1D5V_1_S0

D9

1 2

2 1

1 2

12

C418

SC1U10V3ZY

12

C66

SC10U10V6ZY-U

PCIE_PVDD

3D3V_S0

12

C445

SCD01U16V3KX

DY

R669 0R2-0

R668 0R2-0R668 0R2-0

R60

1 2

GAP-CLOSE-PWR

12

C423

C423 SC1U10V3ZY

SC1U10V3ZY

C144

U14

APL1087

C69

C69 SC1U10V3ZY

SC1U10V3ZY

DY

12

C444

3D3V_S0

SSM5818SL

3D3V_VDDR3

12

C399

3D3V_VDDR4

PCIE_PVDD_1D8V

SC1U10V3ZY

Imax=1A

Vo=1.25/110*(110+48.7)=1.803V

D

1D2V_VGA_S0

12

C375

12

1 2 3

SCD01U16V3KX

12

SC1U10V3ZY

12

C465

DY

SCD1U16V3KX

12

C362

C394

SC1U10V3ZY

R126

1 2

GAP-CLOSE-PWR

12

C416

APL1085_ADJ

D

12

C446

SCD01U16V3KX

12

C68

C443

SCD1U16V3KX

1D2V_VGA_S0

12

C419

SC22U10V6ZY-L1

1D5V_1_S0

12

C466

1D2V_VDDR_S0

R475

1 2

GAP-CLOSE-PWR

1D2V_VDDR_S0

SCD01U16V3KX

12

C439

SCD01U16V3KX

1D8V_VGA_S0

12

R48

R48 110R3

110R3

12

R45

R45 48D7R3F

48D7R3F

C459

SCD01U16V3KX

SC1U10V3ZY

L28

1 2

MLB-201209-11

12

C350

12

C441

C442

SCD01U16V3KX

DY

SC

C67

1D5V_VGA_S0

1D5V_S0

1 2

GAP-CLOSE-PWR

PCIE_VDDR

12

EC119

DY

12

SC22U10V6ZY-L1

ADD ASIC DECOUPLING FOR ALL POWER AS REQUIRED

WITH AS MANY AS POSSIBLE PLACED UNDER THE ASIC

C67

3D3V_S0

R58

12

C361

SCD1U10V2MX-1

SC22U10V6ZY-L1

12

C437

C440

SC1U10V3ZY

12

C438

C415

SC1U10V3ZY

PLACED CLOSE TO THE POWER/GND PINS

ADJ/GND

VOUT

VIN

12

C462

SCD01U16V3KX

DY

12

C382

C463

12

SCD01U16V3KX

C98

C98 SC47U6D3V0ZY

SC47U6D3V0ZY

SC

12

C460

C417

C460

SC1U10V3ZY

PCIE_PVDD_18 PCIE_VDDR_12

/PCIE_PVDD_12

12

TC19

TC19 ST100U6D3VM-U

ST100U6D3VM-U

C420

SC1U10V3ZY

1D8V_VGA_S0

SC10U10V5ZY-L

Title

Size Document Number Rev

A3

Date: Sheet

E

3D3V_S0

D7

D7 SSM5818SL

SSM5818SL

1D2V_VGA_S0

2 1

12

3D3V_S0

12

TC21

SE220U2VDM-6

SC1U10V3ZY

DIODE SUPPLIES POWER TO VDDC RAIL WHILE VDDC REGULATOR STABALIZES DURING POWER ON

SC

U83

2

VOUT

3

VIN

1

GND

DY

APL5308-15AC-TR

M26 Power UP Squence

3D3_VDDR3 3D3_VDDR4 2D5_VDDR1 1D2_VDDC VDD_15

T5 time delay between full PCIE_PVDD_18 and 90% of PCIE_VDDR_12

T6 time delay between full PCIE_VDDR_12 and 90% of 1D2_VDDC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ATI(2 of 3)

Leopard2

T1 < 1mS

T2 < 1mS

T3 < 1mS

T5 --

T6 --

14 47Thursday, July 07, 2005

E

1D5V_VGA_S0

T4 < 1mS

of

DY

12

C619

SC2D2U10V3ZY

-1

A

U20B

2 OF 6

G26 G30

G29 G28

G25

H28 H29

H25 H26

D29 D28 E28 E29

F28 F26

E26 F25 E24 F23 E23 D22 B29 C29 C25 C27 B28 B25 C26 B26 F17 E17 D16 F16 E15 F14 E14 F13 C17 B18 B17 B15 C13 B14 C14 C16 A13 A12 C12 B12 C10

B10 E13 E12 E10 F12 F11

2 OF 6

MAA0

DQA_0 DQA_1

J28

DQA_2

J29

DQA_3

J26

DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52

C9

DQA_53

B9

DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60

E9

DQA_61

F9

DQA_62

F8

DQA_63

M26-P-1

MEMORY INTERFACE

A

MEMORY INTERFACE

A

NC_DIMA_0 NC_DIMA_1

MAA_0 MAA_1 MAA_2 MAA_3 MAA_4 MAA_5 MAA_6 MAA_7 MAA_8

MAA_9 MAA_10 MAA_11 MAA_12 MAA_13 MAA_14

DQMA_0# DQMA_1# DQMA_2# DQMA_3# DQMA_4# DQMA_5# DQMA_6# DQMA_7#

QSA_0

QSA_1

QSA_2

QSA_3

QSA_4

QSA_5

QSA_6

QSA_7

RASA#

CASA#

WEA# CSA_0# CSA_1#

CKEA

CLKA0

CLKA0#

CLKA1

CLKA1#

MVREFD

MVREFS

E22 B22 B23 B24 C23 C22 F22 F21 C21 A24 C24 A25 E21 B20 C19

J25 F29 E25 A27 F15 C15 C11 E11

J27 F30 F24 B27 E16 B16 B11 F10

A19 E18 E19 E20 F20 B19 B21

C20 C18

A18

B7 B8

D30 B13

MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

QSA0 QSA1 QSA2 QSA3 QSA4 QSA5 QSA6 QSA7

CLKA0_R CLKA#0_R

CLKA1_R CLKA#1_R

ATI_MVREFD ATI_MVREFS

DIMA_0 DIMA_1

MDA[63..0]16 MDB[63..0]17

4 4

3 3

2 2

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8 MDA9 MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

B

RASA# 16 CASA# 16 WEA# 16 CSA#0 16 CSA#1 16 CKEA 16

1 2

R128 10R2R128 10R2

1 2

R129 10R2R129 10R2

1 2

R131 10R2R131 10R2

1 2

R132 10R2R132 10R2

TP5TP5 TP6TP6

MAA[13..0] 16

DQMA#[7..0] 16

QSA[7..0] 16

CLKA0 16 CLKA#0 16

CLKA1 16 CLKA#1 16

12

R134

R134 100R2

100R2

R136

R136 100R2

100R2

CKEA

CKEB

VRAM_VDDQ

12

C162

C162 SCD1U16V

SCD1U16V

C

3 OF 6

U20C

MDB0

D7

AD6 AD5

AC2 AC3 AD3

AA2 AA6 AA5 AB6 AB5

AE5 AE4 AB2 AB3

AE1 AE2 AE3

DQB_0

F7

DQB_1

E7

DQB_2

G6

DQB_3

G5

DQB_4

F5

DQB_5

E5

DQB_6

C4

DQB_7

B5

DQB_8

C5

DQB_9

A4

DQB_10

B4

DQB_11

C2

DQB_12

D3

DQB_13

D1

DQB_14

D2

DQB_15

G4

DQB_16

H6

DQB_17

H5

DQB_18

J6

DQB_19

K5

DQB_20

K4

DQB_21

L6

DQB_22

L5

DQB_23

G2

DQB_24

F3

DQB_25

H2

DQB_26

E2

DQB_27

F2

DQB_28

J3

DQB_29

F1

DQB_30

H3

DQB_31

U6

DQB_32

U5

DQB_33

U3

DQB_34

V6

DQB_35

W5

DQB_36

W4

DQB_37

Y6

DQB_38

Y5

DQB_39

U2

DQB_40

V2

DQB_41

V1

DQB_42

V3

DQB_43

W3

DQB_44

Y2

DQB_45

Y3

DQB_46 DQB_47 DQB_48 DQB_49 DQB_50 DQB_51 DQB_52 DQB_53 DQB_54 DQB_55 DQB_56 DQB_57 DQB_58 DQB_59 DQB_60 DQB_61 DQB_62 DQB_63

M26-P-1

MEMORY INTERFACE

B

MEMORY INTERFACE

B

NC_DIMB_0 NC_DIMB_1

NC_MEMVMODE_1

MEMORY CHANNEL BMEMORY CHANNEL A

MDB1 MDB2 MDB3 MDB4 MDB5 MDB6 MDB7 MDB8 MDB9 MDB10 MDB11 MDB12 MDB13 MDB14 MDB15 MDB16 MDB17 MDB18 MDB19 MDB20 MDB21 MDB22 MDB23 MDB24 MDB25 MDB26 MDB27 MDB28 MDB29 MDB30 MDB31

1 2

10KR2

R130

1 2

10KR2

R526

R137

R137 100R2

100R2

VRAM_VDDQ 1D8V_VGA_S0

C163

C163 SCD1U16V

SCD1U16V

12

R133

R133 100R2

100R2

As close to CHIP as possible

MDB32 MDB33 MDB34 MDB35 MDB36 MDB37 MDB38 MDB39 MDB40 MDB41 MDB42 MDB43 MDB44 MDB45 MDB46 MDB47 MDB48 MDB49 MDB50 MDB51 MDB52 MDB53 MDB54 MDB55 MDB56 MDB57 MDB58 MDB59 MDB60 MDB61 MDB62 MDB63

MAB_0 MAB_1 MAB_2 MAB_3 MAB_4 MAB_5 MAB_6 MAB_7 MAB_8

MAB_9 MAB_10 MAB_11 MAB_12 MAB_13 MAB_14

DQMB_0# DQMB_1# DQMB_2# DQMB_3# DQMB_4# DQMB_5# DQMB_6# DQMB_7#

QSB_0 QSB_1 QSB_2 QSB_3 QSB_4 QSB_5 QSB_6

QSB_7 RASB# CASB#

WEB# CSB_0# CSB_1#

CKEB

CLKB0

CLKB0#

CLKB1

CLKB1#

ROMCS#

MEMTEST

N5 M1 M3 L3 L2 M2 M5 P6 N3 K2 K3 J2 P5 P3 P2

E6 B2 J5 G3 W6 W2 AC6 AD2

F6 B3 K6 G1 V5 W1 AC5 AD1

R2 T5 T6 R5 R6 R3 N1

N2 T2

T3

E3 AA3

AF5

C7 C8

R135

R135 240R2J

240R2J

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11 MAB12 MAB13

DQMB#0 DQMB#1 DQMB#2 DQMB#3 DQMB#4 DQMB#5 DQMB#6 DQMB#7

QSB0 QSB1 QSB2 QSB3 QSB4 QSB5 QSB6 QSB7

CLKB0_R CLKB#0_R

CLKB1_R CLKB#1_R

DIMB_0 DIMB_1

ROMCS# ATI_MODE_0

MEMTEST

12

D

RASB# 17 CASB# 17 WEB# 17 CSB#0 17 CSB#1 17 CKEB 17

1 2

R120 10R2R120 10R2

1 2

R121 10R2R121 10R2

1 2

R122 10R2R122 10R2

1 2

R119 10R2R119 10R2

TP4TP4 TP25TP25

TP24TP24

ATI_MODE_1

12

R538

R538 DUMMY-R2

DUMMY-R2

MAB[13..0] 17

1D2V_VGA_S0

DQMB#[7..0] 17

QSB[7..0] 17

CLKB0 17 CLKB#0 17

CLKB1 17 CLKB#1 17

ATI_MODE_0 13

1 2

R544 DUMMY-R2R544 DUMMY-R2

1 2

R539 DUMMY-R2R539 DUMMY-R2

12

R545

R545 10KR2

10KR2

E

6 OF 6

U20F

P17 P18 P19 U12 U13 U14 U17 U18 U19 V19 V18 V17 V14 V13 V12 N18 N17

N14 W17 W18 W12 W13 W14

N13

N19 M19 M18 M12

N12 M13 M14

P12

P13

P14 M17 W19

M26-P-1

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

1 2

L35

MLB-201209-11

ARRAYCENTER

SC10U10V6ZY-U

M16

VSS

N16

VSS

N15

VSS

P15

VSS

P16

VSS

R18

VSS

R17

VSS

R16

VSS

R15

VSS

R14

VSS

R13

VSS

R12

VSS

T13

VSS

T14

VSS

T15

VSS

W15

VSS

V16

VSS

V15

VSS

U15

VSS

U16

VSS

T19

VSS

T18

VSS

T17

VSS

T16

VSS

W16

VDDCI

M15

VDDCI

R19

VDDCI

T12

VDDCI

12

C379

C379 SC1U10V3ZY

SC1U10V3ZY

VDDCI

12

C380

ATI suggest

VDDR1 MEMVMODE_0 MEMVMODE_1

1.8V

+VDDC_CTGND

VRAM Selection

K28

L28

M27

M26

M24

M25

M28

P28

N28

R25

R23

R24

R26

R27

R28

T28

T24

U28

V24

V26

V27

V25

V28

Y28

W24

W28

AA26

AA27

AA23

AA24

AA25

AA28

AB28

AC28

AD28

AD26

AD27

AE28

AF28

PCIE_VSS

AH29

PCIE_VSS

T1

AB8

AB7

AB1

AC4

AC12

AC14

AD16

AC16

AC18

AD18

AK2

VSS

D21

VSS

D18

D15

VSS

D12

AJ1

VSS

PCIE_VSS

VSS

VSSD6VSSD4VSS

D10

PCIE_VSS

CORE GND

VSSG9VSS

VSS

VSSH9VSSH8VSSH4VSS

VSS

VSSR7VSSP4VSSM7VSSM8VSSL4VSSK1VSSK7VSSK8VSSR8VSS

J23

F27

G12

G16

G18

G21

G24

H27

H23

H21

H18

H16

H14

H12

J24

AG5

AG9

AD12

AG11

U20E

VSSU4VSSU8VSSW7VSSW8VSSY4VSS

5 OF 6

1 1

VSSA2VSS

VSS

VSSC1VSSC3VSS

VSS

A10

A16

A22

A29

C28

C30

D27

D24

Vendor/Size

HYNIX/128M 000 SAMSUNG/128M RESERVED RESERVED RESERVED RESERVED RESERVED RESERVED

SETTING DVPDATA_[2:0]

001 010 011 100 101 110 111

VRAM_VDDQ

Hynix : 72.55732.B0U Samsng : 72.45532.M0U

1 2

R79 DUMMY-R2R79 DUMMY-R2

1 2

R81 DUMMY-R2R81 DUMMY-R2

1 2

R80 DUMMY-R2R80 DUMMY-R2

R482

R482 10KR2

10KR2

DVPDATA_0 13

DVPDATA_1 13

DVPDATA_2 13

12

R484

R484 10KR2

10KR2

R483

R483 10KR2

10KR2

Hynix : HY5DS573222F(P)-28 (8Mx32) Samsung : K4D553235F-VC2A (8Mx32)

A

B

C

D

Title

Size Document Number Rev

A3

Date: Sheet

2.5V

2.8V

+VDDC_CT +VDDC_CT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ATI(3 of 3)

Leopard2

15 47Thursday, July 07, 2005

E

GND+VDDC_CT

-1

of

-1

5

All dampings in this page must near the VRAM.

C488

C488 SCD1U16V

SCD1U16V

BC113

BC113 SC330P50V2KX

SC330P50V2KX

CLKA015

CLKA#015

12

C484

C484 SCD1U16V

SCD1U16V

12

BC36

BC36 SC330P50V2KX

SC330P50V2KX

RASA#15 CASA#15

WEA#15 CSA#015 CSA#115

CKEA15

R554

CLOSE TO MEM !!

BC112

SCD1U16V

60D4R2F

1 2

BC107_1

12

5

12

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11

MAA12 MAA13

R553

1 2

C168

C168 SCD1U16V

SCD1U16V

BC34

BC34 SC330P50V2KX

SC330P50V2KX

U21A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

60D4R2F

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

HY5DS573222F-28

12

D D

12

C C

B B

A A

12

C172

C172 SCD1U16V

SCD1U16V

12

BC38

BC38 SC330P50V2KX

SC330P50V2KX

NC#H4H4NC#H11

NC#L12

L12

L13

H11

12

NC#L13

NC#M3

N3

M3

12

C487

C487 SCD1U16V

SCD1U16V

BC33

BC33 SC330P50V2KX

SC330P50V2KX

1 of 5

VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

NC#N3

C489

C489 SCD1U16V

SCD1U16V

BC41

BC41 SC330P50V2KX

SC330P50V2KX

NC#C4C4NC#C11

C11

CLOSE TO MEM

Layout trace 20 mil

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

12

4

12

C490

C490 SCD1U16V

SCD1U16V

BC39

BC39 SC330P50V2KX

SC330P50V2KX

12

4

12

BC111

BC111 SC330P50V2KX

SC330P50V2KX

VRAM_VDDQ

12

BC28

SC10U10V5ZY-L

BC29

BC29 SCD1U16V

SCD1U16V

VDDR_VREF1

BC31

BC31 SCD1U16V

SCD1U16V

VRAM_VDDQ

C485

C485 SCD1U16V

SCD1U16V

12

BC42

SC10U10V5ZY-L

VRAM_VDDQ

12

R141

R141 1KR2F

1KR2F

12

R144

R144 1KR2F

1KR2F

12

BC110

BC110 SCD01U16V2KX

SCD01U16V2KX

BC40

BC40 SCD01U16V2KX

SCD01U16V2KX

DQMA#1

QSA1

DQMA#2

QSA2

DQMA#0

QSA0

DQMA#3

QSA3

MDA12 MDA11 MDA9 MDA10 MDA13 MDA8 MDA15 MDA14

MDA21 MDA18 MDA17 MDA22 MDA19 MDA23 MDA16 MDA20

MDA6 MDA2 MDA0 MDA7 MDA1 MDA4 MDA5 MDA3

MDA26 MDA31 MDA30 MDA24 MDA27 MDA25 MDA29 MDA28

K13 G13 G12

F13 K12 F12

H12 H13

MDA[0..63]15 MAA[0..13]15

DQMA#[0..7]15

QSA[0..7]15

U21B

B5

DQ3

C6

DQ1

B6

DQ2

B7

DQ0

D2

DQ6

D3

DQ5

C2

DQ4

E2

DQ7

B3

DM0

B2

DQS0

U21C

DQ8 DQ12 DQ13

J13

DQ10 DQ14 DQ9 DQ15

J12

DQ11

DM1 DQS1

U21D

G3

DQ18

K3

DQ23

J3

DQ20

F3

DQ16

J2

DQ21

G2

DQ19

F2

DQ17

K2

DQ22

H3

DM2

H2

DQS2

U21E

D12 D13 E13

C9

B10

B8

C13

B9

B12 B13

3

2 of 5

HY5DS573222F-28

3 of 5

HY5DS573222F-28

4 of 5

HY5DS573222F-28

5 of 5

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-28

3

MDA45 MDA46 MDA43 MDA44 MDA42 MDA40 MDA47 MDA41

DQMA#5

QSA5

MDA49 MDA53 MDA54 MDA50 MDA52 MDA48 MDA55 MDA51

DQMA#6

QSA6

MDA37 MDA35 MDA34 MDA39 MDA33 MDA36 MDA38 MDA32

DQMA#4

QSA4

DQMA#7

QSA7

MDA58 MDA63 MDA61 MDA56 MDA59 MDA57 MDA62 MDA60

K13 G13 G12

K12

H12 H13

12

U65B

B5 C6 B6 B7 D2 D3 C2 E2

B3 B2

U65C

J13 F13

F12 J12

U65D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

D12 D13 E13

C9

B10

B8

C13

B9

B12 B13

BC103

BC103 SCD1U16V

SCD1U16V

BC120

BC120 SC330P50V2KX

SC330P50V2KX

2 of 5

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-28

3 of 5

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

HY5DS573222F-28

4 of 5

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

HY5DS573222F-28

U65E

5 of 5

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-28

12

BC35

BC35 SCD1U16V

SCD1U16V

12

BC121

BC121 SCD01U16V2KX

SCD01U16V2KX

VRAM_VDDQ

CLKA115

CLKA#115

R145

CLOSE TO MEM !!

BC32

SCD1U16V

2

CKEA

60D4R2F

2

RASA# CASA# WEA# CSA#0 CSA#1

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11

1 2

BC108_1

12

MAA12 MAA13

R146

60D4R2F

1

1 of 5

NC#L12

L12

L13

NC#L13

NC#M3

N3

M3

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

NC#N3

1 of 5

VDD VDD VDD VDD VDD VDD VDD VDD

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

VDDR_VREF2

U65A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

HY5DS573222F-28

NC#C4C4NC#C11

NC#H4H4NC#H11

C11

H11

Layout trace 20 mil

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

Date: Sheet

A3

ATI VRAM (1/2)

Leopard2

1

VRAM_VDDQ

12

BC105

BC105 SCD1U16V

SCD1U16V

12

BC104

BC104 SCD1U16V

SCD1U16V

16 47Thursday, July 07, 2005

BC37

SC10U10V5ZY-L

12

BC106

SC10U10V5ZY-L

VRAM_VDDQ

of

12

R549

R549 1KR2F

1KR2F

12

R550

R550 1KR2F

1KR2F

-1

5

All dampings in this page must near the VRAM.

C401

C401 SCD1U16V

SCD1U16V

BC13

BC13 SC330P50V2KX

SC330P50V2KX

CLKB015

CLKB#015

12

CLOSE TO MEM !!

SCD1U16V

12

D D

12

C C

B B

A A

C148

C148 SCD1U16V

SCD1U16V

BC16

BC16 SC330P50V2KX

SC330P50V2KX

MAB12

MAB13

CKEB

R139

1 2

60D4R2F

BC139_1

12

BC27

5

12

RASB# CASB# WEB# CSB#0 CSB#1

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11

R140

1 2

12

C155

C155 SCD1U16V

SCD1U16V

12

BC14

BC14 SC330P50V2KX

SC330P50V2KX

U64A

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

60D4R2F

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

HY5DS573222F-28

12

C99

C99 SCD1U16V

SCD1U16V

BC100

BC100 SC330P50V2KX

SC330P50V2KX

C124

C124 SCD1U16V

SCD1U16V

12

BC23

BC23 SC330P50V2KX

SC330P50V2KX

NC#C4C4NC#C11

C11

12

C156

C156 SCD1U16V

SCD1U16V

12

BC12

BC12 SC330P50V2KX

SC330P50V2KX

1 of 5

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

NC#H4H4NC#H11

NC#L12

NC#L13

NC#M3

NC#N3

N3

M3

L12

L13

H11

CLOSE TO MEM

Layout trace 20 mil

VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

4

12

BC15

BC15 SC330P50V2KX

SC330P50V2KX

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

VDDR_VREF3

4

C157

C157 SCD1U16V

SCD1U16V

VRAM_VDDQ

12

BC108

BC108 SCD1U16V

SCD1U16V

12

BC109

BC109 SCD1U16V

SCD1U16V

12

C474

C474 SCD1U16V

SCD1U16V

12

BC24

BC24 SC330P50V2KX

SC330P50V2KX

BC101

SC10U10V5ZY-L

VRAM_VDDQ

12

BC102

SC10U10V5ZY-L

VRAM_VDDQ

12

BC22

BC22 SCD01U16V2KX

SCD01U16V2KX

R552

R552 1KR2F

1KR2F

R551

R551 1KR2F

1KR2F

BC26

BC26 SCD01U16V2KX

SCD01U16V2KX

MDB7 MDB6 MDB5 MDB4 MDB1 MDB0 MDB2 MDB3

DQMB#0

QSB0

MDB28 MDB29 MDB31 MDB25 MDB26 MDB27 MDB24 MDB30

DQMB#3

QSB3

MDB14 MDB9 MDB11 MDB13 MDB10 MDB15 MDB12 MDB8

DQMB#1

QSB1

MDB20 MDB23 MDB22 MDB16 MDB19 MDB17 MDB21 MDB18

DQMB#2

QSB2

K13 G13 G12

F13 K12 F12

H12 H13

D12 D13 E13

B10 C13

B12 B13

U64B

B5

DQ3

C6

DQ1

B6

DQ2

B7

DQ0

D2

DQ6

D3

DQ5

C2

DQ4

E2

DQ7

B3

DM0

B2

DQS0

U64C

DQ8 DQ12 DQ13

J13

DQ10 DQ14 DQ9 DQ15

J12

DQ11

DM1 DQS1

U64D

G3

DQ18

K3

DQ23

J3

DQ20

F3

DQ16

J2

DQ21

G2

DQ19

F2

DQ17

K2

DQ22

H3

DM2

H2

DQS2

U64E

DQ26 DQ25 DQ24

C9

DQ30 DQ28

B8

DQ31 DQ27

B9

DQ29

DM3 DQS3

12

BC21

BC21 SCD1U16V

SCD1U16V

12

BC25

BC25 SC330P50V2KX

SC330P50V2KX

2 of 5

HY5DS573222F-28

3 of 5

HY5DS573222F-28

4 of 5

HY5DS573222F-28

5 of 5

HY5DS573222F-28

3

12

BC19

BC19 SCD1U16V

SCD1U16V

12

BC107

BC107 SCD01U16V2KX

SCD01U16V2KX

3

VRAM_VDDQ

MDB32 MDB33 MDB34 MDB35 MDB36 MDB38 MDB37 MDB39

DQMB#4

QSB4

MDB63 MDB59 MDB58 MDB60 MDB56 MDB62 MDB57 MDB61

DQMB#7

QSB7

MDB43 MDB47 MDB45 MDB42 MDB44 MDB40 MDB41 MDB46

DQMB#5

QSB5

MDB53 MDB54 MDB52 MDB51 MDB50 MDB49 MDB55 MDB48

DQMB#6

QSB6

K13 G13 G12

K12

H12 H13

D12 D13 E13

B10 C13

B12 B13

DQMB#[0..7]15

U61B

B5 C6 B6 B7 D2 D3 C2 E2

B3 B2

U61C

J13

F13 F12

J12

U61D

G3

K3

J3

F3

J2

G2

F2 K2

H3 H2

U61E

C9 B8 B9

MDB[0..63]15 MAB[0..13]15

QSB[0..7]15

2 of 5

DQ3 DQ1 DQ2 DQ0 DQ6 DQ5 DQ4 DQ7

DM0 DQS0

HY5DS573222F-28

3 of 5

DQ8 DQ12 DQ13 DQ10 DQ14 DQ9 DQ15 DQ11

DM1 DQS1

HY5DS573222F-28

4 of 5

DQ18 DQ23 DQ20 DQ16 DQ21 DQ19 DQ17 DQ22

DM2 DQS2

HY5DS573222F-28

5 of 5

DQ26 DQ25 DQ24 DQ30 DQ28 DQ31 DQ27 DQ29

DM3 DQS3

HY5DS573222F-28

2

U61A

1 2

BC140_1

MAB0 MAB1 MAB2 MAB3 MAB4 MAB5 MAB6 MAB7 MAB8 MAB9 MAB10 MAB11

MAB12 MAB13

R111

60D4R2F

M2

RAS#

L2

CAS#

L3

WE#

N2

CS#

M4

NC#M4

N5

A0

N6

A1

M6

A2

N7

A3

N8

A4

M9

A5

N9

A6

N10

A7

N11

A8/AP

M8

A9

L6

A10

M7

A11

L9

NC#L9

N4

BA0

M5

BA1

M10

NC#M10

N12

CKE

M11

CLK

M12

CLK#

F6

VSS_THERMAL

F7

VSS_THERMAL

F8

VSS_THERMAL

F9

VSS_THERMAL

G6

VSS_THERMAL

G7

VSS_THERMAL

G8

VSS_THERMAL

G9

VSS_THERMAL

H6

VSS_THERMAL

H7

VSS_THERMAL

H8

VSS_THERMAL

H9

VSS_THERMAL

J6

VSS_THERMAL

J7

VSS_THERMAL

J8

VSS_THERMAL

J9

VSS_THERMAL

M13

MCL/DSF

HY5DS573222F-28

NC#C4C4NC#C11

NC#H4H4NC#H11

C11

H11

NC#L12

L12

L13

NC#L13

NC#M3

N3

M3

NC#N3

RASB#15 CASB#15

WEB#15 CSB#015 CSB#115

CKEB15

CLKB115

CLKB#115

R110

1 2

60D4R2F

CLOSE TO MEM !!

12

BC17

SCD1U16V

CLOSE TO MEM

1 of 5

VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VREF

D7 D8 E4 E11 L4 L7 L8 L11

C3 C5 C7 C8 C10 C12 E3 E12 F4 F11 G4 G11 J4 J11 K4 K11

B4 B11 D4 D5 D6 D9 D10 D11 E6 E9 F5 F10 G5 G10 H5 H10 J5 J10 K5 K10

E5 E7 E8 E10 K6 K7 K8 K9 L5 L10

N13

1

VRAM_VDDQ

12

BC98

BC98 SCD1U16V

SCD1U16V

VDDR_VREF4

12

BC99

BC99 SCD1U16V

SCD1U16V

BC97

SC10U10V5ZY-L

12

BC96

SC10U10V5ZY-L

VRAM_VDDQ

12

R522

R522 1KR2F

1KR2F

12

R521

R521 1KR2F

1KR2F

Layout trace 20 mil

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet of

ATI VRAM (2/2)

Leopard2

1

-1

17 47Thursday, July 07, 2005

-1

of

A

Digital Signal CONN

CN5

21

4 4

22

JST-CON20

Analog Signal CONN

CN6

11 1 2 3 4 5

3 3

2 2

6 7 8 9 10 12

MOLEX-CON10-1

AUD_AGND

BC0EX131

BC0EX231

HP suggest

DOCK_PRESENT SPDIF_OUT

1 1

USB_P_CON0

1

USB_N_CON0

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

MIC_PR

USB_P_CON1 USB_N_CON1

CRMA_CN5 LUMA_CN5

3D3V_S0

12

5V_S3

DDC_DATA_CON 20 DDC_CLK_CON 20

JVGA_HS 20 JVGA_VS 20

5V_S0

CRT_R 20 CRT_G 20 CRT_B 20

EXT_MIC_1 32 EXT_MIC_2 32

HP_OUT_R 32 HP_OUT_L 32

EARPHONE 33 LID_SW 19

R548

R548 47KR2

47KR2

63.47334.1D1

1 2

R624 DUMMY-R2R624 DUMMY-R2

1 2

R310 DUMMY-R2R310 DUMMY-R2

Please close to ICH6

12

R104

R104 2K2R2

2K2R2

R103

1 2

47R2

1

MIC-IN

EARPHONE

5V_S0

12

3

2

LUMA_CN5

CRMA_CN5

LINE-OUT

R408

R408 10KR2

10KR2

PR_INSERT#

Q31

Q31 S2N3904-U3

S2N3904-U3

PR_PRESENT#

12

BC18

BC18 SC3P50V2CN

SC3P50V2CN

Close to Docking CN

USB_PN722 USB_PP722

USB_PN122 USB_PP122

ICH_PME# 22,30,34

PCI_AD24 22,27,30,34

PR_INSERT# 36

L8

1 2

BLM11B750S

1 2

BC20

BC20 SC3P50V2CN

SC3P50V2CN

USB_N_CON1 USB_P_CON1

LID_SW

B

L12

L12 BLM11B750S

BLM11B750S

3

12

C138

SC3P50V2CN

DY

3D3V_S3

D31

BAV99LT1

12

DY

2

1

LUMA

CRMA

12

C149

C149 SC3P50V2CN

SC3P50V2CN

USB_N_CON6

USB_P_CON6

AUD_AGND

5V_S0 5V_S0

D5

VOL_UP_DK# VOL_DWN_DK#

12

R123

R124

150R2F

USB_N_CON0 USB_P_CON0

1 2

3

BAV99LT1

DY

USB_PN3 22 USB_PP3 22

5V_S3 AD+

12

C471

C471 SCD1U16V

SCD1U16V

SPDIF_OUT32

EC131

EC131 SCD1U16V

SCD1U16V

DY

2

1

12

C101

C101 SCD1U25V3KX

SCD1U25V3KX

C

AUD_AGND DK_SPKR_R+33 DK_SPKR_L+33

VOL_DWN_DK#36

5V_S0

12

RJ45-431 RJ45-531 RJ45-131 RJ45-231

VOL_UP_DK#36

TPAD30

DCBATOUT

12

C617

C617 SCD1U16V

SCD1U16V

1 2

C315

C315 SC470P25V2KN

SC470P25V2KN

D30

3

BAV99LT1

DY

TP21

R455 0R2-0R455 0R2-0

1 2

12

R94

R94 1KR2

1KR2

12

C94

C94 SCD1U25V3KX

SCD1U25V3KX

L19

BLM18PG600SN1

D

2

Docking Connector

CN12

1

PR_PRESENT#

MIC_PR

USB_N_CON6 USB_P_CON6

IR_OUT

COMP_PR LUMA_PR

CRMA_PR

CIR_PR

5V_DOCK

DCBATOUT

AD+ AD+

CN12

MH1

MH2

60

5556

12 34

56 78 910 1112 1314 1516 1718 1920 2122 2324 2526 2728 2930 3132 3334 3536 3738 3940 4142 4344 4546 4748 4950 5152 5354

5758

59

FOX-CONN58D-U3

5V_Dock_S0

1 2

R51

HIGH B1

SPDIF

5V_S0

12

C425

C425 SCD1U16V

SCD1U16V

C62

C62 SC470P25V2KN

SC470P25V2KN

LUMA_PR

COMP_PR

12

1 2

12

C357

C357 SC47P50V2JN

SC47P50V2JN

CRMA_PR

1 2

12

C356

C356 SC47P50V2JN

SC47P50V2JN

1 2

C351

C351 SC47P50V2JN

SC47P50V2JN

L27

Place near the DOCK

SPDIF

0R2-0

DOCK_PRESENT

FUNCTIONINPUT

B0LOW

L30

IND-1D2UH

12

L29

IND-1D2UH

12

IND-1D2UH

12

5V_S0

5V_DOCK

LUMA_PR_1

C358

C358 SC47P50V2JN

SC47P50V2JN

CRMA_PR_1

C369

C369 SC47P50V2JN

SC47P50V2JN

12

C352

C352 SC47P50V2JN

SC47P50V2JN

RJ45-7 31 RJ45-8 31

RJ45-3 31 RJ45-6 31 JACK_DETECT# 33

MUTE_LED 19,36

1394_TPA1P_PR 31 1394_TPA1N_PR 31 1394_TPB1P_PR 31 1394_TPB1N_PR 31

LUMA

12

R456

R456 150R2F

150R2F

12

R491

R491 150R2F

150R2F

R436

R436 150R2F

150R2F

JACK_DETECT# MUTE_LED

AUD_AGND

MIC_PR DK_SPKR_R+ DK_SPKR_L+ COMP_PR VOL_UP_DK# VOL_DWN_DK# DOCK_PRESENT PR_PRESENT#

BT_LED

BT_LED 19,31

Place near the GMCH

U16

1

B1

2

GND B03A

U15

1

B1

2

GND B03A

1 2

R72

6

S

5

VCC

4

NC7SB3157P6X-U

6

S

5

VCC

4

NC7SB3157P6X-U

0R2-0

E

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

5V_S0

EC14

EC14 SCD1U16V

SCD1U16V EC19

EC19 SCD1U16V

SCD1U16V EC104

EC104 SCD1U16V

SCD1U16V EC106

EC106 SC1000P16V2KX

SC1000P16V2KX EC105

EC105 SC1000P16V2KX

SC1000P16V2KX EC110

EC110 SC1000P16V2KX

SC1000P16V2KX EC109

EC109 SC1000P16V2KX

SC1000P16V2KX EC111

EC111 SC1000P16V2KX

SC1000P16V2KX EC118

EC118 SC1000P16V2KX

SC1000P16V2KX EC30

EC30 SC1000P16V2KX

SC1000P16V2KX EC103

EC103 SC1000P16V2KX

SC1000P16V2KX EC28

EC28 SC1000P16V2KX

SC1000P16V2KX

PR_INSERT#

PR_INSERT#CRMA

LUMA_VGA 13

CRMA_VGA 13

COMP_VGA 13

5V_S3

F1

1 2

FUSE-2A6V

12

C368

SC4D7U10V5ZY

A

5V_DOCK

12

C367

C367 SCD1U16V

SCD1U16V

100 mil

12

TC6

TC6 ST47U6D3V-U1

ST47U6D3V-U1

DY

Wistron Corporation

CIR20

CIR_PR

CIR,CIR_PR,CIR_KBC are connect togather. default setting 12/12

B

R361

R361 R512

R512

C

1 2 1 2

0R2-0

0R2-0 0R2-0

0R2-0

CIR_KBC 36

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet

Board to board conn/ Docking

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

E

-1

18 47Monday, July 11, 2005

of

-1

A

B

C

D

E

INVERTER/LCD

3D3V_LCD_S0

12

BC8

4 4

3 3

BRIGHTNESS36

FPBACK36

2 2

1K2R2J-1

1 2

1K2R2J-1

Amber

LED4

Blue

LED8

LED2

1 2

LED-O-10

LED-O-10 LED4

LED4

1 2

LED-O-10

1K2R2J-1

A

PR

Botton

PA

Top

change R from 100 to 200 ohm

5V_S0_PR

1 2

R125

5V_S0_PR

1 2

R180

5V_S0_PR

1 2

R360

1 1

5V_AUX_PR

R357

5V_S3_PR

1 2

R356

BC8 SCD1U16V

SCD1U16V

TXAOUT0-13

TXAOUT0+13

TXAOUT1-13

TXAOUT1+13

TXAOUT2-13

TXAOUT2+13

TXACLK-13

TXACLK+13

TXBOUT0-13

TXBOUT0+13

TXBOUT1-13

TXBOUT1+13

TXBOUT2-13

TXBOUT2+13

TXBCLK-13

TXBCLK+13

EDID_CLK13,25

EDID_DAT13,25

12

C346

BC87

SC1000P16V2KX

Amber

LED5 LED6 LED2LED1

Blue

LED9

LED7

CAPS_LED#

7421_LED#

LED-O-11-U

NC

LED5

LED-O-11-U

NC

LED7

NC

LED6

5V_S0

12

C345

12

3D3V_S0

12

BC88

SCD1U16V

IRCHRPWR HDD

U42

U64

IDE_LED#

12

DCBATOUT

PWR_LED#

BC94

BC94 SC10U10V6ZY-U

SC10U10V6ZY-U

12

BC91

BC91 SCD1U

SCD1U

SCD1U16V

CAPS 7421

Amber Amber

Blue Blue

LED1 LED2

CHG_LED#

CN3

41 43

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

IPEX-CON40-1-U1

ID_DET36,37

5V_S0_PA

5V_AUX_PA

B

MH1

45

46 MH2 4442

1 2

R127

1 2

R192

1 2

R359

R358

5V_S3_PA

1 2

R355

100R2

200R2J

1 2

200R2J

5V_AUX

12

LCDVDD_ON13

R345

R345 100KR2

100KR2

1

G

LCDVDD_ON

7421_LED27

CAPS_LED36

NUM_LED36

12

ID_DET

D

S

2 3

LED1

1 2

LED-B-53

LED-B-53 LED3

LED3

1 2

LED-B-53

LED-B-54-U

R350

R350 10KR2

10KR2

Q21

Q21 2N7002

2N7002

NC

LED10

NC

LED9

LED-B-54-U

NC

LED8

1 2

R431

2

IN

12

R344

R344 47KR2

47KR2

ID_DET#

12

1KR2

Q35

R1

R2

DTC114EUA-U1

Q12

R1

2

IN

DTC114EUA-U1

DTC114EUA-U1 Q10

Q10

R1

2

IN

DTC114EUA-U1

DTC114EUA-U1 Q34

Q34

R1

2

IN

DTC114EUA-U1

1 2

R351

CAPS_LED#

7421_LED#

IDE_LED#

12

PWR_LED#

R2

1

47KR2

CHG_LED#

LCDVDD_ON_1

5V_S5

OUT

3

GND

1

OUT

3

GND

1

OUT

3

GND

1

OUT

3

GND

1

5V_AUX

2N3906-2-U

2N3906-2-U Q20

Q20

3 2

1

C

3D3V_S0

1 2

R433

12

BC92

BC92 SC1U10V3ZY

SC1U10V3ZY

12

R430

R430 10KR2

10KR2

2N3906-2-U

2N3906-2-U Q23

Q23

3 2

270KR2F

12

BC93

BC93 SCD1U16V

SCD1U16V

3D3V_LCD_S0

12

1

G

2 3

7421_LED#

CAPS_LED#

NUM_LED# 37

5V_AUX_PA

5V_AUX_PR

SI3865_R1C1

R432

R432 150R2

150R2

D

Q36

Q36 2N7002

2N7002

S

U58

6

R1/C1

5

ON/OFF

4

S2

SI3865DV-U

MUTE_LED18,36

1 2

ID_DET

ID_DET#

R2 D2 D2

802_BT_LED#37

1 2

R353

BC89

BC89 SC4700P50V3KX

SC4700P50V3KX

1 2 3

R352

SC

SI3865_R2

1

47KR2

1 2

Q32

R1

2

IN

DTC114EUA-U1

3D3V_LCD_S0

12

R476

R476 47KR2

47KR2

5V_S3

2N3906-2-U

2N3906-2-U Q25

Q25

3 2

1

47KR2

R2

D

OUT

GND

3 1

Q33

3 1

DTC114EUA-U1

2N3906-2-U

2N3906-2-U Q24

Q24

3 2

OUT

GND

3D3V_S3

12

R546

R546 4K7R2

4K7R2

1 2

100KR2

R547

12

C482

C482 SC1000P50V

SC1000P50V

R1

R2

5V_S3_PA

5V_S3_PR

802_BT_LED

2

IN

ID_DET

1 2

47KR2

R354

ID_DET#

MUTE_LED# 37

CHG_LED36

PWR_LED36

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

1 2

R346

LID_SW

D26

2

3

1

CH715F

5V_S0

2N3906-2-U

1

Q26

3 2

2N3906-2-U

1

Q22

47KR2

IDE_LED#

2

IN

2

IN

Inverter/LCD

Leopard2

Q22

3 2

Q28

3

R1

1

R2

DTC114EUA-U1

DTC114EUA-U1 Q27

Q27

3

R1

1

R2

DTC114EUA-U1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

OUT

GND

OUT

GND

LID_SW 18KBC_LID#36

5V_S0_PA

5V_S0_PR

19 47Monday, July 11, 2005

802_ACT_LED 34

BT_LED 18,31

HDD_LED# 26 CDROM_LED# 26

CHG_LED#

PWR_LED# 37

of

-1

A

4 4

B

C

D

E

CRT

L9

DDC_CLK13 DDC_DATA13

12

R113

R113 150R2F

150R2F

JVGA_HS JVGA_VS

12

R112

R112 150R2F

150R2F

JVGA_HS18 JVGA_VS18

VGA_BLUE13

3 3

VGA_GREEN13

VGA_RED13

1 2

BLM11B750S

1 2

R115 33R2R115 33R2

1 2

R114 33R2R114 33R2

12

R108

R108 150R2F

150R2F

DDC_CLK_CON DDC_DATA_CON

L10 BLM11B750SL10 BLM11B750S

12

C87

SC15P50V2JN-1

12

C89

SC15P50V2JN-1

C88

SC15P50V2JN-1

Close to U19 (N/B)

DDC_CLK_CON 18 DDC_DATA_CON 18

VGA_HSYNC 13 VGA_VSYNC 13

L5

1 2

BLM11B750S

L6

1 2

BLM11B750S

L7

1 2

BLM11B750S

12

C126

C125

SC3P50V2CN

Close to CN5

SC3P50V2CN

CRT_B CRT_G

CRT_R

12

C113

SC3P50V2CN

CRT_B 18

CRT_G 18

CRT_R 18

010804 Modified on Astro ID request

U81

IR-TSOP6236-U

U50

IR-TSOP6236-U

DY

FOR FF

GND GND

VS

OUT

GND GND

VS

OUT

2 2

CIR

1 1

A

1 2 3 4

R362

R362 10KR2

10KR2

5V_AUX

12

CIR

R363

R363 100R2

100R2

1 2

C316

C316 SC4D7U10V5ZY

SC4D7U10V5ZY

CIR 18

B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

C

D

Date: Sheet

CRT/ CIR

Leopard2

E

-1

20 47Thursday, July 07, 2005

of

-1

A

3D3V_AUX RTC_AUX_S5

D21

21

CH751H-40-U

RTC_VCC

D22

4 4

RTC1

The symbol use 2nd source The P/N is the main source Main source:20.D0152.103 2nd source:20.D0012.103

3 3

2 2

12

R334

R334 1KR2

1KR2

BAT

12345

ETY-CON3-S1

D22

CH751H-40-U

1 2

21

R632

12

R633

R633 1MR2

1MR2

RSMRST#25,36,43

C614

20KR2

12

SC1U10V3ZY

3D3V_S0

12

C300

C300 SC1U10V3ZY

SC1U10V3ZY

RTC circuitry

21

G70

GAP-OPEN

R333

R333 10KR2

10KR2

DY

D

Q17

1

2N7002

G

S

2 3

DY

B

AC97_BITCLK32,35

AC97_SYNC32,35

AC97_RST#32,35 AC97_DIN032

AC97_DIN135

AC97_DOUT32,35

Place within 500 mils of ICH6 ball

1 2

C299 SC4D7P50V3CNC299 SC4D7P50V3CN

X4

XTAL-32D768K-4P

1 2

C298 SC3D9P50V3CNC298 SC3D9P50V3CN

1 2

10KR2

R270

1 2

R269

1 2

R271

1 2

R623

1 2

2 3

R272

R272 0R2-0

0R2-0

41

33R2

33R2 33R2

33R2

1 2

R627

IDE_IORDY26

IDE_IRQ1426

IDE_DACK#26

IDE_IOW#26

IDE_IOR#26

12

R319

R319 10MR2J

10MR2J

RCT_RST# INTRUDER#

TP42TP42

LAN_RSTSYNC

AC97_SYNC_ICH AC97_RST#_ICH

AC97_DOUT_ICH

0R2-0

SATA_RBIAS_PN

RCT_X1 RCT_X2

ICH_TP5

AA2 AA3

AA5

D12 B12 D11 F13

F12 B11 E12

E11 C13

C12 C11 E13

C10

A10 F11

F10 B10

AC19

AE3 AD3 AG2

AF2 AD7

AC7

AF6 AG6

AC2 AC1

AG11

AF11

AF16 AB16 AB15 AC14 AE16

Y1 Y2

B9

C9

C

RTCX1 RTCX2

RTCRST# INTRUDER#

INTVRMEN

EE_CS EE_SHCLK EE_DOUT EE_DIN

LAN_CLK LAN_RSTSYNC LANRXD[0]

LANRXD[1] LANRXD[2]

LANTXD[0] LANTXD[1] LANTXD[2]

ACZ_BIT_CLK ACZ_SYNC

ACZ_RST# ACZ_SDIN[0]

ACZ_SDIN[1] ACZ_SDIN[2]

ACZ_SDO

SATALED# SATA[0]RXN

SATA[0]RXP SATA[0]TXN SATA[0]TXP

SATA[2]RXN SATA[2]RXP SATA[2]TXN SATA[2]TXP

SATA_CLKN SATA_CLKP

SATARBIAS# SATARBIAS

IORDY IDEIRQ DDACK# DIOW# DIOR#

U42A

LAD[0]/FWH[0] LAD[1]/FWH[1] LAD[2]/FWH[2] LAD[3]/FWH[3]

LPC

RTCLAN

LDRQ[0]#

LDRQ[1]#/GPI[41]

LFRAME#/FWH[4]

A20GATE

CPUSLP# DPRSLP#

DPSLP#

CPU

CPUPWRGD/GPO[49]

IGNNE#

INIT3_3V#

STPCLK#

THRMTRIP#

SATA AC-97/AZALIA

IDE

DDREQ

ICH6M

A20M#

FERR#

INIT#

INTR

RCIN#

NMI

SMI#

DA[0] DA[1] DA[2]

DCS1# DCS3#

DD[0] DD[1] DD[2] DD[3] DD[4] DD[5] DD[6] DD[7] DD[8]

DD[9] DD[10] DD[11] DD[12] DD[13] DD[14] DD[15]

P2 N3 N5 N4

N6 P4

P3

AF22 AF23

AE27 AE24

AD27 AF24 AG25 AG26

AE22 AF27 AG24

AD23 AF25

AG27 AE26 AE23

AC16 AB17 AC17

AD16 AE17

AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13

AB14

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LDRQ1#

H_CPUSLP#_ICH H_DPRSLP#_R

H_DPSLP#_R H_FERR_R

H_THERMTRIP_R

D

LPC_LAD[3..0] 36

LPC_LDRQ0# 36

LPC_LFRAME# 36

ICH_A20GATE 36 H_A20M# 4

1 2

R53

R250 0R2-0R250 0R2-0

1 2

R245 0R2-0R245 0R2-0

1 2 1 2

R252

H_PWRGD 4 H_IGNNE# 4 H_INIT# 4

H_INTR 4 RCIN# 36 H_NMI 4

H_SMI# 4 H_STPCLK# 4

1 2

R258

IDE_A0 26 IDE_A1 26 IDE_A2 26

IDE_CS#0 26 IDE_CS#1 26

IDE_D0 26 IDE_D1 26 IDE_D2 26 IDE_D3 26 IDE_D4 26 IDE_D5 26 IDE_D6 26 IDE_D7 26 IDE_D8 26 IDE_D9 26 IDE_D10 26 IDE_D11 26 IDE_D12 26 IDE_D13 26 IDE_D14 26 IDE_D15 26

IDE_DREQ 26

DY

0R2-0

56R2J

R6V7

VCCP_GMCH_S0

SB

H_CPUSLP# 4,6 H_DPRSLP# 4

H_DPSLP# 4

Layout Note: R6V7 needs to placed within 2" of ICH6, R6V9 must be placed within 2" of R6V7 w/o stub.

VCCP_GMCH_S0

12

H_DPSLP#

12

R256

R256 56R2J

56R2J

VCCP_GMCH_S0

12

R6V9

R246

R246 56R2J

56R2J

DY

H_DPRSLP#

RCIN# LPC_LDRQ1#

H_FERR# 4

R257

R257 75R2

75R2

PM_THRMTRIP-I# 4,7

VCCP_GMCH_S0

12

E

R251

R251 56R2J

56R2J

DY

1 2

R617

1 2

R629

10KR2

10KR2 10KR2

10KR2

3D3V_S0

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

ICH6-M (1 of 4)

Leopard2

E

21 47Thursday, July 07, 2005

of

-1

A

U42B

PCI_AD[31..0]18,27,30,34

4 4

PCI_FRAME#27,30,34

3 3

PCI_FRAME# PCI_IRDY# PCI_TRDY# PCI_STOP#

3D3V_S0

PCI_SERR# PCI_DEVSEL# PCI_PERR# PCI_LOCK#

3D3V_S0

2 2

PCI_REQ#5 INT_PIRQA# INT_PIRQC# INT_PIRQB#

3D3V_S0

1 2 3 4 5 6

RP4

SRP10K

SRP10K RP1

RP1

SRP10K

SRP10K RP2

RP2

SRP10K

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#

E2 E5 C2 F5 F3 E9 F2 D6 E6 D3 A2 D2 D5 H3 B4

J5 K2 K5 D4 L6

G3

H4 H2 H5 B3

M6

B2 K6 K3 A5 L1 K4

J3

N2 L2

M1

L3

AC5 AD5

AF4 AG4 AC9

10

INT_PIRQD#

9

INT_PIRQG#

8

INT_PIRQF#

7

INT_PIRQE#

10

INT_PIRQH#

9

PCI_REQ#2

8

PCI_REQ#3

7

PM_CLKRUN#

10

PCI_SERIRQ

9

MCH_SYNC#

8

PCI_REQ#0

7

PM_THRM#

AD[0] AD[1] AD[2] AD[3] AD[4] AD[5] AD[6] AD[7] AD[8] AD[9] AD[10] AD[11] AD[12] AD[13] AD[14] AD[15] AD[16] AD[17] AD[18] AD[19] AD[20] AD[21] AD[22] AD[23] AD[24] AD[25] AD[26] AD[27] AD[28] AD[29] AD[30] AD[31]

FRAME#

PIRQ[A]# PIRQ[B]# PIRQ[C]# PIRQ[D]#

RSVD[1] RSVD[2] RSVD[3] RSVD[4] RSVD[5]

3D3V_S0

U42B

PCI

Interrupt I/F

RESERVED

REQ[0]# GNT[0]# REQ[1]# GNT[1]# REQ[2]# GNT[2]# REQ[3]# GNT[3]#

REQ[4]#/GPI[40]

GNT[4]#/GPO[48]

REQ[5]#/GPI[1]

GNT[5]#/GPO[17]

REQ[6]#/GPI[0]

GNT[6]#/GPO[16]

C/BE[0]# C/BE[1]# C/BE[2]# C/BE[3]#

IRDY#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR# STOP# TRDY#

PLTRST#

PCICLK

PME#

PIRQ[E]#/GPI[2]

PIRQ[F]#/GPI[3] PIRQ[G]#/GPI[4] PIRQ[H]#/GPI[5]

RSVD[6] RSVD[7] RSVD[8]

TP[3]

ICH6M

ICH6 Pullups

PM_SUS_STAT#36

L5 C1 B5 B6 M5 F1 B8 C8 F7 E7 E8 F6 B7 D8

J6 H6 G4 G2

A3 E1

PAR

R2 C3 E3 C5 G5 J1 J2

R5 G6 P6

D9 C7 C6 M3

AD9 AF8 AG8 U3

PM_RI# SMB_LINK_ALERT# SMLINK0 SMLINK1

PCIE_WAKE# PM_BATLOW#_R

PM_SUS_STAT#

PCI_REQ#1 ICH_GPI7 GPI12

PCI_REQ#0 PCI_REQ#1 PCI_REQ#2 PCI_REQ#3

ICH_GNT3 PCB_VER2 ICH_GPO48 PCI_REQ#5 ICH_GPO17 ICH_GPI0_R ICH_GPO16

PCI_LOCK#

INT_PIRQE# INT_PIRQF# INT_PIRQG# INT_PIRQH#

B

PCI_REQ#0 34 PCI_GNT#0 34 PCI_REQ#1 27 PCI_GNT#1 27 PCI_REQ#2 30 PCI_GNT#2 30

TP47TP47 TP49TP49

TP48TP48

TP46TP46

PCI_C/BE#0 27,30,34 PCI_C/BE#1 27,30,34 PCI_C/BE#2 27,30,34 PCI_C/BE#3 27,30,34

PCI_IRDY# 27,30,34 PCI_PAR 27,30,34 ICH_PCIRST# 24 PCI_DEVSEL# 27,30,34 PCI_PERR# 27,30,34

PCI_SERR# 27,30,34 PCI_STOP# 27,30,34 PCI_TRDY# 27,30,34

PLT_RST# 24 CLK_ICHPCI 3 ICH_PME# 18,30,34

INT_PIRQE# 30,34 INT_PIRQF# 27 INT_PIRQG# 27

RN10

1 2 3 4 5

SRN10K

1 2

R639

1 2

R630

1 2

R631

DY

1 2

R286

1 2

R264

1 2

R628

1 2

R287

8 7 6

5K6R2

5K6R2 8K2R2

8K2R2 10KR2

10KR2

10KR2 10KR2

10KR2

3D3V_S5

3D3V_S0

10KR2

3D3V_S0

PM_DPRSLPVR41

3D3V_S5

R318

R318 10KR2

10KR2

CPPE#26

C

3D3V_S0

RN8

1 2 3 4 5

SRN100K

D15

13

TP50

1 2

R618

PM_PWRBTN#36

RSMRST#_KBC36

TP39

TPAD30

TP40

TPAD30

SRN100K

100R2

PM_SUS_CLK

SMB_LINK_ALERT# SMLINK0 SMLINK1 MCH_SYNC#

PM_SUS_STAT# SYS_RESET#

SMB_CLK24,26

SMB_DATA24,26

12

ICH_SPKR32

PM_BMBUSY#7

DY

S1N4148-U2

PM_STPPCI#3

PM_STPCPU#3,41

TP14

TPAD30

M24_RST#13

NEWCARD_RST#26

BT_EN31 WIRELESS_EN#34

PM_CLKRUN#27,30,34,36

PCIE_WAKE#26

PCI_SERIRQ27,34,36

PM_THRM#25

VRM_PWRGD25

CLK_ICH143 CLK48_USB3

TP51

TPAD30

PM_SLP_S3#26,33,36,42,44,45,46 PM_SLP_S4#26,36,42

TPAD30

ICH6_PWROK25

12

R616

R616 100KR2

100KR2

PM_RI#

8

SATA0_R1

7

SATA0_R2

6

SATA0_R3

ICH_GPI7

ECSMI# ECSCI# GPI12

ECSWI#

ICH6_GPO19

ICH6_GPO21

ICH_GPO27

PCB_VER0

PCB_VER1

ICH_SLP_S5#

PM_DPRSLPVR_R PM_BATLOW#_R

PLT_RST#

T2

RI#

AF17

SATA[0]GP/GPI[26]

AE18

SATA[1]GP/GPI[29]

AF18

SATA[2]GP/GPI[30]

AG18

SATA[3]GP/GPI[31]

Y4

SMBCLK

W5

SMBDATA

Y5

LINKALERT#

W4

SMLINK[0]

U6

SMLINK[1]

AG21

MCH_SYNC#

F8

SPKR

W3

SUS_STAT#/LPCPD#

U2

SYS_RESET#

AD19

BMBUSY#

AE19

GPI[7]

R1

GPI[8]

W6

SMBALERT#/GPI[11]

M2

GPI[12]

R6

GPI[13]

AC21

STP_PCI#

AB21

GPO[19]

AD22

STP_CPU#

AD20

GPO[21]

AD21

GPO[23]

V3

GPIO[24]

P5

GPIO[25]

R3

GPIO[27]

T3

GPIO[28]

AF19

CLKRUN#

AF20

GPIO[33]

AC18

GPIO[34]

U5

WAKE#

AB20

SERIRQ

AC20

THRM#

AF21

VRMPWRGD

E10

CLK14

A27

CLK48

V6

SUSCLK

T4

SLP_S3#

T5

SLP_S4#

T6

SLP_S5#

AA1

PWROK

AE20

DPRSLPVR

V2

BATLOW#

U1

PWRBTN#

V5

LAN_RST#

Y3

RSMRST#

D

U42C

H25

PERn[1]

H24

PERp[1]

G27

PETn[1]

G26

PETp[1]

K25

PERn[2]

K24

PERp[2]

J27

PETn[2]

J26

PETp[2]

M25

PERn[3]

M24

PERp[3]

L27

PETn[3] PETp[3]

PERn[4] PERp[4] PETn[4] PETp[4]

DMI[0]RXN DMI[0]RXP DMI[0]TXN DMI[0]TXP

DMI[1]RXN DMI[1]RXP DMI[1]TXN DMI[1]TXP

DMI[2]RXN DMI[2]RXP DMI[2]TXN DMI[2]TXP

DMI[3]RXN DMI[3]RXP DMI[3]TXN DMI[3]TXP

DMI_CLKN

DMI_CLKP

OC[0]# OC[1]# OC[2]# OC[3]#

USBP[0]N USBP[0]P USBP[1]N USBP[1]P USBP[2]N USBP[2]P USBP[3]N USBP[3]P USBP[4]N USBP[4]P USBP[5]N USBP[5]P USBP[6]N USBP[6]P USBP[7]N USBP[7]P

USBRBIAS

L26 P24

P23 N27 N26

T25 T24 R27 R26

V25 V24 U27 U26

Y25 Y24 W27 W26

AB24 AB23 AA27 AA26

AD25 AC25

F24 F23 C23

D23 C25 C24

C27 B27 B26 C26

C21 D21 A20 B20 D19 C19 A18 B18 E17 D17 B16 A16 C15 D15 A14 B14

A22 B22

GPIO

PCI-EXPRESSDirect Media Interface

DMI_ZCOMP

DMI_IRCOMP

OC[4]#/GPI[9] OC[5]#/GPI[10] OC[6]#/GPI[14] OC[7]#/GPI[15]

USB

POWER MGT CLOCKS

USBRBIAS#

ICH6M

PCIE_RXN0 26

PCIE_TXN0_RSATA0_R0 PCIE_TXP0_R

USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7

USB_OC#0

USB_OC#1 USB_OC#2 USB_OC#3

USB_PN0 USB_PP0

Place within 500 mils of ICH

PCIE_RXP0 26

DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7

DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7

DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7

DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7

CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3

DMI_IRCOMP_R

TP12TP12 TP13TP13

USB_PN1 18 USB_PP1 18 USB_PN2 31 USB_PP2 31 USB_PN3 18 USB_PP3 18 USB_PN4 35 USB_PP4 35 USB_PN5 35 USB_PP5 35 USB_PN6 26 USB_PP6 26 USB_PN7 18 USB_PP7 18

USB_RBIAS_PN

E

PCIE AC coupling caps need to be within 250 mils of the driver.

C250

SCD1U16V

1 2

C251

1 2

SCD1U16V

Layout Note: PCIE AC coupling caps need to be within 250 mils of the driver.

1D5V_S0

Place within 500 mils of ICH

12

R615

R615 24D9R2F

24D9R2F

RP3

USB_OC#0 USB_OC#1 USB_OC#3 USB_OC#4 USB_OC#2

3D3V_S5

1 2

R255

RP3

1 2 3 4 5 6

SRP10K

Intel 22.6 ohm 1%

22D6R2F

PCIE_TXN0 26 PCIE_TXP0 26

3D3V_S5

10

USB_OC#5

9 8

USB_OC#7

7

USB_OC#6

3D3V_S0

12

R330

R332

10KR2

1 1

12

R329

DUMMY-R2

12

A

R331

R331 DUMMY-R2

DUMMY-R2

12

R626

R626 10KR2

10KR2

R625

R625 DUMMY-R2

DUMMY-R2

0706 -1

PCB_VER0 PCB_VER1 PCB_VER2

PUMA Board Version Setting

PCB_VER0

Ver. SA

SC 0

-1

B

PCB_VER1

0 1 1

PCB_VER2

00 1SB

0 0

0 1 0-2

0

10

3D3V_S5

12

R317

R317 100KR2

100KR2

ECSMI#

ECSCI#

ECSWI#

To avoide leakage current

C

R637

R637 100KR2

100KR2

12

6

5

R638

R638 100KR2

100KR2

D20

CH731U-U

1

2

34

D

ECSMI#_KBC 36

ECSCI#_KBC 36

ECSWI#_KBC 36

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

ICH6-M (2 of 4)

Leopard2

E

22 47Monday, July 11, 2005

of

-1

A

Layout Note: Place above caps within 100 mils of ICH near F27, P27, AB27

1D5V_S0

12

TC12

4 4

Layout Note: IDE decoupling

3D3V_S0

Layout Note: PCI decoupling

3D3V_S0

3 3

Place within 100 mils of ICH near pin AG5

2 2

1 1

1D5V_S0

Place within 100 mils of ICH

Place within 100 mils of ICH near E26, E27

Place within 100 mils of ICH pin AG10

G26

1 2

GAP-CLOSE-PWR

1D5V_GPLL_ICH_S0

3D3V_S0

12

C272

C272 SCD1U10V2MX-1

SCD1U10V2MX-1

A

TC12 ST220U10V-U

ST220U10V-U

DY

12

C295

C295 SC10U10V5ZY-L

SC10U10V5ZY-L

12

C268

C268 SC10U10V5ZY-L

SC10U10V5ZY-L

Place within 100 mils of ICH near pin AG9

12

1D5V_S0

12

C586

C586 SCD1U10V2MX-1

SCD1U10V2MX-1

Place within 100 mils of ICH pin AE1

Intel dummy

Place within 100 mils of ICH pin A13

3D3V_S5

1D5V_S0

DY

1D5V_S0

DY

12

C254

C253

SCD01U16V3KX

SC10U10V5ZY-L

1 2

3D3V_S0

12

C568

C568 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C596

C596 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C597

C597 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_ICH_S0

G29

GAP-CLOSE-PWR

12

C576

C576 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C598

C598 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

12

C273

C273 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

12

C610

C610 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

Place within 100 mils of ICH pin V7

12

C595

C595 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

B

U42E

AA22

12

C252

SCD1U10V2MX-1

12

C281

SCD1U10V2MX-1

12

C604

SCD1U10V2MX-1

ICH6_VCCLAN3D3V

B

VCC1_5_B

AA24

VCC1_5_B

AA25

VCC1_5_B

AB25

VCC1_5_B

AB26

VCC1_5_B

AB27

VCC1_5_B

F25

VCC1_5_B

F26

VCC1_5_B

F27

VCC1_5_B

G22

VCC1_5_B

G23

VCC1_5_B

G24

VCC1_5_B

G25

VCC1_5_B

H21

VCC1_5_B

H22

VCC1_5_B

J21

VCC1_5_B

J22

VCC1_5_B

K21

VCC1_5_B

K22

VCC1_5_B

L21

VCC1_5_B

L22

VCC1_5_B

M21

VCC1_5_B

M22

VCC1_5_B

N21

VCC1_5_B

N22

VCC1_5_B

N23

VCC1_5_B

N24

VCC1_5_B

N25

VCC1_5_B

P21

VCC1_5_B

P25

VCC1_5_B

P26

VCC1_5_B

P27

VCC1_5_B

R21

VCC1_5_B

R22

VCC1_5_B

T21

VCC1_5_B

T22

VCC1_5_B

U21

VCC1_5_B

U22

VCC1_5_B

V21

VCC1_5_B

V22

VCC1_5_B

W21

VCC1_5_B

W22

VCC1_5_B

Y21

VCC1_5_B

Y22

VCC1_5_B

AA6

VCC1_5_A

AB4

VCC1_5_A

AB5

VCC1_5_A

AB6

VCC1_5_A

AC4

VCC1_5_A

AD4

VCC1_5_A

AE4

VCC1_5_A

AE5

VCC1_5_A

AF5

VCC1_5_A

AG5

VCC1_5_A

AA7

VCC1_5_A

AA8

VCC1_5_A

AA9

VCC1_5_A

AB8

VCC1_5_A

AC8

VCC1_5_A

AD8

VCC1_5_A

AE8

VCC1_5_A

AE9

VCC1_5_A

AF9

VCC1_5_A

AG9

VCC1_5_A

AC27

VCCDMIPLL

E26

VCC3_3

AE1

VCCSATAPLL

AG10

VCC3_3

A13

VCCLAN3_3/VCCSUS3_3

F14

VCCLAN3_3/VCCSUS3_3

G13

VCCLAN3_3/VCCSUS3_3

G14

VCCLAN3_3/VCCSUS3_3

A11

VCCSUS3_3

U4

VCCSUS3_3

V1

VCCSUS3_3

V7

VCCSUS3_3

W2

VCCSUS3_3

Y7

VCCSUS3_3

A17

VCCSUS3_3

B17

VCCSUS3_3

C17

VCCSUS3_3

F18

VCCSUS3_3

G17

VCCSUS3_3

G18

VCCSUS3_3

PCIE

SATA

VCCLAN1_5/VCCSUS1_5 VCCLAN1_5/VCCSUS1_5

ICH6M

VCC1_5_B

AA23

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

COREIDEPCI

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCCSUS1_5 VCCSUS1_5

VCCSUS1_5

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

USB CORE USB

VCC1_5_A VCC1_5_A

VCC2_5 VCC2_5

PCI/IDE

REF

V5REF_SUS

VCCUSBPLL

VCCSUS3_3

VCCRTC

V_CPU_IO V_CPU_IO V_CPU_IO

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

Place within 100 mils of ICH pin A17

V5REF V5REF

F9 U17 U16 U14 U12 U11 T17 T11 P17 P11 M17 M11 L17 L16 L14 L12 L11 AA21 AA20 AA19

AA10 AG19 AG16 AG13 AD17 AC15 AA17 AA15 AA14 AA12

P1 M7 L7 L4 J7 H7 H1 E4 B1 A6

U7 R7

G19 G20

F20 E24 E23 E22 E21 E20 D27 D26 D25 D24

G8 AB18

P7

AA18 A8

F21 A25

A24 AB3

G11 G10

AG23 AD26 AB22

G16 G15 F16 F15 E16 D16 C16

C

12

C573

C573 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

ICH_VCC1_5

ICH6_VCCLAN1D5V

12

C

12

C592

SCD1U10V2MX-1

Place within 100 mils of ICH pin AG13, AG16

Layout Note: Distribute in PCI section near pin A2-A6 near D1-H1

12

SCD1U10V2MX-1

12

C565

V2D5S_PCI_IDE

12

C587

C587 SCD1U10V2MX-1

SCD1U10V2MX-1

V5REF_S0 V5REF_S5

C572

C572 SCD1U10V2MX-1

SCD1U10V2MX-1

C575

C575 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C593

DY

SCD1U10V2MX-1

3D3V_S0

12

C267

C264

C264 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C589

C296

C296 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_ICH_S5

12

C567

C567 SCD1U10V2MX-1

SCD1U10V2MX-1

G69

1 2

GAP-CLOSE-PWR

Layout Note: Place near AB18

Place within 100 mils of ICH pin G10

12

C569

C569 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C581

C581 SCD1U10V2MX-1

SCD1U10V2MX-1

1D5V_S0

12

C584

C584 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C583

DY

SCD1U10V2MX-1

3D3V_S0

12

C297

C297 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C591

SCD1U10V2MX-1

1D5V_ICH_S5

1D5V_S0

Place both within 100 mils of ICH near D27

2D5V_S0

VCCP_GMCH_S0

Layout Note: Place near AG23

12

C571

C571 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

D

12

C577

C577 SCD1U10V2MX-1

SCD1U10V2MX-1

12

DY

ALL NO_STUFF Caps do not have layout requirements but if layout allows then place next to ICH6

12

C594

C594 SCD1U10V2MX-1

SCD1U10V2MX-1

12

C574

C574 SCD1U10V2MX-1

SCD1U10V2MX-1

3D3V_S5

12

C585

C585 SCD1U10V2MX-1

SCD1U10V2MX-1

Layout Note:

12

C590

C582

SCD1U10V2MX-1

Place within 100 mils of ICH

C259

C259 SCD1U10V2MX-1

SCD1U10V2MX-1

C263

C263 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

C590

DY

SCD1U10V2MX-1

1D5V_ICH_S5 1D5V_S5

Layout Note: Place near U7

1D5V_ICH_S0

RTC_AUX_S5

12

C609

SCD1U10V2MX-1

3D3V_S5

D

Place near pin AA19

12

C282

C282 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

V5REF_S0

V5REF_S5

Place within 100

12

mils of ICH

C258

C258 SCD01U16V3KX

SCD01U16V3KX

Layout Note: Place near AB3

12

C615

C615 SCD1U10V2MX-1

SCD1U10V2MX-1

DY

E

*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail

5V_S0

D19

3D3V_S0

D16

CH751H-40-U

2 1 12

C271

C271 SCD1U16V

SCD1U16V

D35

CH751H-40-U

2 1 12

C566

C566 SCD1U16V

SCD1U16V

1D5V_S5

12

R660

R660 0R2-0

0R2-0

DY

ICH6_VCCLAN1D5V

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Date: Sheet

ICH6-M (3 of 4)

Leopard2

CH751H-40-U

2 1

12

R285

R285 100R2

100R2

Intel 10 ohm

12

C280

C280 SC1U10V3ZY

SC1U10V3ZY

5V_S53D3V_S5

12

R611

R611 10R2

10R2

Intel 10 ohm

12

C549

C549 SC1U10V3ZY

SC1U10V3ZY

SC

R659

1 2

0R2-0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

1D5V_S0

23 47Thursday, July 07, 2005

of

-1

A

4 4

3 3

2 2

SMBUS(ICH6 ---> SODIMM,CLKGEN)

3D3V_S0

3D3V_S5

2

14

3

SMB_ICH_CTL

5 6

U37

34 2 1

2N7002DW

RN5

A

RN5

SRN10KJ

1 1

SMB_CLK22,26

SMB_DATA22,26

2

14

3

RN4

RN4 SRN4D7KJ

SRN4D7KJ

B

SMBD_ICH 3,11

SMBC_ICH 3,11

B

C

5V_S0

U78A

PLT_RST#

147

1 2

3

TSAHCT32

RSTDRV#_R

1 2

R644

33R2

PCIRST# 3V to 5V level shift for HDD & CDROM

3D3V_S0

U44B

147

4

PLT_RST#22

ICH_PCIRST#22

5

3D3V_S0

147

9

10

PLT_RST#_R

6

TSLCX08-U

U44C

ICH_PCIRST#_R

8

TSLCX08-U

1 2

33R2

R268

ICH6 asserts PLTRST# to reset devices on the platform.

1 2

33R2

R284

Secondary PCI Bus reset signal.

PCIRST# Buffer to enhance the driving strength

C

D

RSTDRV#_5 26

PLT_RST1# 7,13,26

PCIRST1# 27,28,30,34,36

D

E

U42D

E27

VSS

Y6

VSS

Y27

VSS

Y26

VSS

Y23

VSS

W7

VSS

W25

VSS

W24

VSS

W23

VSS

W1

VSS

V4

VSS

V27

VSS

V26

VSS

V23

VSS

U25

VSS

U24

VSS

U23

VSS

U15

VSS

U13

VSS

T7

VSS

T27

VSS

T26

VSS

T23

VSS

T16

VSS

T15

VSS

T14

VSS

T13

VSS

T12

VSS

T1

VSS

R4

VSS

R25

VSS

R24

VSS

R23

VSS

R17

VSS

R16

VSS

R15

VSS

R14

VSS

R13

VSS

R12

VSS

R11

VSS

P22

VSS

P16

VSS

P15

VSS

P14

VSS

P13

VSS

P12

VSS

N7

VSS

N17

VSS

N16

VSS

N15

VSS

N14

VSS

N13

VSS

N12

VSS

N11

VSS

N1

VSS

M4

VSS

M27

VSS

M26

VSS

M23

VSS

M16

VSS

M15

VSS

M14

VSS

M13

VSS

M12

VSS

L25

VSS

L24

VSS

L23

VSS

L15

VSS

L13

VSS

K7

VSS

K27

VSS

K26

VSS

K23

VSS

K1

VSS

J4

VSS

J25

VSS

J24

VSS

J23

VSS

H27

VSS

H26

VSS

H23

VSS

G9

VSS

G7

VSS

G21

VSS

G12

VSS

G1

VSS

ICH6M

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

ICH6-M (4 of 4)

Leopard2

F4

VSS

F22

VSS

F19

VSS

F17

VSS

E25

VSS

E19

VSS

E18

VSS

E15

VSS

E14

VSS

D7

VSS

D22

VSS

D20

VSS

D18

VSS

D14

VSS

D13

VSS

D10

VSS

D1

VSS

C4

VSS

C22

VSS

C20

VSS

C18

VSS

C14

VSS

B25

VSS

B24

VSS

B23

VSS

B21

VSS

B19

VSS

B15

VSS

B13

VSS

AG7

VSS

AG3

VSS

AG22

VSS

AG20

VSS

AG17

VSS

AG14

VSS

AG12

VSS

AG1

VSS

AF7

VSS

AF3

VSS

AF26

VSS

AF12

VSS

AF10

VSS

AF1

VSS

AE7

VSS

AE6

VSS

AE25

VSS

AE21

VSS

AE2

VSS

AE12

VSS

AE11

VSS

AE10

VSS

AD6

VSS

AD24

VSS

AD2

VSS

AD18

VSS

AD15

VSS

AD10

VSS

AD1

VSS

AC6

VSS

AC3

VSS

AC26

VSS

AC24

VSS

AC23

VSS

AC22

VSS

AC12

VSS

AC10

VSS

AB9

VSS

AB7

VSS

AB2

VSS

AB19

VSS

AB10

VSS

AB1

VSS

AA4

VSS

AA16

VSS

AA13

VSS

AA11

VSS

A9

VSS

A7

VSS

A4

VSS

A26

VSS

A23

VSS

A21

VSS

A19

VSS

A15

VSS

A12

VSS

A1

VSS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

24 47Thursday, July 07, 2005

E

-1

A

5V_S0 5V_G768_S0

G9

4 4

G9

1 2

GAP-CLOSE-PWR

12

EC20

EC20 SC1000P50V

SC1000P50V

Close to G768D

12

BC6

BC6 SCD1U16V

SCD1U16V

12

DY

BC5

BC5 SC10U10V6ZY-U

SC10U10V6ZY-U

RUNPWROK

Put these two Caps near the thermal diode.

3 3

THERMDP2

3

Q9

S2N3904-U3

2

Q9

1

BC11

BC11 SC470P50V3JN

SC470P50V3JN

DY

THERMDN

SYSTEM SENSOR

12

BC7

BC7 SC2K2P

SC2K2P

THERMDP1/DP2/THERMDN ON THE SAME LAYER W/S = 10/5 MIL, 12 MIL AWAY FROM OTHERS

2 2

CAPS CLOSE TO G768B

THERMDP1

BC1

BC1 SC470P50V3JN

SC470P50V3JN

DY

VGATE41

THERMDP2THERMDP1

BC4

BC4 SC2K2P

SC2K2P

1 2

THERMDNTHERMDN

VCCP_PWRGD42,44,45

180 ms after VCC_G768 > 4.38v, p2, 7

5V_S0

12

R557

R557 10KR2

FAN1

5 3 2

1 4

ETY-CON3-S1

1 1

The symbol use 2nd source The P/N is the main source Main source:20.D0152.103 2nd source:20.D0012.103

FAN_FB

VCC_FAN

10KR2

D33

D33 S1N4148-U2

S1N4148-U2

1 3

A

12

BC117

BC117 SC10U10V6ZY-U

SC10U10V6ZY-U

12

BC118

BC118 SCD1U16V

SCD1U16V

12

BC119

BC119 SCD1U16V

SCD1U16V

THERMDP14

THERMDN4

B

Reserve for G768B works at High Speed

1 2

R46

12

R38

R38 10KR2

10KR2

1 2

RUNPWROK

B

VCC_FAN

THERMDP2

12 13

SMBC_KBC36

G768_RST#

4K7R2

CLK_PWRGD#3,41

R529

R529 0R0402-PAD

0R0402-PAD R530

R530 0R0402-PAD

0R0402-PAD

3D3V_S0

SMBD_KBC36

5V_G768_S0

147

U12

1

FANVCC

2

VCC

3

DXP1

4

DXN

5

DXP2

6

RESET#

7

GND

8

AGND

G768D

PWROK 7

VRM_PWRGD 22

U44D

11

TSLCX08-U

TH_SHUT

VCC

SMBCLK

NC

SMBDATA

ALERT#

FG

CLK

U63

1

NC

2

A GND3Y

NC7S14-U

DY

ICH6_PWROK 22

16 15 14 13 12 11 10 9

C

VCC

C

SMBC_G768D SMBD_G768D FAN_FB

3D3V_S0

5

VRM_PWRGD

4

5V_S0

14

RN1

SRN10KJ

CLK32_G768 36

2

3

SMBD_G768D

SMBC_G768D

PM_THRM# 22

3D3V_AUX

12

R68

R68 10KR2

10KR2

THERMDP_M24

THERMDN_M24

THERMDP_M2413

THERMDN_M2413

R30:5K SET TO 120°C Must close to MAX6509

3

D8

DY

1

2

BAT54-1

12

BC10

BC10 SCD1U16V

SCD1U16V

DY

BC9

BC9 SC2K2P

SC2K2P

1 2

3D3V_S0

D

12

R30

R30 22KR3F

22KR3F

12

C57

C57 SCD1U16V

SCD1U16V

U4

M6509_SET

U4

1

SET

2

GND OUT#3HYST

MAX6509HAUK-T-U

VCC

5 4

Put under CPU Socket

RSMRST# 21,36,43

S5_ENABLE36,42

G781 Close to VGA chip

U13

1 2 3 4

VCC DXP DXN THERM#

74.00781.0BD

G781

Title

Size Document Number Rev

A3

Date: Sheet of

SMBCLK

SMBDATA

ALERT#

GND

8 7 6 5

E

5V_S5

12

C34

C34 SCD1U25V3KX

SCD1U25V3KX

3D3V_AUX

U18

1

A

2

B GND3Y

NC7S08-U

5

VCC

4

3D3V_S0

12

R59

R59 2K2R2

2K2R2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

G768D

Leopard2

E

S5PWR_ENABLE 46

DDC3_CLK 13,19 DDC3_DATA 13,19 VGA_ALERT# 13

25 47Monday, July 11, 2005

-1

A

B

C

D

E

HDD Connector

IDE_D[15..0]21

IDE_D8 IDE_D9 IDE_D10

5V_S0

IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15

DIAG

4 4

HDDCSEL1

12

R528

R528 470R2

470R2

IDE_A221

IDE_CS#121

3 3

NEWCARD Connector

Place them Near to Chip Place them Near to Connector

3D3V_S5 1D5V_S0 3D3V_NEW_LAN_S53D3V_NEW_S0 1D5V_NEW_S0

C256

C256 SCD1U16V

SCD1U16V

12

DY

C257

C257 SCD1U16V

SCD1U16V

12

DY

2 2

DY

HDD1

2 4

6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44

SYN-CONN44D-5

12

C483

SCD1U16V

47 45 1

3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 46 48

12

C480

SC10U10V5ZY-L

12

C270

C270 SC10U10V5ZY-L

SC10U10V5ZY-L

IDE_D7 IDE_D6 IDE_D5 IDE_D4 IDE_D3 IDE_D2 IDE_D1 IDE_D0

PBIDDACK#

21

D32

SSM24L-U

DY

12

IDE_DREQ 21 IDE_IOW# 21 IDE_IOR# 21

12

C269

C269 SCD1U16V

SCD1U16V

1 2

R532 0R0402-PADR532 0R0402-PAD

IDE_A1 21 IDE_A0 21 IDE_CS#0 21

C260

C260 SC10U10V5ZY-L

SC10U10V5ZY-L

RSTDRV#_5 24

3D3V_S0

12

HDD_LED#

12

C261

C261 SCD1U16V

SCD1U16V

R531

R531 4K7R2

4K7R2

DY

12

5V_S0

3D3V_S0

12

R541

R541 4K7R2

4K7R2

C265

C265 SCD1U16V

SCD1U16V

CDROM

CN16

53

4 6

8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48

12

50 54

SYN-CONN50-4R3GP

PIN 49,50 DON'T USE

R542

R542 10KR2

10KR2

2

CD_AUDR32

5V_S0

12

TP18TP18

BC69

BC69 SC10U10V6ZY-U

SC10U10V6ZY-U

IDE_D8 IDE_D9 IDE_D10 IDE_D11 IDE_D12 IDE_D13 IDE_D14 IDE_D15 IDE_DREQ IDE_IOR#

IDE_DACK# BAY_ID0 DIAG IDE_A2 IDE_CS#1

C292

SCD1U16V

12

R527

R527 4K7R2

4K7R2

IDE_IORDY 21 IDE_DACK# 21 IDE_IRQ14 21

HDD_LED# 19

5V_S0

1 2 12

R540

R540 2K7R2J

2K7R2J

DY

SKT3

1

3 4

CARD-SKT21-U2

For Newcard socket

51 12 3

RSTDRV#_5

5

IDE_D7

7

IDE_D6

9

IDE_D5

11

IDE_D4

13

IDE_D3

15

IDE_D2

17

IDE_D1

19

IDE_D0

21 23 25 27 29 31 33 35 37 39 41 43 45 47 49

52

The symbol use 2nd source The P/N is the main source Main source:20.10150.050 2nd source:20.B0040.050

IDE_IOW# IDE_IORDY IDE_IRQ14 IDE_A1 IDE_A0 IDE_CS#0

CSEL

CDROM_CSEL

IDE_IRQ14

CD_AUDL 32 CD_AGND 32

CDROM_LED# 19

5V_S0

1 2

R320

8K2R2

5V_S0

3D3V_S0

1 2 12

R311

R311 10KR2

10KR2

R288

R288 DUMMY-R2

DUMMY-R2

CN14

MH2

MH1

26 25 24

23 22 21 20 19 18 17 16 15 14 13 12 11 10

SMBUS(ICH6--NEWCARD,LAN)

9 8 7 6 5 4

3 2

1

JAE-CON26-U

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet

HDD / CDROM/NEWCARD

A3

Leopard2

26 47Monday, July 11, 2005

of

E

of

-1

3D3V_S5

U41

CPUSB#

1D5V_S0

1D5V_NEW_S0

3D3V_S0

3D3V_NEW_S0

NEWCARD_OC#

TP15

TP15 TP-2

TP-2

1 1

3D3V_NEW_LAN_S5

3D3V_S5

PERST#

19

1.5VIN

18

1.5VIN

17

1.5VOUT

16

1.5VOUT

5

3.3VIN

6

3.3VIN

7

3.3VOUT

8

3.3VOUT

23

OC#

21

3.3VAUX_IN

9

PERST#

20

AUX_OUT

TPS2231

NEWCARD_RST#22

A

CPUTSB#

CPPE#

STBY#

SHDN#

SYSRST#

RCLKEN

NC#1 NC#10 NC#12 NC#13 NC#24

GND GND

14 15 4 3 2 22

1 10 12 13 24

11 25

PLT_RST1#

CPPE#

R267 0R2-0R267 0R2-0

2 1 4

TPS2231_RST#

1 2

DY

U43

1

A

2

B GND3Y

NC7SZ08-U

RN7

3

SRN100KJ

PM_SLP_S3# 22,33,36,42,44,45,46 PM_SLP_S4# 22,36,42

PREQ2# 3

5

VCC

TPS2231_RST#

4

B

CPPE# CPUSB#

PLT_RST1# 7,13,24

D

Q16

CONN_CLKREQ#

1

2N7002

G

S

2 3

3D3V_S5

3D3V_S0

12

R488

R488 10KR2

10KR2

PCIE_RXP022 PCIE_RXN022

SC

PCIE_WAKE#22

SMB_DATA22,24 SMB_CLK22,24

PCIE_TXP022

PCIE_TXN022

CLK_PCIE_NEW3

CLK_PCIE_NEW#3

CPPE#22

3D3V_NEW_S0

3D3V_NEW_LAN_S5

1D5V_NEW_S0

USB_PP622 USB_PN622

C

TP45TP45

TP38TP38 TP35TP35

PCIE_RXP0_R PCIE_RXN0_R

CONN_CLKREQ#

PERST# CONN_WAKE#

SMB_DATA_C SMB_CLK_C CONN_TP2 CONN_TP3 CPUSB#

A

3D3V_S0

PCI_AD[31..0]18,22,30,34

4 4

3 3

2 2

1 1

12

3D3V_S0

R323

R323 150R2

150R2

PCI_C/BE#022,30,34 PCI_C/BE#122,30,34 PCI_C/BE#222,30,34 PCI_C/BE#322,30,34

PCI_PAR22,30,34

PCI_FRAME#22,30,34

PCI_TRDY#22,30,34

PCI_IRDY#22,30,34 PCI_STOP#22,30,34

PCI_DEVSEL#22,30,34

PCI_AD22

PCI_PERR#22,30,34 PCI_SERR#22,30,34 PCI_REQ#122

PCI_GNT#122 PCLK_PCM3

PCIRST1#24,28,30,34,36

TP52TPAD30 TP52TPAD30

3D3V_S0

CB_DATA28

CB_CLOCK28

CB_LATCH28

PCI_SPKR32

R336 10KR2R336 10KR2 R337

R337

3D3V_S0

1 2

R312

1 2 1 2

R300

10KR2

100R2

7421_PME#

CS_SUSPEND#

10KR2

B_USB_EN A_USB_EN

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

CS_IDSEL

W10

V10 U10 R10 N10 V11 U11 R11

W12

V12 U12 N11

W13 W11

W17

P12

W3

U2

V1

V2

U3

W2

V3

U4

V4

V5

U5

R6

P6

W6

V6

U6

R7

V9

U9

R9

N9

W9 W7 W4

P9

V7

R8

U7

W8

N8

W5

V8

U8

U1

T2

P5

R3

T1

T3

R2

N1

L6

N2

L7

E1

E2

M2 M3

T19

L5

L2

K5

K3

K7

L1

L3

U47A

VCCP VCCP

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0

C/BE0# C/BE1# C/BE2# C/BE3#

PAR FRAME# TRDY# IRDY# STOP# DEVSEL# IDSEL PERR# SERR# REQ# GNT# PCLK PRST# GRST# RI_OUT#/PME#

SUSPEND# DATA

CLOCK LATCH SPKROUT

B_USB_EN# A_USB_EN#

SDA SCL

NC#W17 RSVD TEST0

RSVD RSVD RSVD RSVD RSVD RSVD RSVD

PCI7411-1

U1-1

CARD BUS

U1-10

U1-5

MS_SDIO(DATA0)/SD_DAT0/SM_D0

U1-6

U1-9

UNUSED TERMINALS

B

1 of 4

U1-7

VDPLL_33

VDPLL_15

1394

U1-8

MS_CLK/SD_CLK/SM_EL_WP#

SD/SDIO

PHY_TEST_MA

PC0(TEST1) PC1(TEST2) PC2(TEST3)

MC_PWR_CTRL_0 MC_PWR_CTRL_1

MS_BS/SD_CMD/SM_WE#

MS_DATA3/SD_DAT3/SM_D3 MS_DATA2/SD_DAT2/SM_D2 MS_DATA1/SD_DAT1/SM_D1

SD_CLK/SM_RE# SD_CMD/SM_ALE

SD_DAT0/SM_D4 SD_DAT1/SM_D5 SD_DAT2/SM_D6 SD_DAT3/SM_D7

SD_WP/SM_CE

SM_PHYS_WP#

MFUNC0 MFUNC1 MFUNC2 MFUNC3 MFUNC4 MFUNC5 MFUNC6

CLK_48

AVDD AVDD AVDD

VSSPLL

TPBIAS0

TPA0P TPA0N

TPB0P TPB0N

CPS CNA

AGND AGND AGND

TPBIAS1

TPA1P TPA1N

TPB1P TPB1N

SD_CD# MS_CD# SM_CD#

SM_CLE

SM_R/B#

XO

R0 R1

XI

N3

PCM_INTB#

M5 P1 P2 P3

CB_MFUNC5

N5 R1

M1

R13 R14 V17

VDPLL_33

V19 P14

T18 T17

1394_R0

U18

1394_R1

U19 U15 V15

W15 V14

W14

1394_PHYTEST

R17

1394_CPS

M11

1394_CNA

P15 R19

R18

PC[2:0]=000

R12 U13 V13

N12 U14 U16

U17 V18

W18 V16

W16

F1 F2

E3 F5 F6 G5 F3

H5 G3 G2

G1 J5 J3

H3 J6 J1 J2

H7 J7 K1 K2

INT_PIRQG#

VDPLL_15

1 2

R289

1 2 1 2

1394_XO

1394_XI

1394_TPBIAS1

1394_TPB1P 1394_TPB1N

MC_PWR_CTRL-1

1 2

R338 0R2-0R338 0R2-0

1 2

R324

CLK48_CARDBUS 3

3D3V_PLL_S0

6K34R3F

R322

R322 4K7R2

4K7R2 R335

R335 4K7R2

4K7R2

X2

X-24D576M-2

1 2

1394_TPA1P 31 1394_TPA1N 31

SD_CD# 29 MS_CD# 29 SM_CD# 29 MS_CLK 29 MS_BS 29

MS_D3 29 MS_D2 29 MS_D1 29

MS_SDIO 29 SM_RE# 29 SM_ALE 29

SM_D4 29 SM_D5 29 SM_D6 29 SM_D7 29

SD_WP 29 SM_CLE 29 SM_R/B# 29

C

INTA# CARBUS 1 INTB# NONE INTC# 1394 INTD# CARD READER

0R2-0

1 2

C294

1 2

SC12P

C301

1 2

SC15P

TP19

TP19 TPAD30

TPAD30

INT_PIRQG# 22 INT_PIRQF# 22

PCI_SERIRQ 22,34,36 7421_LED 19

PM_CLKRUN# 22,30,34,36

C293

C293 SCD1U16V

SCD1U16V

1394_TPBIAS0 31 1394_TPA0P 31

1394_TPA0N 31 1394_TPB0P 31

1394_TPB0N 31

3D3V_PLL_S0

3D3V_S0

12

C283

C283 SCD1U16V

SCD1U16V

MC_PWR_CTRL#

MS/MS_pro

SM

D

3D3V_S0

* All 1394 signals must be routed on top side only * Differential pairs of each ports should have equal trace length * Stubs must be keep as short as possible

1394_TPBIAS1 31

1394_TPB1P 1394_TPB1N

XD

1394_TPB1P 31 1394_TPB1N 31

SD MS/MS_pro

3D3V_S0

D17

BAW56-1

1 2

3

SD_CD#

1

SM_CD# 7421_LED

2

Bypass/Decupoling Capacitors Should be places as close to PCI7421 as possible

3D3V_S0

12

34

12

C287

C287 SCD1U16V

SCD1U16V

12

C314

C314 SCD1U16V

SCD1U16V

12

C275

C275 SC10U10V5ZY-L

SC10U10V5ZY-L

R282

R282 10KR2

10KR2

1

2

5

6

U45

U45 2N7002DW

2N7002DW

12

C312

C312 SC1000P50V

SC1000P50V

DY

3D3V_S0

12

C313

C313 SC1000P50V

SC1000P50V

G28

1 2

GAP-CLOSE-PWR

MC_PWR_CTRL#

R281

R281 100KR2

100KR2

12

C288

C288 SCD1U16V

SCD1U16V

12

C310

C310 SCD1U16V

SCD1U16V

DY

12

C276

C276 SC1000P50V

SC1000P50V

3D3V_S0

E

12

3D3V_PLL_S03D3V_S0

12

R280

R280 10KR2

10KR2

MC_PWR_CTRL 29

C289

C289 SCD1U16V

SCD1U16V

DY

C311

C311 SCD1U16V

SCD1U16V

DY

C274

C274 SC1U10V3KX

SC1U10V3KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

A

B

C

D

Date: Sheet of

TI SNC1Q21 (1 of 2)

Leopard2

27 47Monday, July 11, 2005

E

-1

of

-1

A

B

C

D

E

A5 A11

D1 C1 D3 C2 B1 B4 A4 E6 B5 C6 B6 G9 C7 B7 A7 A10 E11 G11 C11 B11 C12 B12 A12 E12 C13 F12 A13 C14 E13 A14 B14 E14

C5 F9 B10 G12

G10 C8

A8 B8 A9 C9 E10

F10 B3

E7 B9

B2 C3 E9

C4 A6

A2 C15

E5 A3 E8

B13 D2 C10

VCC_ASKT_S0

1 2

C606

C606 SCD01U16V2KX

SCD01U16V2KX

CBB_D10 29 CBB_D9 29 CBB_D1 29 CBB_D8 29 CBB_D0 29 CBB_A0 29 CBB_A1 29 CBB_A2 29 CBB_A3 29 CBB_A4 29 CBB_A5 29 CBB_A6 29 CBB_A25 29 CBB_A7 29 CBB_A24 29 CBB_A17 29 CBB_IOWR# 29 CBB_A9 29 CBB_IORD# 29 CBB_A11 29 CBB_OE# 29 CBB_CE2# 29 CBB_A10 29 CBB_D15 29 CBB_D7 29 CBB_D13 29 CBB_D6 29 CBB_D12 29 CBB_D5 29 CBB_D11 29 CBB_D4 29 CBB_D3 29

CBB_REG# 29 CBB_A12 29 CBB_A8 29 CBB_CE1# 29

CBB_A13 29 CBB_A23 29

CBB_A22 29 CBB_A15 29 CBB_A20 29 CBB_A21 29 CBB_A19 29

CBB_A14 29 CBB_WAIT# 29

CBB_INPACK# 29 CBB_WE# 29

CBB_BVD1# 29 CBB_WP 29 CBB_A16 29

CBB_RDY 29 CBB_RESET 29

CBB_BVD2# 29 CBB_CD1# 29

CBB_CD2# 29 CBB_VS1# 29 CBB_VS2# 29

CBB_D14 29 CBB_D2 29 CBB_A18 29

B

2 of 4

U47B

4 4

3 3

2 2

1 1

U47B

U1-2

CARDBUS A

A_CSTSCHG/A_BVD1(STSCHG#/RI#)

PCI7411-1

2 of 4

VCCA VCCA

A_CAD31/A_D10

A_CAD30/A_D9 A_CAD29/A_D1 A_CAD28/A_D8 A_CAD27/A_D0 A_CAD26/A_A0 A_CAD25/A_A1 A_CAD24/A_A2 A_CAD23/A_A3 A_CAD22/A_A4 A_CAD21/A_A5 A_CAD20/A_A6

A_CAD19/A_A25

A_CAD18/A_A7 A_CAD17/A_A24 A_CAD16/A_A17

A_CAD15/A_IOWR#

A_CAD14/A_A9

A_CAD13/A_IORD#

A_CAD12/A_A11

A_CAD11/A_OE#

A_CAD10/A_CE2#

A_CAD9/A_A10

A_CAD8/A_D15

A_CAD7/A_D7

A_CAD6/A_D13

A_CAD5/A_D6

A_CAD4/A_D12

A_CAD3/A_D5

A_CAD2/A_D11

A_CAD1/A_D4 A_CAD0/A_D3

A_CC/BE3#/A_REG#

A_CC/BE2#/A_A12

A_CC/BE1#/A_A8

A_CC/BE0#/A_CE1#

A_CPAR/A_A13

A_CFRAME#/A_A23

A_CTRDY#/A_A22

A_CIRDY#/A_A15

A_CSTOP#/A_A20

A_CDEVSEL#/A_A21

A_CBLOCK#/A_A19

A_CPERR#/A_A14

A_CSERR#/A_WAIT#

A_CREQ#/A_INPACK#

A_CGNT#/A_WE#

A_CCLKRUN#/A_WP(IOIS16#)

A_CCLK/A_A16

A_CINT#/A_READY(IREQ#)

A_CRST#/A_RESET

A_CAUDIO/A_BVD2(SPKR#)

A_CCD1#/A_CD1# A_CCD2#/A_CD2#

A_CVS1/A_VS1# A_CVS2/A_VS2#

A_RSVD/A_D14

A_RSVD/A_D2

A_RSVD/A_A18

A

U47C

U1-3

CARDBUS B

PCI7411-1

3 of 4

RSVD RSVD

RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD RSVD RSVD

RSVD RSVD

RSVD RSVD RSVD

RSVD RSVD RSVD RSVD

RSVD RSVD RSVD

D19 K19

B15 A16 B16 A17 C16 D17 C19 D18 E17 E19 G15 F18 H14 H15 G17 K17 L13 K18 L15 L17 L18 L19 M17 M14 M15 N19 N18 N15 M13 P18 P17 P19

F15 G18 K14 M18

K13 G19

H17 J13 J17 H19 J19

J18 B18

E18 J15

F14 A18 H18

B19 F17 C17

N13 B17 C18 F19

N17 A15 K15

Power switch

VCC_ASKT_S0VPP_ASKT_S0

9 10

8

15

24 23 22 19 18 17 16 14 6

E

12

C602

C602 SC4D7U10V5ZY

SC4D7U10V5ZY

VCC_ASKT_S0

28 47Monday, July 11, 2005

VPP_ASKT_S0

of

-1

U77

DATA CLOCK LATCH RESET# SHDN#

3.3V

5V 5V

12V 12V

GND GND

Leopard2

12

C605

C605 SCD1U16V

SCD1U16V

AVCC AVCC

AVPP

OC#

NC NC NC NC NC NC NC NC NC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PS_SHDN#

12

C309

C309 SCD1U16V

SCD1U16V

12

R634

R634 100KR2

100KR2

3 4

5 12 21

13

1

2

7 20

11 25

TSP2220A

TI PCI7411 GHK (2 of 2)

12

C613

C613 SCD1U16V

SCD1U16V

PCIRST1#

12

C607

C607 SC150P50V2JN

SC150P50V2JN

5V_S0

3D3V_S0

M10 M12

H10 H11 H12

K12

G13 H13

K10 K11

12

U47D

H8

VCC

H9

VCC VCC VCC VCC

J8

VCC

M7

VCC

J12

VCC

M9

VCC VCC VCC

K8

VCC VCC

N7

VCC

G7

GND

G8

GND GND GND

J9

GND

J10

GND

J11

GND

K9

GND GND GND

L8

GND

L9

GND

L10

GND

L11

GND

L12

GND

M8

GND

PCI7411-1

12

C608

C608 SCD1U16V

SCD1U16V

3D3V_S0

C

CB_DATA27

CB_CLOCK27

CB_LATCH27

PCIRST1#24,27,30,34,36

1 2

R635

5V_S0

C603

C603 SC4D7U10V5ZY

SC4D7U10V5ZY

DY

12

C612

C612 SCD1U16V

SCD1U16V

4 of 4

M19

VR_PORT

H1

VR_PORT

H2

VR_EN#

C302

C302 SCD1U16V

SCD1U16V

POWER TERMINALS

U1-4

D

10KR2

12

C611

C611 SC1U10V3ZY

SC1U10V3ZY

PT_PORT VR_PORT

12

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

A

B

C

D

E

Cardbus I/F

PCMCIA Socket

CBUS1

69

4 4

CBB_D3 CBB_D4

CBB_D11 CBB_D5 CBB_D12 CBB_D6 CBB_D13 CBB_D7 CBB_D14

CBB_D15

VCC_ASKT_S0

12

C588

C588 SC22U10V6ZY-U

SC22U10V6ZY-U

3 3

VPP_ASKT_S0

12

C600

C600 SCD1U16V

SCD1U16V

CBB_A16

12

R283

R283 DUMMY-R2

DUMMY-R2

Place close to pin 19.

12

C279

2 2

C279 DUMMY-C2

DUMMY-C2

12

C601

C601 SC1000P50V

SC1000P50V

C599

C599 SCD1U16V

SCD1U16V

CBB_D0 CBB_D8 CBB_D1 CBB_D9 CBB_D2 CBB_D10

CBB_A10

CBB_A11 CBB_A9 CBB_A8

CBB_A17 CBB_A13 CBB_A18 CBB_A14 CBB_A19

CBB_A20 CBB_A21

CBB_A16 CBB_A22 CBB_A15 CBB_A23 CBB_A12 CBB_A24 CBB_A7 CBB_A25 CBB_A6

CBB_A5 CBB_A4 CBB_A3 CBB_A2 CBB_A1 CBB_A0

Clock AC termination

CBB_CD1#

CBB_CE1#

CBB_CE2# CBB_OE# CBB_VS1#

CBB_IORD# CBB_IOWR#

CBB_WE# CBB_RDY

CBB_VS2# CBB_RESET CBB_WAIT# CBB_INPACK# CBB_REG# CBB_BVD2# CBB_BVD1#

CBB_WP CBB_CD2#

33MHz clock for 32-bit Cardbus card I/F

1 1

A

1

35

2

36

3

37

4

38

5

39

6

40

7

41

8

42

9 43 10 44 11 45 12 46 13 47 14 48 15 49 16 50 17 51 18 52 19 53 20 54 21 55 22 56 23 57 24 58 25 59 26 60 27 61 28 62 29 63 30 64 31 65 32 66 33 67 34 68

70

SKT1

1 2 3 4

CARDBUS-SKT45-U1

B

VCC_ASKT_S0

CARDBUS68P-9

62.10024.491

12

R301

R301 DUMMY-R2

DUMMY-R2

47K

CBB_RESET

12

C290

C290 SCD01U16V3KX

SCD01U16V3KX

CBB_D[0..15] 28 CBB_A[0..25] 28

CBB_IORD# 28 CBB_IOWR# 28 CBB_OE# 28 CBB_WE# 28 CBB_REG# 28 CBB_RDY 28 CBB_WP 28 CBB_RESET 28 CBB_WAIT# 28 CBB_INPACK# 28

CBB_CE1# 28 CBB_CE2# 28 CBB_BVD1# 28 CBB_BVD2# 28 CBB_CD1# 28 CBB_CD2# 28 CBB_VS1# 28 CBB_VS2# 28

3D3V_CR_S0 3D3V_CR_S0

12

R577

R577 2K2R2

2K2R2

SM_RE# MS_BS

3D3V_CR_S0

12

R558

R558 2K2R2

2K2R2

DY

SM_ALE

3D3V_CR_S0 3D3V_CR_S0

12

R579

R579 2K2R2

2K2R2

SM_R/B# SD_WP

12

3D3V_CR_S0

12

MS_CLK MS_CLK_R

C

R216

R216 2K2R2

2K2R2

R560

R560 2K2R2

2K2R2

DY

R578

R578 4K7R2

4K7R2

SM_CLE

U75

1

A

2

B GND3SE

NC7SZ66P5X

DY

3D3V_CR_S0

6 in 1 Connector

12

SM_CD#

SD_CD#

12

C517

C537

SCD01U16V2KX

1 2

R214

1 2

R217

1 2

R213

1 2

R193

SM_D4 SM_D5 SM_D6 SM_D7

1 2

MS_SDIO

R559 0R2-0

3D3V_CR_S0

12

R228

R228 4K7R2

4K7R2

12

C531

C531 SCD01U16V2KX

SCD01U16V2KX

33R2

33R2 33R2

33R2

MS_SDIO MS_D1 MS_D2 MS_D3

MS_D1 MS_D2 MS_D3

DY

12

C230

C230 SCD1U16V

SCD1U16V

D

40 29 20

9

7

6 12 11

15 14 16 18

33 32 31 21 22 23 24

25 30 34

SKT2

XD-VCC S.M-VCC MS-VCC SD-VCC

SD-DAT0 SD-DAT1 SD-DAT2 SD-DAT3

MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3

S.M/XD-D1 S.M/XD-D2 S.M/XD-D3 S.M/XD-D4 S.M/XD-D5 S.M/XD-D6 S.M/XD-D7

S.M-LVD S.M-CD# S.M-D0

SKT-MEMO-9-U1

12

R239

R239 15KR2

15KR2

SM-CD-COM

SM-WP-SW

SD-CD-COM

SD-WP-SW

S.M#/XD-CLE S.M#/XD-ALE

S.M#/XD-WE

S.M#/XD-CE S.M#/XD-RE

S.M#/XD-R/B

S.M/XD-WP-IN

U34

1

OUT

2

GND SET3ON#

AAT46101GV-1

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

2

SM_CD#

3

SM-CD-SW

MS-BS

MS-INS

MS-SCLK

RSV#4 XD-CD

SD-CD-SW

SD-CLK

SD-CMD

GND GND GND GND

MS_CLK_R0

43

MS_BS_1

13

MS_CD#

17

MS_CLK_R MS_CLK

19 4

39 41

42 5 8 10

38 37 36 28 27 26 35

46 45 44 1

5

IN

4

PCMCIA SLOT/ CARDBUS SKT

1 2

R604

SM_CD#

SD_CD# SD_WP

MS_CLK

1 2

33R2

R599

SM_CLE SM_ALE

MS_BS_1

1 2

SD_WP

R215 22R2R215 22R2

SM_RE#

SM_R/B#

MS_CLK_R0

1 2

R588

3D3V_S0

12

C239

C239 SC1U10V3ZY

SC1U10V3ZY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

MS_CD# 27

33R2

SD_CD# 27 SD_WP 27

MS_BS

SM_CLE 27 SM_ALE 27

SM_RE# 27 SM_R/B# 27

MS_CLK_R

330R2

MC_PWR_CTRL 27

29 47Thursday, July 07, 2005

E

MS_CLK 27

MS_BS 27

of

-1

12

C509

C509 SCD01U16V2KX

SCD01U16V2KX

MS_SDIO MS_D1 MS_D2 MS_D3

MS_SDIO27 MS_D127 MS_D227 MS_D327

SM_D427 SM_D527 SM_D627 SM_D727

SM_CD#27

3D3V_S0

5

VCC

4

A

Close to RTL8100C Pin121,Pin122

LAN_X1

R166

ICH_PME#18,22,34

1 2

12

C186

C186 SC12P50V2JN

SC12P50V2JN

TX+

12

R156

49D9R2F

12

TX+31

TX-31

RX+31

RX-31

R166

DUMMY-R2

X6

XTAL-25MHZ-43

TX-

12

R155

R155 49D9R2F

49D9R2F

C171

C171 SCD1U16V

SCD1U16V

3D3V_LAN_S5

3D3V_S0

12

C185

C185 SC12P50V2JN

SC12P50V2JN

RX-

12

49D9R2F

12

R153

C169

C169 SCD1U16V

SCD1U16V

AVDD33

AVDD33 CTRL25

AVDD25

AVDD33

ISOLATE

VDD25 PCI_AD31 PCI_AD30

PCI_AD29 PCI_AD28

RX+

12

R154

R154 49D9R2F

49D9R2F

U24

1

MDI0+

2

MDI0-

3

AVDDL

4

VSS

5

MDI1+

6

MDI1-

7

AVDDL

8

CTRL25

9

VSS

10

AVDDH

11

HSDAC+

12

HSDAC-

13

VSS

14

MDI2+

15

MDI2-

16

AVDDL

17

VSS

18

MDI3+

19

MDI3-

20

AVDDL

21

VSSPST

22

GND

23

ISOLATE#

24

VDD18

25

INTA#

26

VDD33

27

PCIRST#

28

PCICLK

29

GNT#

30

REQ#

31

PME#

32

VDD18

33

PCIAD31

34

PCIAD30

35

GND

36

PCIAD29

37

PCIAD28

38

VSSPST

RTL8100CL-U

R157

12

5K6R3F

128

TX+ TXAVDD33 GND RX+ RXAVDD33

NC NC NC AVDD25 NC NC NC NC GND NC NC AVDD33 GND NC ISOLATEB NC INTAB

PCIRSTB GNTB

REQB PMEB VDD25

GND

LAN_X2

4 4

Close to LAN chip

3 3

2 2

INT_PIRQE#22,34

PCIRST1#24,27,28,34,36 PCLK_LAN3 PCI_GNT#222

PCI_REQ#222

VSS

GND

B

3D3V_LAN_S5

1 2

3K6R3

R174

U27

EECS_3 EESK EEDI EEDO

124

CTRL18

VSS

GND

123

VSS

GND

126

RSET

NC

125

AVDD18

NC

127

NC

PCIAD2739PCIAD2640VDD3341PCIAD2542PCIAD2443CBEB344VDD1845IDSEL46PCIAD2347GND48PCIAD2249PCIAD2150VSSPST51GND52PCIAD2053VDD1854PCIAD1955VDD3356PCIAD1857PCIAD1758PCIAD1659CBEB260FRAME#61GND62IRDY#63VDD18

1 2 3 4

LAN_X1

LAN_X2

122

121

XTAL2

XTAL1

NC

U27

CS

VCC

SK

DC

DI

ORG

DO

GND

M93C46-W-3

TP8TP8

TP7TP7

LAN_LED0

116

118

119

120

117

GND

LED0

AVDDH

VSSPST

NCNCNCNCNC

GND

VDD25

GND

LAN_LED1

115

VDD18

8 7 6 5

TP9TP9

LAN_LED2

114

LED1

113

LED2

LED3

112

FRAMEB

3D3V_LAN_S5

EESK

EEDI

111

109

110

GND

EEDI

EESK

VDD18

NC

IRDYB

64

12

C225

C225 SCD1U16V

SCD1U16V

EEDO

EECS_3

106

107

108

EECS

EEDO

VDD33

PERRB STOPB

DEVSELB

TRDYB

CLKRUNB

PCI_AD1

PCI_AD0

105

104

103

PCIAD0

LANWAKE

GND

VDD25

GND

NC

GND

VDD25

SERRB

NC

GND

C

PCIAD1

PCIAD2

VSSPST

PCIAD3 PCIAD4 PCIAD5 PCIAD6

PCIAD7

VSSPST

PCIAD8 PCIAD9

PCIAD10 PCIAD11 PCIAD12

PCIAD13 PCIAD14

VSSPST

PCIAD15

DEVSEL#

VSSPST

CLKRUN#

GND

VDD18

VDD33

CBEB0

M66EN

VDD33

GND

VDD18

CBEB1

PAR

SERR#

GND

VDD33 PERR# STOP#

TRDY#

D

PCI_C/BE#[0..3] 22,27,34 PCI_AD[0..31] 18,22,27,34

3D3V_LAN_S5

12

C213

C189

SCD1U16V

3D3V_LAN_S5

CTRL25 LAN_PWR_CTRL

1 2

0R2-0

R151

102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74

NC

73 72

NC

71 70 69 68 67 66 65

PCI_AD2

VDD25 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6

PCI_AD7

PCI_C/BE#0

PCI_AD8 PCI_AD9

PCI_AD10 PCI_AD11 PCI_AD12

PCI_AD13 PCI_AD14

PCI_AD15

VDD25

PCI_C/BE#1 PCI_PAR PCI_SERR#

PCI_PERR# PCI_STOP# PCI_DEVSEL# PCI_TRDY#

PCI_PAR 22,27,34 PCI_SERR# 22,27,34

PCI_PERR# 22,27,34 PCI_STOP# 22,27,34 PCI_DEVSEL# 22,27,34 PCI_TRDY# 22,27,34

PM_CLKRUN# 22,27,34,36

1

3

CHP69

CHP69 Q11

Q11

2

12

C167

C167 SC22U10V6ZY-U

SC22U10V6ZY-U

1 2

G23

1 2

GAP-CLOSE-PWR

E

12

C215

C184

SCD1U16V

G19

GAP-CLOSE-PWR

3D3V_LAN_S5

12

C178

DY

SCD1U16V

3D3V_LAN_S53D3V_S5

AVDD25

12

C216

SCD1U16V

12

C173

SCD1U16V

L14

L14 BLM11A601S

BLM11A601S

12

C170

SCD1U16V

12

SCD1U16V

12

C177

SCD1U16V

R152

C188

1 2

C176

C176 SCD1U16V

SCD1U16V

12

C198

SCD1U16V

12

C214

SCD1U16V

AVDD33

12

C175

SCD1U16V

0R3-U

12

VDD25

SCD1U16V

VDD25

C174

SCD1U16V

12

C217

SCD1U16V

12

R150

R150 1KR2

1KR2

1 1

ISOLATE

12

R149

R149 15KR2

15KR2

A

3D3V_LAN_S5

PCI_AD27

B

PCI_AD25

PCI_AD26

PCI_AD23

PCI_AD24

PCI_C/BE#3

PCI_AD23

LAN_IDSEL

1 2

R165

R165 100R2

100R2

PCI_AD22

PCI_AD21

PCI_AD20

PCI_AD19

VDD25

PCI_AD18

PCI_AD17

PCI_AD16

PCI_C/BE#2

PCI_IRDY# 22,27,34 PCI_FRAME# 22,27,34

C

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

D

Date: Sheet

LAN RTL8100C

Leopard2

-1

30 47Thursday, July 07, 2005

of

E

of

-1

A

B

C

D

E

Place on bottom side

USB_N_CON2 USB_P_CON2

MAX 150mA

3D3V_BT_S0

From NEW!

1004-1

CN4

10

8 7 6 5 4 3 2

1 9

JST-CON8-7

BC0EX2 BC0EX1 BT_LED

12

EC116

EC27

SCD1U

12

R490

R490 18KR3F

18KR3F

DY

SCD1U

DY

Close to CN20

12

R454

R454 11KR3F

11KR3F

TD+ --> TX+ RJ45-1 TD- --> TX-

RD+ --> RX+ RD- --> RX-

3D3V_BT_S0

12

EC29

EC29 SCD1U

SCD1U

DY

RJ45 PIN10/100 LAN Transformer

RJ45-2

RJ45-3 RJ45-6

12

EC117

EC117 SCD1U

SCD1U

DY

Blue thumb

R453

BT_PRIOR34 WLAN_ACT34

USB_PN222 BT_LED18,19

4 4

USB_PP222

R453

R621

POWER SWITCH

12

C402

SC1U10V3ZY

3 3

SC1U10V3ZY

BT_EN22

I max = 150 mA

1 2 3

5V_S3

12

R518

R518 10KR2

10KR2

BT_EN#

D

1

G

S

2 3

U60

SHDN# GND IN

G913C-U

QB2

QB2 2N7002

2N7002

100R2

1 2 1 2

100R2

BC0EX218

SET

OUT

BC0EX118

3D3V_BT_S0

C366

C366 SC20P

SC20P

3D3V_BT_SETBT_EN#

5 4

12

C383

C100

C100 SCD1U16V

SCD1U16V

SC4D7U10V5ZY

D

1

G

S

2 3

TPS5130_1D8V_EN# 31

USB_N_CON2 USB_P_CON2

BC0EX2 connect to PCI_AD22 on main board. BC0EX1 connect to ICH_PME# on main board.

5V_S3

QB3

2N7002

1394 Connector

1394_TPA0P27

1394_TPA0N27

1394_TPB0P27

1394_TPB0N27

1394_TPBIAS027

1394_TPA1P27

1394_TPA1N27

1394_TPB1P27

1394_TPB1N27

1394_TPBIAS127

12

R296

R296 56R2F

56R2F

R291

R291 56R2F

56R2F

12

R295

R295 56R2F

56R2F

12

C277

C277 SC1U10V3KX

SC1U10V3KX

12

R290

R290 56R2F

56R2F

12

C284

C284 SC1U10V3KX

SC1U10V3KX

These components near to chip side.

12

R297

R297 56R2F

56R2F

1394_TPB0_T

C286

C286 SC220P

SC220P

12

R294

R294 56R2F

56R2F

1394_TPB1_T

C285

C285 SC220P

SC220P

12

R298

R298 56R2F

56R2F

12

R299

R299 5K1R2

5K1R2

12

R292

R292 56R2F

56R2F

12

R293

R293 5K1R2

5K1R2

1 2

R142 0R0402-PADR142 0R0402-PAD

1 2

R143 0R0402-PADR143 0R0402-PAD

1 2

R147 0R0402-PADR147 0R0402-PAD

1 2

R148 0R0402-PADR148 0R0402-PAD

1 2

R65 0R0402-PADR65 0R0402-PAD

1 2

R50 0R0402-PADR50 0R0402-PAD

1 2

R67 0R0402-PADR67 0R0402-PAD

1 2

R66 0R0402-PADR66 0R0402-PAD

TPA0-

TPA0+

TPB0TPB0+

1394_1

6 3

1 5

SKT-1394-4P-6-U1

1394_TPA1P_PR 18 1394_TPA1N_PR 18 1394_TPB1P_PR 18

1394_TPB1N_PR 18

4 2

2 2

TX-30 TX+30

12

C27

SCD1U16V

1 1

10/100M Lan Transformer

U3

C26

C26 SCD1U16V

SCD1U16V

U3

3

CT

11

CT

14

CT

6

CT

8

TD-

7

TD+

XFORM-187-U

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

3.No vias, No 90 degree bends.

4.pairs must be equal lengths.

5.6mil trace width,12mil separation.

6.36mil between pairs and any other trace.

7.Must not cross ground moat,except RJ-45 moat.

XFR_RDC XFR_CMT XFR_RXC XFR_TDC

12

DY

A

RX-

RX+ RD-

RD+

TX-

TX+

15 16

2 1

9 10

XFR_RXC XFR_CMT

1 2

R400

1 2

R399

75R2F

75R2F 75R2F

75R2F

RXRX+

TXTX+

RX- 30 RX+ 30

LAN_TERMINAL

CN1

ETY-CON2-R1

B

12

1 2

3 4

20.D0151.102

RJ45_END1

RJ45_END2

12

R401

R401 75R2F

75R2F

RJ45_END

R404

R404 75R2F

75R2F

C320

1 2

SC1500P2KV8KX

L21

TIP_MDC TIP RING_MDC

L21

1 2

MLB160808

1 2

MLB160808

L20

RJ45-8 RJ45-7 RJ45-6 RJ45-5 RJ45-4 RJ45-3 RJ45-2 RJ45-1

RING

C

RJ45-8 18 RJ45-7 18 RJ45-6 18 RJ45-5 18 RJ45-4 18 RJ45-3 18 RJ45-2 18 RJ45-1 18

RJ45-1 RJ45-2

RJ45-3 RJ45-4 RJ45-5 RJ45-6 RJ45-7 RJ45-8

TIP RING

RJ45_1 RJ45_2

RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8

RJ11_1 RJ11_2

JK1

RJ45-74-U1

9

Wistron Corporation

10

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

D

Date: Sheet

LAN / 1394 Connector

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

E

-1

31 47Monday, July 11, 2005

of

-1

A

B

3D3V_S0

C

D

E

C307

C307 SC270P50V3JN

SC270P50V3JN

1 2

C308

C308 SC270P50V3JN

SC270P50V3JN

1 2

JS0 JS1

EAPD

XTL_IN

SYNC

SPDIF

12

AUD_AGND

C305

C305 SC270P50V3JN

SC270P50V3JN

U48

17 16 47

2

XTALOUT_CODEC

3

AC97_DIN0_CODEC

8 5

AC97_CBITCLK

6 10 11

SPDIF_OUT

48

AD1981B-AS

BC133

BC133 SCD1U16V

SCD1U16V

C306

C306 SC270P50V3JN

SC270P50V3JN

AD1981_JS0

12

R342

R342 4K7R2

4K7R2

EXT_MIC_218

EXT_MIC_118

C

AUD_AGNDAUD_AGND

1 2

R343

1 2

R315

1 2

R316

1 2

2K2R2

R636

DY

HPSENSE 33 EAPD 33,36

0R2-0

BC68 DUMMY-C2BC68 DUMMY-C2

22R2

12

DY

SC1U10V3ZY

AUD_AGND

12

DY

SC1U10V3ZY

AUD_AGND

AC97_BITCLK 21,35 AC97_SYNC 21,35 AC97_RST# 21,35 SPDIF_OUT 18

BC64

BC65

33R2

3D3V_S0

R302

R302 10KR2

10KR2

1 2

D18

1 3

S1N4148-U2

CLK_CODEC 3

12

AC97_DIN0 21 AC97_DOUT 21,35

VREFOUT

12

R313

R313 3KR2F

3KR2F

BC63

BC63 SC1000P50V3KX

SC1000P50V3KX

MIC2 PREAMP

AUD_AGND

CLOSE TO CODEC

SB-27-02

VREFOUT

12

R314

R314 3KR2F

3KR2F

BC62

BC62 SC1000P50V3KX

SC1000P50V3KX

MIC1 PREAMP

AUD_AGND

CLOSE TO CODEC

HPSENSE_1 33

12

X3

DY

X-24D576MHZ-3-U1

1 2

R327 DUMMY-R2R327 DUMMY-R2

D

XTALOUT_CODEC_R

SC1U10V3ZY

BC78

1 2

SC22P

DY

BC71

1 2

SC22P

DY

1 2

BC72 DUMMY-C2BC72 DUMMY-C2

5V_S0

U80

1

BC140

12

AUD_AGND

2 3

SHDN# GND IN

MAX8863-S

UNDER CODEC

G72

1 2

GAP-CLOSE

AUD_AGND

G33

1 2

GAP-CLOSE

AUD_AGND

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

AUDIO CODEC AD1981B

SET

OUT

For High limit --> H45

CUT MOAT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

12

BC139

SC22P

5VA_SET

5

5V_AUDIO_S0

4

12

BC138

SC10U10V6ZY-U

G32

1 2

GAP-CLOSE

G31

1 2

GAP-CLOSE

G30

1 2

GAP-CLOSE

G73

1 2

GAP-CLOSE

32 47Monday, July 11, 2005

E

5V_AUDIO_S0

12

R646

28K7R3F

12

AUD_AGND

of

R647

R647 10KR3F

10KR3F

12

EC160

SCD1U16V

-1

12

4 4

5V_AUDIO_S0

12

BC128

BC74

SCD1U16V

EXT_MIC_1 EXT_MIC_2

AUD_LOL33 AUD_LOR33

BC75 SCD1U16VBC75 SCD1U16V

1 2

BC67 SCD1U16VBC67 SCD1U16V

1 2

CDAUDL

CDAUDR

CDAGND

12

R307

R304

150KR2J

AUD_AGND

HP_OUT_L18 HP_OUT_R18

U49A

AUD_BEEP1

3

TSAHCT86

U49C

AUD_BEEP2

8

TSAHCT86

12

U39_PL

R347

R347 10KR2

10KR2

1 2

AUD_AGND

AUD_MDC_OUT35

AUD_PHONE35

1 2

R306

1 2

R308

1 2

R305

22R2

5V_AUDIO_S0

1 2

AUD_AGND

5V_AUDIO_S0

9

10

AUD_AGND

A

22R2

12

147

3 3

CD_AUDL26

CD_AUDR26

CD_AGND26

2 2

PCI_SPKR27

ICH_SPKR22

KBC_BEEP36

1 1

BC58 SC1U10V3ZYBC58 SC1U10V3ZY

12 12

BC66 SC1U10V3ZYBC66 SC1U10V3ZY

AUD_MDC_CODEC AUD_PHONE_CODEC

1 2

BC61 SC1U25V5ZYBC61 SC1U25V5ZY

1 2

BC59 SC1U25V5ZYBC59 SC1U25V5ZY

1 2

BC60

R309

R309 150KR2J

150KR2J

5V_AUDIO_S0

4 5

AUD_AGND

AUD_MICIN1 AUD_MICIN2

SC1U25V5ZY

AUD_PC_BEEP

147

BC135

BC135 SCD1U16V

SCD1U16V

12

BC77

BC77 SCD1U16V

SCD1U16V

CDAUD_L CDAUD_R CDAUD_GND

U49B

6

TSAHCT86

12

21

MIC1

22

MIC2

23

LINE_IN_L

35

LINE_OUT_L

24

LINE_IN_R

36

LINE_OUT_R

37

MONO_OUT

13

PHONE_IN

18

CD_L

20

CD_R

19

CD_GND_REF

39

HP_OUT_L

41

HP_OUT_R

14

AUX_L

15

AUX_R

BC137

BC137 SCD1U16V

SCD1U16V

BC76

BC76 SCD1U16V

SCD1U16V

B

AUD_AGND

1 2

R326

34

AVDD125AVDD238AVDD343AVDD4

AVSS126AVSS240AVSS344AVSS4

33

10KR2

9

DVDD11DVDD2

DVSS14DVSS2

7

AUD_BEEP

12

C303

SCD1U16V

AUD_AGND

12

CODECVREF

ADAF1

VREFOUT

28

27

VREF

AFILT129AFILT230AFILT331AFILT4

VREFOUT

ID0#45ID1#

46

1 2

12

R325

R325 1KR2

1KR2

BC134

BC134 SC1U10V3ZY

SC1U10V3ZY

1 2

ADAF4

ADAF3

ADAF2

32

SDATA_OUT

NC12NC

42

AUD_PC_BEEPAUD_SYS_BEEP

C304

C304 SCD1U16V

SCD1U16V

XTL_OUT

SDATA_IN

BIT_CLK RESET#

A

B

C

D

E

BC143

1 2

SC10P50V2JN-1

BC136

4 4

BC136

1 2

SC4D7U10V5ZY

CSOUTL2AUD_LOL

1 2

R650

15KR2

SC

BC81

CSOUTL1

BC129

BC129 SCD1U16V3KX

SCD1U16V3KX

AUD_AGND

BC132

CSOUTR2AUD_LOR

SC4D7U10V5ZY

1 2

SCD1U16V3KX

12

BC141

BC141 SCD1U16V3KX

SCD1U16V3KX

BC73

1 2

CSOUTR1

SCD1U16V3KX

R642

1 2

15KR2

1 2

R303

AUD_LOL32

5VA_OP_S0

12

BC142

BC142 SC10U10V6ZY-U

SC10U10V6ZY-U

3 3

AUD_LOR32

5V_S0

12

R641

R641 100KR2

2 2

JACK_DETECT#18

5V_S0

12

R640

R640 100KR2

100KR2

C616

C616 SC1U10V3ZY

SC1U10V3ZY

100KR2

HPSENSE_1

D

Q41

1

2N7002

G

S

2 3

12

AUD_AGND

1 2

HPSENSE_1 32

EARPHONE18 HPSENSE 32

AUD_AGND

22KR2J

R349

1 2

15KR2

HP_L L_BYPASS

R_BYPASS HP_R

R340

1 2

15KR2

12

C291

C291 SC1U10V3ZY

SC1U10V3ZY

L_LINE_IN

R_LINE_IN

EARPHONE_R

4 5 6 7

8

2 17 23

18 19 20 21

1 2

R649

U79

LLINEIN LHPIN LBYPASS LVDD

SHUTDOWN TJ HP-IN VOL

RVDD RBYPASS RHPIN RLINEIN

G1421BF3U

1 2

R643

1 2

SC10P50V2JN-1

20KR2

1 2

R348 18KR2JR348 18KR2J

GND

25

AUD_AGND

1 2

R341 18KR2JR341 18KR2J

20KR2

SC

BC131

BC131 SC10P50V2JN-1

SC10P50V2JN-1

SPKR_L+

BC80

BC80 SC220P

SC220P

LOUT+

LOUT-

SE/BTL#

HP/LINE#

MUTEIN

MUTEOUT

GND/HS GND/HS GND/HS GND/HS

ROUT-

ROUT+

BC70

BC70 SC220P

SC220P

3 10

14 16 11 9 1 12 13 24

15 22

SPKR_R+

SC

SPKR_L+

SPKR_L+ SPKR_L-

AUD_MUTEG1420_SHUTDOWN#

SPKR_RSPKR_R+

1 2

SPKR_R+

TC15

TC15 SE100U16VGM-2

SE100U16VGM-2

HPSENSE_1

AUD_AGND

1 2

DK_SPKR_L+ 18

DK_SPKR_R+ 18

TC14

TC14 SE100U16VGM-2

SE100U16VGM-2

G1420_SHUTDOWN#

5V_S0

R_BYPASS

L_BYPASS

12

BC79

BC79 SC4D7U10V5ZY

SC4D7U10V5ZY

1 2

AUD_AGNDAUD_AGND

R648

1 2

10KR2

DY

G71

GAP-CLOSE-PWR

12

BC130

BC130 SC4D7U10V5ZY

SC4D7U10V5ZY

PM_SLP_S3#22,26,36,42,44,45,46

AUD_AGND

5VA_OP_S0

5V_S0

1

G

AUD_AGND

12

R339

R339 100KR2

100KR2

G1420_SHUTDOWN#

D

Q19

Q19 2N7002

2N7002

S

2 3

5V_S0

U78B

147

1 1

KBC_MUTE36

EAPD32,36

A

4 5

12

R645

R645 10KR2

10KR2

TSAHCT32

6

AUD_MUTE_1

HPSENSE

9

10

B

147

U78C

8

TSAHCT32

AUD_MUTE

SPKR_R+ SPKR_R-

SPKR_L+ SPKR_L-

Speaker

EC155

EC158

SC220P

C

EC161

EC161 SC220P

SC220P

EC159

EC159 SC220P

SC220P

SPK1

6 4

3 2

1 5

ETY-CON4-11-U

20.D0151.104

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet of

AUDIO

Leopard2

-1

33 47Thursday, July 07, 2005

of

E

of

-1

A

B

C

D

E

MINI-PCI

4 4

3D3V_S0

BC127

BC127 SCD1U16V

SCD1U16V

ICH_PME# 18,22,30

12

BC125

BC125 SCD1U16V

SCD1U16V

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet of

MINI-PCI

Leopard2

-1

34 47Thursday, July 07, 2005

of

E

of

-1

12

BC124

BC124 SCD1U16V

SCD1U16V

5V_S0

INT_PIRQE# 22,30

PCIRST1# 24,27,28,30,36

3D3V_S0

PCI_GNT#0 22

DY

0R2-0

BT_PRIOR 31

PCI_AD21

10R2

PCI_PAR 22,27,30

PCI_FRAME# 22,27,30 PCI_TRDY# 22,27,30 PCI_STOP# 22,27,30

PCI_DEVSEL# 22,27,30

PCI_SERIRQ 22,27,36

3D3V_S5

C

PCI_AD30 PCI_AD28

PCI_AD26

PCI_AD22 PCI_AD20PCI_AD19

PCI_AD18 PCI_AD16

PCI_AD15 PCI_AD13 PCI_AD11

PCI_AD9 PCI_C/BE#0

PCI_AD6 PCI_AD4 PCI_AD2 PCI_AD0

12

3D3V_S5

1 2

R619

1 2

R620

12

BC126

RINGTIP

MOD_IDSEL

BC126 SC4D7U10V5ZY

SC4D7U10V5ZY

MINI_PME#

PCI_AD[31..0] 18,22,27,30 PCI_C/BE#[3..0] 22,27,30

12

R328

R328 10KR2

10KR2

WIRELESS_EN

D

Q18

Q18 2N7002

2N7002

S

2 3

3D3V_S0

12

3D3V_S5

R613

R613 10KR2

10KR2

1 2

R612

R612 DUMMY-R2

DUMMY-R2

CN13

125

1

2

3

4

5

6

7

8

9

802_ACT_LED19

3D3V_S0

TP11TP11

PCLK_MINI3

PCI_REQ#022

WLAN_ACT31

PCI_IRDY#22,27,30

PM_CLKRUN#22,27,30,36

PCI_SERR#22,27,30

5V_S0

WIRELESS_EN

INT_PIRQE# MINI_PIN21

PCI_AD31 PCI_AD29

PCI_AD27 PCI_AD25

PCI_C/BE#3 PCI_AD24 PCI_AD23

PCI_AD21

PCI_AD17 PCI_C/BE#2

PCI_C/BE#1 PCI_AD14

PCI_AD12 PCI_AD10

PCI_AD8 PCI_AD7

PCI_AD5 PCI_AD3 PCI_AD1

B

11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97

99 101 103 105 107 109 111 113 115 117 119 121

123

The symbol use 2nd source The P/N is the main source Main source:62.10032.001 2nd source:62.10032.031

10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122

124 126

PCIMODEM124A1U1

62.10032.001

3D3V_S0

WIRELESS_EN#22

3 3

PCI_PERR#22,27,30

2 2

1 1

1

G

A

B

C

D

E

USB POWER

5V_S3 5V_USB1_S3

4 4

USB_PP422 USB_PN422

3 3

USB_PP522 USB_PN522

F2

1 2

MINISMDC110-U

12

C152

C152 SC4D7U10V5ZY

SC4D7U10V5ZY

USB_P_CON3 USB_N_CON3

USB_P_CON4 USB_N_CON4

C150

C150 SCD1U16V

SCD1U16V

100 mil

12

C151

C151 SC1000P50V

SC1000P50V

USB_N_CON3 USB_P_CON3

SC

12

TC7

TC7 ST100U6D3VBM

ST100U6D3VBM

5V_USB1_S3

USB1

11

9 1

2 3

4 10 12

SKT-USB-76-U

5

USB_N_CON4

6

USB_P_CON4

7 8

2 2

MDC Connector

3D3V_S0

MDC_S3_1

12

C579

C579 SC4D7U10V5ZY

SC4D7U10V5ZY

AUD_MDCIN

12

C578

C578 SCD1U16V

SCD1U16V

CN9

35

31

1 3 5 7

9 11 13 15 17 19 21 23 25 27 29

33

36

32 2

4 6 8 10 12 14 16 18 20 22

ACSDATAIN1_A

24

ACSDATAIN1_B

26 28 30

34

AMP-CONN30A-1

20.F0099.030

B

Check with Ambit

1 2

22R2

R266

1 2

DY

R263

22R2

AUD_PHONE 32

AC97_SYNC 21,32

AC97_BITCLK 21,32

12

C266

C266 SC22P

C

SC22P

DY

D

Title

Size Document Number Rev

A3

Date: Sheet

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

USB / MDC CONN.

Leopard2

35 47Thursday, July 07, 2005

E

-1

of

-1

AUD_MDC_OUT32

3D3V_S3

R622

DUMMY-R2

1 1

AC97_DOUT21,32 AC97_DIN1 21 AC97_RST#21,32

A

1 2

R254 DUMMY-R2R254 DUMMY-R2

12

G68

GAP-CLOSE-PWR

12

C580

C580 SCD1U16V

SCD1U16V

DY

A

3D3V_AUX KBC_3D3V_AUX

G27

1 2

GAP-CLOSE-PWR

CN15

9 1

2 3 4 5 6 7 8

10

MOLEX-CON8-2

DY

12

BC50

BC50 SC3P50V2CN

SC3P50V2CN

12

BC48

BC48 SC3P50V2CN

SC3P50V2CN

LPC_LAD[0..3]21

KBC_3D3V_AUX

KBC_D0 TINT# TCK TDO TDI TMS

3D3V_S0

KBC_32KX2_1

3D3V_S5

ECSWI#_KBC

45

678

14

3 2

1 2

R242

KBC_3D3V_AUX

1 2

R273 DUMMY-R2R273 DUMMY-R2

123

RN6

RN6 SRN10K-2

SRN10K-2

X1

X1 X-32D768KHZ-12-U

X-32D768KHZ-12-U

1 2

0R2-0

R236

VOL_UP_DK#18

VOL_DWN_DK#18

CHG_I_SEL40

CHG_I_PRE_SEL40

CHG_ON#40

100KR2

RSMRST#_KBC22

12

BC52

BC52 SC1U10V3ZY

SC1U10V3ZY

KBCBIOS_CS#38

10KR2

1 2

R244

A5/SHBM

A

KROW[1..8]37

12

R237

R237 20MR3

20MR3

S5_ENABLE25,42

KCOL[1..16]37

ID_DET19,37 FPBACK19

AD_OFF39

PCI_SERIRQ22,27,34

LPC_LDRQ0#21

LPC_LFRAME#21

ECSMI#_KBC22

ECSCI#_KBC22

ICH_A20GATE21

3D3V_S0

BL_ON13

TP34TPAD30 TP34TPAD30 TP43TPAD30 TP43TPAD30

PCLK_KBC3 RSMRST#21,25,43

RCIN#21

TCLK_537

TDATA_537

PSCLK1 PSDAT1 PSCLK2 PSDAT2

1 2

R253

CHG_I_SEL CHG_I_PRE_SEL

CHG_ON#

SCD1U16V

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

KBC_PWUREQ#

KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7 KROW8

KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16

TINT# TCK TDO TDI TMS

10KR2

KBC_32KX1 KBC_32KX2

VCC_+3VSB

4 4

3 3

2 2

1 1

3D3V_S0

BC53

PSDAT4

KBC_SEL1 KBC_CLK

B

12

U40

7 8

9 15 14 13 10 18 19 22 23

31

5

6

71 72 73 74 77 78 79 80

49 50 51 52 53 56 57 58 59 60 61 64 65 66 67 68

105 106 107 108 109

110 111 114 115 116 117 118 119

158 160

62 63 69 70 75 76

148 149 155 156

3

4 27 28

173 174

47

PC97551-VPC-U

B

KBC_3D3V_AUX

12

D13

BC45

BC45 SCD1U16V

SCD1U16V

SSM5818SL

DY

2 1

16

SERIRQ IOPQ0/LDRQ# LFRAME# LAD0 LAD1 LAD2 LAD3 LCLK RESET1# IOPQ1/SMI# IOPQ2/PWUREQ#

IOPD3/ECSCI

IOPB5/(GA20) IOPB6/KBRST#

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

KBSOUT0 KBSOUT1 KBSOUT2 KBSOUT3 KBSOUT4 KBSOUT5 KBSOUT6 KBSOUT7 KBSOUT8 KBSOUT9 KBSOUT10 KBSOUT11 KBSOUT12 KBSOUT13 KBSOUT14 KBSOUT15/XOR_OUT

TINT# TCK TDO TDI TMS

IOPF0/PSCLK1 IOPF1/PSDAT1 IOPF2/PSCLK2 IOPF3/PSDAT2 IOPF4/PSCLK3 IOPF5/PSDAT3 IOPF6/PSCLK4 IOPF7/PSDAT4

32KX1/32KCLKIN 32KX2

IOPJ2/BST0 IOPJ3/BST1 IOPJ4/BST2 IOPJ5/PFS IOPJ6/PLI IOPJ7/BRKL_RSTO#

IOPM0/D8 IOPM1/D9 IOPM2/D10 IOPM3/D11 IOPM4/D12 IOPM5/D13 IOPM6/D14 IOPM7/D15

SEL0# SEL12_SEL2# IOPQ3/CLK

VDD

JTAG Debug Port

GND17GND35GND46GND

L18

1 2

BLM11P600S

123

136

VCC34VCC45VCC

Host Interface

PWM or PortA

Key Matrix Scan

PortB

PortC

PortD-1

PortE

PS2 Interface

PortJ-2

PortM

GND

122

159

167

137

KBC_RTC_VCC

12

BC56

KBC_AVCC

SCD1U16V

157

166

161

95

VCC

VBAT

AVCC

AD input

DA Output

IOPA0/PWM0 IOPA1/PWM1 IOPA2/PWM2 IOPA3/PWM3 IOPA4/PWM4 IOPA5/PWM5 IOPA6/PWM6 IOPA7/PWM7

IOPB0/URXD1 IOPB1/UTXD1

IOPB2/USCLK1

IOPB7/RING#/PFAIL#/RESET2#

IOPC4/TB1/EXWINT22 IOPC6/TB2/EXWINT23

IOPC7/CLKOUT

IOPD0/RI1#/EXWINT20

IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/RESET2#

IOPE5/A20//EXWINT40

IOPE6/LPCPD#/EXWINT45

IOPE7/CLKRUN#/EXWINT46

PortH

PortP

PortJ-1

PortD-2

PortK

PortL

NC#1111NC#1212NC#2020VCORF21NC#8585NC#8686NC#9191NC#9292NC#9797NC#98

AGND

96

12

BC47

BC47 SCD1U16V

SCD1U16V

AD0 AD1 AD2

AD3 IOPE0 IOPE1 IOPE2 IOPE3

NC#93 NC#94

DA0

DA1

DA2

DA3

IOPB3/SCL1

IOPB4/SDA1

IOPC0

IOPC1/SCL2 IOPC2/SDA2

IOPC3/TA1 IOPC5/TA2

IOPE4/SWIN

A0/ENV0

A1/ENV1 A2/BADDR0 A3/BADDR1

A4/TRIS

A5/SHBM

RD#

WR0#

SELIO#

IOPD4 IOPD5 IOPD6 IOPD7

A10 A11

A12 A13_BE0 A14_BE1

A15_CBRD

A16

A17

A18

IOPL3/A19

IOPL4/WR1#

98

1 2

R235

81 82 83 84 87 88 89 90 93 94

99 100 101 102

32 33 36 37 38 39 40 43

153 154 162 163 164 165

168 169 170 171 172 175 176 1

26 29 30

2 44 24 25

124 125 126 127 128 131 132

A6

133

A7

138

D0

139

D1

140

D2

141

D3

144

D4

145

D5

146

D6

147

D7

150 151

152 41

42 54 55

143

A8

142

A9

135 134 130 129 121 120

113 112 104 103 48

C

RTC_AUX_S5

1KR2

DA_BRI

PWM_BRI

KBC_PME#

R260

KBC_D0 KBC_D1 KBC_D2 KBC_D3 KBC_D4 KBC_D5 KBC_D6 KBC_D7

KBC_SEIO#

KBC_PIN21

C

BT_SENSE

THERMAL_DP THERMAL_DN

1 2

CHG_ICTL CHG_VCTL

1 2

R265

BT_SCL BT_SDA

1 2

WR1#

KBC_3D3V_AUX

12

BT_TH 39,40 AIRLINE_VOLT 40 AD_IA 40 PM_SUS_STAT# 22 KBC_MATRIX1 37 KBC_MATRIX2 37 EAPD 32,33

TP17TP17 TP16TP16

R262

DY

0R2-0

TP41TP41 TP37TP37

KBC_BEEP 32 PWR_LED 19 CHG_LED 19 VOL_UP_BTN# 37 VOL_DWN_BTN# 37

MUTE_BTN# 37

802_BT_BTN# 37

0R2-0

BRIGHTNESS

CAPS_LED 19 NUM_LED 19 MUTE_LED 18,19 BT_SCL 39 BT_SDA 39 PCIRST1# 24,27,28,30,34

PM_PWRBTN# 22 SMBC_KBC 25 SMBD_KBC 25

DVD_BT# 37 PM_SLP_S4# 22,26,42 PM_SLP_S3# 22,26,33,42,44,45,46 CLK32_G768 25

CDROM_BT# 37 CIR_KBC 18 AC_IN# 40

KBC_PWRBTN# 37 KBC_LID# 19

0R2-0

PM_CLKRUN# 22,27,30,34 A0/ENV0 38

A1/ENV1 38 A2/BADDR0 38 A3/BADDR1 38 A4/TRIS 38 A5/SHBM 38 A6 38 A7 38

KBCBIOS_RD# 38 KBCBIOS_WE# 38

TP10 TPAD30TP10 TPAD30

PR_INSERT# 18 KBC_MUTE 33 ECSWI#_KBC 22

A8 38 A9 38 A10 38 A11 38 A12 38 A13 38 A14 38 A15 38

A16 38 A17 38 A18 38

TP36TP36 TP44TP44

12

C255

C255 SCD1U16V

SCD1U16V

For NS97551 use only

BC51

BC51 SCD1U16V

SCD1U16V

BRIGHTNESS 19

KBC_D[0..7] 38

12

BC46

BC46 SCD1U16V

SCD1U16V

12

BT_SENSE

AD_IA

D

BC49

BC49 SCD1U16V

SCD1U16V

D

12

BC54

BC54 SCD1U16V

SCD1U16V

BT+

12

R274

R274 560KR3F

560KR3F

1 2

R275

1 2

DVD_BT# CDROM_BT# AC_IN#

SB

E

12

100KR3F

C278

C278 SCD1U16V3KX

SCD1U16V3KX

1 2

R233

1 2

R261

1 2

R651

BC55

BC55 SCD1U16V

SCD1U16V

KBC_3D3V_AUX

10KR2

10KR2 10KR2

10KR2

BC57

BC57 SCD1U16V

SCD1U16V

VOL_UP_BTN#

VOL_UP_DK# VOL_DWN_DK#

SMBC_KBC SMBD_KBC

VOL_DWN_BTN#

BT_SCL BT_SDA KBC_PME#

PM_PWRBTN#

1 2 3 4 5

2 1 4

R234 DUMMY-R2R234 DUMMY-R2

RSMRST#_KBC

S5_ENABLE

RN9

SRN10K

RN2

DY

SRN10KJ

1 2

R232

1 2

R231

1 2

R259

8 7 6

3

6K8R2F

6K8R2F 6K8R2F

6K8R2F 10KR2

10KR2

1 2

R247

1 2

R238

KBC HARDWARE SETTING

KBC_3D3V_AUX

A0/ENV0

1 2

R249 DUMMY-R2R249 DUMMY-R2

RN3

A1/ENV1 A2/BADDR0

SB-31-02

SHBM=1: Enable shared memory with host BIOS TRIS=1: While in IRE and OBD, float all the signals for clip-on ISE use

BADDR1-0 Index

0 0

1 0

Title

Size Document Number Rev

Custom

Date: Sheet

1 1

RN3

2

3

1 4

SRN10KJ

A3/BADDR1

1 2

R248 DUMMY-R2R248 DUMMY-R2

A4/TRIS

1 2

R243 DUMMY-R2R243 DUMMY-R2

IRE OBD

PROG

2E 4E

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

KBC NS97551

Leopard2

ENV0

ENV1

1 1

I/O Address

Reserved

E

TRIS 00 1 0DEV 1

(HCFGBAH, HCFGBAL)+1(HCFGBAH, HCFGBAL)

36 47Thursday, July 07, 2005

0 00 0 0

Data

3D3V_S0

KBC_3D3V_AUX

12

100KR2

10KR2

2F 4F0 1

of

-1

A

INTERNAL KEYBOARD CONNECTOR

4 4

CN8

25

3 3

26

ETY-CON24-1

20.K0170.001

KCOL[1..16] 36KROW[1..8] 36

KROW2

1

KROW8

2

KROW7

3

KCOL10

4

KROW5

5

KROW6

6

KCOL1

7

KROW3

8

KROW4

9

KCOL6

10

KCOL2

11

KROW1

12

KCOL3

13

KCOL5

14

KCOL8

15

KCOL9

16

KCOL7

17

KCOL4

18

KCOL13

19

KCOL14

20

KCOL15

21

KCOL12

22

KCOL11

23

KCOL16

24

R279 10KR2R279 10KR2

12 12

10KR2

R276

B

KBC_3D3V_AUX

R278

R278 10KR2

10KR2

DY

1 2

R277

R277 10KR2

10KR2

DY

3D3V_S0

12

KBC_MATRIX2 36 KBC_MATRIX1 36

3D3V_S0

12

R415

R406

R406 10KR2

10KR2

802_BT_BTN# MUTE_BTN#

R415 10KR2

10KR2

the matrix table for PCB

KBC_MATRIX2,KBC_MATRIX1

PA PR

Discrete

UMA00100111

C

POWER BUTTON

KBC_PWRBTN#36

VOL_UP_BTN#

LAUNCH Board

3D3V_AUX

12

R407

R407 10KR2

10KR2

PWRBTN#

3

12

BC86

BC86 SCD1U16V

SCD1U16V

3D3V_S0

D28

BAV99LT1

DY

3D3V_S0

1 2

R416

CDROM_BT#36

2

1

470R2

DVD_BT#36

DVD_BT# CDROM_BT#

D

12

EC101

EC101 SC1000P16V2KX

SC1000P16V2KX

PWR_LED#19

MUTE_LED#19

802_BT_LED#19

VOL_UP_BTN#36

VOL_DWN_BTN#36

802_BT_BTN#36

NUM_LED#19

MUTE_BTN#36

VOL_DWN_BTN# VOL_UP_BTN# 802_BT_LED# MUTE_LED# PWR_LED# NUM_LED#

ID_DET19,36

12

EC100

EC100 SC1000P16V2KX

SC1000P16V2KX

1 2

C335 SCD1U10V2MX-1C335 SCD1U10V2MX-1

12

C336 SCD1U10V2MX-1C336 SCD1U10V2MX-1

5V_S0

12

EC94

EC99

5V_S3

12

EC95

E

10 11 12 13 14 15 16 17 18 19 20

12

EC96

CN2

1 2

3 4 5 6 7 8 9

JST-CON20

21

22

12

EC97

EC98

D29

VOL_DWN_BTN#

2 2

123

678

4 5

678

4 5

KCOL14 KCOL13

KCOL4 KCOL7

RC3

RC3 SRC100P50V-U

SRC100P50V-U

for EMI

KROW3 KCOL1 KROW6

KROW5

RC5

RC5 SRC100P50V-U

SRC100P50V-U

for EMI

B

KCOL9

KCOL8

KCOL5

KCOL3

678

RC2

RC2 SRC100P50V-U

SRC100P50V-U

123

4 5

for EMI

1 1

A

123

678

4 5

KROW1 KCOL2 KCOL6

KROW4

RC4

RC4 SRC100P50V-U

SRC100P50V-U

123

678

4 5

678

4 5

KCOL16

KCOL11 KCOL12 KCOL15

RC1

RC1 SRC100P50V-U

SRC100P50V-U

KCOL10 KROW7 KROW8

KROW2

RC6

RC6 SRC100P50V-U

SRC100P50V-U

C

3

BAV99LT1

DY

2

1

TouchPad Connector

12

R556

R555

10KR2

TDATA_536

TCLK_536

12

BC115

BC116

DY

SC47P50V2JN

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet

SC1000P16V2KX

DY

SC1000P16V2KX

CN7

9 8 7 6 5 4 3 2

12

BC114

1

10

ETY-CON8-5

SCD1U16V

ETY-CON8-5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

SC1000P16V2KX

5V_S3

12

BC30

DY

SC1U10V3ZY

KEYBOARD/TOUCH PAD/Launch key

SC1000P16V2KX

37 47Thursday, July 07, 2005

E

SC1000P16V2KX

of

-1

A

4 4

B

C

D

E

3 3

KBC_D[0..7] 36

FLASH ROM

2 2

A0/ENV036 A1/ENV136 A2/BADDR036 A3/BADDR136 A4/TRIS36 A5/SHBM36 A636 A736 A836 A936 A1036 A1136 A1236 A1336 A1436 A1536

KBC_3D3V_AUX

1 1

A1636 A1736 A1836

A0/ENV0 A1/ENV1 A2/BADDR0 KBC_D2 A3/BADDR1 A4/TRIS A5/SHBM

A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18

512KB Flash

U46

20

A0

19

A1

18

A2

17

A3

16

A4

15

A5

14

A6

13

A7

3

A8

2

A9

31

A10

1

A11

12

A12

4

A13

5

A14

11

A15

10

A16

6

A17

9

A18

8

VDD

PM39LV040-70VC

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7

CE#

WE#

OE#

VSS

KBC_D0

21

KBC_D1

22 23

KBC_D3

25

KBC_D4

26

KBC_D5

27

KBC_D6

28

KBC_D7

29

30

7

32

24

KBCBIOS_CS# 36

KBCBIOS_WE# 36

KBCBIOS_RD# 36

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

A

B

C

D

Date: Sheet

BIOS/GF

Leopard2

-1

38 47Thursday, July 07, 2005

of

E

of

-1

A

B

C

D

E

Adaptor in to generate DCBATOUT

D23

R26

R26 100KR2

100KR2

3 1

MMBZ5252B

U2

S

D

S

1 2 3 4 5

D

S

D

S

D

S

D

S

D

GD

AO4407

C317

1 2

SCD1U50V5KX

8 7 6

Layout 200mil

DCIN1

4 4

3 3

DCIN1

SKT-JACK-134-GP

Q3

R1

R2

DTC114EUA-U1

3 1

AD_JK

OUT

GND

AD_OFF#

12

BC83

SCD1U50V3ZY

AD+_2

12

B

1

BC82

BC82 SC1000P50V

SC1000P50V

R25

200KR2J

2

E

Q5

Q5 PDTA124EU

PDTA124EU

C

3

12

1 3 2 4 5

12

EC1

SCD1U50V3ZY

AD_OFF36

2

IN

AD+

EC2

12

SCD1U50V3ZY

BT_SCL

3

3D3V_AUX

D24

BAV99LT1

2

BT_SDA

1

3

3D3V_AUX

D25

BAV99LT1

3D3V_AUX

D3

3

D3

BAV99LT1

2

1

2

BT_TH

1

BATTERY CONNECTOR

2 2

G6

BT+SENSE40

1 1

A

1 2

GAP-CLOSE

BT+

1 2

F3

F3 FUSE-10A125V

FUSE-10A125V

SB

CN11

7 1

2 3

BT_SCL36 BT_SDA36 BT_TH36,40

12

BCC1

BCC1 SCD1U

SCD1U

B

12

BC3

BC3 SC1000P50V

SC1000P50V

C

4 5 6 8

SYN-CON6-2-U2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

D

Date: Sheet of

Adaptor/ Bettery conn.

Leopard2

E

-1

39 47Thursday, July 07, 2005

of

-1

AC_IN Threshold 2.089V Max. AC_IN > 2.089V --> AC DETECT

BT_TH36,39

AD_IA36

parallel to KBC GND is KBC's GND

CHG_PBATT is H:

R421

CHG_ON#36

Charge OFF Charge ONCHG_PBATT is L:

C4

1 2

SCD1UC4SCD1U

R18

1 2

15K4R2F-GP

0707 -1

HM1-SB AD<=17V, disable charger function

R17

1 2

100KR2F

AD+ DCBATOUT

12

R424

R424 100KR2F

100KR2F

12

R425

R425 19K1R2F

19K1R2F

MAX8725_ACIN

AIRLINE_VOLT 36

U51

D

8

D

7

D

6

AO4407

SC

D27

CH521S-30

MAX8725_GND

12

R429

R429 100KR2F

100KR2F

21

12

C54

C54 SCD1U

SCD1U

12

R411

R411 100KR2

100KR2

AD+

MAX8725_LDO

4.2V/cell

MAX8725_LDO

12

0R2-0

12

MAX8725_GND

G7

1 2

GAP-CLOSE-PWR

0707 -1

G8

1 2

GAP-CLOSE-PWR

R423

R423 68KR3F

68KR3F

PKPRES#

R422

R422 100KR2

100KR2

R42

20KR2F

3D3V_AUX

CHG_I_PRE_SEL36

MAX8725_GND

12

R47

R47 100KR2

100KR2

1

G

2 3

MAX8725_GND

12

R428

R428 49K9R2F

49K9R2F

AC_IN

12

D

S

2 3

R426

R41

R41 10KR2

10KR2

C53

C53 SCD1U25V3KX

SCD1U25V3KX

R44

R44 2K2R2F

2K2R2F

Q7

CHG_I_SEL36

2N7002

1 2

MAX8725_GND

12

MAX8725_GND

31K6R3F

C52

C52 SCD01U50V3KX

SCD01U50V3KX

R205

20KR2F

DY

Q44

1

G

2N7002

DY

MAX8725_LDO

12

C51

C51 SCD1U

SCD1U

MAX8725_GND

D

Q8

Q8 2N7002

2N7002

S

1

G

MAX8725_GND MAX8725_GND

If Charger is MAX1909,dummy them.

S

1

S

2

S

3

GD

45

12

R427

R427 49K9R2F

49K9R2F

MAX8725_CCV MAX8725_CCS

12

MAX8725_REF

R413

39KR2F

12

2 3

D1

3

BAV99LT1

Close to MAX1909 pin 24

SCD1U25V3KX

MAX8725_PDS AD+_TO_SYS MAX18725_DC_IN

MAX8725_VCTL

MAX8725_ICTL

MAX8725_MODE

MAX8725_IINP

MAX8725_CLS

PKPRES#

MAX8725_CCI

C43

C43 SCD01U50V3KX

SCD01U50V3KX

12

MAX8725_ICTL

12

R43

R43 29K4R2F

29K4R2F

D

S

2

3D3V_S5

1

AD+_TO_SYS

R364

12

C338

C338 SC1U50V5ZY

SC1U50V5ZY

G35

GAP-CLOSE-PWR

1 2

12

C340

MAX8725_GND MAX8725_GND

U7

26

27

PDS

24

SRC

1

DCIN

11

VCTL

10

ICTL

7

MODE

3

ACIN

8

IINP

9

CLS

6

ACOK

5

PKPRES

13

CCV

12

CCI

14

CCS

MAX8725ETI

MAX8725_REF

12

C56

SC1U10V3ZY

CSSP

ISOURCE_MAX = (0.075/R364)*(VCLS/VREF) TOTAL_POWER : Adapter=90W,Total_Power=81W

1 2

D01R2512F-1-GP

G34

GAP-CLOSE-PWR

1 2

25

CSSN

DHIV

PDL LDO

DLOV

DLO

PGND PGND

CSIP

CSIN

BATT

GND

DHI

AD+_TO_SYS

22 28 2

21

23

20

19 29 18

17 16 15

12

C339

C339 SCD1U25V3KX

SCD1U25V3KX

REF

4

V_REF :4.2235V (<500uA)

12

R412

R412 49K9R2F

49K9R2F

MAX8725_CLS

12

R414

R414 68KR3F

68KR3F

SC

MAX8725_GND

ICTL :

SB

CHG_ON# CHG_I_SEL CHG_I_PRE_SEL 0A H L L

0.3A L L H

1.5A L H L

2.5A L L L

12

C341

C341 SCD1U

SCD1U

MAX8725_DHIV

MAX8725_DLOV

MAX8725_DHI

MAX8725_DLO

MAX8725_GND

MAX8725_LDO

1 2

MAX8725_GND

1 2

R405 DUMMY-R3R405 DUMMY-R3

Near MAX8725 Pin 2

C55

1 2

12

SC1U10V3ZY

R410

MAX8725_GND

33R2

Near MAX8725 Pin 21

12

C342

C342 SC1U10V3ZY

SC1U10V3ZY

G5

GAP-CLOSE-PWR

BT+SENSE 39

From Battery Connector

AC_IN

3

Q43

1

S2N3904-U3

2

12

R37

R37 DUMMY-R3

DUMMY-R3

12

C38

123

45

SSGD

U5

U5 SI4431BDY

SI4431BDY

DDDS

678

CHG_PWR-2 CHG_PWR-3

678

DDD

U6

U6 SI4800BDY

SI4800BDY

SSS

GD

SSS

GD

123

4 5

AC_IN# 36

C38 SCD1U

SCD1U

1 2

IND-10UH-28

SB

U54

S

1

S

2

S

3

GD

4 5

AO4407

12

L22

D

8

D

7

D

6

C331

C331 SC10U25V6KX

SC10U25V6KX

1 2

R409

1 2

BT+

12

C44

C44 SCD1U25V3KX

SCD1U25V3KX

DY

DCBATOUT

12

C330

C330 SC10U25V6KX

SC10U25V6KX

BT+

D015R2512F-1

12

G36GAP-CLOSE-PWR G36GAP-CLOSE-PWR

Title

Size Document Number Rev

Custom

Date: Sheet

12

G37GAP-CLOSE-PWR G37GAP-CLOSE-PWR

C334

C334 SC10U25V6KX

SC10U25V6KX

1 2

CHARGER MAX8725

Leopard2

12

C332

C333

C333 SC10U25V0KX

SC10U25V0KX

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

40 47Thursday, July 07, 2005

-1

of

A

5V_S5 5V_S0 5V_S5

B

C

D

E

CPU_CORE-MAX1907

C2

C2 SC4D7U10V5ZY

SC4D7U10V5ZY

10

VCC

DPSLP#

20

PM_STPCPU#

0R2-0

R14

12

DCBATOUT

R3 10R3R310R3

34

SUS

35

39

12

1 2

V+

VDD

BST

DH

LX

DL

PGND

CSP CSN

OAIN+ OAIN-

FB

NEG

POS

GND

NC

TIME

MAX1907AETL-U

R7 47KR3R747KR3

C7

C7 SCD1U25V3KX

SCD1U25V3KX

U1

30

1 2

31

R24

33 32 29

28

1907_CSP1

18

1907_CSN1

19

MAX1907_OAIN+

17

MAX1907_OAIN-

16

15

14

13

11 41

0R3-0-U

MAX1907_DH

MAX1907_LX

MAX1907_DL

MAX1907_NEG MAX1907_POS

12

C12

SSM5818SL

SC4D7U10V5ZY

C9

1 2

SC1000P50V

C6

1 2

SC470P50V2KX

1 2

C5

1 2

SC100P50V2JN-U

1 2

130R3F

R13

offset 1.2%

MAX1907_VCC

3D3V_S0

1 2

4 4

CLK_PWRGD#3,25

VGATE25

3 3

CPU_SHDN#42

Ton=NC, Freq.=300KHz

MAX1907_REF

SC1U10V3KX

2 2

R8

R15

R15 100KR2

100KR2

1 2

R5

PM_DPRSLPVR22

R9 100KR2R9100KR2

1 2

SYSPOK

MAX1907_S0 MAX1907_S1 MAX1907_S2

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5

MAX1907_B0 MAX1907_B1 MAX1907_B2

1KR2R51KR2

MAX1907_CC

C1

C1 SC270P50V2JN

SC270P50V2JN

MAX1907_ILIM

PM_STPCPU#3,22

38 36 37

26 25 24 23 22 21

40

12

27

4 5 6

1 2 3

7

8 9

CLKEN# SYSPOK IMVPOK

S0 S1 S2

D0 D1 D2 D3 D4 D5

B0 B1 B2

SHDN#

TON

CC

REF ILIM DDO#

1 2

R16

DUMMY-R2

2K2R2FR82K2R2F

1 2

H_VID05 H_VID15 H_VID25 H_VID35 H_VID45 H_VID55

12

R6 100KR2R6100KR2

12

R372

R372 DUMMY-R2

DUMMY-R2

1 2

12

R374

100KR2

12

1 2

R373

R373 150KR2F

150KR2F

C3

OCP=30A, Vally current = 27.5A, Vilim=550mV(55mVp-p*10)

Deeper Sleep Voltage : 0.748V , S0=L, S1=H, S2=Open,

5V_S05V_S0 5V_S0 5V_S0 5V_S05V_S0

12

R367

R367 DUMMY-R2

DUMMY-R2

1 1

12

R377

R377 20KR2

20KR2

A

12

R366

R366 DUMMY-R2

DUMMY-R2

MAX1907_S2MAX1907_S0 MAX1907_S1 MAX1907_B0 MAX1907_B1 MAX1907_B2

12

R376

R376 20KR2

20KR2

12

R365

R365 DUMMY-R2

DUMMY-R2

R375

R375 DUMMY-R2

DUMMY-R2

Boot-up Voltage : 1.2V , B0=L, B1=L, B2=Open

12

B

R370

R370 DUMMY-R2

DUMMY-R2

R380

R380 20KR2

20KR2

12

R369

R369 DUMMY-R2

DUMMY-R2

R379

R379 20KR2

20KR2

12

R4

R4 0R3-0-U

0R3-0-U

DY

21

D2

1 2

R23

1 2

R22

1 2

R11

R12

12

C10

C10 SCD1U25V3KX

SCD1U25V3KX

200R2F

110R2F

698R2F

R382

R382 1K18R3F

1K18R3F

1 2

R371

12

R2 0R3-0-UR20R3-0-U

100KR2F

R368

R368 DUMMY-R2

DUMMY-R2

R378

R378 DUMMY-R2

DUMMY-R2

D

Q29

Q29 IRFR3707Z

1

G

1

G

LS/IRFR3709Z/8.2mOhm/@4.5V

1907_CSP

IRFR3707Z

3 4

S

D

Q30

Q30 IRFR3709Z

IRFR3709Z

3 4

S

VID

VID2

VID3 VID1 VID0

VID4

VID5

0 0

0 0 0 1

1 1

C

0

1

1 1

1

1 0

0 0

011 0

1

0 0

1

0

1 0

1

0

1

0 1

0

1

0

1

0

1 110 0

0

1

0 1 0

0

1 0 00 0 1 1 1 1 0 1 1 01 0

G

Vcore

1.340

1.324

1.292

1.260

1.244

1.212

1.180

1.148

1.100

1.052

1.020

0.972

0.940

DCBATOUT

12

D

Q6

Q6 IRFR3707Z

1

IRFR3707Z

3 4

S

12

C329

C14

SCD1U

SC4D7U25V6KX-L

HS/IRFR3707Z/12.5mOhm/@4.5V

1 2

12

R32

R32 698R2F

D

Q4

Q4 IRFR3709Z

3 4

S

IRFR3709Z

G1

1 2

GAP-CLOSE

VCCP_GMCH_S0

1

V

12

C8

SCD1U10V2MX-1C8SCD1U10V2MX-1

698R2F

1 2

R31 DUMMY-R3R31 DUMMY-R3

1907_CSP_G

12

G4

GAP-CLOSE-PWR

1 2

R381

3D3V_AUX

12

R21

R21 4K7R2

4K7R2

1

12

R20

R20 22KR2J

22KR2J

D

1 2

R10

DCBATOUT

12

C13

C327

SC4D7U25V6KX-L

L1

IND-D68UH-10

C37

C37 SCD47U10VKX

SCD47U10VKX

12

G3

GAP-CLOSE-PWR

130R3F

DY

698R2F

3D3V_S0

12

R1

12

R19

R19 10KR2

10KR2

3

Q2

Q2 S2N3904-U3

S2N3904-U3

2

R1 100KR2

100KR2

DY

D

Q1

1

2N7002

G

S

2 3

Title

Size Document Number Rev

A3

Date: Sheet

12

C11

SC4D7U25V6KX-L

SYSPOK

IMVP IV-CPU POWER-MAX1907

12

C328

C328 SCD1U

SCD1U

12

G2

GAP-CLOSE-PWR

VCC_CORE_S0_G92

Leopard2

TC16

TC16 SE100U25VM-L1-GP

SE100U25VM-L1-GP

VCC_CORE_S0

12

TC17

SE220U2VDM-6

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

TC2

12

TC4

TC3

SE220U2VDM-6

41 47Monday, July 11, 2005

of

SE220U2VDM-6

-1

5

A

For 3.3V SETTING=3.349V

1 2

10KR2F-U

R188

R189

2K7R2J

D D

2K7R2J

For 1.8V SETTING=1.82V

1 2

10KR2F-U

R574

R587

3K24R2F

12

C211

C211 SC3300P50V2KX

SC3300P50V2KX

12

1 2

R187

5130_INV2 5130_FB2

1 2

R576

1 2

150R2F

1 2

29K4R2F

R190

close to IC

1 2

680R3F

SC

1 2

R575 11K5R2FR575 11K5R2F

close to IC

12

5130_INV1

C528

C528 SC8200P25V2KX

SC8200P25V2KX

5130_FB1

3D3V_PWR

C212

C212 SC5600P25V2KX

SC5600P25V2KX

1D8V_PWR

C522

C522 SC6800P25V2KX-N2

SC6800P25V2KX-N2

Vo=(R1*0.85)/R2+0.85

C C

T(soft)=1.736ms

U71

5V_AUX

PM_SLP_S3#22,26,33,36,44,45,46

100KR2

TPS5130_1D8V_EN#

100KR2

TPS5130_5V_EN#

2N7002DW

84.27002.03F

PM_SLP_S4#

12

C529

C529 SC4700P50V2KX

SC4700P50V2KX

1 2

R191

TPS5130_1D8V_EN#31

B B

PM_SLP_S4#22,26,36

5V_AUX

1 2

R598

5130_STBY_LDO 5130_SS_STBY2

12

R597

R597 0R2-0

0R2-0

U71

5 6

Q42

R1

2

IN

DTC115EE-U

U74

3 4 2 1

2N7002DW

84.27002.03F

3 1

R2

5 6

OUT

GND

34 2 1

SC

1 2

SC1000P50V2KX

5130_SS_STBY1

PM_SLP_S4#

DCBATOUT

BL3#43

R6630R2-0 R6630R2-0

R6620R2-0DYR6620R2-0

DY

0703 -1

C530

1 2

4

3

TI TPS5130 for 1D8V, 3D3V, 5V

(1D8V=>CH1 , 3D3V=>CH2 , 5V =>CH3)

For 5V SETTING=5.0915V

1 2

R211

SC4700P50V2KX

5130_3D3V_LDO

SB

1 2

R184

CH521S-30

2 1

D36

SC

PM_SLP_S4#

5130_SS_STBY3

12

C534

C534 SC4700P50V2KX

SC4700P50V2KX

78.47224.2F1

1KR2F

12

R209

R209 1K8R2

1K8R2

12

C228

5130_FLT

12

C521

C521 SCD01U16V2KX

SCD01U16V2KX

12

R185

R185 150KR2J

150KR2J

100KR2

SB

S5PWR_ENABLE 25

1 2

R210

5130_INV3 5130_FB3

5130_FB1 5130_SS_STBY1 5130_INV2 5130_FB2 5130_SS_STBY2 5130_PWMSEL 5130_CT

5130_REF

STBY_REF

5130_STBY_LDO

5130_CT

12

C535

SC47P50V2JN

78.47034.1F1

5130_REF

12

C536

C536 SCD1U16V2KX-2

SCD1U16V2KX-2

VCCP_PWRGD25,44,45

C210

1 2

330R2F

SC4700P50V2KX

1 2

4K99R2F

R208

close to IC

5130_FLT 5130_INV1

1

FB1

2

SS_STBY1

3

INV2

4

FB2

5

SS_STBY2

6

PWM_SEL

7

CT

8

GND

9

REF

10

STBY_VREF5

11

STBY_VREF3.3

12

STBY_LDO

5130_SS_STBY3 5130_FB3 5130_INV3

5V_PWR

5130_5V_LDO

3

1

5130_LH1

1 2

47

46

48

44

45

LL1

FLT

LH1

INV1

OUT1_U

TPS5130

FB3

INV3

SS_STBY3

PGOUT16PG_DELAY

14

15

13

17

5130_PG_DELAY

12

C542

SC1000P25V

3D3V_S0

12

R523

R523 10KR2

10KR2

PM_SLP_S3#

HW Thermal Throttling

D11

BAW56-1

2

5130_LL1

C520

C520 SCD1U16V2KX-2

SCD1U16V2KX-2

5130_OUT1U 5130_OUT1D

5130_TRIP1 5130_TRIP2

5130_OUT2D

40

38

39

37

TRIP141TRIP2

OUT1_D43OUT2_D

OUTGND142OUTGND2

VIN_SENSE12

LDO_GATE

LH3

LL3

OUT3_D

OUT3_U

VIN_SENSE3

20

19

5130_TRIP3

3D3V_S0

1 2

OUTGND3

TPS5130PT-U

22

23

21

24

5130_OUT3D 5130_LL3 5130_OUT3U

5130_LH3

C541 SCD1U16V2KX-2C541 SCD1U16V2KX-2

3

D34

BAT54-1

83.00054.L03

147

1 2

TRIP3

18

DCBATOUT

OUT2_U

LH2

VREF3.3

VREF5

REG5V_IN

LDO_IN

LDO_CUR LDO_OUT

INV_LDO

1 2

DCBATOUT

U44A

3

TSLCX08-U

5130_LL1 43

5130_OUT1U 43 5130_OUT1D 43

U73

36

LL2

35 34 33

VIN

32 31 30 29 28 27 26 25

5130_5V_LDO

SB

5130_OUT2D 43

5130_REGIN

5130_OUT3D 43 5130_OUT3U 43 5130_LL3 43

CPU_SHDN# 41

C527

5130_LH2

1 2

SCD1U16V2KX-2

close to IC

5130_OUT2U

G67 GAP-CLOSE-PWRG67 GAP-CLOSE-PWR

2

5130_TRIP1

5130_TRIP2

5130_TRIP3

5130_LL2

DCBATOUT

5130_OUT2U 43

12

1D8V_OCP

SC

R186

1 2

13KR3F

13KR3F C209

C209

1 2

SCD1U16V2KX-2

close to IC

3D3V_OCP

SC

R183

1 2

10KR3F

10KR3F C208

C208

1 2

SCD1U16V2KX-2

close to IC

5V_OCP

SC

R207

1 2

15KR3F

15KR3F C223

C223

1 2

SCD1U16V2KX-2

close to IC

OCP

8.88A=>R207=15K

5130_LL2 43

C207

1 2

SCD1U25V2ZY-U

5V_S3

78.47593.411

Condition Voltage

PWM_SEL

H : Auto PWM/SKIP 2.2V(Min)~

*

L : PWM fixed (300KHz) ~0.3V(Max)

Title

Size Document Number Rev

A3

Date: Sheet

DCBATOUT

OCP

8.2A=>R186=13K

DCBATOUT

OCP

5.82A=>R182=10K

DCBATOUT

5130_5V_LDO 5V_AUX

5130_5V_LDO

5130_3D3V_LDO

12

TPS5130 (3D3V/5V/1D8V)

C533SC4D7U10V5ZY

Leopard2

12

C526

C526 SCD1U25V2ZY-U

SCD1U25V2ZY-U

1

G59

12

GAP-CLOSE-PWR

G60

1 2

GAP-CLOSE

ZZ.CON2C.XX1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

42 47Thursday, July 07, 2005

-1

A

5

A

TI TPS5130 for 1D2V, 5V, 3D3V

(1D2V=>CH1 , 5V=>CH2 , 3D3V =>CH3)

D D

678

DDD

SSS

GD

SSS

GD

123

5130_OUT1U42

5130_LL142

C C

5130_OUT1D42

5130_OUT3U42

5130_LL342

5130_OUT1U 5130_LL1

5130_OUT1D

5130_OUT3U

5130_LL3

B B

5130_OUT3D42

5130_OUT3D

4 5

GD

4 5

U32

U32 AO4422

AO4422

GD

4 5

U33

U33 AO4422

AO4422

GD

4 5

678

DDD

678

DDD

678

DDD

SSS

123

SSS

123

SSS

123

12

C206

C206 SCD1U25V2ZY-U

U28

U28 AO4422

AO4422

Imax=9.3A Rdson=19.6~24mohm

U26

U26 AO4422

AO4422

Imax=9.3A Rdson=19.6~24mohm

SCD1U25V2ZY-U

L39

1 2

IND-4D7UH-66-GP

Imax=A DCR=mOhm

12

C227

C227 SCD1U25V2ZY-U

SCD1U25V2ZY-U

L41

1 2

IND-4D7UH-66-GP

Imax=4.5A DCR=60mOhm 7*7*3.0

4

DCBATOUT

12

C540

C540 SC10U35V0ZY-U

SC10U35V0ZY-U

1D8V_PWR

DCBATOUT

5V_PWR

1D8V Iomax=5A OCP>10A

12

TC23

TC23 SE220U2VDM-7

SE220U2VDM-7

KEMET, NTD:7.6 (Q1) ESR=25mohm Iripple=2.2A

7.3*4.3*1.9

12

C238

C238 SC10U35V0ZY-U

SC10U35V0ZY-U

5V Iomax=5.4A OCP>10A

SB

12

TC25

TC25 ST220U6D3VDM-12

ST220U6D3VDM-12

KEMET, NTD:8.0 (Q1) ESR=25mohm Iripple=1.65A

7.3*4.3*2.8

3

1.5V_S5 (For ICH6)

SC

U39

3

12

DY

C245

C245 SC10U10V5ZY

SC10U10V5ZY

78.10693.411

1D8V_S3

12

R610

R610 1KR2F

1KR2F

APL5331_0D9V_VREF

12

R614

R614 1KR2F

1KR2F

U39

VOUT

VIN

GND

G9131-15T73UF-GP

Imax=300mA

Trace Length=1cm (500mils) Trace Width=8mils Trace Resistance>25mohm

12

C564

C564 SCD1U16V2KX-2

SCD1U16V2KX-2

3D3V_S5

1D8V_S3

12

C246

C246 SC10U10V5ZY-L

SC10U10V5ZY-L

2

1D8V_PWR 1D8V_S3

1D5V_S5

2 1

12

C262

C262 SC2D2U10V3ZY

SC2D2U10V3ZY

5V_S0

12

C247

C247 SCD1U

SCD1U

U38

VIN1VOUT

3

VREF VCNTL6NC

2

GND

9

GND

APL5331KAC-TR

SO-8-P

NC NC

Vo(cal.)=0.90V

4 8

7 5

12

TC13

TC13 ST100U4VBM-1

ST100U4VBM-1

KEMET 100uF / 4V / B2 Size / NTD:5.615 Iripple=1.1A / ESR=70mohm

5V_PWR 5V_S3

12

C563

C563 SC22U10V6ZY-U

SC22U10V6ZY-U

G57

GAP-CLOSE-PWR

G56

GAP-CLOSE-PWR

G58

GAP-CLOSE-PWR

G65

GAP-CLOSE-PWR

G64

GAP-CLOSE-PWR

G66

GAP-CLOSE-PWR

G61

GAP-CLOSE-PWR

G62

GAP-CLOSE-PWR

G63

GAP-CLOSE-PWR

G25

GAP-CLOSE-PWR

G24

GAP-CLOSE-PWR

DY

1

12

3D3V_AUX3D3V_PWR

12

0D9V_S0 Iomax=2A

12

DDR_VREF0D9V_LDO

DCBATOUT

12

C229

678

DDD

U31

U31 AO4422

AO4422

Imax=9.3A

SSS

GD

SSS

GD

Rdson=19.6~24mohm

123

5130_OUT2U42

5130_LL242

5130_OUT2D42

5130_OUT2U

5130_LL2

5130_OUT2D

4 5

U30

U30 AO4422

AO4422

GD

4 5

678

DDD

Imax=9.3A

SSS

Rdson=19.6~24mohm

123

C229 SCD1U25V2ZY-U

SCD1U25V2ZY-U

L40

1 2

IND-6D8UH-31-GP

Imax=4.5A DCR=60mOhm 7*7*3.0

12

C226

C226 SC10U35V0ZY-U

SC10U35V0ZY-U

3D3V_PWR

3D3V Iomax=4A OCP>8A

12

TC24

TC24 ST220U6D3VDM-6

ST220U6D3VDM-6

NEC, NTD:8.75 (Q1) ESR=55mohm Iripple=1.65A

7.3*4.3*2.8

L3# at 8.13V

HTH

DCBATOUT

12

L3# circuit

HTH

R227

R227 1MR2F

1MR2F

R226

R226 6K04R2F

6K04R2F

R212

R212 174KR2F

174KR2F

1 2

U29

HTH GND LTH3RESET#/RESET

G680LT1

VCC

BL3#42

5V_AUX

12

C224

C224 SCD1U10V2MX-1

SCD1U10V2MX-1

5 4

D12

3

2 1

BAT54-1

DY

Title

Size Document Number Rev

A3

Date: Sheet

TPS5130 (3D3V/5V/1D8V/0D9V)

RSMRST# 21,25,36

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

43 47Monday, July 11, 2005

A

-1

of

-1

Iocp=7.8 * 1.7 = 13.3A Rds,on=5.5*1.375=7.563m ohm Vcs1=Iocp*Rds,on=100mV VILIM=Vcs1/0.1=1V

1D8V / 5.5A

VRAM_VDDQ

0703 -1

G16

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G18

G18

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G17

G17

1 2

GAP-CLOSE-PWR

12

R164

R164 8K06R2F

8K06R2F

12

R162

R162 10KR2F-U

10KR2F-U

1D8V_VRAM_PWR

MAX8743_VREF

12

TC8

1 2

SE220U2VDM-6

12

IND-4D7UH-16-GP

R565 DUMMY-R2R565 DUMMY-R2

1 2

C491

C491 SC10U25VMX-2-U

SC10U25VMX-2-U

AO4422

L15

AO4422

MAX8743_FB1

SCD1U25V3KX

U66

C505

12

U67

5V_S3

12

DCBATOUT

678

DDD

SSS

GD

SSS

GD

123

4 5

678

DDD

SSS

GD

SSS

GD

123

4 5

R563

DUMMY-R2

R564

DUMMY-R2

MAX8743_BST1

1 2

R161

12

C181

C181 SCD1U25V3KX

SCD1U25V3KX

Rds-on,max = 5.5m ohm 10A@70 degree C

1D05V ON/OFF control

MAX8743_VREF

12

3D3V_S0

Ton Setting

VCC Float VREF AGND

Side 1 Frequency(kHz) 235 345 485 620

5V_S3

D10

3

2

BAW56-1

0R3-U

MAX8743_ON#

R170

C516

C516 SC1U10V3KX

SC1U10V3KX

R172 100KR2R172 100KR2

5V_S3

12

C514

C514 SCD01U50V3KX

SCD01U50V3KX

12

C513

C513 SC1U10V3KX

SC1U10V3KX

12

C507

C507 SCD01U50V3KX

SCD01U50V3KX

12

C508

C508 SC1U25V5ZY

SC1U25V5ZY

Close to pin21 Close to pin4

R573

R573 10R3

10R3

SB

1

12

MAX8743_BST1R MAX8743_DH1 MAX8743_DH2

MAX8743_LX1 MAX8743_DL1

R171

1 2

R169

R169 100KR2F

100KR2F

R163

R163 86K6R2F

86K6R2F

12

0R2-0

12

0R2-0

DY

0703 -1

Side 2 Frequency(kHz) 170 255 355 460

12

C515

C515 SC1U10V3KX

SC1U10V3KX

9

3 25 26

27 24

28

1

2 11

5 10

6

U69

UVP

VCC22VDD ILIM1 BST1 DH1

LX1 DL1

CS1

OUT1 FB1 ON1 TON

REF SKIP#

MAX8743EEI

4

21

V+

ILIM2 BST2

DH2

LX2 DL2

CS2

OUT2

FB2

ON2

PGOOD

OVP

GND

23

SC

30K1R2F

R661

1 2

100KR2F

13 19

18 17 20

16

15 14 12 7 8

MAX8743_VREF

12

R607

MAX8743_BST2

12

R571

R571 402KR2F

402KR2F

12

R572

R572 100KR2F

100KR2F

MAX8743_BST2R

MAX8743_LX2 MAX8743_DL2

SC

MAX8743_ON#

R167

R167 0R3-U

0R3-U

12

1 2

C197

C197 SCD1U25V3KX

SCD1U25V3KX

3D3V_S5

R658

R658 100KR2

100KR2

DY

1 2

VCCP_PWRGD 25,42,45

678

U68

DDD

AO4422

GD

4 5

678

5

DDD

GD

S

GD

S

4

Rds-on,max = 20m ohm 7A@70 degree C

5V_AUX

R657

1 2

100KR2

DY

SSS

123

S

123

MAX8743_FB2

Iocp=4.3 * 1.7 = 7.3A Rds,on=20*1.375=27.5m ohm Vcs2=Iocp*Rds,on=201mV VILIM2=Vcs2/0.1=2.01V

12

C512

SCD1U25V3KX

L16

1 2

IND-6D8UH-31-GP

U70

IRF7807Z

SC

U82

3 4 2 1

5 6

2N7002DW

DY

Title

Size Document Number Rev

A3

Date: Sheet of

C506

C506 SC10U25VMX-2-U

SC10U25VMX-2-U

G22

GAP-CLOSE-PWR

G20

1D5V_PWR

12

TC11

SE220U2VDM-7

DY

12

DY

C618

C618 SCD1U10V2MX-1

SCD1U10V2MX-1

1 2

R656 10KR2

1 2

R667 0R2-0R667 0R2-0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

MAX8743 (1D8V_S0/1D5V_S0)

Leopard2

G20

GAP-CLOSE-PWR

G21

GAP-CLOSE-PWR

12

R178

R178 5K1R2F

5K1R2F

12

R179

R179 10KR2F-U

10KR2F-U

PM_SLP_S3# 22,26,33,36,42,45,46

MAX8743_ON# 44,45

44 47Monday, July 11, 2005

1D5V / 4D3A

1D5V_S0

12

-1

Iocp=7.8 * 1.7 = 13.3A Rds,on=5.5*1.375=7.563m ohm Vcs1=Iocp*Rds,on=100mV VILIM=Vcs1/0.1=1V

SC10U25VMX-2-U

1D2V / 13A

1D2V_VGA_S0

G50

12

GAP-CLOSE-PWR

G51

12

GAP-CLOSE-PWR

G52

12

GAP-CLOSE-PWR

G49

12

GAP-CLOSE-PWR

G47

12

GAP-CLOSE-PWR

G48

12

GAP-CLOSE-PWR

R62

49K9R2F

12

R61

R61 10KR2F-U

10KR2F-U

12

SB

C70

SCD1U25V3KX

DY

C71

SC1000P25V

Vo=Vref*(1+R1/R2) =1.0V*(1+2K/10K) =1.2V Vo=1.0V*(1+0/10K) =1*1=1.0V

High(3.3V)=>Vo=1.0V Low(0V)=>Vo=1.2V

M24/M26 POWER PLAY (VGA_PWRCNTL) high (3.3V) = set lower core voltage (VDDC = 1.0V) low (0V) = set higher core voltage (VDDC = 1.2V)

C49

12

1 2

IND-D82UH-3-GP

12

TC5

SE220U2VDM-6

12

D

S

2 3

12

C48

C48 SC10U25VMX-2-U

SC10U25VMX-2-U

L23

U56

12

TC20

SE220U2VDM-6

1D2V_PWR

R655

R655 3K3R2

3K3R2

0706 -1

Q39

Q39 2N7002

2N7002

1

G

12

S

IRF7807Z

123

MAX8743A_FB1

12

R451

R451 10KR2

10KR2

C47

C47 SCD1U25V3KX

SCD1U25V3KX

AO4422

DCBATOUT

678

U9

DDD

SSS

GD

SSS

GD

123

4 5

678

5

678

5

U8

DDD

S

U8

DDD

GD

S

GD

S

GD

S

4

123

4

VGA_PWRCNTL 13

MAX8743A_BST1

12

Rds-on,max = 5.5m ohm 10A@70 degree C

IRF7807Z

MAX8743A_VREF

3D3V_S0

5V_S3

D4

3

1

2

BAW56-1D4BAW56-1

1 2

0R3-U

R49

C58

C58 SCD1U25V3KX

SCD1U25V3KX

1D2V ON/OFF control

MAX8743_ON#

12

C93

C93 SC1U10V3KX

SC1U10V3KX

R90 100KR2R90 100KR2

5V_S3

R450

R450 0R2-0

0R2-0

1 2

12

R485

R485 DUMMY-R2

DUMMY-R2

5V_S3

12

C60

C60 SCD01U50V3KX

SCD01U50V3KX

12

C61

C61 SC1U10V3KX

SC1U10V3KX

12

C92

C92 SCD01U50V3KX

SCD01U50V3KX

12

C91

C91 SC1U25V5ZY

SC1U25V5ZY

Close to pin21 Close to pin4

R102

R102 10R3

10R3

SB

1 2

12

R89

R89 243KR2F

243KR2F

SC SC

12

R88

R88 100KR2F

100KR2F

MAX8743A_BST1R MAX8743A_DH1 MAX8743A_DH2

MAX8743A_LX11D2V_PWR MAX8743A_DL1

R652

1 2

12

0R2-0

12

C59

C59 SC1U10V3KX

SC1U10V3KX

9

3 25 26

27 24

28

1

2 11

5 10

6

MAX8743EEI

U17

UVP ILIM1 BST1 DH1

LX1 DL1

CS1

OUT1 FB1 ON1 TON

REF SKIP#

21

VCC22VDD

23

4

V+

ILIM2 BST2

DH2

LX2 DL2

CS2

OUT2

FB2

ON2

PGOOD

OVP

GND

MAX8743A_VREF

30K1R2F

R489

1 2

100KR2F

R487

13 19

18 17 20

16

15 14 12 7 8

12

MAX8743A_BST2

12

R91

R91 220KR2F

220KR2F

12

R92

R92 100KR2F

100KR2F

MAX8743A_BST2R

MAX8743A_LX2 MAX8743A_DL2

SB

R486

1 2

DUMMY-R2

MAX8743A_VREF

Ton Setting

VCC Float VREF AGND

Side 1 Frequency(kHz) 235 345 485 620

Side 2 Frequency(kHz) 170 255 355 460

R64

R64 0R3-U

0R3-U

12

1 2

C72

C72 SCD1U25V3KX

SCD1U25V3KX

12

0R2-0

R452

VCCP_PWRGD 25,42,44

SCD1U25V3KX

678

U11

DDD

AO4422

SSS

GD

SSS

GD

123

4 5

678

5

U10

DDD

S

GD

S

GD

S

IRF7807Z

123

4

MAX8743A_FB2

Rds-on,max = 20m ohm 7A@70 degree C

MAX8743_ON# 44

Iocp=4.3 * 1.7 = 7.3A Rds,on=20*1.375=27.5m ohm Vcs2=Iocp*Rds,on=201mV VILIM2=Vcs2/0.1=2.01V

12

C45

L24

1 2

IND-3D3UH-44-GP

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

12

C46

C337

C337 SC10U25VMX-2-U

SC10U25VMX-2-U

1D05V / 6.8A

G41

12

GAP-CLOSE-PWR

G43

12

R63

R63 510R2F

510R2F

12

R93

R93 10KR2F-U

10KR2F-U

45 47Thursday, July 07, 2005

G43

12

GAP-CLOSE-PWR

G42

12

GAP-CLOSE-PWR

of

1D05V_PWR

12

TC18

SE220U2VDM-7

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

MAX8743 (1D2V_VGA_S0/1D05V)

Leopard2

1D05V_S0

-1

A

B

C

D

E

FOR GMCH Power

G46

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G45

G45

CORE_GMCH_S0 1D05V_S0 VCCP_GMCH_S0 1D05V_S0

4 4

1D2V_VDDR_S0 / 3A

3 3

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G44

G44

1 2

GAP-CLOSE-PWR

1D2V_VDDR_S0

12

TC10

ST220U4VDM-1

U23

4

VOUT

8

NC

7

NC NC5GND

APL5331KAC-TR

12

C187

SC10U10V5ZY-L

VREF

VCNTL

GND

1D5V_S0

12

R160

R160 0R5J-1

0R5J-1

12

C180

5V_S0

DY

SC1U6D3V2KX

1

VIN

3 6

2 9

1D5V_S0

12

C194

SCD1U10V2MX-1

APL533_VREF2

12

C179

C179 SC1U6D3V2KX

SC1U6D3V2KX

12

R159

R159 249R2F

249R2F

1V:R159=470R

1.2V:R159=250R

12

R158

R158 1KR2F

1KR2F

G40

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G38

G38

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR G39

G39

1 2

GAP-CLOSE-PWR

1D8V_S3

12

C196

C196 SCD1U16V3KX

SCD1U16V3KX

12

C195

C195 SCD1U16V3KX

SCD1U16V3KX

12

R182

R182 220R3F

220R3F

12

R177

R177 220R3F

220R3F

Suspend Power

S5PWR_ENABLE25

1 2

2 3 4

U35

GND NC ON/OFF#

AAT4250-U

U25

IN+

VDD VSS IN-3OUT

G1214

DY

1 2

R204

0R3-U

5 4

OUT

5V_S3

IN

5 1

1 2

3D3V_AUX

C222

C222 SCD1U16V

SCD1U16V

12

C249

C249 SCD1U16V

SCD1U16V

DDR_VREF_S3 need 10 mil and must neat NB and DIMM

DDR_VREF_S3

C221

C221 SCD1U16V

SCD1U16V

VREFOUT = 0.9V

FOR DDR2 Power

3D3V_S5

12

0R3-U

R241

12

C248

C248 SCD1U16V

SCD1U16V

R241

3D3V_S53D3V_S3

Run Power

DCBATOUT

2 2

2,26,33,36,42,44,45

1 1

PM_SLP_S3#

1 2

R223

R225

A

10KR2

1 2

R203

R203 100KR2

100KR2

1 2

330KR2

1

G

32

D

1

G

Q14

TP0610K-U

12

RB1

RB1 100R2

100R2

D

QB1

QB1 2N7002

2N7002

S

2 3

D

12

C546

S

G

12

R224

R224 1KR2

1KR2

D

Q13

Q13 2N7002

2N7002

S

2 3

SCD22U50V5KX

PWR_S0_CTL

21

D14

D14 MMGZ5242B

MMGZ5242B

B

5V_S0 5V_S3

U36

3D3V_S0

1

S

2

S

3

S

4 5

GD

AO4422

U76

1

S

2

S

3

S

4 5

GD

AO4422

Q40

Q40 SI3456DV-U1

SI3456DV-U1

S

D

D D

D

8

D

7

D

6

D

0703 -1

6 54

D

2 1

G

3

DY

8 7 6

3D3V_AUX

1D8V_S3VRAM_VDDQ

U22

2

GND

3

12

C237

C237 SCD1U16V

SCD1U16V

DY

4

DY

NC ON/OFF#

AAT4250-U

5V_S33D3V_S3

12

C570

C570 SCD1U16V

SCD1U16V

DY

S5PWR_ENABLE

C

D

OUT

5V_AUX

5V_S5

0703 -1

E

12

0R3-U

5V_S55V_S3

-1

46 47Thursday, July 07, 2005

of

-1

5

IN

1

12

C182

C182 SCD1U16V

SCD1U16V

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

12

C183

C183 SCD1U16V

SCD1U16V

PWRPLANE&RESETLOGIC

R321

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

A

4 4

B

12

EC137

DY

AUD_AGND

12

EC157

SCD1U16V

DY

12

EC132

EC42

SCD1U16V

DY

AUD_AGND AUD_AGND AUD_AGND

12

EC139

DY

C

DCBATOUT

SC

12

EC164

EC165

5V_S0

EC165

SCD1U25V3KX

12

EC147

SCD1U16V

DY

EC162

DY

SCD1U16V

AUD_AGND

EC153

DY

SCD1U16V

12

EC6

12

EC47

SCD1U25V3KX

12

EC134

12

EC92

SCD1U25V3KX

12

EC5

12

EC85

SCD1U25V3KX

12

EC12

12

EC13

12

EC86

12

EC114

SCD1U25V3KX

12

EC90

D

DCBATOUT

12

EC130

SCD1U25V3KX

12

EC64

SCD1U25V3KX

BT+

12

EC11

12

EC102

DCBATOUT

12

EC33

SCD1U25V3KX

12

EC68

SCD1U25V3KX

12

EC112

12

EC88

SCD1U25V3KX

12

EC26

12

EC16

SCD1U25V3KX

12

EC18

SCD1U25V3KX

12

EC113

12

EC32

SC1000P50V

VCCP_GMCH_S0

12

EC51

E

12

EC9

12

EC4

SCD1U25V3KX

12

EC123

12

EC89

SCD1U25V3KX

12

EC107

12

EC7

AD+

SCD1U25V3KX

12

EC31

12

EC10

SCD1U25V3KX

12

EC15

SPR2

SPRING-18-U

1

SPR12

SPRING-4

1

H18

H18 HOLE

HOLE

5V_AUDIO_S0

12 13

SPR8

SPRING-18-U

1

SPR16

SPRING-4

1

H8 HOLEH8HOLE

147

U49D

11

TSAHCT86

SPR6

SPRING-18-U

1

H14

H14 HOLE

HOLE

SPR4

SPRING-18-U

1

SPR14

SPRING-4

1

12

EC108

SCD1U16V

SPR10

SPRING-18-U

1

SPR15

SPRING-4

1

H12

34.40E37.001

SCD1U16V

5V_S0

U78D

147

12 13

3 3

SPR9

SPRING-18-U

SPR11

SPRING-4

2 2

H23

34.40E37.001

11

TSAHCT32

AUD_AGND AUD_AGND

SPR5

SPRING-18-U

1

SPR13

SPRING-4

1

H21

H21 HOLE

HOLE

12

EC87

SCD1U16V

12

EC173

SCD1U16V

SPR1

SPRING-18-U

1

H15

H15 HOLE

HOLE

EC84

EC135

SCD1U16V

1D05V_S0 1D05V_S01D05V_S0 1D05V_S0 1D2V_VGA_S0

12

EC174

SCD1U16V

SPR7

SPRING-18-U

1

K2 GNDPADK2GNDPAD

K5 GNDPADK5GNDPAD

H19

H19 HOLE

HOLE

K1 GNDPADK1GNDPAD

1

K7 GNDPADK7GNDPAD

12

EC93

12

EC175

SCD1U16V

SPR3

SPRING-9

1

K3 GNDPADK3GNDPAD

1

K6 GNDPADK6GNDPAD

H17

H17 HOLE

HOLE

12

EC3

SCD1U16V

12

EC178

SCD1U16V

12

EC8

1

K4 GNDPADK4GNDPAD

H13

H13 HOLE

HOLE

SCD1U16V

SC

3D3V_S0

12

EC21

SCD1U16V

12

EC24

SCD1U16V

12

EC172

SCD1U16V

EC142

EC142 SCD1U16V

SCD1U16V

12

EC62

DY

12

EC74

DY

12

EC91

EC17

SCD1U25V3KX

12

EC49

DY

12

EC59

DY

SCD1U25V3KX

SCD1U16V

12

EC80

DY

SCD1U25V3KX

12

EC124

EC43

SCD1U16V

12

EC67

SCD1U16V

DY

12

EC79

SCD1U16V

DY

12

EC83

SCD1U16V

EC154

EC140

SCD1U16V

DY

12

EC57

EC71

SCD1U16V

DY

12

EC78

EC41

SCD1U16V

DY

SCD1U25V3KX

SCD1U16V

SC

12

SCD1U16V

12

EC40

SCD1U16V

EC176

EC156

EC156 SCD1U16V

SCD1U16V

AUD_AGNDAUD_AGND

SCD1U16V

12

EC150

DY

EC177

SCD1U16V

12

DY

12

EC115

DY

12

EC65

SCD1U16V

DY

EC61

EC61 SCD1U16V

SCD1U16V

5V_S3

SCD1U16V

5V_S3

SCD1U16V

12

EC70

DY

12

EC72

DY

SCD1U16V

12

EC143

DY

3D3V_S0

12

EC52

DY

5V_S3

SCD1U16V

12

EC36

12

EC63

DY

SCD1U25V3KX

12

EC48

SCD1U16V

12

EC82

SCD1U16V

DY

12

EC56

EC56 SCD1U16V

SCD1U16V

12

EC45

SCD1U16V

DY

SCD1U16V

12

EC35

SCD1U16V

12

EC133

SCD1U16V

DY

EC55

EC55 SCD1U16V

SCD1U16V

5V_S3

12

EC34

12

EC44

DY

12

DY

SCD1U25V3KX

12

EC38

SCD1U16V

12

EC145

SCD1U16V

DY

12

SCD1U16V

DY

12

EC122

SCD1U16V

3D3V_S03D3V_S0

12

EC146

SCD1U16V

DY

EC53

EC53 SCD1U16V

SCD1U16V

1D8V_S3

12

EC127

EC126

EC126 SCD1U16V

SCD1U16V

12

EC25

EC76

SCD1U16V

DY

SCD1U16V

DY

SCD1U16V

3D3V_LAN_S5

12

EC39

3D3V_S0

12

EC148

SCD1U16V

DY

SCD1U16V

12

EC22

SCD1U16V

SCD1U25V3KX

CORE_GMCH_S0

12

EC121

EC120

SCD1U16V

12

EC163

SCD1U16V

C

SCD1U16V

12

EC151

12

EC125

SCD1U16V

12

EC50

5V_S0 5V_S0 5V_S0

EC73

EC73 SCD1U16V

SCD1U16V

12

EC128

SCD1U16V

12

EC58

EC58 SCD1U16V

SCD1U16V

DY

SCD1U16V

12

EC141

1D5V_S0

SCD1U16V

D

12

EC66

EC66 SCD1U16V

SCD1U16V

DY

12

EC136

SCD1U16V

EC144

EC144 SCD1U16V

SCD1U16V

A3

12

DY

12

DY

Title

Size Document Number Rev

Date: Sheet

12

EC149

12

DY

12

EC152

SCD1U16V

12

EC69

EC69 SCD1U16V

SCD1U16V

DY

12

EC60

SCD1U16V

12

EC46

EC46 SCD1U16V

SCD1U16V

DY

MISC & EMI

12

EC54

EC77

EC77 SCD1U16V

SCD1U16V

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Leopard2

EC54

DY

47 47Thursday, July 07, 2005

E

12

EC75

EC81

SCD1U16V

DY

of

DY

-1

1

H5 HOLEH5HOLE

1

1 1

H1 HOLEH1HOLE

1

H16

H16 HOLE

HOLE

1

H9

34.40E37.001

1

A

H10

H10 HOLE

HOLE

H2 HOLEH2HOLE

1

H11

H11 HOLE

HOLE

H3 HOLEH3HOLE

1

H4 HOLEH4HOLE

H26

H26 HOLE

HOLE

1

H20

H20 HOLE

HOLE

H25

H25 HOLE

HOLE

1

H24

H24 HOLE

HOLE

1

H22

34.40E37.001

1

B

H6 HOLEH6HOLE

H7 HOLEH7HOLE

1

H27

H27 HOLE

HOLE

1

12

EC138

1

12

EC129

SCD1U16V

EC23

EC37

SCD1U16V

Wistron Leopard2 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual