Wistron LA14, B450 Schematic

Page 1
5
4
LA14 Block Diagram
3
2
1
Project code: 91.4BW01.001 PCB P/N : 48.4BW01.01M REVISION : SA
D D
CLK GEN.
ICS 9LPRS365BKLFT (71.09365.A03) SILEGO SLG8SP513VTR(71.08513.003)
3
DDR2 DIMM1
667/800 MHz
16
667/800MHz
DDR2 DIMM2
667/800 MHz
17
C C
Codec
CX20561
MIC In
28
28
B B
INT.SPKR
28
Line Out (NO SPDIF)
A A
OP AMP
G1454
HDD SATA
ODD SATA
5
667/800MHz
AZALIA
26
27
SATA
20
SATA
21
Mobile CPU
Penryn 479
4, 5
HOST BUS 667/800/1067MHz@1.05V
THERMAL EMC2102
Cantiga
AGTL+ CPU I/F DDR Memory I/F
INTEGRATED GRAHPICS
LVDS, CRT I/F
6,7,8,9,10,11
X4 DMI 400MHz
C-Link0
ICH9M
6 PCIe ports
PCI/PCI BRIDGE
ACPI 2.0 4 SATA
12 USB 2.0/1.1 ports
ETHERNET (10/100/1000MbE)
High Definition Audio
LPC I/F
Serial Peripheral I/F
Matrix Storage Technology(DO)
Active Managemnet Technology(DO)
12,13,14,15
Camera (USB)
USB 4 Port
4
18
23
PCIex1
PCIex1
LPC BUS
USB
USB
32
LAN
Atheros
AR8114 AR8132
Mini Card
Kedron
a/b/g/n
KBC
KBC773L
Touch Pad
CardReader Realtek RTS5159
INT. KB
35 33
3
CRT
19
LCD
18
TXFM RJ45
24
31
BIOS
Winbond W25X16
33
30
16M Bits
MS/MS Pro/xD /MMC/SD
5 in 1
25 25
LPC
DEBUG
34
CONN.
30
Power Board
TOP
VCC
S
S
GND
BOTTOM
34
36
2
PCB STACKUP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet
Date: Sheet of
Date: Sheet of
SYSTEM DC/DC
TPS51125
INPUTS
DCBATOUT
SYSTEM DC/DC
TPS51124
INPUTS OUTPUTS
DCBATOUT
RT9026
1D8V_S3
RT9018A
1D8V_S3 1D5V_S0
CPU DC/DC
ISL6266A
INPUTS
DCBATOUT
CHARGER
BQ24745
DCBATOUT
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
LA14
LA14
LA14
152Thursday, May 07, 2009
152Thursday, May 07, 2009
152Thursday, May 07, 2009
1
42
OUTPUTS
5V_S5 3D3V_S5
44
1D05V_S0 1D8V_S3
DDR_VREF_S0
DDR_VREF_S3
OUTPUTS VCC_CORE_S0
0.35~1.5V
OUTPUTSINPUTS BT+
DCBATOUT
of
43
43
41
46
SB
SB
SB
Page 2
A
ICH9M Functional Strap Definitions
Signal
HDA_SDOUT
HDA_SYNC
4 4
GNT2#/ GPIO53
GPIO20 GNT1#/
GPIO51
GNT3#/ GPIO55
GNT0#: SPI_CS1#/ GPIO58
SPI_MOSI
3 3
GPIO49
SATALED#
SPKR
TP3
GPIO33/ HDA_DOCK _EN#
Usage/When Sampled
XOR Chain Entrance/ PCIE Port Config1 bit1, Rising Edge of PWROK
PCIE config1 bit0, Rising Edge of PWROK.
PCIE config2 bit2, Rising Edge of PWROK.
Reserved ESI Strap (Server Only)
Rising Edge of PWROK
Top-Block Swap Override. Rising Edge of PWROK.
Boot BIOS Destination Selection 0:1. Rising Edge of PWROK.
Integrated TPM Enable, Rising Edge of CLPWROK
DMI Termination Voltage, Rising Edge of PWROK.
PCI Express Lane Reversal. Rising Edge of PWROK.
No Reboot. Rising Edge of PWROK.
XOR Chain Entrance. Rising Edge of PWROK.
Flash Descriptor Security Override Strap Rising Edge of PWROK
Allows entrance to XOR Chain testing when TP3 pulled low.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers: offset 224h). This signal has weak internal pull-down
This signal has a weak internal pull-down. Sets bit0 of RPC.PC(Config Registers:Offset 224h)
This signal has a weak internal pull-up. Sets bit2 of RPC.PC2(Config Registers:Offset 0224h) This signal should not be pulled high.
ESI compatible mode is for server platforms only. This signal should not be pulled low for desttop and mobile.
Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.
Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.
Sample low: the Integrated TPM will be disabled. Sample high: the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enable.
The signal is required to be low for desktop applications and required to be high for mobile applications.
Signal has weak internal pull-up. Sets bit 27 of MPC.LR(Device 28:Function 0:Offset D8)
If sampled high, the system is strapped to the "No Reboot" mode(ICH9 will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.
This signal should not be pull low unless using XOR Chain testing.
Sampled low:the Flash Descriptor Security will be overridden. If high,the security measures will be in effect.This should only be enabled in manufacturing environments using an external pull-up resister.
ICH9 EDS 642879 Rev.1.5
Comment
2 2
B
ICH9M Integrated Pull-up
page 92
and Pull-down Resistors
SIGNAL Resistor Type/Value
CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 ENERGY_DETECT HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GLAN_DOCK#
GNT[3:0]#/GPIO[55,53,51]
GPIO[20] GPIO[49] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED#
SPI_CS1#/GPIO58/CLGPIO6
SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]
C
Cantiga chipset and ICH9M I/O controller Hub strapping configuration
ICH9 EDS 642879 Rev.1.5
PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K
The pull-up or pull-down active when configured for native GLAN_DOCK# functionality and determined by LAN controller
PULL-DOWN 20K
PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K
SDVO_CTRLDATA
D
Montevina Platform Design guide 22339 0.5
Pin Name
CFG[2:0]
CFG[4:3] CFG8 CFG[15:14] CFG[18:17]
CFG5 CFG6
CFG7
CFG9
CFG10 PCIE Loopback enable
CFG[13:12]
CFG16
CFG19
CFG20
L_DDC_DATA
NOTE:
1. All strap signals are sampled with respect to the leading edge of the (G)MCH Power OK (PWROK) signal.
2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6. Only one of the CFG10/CFG/12/CFG13 straps can be enabled at any time.
Strap Description
FSB Frequency Select
Reserved
DMI x2 Select iTPM Host
Interface
Intel Management engine Crypto strap
PCIE Graphics Lane
XOR/ALL
FSB Dynamic ODT
DMI Lane Reversal
Digital Display Port (SDVO/DP/iHDMI) Concurrent with PCIe
SDVO Present
Local Flat Panel (LFP) Present
1=The iTPM Host Interface is disalbed(default)
1 = Reverse Lanes DMI x4 mode[MCH -> ICH]:(3->0,2->1,1->2and0->3) DMI x2 mode[MCH -> ICH]:(3->0,2->1)
Configuration
000 = FSB1067 011 = FSB667 010 = FSB800 others = Reserved
0 = DMI x2
1 = DMI x4
0= The iTPM Host Interface is enabled(Note2)
0 = Transport Layer Security (TLS) cipher suite with no confidentiality
1 = TLS cipher suite with confidentiality (default)
0 = Reverse Lanes,15->0,14->1 ect..
1= Normal operation(Default):Lane Numbered in order
0 = Enable (Note 3)
1= Disabled (default)
00 = Reserve 10 = XOR mode Enabled 01 = ALLZ mode Enabled (Note 3)
11 = Disabled (default)
0 = Dynamic ODT Disabled
1 = Dynamic ODT Enabled 0 = Normal operation(Default):
Lane Numbered in Order
0 = Only Digital Display Port or PCIE is operational (Default)
1 =Digital display Port and PCIe are operting simulataneously via the PEG port
0 =No SDVO Card Present (Default)
1 = SDVO Card Present
0 = LFP Disabled (Default)
1= LFP Card Present; PCIE disabled
E
page 218
(Default)
(Default)
SMBus
EMC2102
Thermal
USB Table
USB
PCIE Routing
LANE1 LANE2 LANE3 LANE4 LANE5 LANE6
1 1
LAN Atheros AR8114A MiniCard WLAN
NC NC NC NC
Pair
Device
0
USB1
1
NC
2
NC
3
MINIC1
4
WEBCAM
5
NC
6
NC
7
Bluetooth
8
NC
9
USB2(High speed)
1011NC
CardReader
KBC
ICH9M
BAT_SCL
SMBC_ICH
BATTERY
9LPRS365BKLFT
DDR
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet
Date: Sheet
Date: Sheet
Reference
Reference
Reference
LA14
LA14
LA14
of
of
of
252Thursday, May 07, 2009
252Thursday, May 07, 2009
252Thursday, May 07, 2009
SB
SB
SB
Page 3
A
3D3V_S0
R95
R95
1 2
0R2J-2-GP
0R2J-2-GP
4 4
PCIE_REQ_MINI#31
DY
DY
PCIE_REQ_LAN#24
SATACLKREQ#13 CLK_MCH_OE#7
CL=20pF±0.2pF
C229
C229
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1 2
12
GEN_XTAL_OUT_R
1 2
C230
C230
SC33P50V2JN-3GP
3 3
2 2
SC33P50V2JN-3GP
CPU_SEL24,7
12
12
C221
C221
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SB SB SB
GEN_XTAL_IN
X4
X4 X-14D31818M-35GP
X-14D31818M-35GP
82.30005.891
82.30005.891
3D3V_S0
678
RN28
RN28
SRN10KJ-6-GP
SRN10KJ-6-GP
123
4 5
C227
C227
SC1U16V3ZY-GP
SC1U16V3ZY-GP
SRN10KJ-6-GP
SRN10KJ-6-GP
RN62
RN62
8 7 6
SRN470J-3-GP
SRN470J-3-GP
PCIE_REQ_LAN#_R PCLKCLK0
PCIE_REQ_MINI#_R
PCLKCLK1
1 2 3 4 5
1120 add RN61 and RN62 1120 modify RN61 and RN62 1126 modify RN61 and RN62
PCLKCLK2 CPU_SEL2_R
PCLKCLK4 PCLKCLK5
3D3V_S0
123
45
RN61
RN61
678
SB
1127 swap the nets of RN61 and RN62
1
1224 modify R91
R91
R91
1 2
0R0402-PAD
0R0402-PAD
CLK48_515930 CLK48_ICH13
CPU_SEL04,7
3D3V_S0
R89 10KR2J-3-GP
R89 10KR2J-3-GP
CLK_ICH1413
PCLK_KBC33 PCLK_ICH13
CPU_SEL14,7
PCLK_FWH34
1014 add ER5 for EMI deamnd
ICS9LPRS365BKLFT setting table
PIN NAME DESCRIPTION
Byte 5, bit 7 0 = PCI0 enabled (default)
PCI0/CR#_A
PCI1/CR#_B
PCI2/TME PCI3
1 1
PCI4/27M_SEL PCI_F5/ITP_EN
SRCT3/CR#_C
1= CR#_A enabled. Byte 5, bit 6 controls whether CR#_A controls SRC0 or SRC2 pair Byte 5, bit 6 0 = CR#_A controls SRC0 pair (default), 1= CR#_A controls SRC2 pair
Byte 5, bit 5 0 = PCI1 enabled (default) 1= CR#_B enabled. Byte 5, bit 6 controls whether CR#_B controls SRC1 or SRC4 pair Byte 5, bit 4 0 = CR#_B controls SRC1 pair (default) 1= CR#_B controls SRC4 pair
0 = Overclocking of CPU and SRC Allowed 1 = Overclocking of CPU and SRC NOT allowed
3.3V PCI clock output
0 = Pin24 as SRC-1, Pin25 as SRC-1#, Pin20 as DOT96, Pin21 as DOT96# 1 = Pin24 as 27MHz, Pin25 as 27MHz_SS, Pin20 as SRC-0, Pin21 as SRC-0#
0 =SRC8/SRC8# 1 = ITP/ITP#
Byte 5, bit 3 0 = SRC3 enabled (default) 1= CR#_C enabled. Byte 5, bit 2 controls whether CR#_C controls SRC0 or SRC2 pair Byte 5, bit 2 0 = CR#_C controls SRC0 pair (default), 1= CR#_C controls SRC2 pair
A
B
12
C165
C165
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
GEN_XTAL_OUT
1 2 3
R88 2K2R2J-2-GPR88 2K2R2J-2-GP
PM_STPCPU#13
12
DY
DY
1 2 3 4 5
SRN33J-7-GP
SRN33J-7-GP
ER5 33R2J-2-GP
ER5 33R2J-2-GP
B
SB
1124 add R302
3D3V_CLKPLL_S0
12
12
C149
C149
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
RN20
RN20
SRN22-3-GP
SRN22-3-GP
PM_STPPCI#13
SMBC_ICH15,16,17 SMBD_ICH15,16,17
CLK_PWRGD13
RN23
RN23
DY
DY
C176
C176
4
12
CPU_SEL2_R
8 7
PCLKCLK4
6
PCLKCLK5
PCLKCLK3
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1D05V_S0
12
C156
C156
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
PCLKCLK0 PCLKCLK1 PCLKCLK2
PCLKCLK3
CPU_SEL2_R
2nd = 71.08513.003
2nd = 71.08513.003
R302
R302
1 2
0R2J-2-GP
0R2J-2-GP
12
1
1231modify R80
12
C173
C173
C196
C196
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
3D3V_48MPWR_S0
U14
U14
3 2
CLK48
17
45 44
7 6
63
8 10 11 12 13 14
64
5 55
ICS9LPRS365BKLFT-GP-U
ICS9LPRS365BKLFT-GP-U
71.09365.A03
71.09365.A03
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
X1 X2
USB_48MHZ/FSLA
PCI_STOP# CPU_STOP#
SCLK SDATA
CK_PWRGD/PD#
PCI0/CR#_A PCI1/CR#_B PCI2/TME PCI3 PCI4/27_SELECT PCI_F5/ITP_EN
FSLB/TEST_MODE REF0/FSLC/TEST_SEL
NC#55
C
DY
DY
R80
R80
1 2
0R2J-2-GP
0R2J-2-GP
3D3V_CLKGEN_S0
4
16
VDD48
VDDREF
GNDPCI
GND48
15
18
46
9
VDDPCI
VDDSRC
GNDREF
1
PIN NAME DESCRIPTION
Byte 5, bit 1 0 = SRC3 enabled (default)
SRCC3/CR#_D
SRCC7/CR#_E
SRCT7/CR#_F
SRCC11/CR#_G
SRCT11/CR#_H
1= CR#_D enabled. Byte 5, bit 0 controls whether CR#_D controls SRC1 or SRC4 pair Byte 5, bit 0 0 = CR#_D controls SRC1 pair (default) 1= CR#_D controls SRC4 pair
Byte 6, bit 7 0 = SRC7# enabled (default) 1= CR#_F controls SRC6
Byte 6, bit 6 0 = SRC7 enabled (default) 1= CR#_F controls SRC8
Byte 6, bit 5 0 = SRC11# enabled (default) 1= CR#_G controls SRC9
Byte 6, bit 4 0 = SRC11 enabled (default) 1= CR#_H controls SRC10
C
3D3V_S0
1015 modify component size of R80
12
C204
12
C152
C152
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
3D3V_CLKPLL_S0
33
43
52
62
23
VDDCPU
VDDPLL3
GND
GNDSRC
GNDSRC
22
30
36
49
56
19
27
VDD96_IO
VDDSRC_IO
VDDSRC_IO
VDDSRC_IO
VDDPLL3_IO
27MHZ_NONSS/SRCT1/SE1
GND
GNDSRC
GNDCPU
26
59
65
VDDCPU_IO
27MHZ_SS/SRCC1/SE2
GND
C204
DY
DY
CPUT0 CPUC0
CPUT1_F CPUC1_F
CPUT2_ITP/SRCT8
CPUC2_ITP/SRCC8
SRCT7/CR#_F
SRCC7/CR#_E
SRCT6 SRCC6
SRCT10 SRCC10
SRCT11/CR#_H
SRCC11/CR#_G
SRCT9 SRCC9
SRCT4 SRCC4
SRCT3/CR#_C
SRCC3/CR#_D
SRCT2/SATAT
SRCC2/SATAC
SRCT0/DOTT_96
SRCC0/DOTC_96
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
61 60
58 57
54 53
51 50
48 47
41 42
40 39
37 38
34 35
31 32
28 29
24 25
20 21
D
12
C179
C179
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC5P50V2CN-2GP
SC5P50V2CN-2GP
12
PCIE_REQ_LAN#_R
PCIE_REQ_MINI#_R
D
1015 modify component size of R871015 modify component size of R95
12
C226
C226
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
0915 add EC34 for EMI demand
12
SC5P50V2CN-2GP
SC5P50V2CN-2GP
EC62
EC31
EC31
DY
DY
EC62
DY
DY
CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4
CLK_MCH_BCLK 6 CLK_MCH_BCLK# 6
CLK_PCIE_LAN 24 CLK_PCIE_LAN# 24
SB
CLK_PCIE_ICH 13 CLK_PCIE_ICH# 13
SB
SB
CLK_PCIE_MINI1 31 CLK_PCIE_MINI1# 31
CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7
SB
CLK_PCIE_SATA 12 CLK_PCIE_SATA# 12
DREFSSCLK 7 DREFSSCLK# 7
DREFCLK 7 DREFCLK# 7
SEL2 FSC
1 0 01 0 00 0
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
E
3D3V_S0
3D3V_CLKGEN_S03D3V_48MPWR_S0
C224
C224
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C155
C155
R87
R87
1 2
0R0402-PAD
0R0402-PAD
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C205
C205
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1
1222 modify R87
CLK48_ICHPCLK_ICHPCLK_KBCCLK_ICH14
12
SC5P50V2CN-2GP
SC5P50V2CN-2GP
EC66
EC66
DY
DY
SC5P50V2CN-2GP
SC5P50V2CN-2GP
CLK48_5159
SC5P50V2CN-2GP
12
EC33
EC33
DY
DY
SC5P50V2CN-2GP
PCLK_FWH
SC22P50V2JN-4GP
SC22P50V2JN-4GP
12
12
CPU
DY
NB
DY
LAN
1126 add the net(PCIE_REQ_LAN#)
SB DMI
1120 swap these nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#, CLK_PCIE_MINI1,CLK_PCIE_MINI1#)
1126 add the net(PCIE_REQ_MINI#)
MINI1 NB CLK
1120 move these nets (CLK_PCIE_MINI1,CLK_PCIE_MINI1#)
SB SATA
NB CLK NB CLK
(96 MHz)
SEL1 FSB
SEL0 FSA
01 01
1 01
CPU
100M 133M 166M 200M
FSB
533M 667M 800M
1066M266M
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Clock Generator
Clock Generator
Clock Generator
LA14
LA14
LA14
352Thursday, May 07, 2009
352Thursday, May 07, 2009
352Thursday, May 07, 2009
E
EC34
EC34
DY
DY
EC25
EC25
X
SB
SB
SB
Page 4
A
B
C
D
E
H_A#[35..3]6
4 4
H_ADSTB#06 H_REQ#[4..0]6
3 3
Side Band Non GTL
H_ADSTB#16
H_A20M#12
H_FERR#12
H_IGNNE#12
H_STPCLK#12
H_INTR12 H_NMI12 H_SMI#12
2 2
TP20TPAD14-GP TP20TPAD14-GP
XDP_TMS XDP_TDI XDP_BPM#5
H_CPURST#
XDP_TCK
1 1
XDP_TRST#
H_A#[35..3]
U33A
U33A
H_A#3
J4 L5 L4
K5 M3 N2
J1
N3
P5
P2
L2
P4
P1 R1 M1
K3 H2
K2
J3
L1
Y2 U5 R3
W6
U4
Y5 U1 R4
T5
T3
W2 W5
Y4 U2
V4
W3 AA4 AB2 AA3
V1 A6
A5
C4 D5
C6
B4 A3
M4 N5
T2 V3
B2 C3 D2
D22
D3
F6
B1
1 2 1 2 1 2
1 2
DY
DY
1 2 1 2
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# ADSTB0#
REQ0# REQ1# REQ2# REQ3# REQ4#
A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31# A32# A33# A34# A35# ADSTB1#
A20M# FERR# IGNNE#
STPCLK# LINT0 LINT1 SMI#
RSVD#M4 RSVD#N5 RSVD#T2 RSVD#V3 RSVD#B2 RSVD#C3 RSVD#D2 RSVD#D22 RSVD#D3 RSVD#F6
KEY_NC
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
62.10079.001
62.10079.001
2nd = 62.10053.401
2nd = 62.10053.401
H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
1
R50 54D9R2F-L1-GPR50 54D9R2F-L1-GP R48 54D9R2F-L1-GPR48 54D9R2F-L1-GP R43 54D9R2F-L1-GPR43 54D9R2F-L1-GP
R213 51R2F-2-GP
R213 51R2F-2-GP
R41 54D9R2F-L1-GPR41 54D9R2F-L1-GP R42 54D9R2F-L1-GPR42 54D9R2F-L1-GP
All place within 2" to CPU
A
1 OF 4
1 OF 4
ADDR GROUP 0
ADDR GROUP 0
ADDR GROUP 1
ADDR GROUP 1
ICH
ICH
RESERVED
RESERVED
1D05V_S0
DEFER#
DRDY# DBSY#
IERR#
LOCK#
RESET#
TRDY#
HITM#
BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#
TRST#
XDP/ITP SIGNALS CONTROL
XDP/ITP SIGNALS CONTROL THERMAL
THERMAL
PROCHOT#
THRMDA THRMDC
THERMTRIP#
HCLK
HCLK
BCLK0 BCLK1
ADS# BNR# BPRI#
BR0#
INIT#
RS0# RS1# RS2#
HIT#
TCK
TDI TDO TMS
DBR#
H1 E2 G5
H5 F21 E1
F1 D20
B3 H4 C1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3 G2
G6 E4
AD4 AD3 AD1 AC4 AC2
XDP_BPM#5
AC1
XDP_TCK
AC5
XDP_TDI
AA6
XDP_TDO
AB3
XDP_TMS
AB5
XDP_TRST#
AB6
XDP_DBRESET#
C20
CPU_PROCHOT#
D21 A24 B25
C7
A22 A21
1
H_IERR#
PM_THRMTRIP# should connect to ICH9 and MCH without T-ing
( No stub)
B
TP11 TPAD14-GPTP11 TPAD14-GP
H_ADS# 6 H_BNR# 6
H_BPRI# 6
H_DEFER# 6 H_DRDY# 6 H_DBSY# 6
H_BREQ#0 6
H_INIT# 12 H_LOCK# 6
H_CPURST# 6,48
H_TRDY# 6 H_HIT# 6
H_HITM# 6
H_THERMDA 32 H_THERMDC 32
PM_THRMTRIP-A# 7,12,39
CLK_CPU_BCLK 3 CLK_CPU_BCLK# 3
1D05V_S0
12
R64
R64 56R2J-4-GP
56R2J-4-GP
H_RS#[2..0] 6
1D05V_S0
Layout Note: "CPU_GTLREF0"
0.5" max length.
12
R63
R63 68R2-GP
68R2-GP
DY
DY
1 2
R62
R62
0R2J-2-GP
0R2J-2-GP
Place testpoint on H_IERR# with a GND
0.1" away
Follow Demo Circuit
1 2
DY
DY
R65 1KR2J-1-GP
R65 1KR2J-1-GP
1 2
DY
DY
R215 1KR2J-1-GP
R215 1KR2J-1-GP
C343 SCD1U10V2KX-4GP
C343 SCD1U10V2KX-4GP
DY
DY
XDP_DBRESET#
XDP_TDO
R60 1KR2J-1-GP
R60 1KR2J-1-GP
R47 54D9R2F-L1-GP
R47 54D9R2F-L1-GP
H_THERMDA
H_THERMDC
R179
R179
1KR2F-3-GP
1KR2F-3-GP
R181
R181
2KR2F-3-GP
2KR2F-3-GP
TEST1
TEST2
TEST4
12
1 2
DY
DY
1 2
DY
DY
12
C438
C438
DY
DY
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
CPU_PROCHOT#_R 41
1D05V_S0
1 2 12
12
DY
DY
3D3V_S0
1D05V_S0
C
H_D#0
E22
H_D#1
F24
H_D#2
E26
H_D#3
G22
H_D#4
F23
H_D#5
G25
H_D#6
E25
H_D#7
E23
H_D#8
K24
H_D#9
G24
H_D#10
J24
H_D#11
J23
H_D#12
H22
H_D#13
F26
H_D#14
K22
H_D#15
H23
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
J26 H26 H25
N22 K25 P26 R23
L23 M24
L22 M23 P25 P23 P22 T24 R24
L25 T25 N25
L26 M26 N24
AD26
C23 D25 C24
AF26
AF1 A26
B22 B23 C21
2nd = 62.10053.401
2nd = 62.10053.401
H_DSTBN#06 H_DSTBP#06 H_DINV#06
H_DSTBN#16 H_DSTBP#16 H_DINV#16
CPU_GTLREF0
C352
C352
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
CPU_SEL03,7 CPU_SEL13,7 CPU_SEL23,7
Net "TEST4" as short as possible, make sure "TEST4" routing is reference to GND and away other noisy signals
TEST1 TEST2 RSVD_CPU_12
1
TEST4
TP18TPAD14-GP TP18TPAD14-GP
RSVD_CPU_13
1
RSVD_CPU_14RSVD_CPU_11
TP44TPAD14-GP TP44TPAD14-GP
1
TP60TPAD14-GP TP60TPAD14-GP
2 OF 4
2 OF 4
U33B
U33B
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0#
D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#
GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6
BSEL0 BSEL1 BSEL2
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
62.10079.001
62.10079.001
MISC
MISC
D
DATA GRP0 DATA GRP1
DATA GRP0 DATA GRP1
DATA GRP2DATA GRP3
DATA GRP2DATA GRP3
DSTBN2# DSTBP2#
DINV2#
DSTBN3# DSTBP3#
DINV3# COMP0
COMP1 COMP2 COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
H_DINV#[3..0] H_DSTBN#[3..0] H_DSTBP#[3..0] H_D#[63..0]
H_D#32
Y22
D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47#
D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
SLP#
PSI#
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22
AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20
R26 U26 AA1 Y1
E5 B5 D24 D6 D7 AE6
H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47
H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
COMP0 COMP1 COMP2 COMP3
H_DINV#[3..0] 6 H_DSTBN#[3..0] 6 H_DSTBP#[3..0] 6 H_D#[63..0] 6
H_DSTBN#2 6 H_DSTBP#2 6 H_DINV#2 6
H_DSTBN#3 6 H_DSTBP#3 6 H_DINV#3 6
R53 27D4R2F-L1-GPR53 27D4R2F-L1-GP
1 2
R51 54D9R2F-L1-GPR51 54D9R2F-L1-GP
1 2
R45 27D4R2F-L1-GPR45 27D4R2F-L1-GP
1 2
R44 54D9R2F-L1-GPR44 54D9R2F-L1-GP
1 2
H_DPRSTP# 7,12,41 H_DPSLP# 12 H_DPWR# 6 H_PWRGD 12,39,48 H_CPUSLP# 6 PSI# 41
Layout Note: Comp0, 2 connect with Zo=27.4 ohm, make trace length shorter than 0.5" . Comp1, 3 connect with Zo=55 ohm, make trace length shorter than 0.5" .
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU (1 of 2)
CPU (1 of 2)
CPU (1 of 2)
LA14
LA14
LA14
452Thursday, May 07, 2009
452Thursday, May 07, 2009
452Thursday, May 07, 2009
E
SB
SB
SB
Page 5
A
VCC_CORE
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
VCC_CORE
H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6
12
C84
C84
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC_CORE
DY
DY
VCC_CORE
CAP
CAP
12
DY
DY
H_VID[6..0] 41
12
R38
R38 100R2F-L1-GP-U
100R2F-L1-GP-U
12
R39
R39 100R2F-L1-GP-U
100R2F-L1-GP-U
VCC_CORE
4 4
3 3
AA10 AA12
2 2
1 1
AA13 AA15 AA17 AA18 AA20
AC10 AB10 AB12 AB14 AB15 AB17 AB18
3 OF 4
3 OF 4
U33C
U33C
A7
VCC
A9
VCC
A10
VCC
A12
VCC
A13
VCC
A15
VCC
A17
VCC
A18
VCC
A20
VCC
B7
VCC
B9
VCC
B10
VCC
B12
VCC
B14
VCC
B15
VCC
B17
VCC
B18
VCC
B20
VCC
C9
VCC
C10
VCC
C12
VCC
C13
VCC
C15
VCC
C17
VCC
C18
VCC
D9
VCC
D10
VCC
D12
VCC
D14
VCC
D15
VCC
D17
VCC
D18
VCC
E7
VCC
E9
VCC
E10
VCC
E12
VCC
E13
VCC
E15
VCC
E17
VCC
E18
VCC
E20
VCC
F7
VCC
F9
VCC
F10
VCC
F12
VCC
F14
VCC
F15
VCC
F17
VCC
F18
VCC
F20
VCC
AA7
VCC
AA9
VCC VCC VCC VCC VCC VCC VCC VCC
AB9
VCC VCC VCC VCC VCC VCC VCC VCC
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
62.10079.001
62.10079.001
2nd = 62.10053.401
2nd = 62.10053.401
VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC
VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP
VCCA VCCA
VID0 VID1 VID2 VID3 VID4 VID5 VID6
VCCSENSE
VSSSENSE
C68
C68
12
12
B
12
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
CAP
CAP
12
12
C420
C420
12
C91
C91
C53
C53
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C90
C90
C61
C61
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
CAP
CAP
12
C429
C429
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
VCC_SENSE 41
VSS_SENSE 41
C97
C97
C54
C54
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C92
C92
C70
C70
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
CAP
CAP
1D05V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
layout note: "1D5V_VCCA_S0" as short as possible
1D5V_VCCA_S0
DY
DY
Layout Note:
VCCSENSE and VSSSENSE lines should be of equal length.
Layout Note: Provide a test point (with no stub) to connect a differential probe between VCCSENSE and VSSSENSE at the location where the two 54.9ohm resistors terminate the 55 ohm transmission line.
VCC_CORE
12
C59
C59
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
12
C383
C383
C382
C382
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
CAP
CAP
CAP
CAP
L10
L10
1 2
PBY160808T-121Y-GP
PBY160808T-121Y-GP
68.00206.021
68.00206.021
2nd = 68.00230.041
2nd = 68.00230.041
C
One phase-->
12
TC6
TC6
ST900U2D5VM-1-GP
ST900U2D5VM-1-GP
3 4
12
C71
C71
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
C82
C82
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ADD TC6 are
77.E9071.011
12
C79
C79
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
12
C83
C83
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
C63
C63
12
C65
C65
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC_CORE
12
12
C93
C93
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C384
C384
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
1D5V_S0
12
C96
C96
C52
C52
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
DY
DY
12
12
C381
C381
DY
DY
12
C48
C48
C62
C62
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
DY
DY
1D05V_S0
12
C78
C78
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
12
C80
C80
C49
C49
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
DY
DY
12
12
C69
C69
C81
C81
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
D
4 OF 4
4 OF 4
U33D
U33D
A4
VSS
A8
VSS
A11
VSS
A14
VSS
A16
VSS
A19
VSS
A23
VSS
1
TP46TPAD14-GP TP46TPAD14-GP
12
12
C66
C66
C446
C446
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
AF2
VSS
B6
VSS
B8
VSS
B11
VSS
B13
VSS
B16
VSS
B19
VSS
B21
VSS
B24
VSS
C5
VSS
C8
VSS
C11
VSS
C14
VSS
C16
VSS
C19
VSS
C2
VSS
C22
VSS
C25
VSS
D1
VSS
D4
VSS
D8
VSS
D11
VSS
D13
VSS
D16
VSS
D19
VSS
D23
VSS
D26
VSS
E3
VSS
E6
VSS
E8
VSS
E11
VSS
E14
VSS
E16
VSS
E19
VSS
E21
VSS
E24
VSS
F5
VSS
F8
VSS
F11
VSS
F13
VSS
F16
VSS
F19
VSS
F2
VSS
F22
VSS
F25
VSS
G4
VSS
G1
VSS
G23
VSS
G26
VSS
H3
VSS
H6
VSS
H21
VSS
H24
VSS
J2
VSS
J5
VSS
J22
VSS
J25
VSS
K1
VSS
K4
VSS
K23
VSS
K26
VSS
L3
VSS
L6
VSS
L21
VSS
L24
VSS
M2
VSS
M5
VSS
M22
VSS
M25
VSS
N1
VSS
N4
VSS
N23
VSS
N26
VSS
P3
VSS
BGA479-SKT6-GPU7
BGA479-SKT6-GPU7
62.10079.001
62.10079.001
2nd = 62.10053.401
2nd = 62.10053.401
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25
E
1
1 1
1 1
TP45TPAD14-GP TP45TPAD14-GP
TP48TPAD14-GP TP48TPAD14-GP TP21TPAD14-GP TP21TPAD14-GP
TP61TPAD14-GP TP61TPAD14-GP TP43TPAD14-GP TP43TPAD14-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
A
B
C
D
Date: Sheet of
CPU (2 of 2)
CPU (2 of 2)
CPU (2 of 2)
LA14
LA14
LA14
SB
SB
552Thursday, May 07, 2009
552Thursday, May 07, 2009
552Thursday, May 07, 2009
E
SB
Page 6
5
H_SWING
1D05V_S0
12
R239
R239 221R2F-2-GP
221R2F-2-GP
12
R238
R238 100R2F-L1-GP-U
100R2F-L1-GP-U
H_RCOMP
D D
H_SWING routing Trace width and Spacing use 10 / 20 mil
H_SWING Resistors and Capacitors close MCH 500 mil ( MAX )
12
C478
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C C
H_RCOMP routing Trace width and Spacing use 10 / 20 mil
C478
1 2
R226
R226
24D9R2F-L-GP
24D9R2F-L-GP
Place them near to the chip ( < 0.5")
B B
H_D#[63..0]4
1D05V_S0
1 2
12
4
R241
R241 1KR2F-3-GP
1KR2F-3-GP
H_AVREF
R240
R240 2KR2F-3-GP
2KR2F-3-GP
H_D#[63..0]
H_CPURST#4,48 H_CPUSLP#4
12
C479
C479 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWING H_RCOMP
U35A
U35A
F2
H_D#_0
G8
H_D#_1
F8
H_D#_2
E6
H_D#_3
G2
H_D#_4
H6
H_D#_5
H2
H_D#_6
F6
H_D#_7
D4
H_D#_8
H3
H_D#_9
M9
H_D#_10
M11
H_D#_11
J1
H_D#_12
J2
H_D#_13
N12
H_D#_14
J6
H_D#_15
P2
H_D#_16
L2
H_D#_17
R2
H_D#_18
N9
H_D#_19
L6
H_D#_20
M5
H_D#_21
J3
H_D#_22
N2
H_D#_23
R1
H_D#_24
N5
H_D#_25
N6
H_D#_26
P13
H_D#_27
N8
H_D#_28
L7
H_D#_29
N10
H_D#_30
M3
H_D#_31
Y3
H_D#_32
AD14
H_D#_33
Y6
H_D#_34
Y10
H_D#_35
Y12
H_D#_36
Y14
H_D#_37
Y7
H_D#_38
W2
H_D#_39
AA8
H_D#_40
Y9
H_D#_41
AA13
H_D#_42
AA9
H_D#_43
AA11
H_D#_44
AD11
H_D#_45
AD10
H_D#_46
AD13
H_D#_47
AE12
H_D#_48
AE9
H_D#_49
AA2
H_D#_50
AD8
H_D#_51
AA3
H_D#_52
AD3
H_D#_53
AD7
H_D#_54
AE14
H_D#_55
AF3
H_D#_56
AC1
H_D#_57
AE3
H_D#_58
AC3
H_D#_59
AE11
H_D#_60
AE8
H_D#_61
AG2
H_D#_62
AD6
H_D#_63
C5
H_SWING
E3
H_RCOMP
C12
H_CPURST#
E11
H_CPUSLP#
A11
H_AVREF
B11
H_DVREF
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
3
1 OF 10
1 OF 10
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3
H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3
H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_RS#0 H_RS#1 H_RS#2
HOST
HOST
H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8
H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35
H_ADS# H_ADSTB#_0 H_ADSTB#_1
H_BNR#
H_BPRI#
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HPLL_CLK#
H_DPWR#
H_DRDY#
H_HIT#
H_HITM# H_LOCK# H_TRDY#
H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3
H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3
H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3
H_REQ#_0 H_REQ#_1
H_REQ#_2 H_REQ#_3
H_REQ#_4
H_RS#_0 H_RS#_1 H_RS#_2
A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20
H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9
J8 L3 Y13 Y1
L10 M7 AA5 AE6
L9 M8 AA6 AE5
B15 K13 F13 B13 B14
B6 F12 C8
2
H_A#[35..3]
H_ADS# 4 H_ADSTB#0 4 H_ADSTB#1 4 H_BNR# 4
H_BPRI# 4
H_BREQ#0 4
H_DEFER# 4
H_DBSY# 4
CLK_MCH_BCLK 3 CLK_MCH_BCLK# 3
H_DPWR# 4 H_DRDY# 4 H_HIT# 4 H_HITM# 4
H_LOCK# 4
H_TRDY# 4
H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_REQ#[4..0]
H_RS#[2..0]
1
H_A#[35..3] 4
H_DINV#[3..0] 4
H_DSTBN#[3..0] 4
H_DSTBP#[3..0] 4
H_REQ#[4..0] 4
H_RS#[2..0] 4
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Cantiga (1 of 6)_HOST
Cantiga (1 of 6)_HOST
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Cantiga (1 of 6)_HOST
LA14
LA14
LA14
652Thursday, May 07, 2009
652Thursday, May 07, 2009
652Thursday, May 07, 2009
1
SB
SB
SB
Page 7
5
1D8V_S3
12
R251
R251 1KR2F-3-GP
1KR2F-3-GP
SM_RCOMP_VOH
12
C489
C489 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SM_RCOMP_VOL
12
C483
C483 SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
R250
R250 3K01R2F-3-GP
3K01R2F-3-GP
R248
R248 1KR2F-3-GP
1KR2F-3-GP
12
C487
C487 SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
12
C484
C484 SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
D D
12
12
layout take note
1D8V_S3
12
R247
R247 80D6R2F-L-GP
80D6R2F-L-GP
M_RCOMPP
M_RCOMPN
12
R246
R246 80D6R2F-L-GP
C C
B B
PM_EXTTS#0 PM_EXTTS#1
80D6R2F-L-GP
RN29
RN29
4
SRN10KJ-5-GP
SRN10KJ-5-GP
1 23
3D3V_S0
3D3V_S0
PM_SYNC#13
H_DPRSTP#4,12,41
PWROK13,39
PLT_RST1#13,24,30,31,33,34
PM_THRMTRIP-A#4,12,39
PM_DPRSLPVR13,41
R110 0R0402-PADR110 0R0402-PAD
1 2
R211 100R2J-2-GPR211 100R2J-2-GP
CPU_SEL03,4 CPU_SEL13,4 CPU_SEL23,4
1
1224 add R306
R306 4K02R2F-GP
R306 4K02R2F-GP
1 2
R98 4K02R2F-GP
R98 4K02R2F-GP
1 2
12
C147
C147
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
DY
DY
12
DY
DY
PM_SYNC# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PWROK_GD RSTIN# PM_THRMTRIP-A# PM_DPRSLPVR
Pin Name Strap Description Configuration
A A
CFG20
Digital DisplayPort (SDVO/DP/HDMI) Concurrent with PCIE
5
Low = Only digital DisplayPort (SDVO/DP/HDMI) or PCIE is operational (default)
High = Digital DisplayPort (SDVO/DP/HDMI) and PCIE are operating simultaneously via the PEG port
CFG16
CFG20
U35B
U35B
M36
RESERVED#M36
N36
RESERVED#N36
R33
RESERVED#R33
T33
RESERVED#T33
AH9
RESERVED#AH9
AH10
RESERVED#AH10
AH12
RESERVED#AH12
AH13
RESERVED#AH13
K12
RESERVED#K12
AL34
RESERVED#AL34
AK34
RESERVED#AK34
AN35
RESERVED#AN35
AM35
RESERVED#AM35
T24
RESERVED#T24
B31
RESERVED#B31
B2
RESERVED#B2
M1
RESERVED#M1
AY21
RESERVED#AY21
BG23
RESERVED#BG23
BF23
RESERVED#BF23
BH18
RESERVED#BH18
BF18
RESERVED#BF18
T25
CFG_0
R25
CFG_1
P25
CFG_2
P20
CFG_3
P24
CFG_4
C25
CFG_5
N24
CFG_6
M24
CFG_7
E21
CFG_8
C23
CFG_9
C24
CFG_10
N21
CFG_11
P21
CFG_12
T21
CFG_13
R20
CFG_14
M20
CFG_15
L21
CFG_16
H21
CFG_17
P29
CFG_18
R28
CFG_19
T28
CFG_20
R29
PM_SYNC#
B7
PM_DPRSTP#
N33
PM_EXT_TS#_0
P32
PM_EXT_TS#_1
AT40
PWROK
AT11
RSTIN#
T20
THERMTRIP#
R32
DPRSLPVR
BG48
NC#BG48
BF48
NC#BF48
BD48
NC#BD48
BC48
NC#BC48
BH47
NC#BH47
BG47
NC#BG47
BE47
NC#BE47
BH46
NC#BH46
BF46
NC#BF46
BG45
NC#BG45
BH44
NC#BH44
BH43
NC#BH43
BH6
NC#BH6
BH5
NC#BH5
BG4
NC#BG4
BH3
NC#BH3
BF3
NC#BF3
BH2
NC#BH2
BG2
NC#BG2
BE2
NC#BE2
BG1
NC#BG1
BF1
NC#BF1
BD1
NC#BD1
BC1
NC#BC1
F1
NC#F1
A47
NC#A47
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
4
2 OF 10
2 OF 10
AP24
SA_CK_0
AT21
SA_CK_1
AV24
SB_CK_0
AU20
SB_CK_1
AR24
SA_CK#_0
AR21
SA_CK#_1
AU24
SB_CK#_0
AV20
SB_CK#_1
BC28
SA_CKE_0
AY28
SA_CKE_1
AY36
SB_CKE_0 SB_CKE_1
SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1
SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1
SM_RCOMP
SM_RCOMP#
SM_VREF
SM_PWROK
SM_REXT
SM_DRAMRST# DPLL_REF_CLK
PEG_CLK
PEG_CLK#
DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3
DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3
DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3
DMI_TXP_0 DMI_TXP_1 DMI_TXP_2 DMI_TXP_3
GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST# CL_VREF
CLKREQ#
ICH_SYNC#
TSATN#
HDA_BCLK HDA_RST#
HDA_SDI
HDA_SDO
HDA_SYNC
BB36 BA17
AY16 AV16 AR13
BD17 AY17 BF15 AY13
BG22 BH21
BF28 BH28
AV42 AR36 BF17 BC36
B38 A38 E41 F41
F43 E43
AE41 AE37 AE47 AH39
AE40 AE38 AE48 AH40
AE35 AE43 AE46 AH42
AD35 AE44 AF46 AH43
B33 B32 G33 F33 E33
C34
AH37 AH36 AN36 AJ35 AH34
N28 M28 G36 E36 K36 H36
B12
B28 B30 B29 C29 A28
M_RCOMPP M_RCOMPN
SM_RCOMP_VOH SM_RCOMP_VOL
SM_REXT TP_SM_DRAMRST#
DREFCLK DREFCLK# DREFSSCLK DREFSSCLK#
DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3
DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3
DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3
DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3
CLPWROK_MCH MCH_CLVREF
1
MCH_TSATN#
RSVD
RSVD
SM_RCOMP_VOH SM_RCOMP_VOL
DDR CLK/ CONTROL/COMPENSATION
DDR CLK/ CONTROL/COMPENSATION
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLK
CLK
CFG
CFG
DMI
DMI
PM
PM
GRAPHICS VID
GRAPHICS VID
MEHDA
MEHDA
DDPC_CTRLCLK
DDPC_CTRLDATA
NC
NC
SDVO_CTRLCLK
SDVO_CTRLDATA
MISC
MISC
4
M_CLK_DDR0 17 M_CLK_DDR1 17 M_CLK_DDR2 16 M_CLK_DDR3 16
M_CLK_DDR#0 17 M_CLK_DDR#1 17 M_CLK_DDR#2 16 M_CLK_DDR#3 16
M_CKE0 17 M_CKE1 17 M_CKE2 16 M_CKE3 16
M_CS0# 17 M_CS1# 17 M_CS2# 16 M_CS3# 16
M_ODT0 17 M_ODT1 17 M_ODT2 16 M_ODT3 16
R243
R243
1 2
TP36TPAD30TP36TPAD30
DREFCLK 3
DREFCLK# 3
DREFSSCLK 3
DREFSSCLK# 3
CLK_MCH_3GPLL 3
CLK_MCH_3GPLL# 3
DMI_TXN0 13 DMI_TXN1 13 DMI_TXN2 13 DMI_TXN3 13
DMI_TXP0 13 DMI_TXP1 13 DMI_TXP2 13 DMI_TXP3 13
DMI_RXN0 13 DMI_RXN1 13 DMI_RXN2 13 DMI_RXN3 13
DMI_RXP0 13 DMI_RXP1 13 DMI_RXP2 13 DMI_RXP3 13
R111
R111 0R0402-PAD
0R0402-PAD
CLK_MCH_OE# 3
MCH_ICH_SYNC# 13
R242
R242
12
56R2J-4-GP
56R2J-4-GP
499R2F-2-GP
499R2F-2-GP
12
TP34TPAD14-GP TP34TPAD14-GP
1D05V_S0
3
DDR_VREF_S3
12
C250
C250
1D05V_S0
CL_CLK0 13
CL_DATA0 13 PWROK 13,39 CL_RST#0 13
C231
C231
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3
0912 delete GMCH_TXB*
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
GMCH_BLUE19
GMCH_GREEN19
GMCH_RED19
GMCH_DDCCLK19 GMCH_DDCDATA19
GMCH_HSYNC19 GMCH_VSYNC19
R93
R93 1KR2F-3-GP
1KR2F-3-GP
1 2
12
12
R92
R92 511R2F-2-GP
511R2F-2-GP
FOR Cantiga:500 ohm Teenah: 392 ohm
L_BKLTCTL18
GMCH_BL_ON33
CLK_DDC_EDID18 DAT_DDC_EDID18
GMCH_LCDVDD_ON18
TP73 TPAD14-GPTP73 TPAD14-GP
GMCH_TXACLK-18 GMCH_TXACLK+18
GMCH_TXAOUT0-18 GMCH_TXAOUT1-18 GMCH_TXAOUT2-18
GMCH_TXAOUT0+18 GMCH_TXAOUT1+18 GMCH_TXAOUT2+18
GMCH_BLUE GMCH_GREEN GMCH_RED
GMCH_DDCCLK
L_BKLTCTL GMCH_BL_ON LCTLA_CLK
LCTLB_DATA CLK_DDC_EDID DAT_DDC_EDID
GMCH_LCDVDD_ON
LIBG L_LVBG
1
TVA_DAC TVB_DAC TVC_DAC
GMCH_DDCDATA GMCH_HS
2 3 1
4
GMCH_VS
RN21
RN21
SRN33J-5-GP-U
SRN33J-5-GP-U
CRT_IREF
1 2
R253 1K02R2F-1-GPR253 1K02R2F-1-GP
FOR Cantiga: 1.02k_1% ohm Teenah: 1.3k ohm
CRT_IREF routing Trace width use 20 mil
U35C
U35C
L32
L_BKLT_CTRL
G32
L_BKLT_EN
M32
L_CTRL_CLK
M33
L_CTRL_DATA
K33
L_DDC_CLK
J33
L_DDC_DATA
M29
L_VDD_EN
C44
LVDS_IBG
B43
LVDS_VBG
E37
LVDS_VREFH
E38
LVDS_VREFL
C41
LVDSA_CLK#
C40
LVDSA_CLK
B37
LVDSB_CLK#
A37
LVDSB_CLK
H47
LVDSA_DATA#_0
E46
LVDSA_DATA#_1
G40
LVDSA_DATA#_2
A40
LVDSA_DATA#_3
H48
LVDSA_DATA_0
D45
LVDSA_DATA_1
F40
LVDSA_DATA_2
B40
LVDSA_DATA_3
A41
LVDSB_DATA#_0
H38
LVDSB_DATA#_1
G37
LVDSB_DATA#_2
J37
LVDSB_DATA#_3
B42
LVDSB_DATA_0
G38
LVDSB_DATA_1
F37
LVDSB_DATA_2
K37
LVDSB_DATA_3
F25
TVA_DAC
H25
TVB_DAC
K25
TVC_DAC
H24
TV_RTN
C31
TV_DCONSEL_0
E32
TV_DCONSEL_1
E28
CRT_BLUE
G28
CRT_GREEN
J28
CRT_RED
G29
CRT_IRTN
H32
CRT_DDC_CLK
J32
CRT_DDC_DATA
J29
CRT_HSYNC
E29
CRT_TVO_IREF
L29
CRT_VSYNC
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
2
PEG_COMPI
PEG_COMPO
PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8
PEG_RX#_9 PEG_RX#_10 PEG_RX#_11
LVDS
LVDS
PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15
PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8
PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15
PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5
TV VGA
TV VGA
PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9
PEG_TX#_10 PEG_TX#_11 PEG_TX#_12
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_13 PEG_TX#_14 PEG_TX#_15
PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8
PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15
1014 swap these nets
GMCH_BLUE GMCH_GREEN
GMCH_RED
TVA_DAC TVB_DAC TVC_DAC
LCTLB_DATA LCTLA_CLK CLK_MCH_OE#
GMCH_LCDVDD_ON GMCH_BL_ON
LIBG
2
RN14
RN14
1 2 3 4 5
SRN150F-1-GP
SRN150F-1-GP
RN15
RN15
1 2 3 4 5
SRN75J-1-GP
SRN75J-1-GP
RN32
RN32
6 7 8
SRN10KJ-6-GP
SRN10KJ-6-GP
RN22
RN22
1 2 3 4 5
SRN100KJ-8-GP-U
SRN100KJ-8-GP-U R103
R103
1 2
2K37R2F-GP
2K37R2F-GP
3 OF 10
3 OF 10
8 7 6
8 7 6
45 3 2 1
8 7 6
1D05V_S0
R99
R99
PEG_CMP
3D3V_S0
T37 T36
H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39
H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40
J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46
J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46
12
49D9R2F-GP
49D9R2F-GP
Close to GMCH as 500 mils.
0912 add these parts for EMI demand 1017 delete these parts(EC208~EC210)
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (2 of 6)_DMI/PM/CFG
Cantiga (2 of 6)_DMI/PM/CFG
Cantiga (2 of 6)_DMI/PM/CFG
LA14
LA14
LA14
1
of
752Thursday, May 07, 2009
of
752Thursday, May 07, 2009
of
752Thursday, May 07, 2009
SB
SB
SB
Page 8
5
U35D
M_A_DQ[63..0]17
D D
C C
B B
M_A_DQ[63..0]
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
U35D
AJ38
SA_DQ_0
AJ41
SA_DQ_1
AN38
SA_DQ_2
AM38
SA_DQ_3
AJ36
SA_DQ_4
AJ40
SA_DQ_5
AM44
SA_DQ_6
AM42
SA_DQ_7
AN43
SA_DQ_8
AN44
SA_DQ_9
AU40
SA_DQ_10
AT38
SA_DQ_11
AN41
SA_DQ_12
AN39
SA_DQ_13
AU44
SA_DQ_14
AU42
SA_DQ_15
AV39
SA_DQ_16
AY44
SA_DQ_17
BA40
SA_DQ_18
BD43
SA_DQ_19
AV41
SA_DQ_20
AY43
SA_DQ_21
BB41
SA_DQ_22
BC40
SA_DQ_23
AY37
SA_DQ_24
BD38
SA_DQ_25
AV37
SA_DQ_26
AT36
SA_DQ_27
AY38
SA_DQ_28
BB38
SA_DQ_29
AV36
SA_DQ_30
AW36
SA_DQ_31
BD13
SA_DQ_32
AU11
SA_DQ_33
BC11
SA_DQ_34
BA12
SA_DQ_35
AU13
SA_DQ_36
AV13
SA_DQ_37
BD12
SA_DQ_38
BC12
SA_DQ_39
BB9
SA_DQ_40
BA9
SA_DQ_41
AU10
SA_DQ_42
AV9
SA_DQ_43
BA11
SA_DQ_44
BD9
SA_DQ_45
AY8
SA_DQ_46
BA6
SA_DQ_47
AV5
SA_DQ_48
AV7
SA_DQ_49
AT9
SA_DQ_50
AN8
SA_DQ_51
AU5
SA_DQ_52
AU6
SA_DQ_53
AT5
SA_DQ_54
AN10
SA_DQ_55
AM11
SA_DQ_56
AM5
SA_DQ_57
AJ9
SA_DQ_58
AJ8
SA_DQ_59
AN12
SA_DQ_60
AM13
SA_DQ_61
AJ11
SA_DQ_62
AJ12
SA_DQ_63
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
4 OF 10
4 OF 10
SA_BS_0 SA_BS_1 SA_BS_2
SA_RAS# SA_CAS#
SA_WE#
SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7
SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6
SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7
SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8
SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14
4
BD21 BG18 AT25
BB20 BD20 AY20
AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5
AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8
BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25
M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
M_A_DM[7..0]
M_A_DQS[7..0]
M_A_DQS#[7..0]
M_A_A[14..0]
M_A_BS#0 17 M_A_BS#1 17 M_A_BS#2 17
M_A_RAS# 17 M_A_CAS# 17 M_A_WE# 17
M_A_DM[7..0] 17
M_A_DQS[7..0] 17
M_A_DQS#[7..0] 17
M_A_A[14..0] 17
3
U35E
M_B_DQ[63..0]16
M_B_DQ[63..0]
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
U35E
AK47
SB_DQ_0
AH46
SB_DQ_1
AP47
SB_DQ_2
AP46
SB_DQ_3
AJ46
SB_DQ_4
AJ48
SB_DQ_5
AM48
SB_DQ_6
AP48
SB_DQ_7
AU47
SB_DQ_8
AU46
SB_DQ_9
BA48
SB_DQ_10
AY48
SB_DQ_11
AT47
SB_DQ_12
AR47
SB_DQ_13
BA47
SB_DQ_14
BC47
SB_DQ_15
BC46
SB_DQ_16
BC44
SB_DQ_17
BG43
SB_DQ_18
BF43
SB_DQ_19
BE45
SB_DQ_20
BC41
SB_DQ_21
BF40
SB_DQ_22
BF41
SB_DQ_23
BG38
SB_DQ_24
BF38
SB_DQ_25
BH35
SB_DQ_26
BG35
SB_DQ_27
BH40
SB_DQ_28
BG39
SB_DQ_29
BG34
SB_DQ_30
BH34
SB_DQ_31
BH14
SB_DQ_32
BG12
SB_DQ_33
BH11
SB_DQ_34
BG8
SB_DQ_35
BH12
SB_DQ_36
BF11
SB_DQ_37
BF8
SB_DQ_38
BG7
SB_DQ_39
BC5
SB_DQ_40
BC6
SB_DQ_41
AY3
SB_DQ_42
AY1
SB_DQ_43
BF6
SB_DQ_44
BF5
SB_DQ_45
BA1
SB_DQ_46
BD3
SB_DQ_47
AV2
SB_DQ_48
AU3
SB_DQ_49
AR3
SB_DQ_50
AN2
SB_DQ_51
AY2
SB_DQ_52
AV1
SB_DQ_53
AP3
SB_DQ_54
AR1
SB_DQ_55
AL1
SB_DQ_56
AL2
SB_DQ_57
AJ1
SB_DQ_58
AH1
SB_DQ_59
AM2
SB_DQ_60
AM3
SB_DQ_61
AH3
SB_DQ_62
AJ3
SB_DQ_63
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
2
5 OF 10
5 OF 10
BC16
SB_BS_0
BB17
SB_BS_1
BB33
SB_BS_2
AU17
SB_RAS#
BG16
SB_CAS#
BF14
SB_WE#
M_B_DM0
AM47
SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7
SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6
SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7
SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8
SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
AY47 BD40 BF35 BG11 BA3 AP1 AK2
AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5
AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33
M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14
M_B_DM[7..0]
M_B_DQS[7..0]
M_B_DQS#[7..0]
M_B_A[14..0]
M_B_BS#0 16 M_B_BS#1 16 M_B_BS#2 16
M_B_RAS# 16 M_B_CAS# 16 M_B_WE# 16
1
M_B_DM[7..0] 16
M_B_DQS[7..0] 16
M_B_DQS#[7..0] 16
M_B_A[14..0] 16
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Cantiga (3 of 6)_DDR
Cantiga (3 of 6)_DDR
Cantiga (3 of 6)_DDR
LA14
LA14
LA14
852Thursday, May 07, 2009
852Thursday, May 07, 2009
852Thursday, May 07, 2009
1
SB
SB
SB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Page 9
5
4
3
2
1
SM_LF1_GMCH SM_LF2_GMCH SM_LF3_GMCH SM_LF4_GMCH SM_LF5_GMCH SM_LF6_GMCH SM_LF7_GMCH
1D05V_S0
12
12
12
C136
C136
C140
C140
C153
C153
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
place near Cantiga
12
C172
C172
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
ST220U2VBM-3GP
ST220U2VBM-3GP
DY
DY
12
C246
C246
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
1D05V_S0
12
DY
DY
TC21
TC21
Place CAP where LVDS and DDR2 taps
12
12
C207
C207
C203
C203
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
12
C235
C235
C253
C253
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
12
12
C162
C162
C183
C183
C163
C163
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
C164
C164
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
Place on the Edge Coupling CAP
FOR VCC SM
12
12
12
C202
C202
C225
C225
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
1118 delete TC27
SB
12
C208
C208
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
Place on the Edge
1D05V_S0
C112
C112
C111
C455
C455
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
DY
DY
12
12
C194
C194
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C210
C210
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
C175
C175
12
C211
C211
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
C193
C193
C177
1D8V_S3
C177
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1U10V3ZY-6GP
SC1U10V3ZY-6GP
C111
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
12
DY
DY
DY
DY
C145
C145
C144
C144
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
DY
DY
Coupling CAP 370 mils from the Edge
12
12
C456
C456
C450
C450
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SCD1U10V2KX-4GP
DY
DY
Coupling CAP
SCD1U10V2KX-4GP
DY
DY
G9
G9
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCC_GMCH_35
U35F
U35F
AG34
VCC
AC34
VCC
AB34
VCC
AA34
VCC
Y34
VCC
V34
VCC
U34
VCC
AM33
VCC
AK33
VCC
AJ33
VCC
AG33
VCC
AF33
VCC
AE33
VCC
AC33
VCC
AA33
VCC
Y33
VCC
W33
VCC
V33
VCC
U33
VCC
AH28
VCC
AF28
VCC
AC28
VCC
AA28
VCC
AJ26
VCC
AG26
VCC
AE26
VCC
AC26
VCC
AH25
VCC
AG25
VCC
AF25
VCC
AG24
VCC
AJ23
VCC
AH23
VCC
AF23
VCC
T32
VCC
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
VCC CORE
VCC CORE
VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF
POWER
POWER
VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF
VCC NCTF
VCC NCTF
VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF
6 OF 10
6 OF 10
AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23
1D05V_S0
7 OF 10
1D8V_S3
667MTS 2400mA 800MTS 3000mA
D D
1D05V_S0
C C
B B
TP33 TPAD14-GPTP33 TPAD14-GP TP32 TPAD14-GPTP32 TPAD14-GP
1 1
U35G
U35G
AP33
VCC_SM
AN33
VCC_SM
BH32
VCC_SM
BG32
VCC_SM
BF32
VCC_SM
BD32
VCC_SM
BC32
VCC_SM
BB32
VCC_SM
BA32
VCC_SM
AY32
VCC_SM
AW32
VCC_SM
AV32
VCC_SM
AU32
VCC_SM
AT32
VCC_SM
AR32
VCC_SM
AP32
VCC_SM
AN32
VCC_SM
BH31
VCC_SM
BG31
VCC_SM
BF31
VCC_SM
BG30
VCC_SM
BH29
VCC_SM
BG29
VCC_SM
BF29
VCC_SM
BD29
VCC_SM
BC29
VCC_SM
BB29
VCC_SM
BA29
VCC_SM
AY29
VCC_SM
AW29
VCC_SM
AV29
VCC_SM
AU29
VCC_SM
AT29
VCC_SM
AR29
VCC_SM
AP29
VCC_SM
BA36
VCC_SM/NC
BB24
VCC_SM/NC
BD16
VCC_SM/NC
BB21
VCC_SM/NC
AW16
VCC_SM/NC
AW13
VCC_SM/NC
AT13
VCC_SM/NC
Y26
VCC_AXG
AE25
VCC_AXG
AB25
VCC_AXG
AA25
VCC_AXG
AE24
VCC_AXG
AC24
VCC_AXG
AA24
VCC_AXG
Y24
VCC_AXG
AE23
VCC_AXG
AC23
VCC_AXG
AB23
VCC_AXG
AA23
VCC_AXG
AJ21
VCC_AXG
AG21
VCC_AXG
AE21
VCC_AXG
AC21
VCC_AXG
AA21
VCC_AXG
Y21
VCC_AXG
AH20
VCC_AXG
AF20
VCC_AXG
AE20
VCC_AXG
AC20
VCC_AXG
AB20
VCC_AXG
AA20
VCC_AXG
T17
VCC_AXG
T16
VCC_AXG
AM15
VCC_AXG
AL15
VCC_AXG
AE15
VCC_AXG
AJ15
VCC_AXG
AH15
VCC_AXG
AG15
VCC_AXG
AF15
VCC_AXG
AB15
VCC_AXG
AA15
VCC_AXG
Y15
VCC_AXG
V15
VCC_AXG
U15
VCC_AXG
AN14
VCC_AXG
AM14
VCC_AXG
U14
VCC_AXG
T14
VCC_AXG
AJ14
VCC_AXG_SENSE
AH14
VSS_AXG_SENSE
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
POWER
POWER
VCC SMVCC GFX
VCC SMVCC GFX
7 OF 10
VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF
VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF
VCC SM LF
VCC SM LF
W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16
AV44 BA37 AM40 AV21 AY5 AM10 BB13
A A
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (4 of 6)_POWER
Cantiga (4 of 6)_POWER
Cantiga (4 of 6)_POWER
LA14
LA14
LA14
1
of
952Thursday, May 07, 2009
of
952Thursday, May 07, 2009
of
952Thursday, May 07, 2009
SB
SB
SB
Page 10
5
1120 modify EC78
SB
5V_S0
12
D D
1113 modify 2nd of U44
SB
1229 modify U44
1
1D05V_S0
R108
R108
1 2
0R0603-PAD
0R0603-PAD
R116
R116
1 2
0R0603-PAD
0R0603-PAD
C C
1D05V_S0
120ohm 100MHz
1 2
SBK160808T-121Y-N-GP
SBK160808T-121Y-N-GP
68.00119.101
68.00119.101
2nd = 68.00217.161
2nd = 68.00217.161
1 2
SBK160808T-121Y-N-GP
SBK160808T-121Y-N-GP
68.00119.101
68.00119.101
2nd = 68.00217.161
2nd = 68.00217.161
120ohm 100MHz
1D05V_S0
B B
L5
L5
1 2
SBK160808T-221Y-N-GP
SBK160808T-221Y-N-GP
68.00119.111
68.00119.111
2nd = 68.00217.521
2nd = 68.00217.521
Imax = 300 mA
U44
U44
1
VIN
2
GND EN3NC#4
RT9198-33GBR-GP
RT9198-33GBR-GP
74.09198.Q7F
74.09198.Q7F
EC78
EC78
2nd = 74.09091.J3F
2nd = 74.09091.J3F
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
L12
L12
L13
L13
C263
C263
C267
C267
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
C464
C464
12
DY
DY
C463
C463
VOUT
12
12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
3D3V_S0_DAC
5 4
EC77
EC77
SC1U16V3ZY-GP
SC1U16V3ZY-GP
DY
DY
65mA
M_VCCA_DPLLA
12
C258
C258 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
65mA
M_VCCA_DPLLB
12
C265
C265
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C469
C469 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C468
C468 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
50mA
1D05V_RUN_PEGPLL
12
C260
C260 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
3D3V_S0_DAC
24mA
M_VCCA_HPLL
139.2mA
M_VCCA_MPLL
1015 modify component size of R252
3D3V_S0_DAC
1 2
0R0402-PAD
0R0402-PAD
1
1222 modify R252
C485
C485 SC22U16V0KX-1GP
SC22U16V0KX-1GP
R249
R249
1 2
HFB1608VF-102-GP
HFB1608VF-102-GP
68.00331.011
68.00331.011
2nd = 68.00084.A01
2nd = 68.00084.A01
1D05V_S0
1D05V_S0
3D3V_S0_DAC
220ohm 100MHz
1D5V_S0
L4
L4
1 2
PBY160808T-181Y-GP
PBY160808T-181Y-GP
68.00206.041
68.00206.041
180ohm 100MHz
2nd = 68.00214.051
2nd = 68.00214.051
A A
5
1D5VRUN_QDAC
12
C201
C201 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R252
R252
5mA
12
1D05V_S0
4
12
C490
C490 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_TXLVDS_S3
720mA
C169
C169
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
12
C178
C178
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
157.2mA
12
C134
C134
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4
C492
C492
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
12
1D8V_TXLVDS_S3
1D5V_S0
12
C256
C256 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C161
C161
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
DY
DY
12
C184
C184
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DY
DY
C181
C181
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D8V_S3
3D3V_CRTDAC_S0
C494
C494 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
M_VCCA_DAC_BG
M_VCCA_DPLLA M_VCCA_DPLLB M_VCCA_HPLL M_VCCA_MPLL
1D05V_RUN_PEGPLL
C160
C160
C157
C157
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
12
26mA
12
C180
C180
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
79mA
12
C482
C482 SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
50mA
1D5V_S0
12
1D5VRUN_QDAC
1D05V_RUN_PEGPLL
12
C261
C261
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
60.3mA
12
C239
C239
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
13.2mA
AD48
AA48
AR20
SC1U10V3KX-3GP
SC1U10V3KX-3GP
AP20 AN20 AR17 AP17 AN17
AT16 AR16 AP16
AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25
AL25 AM24
AL24 AM23
AL23
35mA
AA47
12
C244
C244 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
U35H
U35H
B27
VCCA_CRT_DAC
A26
VCCA_CRT_DAC
A25
VCCA_DAC_BG
B25
VSSA_DAC_BG
F47
VCCA_DPLLA
L48
VCCA_DPLLB
AD1
VCCA_HPLL
AE1
VCCA_MPLL
J48
VCCA_LVDS
J47
VSSA_LVDS
VCCA_PEG_BG
VCCA_PEG_PLL
VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM
VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF VCCA_SM_CK_NCTF
B24
VCCA_TV_DAC
A24
VCCA_TV_DAC
A32
VCC_HDA
M25
VCCD_TVDAC
L28
VCCD_QDAC
AF1
VCCD_HPLL VCCD_PEG_PLL
M38
VCCD_LVDS
L37
VCCD_LVDS
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
3
3
CRTPLLA PEGA SM
CRTPLLA PEGA SM
A LVDS
A LVDS
POWER
POWER
A CK
A CK
TV
TV
HDA
HDA
D TV/CRT
D TV/CRT
LVDS
LVDS
AXF
AXF
VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK
SM CK
SM CK
VCC_TX_LVDS
HV
HV
PEG
PEG
DMI
DMI
VTTLF
VTTLF
8 OF 10
8 OF 10
U13
VTT
T13
VTT
U12
VTT
T12
VTT
U11
VTT
T11
VTT
U10
VTT
T10
VTT
U9
VTT
T9
VTT
U8
VTT
T8
VTT
U7
VTT
T7
VTT
U6
VTT
VTT
VTT
T6
VTT
U5
VTT
T5
VTT
V3
VTT
U3
VTT
V2
VTT
U2
VTT
T2
VTT
V1
VTT
U1
VTT
B22
VCC_AXF
B21
VCC_AXF
A21
VCC_AXF
BF21 BH20 BG20 BF20
K47 C35
VCC_HV
B35
VCC_HV
A35
VCC_HV
V48
VCC_PEG
U48
VCC_PEG
V47
VCC_PEG
U47
VCC_PEG
U46
VCC_PEG
AH48
VCC_DMI
AF48
VCC_DMI
AH47
VCC_DMI
AG47
VCC_DMI
A8
VTTLF
L1
VTTLF
AB2
VTTLF
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
106mA
1782mA
456mA
VTTLF1 VTTLF2 VTTLF3
C467
C467
1
1
2
2
12
C209
C209
2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C481
C481
12
3D3V_HV_S0
12
C466
C466
DY
DY
C133
C133
1
1
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
2
2
2
12
C220
C220
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
C166
C166 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C139
C139
1
1
2
2
1
1D05V_S0
852mA73mA
12
C213
C213
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
1D05V_S0
12
C214
C214
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
D18
D18
1
2
BAT54-5-GP
BAT54-5-GP
83.BAT54.D81
83.BAT54.D81
2nd = 83.BAT54.X81
2nd = 83.BAT54.X81 3rd = 83.00054.Z81
3rd = 83.00054.Z81
1
1
C135
C135
DY
DY
2
2
3
1D05V_S0
12
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
1D05V_HV_S0
C138
C138 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
3D3V_S0 3D3V_HV_S0
1 2
R255
R255 10R2F-L-GP
10R2F-L-GP
322mA
C480
C480
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
R81
R81
1 2
0R0603-PAD
0R0603-PAD
1D8V_SUS_SM_CK_RC
R82
R82
1 2
1D8V_TXLVDS_S3
124mA
1R2F-GP
1R2F-GP
119mA
C457
C457
DY
DY
C198
C198
12
C254
C254 SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
C460
C460
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
C462
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C462 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
Cantiga (5 of 6)_POWER
Cantiga (5 of 6)_POWER
Cantiga (5 of 6)_POWER
LA14
LA14
LA14
12
C262
C262
1D05V_S0
12
C222
C222
12
C218
C218
DY
DY
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
1D8V_S31D8V_SUS_SM_CK
1 2
C159
C159 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1D8V_S3
R104
R104
1 2
0R0603-PAD
0R0603-PAD
1D05V_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
R254
R254
0R0402-PAD
0R0402-PAD
10 52Thursday, May 07, 2009
10 52Thursday, May 07, 2009
10 52Thursday, May 07, 2009
12
12
C497
C497
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SB
SB
SB
Page 11
5
U35I
U35I
AU48
VSS
AR48
VSS
AL48
VSS
BB47
VSS
AW47
VSS
AN47
VSS
AJ47
VSS
D D
C C
B B
A A
5
AF47
VSS
AD47
VSS
AB47
VSS
Y47
VSS
T47
VSS
N47
VSS
L47
VSS
G47
VSS
BD46
VSS
BA46
VSS
AY46
VSS
AV46
VSS
AR46
VSS
AM46
VSS
V46
VSS
R46
VSS
P46
VSS
H46
VSS
F46
VSS
BF44
VSS
AH44
VSS
AD44
VSS
AA44
VSS
Y44
VSS
U44
VSS
T44
VSS
M44
VSS
F44
VSS
BC43
VSS
AV43
VSS
AU43
VSS
AM43
VSS
J43
VSS
C43
VSS
BG42
VSS
AY42
VSS
AT42
VSS
AN42
VSS
AJ42
VSS
AE42
VSS
N42
VSS
L42
VSS
BD41
VSS
AU41
VSS
AM41
VSS
AH41
VSS
AD41
VSS
AA41
VSS
Y41
VSS
U41
VSS
T41
VSS
M41
VSS
G41
VSS
B41
VSS
BG40
VSS
BB40
VSS
AV40
VSS
AN40
VSS
H40
VSS
E40
VSS
AT39
VSS
AM39
VSS
AJ39
VSS
AE39
VSS
N39
VSS
L39
VSS
B39
VSS
BH38
VSS
BC38
VSS
BA38
VSS
AU38
VSS
AH38
VSS
AD38
VSS
AA38
VSS
Y38
VSS
U38
VSS
T38
VSS
J38
VSS
F38
VSS
C38
VSS
BF37
VSS
BB37
VSS
AW37
VSS
AT37
VSS
AN37
VSS
AJ37
VSS
H37
VSS
C37
VSS
BG36
VSS
BD36
VSS
AK15
VSS
AU36
VSS
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
VSS
VSS
4
9 OF 10
9 OF 10
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
4
AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6
3
U35J
U35J
BG21
VSS
L12
VSS
AW21
VSS
AU21
VSS
AP21
VSS
AN21
VSS
AH21
VSS
AF21
VSS
AB21
VSS
R21
VSS
M21
VSS
J21
VSS
G21
VSS
BC20
VSS
BA20
VSS
AW20
VSS
AT20
VSS
AJ20
VSS
AG20
VSS
Y20
VSS
N20
VSS
K20
VSS
F20
VSS
C20
VSS
A20
VSS
BG19
VSS
A18
VSS
BG17
VSS
BC17
VSS
AW17
VSS
AT17
VSS
R17
M17
H17
C17 BA16 AU16
AN16
N16
K16
G16
E16 BG15 AC15
W15
A15 BG14 AA14
C14 BG13 BC13 BA13
AN13
AJ13
AE13
N13
L13
G13
E13
BF12 AV12 AT12 AM12 AA12
J12
A12 BD11 BB11 AY11 AN11 AH11
Y11
N11
G11
C11 BG10 AV10 AT10
AJ10 AE10 AA10
M10
BF9 BC9 AN9 AM9 AD9
G9
B9
BH8
BB8
AV8
AT8
CANTIGA-GM-GP-U-NF
CANTIGA-GM-GP-U-NF
71.CNTIG.00U
71.CNTIG.00U
3
VSS VSS VSS VSS
VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS
VSS
VSS NCTF
VSS NCTF
NCTF_VSS_SCB#BH48
NCTF_VSS_SCB#BH1
NCTF_VSS_SCB#A48
NCTF_VSS_SCB#C1
NCTF_VSS_SCB#A3
NCTF TEST PIN:
A3,C1,A48,BH1,BH48
NCTF TEST PIN:
A3,C1,A48,BH1,BH48
VSS SCB
VSS SCB
NC
NC
VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF
10 OF 10
10 OF 10
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
VSS VSS VSS VSS
NC#E1 NC#D2 NC#C3 NC#B4 NC#A5
NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46
NC#F48 NC#E48 NC#C48 NC#B48
2
AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4
BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1
U24 U28 U25 U29
AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17
BH48 BH1 A48 C1 A3
E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48
2
1
1 1 1 1 1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
TP71TPAD14-GP TP71TPAD14-GP TP67TPAD14-GP TP67TPAD14-GP TP74TPAD14-GP TP74TPAD14-GP TP65TPAD14-GP TP65TPAD14-GP TP66TPAD14-GP TP66TPAD14-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Cantiga (6 of 6)
Cantiga (6 of 6)
Cantiga (6 of 6)
LA14
LA14
LA14
11 52Thursday, May 07, 2009
11 52Thursday, May 07, 2009
11 52Thursday, May 07, 2009
1
SB
SB
SB
Page 12
5
3D3V_AUX_S5
D16
D16
2
D D
1KR2J-1-GP
1KR2J-1-GP
RTC_BAT_R
RTC1
RTC1
1
PWR
2
GND
NP1
NP1
NP2
NP2
BAT-CON2-1-GP-U
BAT-CON2-1-GP-U
62.70001.011
62.70001.011
RTC_BAT
R121
R121
12
C281
C281
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
3
1
CH715FPT-GP
CH715FPT-GP
83.R0304.B81
83.R0304.B81
2nd = 83.R2004.C81
2nd = 83.R2004.C81
RN51
RN51 SRN20KJ-GP-U
SRN20KJ-GP-U
2 3 1
1 2
R193 1MR2J-1-GPR193 1MR2J-1-GP
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1119 add G84 and C540 1124 delete C540
GLAN_COMP place within 500 mil of ICH9M
C C
3D3V_S0
TP62 TPAD14-GPTP62 TPAD14-GP
HDD
B B
RTC_AUX_S5 RTC_AUX_S5
12
R200
R200 330KR2F-L-GP
330KR2F-L-GP
INTVRMEN LAN100_SLP
12
R197
R197
DY
DY
0R2J-2-GP
0R2J-2-GP
A A
DY
DY
12
12
R199
R199 330KR2F-L-GP
330KR2F-L-GP
R198
R198 0R2J-2-GP
0R2J-2-GP
integrated VccSus1_05,VccSus1_5,VccCL1_5
INTVRMEN
integrated VccLan1_05VccCL1_05
LAN100_SLP
ODD
High=Enable Low=Disable
High=Enable Low=Disable
RTC_AUX_S5
12
C391
C391 SC1U16V3ZY-GP
SC1U16V3ZY-GP
4
C396
C396
HDD_LED#33,38
SATA_RXN020
SATA_RXP020 SATA_TXN020 SATA_TXP020
SATA_RXN121
SATA_RXP121 SATA_TXN121 SATA_TXP121
4
X-32D768KHZ-46GP
X-32D768KHZ-46GP
12
12
C392
C392 SC1U16V3ZY-GP
SC1U16V3ZY-GP
near DIMM door
1D5V_S0
HDA_DOCK_RST#
1
C55 SCD01U50V2KX-1GPC55 SCD01U50V2KX-1GP C56 SCD01U50V2KX-1GPC56 SCD01U50V2KX-1GP C58 SCD01U50V2KX-1GPC58 SCD01U50V2KX-1GP C57 SCD01U50V2KX-1GPC57 SCD01U50V2KX-1GP
C285 SCD01U50V2KX-1GPC285 SCD01U50V2KX-1GP C286 SCD01U50V2KX-1GPC286 SCD01U50V2KX-1GP C289 SCD01U50V2KX-1GPC289 SCD01U50V2KX-1GP C288 SCD01U50V2KX-1GPC288 SCD01U50V2KX-1GP
3
C76
C76
1 2
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
82.30001.861
82.30001.861
2 3
C77
C77
1 2
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
GLAN_DOCK#13
ACZ_SDATAIN026
1 2
R228 8K2R2J-3-GP
R228 8K2R2J-3-GP
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
4
X2
X2
1
TPAD30
TPAD30
G84
G84
GAP-OPEN
GAP-OPEN
2 1
R207
R207
1 2
DY
DY
12
R57
R57 10MR2J-L-GP
10MR2J-L-GP
TP50
TP50
GLAN_COMP
24D9R2F-L-GP
24D9R2F-L-GP
ACZ_BIT_CLK_R ACZ_SYNC_R
ACZ_RST#_R
ACZ_SDATAOUT_R HDA_DOCK_EN#
1
RTC_X1
1229 modify C76,C77 from 12pF to 15pF
1016 modify X2
U16A
U16A
C23
RTC_X2 RTC_RST#
SRTC_RST# INTRUDER#
INTVRMEN LAN100_SLP
LAN_RSTYNC
GLAN_DOCK#
SATA_RXN0_C SATA_RXP0_C SATA_TXN0_C SATA_TXP0_C
SATA_RXN1_C SATA_RXP1_C SATA_TXN1_C SATA_TXP1_C
RTCX1
C24
RTCX2
A25
RTCRST#
F20
SRTCRST#
C22
INTRUDER#
B22
INTVRMEN
A22
LAN100_SLP
E25
GLAN_CLK
C13
LAN_RSTSYNC
F14
LAN_RXD0
G13
LAN_RXD1
D14
LAN_RXD2
D13
LAN_TXD0
D12
LAN_TXD1
E13
LAN_TXD2
B10
GLAN_DOCK#/GPIO56
B28
GLAN_COMPI
B27
GLAN_COMPO
AF6
HDA_BIT_CLK
AH4
HDA_SYNC
AE7
HDA_RST#
AF4
HDA_SDIN0
AG4
HDA_SDIN1
AH3
HDA_SDIN2
AE5
HDA_SDIN3
AG5
HDA_SDOUT
AG7
HDA_DOCK_EN#/GPIO33
AE8
HDA_DOCK_RST#/GPIO34
AG8
SATALED#
AJ16
SATA0RXN
AH16
SATA0RXP
AF17
SATA0TXN
AG17
SATA0TXP
AH13
SATA1RXN
AJ13
SATA1RXP
AG14
SATA1TXN
AF14
SATA1TXP
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
SB
1117 delete MDC function(R231,R237,R232,R234)
SB
1126 delete R230,R233,R235,R236 and RN63
RN63
RN63
ACZ_RST#_AUDIO26 ACZ_SDATAOUT_AUDIO26 ACZ_SYNC_AUDIO26
ACZ_BITCLK_AUDIO26
8 7 6
SRN47J-4-GP
SRN47J-4-GP
1 2 3 45
ACZ_RST#_R ACZ_SDATAOUT_R ACZ_SYNC_R ACZ_BIT_CLK_R
2
1 OF 6
1 OF 6
LPC_LAD0
LDRQ0#
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
IGNNE#
INIT# INTR
RCIN#
NMI
SMI#
STPCLK#
PECI
SATA4TXP
SATA5TXP
K5
LPC_LAD1
K4
LPC_LAD2
L6
LPC_LAD3
K2 K3
LDRQ0#
J3
3D3V_LDRQ1_S0
J1 N7
AJ27
H_DPRSTP#
AJ25 AE23
H_FERR#_R
AJ26 AD22 AF25 AE22
AG25 L3
AF23 AF24
AH27
H_THERMTRIP_R
AG26
ICH_TP8
AG27
AH11 AJ11 AG12 AF12
AH9 AJ9 AE10 AF10
AH18 AJ18
SATARBIAS
AJ7 AH7
Place within 500 mils of ICH9 ball
FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3
FWH4/LFRAME#
RTCLAN / GLAN
LPCCPU
RTCLAN / GLAN
LPCCPU
LDRQ1#/GPIO23
CPUPWRGD
THRMTRIP#
SATA4RXN
IHDA
IHDA
SATA4RXP SATA4TXN
SATA5RXN SATA5RXP SATA5TXN
SATA_CLKN SATA_CLKP
SATA
SATA
SATARBIAS#
SATARBIAS
0915 add EC73 for EMI demand
12
EC73
EC73 SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
12
EC65
EC65 SC10P50V2JN-4GP
SC10P50V2JN-4GP
DY
DY
LPC_LAD[0..3]
LPC_LFRAME# 33,34
1 1
KA20GATE 33 H_A20M# 4
H_DPRSTP# 4,7,41 H_DPSLP# 4
H_PWRGD 4,39,48 H_IGNNE# 4 H_INIT# 4
H_INTR 4 KBRCIN# 33
H_NMI 4 H_SMI# 4
H_STPCLK# 4
TP25 TPAD14-GPTP25 TPAD14-GP
1
CLK_PCIE_SATA# 3
CLK_PCIE_SATA 3
R227
R227
24D9R2F-L-GP
24D9R2F-L-GP
1
LPC_LAD[0..3] 33,34
TP58TPAD14-GP TP58TPAD14-GP TP12TPAD14-GP TP12TPAD14-GP
PM_THRMTRIP-A# H_THERMTRIP_R
H_FERR#4
1 2
DY
DY
R229
R229 54D9R2F-L1-GP
54D9R2F-L1-GP
12
1D05V_S0 3D3V_S0
DY
DY
RN55
RN55
SRN10KJ-5-GP
SRN10KJ-5-GP
H_INIT#_G
B
DY
DY
Q24
Q24
C
E
MMBT3904-3-GP
MMBT3904-3-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
ICH9-M (1 of 4)_SATA/HDA/RTC
ICH9-M (1 of 4)_SATA/HDA/RTC
ICH9-M (1 of 4)_SATA/HDA/RTC
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
LA14
LA14
LA14
1D05V_S0
12
R223
R223
DY
DY
56R2J-4-GP
56R2J-4-GP
H_DPSLP#
1
1224 modify RN54
1 2 3 4 5
H_PWRGD
1
23
4
FWH_INIT#H_INIT#
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1D05V_S0
RN54
RN54
8 7 6
H_FERR#_R
SRN56J-5-GP
SRN56J-5-GP
R222
R222 200R2F-L-GP
200R2F-L-GP
1 2
DY
DY
PM_THRMTRIP-A# 4,7,39
Layout note: R373 needs to placed within 2" of ICH9, R379 must be placed within 2" of R373 w/o stub
TP70 TPAD14-GPTP70 TPAD14-GP
1
12 52Thursday, May 07, 2009
12 52Thursday, May 07, 2009
12 52Thursday, May 07, 2009
1D05V_S0
SB
SB
SB
5
4
3
2
1
Page 13
5
U16B
U16B
D11
AD0
C8 D9
E12
E9 C9
E10
B7 C7 C5
G11
D D
INT_PIRQA# INT_PIRQB# INT_PIRQC# INT_PIRQD#
C C
PCI_PERR# INT_PIRQE# PCI_LOCK# INT_PIRQA#
3D3V_S0
PCI_REQ#2 PCI_REQ#1 SDATAOUT1 PM_CLKRUN#
3D3V_S0
LAN
PCIE_RXN124
PCIE_RXP124 PCIE_TXN124 PCIE_TXP124
PCIE_RXN231
PCIE_RXP231 PCIE_TXN231 PCIE_TXP231
B B
A A
MINICARD1
F8
F11
E7 A3 D2
F10
D5
D10
B3 F7 C3 F3 F4 C1
G7
H7 D1
G5
H6
G1
H3
J5 E1 J6
RP5
RP5
1 2 3 4 5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RP3
RP3
1 2 3 4 5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
C425 SCD1U10V2KX-5GPC425 SCD1U10V2KX-5GP C430 SCD1U10V2KX-5GPC430 SCD1U10V2KX-5GP
C418 SCD1U10V2KX-5GPC418 SCD1U10V2KX-5GP C416 SCD1U10V2KX-5GPC416 SCD1U10V2KX-5GP
USB_OC#023 USB_OC#123
LA14 SA->SB
0330 ADD GPIO40
5
PCI
PCI
AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
Interrupt I/F
Interrupt I/F
PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
3D3V_S0
10
INT_PIRQH#
9
PCI_REQ#0
8
INT_PIRQC#
7
INT_PIRQB# ECSCI#_1
3D3V_S0
10
INT_SERIRQ
9
PCI_DEVSEL#
8
PCI_STOP#
7
PCI_FRAME#
R73
R73
12
22D6R2F-L1-GP
22D6R2F-L1-GP
REQ0# GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0# C/BE1# C/BE2# C/BE3#
IRDY#
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP# TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PIRQE#/GPIO2 PIRQF#/GPIO3
PIRQG#/GPIO4
3D3V_S0
12 12
12 12
SPI_CS#1
USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9 USB_OC#10 USB_OC#11
USB_RBIAS_PN
2 OF 6
2 OF 6
PAR
PCI_REQ#3 INT_PIRQF# INT_PIRQG# PCI_SERR#
TXN1 TXP1
TXN2 TXP2
PCI_REQ#0
F1
PCI_GNT#0
G4
PCI_REQ#1
B6 A7
PCI_REQ#2
F13 F12
PCI_REQ#3
E6
PCI_GNT#3
F6 D8
B4 D6 A5
PCI_IRDY#
D3
PCI_PAR
E3 R1
PCI_DEVSEL#
C6
PCI_PERR#
E4
PCI_LOCK#
C2
PCI_SERR#
J4
PCI_STOP#
A4
PCI_TRDY#
F5
PCI_FRAME#
D7
PLT_RST#_R
C14 D4 R2
ICH_PME#
INT_PIRQE#
H4
INT_PIRQF#
K6
INT_PIRQG#
F2
INT_PIRQH#
G2
1 2 3 4 5 6
U16D
U16D
N29
PERN1
N28
PERP1
P27
PETN1
P26
PETP1
L29
PERN2
L28
PERP2
M27
PETN2
M26
PETP2
J29
PERN3
J28
PERP3
K27
PETN3
K26
PETP3
G29
PERN4
G28
PERP4
H27
PETN4
H26
PETP4
E29
PERN5
E28
PERP5
F27
PETN5
F26
PETP5
C29
PERN6/GLAN_RXN
C28
PERP6/GLAN_RXP
D27
PETN6/GLAN_TXN
D26
PETP6/GLAN_TXP
D23
SPI_CLK
D24
SPI_CS0#
F23
SPI_CS1#/GPIO58/CLGPIO6
D25
SPI_MOSI
E23
SPI_MISO
N4
OC0#/GPIO59
N5
OC1#/GPIO40
N6
OC2#/GPIO41
P6
OC3#/GPIO42
M1
OC4#/GPIO43
N2
OC5#/GPIO29
M4
OC6#/GPIO30
M3
OC7#/GPIO31
N3
OC8#/GPIO44
N1
OC9#/GPIO45
P5
OC10#/GPIO46
P3
OC11#/GPIO47
AG2
USBRBIAS
AG1
USBRBIAS#
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
1
R209
R209
1 2
0R0402-PAD
0R0402-PAD
1
RP4
RP4
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
USB
USB
4
TP55 TPAD14-GPTP55 TPAD14-GP
1
1222 modify R209
C405
C405
DY
DY
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
PLT_RST1# 7,24,30,31,33,34 PCLK_ICH 3
TP22 TPAD14-GPTP22 TPAD14-GP
SB
1120 add the net(SATACLKREQ#)
3D3V_S0
10
INT_PIRQD#
9
PCI_IRDY#
8
PCI_TRDY#
7
4 OF 6
4 OF 6
V27
DMI0RXN
V26
DMI0RXP
U29
DMI0TXN
U28
DMI0TXP
Y27
DMI1RXN
Y26
DMI1RXP
W29
DMI1TXN
W28
DMI1TXP
AB27
DMI2RXN
AB26
DMI2RXP
AA29
DMI2TXN
AA28
DMI2TXP
AD27
DMI3RXN
AD26
DMI3RXP
AC29
DMI3TXN
AC28
DMI3TXP
T26
DMI_CLKN
PCI-Express
PCI-Express
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
T25
DMI_CLKP
Direct Media Interface
Direct Media Interface
AF29 AF28
AC5
USBP0N
AC4
USBP0P
AD3
USBP1N
AD2
USBP1P
AC1
USBP2N
AC2
USBP2P
AA5
USBP3N
AA4
USBP3P
AB2
USBP4N
AB3
USBP4P
AA1
USBP5N
AA2
USBP5P
W5
USBP6N
W4
USBP6P
Y3
USBP7N
Y2
USBP7P
W1
USBP8N
W2
USBP8P
V2
USBP9N
V3
USBP9P
U5
USBP10N
U4
USBP10P
U1
USBP11N
U2
USBP11P
4
DMI_RXN0 7 DMI_RXP0 7 DMI_TXN0 7 DMI_TXP0 7
DMI_RXN1 7 DMI_RXP1 7 DMI_TXN1 7 DMI_TXP1 7
DMI_RXN2 7 DMI_RXP2 7 DMI_TXN2 7 DMI_TXP2 7
DMI_RXN3 7 DMI_RXP3 7 DMI_TXN3 7 DMI_TXP3 7
CLK_PCIE_ICH# 3 CLK_PCIE_ICH 3
DMI_IRCOMP_R
USBPN0 23
USBPP0 23
USBPN1 23
USBPP1 23
USBPN2 23
USBPP2 23 USBPN3 31 USBPP3 31 USBPN4 18 USBPP4 18
USBPN7 22 USBPP7 22
USBPN9 23 USBPP9 23
USBPN11 30 USBPP11 30
1017 modify USB signal connection
3D3V_S0
R225
R225
10KR2J-3-GP
10KR2J-3-GP
G61
G61
GAP-OPEN
GAP-OPEN
3
SMB_CLK15 SMB_DATA15
PM_SYNC#7
PM_STPPCI#3 PM_STPCPU#3
PM_CLKRUN#33
PCIE_WAKE#24
INT_SERIRQ33
THRM#32
VGATE_PWRGD32,41
12
EC_TMR33
21
MCH_ICH_SYNC#7
GPIO49 should be pulled down to GND only when using Teenah. When using Cantiga, this ball should be left as No Connect.
3D3V_S5
1D5V_S0
12
R224
R224 24D9R2F-L-GP
24D9R2F-L-GP
TP64TPAD14-GP TP64TPAD14-GP
ECSCI#_133
ECSWI#33
SATACLKREQ#3
TP68 TPAD14-GPTP68 TPAD14-GP
ACZ_SPKR26
TP51 TPAD14-GPTP51 TPAD14-GP
No Reboot Strap
SPKR LOW = Defaule
SATA0GP SATA1GP GPIO36 GPIO37
USB
Pair
Device
USB1
0
USB3
1
USB3
2
MINIC1
3
WEBCAM
4
NC
5
NC
6
Bluetooth
7
NC
8
USB2(High speed)
9 10
NC
LA14 0318 ADD USBPN1,USBPP1,USBPN2,USBPP2
11 CardReader
3
G16
ICH_TP7
AJ23
AG19
AH21
AG21
AE18
AJ22
AE19
AG22
AF21 AH24
AJ24 AH20
AJ20 AJ21
A13 E17 C17 B18
F19
G19
M6 A17 A14
E19
E20
M5
D21 A20
A21 C12 C21
AF8
D19
M7 B21
TP52TPAD14-GP TP52TPAD14-GP
TP19TPAD14-GP TP19TPAD14-GP TP63TPAD14-GP TP63TPAD14-GP TP69TPAD14-GP TP69TPAD14-GP
TP59TPAD14-GP TP59TPAD14-GP
SMB_LINK_ALERT# SMLINK0 SMLINK1
PM_RI# PM_SUS_STAT#
1
DBRESET#
SMB_ALERT#
R194
R194
1 2
DY
DY
SB_GPIO1
1
GPIO12
1
SB_GPIO13 PSW_CLR# GPIO18
1
GPIO20
1
GPIO22
1
SDATAOUT1 GPIO49
1
GPIO57
ICH_TP3
1
0R2J-2-GP
0R2J-2-GP
High=No Reboot
RN5
RN5
8 7 6
SRN10KJ-6-GP
SRN10KJ-6-GP
RP7
RP7
1 2 3 4 5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
GNT0 and SPI_CS#1 have a weak internal pull up
1 2 3 45
SMLINK0 SMLINK1
RSMRST#_SB
10
PWROK
9 8 7
GPIO57
U16C
U16C
SMBCLK SMBDATA LINKALERT#/GPIO60/CLGPIO4 SMLINK0 SMLINK1
RI#
R4
SUS_STAT#/LPCPD# SYS_RESET#
PMSYNC#/GPIO0 SMBALERT#/GPIO11 STP_PCI#
STP_CPU#
L4
CLKRUN# WAKE#
SERIRQ THRM#
VRMPWRGD SST TACH1/GPIO1
TACH2/GPIO6 TACH3/GPIO7 GPIO8 LAN_PHY_PWR_CTRL/GPIO12 ENERGY_DETECT/GPIO13 TACH0/GPIO17
K1
GPIO18 GPIO20 SCLOCK/GPIO22
A9
GPIO27 GPIO28
L1
SATACLKREQ#/GPIO35 SLOAD/GPIO38 SDATAOUT0/GPIO39 SDATAOUT1/GPIO48 GPIO49
A8
GPIO57/CLGPIO5 SPKR
MCH_SYNC# TP3 PWM0 PWM1 PWM2
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
USB_OC#1 PM_BATLOW#_R ECSWI# USB_OC#0 GPIO10
3D3V_S5
USB_OC#2 USB_OC#7 PM_RI#
3D3V_S5
BOOT BIOS Strap
SPI_CS#1 BOOT BIOS LocationPCI_GNT#0
0 1 SPI
A16 swap override strap
PCI_GNT#3
low = A16 swap override enable high = default
PCI_GNT#0 SPI_CS#1 PCI_GNT#3
01 11
1 2
R210
R210
1 2
R212
R212
1 2
R208
R208
2
SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37
SATA
GPIO
SATA
GPIO
SMB
SMB
Clocks
Clocks
S4_STATE#/GPIO26
DPRSLPVR/GPIO16
SYS GPIO
SYS GPIO
Power MGTController Link
Power MGTController Link
GPIO
GPIO
GPIO24/MEM_LED
GPIO10/SUS_PWR_ACK
GPIO14/AC_PRESENT
MISC
MISC
RP1
RP1
1 2 3 4 5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
RP2
RP2
1 2 3 4 5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
PCI LPC(Default)
1KR2J-1-GP
1KR2J-1-GP 1KR2J-1-GP
1KR2J-1-GP 1KR2J-1-GP
1KR2J-1-GP
DY
DY DY
DY DY
DY
2
3 OF 6
3 OF 6
CLK14 CLK48
SUSCLK
SLP_S3# SLP_S4# SLP_S5#
PWROK
BATLOW# PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0 CL_CLK1
CL_DATA0 CL_DATA1
CL_VREF0 CL_VREF1
CL_RST0# CL_RST1#
GPIO9/WOL_EN
10
USB_OC#5
9
SMB_LINK_ALERT#
8 7
SMB_ALERT#
10
USB_OC#4
9
DBRESET#
8
USB_OC#3PCIE_WAKE#
7
USB_OC#6
1
SATA0GP
AH23
SATA1GP
AF19
GPIO36
AE21
GPIO37
AD20 H1
AF3 P1 C16
E16
SLPS5#
G17
S4_STATE#
C10 G20
PM_DPRSLPVR
M2
PM_BATLOW#_R
B13
PWRBTN#_ICH
R3 D20
RSMRST#_SB
D22 R5 R6
PM_SLP_M#
B16 F24
B19 F22
C19
CL_VREF0_ICH
C25
CL_VREF1_ICH
A19 F21
D18
GPIO24
A16
GPIO10
C18
GPIO14
C11
GPIO9
C20
3D3V_S5
3D3V_S5
3D3V_S5
RSMRST#_KBC33
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CLK_ICH14 3 CLK48_ICH 3
PM_SUS_CLK 32
PM_SLP_S3# 33,39,43,44
PM_SLP_S4# 33,43,44
1
TP57 TPAD14-GPTP57 TPAD14-GP
1
TP53 TPAD14-GPTP53 TPAD14-GP
PWROK 7,39
R216
R216
1 2
DY
DY
100KR2J-1-GP
100KR2J-1-GP
D17
D17
1
BAS16-6-GP
BAS16-6-GP
CLK_PWRGD 3
PWROK 7,39
1
TP4 TPAD14-GPTP4 TPAD14-GP
CL_CLK0 7
CL_DATA0 7
CL_RST#0 7
TPAD14-GP
TPAD14-GP
1
TP3
TP3 TPAD14-GP
TPAD14-GP
1
TP54
TP54
C75
C75
DY
DY
USB_OC#8
1
USB_OC#9
2
USB_OC#10
3
USB_OC#11
4 5 6
DY
DY
2nd = 83.BAT54.X81
2nd = 83.BAT54.X81
3rd = 83.00054.Z81
3rd = 83.00054.Z81
ICH9-M (2 of 4)_PCIE/USB/DMI
ICH9-M (2 of 4)_PCIE/USB/DMI
ICH9-M (2 of 4)_PCIE/USB/DMI
3
83.00016.K11
83.00016.K11
2
Change D17 from 83.00016.B11 to 83.00016.K11
3D3V_S5
12
R55
R55
3K24R2F-GP
3K24R2F-GP
DY
DY
12
RP6
RP6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
3
BAT54-5-GP
BAT54-5-GP
83.BAT54.D81
83.BAT54.D81
LA14
LA14
LA14
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
R195
R195
1 2
0R2J-2-GP
0R2J-2-GP
R56
R56 453R2F-1-GP
453R2F-1-GP
DY
DY
10
SB_GPIO13
9
GPIO14
8 7
D15
D15
1
2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
PM_DPRSLPVR 7,41
PM_PWRBTN# 33
3D3V_S0
12
R204
R204
3K24R2F-GP
3K24R2F-GP
12
C390
C390
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
3D3V_S5
GLAN_DOCK# 12
RSMRST#_SB
12
R196
R196 100KR2J-1-GP
100KR2J-1-GP
of
13 52Thursday, May 07, 2009
of
13 52Thursday, May 07, 2009
of
13 52Thursday, May 07, 2009
R205
R205 453R2F-1-GP
453R2F-1-GP
SB
SB
SB
Page 14
5
1D5V_S0
646mA
D D
*Within a given well, 5VREF needs to be up before the corresponding 3.3V rail
2mA
C C
V5REF_S0
Layout Note: Place near ICH9
2mA
V5REF_S5 VccSus1_05
B B
3D3V_S0
C414
C414
D6
D6 RB751V-40-2-GP
RB751V-40-2-GP
83.R2004.B8F
83.R2004.B8F 2nd = 83.R0304.A8F
2nd = 83.R0304.A8F
K A
3rd = 83.R3004.A8F
3rd = 83.R3004.A8F
12
C72
C72 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
D7
D7 RB751V-40-2-GP
RB751V-40-2-GP
83.R2004.B8F
83.R2004.B8F 2nd = 83.R0304.A8F
2nd = 83.R0304.A8F
K A
3rd = 83.R3004.A8F
3rd = 83.R3004.A8F
12
C117
C117 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
5V_S0
5V_S53D3V_S5
12
12
C459
C459
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
DY
DY
1015 modify component size of C390,C419
12
R54
R54 100R2J-2-GP
100R2J-2-GP
12
R72
R72 100R2J-2-GP
100R2J-2-GP
1D5V_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C443
C443
C415
C415
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1D5V_S0
C454
C454
RTC_AUX_S5
C389
C389
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C453
C453
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
47mA
L14
L14
1 2
IND-1D2UH-10-GP
IND-1D2UH-10-GP
68.1R220.10D
68.1R220.10D
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1.34A
12
C452
C452
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C458
C458
USBPLL=11mA
12
19mA in S0;78mA in S3/S4/S5
12
C74
C74
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
A A
12
C409
C409
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
5
1D5V_S0
C397
C397
1D5V_S0
23mA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
80mA
12
12
DY
DY
1
1
C385
C385
2
2
C408
C408 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
4
6uA in G3
12
12
C388
C388
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C461
C461
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_APLL_S01D5V_S03D3V_S0
12
C476
C476
12
C440
C440
C413
C413
SC1U16V3ZY-GP
SC1U16V3ZY-GP
12
C472
C472
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
C473
C473
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
C73
C73
12
C421
C421 SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
1mA
4
V5REF_S0 V5REF_S5
12
12
C477
C477
SC1U16V3ZY-GP
SC1U16V3ZY-GP
12
SC1U16V3ZY-GP
SC1U16V3ZY-GP
DY
DY
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C451
C451 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VccLan1D05
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
A23
AE1
AA24 AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29
G25 H24 H25
K24 K25
M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27
U24 U25 V24 V25
U23 W24 W25
K23
AJ19
AC16 AD15 AD16 AE15 AF15 AG15 AH15
AJ15
AC11 AD11 AE11 AF11 AG10 AG11 AH10
AJ10
AC9
AC18 AC19
AC21
G10
AC12 AC13 AC14
AA7
AB6
AB7
AC6
AC7
A10
A11
A12
B12
A27
D28
D29
E26
E27
A26
A6
F25
J24 J25
L23 L24 L25
T24 T27 T28 T29
Y24 Y25
G9
AJ5
U16F
U16F
VCCRTC V5REF V5REF_SUS VCC1_5_B
VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B
VCCSATAPLL VCC1_5_A
VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A
VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A
VCC1_5_A VCC1_5_A
VCC1_5_A VCC1_5_A VCC1_5_A
VCC1_5_A VCC1_5_A
VCC1_5_A VCC1_5_A
VCCUSBPLL VCC1_5_A
VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A
VCCLAN1_05 VCCLAN1_05
VCCLAN3_3 VCCLAN3_3
VCCGLANPLL VCCGLAN1_5
VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5
VCCGLAN3_3
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
CORE
CORE
VCCA3GP ATXARX USB CORE
VCCA3GP ATXARX USB CORE
VCCP_CORE
VCCP_CORE
PCI
PCI
VCCPSUSVCCPUSB
VCCPSUSVCCPUSB
GLAN POWER
GLAN POWER
3
6 OF 6
6 OF 6
VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05
VCCDMIPLL
VCCDMI VCCDMI
V_CPU_IO V_CPU_IO
VCC3_3 VCC3_3 VCC3_3 VCC3_3
VCC3_3 VCC3_3 VCC3_3
VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3
VCCHDA
VCCSUSHDA
VCCSUS1_05 VCCSUS1_05
VCCSUS1_5 VCCSUS1_5
VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3
VCCSUS3_3 VCCSUS3_3
VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3
VCCCL1_05
VCCCL1_5 VCCCL3_3
VCCCL3_3
3
A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18
R29
1D05V_DMI_ICH_S0
W23 Y23
AB23 AC23
AG29 AJ6 AC10 AD19
AF20 AG24 AC20
B9 F9 G3 G6 J2 J7 K7
AJ4 AJ3 AC8
F17 AD8
1D5V_S5
F18
A18 D16 D17 E22
AF1 T1
T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7
VccSus1_05[3]
G22
VccSus1_5[3]
G23 A24
B24
12
C406
C406
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
12
12
C394
C394
DY
DY
12
C445
C445
1
12
12
12
C439
C439
C434
C434
C474
C474 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C444
C444
VCC3_3=308mA
3D3V_S0
12
12
C403
C403
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C410
C410 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
TP56 TPAD14-GPTP56 TPAD14-GP
C400
C400
C402
C402
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C399
C399
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
C432
C432
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
DY
DY
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
C447
C447
12
12
DY
DY
3D3V_S0
19mA in S0;73mA in S3/S4/S5
2
Place near ICH9MLayout Note:
C422
C422
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
DY
DY
C465
C465 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C412
C412
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_S5
12
1.63A
12
C441
C441
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1D5V_DMIPLL_ICH_S0
C431
C431
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
12
0R0603-PAD
0R0603-PAD
C448
C448 SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
3D3V_S0
3D3V_S0
12
C471
C471
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C401
C401 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
VCCSUS3_3=212mA
12
C437
C437 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
C411
C411
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
2
1D05V_S0
12
12
12
C423
C423
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
12
DY
DY
48mA
R221
R221
2mA
12
C436
C436
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
11mA
12
C475
C475 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S5
3D3V_S5
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
12
12
1 2
C435
C435 SC4D7U6D3V3MX-2GP
SC4D7U6D3V3MX-2GP
C407
C407
C395
C395
L11
L11
IND-1D2UH-10-GP
IND-1D2UH-10-GP
11mA
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
23mA
68.1R220.10D
68.1R220.10D
1D05V_S0
1D05V_S0
12
C417
C417
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
3D3V_S0
C470
C470 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ICH9-M (3 of 4)_POWER
ICH9-M (3 of 4)_POWER
ICH9-M (3 of 4)_POWER
1D5V_S0
3D3V_S5
C404
C404
C442
12
LA14
LA14
LA14
C442
C419
C419
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
SB
SB
of
14 52Thursday, May 07, 2009
of
14 52Thursday, May 07, 2009
of
14 52Thursday, May 07, 2009
1
SB
Page 15
A
U16E
U16E
AA26
VSS
AA27
VSS
AA3
VSS
AA6
VSS
AB1
VSS
AA23
VSS
AB28
VSS
AB29
VSS
AB4
VSS
AB5
VSS
AC17
VSS
4 4
3 3
2 2
1 1
A
AC26 AC27
AC3
AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29
AD4
AD5
AD6
AD7
AD9
AE12 AE13 AE14 AE16 AE17
AE2
AE20 AE24
AE3
AE4
AE6
AE9
AF13 AF16 AF18 AF22
AH26
AF26 AF27
AF5
AF7
AF9 AG13 AG16 AG18 AG20 AG23
AG3
AG6
AG9 AH12 AH14 AH17 AH19
AH2 AH22 AH25 AH28
AH5
AH8
AJ12 AJ14 AJ17
B11
B14
B17
B20
B23
C26
C27
E11
E14
E18
E21
E24
G12
G14
G18
G21
G24
G26
G27
H23
H28
H29
AJ8
B2
B5 B8
E2
E5
E8 F16 F28 F29
G8
H2
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
NCTF TEST PIN:
NCTF TEST PIN:
VSS VSS VSS
ICH9M-GP-NF
ICH9M-GP-NF
71.ICH9M.00U
71.ICH9M.00U
NCTF_VSS#A1 NCTF_VSS#A2
NCTF_VSS#B1 NCTF_VSS#A29 NCTF_VSS#A28 NCTF_VSS#B29
NCTF_VSS#AJ1 NCTF_VSS#AJ2
NCTF_VSS#AH1
NCTF_VSS#AJ28 NCTF_VSS#AJ29
A1,A2,B1,A28,A29,B29
AH1,AJ1,AJ2,AH29,AJ28,AJ29
A1,A2,B1,A28,A29,B29
AH1,AJ1,AJ2,AH29,AJ28,AJ29
NCTF_VSS#AH29
5 OF 6
5 OF 6
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
B
B
H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25
A1 A2 B1 A29 A28 B29 AJ1 AJ2 AH1 AJ28 AJ29 AH29
C
SMB_CLK13
SMB_DATA13
D
3D3V_S5 3D3V_S0
678
123
4 5
5V_S0
Q7
Q7
3 4 2 1
84.27002.E3F
84.27002.E3F
2N7002DW-2-GP-U
2N7002DW-2-GP-U
RN50
RN50 SRN2K2J-2-GP
SRN2K2J-2-GP
5 6
E
SMBC_ICH 3,16,17
SMBD_ICH 3,16,17
SMBUS
LA14 SA->SB
0403 Change Q7 from 84.27002.D3F to 84.27002.E3F
1 1 1 1 1 1 1 1 1 1 1 1
TP1TPAD14-GP TP1TPAD14-GP TP2TPAD14-GP TP2TPAD14-GP TP10TPAD14-GP TP10TPAD14-GP TP8TPAD14-GP TP8TPAD14-GP TP7TPAD14-GP TP7TPAD14-GP TP9TPAD14-GP TP9TPAD14-GP TP30TPAD14-GP TP30TPAD14-GP TP31TPAD14-GP TP31TPAD14-GP TP28TPAD14-GP TP28TPAD14-GP TP29TPAD14-GP TP29TPAD14-GP TP27TPAD14-GP TP27TPAD14-GP TP26TPAD14-GP TP26TPAD14-GP
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
LA14
LA14
LA14
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ICH9-M (4 of 4)
ICH9-M (4 of 4)
ICH9-M (4 of 4)
15 52Thursday, May 07, 2009
15 52Thursday, May 07, 2009
15 52Thursday, May 07, 2009
E
SB
SB
SB
of
Page 16
A
4 4
3 3
DDR_VREF_S3
2 2
12
C219
C219
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 1
DDR_VREF_S3
RN19
RN19
M_B_BS#1
1
8
M_B_A0
2
7
M_B_A2
3
6
M_B_A4
45
SRN56J-5-GP
SRN56J-5-GP
RN31
RN31
M_CKE3
1
8
M_CKE2
2
7
M_B_A12
3
6
M_B_BS#2
45
SRN56J-5-GP
SRN56J-5-GP
RN26
RN26
M_B_A6
1
8
M_B_A9
2
7
M_B_A8
3
6
M_B_A5
45
SRN56J-5-GP
SRN56J-5-GP
RN18
RN18
M_B_A1
1
8
M_B_A3
2
7
M_B_A10
3
6
M_B_WE#
45
SRN56J-5-GP
SRN56J-5-GP
RN10
RN10
M_B_RAS#
1
8
M_CS2#
2
7
M_ODT2
3
6
M_B_A13
45
SRN56J-5-GP
SRN56J-5-GP
RN27
RN27
M_B_A14
1
8
M_B_A11
2
7
M_B_A7
3
6
45
SRN56J-5-GP
SRN56J-5-GP
RN13
RN13
M_B_BS#0
1
8
M_B_CAS#
2
7
M_CS3#
3
6
M_ODT3
45
SRN56J-5-GP
SRN56J-5-GP
Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
12
12
C190
C190
C234
C234
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
12
12
C237
C237
C154
C154
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
PARALLEL TERMINATION
Put decap near power(0.9V) and pull-up resistor
12
12
12
C191
C191
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C243
C243
C206
C206
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
SCD1U16V2ZY-2GP
12
C171
C171
C223
C223
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
B
M_B_A[14..0]8
TP37TPAD14-GP TP37TPAD14-GP
M_B_BS#28 M_B_BS#08
M_B_BS#18
M_B_DQ[63..0]8
12
C217
C217
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_B_DQS#[7..0]8
M_B_DQS[7..0]8
DDR_VREF_S3_1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C292
C292
DY
DY
C
DM1
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15
1
M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7
M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7
M_ODT27 M_ODT37
12
12
C290
C290
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DM1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
DQS0#
29
DQS1#
49
DQS2#
68
DQS3#
129
DQS4#
146
DQS5#
167
DQS6#
186
DQS7#
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
OTD0
119
OTD1
1
VREF
2
VSS
202
GND
MH1
MH1
DDR2-200P-23-GP-U1
DDR2-200P-23-GP-U1
2nd = 62.10017.B51
2nd = 62.10017.B51 3rd = 62.10017.K51
3rd = 62.10017.K51
108
RAS#
109
WE#
113
CAS#
110
CS0#
115
CS1#
79
CKE0
80
CKE1
30
CK0
32
CK0#
164
CK1
166
CK1#
M_B_DM0
10
DM0
M_B_DM1
26
DM1
M_B_DM2
52
DM2
M_B_DM3
67
DM3
M_B_DM4
130
DM4
M_B_DM5
147
DM5
M_B_DM6
170
DM6
M_B_DM7
185
DM7
195
SDA
197
SCL
199
VDDSPD
198
SA0 SA1
NC#50 NC#69 NC#83
NC#120
NC#163/TEST
VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
REVERSE TYPE
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
GND MH2
High 9.2mm
62.10017.A71
62.10017.A71
DDRB_SA0
200 50
69 83 120 163
81 82 87 88 95 96 103 104 111 112 117 118
3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196
201 MH2
10KR2J-3-GP
10KR2J-3-GP
M_B_RAS# 8 M_B_WE# 8 M_B_CAS# 8
M_CS2# 7 M_CS3# 7
M_CKE2 7 M_CKE3 7
M_CLK_DDR2 7 M_CLK_DDR#2 7
M_CLK_DDR3 7 M_CLK_DDR#3 7
SMBD_ICH 3,15,17 SMBC_ICH 3,15,17
R220
R220
1D8V_S3
M_B_DM[7..0] 8
12
1D8V_S3
D
3D3V_S0
DY
DY
12
C428
C428 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
12
C200
C200
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DY
DY
12
C174
C174
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
Place these Caps near DM1
12
12
C488
C488
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C195
C195
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C502
C502
C503
C503
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DY
DY
12
12
C493
C493
C499
C499
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
E
12
C496
C496
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
DDR2 Socket 0 (DM1)
DDR2 Socket 0 (DM1)
DDR2 Socket 0 (DM1)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
LA14
LA14
LA14
E
SB
SB
SB
of
16 52Thursday, May 07, 2009
of
16 52Thursday, May 07, 2009
of
16 52Thursday, May 07, 2009
Page 17
A
B
C
D
E
4 4
3 3
DDR_VREF_S3
12
C188
C188
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
2 2
1 1
DDR_VREF_S3
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
8 7 6
Decoupling Capacitor
Put decap near power(0.9V) and pull-up resistor
1D8V_S3
12
C167
C167
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C241
C241
DY
DY
12
C495
C495
DY
DY
12
12
C232
C232
C216
C216
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
Place these Caps near DM2
12
C500
C500
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C212
C212
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
RN12
RN12
SRN56J-5-GP
SRN56J-5-GP
RN24
RN24
SRN56J-5-GP
SRN56J-5-GP
RN11
RN11
SRN56J-5-GP
SRN56J-5-GP
RN30
RN30
SRN56J-5-GP
SRN56J-5-GP
RN25
RN25
SRN56J-5-GP
SRN56J-5-GP
RN17
RN17
SRN56J-5-GP
SRN56J-5-GP
RN16
RN16
SRN56J-5-GP
SRN56J-5-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C486
C486
12
C491
C491
1 2 3 45
1 2 3 45
1 2 3 45
1 2 3 45
1 2 3 45
1 2 3 45
1 2 3 45
12
C233
C233
DY
DY
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
PARALLEL TERMINATION
Put decap near power(0.9V) and pull-up resistor
M_A_A13 M_CS0# M_ODT0 M_A_RAS#
M_A_A5 M_A_A8 M_A_A9 M_A_A3
M_A_WE# M_A_CAS# M_CS1# M_ODT1
M_CKE0 M_A_BS#2 M_A_A12
M_A_A7 M_A_A11 M_A_A14 M_CKE1
M_A_A2 M_A_A0 M_A_A6 M_A_A4
M_A_A1 M_A_BS#1 M_A_A10 M_A_BS#0
12
C236
C236
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
12
12
C168
C168
C498
C498
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
DY
DY
12
C238
C238
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
C187
C187
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
SC2D2U6D3V3MX-1-GP
SC2D2U6D3V3MX-1-GP
12
C170
C170
C189
C189
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
12
12
C215
C215
C249
C249
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
M_A_A[14..0]8
M_A_DQ[63..0]8
M_A_DQS#[7..0]8
M_A_DQS[7..0]8
DDR_VREF_S3_1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14
TP38TPAD14-GP TP38TPAD14-GP
M_A_BS#28 M_A_BS#08
M_A_BS#18
DY
DY
C293
C293
M_A_A15
1
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7
M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7
M_ODT07 M_ODT17
12
12
C291
C291
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DM2
DM2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16/BA2
107
BA0
106
BA1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
11
/DQS0
29
/DQS1
49
/DQS2
68
/DQS3
129
/DQS4
146
/DQS5
167
/DQS6
186
/DQS7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
114
ODT0
119
ODT1
1
VREF
2
VSS
202
GND
SKT-SODIMM20022U2GP
SKT-SODIMM20022U2GP
62.10017.691
62.10017.691
2nd = 62.10017.891
2nd = 62.10017.891 3rd = 62.10017.K41
3rd = 62.10017.K41
High 5.2mm
108
/RAS
109
/WE
113
/CAS
110
/CS0
115
/CS1
79
CKE0
80
CKE1
30
CK0
32
/CK0
164
CK1
166
/CK1
M_A_DM0
10
DM0
M_A_DM1
26
DM1
M_A_DM2
52
DM2
M_A_DM3
67
DM3
M_A_DM4
130
DM4
M_A_DM5
147
DM5
M_A_DM6
170
DM6
M_A_DM7
185
DM7
195
SDA
197
SCL
199
VDDSPD
198
SA0
200
SA1
50
NC#50
69
NC#69
83
NC#83
120
NC#120
163
NC#163/TEST
81
VDD
82
VDD
87
VDD
88
VDD
95
VDD
96
VDD
103
VDD
104
VDD
111
VDD
112
VDD
117
VDD
118
VDD
3
VSS
8
VSS
9
VSS
12
VSS
15
VSS
18
VSS
21
VSS
24
VSS
27
VSS
28
VSS
33
VSS
34
VSS
39
VSS
40
VSS
41
VSS
42
VSS
47
VSS
48
VSS
53
VSS
54
VSS
59
VSS
60
VSS
65
VSS
66
REVERSE TYPE
VSS
71
VSS
72
VSS
77
VSS
78
VSS
121
VSS
122
VSS
127
VSS
128
VSS
132
VSS
133
VSS
138
VSS
139
VSS
144
VSS
145
VSS
149
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
165
VSS
168
VSS
171
VSS
172
VSS
177
VSS
178
VSS
183
VSS
184
VSS
187
VSS
190
VSS
193
VSS
196
VSS
201
GND
12
C433
C433 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1D8V_S3
M_A_RAS# 8 M_A_WE# 8 M_A_CAS# 8
M_CS0# 7 M_CS1# 7
M_CKE0 7 M_CKE1 7
M_CLK_DDR0 7 M_CLK_DDR#0 7
M_CLK_DDR1 7 M_CLK_DDR#1 7
M_A_DM[7..0] 8
SMBD_ICH 3,15,16 SMBC_ICH 3,15,16
3D3V_S0
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
DDR2 Socket 1 (DM2)
DDR2 Socket 1 (DM2)
DDR2 Socket 1 (DM2)
LA14
LA14
LA14
E
17 52Thursday, May 07, 2009
17 52Thursday, May 07, 2009
17 52Thursday, May 07, 2009
SB
SB
SB
of
of
of
Page 18
LCDVDD
C302
C302
GMCH_TXAOUT2+7
GMCH_TXAOUT2-7
GMCH_TXAOUT1+7
GMCH_TXAOUT1-7
GMCH_TXAOUT0+7
GMCH_TXAOUT0-7
LCD/CCD CONN
1015 modify LCD1 pin define 1016 modify LCD1 pin define
1015 modify F1
12
C305
C305
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
12
SCD1U25V3ZY-1GP
SCD1U25V3ZY-1GP
BRIGHTNESS_CN
LCD1
LCD1
41 40
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 42
ACES-CONN40C-4-GP
ACES-CONN40C-4-GP
20.F1296.040
20.F1296.040
1 2
3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
12
C304
C304
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
GMCH_TXACLK+7
GMCH_TXACLK-7
1017 modify USB signal connection
1121 add EC87 for EMI demand
SB
1128 modify LCD1
SB
USBPN4_R USBPP4_R
CCD_PWR
CLK_DDC_EDID DAT_DDC_EDID
R126
R126
R125
R125
PWR_INVERTER
EC87
EC87
12
0R2J-2-GP
0R2J-2-GP
DY
DY
12
0R2J-2-GP
0R2J-2-GP
R124 33R2J-2-GPR124 33R2J-2-GP
12
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
L_BKLTCTL 7
BRIGHTNESS 33
12
POLYSW-1D1A24V-GP
POLYSW-1D1A24V-GP
2nd = 69.50007.A41
2nd = 69.50007.A41
CLK_DDC_EDID 7 DAT_DDC_EDID 7
BRIGHTNESS_CN
F2
F2
69.50007.A31
69.50007.A31
EC3
EC3
BLON_OUTBLON_OUT_1
12
12
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DCBATOUT
12
C3
C3 SC10U25V5KX-GP
SC10U25V5KX-GP
SB
CCD Pin Pin
Symbol CCD_PWR
1
USB­USB+
3 42GND 5
GND
R2 0R0402-PADR2 0R0402-PAD
1 2
R1 0R0402-PADR1 0R0402-PAD
1 2
12
C2
3D3V_S0
1201 modify C3
USBPN4 13 USBPP4 13
F1
F1
12
C1
C1
DY
DY
SCD1U16V2ZY-2GP
SC4D7U10V5ZY-3GPC2SC4D7U10V5ZY-3GP
SCD1U16V2ZY-2GP
1 2
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
69.50007.691
69.50007.691
2ND = 69.50007.771
2ND = 69.50007.771
3D3V_S0
USBPN4_R USBPP4_R
12
12
DY
DY
EC1
EC1
EC2
EC2
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
BLON_OUT
DY
DY
12
C309
C309
1014 swap the part
SRN2K2J-1-GP
SRN2K2J-1-GP
CLK_DDC_EDID DAT_DDC_EDID
SC100P50V2JN-3GP
SC100P50V2JN-3GP
RN34
RN34
12
C308
C308
DY
DY
3D3V_S0
1
23
4
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1106 modify R125,R126
SB
1125 modify R125,R126
SB
BLON_OUT 33
Layout 40 mil
LCDVDD 3D3V_S0
U30
U30
GMCH_LCDVDD_ON7
GMCH_LCDVDD_ON
DY
DY
12
C306
C306
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SB
C303
C303
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1
EN
2
GND
3
12
DY
DY
VOUT
RT9724GB-GP
RT9724GB-GP
2nd = 74.05285.07F
2nd = 74.05285.07F
VIN#5 VIN#4
74.09724.09F
74.09724.09F
5 4
C307
C307
1015 modify component size of C303,C307
1
1229 modify U30
12
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
LCD CONN
LCD CONN
LCD CONN
LA14
LA14
LA14
18 52Thursday, May 07, 2009
18 52Thursday, May 07, 2009
18 52Thursday, May 07, 2009
SB
SB
SB
Page 19
A
Layout Note: Place these resistors close to the CRT-out connector
4 4
GMCH_RED7
GMCH_GREEN7
GMCH_BLUE7
RN39
RN39
SRN150F-1-GP
SRN150F-1-GP
123
678
4 5
B
Ferrite bead impedance: 10 ohm@100MHz
L3
L3
1 2
PBY160808T-170Y-N-GP
PBY160808T-170Y-N-GP
L2
L2
1 2
PBY160808T-170Y-N-GP
PBY160808T-170Y-N-GP
L1
L1
1 2
PBY160808T-170Y-N-GP
12
DY
DY
EC20
EC20
12
EC19
EC19
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
DY
DY
12
EC18
EC18
SC3P50V2CN-1-GP
SC3P50V2CN-1-GP
DY
DY
PBY160808T-170Y-N-GP
12
C46
C46
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
1016 modify L1,L2 and L3 0105 modify L1,L2 and L3
1
C
CRT_R
CRT_G
12
C42
C42
C38
C38
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
SC6D8P50V2DN-GP
CRT_B
12
GMCH_HSYNC7
GMCH_VSYNC7
D
Hsync & Vsync level shift
14
5 6
DY
DY
DY
12
C21
C21
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
12
C27
C27
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
7
2nd = 73.74125.L12
2nd = 73.74125.L12
5V_S0
14
2 3
4
TSAHCT125PW-GP
TSAHCT125PW-GP
7
2nd = 73.74125.L12
2nd = 73.74125.L12
U8B
U8B
73.74125.L13
73.74125.L13
1016 modify U8
12
C44
C44 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
U8A
U8A
TSAHCT125PW-GP
TSAHCT125PW-GP
73.74125.L13
73.74125.L13
E
CRT_HSYNC1
CRT_VSYNC1
Layout Note: * Must be a ground return path between this ground and the ground on the VGA connector.
3 3
Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. RGB will hit 75 Ohm first, pi-filter, then CRT CONN.
CRT I/F & CONNECTOR
CRT1
2 2
CRT_R
5V_CRT_S0
C39
C39 SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 1
12
C30
C30
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
12
12
C23
C23
C20
C20
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
DY
SC100P50V2JN-3GP
SC100P50V2JN-3GP
A
CRT_G CRT_B
CRT_IN#_R
CRT_VSYNC1 CRT_HSYNC1 CLK_DDC1_5 DAT_DDC1_5
12
C26
C26 SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
CRT1
17
6 1
11
7 2
12 8 3
13 9 4
10
14 5
15
16
VIDEO-15-75-GP-U
VIDEO-15-75-GP-U
20.20715.015
20.20715.015
2nd = 20.20728.015
2nd = 20.20728.015 3rd = 20.20799.015
3rd = 20.20799.015
CRT_IN#_R36
SB
DAT_DDC1_5 CRT_HSYNC1 CRT_VSYNC1 CLK_DDC1_5
1127 modify CRT1
CRT_IN#_R
12
C40
C40 SC100P50V2JN-3GP
SC100P50V2JN-3GP
B
3
D3
D3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
6 1 7 2 8 3 9 4 10 5
5V_S0
2
1
C
1014 swap these nets
GMCH_DDCCLK7 GMCH_DDCDATA7
LA14 SA->SB
0403 Change Q5 from 84.27002.D3F to 84.27002.E3F
DDC_CLK & DATA level shift
5V_CRT_S0
3D3V_S0
RN38
RN38
SRN2K2J-1-GP
SRN2K2J-1-GP
D
4
1
2 3
1 2
FUSE-1D1A6V-4GP-U
FUSE-1D1A6V-4GP-U
2nd = 69.50007.771
2nd = 69.50007.771
5 6
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
F3
F3
69.50007.691
69.50007.691
Q5
Q5
34 2 1
2N7002DW-2-GP-U
2N7002DW-2-GP-U
84.27002.E3F
84.27002.E3F
CRT Connector
CRT Connector
CRT Connector
5V_CRT_DDC
LA14
LA14
LA14
5V_S0
83.R5003.C8F
83.R5003.C8F
2nd = 83.R5003.H8H
2nd = 83.R5003.H8H 3rd = 83.5R003.08F
3rd = 83.5R003.08F
CH551H-30PT-GP
CH551H-30PT-GP D4
D4
2 1
1016 modify D4
678
RN37
RN37
SRN10KJ-6-GP
SRN10KJ-6-GP
123
4 5
1014 swap these nets
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
E
CRT_IN#_R CLK_DDC1_5
DAT_DDC1_5
19 52Thursday, May 07, 2009
19 52Thursday, May 07, 2009
19 52Thursday, May 07, 2009
3D3V_S0
of
SB
SB
SB
Page 20
5
D D
4
3
2
1
SATA Connector
0912 add these parts for EMI demand 1001 delete these parts for EMI demand
SATA1
SATA1
23 NP1
C C
SKT-SATA22P-47-GP-U
B B
SKT-SATA22P-47-GP-U
2nd = 62.10065.781
2nd = 62.10065.781
1 2
3 4 5 6 7
8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 NP2 24
62.10065.741
62.10065.741
1021 modify SATA1
SATA_TXP0 12 SATA_TXN0 12
SATA_RXN0 12 SATA_RXP0 12
1021 modify TC5 1222 modify TC5
1
12
TC5
TC5
5V_S0
12
C50
C50
SCD1U16V2ZY-2GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
2nd = 83.2R004.H8M
2nd = 83.2R004.H8M
1
KA
D5
D5 SR24-GP
SR24-GP
DY
DY
83.2R004.J8M
83.2R004.J8M
1016 modify D5 1224 modify D5
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
HDD
HDD
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
HDD
LA14
LA14
LA14
20 52Thursday, May 07, 2009
20 52Thursday, May 07, 2009
20 52Thursday, May 07, 2009
1
SB
SB
SB
Page 21
5
4
3
2
1
SATA ODD Connector
D D
0912 add these parts for EMI demand
5V_S0
12
C C
C273
C273
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
TC7
TC7
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SATA_TXP112
SATA_TXN112 SATA_RXP112 SATA_RXN112
NP1 NP2
1001 delete these parts for EMI demand
1
1230 modify ODD1
1
1231 modify ODD1
1
0113 modify ODD1
ODD1
ODD1
P2
+5V
P3
S2 S3 S6 S5
MD
+5V
A+
GND
A-
GND
B+
GND
B-
GND GND
NP1
GND
NP2
GND
SKT-SATA7P+6P-73-GP
SKT-SATA7P+6P-73-GP
62.10065.881
62.10065.881
DP
ODD_MD
P4
S1 S4 S7 P5 P6 8 9
ODD_DP
P1
1 1
TP40 TPAD14-GPTP40 TPAD14-GP TP39 TPAD14-GPTP39 TPAD14-GP
B B
<Core Design>
<Core Design>
<Core Design>
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
ODD
ODD
ODD
LA14
LA14
LA14
21 52Thursday, May 07, 2009
21 52Thursday, May 07, 2009
21 52Thursday, May 07, 2009
1
SB
SB
of
of
of
SB
Page 22
5
4
3
2
1
BLUETOOTH MODULE
1.5A / High Active Voltage 2V
D D
3D3V_BT_S0
3D3V_BT_S0
DY
DY
12
EC85
EC85 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC21 put near BLUE1 / all USB put one choke near
C C
connector by EMI request
ETY-CON4-21-GP-U
ETY-CON4-21-GP-U
2nd = 20.D0197.104
2nd = 20.D0197.104
0930 modify BLUE1
B B
1017 modify BLUE1
DY
DY
U48
U48
1
VOUT
2
GND FLG#3EN
RT9715CGBG-GP
RT9715CGBG-GP
74.09715.A7F
74.09715.A7F
2nd = 74.05240.A7F
2nd = 74.05240.A7F
DY
DY
BLUE1
BLUE1
6 4
3 2
1 5
20.F0984.004
20.F0984.004
VIN
5 4
USB_7-
USB_7+
3D3V_BT_S0
SB
3D3V_S0
C530
C530
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
1 2
BLUETOOTH_EN 33
DY
DY
1113 modify U48
12
EC92
EC92
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
1125 add EC92 and EC93
SB
EC93
EC93
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
R123
R123 0R0402-PAD
0R0402-PAD
12 12
R122
12
DY
DY
R122 0R0402-PAD
0R0402-PAD
USB_7-48 USB_7+48
3D3V_BT_S048
USBPN7 13 USBPP7 13
USB_7­USB_7+ 3D3V_BT_S0
1017 modify USB signal connection
<Core Design>
<Core Design>
<Core Design>
A A
Title
Title
Title
Bluetooth
Bluetooth
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Bluetooth
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LA14
LA14
LA14
22 52Thursday, May 07, 2009
22 52Thursday, May 07, 2009
22 52Thursday, May 07, 2009
1
SB
SB
of
of
of
SB
Page 23
5
4
3
2
1
1017 modify USB signal connection
D D
USBPN913 USBPP913
Modify 04/27 Change R218,R219,R244,R245 from 0ohm to 12ohm
C C
USBPN013 USBPP013
USBPN113
B B
USBPP113
USBPN213 USBPP213
LA14 SA->SB
0330 ADD USB3
0912 add these parts for EMI demand
USB_0­USB_0+ USB_9-
A A
5
USB_9+
DY
DY
4
1021 modify and swap these parts(USB1 and USB2)
12
EC72
EC72
SC12P50V2JN-1-N3
SC12P50V2JN-1-N3
R218
R218
12R2F-1-GP
12R2F-1-GP
R219
R219
12R2F-1-GP
12R2F-1-GP
R244
R244
12R2F-1-GP
12R2F-1-GP
R245
R245
12R2F-1-GP
12R2F-1-GP
12
DY
DY
EC70
EC70
12 12
12 12
DY
DY
SC12P50V2JN-1-N3
SC12P50V2JN-1-N3
5V_USB1_S0
USB_9­USB_9+
5V_USB1_S0
12
USB_0­USB_0+
EC76
EC76
SC12P50V2JN-1-N3
SC12P50V2JN-1-N3
5V_USB2_S0
12
DY
DY
EC75
EC75
USB2
SC12P50V2JN-1-N3
SC12P50V2JN-1-N3
USB2
USB2
6 8 1
2 3 4 7 5
SKT-USB-177-GP
SKT-USB-177-GP
22.10218.U11
22.10218.U11
2nd = 22.10321.151
2nd = 22.10321.151
USB1
USB1
USB1
6 8 1
2 3 4 7 5
SKT-USB-177-GP
SKT-USB-177-GP
22.10218.U11
22.10218.U11
2nd = 22.10321.151
2nd = 22.10321.151
USB3
9 1 2
3 4 5 6 7 8
10
ACES-CON8-15-GP
ACES-CON8-15-GP
20.K0315.008
20.K0315.008
USB3
USB3
3
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
C142
C142
SC4D7U10V3KX-GP
SC4D7U10V3KX-GP
5V_S5 5V_USB2_S0
12
C245
C245
ST150U6D3VBM-2-GP
ST150U6D3VBM-2-GP
5V_S5 5V_USB1_S0
12
1021 delete TC23
ST150U6D3VBM-2-GP
ST150U6D3VBM-2-GP
2
U49
U49
1
GND
2
VIN
3
VIN EN#4FLG#
RT9715DGF-GP
RT9715DGF-GP
74.09715.079
74.09715.079
2nd = 74.00547.A79
2nd = 74.00547.A79
100 mil
12
DY
DY
TC23
TC23
80.15715.12L
80.15715.12L
2nd = 77.C1571.09L
2nd = 77.C1571.09L
U12
U12
1
GND
2
VIN
3
VIN EN#4FLG#
RT9715DGF-GP
RT9715DGF-GP
74.09715.079
74.09715.079
2nd = 74.00547.A79
2nd = 74.00547.A79
100 mil
12
TC22
TC22
80.15715.12L
80.15715.12L
2nd = 77.C1571.09L
2nd = 77.C1571.09L
5V_USB2_S0
12
EC71
EC71
DY
DY
VOUT VOUT VOUT
5V_USB1_S0
12
EC69
EC69
DY
DY
8
VOUT
7
VOUT
6
VOUT
5
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC96
EC96
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1 2
DY
DY
8 7 6 5
12
DY
DY
1M
0204 modify the symbol of EC74 (page23)
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC74
EC74
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
DY
DY
1 2
USB_OC#1 13USB_PWR_EN#33
EC44
EC44
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
LA14 SA->SB
0330 Modify 5V_USB2_S0,ADD U49 C245,TC23
USB_OC#0 13USB_PWR_EN#33
EC32
EC32 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
USB
USB
USB
LA14
LA14
LA14
1
of
23 52Thursday, May 07, 2009
of
23 52Thursday, May 07, 2009
of
23 52Thursday, May 07, 2009
SB
SB
SB
Page 24
5
4
3
2
1
1015 modify component size of R69
3D3V_S5 3D3V_LAN_S5
R69
R69
1 2
0R0402-PAD
12
D D
R70
R70
10KR2J-3-GP
10KR2J-3-GP
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C C
1 2
0R0402-PAD
1
1
C118
C118
C122
C122
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
2
LAN_ACT_LED
12
LA14 SA->SB
0401 DY C109
C109
C109
C102
C102 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1
1
C119
C119
SB
SC10U6D3V5KX-2GP
SC10U6D3V5KX-2GP
DY
DY
2
2
DY
DY
FOR AR8114A LAN_ACT_LED is high enable pin
12
DY
DY
C104
C104
12
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
Close to AR8114 Pin2
12
C116
C116
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U6D3V5KX-2GP
SC10U6D3V5KX-2GP
10M/100M_LED#25
3D3V_LAN_S5
PCIE_WAKE#13
LAN_ACT_LED25
1001 modify RN9 1014 swap these nets
C94
MDI1­MDI1+ MDI0­MDI0+
RN9
RN9
1 2 3 4 5
SRN49D9F-1-GP
SRN49D9F-1-GP
8 7 6
MDIS1_LAN MDIS0_LAN
C94
C95
C95
1 2 1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1015 modify component size of R79
B B
3D3V_LAN_S5
1222 modify R79
-1
1 2
0R0402-PAD
0R0402-PAD
4K7R2J-2-GP
4K7R2J-2-GP
CTRL12_R
2nd = 84.DCP69.01B
2nd = 84.DCP69.01B 3rd = 84.00069.A1B
3rd = 84.00069.A1B
1016 modify Q8
CTRL12
A A
1
R307
R307
0R2J-2-GP
0R2J-2-GP
AR8132
AR8132
R308
R308
0R2J-2-GP
0R2J-2-GP
AR8114
AR8114
R79
R79
12
R66
R66
84.00069.B1B
84.00069.B1B
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AVDDH
12
CTRL12_R
12
3D3V_LAN_S5_2
3
BCP69-GP
BCP69-GP
1
Q8
Q8
2
AR8114
AR8114
C115
C115
SB
DY
DY
1224 add R307 and R308
5
1222 modify R69
1
PCIE_TXP113 PCIE_TXN113
1D2V_LAN_S5_D
1D2V_LAN_S5_D
44
47
46
48
49
U11
U11
GND
VDD18O LAN_RST CTRL12
AVDDHO 1D2V_LAN_S5
LANX1 LANX2
R59
R59 2K37R2F-GP
2K37R2F-GP
1 2
MDI0+25 MDI0-25
MDI1+25 MDI1-25
12
C143
C143
DY
DY
1D2V_LAN_S5
12
1D2V_LAN_S5_D 1D2V_LAN_S5
1
1224 modify R67
Atheros suggestion change to Bead 60 ohms/100Mhz 500mA (68.60090.0D1)
1 2 3 4 5 6 7 8
9 10 11 12
C146
C146 SC4D7U6D3V3KX-GP
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
AR8114
AR8114
SC4D7U6D3V3KX-GP
1 2
C132
C132 SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R67
R67
1 2
0R0402-PAD
0R0402-PAD
LX VDD3V PERST# WAKE# VDD25V VDD17 SEL_25MHZ VDD11_REG XTLO XTLI AVDD_REG RBIAS
AR8132-AL1E-R-GP
AR8132-AL1E-R-GP
4
RX_N
LED_ACT#
DVDD_REG45DVDD_REG
LED_10_100#
TRXP013TRXN014VDDHO15AVVDL16TRXP117TRXN118AVDDH19NC#2020NC#2121AVDDL22NC#2323NC#24
MDI0+
MDI0-
MDI1+
1D2V_LAN_S5
AVDDL_REG
43
42
41
RX_P
AVDDL
REFCLKP
MDI1-
CLK_PCIE_LAN_1 CLK_PCIE_LAN#_1
1D2V_LAN_S5
37
38
39
40
TX_P
TX_N
AVDDL
REFCLKN
AVDDL
NO_CONN
TESTMODE
SMDATA
DVDDL SMCLK
TWSI_DATA
TWSI_CLK
DVDDL
CLKREQ#
NC#26
AVDDH
24
AVDDH
1D2V_LAN_S5
AR8132
AR8132
1D8V_LAN_S5
1 2
C127 SCD1U10V2KX-4GPC127 SCD1U10V2KX-4GP
1 2
C126 SCD1U10V2KX-4GPC126 SCD1U10V2KX-4GP
LAN_RXP1 LAN_RXN1
36 35 34 33 32 31 30 29 28 27 26 25
AR8114 use 0ohm resister AR8132 Atheros suggest to change 4.7uH choke
1D8V_LAN_S5
C537
C537
1 2
C130 SCD1U10V2KX-4GPC130 SCD1U10V2KX-4GP
1 2
C129 SCD1U10V2KX-4GPC129 SCD1U10V2KX-4GP
Modify 0504 SB->SC Change U11 P/N to 71.08132.M01
1D2V_LAN_S5
1D2V_LAN_S5_D VPD_DATA
VPD_CLK 1D2V_LAN_S5_D
PLT_RST1#7,13,30,31,33,34
1229 modify L19
1
1 2
IND-4D7UH-39-GP
IND-4D7UH-39-GP
12
12
C538
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C538
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
AR8132
AR8132
CLK_PCIE_LAN 3 CLK_PCIE_LAN# 3
TP24 TPAD14-GPTP24 TPAD14-GP
1
TPAD14-GP
TPAD14-GP
1
TP23
TP23
1222 modify R68
1
L19
L19
AR8132
AR8132
R295
R295
0R2J-2-GP
0R2J-2-GP
AR8114
AR8114
DY
DY
LA14 SA->SB
0401 DY R303
R68
R68
1 2
0R0402-PAD
0R0402-PAD
DY
DY
12
PCIE_RXP1 13
PCIE_RXN1 13
3D3V_LAN_S5
12
SB
R61
R61
4K7R2J-2-GP
4K7R2J-2-GP
12
C114
C114 SC220P50V2JN-3GP
SC220P50V2JN-3GP
VDD18O
SB
C121
C121 SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
Close to AR8114 Pin1
R296
R296
0R2J-2-GP
0R2J-2-GP
AR8132
AR8132
12
AR8114
AR8114
AR8114
AR8114
C539
C539 SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
R297
R297
0R2J-2-GP
0R2J-2-GP
AVDDHAVDDHO
12
Close to AR8114 Pin6
3
AR8132 use 0 ohm resiter AR8114A Atheros suggestion change to Bead
60 ohms/100Mhz 500mA (68.60090.0D1)
AVDDL_REG
1016 modify RN53 and U10
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
Close to U13 Pin8
U10
U10
1
NC#1
1126 add R303,R304
DY
DY
R303
R303
12
LAN_RST
12
R304
R304
0R2J-2-GP
0R2J-2-GP
AR8114
AR8114
PCIE_REQ_LAN# 3
SB
1128 Add L19
1D8V_LAN_S5
C89 SCD1U10V2KX-4GP
C89 SCD1U10V2KX-4GP
SB
C120 SC1KP50V2KX-1GPC120 SC1KP50V2KX-1GP
DY
DY
1 2
1 2
2
2
NC#2
3
E2 VSS4SDA
M24C08-WMN6TP-GP
M24C08-WMN6TP-GP
2nd = 72.24C08.J01
2nd = 72.24C08.J01
82.30020.791
82.30020.791
2nd = 82.30020.851
2nd = 82.30020.851
X3
X3
1 2
12
XTAL-25MHZ-96GP
XTAL-25MHZ-96GP
C103
C103 SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
Close to AR8114 Pin28 Close to AR8114 Pin32 Close to AR8114 Pin45 Close to AR8114 Pin46
Close to AR8114 Pin8 Close to AR8114 Pin16 Close to AR8114 Pin22 Close to AR8114 Pin36 Close to AR8114 Pin39
Close to AR8114 Pin6 Close to AR8114 Pin15 Close to AR8114 Pin19 Close to AR8114 Pin25
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
Date: Sheet
1D2V_LAN_S5
R71
R71 0R0402-PAD
0R0402-PAD
1
1 2
C128
C128 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
C449
C449
1 2
VCC WC#
SCL
72.24C08.I01
72.24C08.I01
3D3V_LAN_S5
8 7 6 5
1224 modify R71
1
23
4
SB
1113 modify C103 and C106
LANX1LANX2
12
C106
C106 SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
SB
SB
SB
AVDDH
SB
Atheros AR8114/8132
Atheros AR8114/8132
Atheros AR8114/8132
LA14
LA14
LA14
RN53
RN53 SRN4K7J-8-GP
SRN4K7J-8-GP
VPD_CLK
VPD_DATA
1D2V_LAN_S5_D
1D2V_LAN_S5
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
DY
DY
1 2
C113 SCD1U10V2KX-4GP
C113 SCD1U10V2KX-4GP
1 2
C107 SCD1U10V2KX-4GPC107 SCD1U10V2KX-4GP
1 2
C124 SCD1U10V2KX-4GP
C124 SCD1U10V2KX-4GP
DY
DY
1 2
C123 SCD1U10V2KX-4GPC123 SCD1U10V2KX-4GP
DY
DY
1 2
C101 SCD1U10V2KX-4GP
C101 SCD1U10V2KX-4GP
1 2
C125 SCD1U10V2KX-4GPC125 SCD1U10V2KX-4GP
1 2
C108 SCD1U10V2KX-4GPC108 SCD1U10V2KX-4GP
1 2
C99 SCD1U10V2KX-4GPC99 SCD1U10V2KX-4GP
1 2
C131 SCD1U10V2KX-4GP
C131 SCD1U10V2KX-4GP
DY
DY
1 2
C110 SC1U6D3V2KX-GPC110 SC1U6D3V2KX-GP
1 2
C105 SCD1U10V2KX-4GPC105 SCD1U10V2KX-4GP
1 2
C98 SCD1U10V2KX-4GPC98 SCD1U10V2KX-4GP
1 2
C100 SCD1U10V2KX-4GP
C100 SCD1U10V2KX-4GP
DY
DY
of
24 52Thursday, May 07, 2009
24 52Thursday, May 07, 2009
24 52Thursday, May 07, 2009
1
SB
SB
SB
Page 25
A
B
C
D
E
3D3V_LAN_S5
10M/100M_LED#
R214
R214
1 2
510R2F-L-GP
510R2F-L-GP
4 4
CONN_PWR_2 ACT_LED_B2 ACT_LED_B1
DY
DY
EC67 SC1KP50V2KX-1GP
EC67 SC1KP50V2KX-1GP
1 2
DY
DY
EC68 SC1KP50V2KX-1GP
EC68 SC1KP50V2KX-1GP
1 2
DY
DY
EC61 SC1KP50V2KX-1GP
EC61 SC1KP50V2KX-1GP
1 2
DY
DY
EC64 SC1KP50V2KX-1GP
EC64 SC1KP50V2KX-1GP
1 2
10M/100M_LED#24
SB
R298 0R2J-2-GPR298 0R2J-2-GP
LAN_ACT_LED24
1 2
ACT_LED_B1
LA14 SA->SB
R301
R301
1 2
510R2F-L-GP
510R2F-L-GP
ACT_LED_B2
0313 Del R299,R300
10/100 Lan Transformer
XF1
1D8V_LAN_S5
3 3
1222 modify R58
SB SB
12
C85
C85
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
MDI1-24
MDI1+24
12
C86
C86
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
12
12
C88
C88
C87
C87
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
DY
DY
DY
DY
MDI0-24
MDI0+24
XF1
1 3 10 2 5 4 6
XFORM-271-GP
XFORM-271-GP
68.HD081.301
68.HD081.301
2nd = 68.68160.30B
2nd = 68.68160.30B
12
11 8 9 7
LAN Connector
RJ1
RJ1
9 A1 A2 A3
1
2
3
4
5
6
7
8 B1
B2
10
RJ45-125-GP-U1
RJ45-125-GP-U1
22.10277.021
22.10277.021
2nd = 22.10277.231
2nd = 22.10277.231
1204 modify second source of RJ1
MCT1 MCT2 RJ45_45 RJ45_78
123
45
RN6
RN6
SRN75J-1-GP
SRN75J-1-GP
678
LAN_TERMINAL
RJ45_6 MCT2 RJ45_3 RJ45_2 MCT1 RJ45_1
SB
CONN_PWR_2 RJ45_1 RJ45_2
RJ45_3 RJ45_45
RJ45_6 RJ45_78
ACT_LED_B1 ACT_LED_B2
SB
C64
C64
1 2
SC1KP2KV8KX-GP
SC1KP2KV8KX-GP
A2(+) A1(-)::GREEN
A2(+) A3(-):ORANGE
B1(+) B2(-):YELLOW
1016 modify XF1
2 2
1.route on bottom as differential pairs.
2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.
3.No vias, No 90 degree bends.
4.pairs must be equal lengths.
5.6mil trace width,12mil separation.
6.36mil between pairs and any other trace.
7.Must not cross ground moat,except RJ-45 moat.
RJ11 signal must leave the other signal or power plane 100mil.
DOC_TIP,DOC_RING,TIP,RING: W/S : 10/100 @ Surface layers 10/20 @ Inner layers
10/100 LAN Transformer RJ45 PIN
1 1
RJ45-1 RJ45-2
RJ45-3 RJ45-6
B
C
D
TD+ --> TX+ TD- --> TX-
RD+ --> RX+ RD- --> RX-
A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
LAN Connector
LAN Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet
Date: Sheet
Date: Sheet
LAN Connector
LA14
LA14
LA14
E
of
of
of
25
25
25
SB
SB
SB
52Thursday, May 07, 2009
52Thursday, May 07, 2009
52Thursday, May 07, 2009
Page 26
5
3D3V_S0
D D
1118 delete C245 and C270
SB
0911 add net name(DVDD_1_8)
0911 add net name(ACZ_SDATAIN0_R)
ACZ_RST#_AUDIO12
ACZ_BITCLK_AUDIO12
ACZ_SYNC_AUDIO12
ACZ_SDATAIN012
ACZ_SDATAOUT_AUDIO12
1126 add C541 and modify R101
ACZ_SDATAOUT_AUDIO
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
C541
C541
12
C C
SB
1M
0121 add R310
RN56
RN56
KBC_BEEP33
ACZ_SPKR13
1 2 3
SRN1KJ-7-GP
SRN1KJ-7-GP
EAPD#27
R101
R101
1 2
ACZ_SDATAOUT_AUDIO
AUDIO_BEEP
4
47R2J-2-GP
47R2J-2-GP
C501
C501
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
PC BEEP GAIN CONTROL
Default gain is -6dB without populating the 10K-ohms pull-down resistors going to GPIO1 and GPIO2.
B B
AUD_GPIO1
R105
R105
10KR2J-3-GP
10KR2J-3-GP
1 2
10K GPIO RESISTORS
GAIN
R105 R106
Populate Populate
0dB
-6dB
Omit
Populate
-12dB
Omit
A A
-18dB
0912 add the part for EMI demand
ACZ_BITCLK_AUDIO
Omit
Omit
Populate
AUD_GPIO2
R106
R106
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1 2
12
EC35
EC35
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
4
R102
R102
1 2
0R0603-PAD
0R0603-PAD
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
ACZ_SDATAIN0_R
R310
R310
1 2
100KR2J-1-GP
100KR2J-1-GP
AUDIP_PC_BEEP
12
C259
C259
3D3V_S0
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AUD_GPIO2 AUD_GPIO1
CX20561-15Z-GP
CX20561-15Z-GP
DY
DY
11
10
43 42
12
48
45 46 47
C247
C247
6 8
5
1 2
12
U18
U18
12
C248
C248
C242
C242
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
RESET# BIT_CLK
SYNC SDATA_IN SDATA_OUT
DIB_P DIB_N
PC_BEEP
S/PDIF
GPIO2 GPIO1 EAPD#/GPIO0
DMIC_CLOCK DMIC_1/2
VDD_20561
3VA_S0
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DVDD_1_8
44
4
3
26
DVDD
DVDD_3_3
40
AVDD
AVDD
5.11K
9
VDD_IO
DVDD_1_8
39.2K
CX20561
AVSS
DVSS
AVSS
DVSS
GND
7
38
41
25
49
12
C264
C264 SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AUD_AVEE
12
DY
DY
36
AVEE
PORTA_L
PORTA_R MICBIASB
MIC_L MIC_R
MICBIASC
PORTC_L
20K
PORTC_R
PORTD_L PORTD_R
PORTB_L
10K
PORTB_R
MONO
STEREO_L
STEREO_R
SENSEA
VREF
FLY_P FLY_N
VREF_LO
VREF_HI RESERVED#32 RESERVED#33
CX_SENSE
3
3VA_S0 3D3V_S0
12
C276
C276
C277
C277
1113 modify 2nd of U19
SB
1118 delete R107 and add L18
SB
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
34 35
19 20 21
18 16 17
27 28
14 15
29 30 31
13 24 39
37 22
23 32 33
MIC1-L_PORT-C MIC1-R_PORT-C
CX_SENSE AUD_AVREF FLY_P
1 2
FLY_N VREF_LO
VREF_HI
C271
C271
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
C505
C505
SC1U10V3KX-3GP
SC1U10V3KX-3GP
12
FRONTL 28 FRONTR 28
C251 SC2D2U10V3KX-1GPC251 SC2D2U10V3KX-1GP
12
C255 SC2D2U10V3KX-1GPC255 SC2D2U10V3KX-1GP
12
SOUNDL 27 SOUNDR 27
1
1230 dummy C507
12
C507
C507
DY
DY
C504
C504
SC1U10V3KX-3GP
SC1U10V3KX-3GP
0911 add net name(FLY_P,FLY_N,VREF_LO,VREF_HI)
3VA_S0
R257
R257
5K1R2F-2-GP
5K1R2F-2-GP
R256
R256
1 2
5K1R2F-2-GP
5K1R2F-2-GP
1 2
R258
R258
1 2
20KR2F-L-GP
20KR2F-L-GP
1014 modify R258 from 10k to 20k ohm
L18
L18
1 2
SBK160808T-100Y-N-GP
SBK160808T-100Y-N-GP
68.00119.081
68.00119.081
2nd = 68.00230.021
2nd = 68.00230.021
1001 Add R107
12
C506
C506
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
LINEOUT_JD# 28 MIC_JD# 28
2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1014 swap these nets 1014 modify these nets
RN33
RN33
1 2 3
SRN2K2J-1-GP
SRN2K2J-1-GP
4
AUD_MICIN_LMICBIASC AUD_MICIN_R
AUD_MICIN_L 28
AUD_MICIN_R 28
C274
C274
DY
DY
<Core Design>
<Core Design>
<Core Design>
U19
U19
DY
DY
1
VIN
2
12
SB
VOUT GND EN3NC#4
G9091-330T11U-GP
G9091-330T11U-GP
74.09091.J3F
74.09091.J3F
2nd = 74.09198.G7F
2nd = 74.09198.G7F
1113 modify 2nd of U19
1
3VA_S05V_S0
5 4
12
C280
C280 SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Azalia codec CX20561
Azalia codec CX20561
Azalia codec CX20561
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
LA14
LA14
LA14
26 52Thursday, May 07, 2009
26 52Thursday, May 07, 2009
26 52Thursday, May 07, 2009
1
SB
SB
SB
Page 27
A
B
C
D
E
AUDIO OP AMPLIFIER
5V_S0 5VA_OP_S0
G2
G2
1 2
GAP-CLOSE-PWR
4 4
GAP-CLOSE-PWR
12
C6
C6 SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
AGND
DY
DY
1009 modify net name for GND to AGND
C15
C15
SOUNDL26
SOUNDR26
5VA_OP_S0
3 3
SC1U16V3ZY-GPC8SC1U16V3ZY-GP
C7
C8
12
12
SC4D7U10V5ZY-3GPC7SC4D7U10V5ZY-3GP
AGND AGND AGND
C14 SCD47U16V3ZY-3GPC14 SCD47U16V3ZY-3GP C16 SCD47U16V3ZY-3GPC16 SCD47U16V3ZY-3GP
1 2 1 2
RIN+RC LIN+RC
1009 modify net name for GND to AGND
1 2
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
C13
C13
1 2
SCD47U16V3ZY-3GP
SCD47U16V3ZY-3GP
R_LINE_IN RIN+
LIN+
LIN+RC LIN+
1
1230 modify U1
U1
U1
2
VCC
11
VCC
7
RIN-
8
RIN+
15
LIN-
16
LIN+
6
NC#6
13
NC#13
G1454LR41U-GP
G1454LR41U-GP
74.01454.A13
74.01454.A13
RN2
RN2
RN3
RN3
L_LINE_INL_LINE_IN_1
4
R_LINE_INR_LINE_IN_1
4
RIN+RIN+RC
1 2 3
SRN20KJ-GP-U
SRN20KJ-GP-U
1 2 3
SRN20KJ-GP-U
SRN20KJ-GP-U
1009 modify net name for GND to AGND
BYPASS
5
BYPASS
LVO1
LVO2 RVO1 RVO2
VSS VSS
GND
14
SPKR_L-
1
SPKR_L+
4
SPKR_R-L_LINE_IN
12
SPKR_R+
9
3 10
17
AGND
SHUTDOWN#
1009 modify net name for GND to AGND
1
1224 dummy C6
C9 SC4D7U6D3V3KX-GPC9 SC4D7U6D3V3KX-GP
1 2
SPKR_L- 28,48 SPKR_L+ 28,48 SPKR_R- 28,48 SPKR_R+ 28,48
AGND
3D3V_S0
12
R309
R309 10KR2J-3-GP
10KR2J-3-GP
EAPD#_R
1
1230 delete Q1
1230 delete RN35 and add R309
1
1
1222 modify R135
DY
DY
R134
R134
0R2J-2-GP
0R2J-2-GP
R135
R135
1 2
0R0402-PAD
0R0402-PAD
12
AMP_SHUTDOWN# 33
EAPD# 26
2 2
1 1
AC decopling
1
1222 modify R5
R5
R5
1 2
0R0402-PAD
0R0402-PAD
R4 0R2J-2-GP
R4 0R2J-2-GP
AGND
DY
DY
12
A
1014 swap these nets
RN36
L_LINE_IN LIN+ R_LINE_IN RIN+
SB
B
RN36
1
8
2
7
3
6
4 5
SRN47KJ-1-GP
SRN47KJ-1-GP
1204 modify RN36
SPKR_L­SPKR_L+ SPKR_R­SPKR_R+
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
AUDIO AMP
AUDIO AMP
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet
AUDIO AMP
LA14
LA14
LA14
E
SB
SB
of
27 52Thursday, May 07, 2009
27 52Thursday, May 07, 2009
27 52Thursday, May 07, 2009
SB
Page 28
5
4
3
2
1
MIC IN
MIC1
MIC1
D D
AUD_MICIN_R26 AUD_MICIN_L26
LINE OUT
C C
LINEOUT_JD#26
FRONTR26 FRONTL26
1014 swap the part
1015 modify RN57
RN57
RN57
1 2 3
SRN100J-3-GP
SRN100J-3-GP
12
12
R26010KR2J-3-GPDYR26010KR2J-3-GP
R25910KR2J-3-GPDYR25910KR2J-3-GP
DY
DY
ERN1
ERN1
SRN1KJ-7-GP
SRN1KJ-7-GP
MIC_JD#26
AUD_MIC_R
4
AUD_MIC_L
12
EC80
EC80
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1126 modify EU1,EU2 and add EU3,EU4
SB
12
EU3
EU3
12
EC79
EC79
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
MLVS0603M04-1-GP
MLVS0603M04-1-GP
1
1222 modify RN58 from 68 to 56 ohm
RN58
1
23
4
RN58
1 2 3
SRN56J-4-GP
SRN56J-4-GP
DY
DY
4
EC82
EC82
LOUT_R+1 LOUT_L+1
EC81
EC81
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
12
EU1
EU1
12
MLVS0603M04-1-GP
MLVS0603M04-1-GP
12
EU2
EU2
EU4
EU4
EC97
EC97
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
NP2 NP1
12
0930 modify LOUT1
NP2 NP1
12
EC98
EC98
2nd = 22.10251.511
2nd = 22.10251.511 3rd = 22.10133.H31
3rd = 22.10133.H31
5 4 3 6 2 1
PHONE-JK233-GP-U3
PHONE-JK233-GP-U3
22.10133.B01
22.10133.B01
2nd = 22.10251.491
2nd = 22.10251.491 3rd = 22.10133.H41
3rd = 22.10133.H41
LOUT1
LOUT1
5 4 3 6 2 1
PHONE-JK235-GP-U2
PHONE-JK235-GP-U2
22.10133.B21
22.10133.B21
0930 add 2nd for MIC1
SHIELDING
SHIELDING
Modify 0506 SB->SC Add EC97 and EC98, Change EC81,EC82 P/N to 78.10224.2FL
SHIELDING
SHIELDING
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
MLVS0603M04-1-GP
MLVS0603M04-1-GP
MLVS0603M04-1-GP
MLVS0603M04-1-GP
B B
Internal Speaker
1
1222 modify ER1~ER4
SPKR_L-27,48 SPKR_L+27,48 SPKR_R-27,48
SPKR_R+27,48
0912 add these parts for EMI demand
A A
5
4
DY
DY
R311
R311
12
0R2J-2-GP
0R2J-2-GP
SB
LA14 SA->SB
0331 Del EC7,EC8
0R2J-2-GP
0R2J-2-GP
1201 modify EC6~9
0930 add 2nd for SPK1 1119 modify SPK1
SB
DY
DY
R312
R312
12
12
EC9
EC9
SPK1
SPK1
6 4 3 2
1
5
12
12
EC8
EC8
MLVG0402220NV05BP-GP-U
MLVG0402220NV05BP-GP-U
MLVG0402220NV05BP-GP-U
MLVG0402220NV05BP-GP-U
DY
DY
DY
DY
EC7
EC7
12
EC6
EC6
MLVG0402220NV05BP-GP-U
MLVG0402220NV05BP-GP-U
3
MLVG0402220NV05BP-GP-U
MLVG0402220NV05BP-GP-U
ACES-CON4-7-GP-U
ACES-CON4-7-GP-U
20.F0772.004
20.F0772.004
2nd = 20.F1035.004
2nd = 20.F1035.004
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
AUDIO JACK
AUDIO JACK
AUDIO JACK
LA14
LA14
LA14
1
SB
SB
of
28 52Thursday, May 07, 2009
28 52Thursday, May 07, 2009
28 52Thursday, May 07, 2009
SB
Page 29
5
D D
4
3
2
1
MDC 1.5 CONN
0912 add the part for EMI demand
C C
1002 modify MDC1
SB
1112 delete MDC function
B B
<Core Design>
<Core Design>
<Core Design>
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
MDC
MDC
MDC
LA14
LA14
LA14
29 52Thursday, May 07, 2009
29 52Thursday, May 07, 2009
29 52Thursday, May 07, 2009
1
SB
SB
of
of
of
SB
Page 30
R84
R84
0R0603-PAD
0R0603-PAD
1 2
5
3D3V_D_S03D3V_S0
4
3
2
1
D D
CARD_3D3V_S0
C185
C185
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
1015 modify component size of C182
R83
R83
0R0603-PAD
0R0603-PAD
3D3V_S0
1 2
C182
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C182
12
C197
C197
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
1 2
1009 add R96
C C
1
1230 modify the name of net
3D3V_D_S0
RST#_CHIP
1226 modify R100 and C240
12
R100
R100 100KR2J-1-GP
100KR2J-1-GP
DY
DY
12
C240
C240
SC1U10V3KX-3GP
SC1U10V3KX-3GP
DY
DY
PLT_RST1#7,13,24,31,33,34
MODE_SEL
C228
C228
SC47P50V2JN-3GP
SC47P50V2JN-3GP
DY
DY
1
1226 delete R96
12
12
R94
R94 0R2J-2-GP
0R2J-2-GP
12
C186
C186
DY
DY
SCD1U10V2KX-1
SCD1U10V2KX-1
C199
C252
C252
1 2
C199 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1 2
DY
DY
1 2
R86
R86
1 2
6K19R2F-GP
6K19R2F-GP
1222 modify R97
1
R97
R97
0R2J-2-GP
0R2J-2-GP
AV_PLL VREG 3V_VBUS_S0
12
C192
C192 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
MODE_SEL SD_CMD
RREF
RST#_CHIP
R85
R85
0R0603-PAD
0R0603-PAD
1 2
3D3V_D_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1015 modify component size of R97
USBPP1113 USBPN1113
3D3V_D_S0
CLK48_51593
1017 modify USB signal connection
10
33 11
45 36 14
44
R459
R459
1 2
10R2F-L-GP
10R2F-L-GP
R460
R460
1 2
10R2F-L-GP
10R2F-L-GP
9 1
8
2
USBPP11P USBPP11N
CARD_3V3 AV_PLL VREG 3V3_IN D3V3
D3V3
MODE_SEL SD_CMD GPIO0 RREF RST#
SD_WP
SP119SP220SP3
5
XD_D4/SD_DAT1
SD_CD#
21
23
DM4DP
XD_D3/MS_D1
SD_DAT7/XD_D2/MS_D2
SD_DAT6/XD_D7/MS_D3
SD_DAT0/XD_D6/MS_D0
XD_D5/MS_BS
SP4
SP525SP626SP727SP828SP9
U15
U15
RTS5159-GR-GP
RTS5159-GR-GP
XTAL_CTR
13
MS_INS#
29
XTLO47XTLI
48
SD_CLK/XD_D1/MS_CLK
31
SP10
SP1134SP12
SD_DAT3/XD_WE#
35
SP1337SP1438SP1539SP1640SP1741SP1842SP19
SD_DAT2/XD_RE#
43
MS_D5 MS_D4
NC#30
NC#7 NC#3
GND GND GND GND
EEDO15EECS16EESK17EEDI
18
Modify 04/27 Add R459 and R460
0910 update footprint of U15
24 22
30 7 3
6 12 32 46
71.05159.00G
71.05159.00G
3 IN1 CARD-READER (SD/MMC/MS)
B B
CARD1
CARD1
XD_D5/MS_BS
CARD_3D3V_S0
SD_DAT0/XD_D6/MS_D0 XD_D4/SD_DAT1 SD_DAT2/XD_RE# SD_DAT3/XD_WE#
SD_CD# SD_WP
SD_CMD SD_CLK/XD_D1/MS_CLK
A A
10
SD-VCC
17
MS-VCC
3
SD-DAT0
2
SD-DAT1
20
SD-DAT2
18
SD-DAT3
21
SD-CD-SW
1
SD-WP-SW
15
SD-CMD
7
SD-CLK
NP1
NP1
NP2
NP2
MEMCARD-21P-2-GP
MEMCARD-21P-2-GP
1009 modify this net 1013 modify card1 1222 modify card1 from 20.I0043.001 to 20.I0043.011
1
1229 modify card1
1
LA14 SA
0217 modify card1 from 20.I0043.011 to 20.I0033.021
MS-BS
MS-INS
MS-DATA0 MS-DATA1 MS-DATA2 MS-DATA3
MS-SCLK
GND GND
SD-GND SD-GND
MS-GND MS-GND
6
MS_INS#
13
SD_DAT0/XD_D6/MS_D0
9
XD_D3/MS_D1
8
SD_DAT7/XD_D2/MS_D2
11
SD_DAT6/XD_D7/MS_D3
14
SD_CLK/XD_D1/MS_CLK
16
22 23
4 12
5 19
SD_DAT0/XD_D6/MS_D0 XD_D4/SD_DAT1 SD_DAT2/XD_RE# SD_DAT3/XD_WE#
EC42
EC42
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
EC40
EC40
SD_CLK/XD_D1/MS_CLK
EC38
EC38
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
DY
DY
C275
C275
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
DY
DY
CARD_3D3V_S0
12
12
EC39
EC39
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
DY
DY
DY
DY
C279
C279 SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
EC41
EC41
EC43
EC43
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
DY
DY
SCD1U50V3ZY-GP
1 2
DY
DY
DY
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
DY
CARD READER- RTS5159
CARD READER- RTS5159
CARD READER- RTS5159
SD_CMD
SD_CD#
SD_WP
EC37
EC36
EC36
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
DY
DY
EC37
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LA14
LA14
LA14
30 52Thursday, May 07, 2009
30 52Thursday, May 07, 2009
30 52Thursday, May 07, 2009
SB
SB
of
of
of
SB
5
4
3
2
1
Page 31
A
B
C
D
E
Mini Card Connector(WLAN)
4 4
3D3V_MINI1D5V_S0
MINIC1
MINIC1
53
MINI_WAKE#
TP49TPAD14-GP TP49TPAD14-GP
1
PCIE_REQ_MINI#3
CLK_PCIE_MINI1#3
CLK_PCIE_MINI13
E51_RxD33 E51_TxD33
PCIE_RXN213 PCIE_RXP213
3 3
PCIE_TXN213 PCIE_TXP213
5V_S5
3D3V_MINI
1021 modify TC16
2 2
NP1
1 2 3 4
5 6 7 8
9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
NP2
54
SKT-MINI52P-20-GP
SKT-MINI52P-20-GP
20.F1117.052
20.F1117.052
2nd = 62.10043.391
2nd = 62.10043.391
Place near MINIC1
3D3V_MINI
3D3V_MINI
PLT_RST1#_WLAN
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C47
C47
DY
DY
LED_WWAN# LED_WPAN#
12
1 2
R37
R37 300R2F-GP
300R2F-GP
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 1
R168
R168
TP42 TPAD14-GPTP42 TPAD14-GP
TP41 TPAD14-GPTP41 TPAD14-GP
WIRELESS_EN 33
PLT_RST1# 7,13,24,30,33,34
1017 modify USB signal connection
USBPN3 13 USBPP3 13
WLAN_LED#_MC 33,38
1015 modify component size of R158,R159 1222 modify R159
1
R159
R159
3D3V_S0
3D3V_S5
1 2
0R0402-PAD
0R0402-PAD
R158
R158
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
1D5V_S0
3D3V_MINI
SB
12
TC16
TC16
SE330U2VDM-L-GP
SE330U2VDM-L-GP
DY
DY
12
12
12
C332
C332
C360
C360
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C334
C334
C326
C326
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
12
SB
C333
C333
DY
DY
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C330
C330
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
SB
C356
C356
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
79.33719.L01
79.33719.L01
2nd = 77.C3371.051
2nd = 77.C3371.051
<Core Design>
<Core Design>
1 1
A
B
C
D
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
MINI CARD
MINI CARD
MINI CARD
LA14
LA14
LA14
of
31 52Thursday, May 07, 2009
of
31 52Thursday, May 07, 2009
of
31 52Thursday, May 07, 2009
E
SB
SB
SB
Page 32
H_THERMDC4
H_THERMDA4
MMBT3904-4-GP
MMBT3904-4-GP
84.T3904.C11
84.T3904.C11
2nd = 84.03904.L06
2nd = 84.03904.L06
MMBT3904-4-GP
MMBT3904-4-GP
Q6
Q6
84.T3904.C11
84.T3904.C11
2nd = 84.03904.L06
2nd = 84.03904.L06
1
1224 delete R165 and add RN64
RN64
EMC2102_FAN_TACH EMC2102_fan_mode
Layout notice : Both H_THERMDA and THERMDC routing 10 mil trace width and 10 mil spacing
C376
SC470P50V2JN-GP
SC470P50V2JN-GP
C376
RN64
2 3 1
SRN10KJ-5-GP
SRN10KJ-5-GP
3D3V_S0
12
4
1.For CPU Sensor
CC272 must be near Q7 C377 must be near EMC2102
SB
C272
C272 SC470P50V2JN-GP
B
SC470P50V2JN-GP
DY
DY
1 2
C377
C377 SC470P50V2JN-GP
SC470P50V2JN-GP
1 2
Q14
Q14
E
C
2.System Sensor, Put between CPU and NB.
Layout notice : Both EMC2102_DN2 and EMC2102_DP2 routing 10 mil trace width and 10 mil spacing
E
C
B
C51
C51 SC470P50V3JN-2GP
SC470P50V3JN-2GP
DY
DY
1 2
3.HW T8 sensor
Layout notice : Both EMC2102_DN3 and EMC2102_DP3 routing 10 mil trace width and 10 mil spacing
C51 must be near Q8 C373 must be near EMC2102
3D3V_S0
R188
R188
1 2
49D9R2F-GP
49D9R2F-GP
C373
C373 SC470P50V2JN-GP
SC470P50V2JN-GP
5V_S0
12
DY
C361
C361
SC4D7U10V5ZY-3GP
SC4D7U10V5ZY-3GP
EMC2102_VDD_3D3
C370
C370 SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
H_THERMDC H_THERMDA EMC2102_DN2 EMC2102_DP2 EMC2102_DN3 EMC2102_DP3
PIN9 GND = Channel 1
OPEN = Channel 3 +3.3V = Disabled
PIN10 GND = Fan is OFF
OPEN = Fan is at 60% full-scale +3.3V = Fan is at 75% full-scale
DY
C357
C357
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
29
U42
U42
GND
1
VDD_3V
2
DN1
3
DP1
4
DN2
5
DP2
6
DN3
7
DP3
EMC2102-DZK-GP
EMC2102-DZK-GP
74.02102.A73
74.02102.A73
2nd = 74.07922.0B3
2nd = 74.07922.0B3
28
26
27
TACH
NC#8
8
FANb25FANa
VDD_5Va
EMC2102
EMC2102
SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#
EMC2102_fan_mode
EMC2102_FAN_TACH 48
EMC2102_FAN_DRIVE 48
12
C346
C346 SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
22
23
24
SMCLK
SMDATA
VDD_5Vb
CLK_SEL
14
PURE_HW_SHUTDOWN#
FAN1
FAN1
EMC2102_FAN_TACH
EMC2102_FAN_DRIVE
*Layout* 15 mil
KA
D11
D11 SS14-3-GP
SS14-3-GP
83.1R004.M8M
83.1R004.M8M
LA14 SA->SB
0403 Change D11 from 83.1R004.080 to 83.1R004.M8M
SMBC_Therm 33 SMBD_Therm 33
1
1222 modify U42
21
NC#21
20
GND
ALERT#
19
ALERT#
CLK_IN
RESET#
NC#15
VGATE_PWRGD
18 17 16 15
V_DEGREE
CLK_32K EMC2102_CLK_SEL
EMC2102_PWROK 39
3 2
1
ACES-CON3-GP-U1
ACES-CON3-GP-U1
20.F0714.003
20.F0714.003
2nd = 20.D0246.103
2nd = 20.D0246.103
DY
DY
R177
R177
1 2
0R2J-2-GP
0R2J-2-GP
1 2
C349
C349
C355
C355
5
0930 modify FAN1 1017 modify FAN1
1
4
1224 modify FAN1
GND = Internal Oscillator Selected +3.3V = External 32.768kHz Clock Selected
THRM# 13
EC60
EC60 SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
3D3V_S0
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
12
R178
R178 10KR2F-2-GP
10KR2F-2-GP
R180
R180 3KR2F-GP
3KR2F-GP
TRIP_SET Pin Voltage V_DEGREE =(((Degree-75)/21)
T8 90 degree
RUN_POWER_ON
G
Q22
Q22
CLK_32K_R
2N7002-12-GP
2N7002-12-GP
84.27002.Y31
84.27002.Y31
SD
PM_SUS_CLK13
32K suspend clock output
LA14 SA->SB
0403 Change Q21,Q22 from 84.27002.W31 to 84.27002.Y31
SB
3D3V_S0
12
R170
R170 240KR3-GP
240KR3-GP
VGATE_PWRGD13,41
PURE_HW_SHUTDOWN#
1125 modify RN40 and delete RN42
RN40
RN40
PURE_HW_SHUTDOWN#
45
EMC2102_CLK_SEL
6 7 8
3
THRM#
2
CLK_32K
1
SRN10KJ-6-GP
SRN10KJ-6-GP
1
1223 modify the net(EMC2102_CLK_SEL)
G
Q21
Q21
S D
2N7002-12-GP
2N7002-12-GP
84.27002.Y31
84.27002.Y31
RSMRST#
3D3V_AUX_S5
3
1
DY
DY
D10
D10 BAT54-5-GP
BAT54-5-GP
83.BAT54.D81
83.BAT54.D81 2nd = 83.BAT54.X81
2nd = 83.BAT54.X81
2
3rd = 83.00054.Z81
3rd = 83.00054.Z81
(dummy, KBC already delay)
12
C335
C335
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
RSMRST# 33,39
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Thermal/Fan Controllor
Thermal/Fan Controllor
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Thermal/Fan Controllor
LA14
LA14
LA14
32 52Thursday, May 07, 2009
32 52Thursday, May 07, 2009
32 52Thursday, May 07, 2009
of
SB
SB
SB
Page 33
SB
12
C353
C353
DY
DY
RN49
RN49 SRN4K7J-12-GP
SRN4K7J-12-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
A
12
12
C354
C354
C386
C386
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
AD_IA 46 NOVO_BTN# 36 WIRELESS_BTN# 36
KBC_THERMALTRIP# 39
CRT_DEC# 36
PM_SLP_S3# 13,39,43,44
KBC_PWRBTN# 36
AC_IN# 46 LID_CLOSE# 37
PWRLED 38
CAP_LED 36 AD_OFF 45 RSMRST#_KBC 13
PM_SLP_S4# 13,43,44
CHARGE_LED 38
SPI_WP# 34 BLUETOOTH_LED 38 BLON_OUT 18
USB_PWR_EN# 23
3D3V_S0
12
12
C359
C359
C380
C380
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C359,C362 colse to Pin VDD
0916 move net(SPI_WP#) from U9 pin120 to pin25
LA14_SA 0205 add signal Bluetooth_LED
KA20GATE KBRCIN# E51_TxD SHBM
0912 add the part for EMI demand
1
R175
R175
10KR2J-3-GP
10KR2J-3-GP
12
PlanarID (0,0)
DY
DY
SA: 0,0
R176
R176
10KR2J-3-GP
10KR2J-3-GP
12
-1
1222 modify PCB Ver. from SB to -1
A
12
C362
C362
1016 modify X1
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
82.30001.861
12
KBC_XO_R
12
R46
R46
AMP_SHUTDOWN#27
PM_PWRBTN#13
1 2
DY
DY
R191
R191
1 2
1KR2J-1-GP
1KR2J-1-GP
DY
DY
C369
C369
1 2
EC_TMR13 BRIGHTNESS18
82.30001.861
X-32D768KHZ-46GP
X-32D768KHZ-46GP
4
X1
X1
1 2
R49 20MR3-GPR49 20MR3-GP
CHG_ON#46
KBC_BEEP26
TPDATA35 TPCLK35
SPIDI34 SPIDO34 SPICS#34
SPICLK34
3D3V_AUX_S5
1
DY
DY
23
1
TPDATA TPCLK
1223 modify the net(RSMRST#)
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
8 7 6
SRN10KJ-6-GP
SRN10KJ-6-GP
SPIDI
AD_OFF
PCLK_KBC
RN45
RN45
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
C60
C60
33KR2J-3-GP
33KR2J-3-GP
3D3V_S0
1 2 3 45
EC63 SCD1U50V3ZY-GP
EC63 SCD1U50V3ZY-GP
1224 modify R191and this net AD_OFF
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
12
C67
C67
U9B
U9B
KBC_XI
77
32KX1/32KCLKIN
KBC_XO
79
32KX2
30
GPIO55/CLKOUT
63
GPIO14/TB1
117
GPIO20/TA2
31
GPIO56/TA1
32
GPIO15/A_PWM
118
GPIO21/B_PWM
62
GPIO13/C_PWM
13
GPIO12/PSDAT3
12
GPIO25/PSCLK3
11
GPIO27/PSDAT2
10
GPIO26/PSCLK2
71
GPIO35/PSDAT1
72
GPIO37/PSCLK1
86
F_SDI
87
F_SDO
90
F_CS0#
92
F_SCK
RN46
RN46
45
KBC_THERMALTRIP#
3
6
RSMRST#
2
7
LID_CLOSE#
1
8
SRN10KJ-6-GP
SRN10KJ-6-GP
SB
1106 modify net connection of RN46 and RN44
LA14 SA->SB
0330 Change RN47 from 66.10436.04L to 66.1043A.08L
KBC
KBC
KBSOUT15/GPIO61/XOR_OUT
PS/2
PS/2
FIU
FIU
RSMRST#32,39
2ND = 84.03906.F11
2ND = 84.03906.F11 3RD = 84.03906.P11
3RD = 84.03906.P11
1
1224 modify RN48
3D3V_S5
3D3V_S0
LA14 SA->SB
0330 ADD WLAN_LED#_MC
3D3V_AUX_S5
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
2 OF 2
2 OF 2
KBSOUT0/JENK#
KBSOUT1/TCK KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7 KBSOUT8
KBSOUT9 KBSOUT10 KBSOUT11
KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62
GPIO60/KBSOUT16 GPIO57/KBSOUT17
KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7
VCC_POR#
WPCE773LA0DG-GP
WPCE773LA0DG-GP
ECRST#
E
Q23
Q23
B
MMBT3906-3-GP
MMBT3906-3-GP
C
84.03906.R11
84.03906.R11
RN48
RN48
RSMRST#_KBC
1
8
AD_OFF
2
7
S5_ENABLE_KBC
3
6
BLON_OUT
45
SRN10KJ-6-GP
SRN10KJ-6-GP
RN44
RN44
PLATFORM_ID
1
8
WIRELESS_BTN#
2
7
3
6
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
66.10336.08L
66.10336.08L
RN47
RN47
1
8
2
7
3
6
4 5
SRN100KJ-8-GP-U
SRN100KJ-8-GP-U
66.1043A.08L
66.1043A.08L
KBC WPCE773L
KBC WPCE773L
KBC WPCE773L
LA14
LA14
LA14
R201 10KR2J-3-GP
R201 10KR2J-3-GP
12
DY
DY
KCOL0
53
KCOL1
52
KCOL2
51
KCOL3
50
KCOL4
49
KCOL5
48
KCOL6
47
KCOL7
43
KCOL8
42
KCOL9
41
KCOL10
40
KCOL11
39
KCOL12
38
KCOL13
37
KCOL14
36
KCOL15
35
KCOL16
34
KCOL17
33
KROW0
54
KROW1
55
KROW2
56
KROW3
57
KROW4
58
KROW5
59
KROW6
60
KROW7
61
ECRST#
85
C378
C378
12
SC1U10V3KX-3GP
SC1U10V3KX-3GP
HDD_LED# 12,38
WLAN_LED#_MC 31,38
BAT_IN# NOVO_BTN# KBC_PWRBTN#
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
33 52Thursday, May 07, 2009
33 52Thursday, May 07, 2009
33 52Thursday, May 07, 2009
SB
SB
SB
3D3V_AUX_S5 3D3V_AUX_S5
12
88
115
U9A
U9A
VCC
104
VREF
97
GPI90/AD0
98
GPI91/AD1
99
GPI92/AD2
100
GPI93/AD3
108
GPIO05
96
GPIO04
101
GPI94
105
GPI95
106
GPI96
107
GPI97
64
GPIO01/TB2
95
GPIO03
93
GPIO06
94
GPIO07
119
GPIO23
6
GPIO24
109
GPIO30
120
GPIO31
65
GPIO32/D_PWM
66
GPIO33/H_PWM
16
GPIO40/F_PWM
17
GPIO42/TCK
20
GPIO43/TMS
21
GPIO44/TDI
22
GPIO45/E_PWM
23
GPIO46/TRST#
24
GPIO47
25
GPIO50/TDO
26
GPIO51
27
GPIO52/RDY#
28
GPIO53
73
GPIO70
74
GPIO71
75
GPIO72
110
GPO82/TRIS#
WPCE773LA0DG-GP
WPCE773LA0DG-GP
116
3D3V_AUX_S5
BAT_SCL BAT_SDA
0930 modify net name for BIOS demand
LA14_SA
0207 Dummy R174,ADD R173
12
C374
C374
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
KBC_THERMALTRIP# PCB_VER0 PCB_VER1
KBC_PWRBTN#
PLATFORM_ID
Pin 120: MODEL_ID_0
AD_OFF
Pin 24: MODEL_ID_1
BLON_OUT
Pin 28:UMA=NC; DIS=PL
3D3V_S0
678
123
4 5
3D3V_AUX_S5
R174
R174
12
DY
DY
PCB_VER0 PCB_VER1
12
R173
R173
SMBC_Therm SMBD_Therm
C363
C363
C366
C366
12
DY
DY
BAT_IN#
1 OF 2
1 OF 2
124
GPIO10/LPCPD#
7
LRESET#
2
LCLK
3
LFRAME#
126
LAD0
127
LAD1
128
LAD2
1
LAD3
125
SERIRQ
8
GPIO11/CLKRUN#
122
KBRST#
121
GA20
29
ECSCI#/GPIO54
9
GPIO65/SMI#
123
GPIO67/PWUREQ#
68
GPIO74/SDA2
67
GPIO73/SCL2
69
GPIO22/SDA1
70
GPIO17/SCL1
81
GPIO66/G_PWM
84
GPIO77
83
GPIO76/SHBM
82
GPIO75
91
GPIO81
111
GPO83/SOUT_CR/BADDR1
113
GPIO87/SIN_CR
112
GPO84/BADDR0
114
GPIO16
14
GPIO34
15
GPIO36
44
VCORF
6
5
RB731U-2-GP
RB731U-2-GP
AVCC
12
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
SER/IR
SER/IR
D14
D14
83.R2002.B8E
83.R2002.B8E
2nd = 83.R3004.A8E
2nd = 83.R3004.A8E
KCOL17 KCOL0 KCOL16
KCOL15 KCOL14 KCOL13
KCOL8 KCOL7 KCOL6 KCOL5
KCOL4 KCOL3 KCOL2 KCOL1
KROW0 KROW7 KROW6 KROW5
KROW4 KROW3 KROW2 KROW1
KCOL12 KCOL11 KCOL10 KCOL9
SB
SC1U16V3ZY-GP
SC1U16V3ZY-GP
1
1222 modify R189
R189
R189
PLT_RST1#7,13,24,30,31,34
4 4
PCLK_KBC3
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
C371
C371
1 2
DY
DY
3 3
S5_ENABLE39,42,48
DY: ISP Mode disable
2 2
Internal KeyBoard Connector
20.K0382.026
20.K0382.026
123456789
KCOL0
KCOL4
KCOL3
KCOL1
KCOL2
1 1
LA14 SA modify KB1
Internal KeyBoard CONN
1
CHECK KB SPEC. AND PIN DEFINE
1 2
0R0402-PAD
0R0402-PAD
C368
C368
R187
R187 0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
PCLK_KBC_RC
THERMAL-----> BATTERY----->
S5_ENABLE
FOR KBC DEBUG
R202
R202
DY
KCOL5
DY
DY
DY
KCOL6
KCOL7
........
KCOL2
1 2
0R2J-2-GP
0R2J-2-GP
R203
R203
KCOL3
1 2
0R2J-2-GP
0R2J-2-GP
10111213141516171819202122232425262728
KCOL9
KCOL8
KCOL11
KCOL12
KCOL10
KCOL16
KCOL14
KCOL13
KCOL15
KCOL17
SC27P50V2JN-2-GP
SC27P50V2JN-2-GP
12
DY
DY
LPC_LFRAME#12,34
LPC_LAD012,34 LPC_LAD112,34 LPC_LAD212,34 LPC_LAD312,34 INT_SERIRQ13
PM_CLKRUN#13
KBRCIN#12 KA20GATE12
GMCH_BL_ON7
SMBD_Therm32 SMBC_Therm32
BLUETOOTH_EN22
WIRELESS_EN31
WLAN_TEST_LED38
DC_BATFULL38
12
R1922K2R2J-2-GP R1922K2R2J-2-GP
LA14 SA->SB
0401 ADD GPIO16
PTWO-CON26-4-GP
PTWO-CON26-4-GP
KROW3
KROW5
KROW0
KROW2
KROW1
KROW4
KROW6
26
BAT_SDA45,46 BAT_SCL45,46
NUM_LED36
E51_TxD31
E51_RxD31
KB1
KB1
KROW7
BAT_IN#45
PLT_RST1#_1
ECSCI#_KBC ECSWI#_KBC
SHBM RSMRST#_KBC
E51_TxD E51_RxD
S5_ENABLE_KBC
VCORF
12
C387
C387
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1230 modify D14
1
ECSCI#_113
ECSWI#13
KCOL1748 KCOL048 KCOL1648
KCOL1548 KCOL1448 KCOL1348
KCOL848 KCOL748 KCOL648 KCOL548
KCOL448 KCOL348 KCOL248 KCOL148
KROW048 KROW748 KROW648 KROW548
KROW448 KROW348 KROW248 KROW148
KCOL1248 KCOL1148 KCOL1048 KCOL948
3D3V_S0
80
VDD4VCC19VCC46VCC76VCC
GPIO41
LPC
LPC
SMB
SMB
SP
SP
SPI
SPI
AGND
103
ECSCI#_KBC
1
2
ECSWI#_KBC
34
R184
R184
0R0603-PAD
0R0603-PAD
102
AVCC
A/D
A/D
D/A
D/A
GPIO
GPIO
GND5GND18GND45GND78GND89GND
Page 34
A
3D3V_AUX_S5
4 4
LA14 SA->SB
678
0330 Modify NOVO_BTN#
4 5
SPI_HOLD#
SPICS#33
SPI_WP#33
12
DY
DY
EC55
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
3 3
EC55
SPIDI33
1013 modify U40 from 72.25X16.001 to 72.25X16.A01 0912 add the part for EMI demand
B
RN41
RN41
SRN10KJ-6-GP
SRN10KJ-6-GP
123
SPI FLASH ROM
SPI_WP#
12
EC59
EC59 SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
2nd = 72.25165.A01
2nd = 72.25165.A01
SPI_HOLD#
EC56 SCD1U50V3ZY-GP
EC56 SCD1U50V3ZY-GP
1 2
16M Bits
U40
U40
1
CS#
VCC
2
DO
HOLD#
3
WP#
CLK
GND4DIO
W25X16AVSSIG-GP
W25X16AVSSIG-GP
72.25X16.A01
72.25X16.A01
DY
DY
3D3V_AUX_S5_SPI_ROM
8
SPI_HOLD#
7 6 5
3D3V_AUX_S5
DY
DY
12
EC57
EC57
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
ER6
ER6 0R0603-PAD
0R0603-PAD
1 2
12
DY
DY
EC58
EC58 SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
C
1
1224 modify ERN2
SPICLK 33 SPIDO 33
SB
GF1
GF1
MLX-CON10-7-GP
MLX-CON10-7-GP
DY
DY
20.D0183.110
20.D0183.110
D
GOLDEN FINGER FOR DEBUG BOARD
3D3V_S0
1
LPC_LAD0
2
LPC_LAD1
3
LPC_LAD2
4
LPC_LAD3
5
LPC_LFRAME#
6
PLT_RST1#
7 8
PCLK_FWH
9 10 11 12
LPC_LFRAME# 12,33 PLT_RST1# 7,13,24,30,31,33
PCLK_FWH 3
LPC_LAD[0..3]
PCLK_FWH
E
LPC_LAD[0..3] 12,33
12
EC26
EC26 SC5P50V2CN-2GP
SC5P50V2CN-2GP
DY
DY
2 2
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
BIOS/GOLDEN FINGER
BIOS/GOLDEN FINGER
BIOS/GOLDEN FINGER
LA14
LA14
LA14
34 52Thursday, May 07, 2009
34 52Thursday, May 07, 2009
34 52Thursday, May 07, 2009
E
of
SB
SB
SB
Page 35
5
4
3
2
1
D D
C C
TPDATA33 TPCLK33
TOUCH PAD
5V_S0
1
23
RN7
RN7
SRN10KJ-5-GP
SRN10KJ-5-GP
4
RN8
RN8
1 2 3
SRN33J-5-GP-U
SRN33J-5-GP-U
12
EC28
EC28
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
TP_DATA
4
TP_CLK
5V_S0
12
EC27
EC27
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
TP_LEFT37,48 TP_RIGHT37,48
EC30
EC30
EC29
EC29
1 2
SC220P50V2JN-3GP
SC220P50V2JN-3GP
DY
DY
TP_CLK TP_DATA
SC220P50V2JN-3GP
SC220P50V2JN-3GP
DY
DY
1 2
T/P
1 2
3 4 5 6
PTWO-CON6-12-GP
PTWO-CON6-12-GP
2nd = 20.K0356.006
2nd = 20.K0356.006
TP_DATA 48
TP_CLK 48
61
0930 modify TPAD1 1013 modify TPAD1 1015 modify TPAD1
TPAD1
TPAD1
7
8
20.K0382.006
20.K0382.006
1124 modify TPAD1
0910 delete RIGHT1 and LEFT1
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Touch pad
Touch pad
Touch pad
LA14
LA14
LA14
35 52Thursday, May 07, 2009
35 52Thursday, May 07, 2009
35 52Thursday, May 07, 2009
1
SB
SB
SB
Page 36
5
Q16
D D
NUM_LED33
CAP_LED33
Q16
R1
R1
1
R2
R2
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
2nd = 84.00143.D1K
2nd = 84.00143.D1K 3rd = 84.00143.E1K
3rd = 84.00143.E1K
Q15
Q15
R1
R1
1
R2
R2
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
2nd = 84.00143.D1K
2nd = 84.00143.D1K 3rd = 84.00143.E1K
3rd = 84.00143.E1K
NUM_LED# NUM_LED#_R
3 2
CAP_LED#
3 2
LA14_SA
0205 remove signals(TP_LOCK_LED,TP_LOCK_LED#,TP_LOCK_LED#_R)and R132,Q17
C C
RN1
RN1
1
KBC_PWRBTN#_148 WIRELESS_BTN#_148
NOVO_BT#48 NOVO_BTN# 33
CRT_DEC#33
2 3 4 5
SRN470J-3-GP
SRN470J-3-GP
8 7 6
CRT_IN#_R
4
R129
R129
1 2
100R2J-2-GP
100R2J-2-GP
R128
R128
1 2
100R2J-2-GP
100R2J-2-GP
KBC_PWRBTN# 33 WIRELESS_BTN# 33
CRT_IN#_R 19
CAP_LED#_R
WIRELESS_BTN#_1
3
SW1
SW1
1 2 3
SW-SLIDE57-GP-U
SW-SLIDE57-GP-U
22.40048.741
22.40048.741
NP1
NP2
KBC_PWRBTN#_148
CAP_LED#_R48
NUM_LED#_R48 NOVO_BT#48
LA14_SA 0205 ADD signal NOVO_BT#
LA14_SA 0205 modify POWERCN1 from 20.K0384.016 to 20.K0204.006 0223 modify POWERCN1 from 20.K0204.006 to 20.K0382.006
2
POWERCN1
POWERCN1
1 2
3 4 5 6
PTWO-CON6-12-GP
PTWO-CON6-12-GP
12
DY
DY
SC1U16V3ZY-GP
SC1U16V3ZY-GP
5V_S0
EC5
EC5
DY
DY
KBC_PWRBTN#_1 CAP_LED#_R NUM_LED#_R NOVO_BT#
12
EC4
EC4
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
C4
C4
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1
7
8
KBC_PWRBTN#_1
21
G1
G1
GAP-OPEN
GAP-OPEN
B B
A A
5
4
NUM_LED#_R CAP_LED#_R
12
12
EC46
EC46
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
DY
DY
3
LA14_SA
EC45
EC45
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
0205 remove EC49
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Power Board
Power Board
Power Board
LA14
LA14
LA14
SB
SB
of
36 52Thursday, May 07, 2009
36 52Thursday, May 07, 2009
36 52Thursday, May 07, 2009
1
SB
Page 37
5
4
3
2
1
TP_LEFT
TP_L1
TP_L1
1 2
D D
3 4
SW-TACT-5P-1-GP
SW-TACT-5P-1-GP
62.40009.A61
62.40009.A61
5
TP_LEFT#_1
12
EC84
EC84 SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
TP_RIGHT
TP_R1
TP_R1
1 2
5
3 4
SW-TACT-5P-1-GP
SW-TACT-5P-1-GP
62.40009.A61
62.40009.A61
C C
TP_RIGHT#_1
12
EC83
EC83 SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
1017 modify RN60
RN60
RN60
1
4
2 3
SRN470J-4-GP-U
SRN470J-4-GP-U
TP_LEFT 35,48 TP_RIGHT 35,48
Cover Up Switch
3D3V_AUX_S5
U4
U4
2
OUT
3
GND
1
VDD
ME268-002-GP
ME268-002-GP
74.00268.07B
74.00268.07B
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
1016 modify U4 1017 modify U4
EC21
EC21
1 2
12
R40
R40 10KR2J-3-GP
10KR2J-3-GP
DY
DY
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
EC22
EC22
LID_CLOSE#
DY
DY
1 2
LID_CLOSE# 33
1
1226 modify TP_L1 and TP_R1
1017 add U61,R52,EC24 and EC23 1020 delete U61,R52,EC24 and EC23
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
SWITCHS
SWITCHS
SWITCHS
LA14
LA14
LA14
37 52Thursday, May 07, 2009
37 52Thursday, May 07, 2009
37 52Thursday, May 07, 2009
1
SB
SB
SB
Page 38
5
4
3
2
1
R291
Q27
Q27
3
R1
R1
D D
C C
PWRLED33
DC_BATFULL33
CHARGE_LED33
HDD_LED#12,33
1
2nd = 84.00143.D1K
2nd = 84.00143.D1K 3rd = 84.00143.E1K
3rd = 84.00143.E1K
2
R2
R2
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
Q29
Q29
R1
R1
1
R2
R2
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
2nd = 84.00143.D1K
2nd = 84.00143.D1K 3rd = 84.00143.E1K
3rd = 84.00143.E1K
Q30
Q30
R1
R1
1
R2
R2
DTC143ZUB-GP
DTC143ZUB-GP
84.00143.G1K
84.00143.G1K
2nd = 84.00143.D1K
2nd = 84.00143.D1K 3rd = 84.00143.E1K
3rd = 84.00143.E1K
3 2
3 2
R3
R3
1 2
330R2F-GP
330R2F-GP
PWRLED#
CHARGE_LED#
R291
1 2
330R2F-GP
330R2F-GP
PWRLED#_R
LA14_SA 0205 modify LED11 from 83.00195.G70 to 83.00190.L70
R293
R293
1 2
330R2F-GP
330R2F-GP
64.33005.6DL
64.33005.6DL
R294
R294
1 2
330R2F-GP
330R2F-GP
CHARGE_LED#_R
LA14_SA 0205 modify LED13 from 83.00195.G70 to 83.00190.L70
White
LED14
HDD_LED#_R
LED14
AK
LED-W-12-GP-U
LED-W-12-GP-U
83.00191.D70
83.00191.D70
LA14_SA
White
LED11
LED11
AK
LED-W-12-GP-U
LED-W-12-GP-U
83.00191.D70
83.00191.D70
LA14 SA->SB
0401 Change from 83.00190.L70 to 83.19223.D70 0401 ADD R293,Q29
LED13
LED13
4
LED-OW-1-GP-U
LED-OW-1-GP-U
83.19223.D70
83.19223.D70
5V_S0
5V_S5
5V_AUX_S5
orange
1
23
white
0205 add LE14,R294
R130
Q18
Q18
R2
R2
R1
R1
DTA143ZUB-GP
DTA143ZUB-GP
84.00143.F1K
84.00143.F1K
2 3
WLAN_LED#_MC31,33
B B
1
WLAN_TEST_LED33
WLAN_LED#
G
1016 modify Q18
R130
1 2
330R2F-GP
330R2F-GP
Q19
Q19 2N7002-12-GP
2N7002-12-GP
84.27002.Y31
84.27002.Y31
S D
LA14 SA->SB modify Q19
WLAN_LED#_R
12
EC47
EC47
DY
DY
LED12
LED12
LED-W-12-GP-U
LED-W-12-GP-U
83.00191.D70
83.00191.D70
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
LA14_SA
White
AK
5V_S0
HDD_LED#_R 48
WLAN_LED#_R 48
0205 add LE12
R305
Q31
Q31
R2
R2
R1
R1
DTA143ZUB-GP
DTA143ZUB-GP
84.00143.F1K
84.00143.F1K
DY
DY
2 3
BLUETOOTH_LED33
A A
1
Bluetooth_LED#
DY
DY
1 2
330R2F-GP
330R2F-GP
R305
12
EC48
EC48
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
DY
DY
White
LED15
LED15
AK
DY
DY
LED-W-12-GP-U
LED-W-12-GP-U
83.00191.D70
83.00191.D70
LA14_SA 0209 Change R305,R291,R294,R130,R3 from 29L2589AA to 64.33005.6DL
LA14 SA->SB
0331 Change LED11,LED12,LED14,LED15 from 83.19213.H70 to 83.00191.D70
5
4
3
5V_S0
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
2
Date: Sheet
LA14
LA14
LA14
LED
LED
LED
SB
SB
of
38 52Thursday, May 07, 2009
38 52Thursday, May 07, 2009
38 52Thursday, May 07, 2009
1
SB
Page 39
Aux Power
5V_AUX_S5
SC1U16V3ZY-GP
SC1U16V3ZY-GP
DY
DY
C372
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C372
3D3V_AUX_S5
Run Power
I min = 300 mA
5V_S5
D
D
8
D
D
7
D
D
6
3D3V_S5
D
D
8
D
D
7
D
D
6
DY
DY
1 2
1D05V_S0
DY
DY
5V_S0
3D3V_S0
12
R112
R112
2K2R2J-2-GP
2K2R2J-2-GP
U20
U20
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4468-GP
AO4468-GP
84.04468.037
84.04468.037
U21
U21
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4468-GP
AO4468-GP
84.04468.037
84.04468.037
U43
U43
1
VIN
2
12
C375
C375
3D3V_AUX_S5_EN
3D3V_AUX_S5_EN
12
DY
DY
EMC2102_PWROK32
VOUT GND EN3NC#4
G9091-330T11U-GP
G9091-330T11U-GP
74.09091.J3F
74.09091.J3F
2nd = 74.09198.Q7F
2nd = 74.09198.Q7F
DY
DY
5V_AUX_S5
R190
R190 0R0402-PAD
0R0402-PAD
12
PM_SLP_S3#13,33,43,44
3D3V_AUX_S5
5 4
SC1U16V3ZY-GP
SC1U16V3ZY-GP
12
C379
C379
DY
DY
SB
1113 modify 2nd of U43
U17
EMC2102_PWROK
U17
1
B
2
A
3
GND
74LVC1G08GW-1-GP
74LVC1G08GW-1-GP
73.01G08.L04
73.01G08.L04
2nd = 73.7SZ08.AAH
2nd = 73.7SZ08.AAH 3rd = 73.01G08.L03
3rd = 73.01G08.L03
VCC
Y
100R5J-3-GP
100R5J-3-GP
3D3V_S5
5 4
R109
R109
DY
DY
DY
DY
3D3V_S0
12
3D3V_runpwr
S D
C257
C257
1 2
DY
DY
Q11
Q11 2N7002-11-GP
2N7002-11-GP
Z_12V_D3
G
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PWROK 7,13
DCBATOUT
R119
R119
1 2
330KR2J-L1-GP
330KR2J-L1-GP
10KR2J-3-GP
10KR2J-3-GP
R118
R118
1 2
NDS0610-NL-GP
NDS0610-NL-GP
Z_12V
Z_12V_G3
100KR2J-1-GP
100KR2J-1-GP
S D
G
12
R117
R117
Z_12V_D3
Q13
Q13
12
R115
R115
10KR2J-3-GP
10KR2J-3-GP
Z_12V_D4
Q12
Q12
5 6
2N7002DW-2-GP-U
2N7002DW-2-GP-U
84.27002.E3F
84.27002.E3F
RUN_POWER_ON
1
1
C278
C278
SCD22U25V3KX-GP
SCD22U25V3KX-GP
2
2
34 2 1
LA14 SA->SB
0403 Change Q12 from 84.27002.D3F to 84.27002.E3F
1
1224 remove R113
SCD1U25V3KX-GP
SCD1U25V3KX-GP
12
R120
R120
330KR2J-L1-GP
330KR2J-L1-GP
A K
2nd = 83.9R103.F3F
2nd = 83.9R103.F3F
1016 modify D9
PM_SLP_S3# 13,33,43,44
C269
C269
D9
D9 PDZ9D1B-GP
PDZ9D1B-GP
83.9R103.C3F
83.9R103.C3F
C266
C266
PM_THRMTRIP-A# 4,7,12
R114
R114 1KR2J-1-GP
1KR2J-1-GP
H_PWRGD4,12,48
S5_ENABLE33,42,48
1 2
LA14 SA->SB
0403 Change D8 from 83.00016.B11 to 83.00016.K11
H_PWRGD#
C268
D8
D8
1
BAS16-6-GP
BAS16-6-GP
83.00016.K11
83.00016.K11
2
C268
3
SC2D2U16V3KX-GP
SC2D2U16V3KX-GP
B
12
E
Q10
Q10 MMBT2222A-3-GP
MMBT2222A-3-GP
C
84.02222.V11
84.02222.V11
2nd = 84.02222.R11
2nd = 84.02222.R11
RSMRST# 32,33
DY
DY
E
MMBT3904-3-GP
MMBT3904-3-GP
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
DY
DY
B
C
Q9
Q9
KBC_THERMALTRIP# 33
UMA Two Phase
UMA Two Phase
UMA Two Phase
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
RUN POWER and 3D3V_AUX_S5
RUN POWER and 3D3V_AUX_S5
RUN POWER and 3D3V_AUX_S5
LA14
LA14
LA14
of
39 52Thursday, May 07, 2009
39 52Thursday, May 07, 2009
39 52Thursday, May 07, 2009
SB
SB
SB
Page 40
5
CPU_CORE ISL6266A
4
3
TPS51125 5V/3D3V
2
1
RT9018A
1D5V_S0
VID0
VID1
D D
VID2
VID3
VID4
VID5
VID6
VID Setting
VID0(I / 3.3V)
VID1(I / 3.3V)
VID2(I / 3.3V)
VID3(I / 3.3V)
VID4(I / 3.3V)
VID5(I / 3.3V)
VID6(I / 3.3V)
Input Signal
CPUCORE_ON
C C
EN (I / 3.3V)
Output Signal
PGOOD
Output Power
VCC_CORE_PWR(O)
VGATE_PWRGD
VCC_CORE(Imax=38A)
Input Power
DCBATOUT_51125
S5_ENABLE 3D3V(O)
ALW_PWRGD_3V_5V
VIN
Input Signal
EN0
Output Signal
PGOOD
Output Power
5V(O)
3D3V(O)
5V(O)
5V_S5 (6A)
3D3V_S5 (6A)
5V_AUX_S5
3D3V_AUX_S5
1D8V_S3
PM_SLP_S3#
5V_S5
1D8V_S3
PM_SLP_S4#
VIN
EN
RT9026
VIN
VLDOIN
S3
S5
1D5V(O)
PGOOD
0D9V_S0
VTT
VTTREF
1D5V_S0 (2.5A)
CPUCORE_ON
0D9V_S3 (1A)
0D9V_S3_1
Voltage Sense
VCC_SENSE
VSS_SENSE
VSEN(I / Vcore)
RGND(I / Vcore)
Input Power
DCBATOUT_6266A
5V_S0
3D3V_S0
B B
VCC(I)
VCC(I)
VCC(I)
TPS51124
CHG_ON#
24750_CELLS
Charger BQ24745
Output SignalInput Signal
CHGEN#
CELLS
ACGOOD#
SRSET
AC_IN#
AD_IA
1D8V/1D05V
5V_S5
DCBATOUT_51124
PM_SLP_S4#
PM_SLP_S3#
A A
CPUCORE_ON
Input Power
VDD
VCC
Input Signal
EN1
EN2
Output Signal
PGOOD1 PGOOD2
5
Output Power
1D8V (O)
1D05V(O)
1D8V_S3 (10A)
1D05V_S0 (15A)
4
AD_OFF
AD_JK
5V_AUX_S5
Input Signal
(I)
Input Power
VCC(I)
VCC(I)
Adapter
Output Signal
3
(O)
Output Power
VCC(O)
AD_IN#
AD+
AD+
ACN
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Output PowerInput Power
VOUT (O)
BT+
VOUT (O) DCBATOUT
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Power Sequence Logic
Power Sequence Logic
Power Sequence Logic
LA14
LA14
LA14
1
of
of
of
40 52Thursday, May 07, 2009
40 52Thursday, May 07, 2009
40 52Thursday, May 07, 2009
SB
SB
SB
Page 41
5
DCBATOUT_6266ADCBATOUT DCBATOUT_6266ADCBATOUT
G53
G53
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G52
G52
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G54
G54
D D
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G51
G51
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
12
TC17
TC17
ST15U25VDM-1-GP
ST15U25VDM-1-GP
DY
DY
12
TC18
TC18
SE100U25VM-L1-GP
SE100U25VM-L1-GP
2nd = 79.10112.3JL
2nd = 79.10112.3JL
79.10712.L02
79.10712.L02
20081117
1D05V_S0
G48
G48
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G50
G50
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G49
G49
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G47
G47
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
3D3V_S0
12
R148
R148 1K91R2F-1-GP
1K91R2F-1-GP
20080930
12
R154
R154
68R2-GP
68R2-GP
C C
CPU_PROCHOT#_R4
NTC-470K-8-GP
NTC-470K-8-GP
1013 modify R161
B B
R161
R161
1 2
C25
C25
1 2
R17
R17
1 2
R19
R19
1 2
6266A_NTC_R
C325
C325
1 2
POWER SA
SC100P50V2JN-3GP
SC100P50V2JN-3GP
6266A_COMP_R
97K6R2F-GP
97K6R2F-GP
6266A_FB2_R
100R2F-L1-GP-U
100R2F-L1-GP-U
R15
R15
1 2
1 2
4K02R2F-GP
4K02R2F-GP
C22 SC1000P50V3JN-GP-UC22 SC1000P50V3JN-GP-U
R13 10K5R2F-GPR13 10K5R2F-GP
1KR2F-3-GP
1KR2F-3-GP
1
1222 modify R21,R22
A A
SCD22U50V3ZY-1GP
SCD22U50V3ZY-1GP
VGATE_PWRGD13,32
C320
C320
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
R155
R155
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
1 2
1 2
C24
C24
1 2
C32
C32
1 2
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
VCC_SENSE5
VSS_SENSE5
6266A_VSUM
C45
C45
6266A_VO
5
PSI#4
6266A_PMON_R
C328
C328
1 2
SCD015U50V3KX-GP
SCD015U50V3KX-GP
6266A_VO
SC270P50V2KX-1GP
SC270P50V2KX-1GP
6266A_VDIFF
6266A_SOFT
SB
20081121
12
12
C43
C43
SCD033U25V3KX-GP
SCD033U25V3KX-GP
6266A_PSI#
R149
R149
12
0R0402-PAD
0R0402-PAD
1 2
R150 4K99R2F-L-GPR150 4K99R2F-L-GP
1 2
R152 147KR2F-GPR152 147KR2F-GP
1 2
R157 12KR3F-GPR157 12KR3F-GP
6266A_SOFT
1 2
1KR2J-1-GP
1KR2J-1-GP
R21
R21
0R0402-PAD
0R0402-PAD
R22
R22
0R0402-PAD
0R0402-PAD
12
R32
R32 11KR2F-L-GP
11KR2F-L-GP
6266A_PMON
6266A_RBIAS
6266A_OCSET 6266A_VW 6266A_COMP 6266A_FB 6266A_FB2
12
R14
R14 1KR2F-3-GP
1KR2F-3-GP
R16
R16
DY
DY
SC330P50V2KX-3GP
SC330P50V2KX-3GP
SC330P50V2KX-3GP
SC330P50V2KX-3GP
1013 modify R162
one phase
one phase
12
12
4
H_DPRSTP#4,7,12
3D3V_S0
R141
R141
10R3F-GP
10R3F-GP
12
C314
C314
6266A_3V3
U5
U5
49
GND
1
PGOOD
2
PSI#
3
PMON
4
RBIAS
5
VR_TT#
6
NTC
7
SOFT
8
OCSET
9
VW
10
COMP
11
FB
12
FB2
6266A_VDIFF
POWER SB
20081121
SB
12
C35
C35
12
C28
C28
12
R30
R30 2K61R2F-1-GP
2K61R2F-1-GP
6266A_VSUM_R_VO
12
R162
R162 NTC-10K-26-GP
NTC-10K-26-GP
4
PM_DPRSLPVR 7,13
CPUCORE_ON 43,44
12
H_VID6
H_VID5
H_VID4
12
12
DY
R145 499R2F-2-GPR145 499R2F-2-GP
1 2
1 2
R140 0R0402-PADR140 0R0402-PAD
R147 0R2J-2-GPDYR147 0R2J-2-GP
6266A_VR_ON
6266A_DPRSTP#
6266A_DPRSLPVR
46
CLK_EN#
DPRSTP#
6266A_DROOP
6266A_RTN
R18
R18
2K87R2F-1-GP
2K87R2F-1-GP
12
12
44
45
DPRSLPVR
ISL6266AHRZ-GP
ISL6266AHRZ-GP
74.06266.073
74.06266.073
6266A_DFB
R23
R23
12
C37
C37
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C41
C41
C36
C36 SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
48
47
3V3
VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1
6266A_VSEN
1 2
R144 0R0402-PADR144 0R0402-PAD
6266A_D6
43
VR_ON
12
1KR2F-3-GP
1KR2F-3-GP
SCD33U10V3KX-3GP
SCD33U10V3KX-3GP
1 2
1 2
R138 0R0402-PADR138 0R0402-PAD
R139 0R0402-PADR139 0R0402-PAD
R143 0R0402-PADR143 0R0402-PAD
6266A_D4
6266A_D5
6266A_VIN
6266A_VSUM
DCBATOUT_6266A
6266A_VO
R24
R24
10R3F-GP
10R3F-GP
12
C29
C29
12
1
1222 modify R136~140,R142~R144,R146
H_VID3
H_VID2
H_VID1
1 2
1 2
1 2
R142 0R0402-PADR142 0R0402-PAD
R137 0R0402-PADR137 0R0402-PAD
R146 0R0402-PADR146 0R0402-PAD
6266A_D1
6266A_D2
6266A_D3
6266A_ISEN2
6266A_VDD
12
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
R25
R25
1 2
10R2F-L-GP
10R2F-L-GP
12
C31
C31
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
Single Phase R47=1.2K, R63=5.6K,R460=0R C33=47p, C49=0.033u, C52=0.1u
DY=U7,U28,U29,L9,R62,R56,R42, R45,R37,R39,R48,C20
H_VID[6..0] 5
H_VID0
1 2
R136 0R0402-PADR136 0R0402-PAD
6266A_D0
VID037VID138VID239VID340VID441VID542VID6
BOOT1 UGATE1 PHASE1
PGND1
LGATE1
PVCC
LGATE2
PGND2 PHASE2 UGATE2
BOOT2
NC#25
24
6266A_ISEN1
R20
R20
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
5V_S0
R31
R31
1 2
3
Id=19.5A Qg=21.5~33nC, Rdson=5.5~6.7mohm
POWER SB
R151
6266A_BOOT1
36
6266A_UGATE1
35
6266A_PHASE1
34 33
6266A_ LGATE1
32
5V_S06266A_NTC
31
6266A_LGATE2
30 29
6266A_PHASE2
28
6266A_UGATE2
27
6266A_BOOT2
26 25
C34
C34
1 2
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
C33
C33
1 2
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
R151
1 2
2D2R2J-GP
2D2R2J-GP
1 2
R156
R156
1 2
One phase--> C33,C34 are
63.R0034.1DL
6266A_VO
1230 modify C33,C34
5V_S0
1229 modify R20
0212 LA14_SA del R20
0R0402-PAD
0R0402-PAD
3
6266A_UGATE1
6266A_PHASE1
6266A_BOOT1_R
21C321
21C321
SCD22U25V3KX-GP
SCD22U25V3KX-GP
C327
C327
SC2D2U16V3KX-GP
SC2D2U16V3KX-GP
C329
C329
2
2
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1
1
6266A_BOOT2_R
2D2R2J-GP
2D2R2J-GP
one phase
one phase
6266A_LGATE2
2009/01/13
2nd = 84.01426.037
2nd = 84.01426.037
84.07672.037
84.07672.037
2nd = 84.01712.037
2nd = 84.01712.037
6266A_ LGATE1
6266A_VSUM
6266A_ISEN1
6266A_VO 6266A_ISEN2
one phase
one phase
2nd = 84.01426.037
2nd = 84.01426.037
6266A_UGATE2
6266A_PHASE2
84.07672.037
84.07672.037
2nd = 84.01712.037
2nd = 84.01712.037
6266A_VSUM 6266A_ISEN2
6266A_VO 6266A_ISEN1
DG
DG
U38
U38
FDMS8692-GP
FDMS8692-GP
84.08692.037
84.08692.037
1 2 1 2
1 2 1 2
4 5
U7
U7
GD
GD
FDMS7672-GP
FDMS7672-GP
4 5
R33 3K65R2F-1-GPR33 3K65R2F-1-GP R36 10KR2F-2-GP
R36 10KR2F-2-GP
one phase
one phase
R35 1R2F-GPR35 1R2F-GP R34 10KR2F-2-GP
R34 10KR2F-2-GP
one phase
one phase
2009/01/13
678
D
DG
D
DG
U34
U34
FDMS8692-GP
FDMS8692-GP
84.08692.037
84.08692.037
R27
R27
1 2
R26
R26
1 2
R29
R29
1 2
R28
R28
1 2
U6
U6
FDMS7672-GP
FDMS7672-GP
one phase
one phase
4 5
678
DDD
DDD
GD
GD
4 5
one phase
one phase
3K65R2F-1-GP
3K65R2F-1-GP 10KR2F-2-GP
10KR2F-2-GP
1R2F-GP
1R2F-GP 10KR2F-2-GP
10KR2F-2-GP
one phase
one phase
678
D
D
678
DDD
DDD
DSD S
DSD S
S
S
2
DSD S
DSD S
S
S
123
SSS
SSS
123
123
SSS
SSS
123
2
U37
U37
2nd = 84.01712.037
2nd = 84.01712.037
6266A_ISEN1_P1_VCORE
6266A_ISEN2_P1_VCORE
one phase
one phase
U36
U36
one phase
one phase
FDMS7672-GP
FDMS7672-GP
2nd = 84.01712.037
2nd = 84.01712.037
6266A_ISEN2_P2_VCORE
one phase
one phase
1
DCBATOUT_6266A
12
DY
DY
Cyntec 10*10*4 DCR=1.05+-5%mohm, Irating=30A Isat=60A
1 2
678
DDD
DDD
2nd = 68.R3610.20C
2nd = 68.R3610.20C
SSS
GD
SSS
GD
FDMS7672-GP
FDMS7672-GP
123
4 5
1 2
84.07672.037
84.07672.037
-1 -1
678
DDD
DDD
SSS
GD
SSS
GD
one phase
one phase
123
4 5
84.07672.037
84.07672.037
6266A_ISEN1_P2_VCORE
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
Date: Sheet of
12
C12
C12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
L8
L8
L-D36UH-1-GP
L-D36UH-1-GP
68.R3610.20A
68.R3610.20A
G57
G57 GAP-CLOSE
GAP-CLOSE
12
C310
C310
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
Cyntec 10*10*4 DCR=1.05+-5%mohm, Irating=30A Isat=60A
L9
L9
1 2
one phase
one phase
L-D36UH-1-GP
L-D36UH-1-GP
68.R3610.20A
68.R3610.20A
2nd = 68.R3610.20C
2nd = 68.R3610.20C
G60
G60 GAP-CLOSE
GAP-CLOSE
1 2
ISL6266A_CPU_CORE
ISL6266A_CPU_CORE
ISL6266A_CPU_CORE
LA14
LA14
LA14
12
C311
C311
C313
C313
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
2nd = 77.C3371.051
2nd = 77.C3371.051
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
12
TC4
TC4
SE330U2VDM-L-GP
SE330U2VDM-L-GP
CAP
CAP
G58
G58 GAP-CLOSE
GAP-CLOSE
79.33719.L01
79.33719.L01
DCBATOUT_6266A
C312
C312
SC10U25V6KX-1GP
SC10U25V6KX-1GP
CAP
CAP
G59
G59 GAP-CLOSE
GAP-CLOSE
1 2
2nd = 77.C3371.051
2nd = 77.C3371.051
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
2nd = 77.C3371.051
2nd = 77.C3371.051
12
C11
C11
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
12
TC3
TC3
SE330U2VDM-L-GP
SE330U2VDM-L-GP
CAP
CAP
79.33719.L01
79.33719.L01
41 52Thursday, May 07, 2009
41 52Thursday, May 07, 2009
41 52Thursday, May 07, 2009
1
DY
DY
C317
C317 SCD1U50V3KX-GP
SCD1U50V3KX-GP
Vcc_core Iomax=38A
VCC_CORE
12
1 2
12
12
TC20
TC20
SE330U2VDM-L-GP
SE330U2VDM-L-GP
CAP
CAP
79.33719.L01
79.33719.L01
DY
DY
C316
C316
SCD1U50V3KX-GP
SCD1U50V3KX-GP
VCC_CORE
TC1
TC1
SE330U2VDM-L-GP
SE330U2VDM-L-GP
79.33719.L01
79.33719.L01
2nd = 77.C3371.051
2nd = 77.C3371.051
SB
SB
SB
TC2
TC2
SE330U2VDM-L-GP
SE330U2VDM-L-GP
Page 42
5
4
3
2
1
DCBATOUT_51125DCBATOUT
G73
G73
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G45
G45
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G46
G46
D D
12
TC30
TC30 SE68U25VM-3-GP
SE68U25VM-3-GP
79.68612.30L
79.68612.30L
2nd = 79.68612.L01
2nd = 79.68612.L01
12
TC13
TC13 ST15U25VDM-1-GP
ST15U25VDM-1-GP
DY
DY
C C
Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A
Iomax=5A
3D3V_PWR
12
C287
C287
DY
DY
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
B B
77.C2271.00L
77.C2271.00L
2nd = 77.22271.27L
2nd = 77.22271.27L
A A
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G74
G74
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G75
G75
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G43
G43
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G44
G44
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
DCBATOUT_51125
C298
C298
12
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
6K65R2F-GP
6K65R2F-GP
10KR2F-2-GP
10KR2F-2-GP
20081117
0113 modify U23 for Power demand
C295
C295
C508
C508
12
12
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
68.3R310.20A
68.3R310.20A
2nd = 68.3R31A.10E
2nd = 68.3R31A.10E
L15
L15
1 2
IND-3D3UH-57GP
IND-3D3UH-57GP
TC8
TC8
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
12
G42
G42
12
R265
R265
12
R269
R269
SC10U25V6KX-1GP
SC10U25V6KX-1GP
12
DY
DY
51125_FB2_R
12
C516
C516 SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
DY
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
12
DY
DY
D
678
DDD
DDD
SSS
SSS
123
D
678
DDD
DDD
SI4812BDY-T1-E3-GP
SI4812BDY-T1-E3-GP
SSS
SSS
123
Id=7.7A Qg=8.5~13nC
R262
R262 0R2J-2-GP
0R2J-2-GP
Rdson=16.5~21mohm
Close to VFB Pin (pin5)
5
3D3V_S53D3V_PWR
G30
G30
1 2
G40
G40
1 2
G11
G11
1 2
G41
G41
1 2
G10
G10
1 2
G12
G12
1 2
G38
G38
1 2
Id=7A Qg=8.7~13nC Rdson=23~30mohm
U22
U22 SI4800BDY-T1
SI4800BDY-T1
84.04800.D37
84.04800.D37
2nd = 84.08884.037
2nd = 84.08884.037
GD
GD
C528
GS
U23
U23
GD
GD
C528
SCD1U25V3KX-GP
SCD1U25V3KX-GP
84.04812.A37
84.04812.A37
4 5
2nd = 84.06690.E37
2nd = 84.06690.E37
4 5
GS
51125_VREF
3D3V_AUX_S5
51125_VREF
1222 modify R281
1
3D3V_AUX_S5
51125_VBST2
12
51125_ENTIP2 51125_ENTIP1
S5_ENABLE33,39,48 S5_ENABLE 33,39,48
51125_ENTIP2 51125_ENTIP1
12
C521
C521
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
1 2
R280 820KR2F-GPR280 820KR2F-GP
51125_VREF
SCD22U6D3V2KX-1GP
SCD22U6D3V2KX-1GP
12
C517
C517
R264
R264 0R0402-PAD
0R0402-PAD
12
R261
R261
12
DY
DY
0R2J-2-GP
0R2J-2-GP
R283
R283
12
DY
DY
0R2J-2-GP
0R2J-2-GP
R281
R281
1 2
0R0402-PAD
0R0402-PAD
R282
R282
12
DY
DY
0R2J-2-GP
0R2J-2-GP
4
12
DY
DY
DCBATOUT_51125
51125_DRVH2
51125_DRVL2
51125_TONSEL
51125_SKIPSEL51125_SKIPSEL
TPS51125RGER-GP
TPS51125RGER-GP
74.51125.073
74.51125.073
3D3V_AUX_S5
R268
R268 110KR3F-GP
110KR3F-GP
12
R457
R457 249KR2F-GP
249KR2F-GP
DY
DY
51125_EN
20090204
51125_LL2
51125_FB2
51125_EN
51125_ENTIP2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
9 10 11 12
7
5
13
6
3
4
14
G79
G79
1 2
U47
U47
VBST2 DRVH2 LL2 DRVL2
VO2 VFB2
EN0 ENTRIP2 VREF TONSEL
SKIPSEL
C524
C524
1020 delete C537 for Power demand
DCBATOUT_51125
16
VREG3
8
3D3V_AUX_S5_5_51125
12
POWER SA
Q25
Q25
3 4 2 1
84.27002.E3F
84.27002.E3F
2N7002DW-2-GP-U
2N7002DW-2-GP-U
C533
C533
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
12
VIN
22
VBST1
21
DRVH1
20
LL1
19
DRVL1
24
VO1
2
VFB1
23
PGOOD
1
ENTRIP1
15
GND
25
GND
18
VCLK
VREG5
17
G80
G80
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
5V_AUX_S5_51125
12
C534
C534 SC10U10V5KX-2GP
SC10U10V5KX-2GP
5V_AUX_S5
4
RN59
RN59 SRN100KJ-6-GP
SRN100KJ-6-GP
5 6
1
2 3
Q26
Q26
5 6
84.27002.E3F
84.27002.E3F
2N7002DW-2-GP-U
2N7002DW-2-GP-U
34 2 1
LA14 SA->SB
0403 Change Q25,Q26 from 84.27002.D3F to 84.27002.E3F
1121 modify R275
SB
0113 modify U29 for Power demand
Id=7A
51125_VBST1 51125_DRVH1 51125_LL1 51125_DRVL1
51125_VO151125_VO2 51125_FB1
51125_PGOOD 51125_ENTIP1
51125_VCLK
5V_AUX_S5
3
TPAD28TPAD28
12
DY
DY
20090204
Qg=8.7~13nC Rdson=23~30mohm
R458
R458 100KR2F-L1-GP
100KR2F-L1-GP
S5_ENABLE
2nd = 84.08884.037
2nd = 84.08884.037
SCD1U25V3KX-GP
SCD1U25V3KX-GP
3D3V_S5
12
R276
R276 100KR2J-1-GP
100KR2J-1-GP
DY
DY
C529
C529
1 2
U28
U28
84.04800.D37
84.04800.D37
GS
U29
U29
SI4812BDY-T1-E3-GP
SI4812BDY-T1-E3-GP
GS
Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm
R275
R275
120KR3F-GP
120KR3F-GP
C301
C301
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
D
678
DDD
DDD
SSS
GD
SSS
GD
123
4 5
678
DDD
DDD
SSS
GD
SSS
GD
123
4 5
2
DY
SI4800BDY-T1
SI4800BDY-T1
D
2nd = 68.3R31A.10E
2nd = 68.3R31A.10E
84.04812.A37
84.04812.A37
2nd = 84.06690.E37
2nd = 84.06690.E37
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
G37
G37
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G35
G35
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G83
G83
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G36
G36
C283
C283
12
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Iomax=5A
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
42 52Thursday, May 07, 2009
42 52Thursday, May 07, 2009
42 52Thursday, May 07, 2009
1
G34
G34
G31
G31
G32
G32
5V_PWR
2nd = 77.92271.021
2nd = 77.92271.021
of
12
C519
C519
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
12
DY
DY
DCBATOUT_51125
C299
C299
C294
C294
12
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
DY
DY
Cyntec 7*7*3 DCR=30mohm, Irating=6A Isat=13.5A
L6
L6
1 2
IND-3D3UH-57GP
IND-3D3UH-57GP
68.3R310.20A
68.3R310.20A
12
R273
R273
DY
DY
0R2J-2-GP
0R2J-2-GP
12
C518
C518
DY
DY
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet of
Date: Sheet of
Date: Sheet
G39
G39
12
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
DY
DY
1013 modify TC11 and add TC12
12
R270
R270 30KR2F-GP
30KR2F-GP
51125_FB1_R
DCDC 5V/3D3V (TPS51125)
DCDC 5V/3D3V (TPS51125)
DCDC 5V/3D3V (TPS51125)
1118 delete TC12
SB
12
R266
R266 20KR2F-L-GP
20KR2F-L-GP
Close to VFB Pin (pin2)
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
LA14
LA14
LA14
5V_S55V_PWR
TC11
TC11
SE220U6D3VM-7GP
SE220U6D3VM-7GP
12
79.22710.6AL
79.22710.6AL
SB
SB
SB
Page 43
5
4
3
2
1
1D5V_S0
1D8V_S3
D D
SC10U10V5KX-LGP
SC10U10V5KX-LGP
PM_SLP_S3#13,33,39,44
C C
CPUCORE_ON41,44
PM_SLP_S3# 5912_EN_U111
R77
R77
DY
DY
C151
C151
R76
R76
12
0R0402-PAD
0R0402-PAD
12
12
0R0402-PAD
0R0402-PAD
3D3V_S0
12
C150
C150
R78
R78
2K2R2J-2-GP
2K2R2J-2-GP
12
SC10U10V5KX-2GP
SC10U10V5KX-2GP
5V_S5
20081001
12
C158
C158
SC1U16V3KX-2GP
SC1U16V3KX-2GP
9
GND
VOUT
ADJ
GND
5 6 7 8
VDD4NC#5
3
VIN
2
EN
1
PGOOD
U13
U13 RT9018A-25PSP-GP
RT9018A-25PSP-GP
74.09018.A3D
74.09018.A3D
Iomax=2.5A
12
R74
R74 18KR2J-GP
18KR2J-GP
5912_FB_U1115912_POK_U111
12
R75
R75 20K5R2F-GP
20K5R2F-GP
Vo(cal.)=1.5024V
1D5V_LDO
C137
C137
SC100P50V2JN-3GP
SC100P50V2JN-3GP
12
12
C141
C141
SC10U10V5KX-2GP
SC10U10V5KX-2GP
12
Vo=0.8*(1+(R1/R2))
DY
DY
C148
C148
SC10U10V5KX-LGP
SC10U10V5KX-LGP
G6
G6
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR G8
G8
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR G7
G7
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR G5
G5
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1D5V_S0
B B
5V_S5
12
C520
C520
SC1U10V3KX-3GP
SC1U10V3KX-3GP
R267
PM_SLP_S4#13,33,44
DDR_VREF_S3_1
A A
5
R267
R263
R263
0R0402-PAD
0R0402-PAD 0R0402-PAD
0R0402-PAD
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12 12
C513
C513
9026_S5 9026_S3
12
20081001
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1016 modify U45
U45
U45
10
VDDQSNS
VIN
9 8 7 6
RT9026PFP-GP
RT9026PFP-GP
74.09026.079
74.09026.079
4
S5 GND S3 VTTREF
VLDOIN
PGND
VTTSNS
GND
11
VTT
C522
C522
1D8V_S3
12
1 2 3 4 5
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C523
C523
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
12
C509
C509
DDR_VREF_PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
12
C512
C512
SC10U10V5KX-2GP
SC10U10V5KX-2GP
3
Iomax=1A OCP>2A
DDR_VREF_S3
G78
G78
G77
G77
G76
G76
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
1D5V & 0D9V
1D5V & 0D9V
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet
Date: Sheet of
2
Date: Sheet of
1D5V & 0D9V
LA14
LA14
LA14
1
SB
SB
of
43 52Thursday, May 07, 2009
43 52Thursday, May 07, 2009
43 52Thursday, May 07, 2009
SB
Page 44
5
G71
G71
1 2
G69
G69
1 2
G68
G68
1 2
G67
G67
1 2
G70
G70
1 2
G72
G72
1 2
R278
R278
0R0402-PAD
0R0402-PAD
R277
R277
0R0402-PAD
0R0402-PAD
DCBATOUT_51124
20081117
C525
SC4D7U10V5KX-1GP
SC4D7U10V5KX-1GP
12
DY
DY
12
DY
DY
C525
1
1
BC2
BC2
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
2
2
1
1
BC1
BC1
SCD47U6D3V2KX-GP
SCD47U6D3V2KX-GP
2
2
12
TC29
TC29 SE68U25VM-3-GP
SE68U25VM-3-GP
79.68612.30L
79.68612.30L
2nd = 79.68612.L01
2nd = 79.68612.L01
5V_S5
12
51124_LL1
DCBATOUT
GAP-CLOSE-PWR
GAP-CLOSE-PWR
D D
C C
DY
DY
12
TC28
TC28 ST15U25VDM-3-GP
ST15U25VDM-3-GP
PM_SLP_S4#13,33,43
PM_SLP_S3#13,33,39,43
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1
1222 modify R277,R278
B B
1121 modify R271,R272
SB
Modify 0429 R271 change to 64.95315.55L
A A
5
4
3
Vtrip(mV)=Rtrip(Kohm)*10(uA) Iocp=(Vtrip/Rdson)+((1/(2*L*f))*((Vin-Vout)*Vout)/Vin))
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
1M
0204 modify these symbol of C531and C532
2008/06/16
R279
R279 0R0402-PAD
0R0402-PAD
12
R274
R274
3D3R3J-L-GP
3D3R3J-L-GP
51124_V5FILT
9K53R3F-2-GP
9K53R3F-2-GP
TONSEL
12
C300
C300
SC1U10V3KX-3GP
SC1U10V3KX-3GP
51124_EN1 51124_EN2
R271
R271
240k/CH1 300k/CH2
1D05V_PWR 1D8V_PWR 51124_VFB2 51124_VFB1
U46
U46
15
V5FILT
16
V5IN
23
EN1
8
EN2
3
GND
25
GND
13
PGND2
18
PGND1
51124_TRIP1
51124_TRIP2
12
12
C527
C527
12
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP C526
C526
12
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
GND
2
5
VFB1
TRIP1
17
14
R272
R272 10KR2F-2-GP
10KR2F-2-GP
51124_VBST1
51124_VBST251124_LL2
OPEN
300k/CH1 360k/CH2
1
6
VO1
VO2
VFB2
VBST2
TRIP2
VBST1
9
22
51124_V5FILT
51124RGER_PG1
51124RGER_PG2
7
24
PGOOD2
PGOOD1
4
51124_TONSEL
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
360k/CH1 420k/CH2
R284
R284 0R0402-PAD
0R0402-PAD
DRVH1
LL1
DRVL1
DRVH2
LL2
DRVL2
TONSEL
R288
R288
V5FILT
12
12
21 20 19
10 11 12
TPS51124RGER-GPU1
TPS51124RGER-GPU1
74.51124.073
74.51124.073
DY
DY
1 2
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1 2
DY
DY
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1 2
51124_DRVH1 51124_LL1 51124_DRVL1
51124_DRVH2 51124_LL2 51124_DRVL2
R287
R287 0R2J-2-GP
0R2J-2-GP
CPUCORE_ON 41,43
C531
C531
C532
C532
Vout=0.758V*(R1+R2)/R2 --> PWM mode Vout=0.764V*(R1+R2)/R2 --> Skip Mode
4
3
2nd = 84.08884.037
2nd = 84.08884.037
Id=7A Qg=8.7~13nC Rdson=23~30mohm
SI4168DY-T1-GE3-GP
SI4168DY-T1-GE3-GP
84.04168.037
84.04168.037
2nd = 84.08672.A37
2nd = 84.08672.A37
Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm
2nd = 84.08692.037
Id=7A Qg=8.7~13nC Rdson=23~30mohm
Id=7.7A Qg=8.5~13nC Rdson=16.5~21mohm
SB
2nd = 84.08692.037
2nd = 84.07672.037
2nd = 84.07672.037
1127 modify U27
SB
U24
U24
SI4800BDY-T1
SI4800BDY-T1
84.04800.D37
84.04800.D37
U25
U25
U26
U26
AOL1426-GP
AOL1426-GP
84.01426.037
84.01426.037
U27
U27
AOL1712-GP
AOL1712-GP
84.01712.037
84.01712.037
1128 add TC25
1017 add TC25
2
1128 add TC26
SB
DCBATOUT_51124
678
DDD
DDD
Cyntec 10*10*4 DCR=4.2mohm, Irating=16A
SSS
GD
SSS
GD
Isat=33A
123
4 5
L17
L17
1 2
IND-1D5UH-34-GP
IND-1D5UH-34-GP
678
DDD
DDD
SSS
GD
SSS
GD
123
4 5
DCBATOUT_51124
678
DDD
DDD
GD
GD
123
4 5
678
DDD
DDD
GD
GD
123
4 5
DY
DY
2nd = 79.3971V.E0L
2nd = 79.3971V.E0L
30KR2F-GP
30KR2F-GP
51124_VFB1
21K5R3F-GP
21K5R3F-GP
C514
C514
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
Cyntec 10*10*4
SSS
SSS
DCR=4.2mohm, Irating=16A Isat=33A
L16
L16
1 2
IND-D88UH-GP
IND-D88UH-GP
2nd = 68.R8810.10B
2nd = 68.R8810.10B
11K8R2F-GP
11K8R2F-GP
51124_VFB2
SSS
SSS
30KR2F-GP
30KR2F-GP
1D05V_S0
TC25
TC25
12
SE390U2D5VM-2GP
SE390U2D5VM-2GP
79.3971V.6AL
79.3971V.6AL
2
1
79.3971V.6AL
79.3971V.6AL
2nd = 79.3971V.E0L
2nd = 79.3971V.E0L
C511
C511 SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
68.1R510.10J
68.1R510.10J
2nd = 68.1R51A.10A
2nd = 68.1R51A.10A
12
R285
R285
DY
DY
12
R290
R290
DY
DY
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
C535
C535
12
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
1D8V_S3
TC26
TC26
12
C515
C515
DY
DY
1D8V_PWR
C282
C282
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
12
DY
DY
2nd = 77.C3371.10L
2nd = 77.C3371.10L
SE390U2D5VM-2GP
SE390U2D5VM-2GP
12
TC10
TC10
79.33719.20D
79.33719.20D
DY
DY
1 2
1D8V_PWR
C297
C297
SCD1U50V3KX-GP
SCD1U50V3KX-GP
ST330U2VDM-3GP
ST330U2VDM-3GP
1D8V Iomax=10A OCP>15A
1013 modify TC10 and add TC26
12
C510
C510 SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
1121 modify L16,R286
SB
12
C536
C536
12
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
DY
12
DY
DY
R289
R289
R286
R286
20081117
C296
C296
SCD1U50V3KX-GP
SCD1U50V3KX-GP
DY
DY
1 2
1D05V_PWR
C284
C284
12
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2nd = 77.C3371.10L
2nd = 77.C3371.10L
12
TC9
TC9
ST330U2D5VDM-9GP
ST330U2D5VDM-9GP
77.23371.13L
77.23371.13L
1D05V_PWR 1D05V_S0
1D05V Iomax=14A OCP>24A
20081117
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet
Date: Sheet of
Date: Sheet of
TPS51124_1D8V_1D05V
TPS51124_1D8V_1D05V
TPS51124_1D8V_1D05V
LA14
LA14
LA14
1
G28
G28
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G25
G25
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G21
G21
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G22
G22
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G19
G19
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G20
G20
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G18
G18
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G26
G26
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G29
G29
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G27
G27
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G24
G24
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G23
G23
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G65
G65
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G62
G62
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G63
G63
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G64
G64
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G17
G17
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G16
G16
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G13
G13
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G14
G14
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G15
G15
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
G66
G66
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
of
44 52Thursday, May 07, 2009
44 52Thursday, May 07, 2009
44 52Thursday, May 07, 2009
1D8V_S3
SB
SB
SB
Page 45
A
DC1
DC1
GND
GND
5 6 4 1 2
4 4
DC-JACK163-GP
DC-JACK163-GP
22.10037.H31
22.10037.H31
3 NP1
1121 add the part(EC88) for EMI demand
SB
SCD1U50V3KX-GP
SCD1U50V3KX-GP
DY
DY
12
EC88
EC88
1 2
EC11
EC11
1022 modify DC1
1125 add the part(EC91) for EMI demand
SB
AD_OFF33
3 3
1016 modify Q4
B
Adaptor in to generate DCBATOUT
12
EC91
EC91
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
SCD1U25V2ZY-1GP
Q4
Q4
R1
R1
1
DTC124EUB-GP
DTC124EUB-GP
2nd = 84.00124.M1K
2nd = 84.00124.M1K 3rd = 84.00124.H1K
3rd = 84.00124.H1K
AD_JK
12
C5
C5 SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
R2
R2
84.00124.S1K
84.00124.S1K
2nd = 83.P6SBM.AAG
2nd = 83.P6SBM.AAG
AD_OFF#_JK
3 2
D1
P6SMBJ20A-GP
P6SMBJ20A-GP
83.P6SMB.AAG
83.P6SMB.AAG
D1
C
A K
200KR2F-L-GP
200KR2F-L-GP
Q3
Q3
R2
R2
1
DTA124EUB-GP
DTA124EUB-GP
2nd = 84.00124.N1K
2nd = 84.00124.N1K 3rd = 84.00124.K1K
3rd = 84.00124.K1K
2
R1
R1
3
84.00124.T1K
84.00124.T1K
1016 modify Q3
R7
R7
1 2
AD+_2
C10
C10
12
SC1U50V5ZY-1-GP
SC1U50V5ZY-1-GP
12
R6
R6 100KR2J-1-GP
100KR2J-1-GP
D
U2
U2
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4433-GP
AO4433-GP
84.04433.A37
84.04433.A37
2nd = 84.04407.F37
2nd = 84.04407.F37
D
D D
D D
D
1013 modify U2
E
AD+
8 7 6
LA_SA 0216 Change DC1 from 22.10037.F11 to 22.10037.H31
BATA_SDA_1 48 BATA_SCL_1 48 BAT_IN#_1 48
BATTERY CONNECTOR
1127 modify BAT1
SB
2 2
BAT_SDA33,46 BAT_SCL33,46
BAT_IN#33
1 1
1M
0204 modify these symbol of EC52 and EC53
RN4
RN4
KA
D2
D2
DY
DY
MMPZ5232BPT-GP-U
MMPZ5232BPT-GP-U
BT+
EC13
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
EC13
12
12
1 2 3 4 5
SRN33J-7-GP
SRN33J-7-GP
EC14
EC14
SCD1U50V3ZY-GP
SCD1U50V3ZY-GP
8 7 6
BATA_SDA_1 BATA_SCL_1 BAT_IN#_1
EC53
EC53
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1 2
Modify 0506 SB->SC Add EC50,EC51 and EC52.
MLVS0402M04-GP
MLVS0402M04-GP
MLVS0402M04-GP
MLVS0402M04-GP
12
SB
DY
DY
1 2
SB
EC52
EC52
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
MLVS0402M04-GP
MLVS0402M04-GP
12
EL3
EL3
BATT_SENSE46
EL1
EL1
DY
DY
12
EL2
EL2
DY
DY
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
12
EC50
EC50
R8
R8
1 2
0R0402-PAD
0R0402-PAD
12
EC51
EC51
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
1119 modify EC52 and EL3
A
B
C
BAT1
BAT1
9
GND
8
GND
7
GND
6
GND
5
DAT
4
CLK
3
BAT_IN
2
BT+2
1
BT+1
SYN-CON7-40-GP
SYN-CON7-40-GP
20.81171.007
20.81171.007
2nd = 20.81179.007
2nd = 20.81179.007
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
D
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
AD/BATT CONN
AD/BATT CONN
AD/BATT CONN
LA14
LA14
LA14
45 52Thursday, May 07, 2009
45 52Thursday, May 07, 2009
45 52Thursday, May 07, 2009
SB
SB
of
of
of
E
SB
Page 46
5
4
3
2
1
1013 modify U3
AD+
D
D
8
D
D
7
D
D
6
AO4433-GP
D D
C C
R169
R169
49K9R2F-L-GP
49K9R2F-L-GP
AD_IA33
B B
A A
AO4433-GP
84.04433.A37
84.04433.A37
2nd = 84.04407.F37
2nd = 84.04407.F37
R10
R10 10KR2F-2-GP
10KR2F-2-GP
1 2
DC_IN_D
12
12
CHG_AGND
R172
R172
1 2
0R0402-PAD
0R0402-PAD
C348
SC220P50V2KX-3GP
SC220P50V2KX-3GP
C348
3D3V_AUX_S5
C342
C342 SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
U3
U3
S
S
1
S
S
2
S
S
3
GD
GD
45
49K9R2F-L-GP
49K9R2F-L-GP
AD+_G_1
AC_OK
3D3V_AUX_S5
12
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
BQ24745_VREF
5
NEAR
12
R11
R11 100KR2J-1-GP
100KR2J-1-GP
AD+_G_2
12
R12
R12
1234
5
6
SC150P50V2JN-3GP
SC150P50V2JN-3GP
C336
C336
1 2
C337
C337
BQ24745_EAO_RC
12
1 2 3 4 5
SRN100KJ-8-GP-U
SRN100KJ-8-GP-U
20080605
2N7002DW-2-GP-U
2N7002DW-2-GP-U
84.27002.E3F
84.27002.E3F
Q2
Q2
12
C350
C350 SC1U10V3KX-3GP
SC1U10V3KX-3GP
CHG_AGND
R171
R171
1 2
200KR2F-L-GP
200KR2F-L-GP
7K5R2F-1-GP
7K5R2F-1-GP
1 2
C341
C341
SC56P50V2JN-2GP
SC56P50V2JN-2GP
RN43
RN43
8 7 6
R164
R164
309KR3F-GP
309KR3F-GP
AC_OK
R167
R167
12
AC_OK CHG_ON# AC_IN# BQ24745_CHG_ON
AD+_TO_SYS
LA14 SA->SB
0403 Change Q2 from 84.27002.D3F to 84.27002.E3F
AD+
1016 modify D13
D13
D13 1SS400GPT-GP
1SS400GPT-GP
83.00400.C1F
83.00400.C1F
K A
2nd = 83.1S400.A2F
2nd = 83.1S400.A2F
AD+
12
C358
C358
SC1U25V5KX-1GP
SC1U25V5KX-1GP
12
R183
R183
1 2
0R0402-PAD
0R0402-PAD
BAT_SCL33,45
BAT_SDA33,45
R166
R166
1 2
4K7R2J-2-GP
4K7R2J-2-GP
12
C338
C338 SC1U10V3KX-3GP
SC1U10V3KX-3GP
CHG_AGND
BQ24745_DCIN BQ24745_ACIN
BQ24745_ACOK
CHG_AGND
BQ24745_IINP
BQ24745_FBOBQ24745_FBO_RC
BQ24745_EAI BQ24745_EAO BQ24745_VREF BQ24745_CHG_ON
CHG_AGND
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
4
U41
U41
22
DCIN
2
ACIN
11
VDDSMB
13
ACOK
10
SCL
9
SDA
14
NC#14
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
BQ24745RHDR-GP
BQ24745RHDR-GP
BQ24745_CHG_ON
DY
DY
12
C345
C345
C340
C340
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1
CSSP
ICREF
CSSN
ICOUT
BOOT
VDDP
UGATE
PHASE
LGATE
PGND CSOP CSON
NC#16
VFB
GND
29
74.24745.073
74.24745.073
3 4
AC_OK CHG_ON#
2 1
GAP-CLOSE-PWR
GAP-CLOSE-PWR
BQ24745_CSSP
12
28
BQ24745_CSSN
27 26
BQ24745_BST
25
BQ24745_VDDP
21
24
BQ24745_LX1
23
20
19 18 17
16
BATT_SENSE
15
Q20
Q20
5 6
84.27002.E3F
84.27002.E3F
2N7002DW-2-GP-U
2N7002DW-2-GP-U
G3
G3
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
TP47TP47
D01R2512F-4-GP
D01R2512F-4-GP
DCBATOUT
EC54
EC54
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
R9
R9
1 2
G4
G4
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
POWER SB
C347
C347
BATT_SENSE 45
12
C364
C364 SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
CHG_ON# 33
AC_IN# 33
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
CHG_AGND
D12
D12
K A
CH520S-30PT-GP
CH520S-30PT-GP
2nd = 83.R2003.A8M
2nd = 83.R2003.A8M
1 2
C351
C351 SCD1U50V3KX-GP
SCD1U50V3KX-GP
84.04800.D37
84.04800.D37
2nd = 84.08884.037
2nd = 84.08884.037
C367
C367
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
83.R0203.08F
83.R0203.08F
24745_HIGH_G
24745_LOW_G
C365
C365
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
AC_IN# to KBC
12
C344
C344
CHG_AGND
LA14 SA->SB
0403 Change Q20 from 84.27002.D3F to 84.27002.E3F
AC_IN#AC_IN#
12
C339
C339 SC1U10V3KX-3GP
SC1U10V3KX-3GP
3
AD+
C324
C324
12
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
678
U32
U32
DDD
DDD
SSS
GD
SSS
GD
SI4800BDY-T1
SI4800BDY-T1
123
4 5
678
U39
U39
DDD
DDD
SSS
GD
SSS
GD
SI4800BDY-T1
SI4800BDY-T1
123
4 5
MAX8731A_CSIP MAX8731A_CSIN
2
12
12
L7
L7
1 2
IND-5D6UH-32-GP
IND-5D6UH-32-GP
68.5R610.10I
68.5R610.10I
2nd = 68.5R610.201
2nd = 68.5R610.201
84.04800.D37
84.04800.D37
2nd = 84.08884.037
2nd = 84.08884.037
CHG_AGND
1013 modify U31
U31
U31
S
S
1
S
S
2
S
S
3
GD
GD
4 5
AO4433-GP
AO4433-GP
84.04433.A37
84.04433.A37
2nd = 84.04407.F37
2nd = 84.04407.F37
R153
R153 470KR2J-2-GP
470KR2J-2-GP
DCBATOUT
C315
C315
C331
C331
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
12
DY
DY
BT+_R
G56
G56
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
D
D
8
D
D
7
D
D
6
C17
C17
12
DY
DY
R160
R160
1 2
D01R2512F-4-GP
D01R2512F-4-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
G55
G55
GAP-CLOSE-PWR
GAP-CLOSE-PWR
BT+DCBATOUT
C319
C319
12
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
C323
C323
12
1 2
C322
C322
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
20081230
C393
C393
12
R163
R163
1 2
0R0402-PAD
0R0402-PAD
1
1230 Add C393,C398
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev A3
A3
A3 Date: Sheet
Date: Sheet
Date: Sheet
BQ24745 Charger
BQ24745 Charger
BQ24745 Charger
LA14
LA14
LA14
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
46 52Thursday, May 07, 2009
46 52Thursday, May 07, 2009
46 52Thursday, May 07, 2009
1
12
C398
C398
C19
C19
BT+
C18
C18
C318
C318
12
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
of
of
of
SB
SB
SB
SCD1U50V3KX-GP
SCD1U50V3KX-GP
Page 47
5
5V_S0 5V_S0
14
10
9 8
U8C
U8C
7
TSAHCT125PW-GP
TSAHCT125PW-GP
D D
73.74125.L13
73.74125.L13
2nd = 73.74125.L12
2nd = 73.74125.L12
14
13
12 11
U8D
U8D
7
TSAHCT125PW-GP
TSAHCT125PW-GP
73.74125.L13
73.74125.L13
2nd = 73.74125.L12
2nd = 73.74125.L12
1016 modify U32
4
DCBATOUT
79.10712.L02
79.10712.L02
2nd = 79.10112.3JL
2nd = 79.10112.3JL
3
2
1
1020 delete TC14,TC15
12
TC24
TC24
SE100U25VM-L1-GP
SE100U25VM-L1-GP
SB
1117 delete TC19
1017 add these parts(EC10,EC12,EC15~EC17,EC86) for EMI demand 1020 add the part(EC86) for EMI demand 1121 add the part(EC89) for EMI demand
SB
DCBATOUT 1D8V_S3
12
EC12
EC12
12
12
EC10
EC10
EC17
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
EC17
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
DY
DY
12
EC15
EC15
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
C C
DY
DY
12
12
EC89
EC89
EC16
EC16
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
Modify 0506 SB->SC Add EC89 and EC90 for EMI demand
1125 add the part(EC90) for EMI demand 1128 add EC94,EC95 for EMI demand
12
EC86
12
EC90
EC90
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
12
12
EC95
EC95
EC94
EC94
DY
DY
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC86
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
1016 add GND1 and GND2 for EMI demand 1017 add GND3 and modify GND2 for EMI demand
LA14 SA->SB
0401 DY GND9 0402 Del GND4,GND7,GND8,GND9
CPU
H38
H35
H35 HOLE256R115-GP
HOLE256R115-GP
1
ZZ.00PAD.D11
B B
ZZ.00PAD.D11
H36
H36 HOLE256R115-GP
HOLE256R115-GP
1
ZZ.00PAD.D11
ZZ.00PAD.D11
1016 modify H35~H38 1016 delete H9~H12
H37
H37 HOLE256R115-GP
HOLE256R115-GP
1
ZZ.00PAD.D11
ZZ.00PAD.D11
H38 HOLE256R115-GP
HOLE256R115-GP
1
ZZ.00PAD.D11
ZZ.00PAD.D11
LA14 SB
0402 modify H35~H36
1016 modify H31 and H32 1120 remove H31and H32
SB
TOP
GND2
GND1
GND1 SPRING-58-GP
SPRING-58-GP
1
34.4B312.002
34.4B312.002
1128 Add GND4,GND7,GND8
SB
GND2 SPRING-51-GP
SPRING-51-GP
1
34.4F822.002
34.4F822.002
1230 Add GND9
1
1
GND3
GND3 SPRING-9-GP
SPRING-9-GP
34.49U23.001
34.49U23.001
GND9
GND9 SPRING-9-GP
SPRING-9-GP
1
34.49U23.001
34.49U23.001
Modify 0506 SB->SC Add GND9 for EMI demand
LA_SA 0218 Change H35~H38 from ZZ.00PAD.571 to ZZ.00PAD.801
H23
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
H6
H6
1
ZZ.00PAD.571
ZZ.00PAD.571
H23
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
H7
H7
1
ZZ.00PAD.571
ZZ.00PAD.571
4
H24
H24
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
H8
H8
1
ZZ.00PAD.571
ZZ.00PAD.571
H26
H26
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE512X512R111-S-GP
HOLE512X512R111-S-GP
H17
H17
1
ZZ.00PAD.571
ZZ.00PAD.571
H27
H27
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
H43
H43
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
H28
H28
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
1128 Add H43
SB
H29
H29
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
3
H30
H30
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
LA14 SA->SB
0401 DY H8 0402 Del H8
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
EMI/Spring/Boss
EMI/Spring/Boss
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
2
Date: Sheet of
EMI/Spring/Boss
LA14
LA14
LA14
47 52Thursday, May 07, 2009
47 52Thursday, May 07, 2009
47 52Thursday, May 07, 2009
1
SB
SB
of
SB
H21
H20
H18
H18
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
A A
ZZ.00PAD.571
ZZ.00PAD.571
H1
H1
1
H19
H19
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
H2
H2
1
ZZ.00PAD.571
ZZ.00PAD.571
H20
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
H3
H3
ZZ.00PAD.571
ZZ.00PAD.571
5
1
1
H21
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
H4
H4
1
ZZ.00PAD.571
ZZ.00PAD.571
1
HOLE355X355R111-S1-GP
HOLE355X355R111-S1-GP
ZZ.00PAD.571
ZZ.00PAD.571
H22
H22
1
ZZ.0HOLE.XXX
ZZ.0HOLE.XXX
H5
H5
1
Page 48
5
4
3
2
1
Speaker
SPKR_R+27,28 SPKR_R-27,28 SPKR_L+27,28 SPKR_L-27,28
D D
Touch pad
5V_S0
TP_DATA35 TP_CLK35 TP_RIGHT35,37 TP_LEFT35,37
1 1 1 1
1 1 1 1 1
TP244AFTE14P-GP TP244AFTE14P-GP TP243AFTE14P-GP TP243AFTE14P-GP TP245AFTE14P-GP TP245AFTE14P-GP TP246AFTE14P-GP TP246AFTE14P-GP
TP109AFTE14P-GP TP109AFTE14P-GP TP105AFTE14P-GP TP105AFTE14P-GP TP110AFTE14P-GP TP110AFTE14P-GP TP114AFTE14P-GP TP114AFTE14P-GP TP113AFTE14P-GP TP113AFTE14P-GP
WIRELESS_BTN#_136
LED
5V_S0
WLAN_LED#_R38
NOVO_BT#36 CAP_LED#_R36
NUM_LED#_R36
HDD_LED#_R38
3D3V_S0
KBC_PWRBTN#_136
1 1 1
1 1 1 1
1
1
TP88AFTE14P-GP TP88AFTE14P-GP TP229AFTE14P-GP TP229AFTE14P-GP TP230AFTE14P-GP TP230AFTE14P-GP
TP231AFTE14P-GP TP231AFTE14P-GP TP91AFTE14P-GP TP91AFTE14P-GP TP90AFTE14P-GP TP90AFTE14P-GP TP234AFTE14P-GP TP234AFTE14P-GP
TP253AFTE14P-GP TP253AFTE14P-GP
TP254AFTE14P-GP TP254AFTE14P-GP
SB
1112 remove the signal( STDBY_LED#_R)
Battery
Keyboard
KCOL1633 KCOL1533 KCOL1433 KCOL1333
C C
KCOL833 KCOL733 KCOL633 KCOL533
KCOL433 KCOL333 KCOL233 KCOL133
KROW033 KROW733 KROW633 KROW533
B B
KROW433 KROW333 KROW233 KROW133
KCOL1233 KCOL1133 KCOL1033 KCOL933
KCOL1733 KCOL033
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1 1 1
1 1
TP127AFTE14P-GP TP127AFTE14P-GP TP139AFTE14P-GP TP139AFTE14P-GP TP148AFTE14P-GP TP148AFTE14P-GP TP146AFTE14P-GP TP146AFTE14P-GP
TP98AFTE14P-GP TP98AFTE14P-GP TP99AFTE14P-GP TP99AFTE14P-GP TP101AFTE14P-GP TP101AFTE14P-GP TP100AFTE14P-GP TP100AFTE14P-GP
TP118AFTE14P-GP TP118AFTE14P-GP TP138AFTE14P-GP TP138AFTE14P-GP TP122AFTE14P-GP TP122AFTE14P-GP TP123AFTE14P-GP TP123AFTE14P-GP
TP152AFTE14P-GP TP152AFTE14P-GP TP154AFTE14P-GP TP154AFTE14P-GP TP153AFTE14P-GP TP153AFTE14P-GP TP151AFTE14P-GP TP151AFTE14P-GP
TP94AFTE14P-GP TP94AFTE14P-GP TP95AFTE14P-GP TP95AFTE14P-GP TP92AFTE14P-GP TP92AFTE14P-GP TP97AFTE14P-GP TP97AFTE14P-GP
TP260AFTE14P-GP TP260AFTE14P-GP TP116AFTE14P-GP TP116AFTE14P-GP TP117AFTE14P-GP TP117AFTE14P-GP TP102AFTE14P-GP TP102AFTE14P-GP
TP72AFTE14P-GP TP72AFTE14P-GP TP87AFTE14P-GP TP87AFTE14P-GP
BATA_SDA_145 BATA_SCL_145 BAT_IN#_145
BT+ BT+
AD_JK
Check test point
3D3V_S0
3D3V_AUX_S5
3D3V_S5 5V_S5
H_PWRGD4,12,39 S5_ENABLE33,39,42 H_CPURST#4,6
Test Point放在Dimm Door打開可測處
1 1 1 1 1
1 1
1 1 1 1
1 1 1
TP16AFTE14P-GP TP16AFTE14P-GP TP17AFTE14P-GP TP17AFTE14P-GP TP15AFTE14P-GP TP15AFTE14P-GP TP14AFTE14P-GP TP14AFTE14P-GP TP13AFTE14P-GP TP13AFTE14P-GP
TP6AFTE14P-GP TP6AFTE14P-GP TP5AFTE14P-GP TP5AFTE14P-GP
TP237AFTE14P-GP TP237AFTE14P-GP TP240AFTE14P-GP TP240AFTE14P-GP TP236AFTE14P-GP TP236AFTE14P-GP TP238AFTE14P-GP TP238AFTE14P-GP
TP241AFTE14P-GP TP241AFTE14P-GP TP242AFTE14P-GP TP242AFTE14P-GP TP239AFTE14P-GP TP239AFTE14P-GP
FAN
EMC2102_FAN_TACH32
A A
USB_7-22 USB_7+22 3D3V_BT_S022
1 1 1
TP134AFTE14P-GP TP134AFTE14P-GP TP136AFTE14P-GP TP136AFTE14P-GP TP133AFTE14P-GP TP133AFTE14P-GP
Bluetooth
EMC2102_FAN_DRIVE32
1 1
1017 modify USB signal connection
5
4
3
TP187AFTE14P-GP TP187AFTE14P-GP TP188AFTE14P-GP TP188AFTE14P-GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
AFTE test point
AFTE test point
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
2
AFTE test point
LA14
LA14
LA14
of
48 52Thursday, May 07, 2009
of
48 52Thursday, May 07, 2009
of
48 52Thursday, May 07, 2009
1
SB
SB
SB
Page 49
5
4
3
2
1
0910 delete F4(Page 18) 0910 update footprint of U15(Page 30) 0910 delete RIGHT1 and LEFT1(Page 33) 0910 modify net names of TP_LEFT and TP_RIGHT(Page 36)
D D
0910 modify test points of AFTE and TPAD 0911 modify net name from LPC_RST to PLT_RST1#(Page 24) 0911 add net name(RBIAS,LED_DUPLEX#,SMDATA,SMCLK)(Page 24) 0911 add net name(DVDD_1_8,ACZ_SDATAIN0_R,FLY_P,FLY_N,VREF_LO,VREF_HI)(Page 26) 0911 add net name(EAPD#_R)(Page 27) 0912 modify the schematic of Page 33 0912 delete GMCH_TXB*(Page 7& 18) 0912 add these parts for EMI demand(page 7,18,20,21,23,26,28,29,30,32,33,34,35) 0915 modify net name from 10M/100M/1G_LED# to 10M/100M_LED#(page24,25) 0915 delete these parts for EMI demand(page 30) 0915 add EC34 for EMI demand(page3) 0915 add EC73 for EMI demand(page 12) 0915 modify LEDs port 0916 move net(SPI_WP#) from U9 pin120 to pin25(page33) 0930 modify BLUE1(page22)
C C
0930 add 2nd for SPK1, MIC1 and modify LOUT1 (page28) 0930 modify FAN1(page32) 0930 modify TPAD1(page35) 0930 modify KB1(page33) 0930 modify net name for BIOS demand(page33) 1001 delete these parts for EMI demand(ED1~8) 1009 modify net name for GND to AGND(page27) 1009 add R4,R5 for AC decopling(page27) 1009 add R96(page30) 1013 modify TPAD1(page35) 1013 modify U40 from 72.25X16.001 to 72.25X16.A01(page 34) 1013 modify TC11 and add TC12(page42) 1013 modify TC10 and add TC26(page44) 1013 modify U2(page45)
B B
1013 modify U3 and U31(page 46) 1013 modify R161 and R162(page41) 1013 modify card1(page 30) 1014 modify these LEDs(LED11,LED12)(page38) 1014 modify these nets(page 26) 1014 modify R258 from 10k to 20k ohm(page26) 1014 add ER5 for EMI deamnd(page3) 1015 modify LCD1 pin define(page 18) 1015 modify the power from 3D3V_S5 to 5V_S5(page38) 1015 modify TPAD1(page35) 1015 modify RN57(page28) 1015 modify F1(page18)
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Change List
Change List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Change List
LA14
LA14
LA14
of
49 52Thursday, May 07, 2009
49 52Thursday, May 07, 2009
49 52Thursday, May 07, 2009
1
SB
SB
SB
Page 50
5
4
3
2
1
1016 modify L1,L2 and L3(page 19) 1016 modify XF1(page 25) 1016 modify RN53 and U10(page 24) 1016 modify U8(page19,47) 1016 modify U4(page 37) 1016 modify U23(page 43)
D D
1016 modify X2(page12) 1016 modify X1(page 33) 1016 modify X3(page 3) 1016 modify D13(page 46) 1016 modify D23(page 20) 1016 modify D9(page 39) 1016 modify D4(page 19) 1016 modify Q3 and Q4(page45) 1016 modify Q18(page 36) 1016 modify Q15~Q17(page 36) 1016 modify Q27~Q30(page38) 1016 modify Q6 and Q14(page 32) 1016 modify Q8(PAGE 24) 1016 add GND1 nad GND2 for EMI demand(page 47)
C C
1016 modify LCD1 pin define(page 18) 1016 delete H9~H12 and modify H35~H38,H31,H32(page 47) 1017 add these parts for EMI demand(page 47) 1017 delete these parts(EC208~EC210)(page 7) 1017 modify BLUE1(page 22) 1017 modify FAN1(page 32) 1017 modify R291 and R293(page 38) 1017 add U61,R52,EC23 and EC24(page 37) 1017 modify RN60(page37) 1017 add TC25(page 44) 1017 add GND3 and modify GND2 for EMI demand(page 47) 1017 modify USB signal connection(page13,18,22,23,30,31,48) 1020 delete C537 for Power demand(page42) 1020 add the part(EC86) for EMI demand(page 47)
B B
1020 delete U61,R52,EC24 and EC23(page 37) 1020 delete TC14,TC15(page 47) 1021 modify TC16(page 31) 1021 delete TC23(page 23) 1021 modify TC5(page 20) 1021 modify and swap these parts(USB1 and USB2)(page 23) 1021 modify SATA1(page 20) 1022 modify DC1(page 45)
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Change List
Change List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Change List
LA14
LA14
LA14
of
50 52Thursday, May 07, 2009
50 52Thursday, May 07, 2009
50 52Thursday, May 07, 2009
1
SB
SB
SB
Page 51
5
SA to SB
1106 modify net connection of RN46 and RN44(page33) for layout demand 1106 modify LED11 and LED12(page38) for fixing issue 1106 modify LED power from 5V_S5 to 5V_AUX_S5(page38) for customer demand 1112 remove the signal(STDBY_LED#_FR)page38 for customer demand
D D
1112 remove these signals( STDBY_LED#_FR and STDBY_LED#_R) and R131(page36) for customer demand 1112 remove the signal( STDBY_LED#_R)page36 for customer demand 1112 remove the signal( STDBY_LED#_R)and TP253(page48) for customer demand 1113 modify C103 and C106(page24) for crystal issue
4
3
1127 modify C377(page32) for thermal function 1128 Add H43,GND4,GND7,GND8(page47) for EMI demand 1128 modify LCD1(page18) for cost down 1128 Add L19(page24) for vender demand 1128 add EC94,EC95 for EMI demand(page47)
1201 modify C3 (page18) 1201 modify EC6~9(page28) 1204 modify RN36 1204 modify second source of RJ1
2
1
1113 modify 2nd of U19(page26) 1113 modify 2nd of U43(page39) 1113 modify 2nd of U44(page10) 1113 modify U48(page22)
1117 delete MDC function(R231,R237,R232,R234)(page12) 1117 delete TC19(page 47) for ME deamnd 1118 modify PCB Ver. from SA to SB(page33) 1118 delete TC12(page42) for layout demand 1118 delete TC27(page9) for layout demand 1118 delete R107 and add L18 for cost down
C C
B B
A A
1119 modify R130 and R133(page 36) for LED brightness 1119 modify EC52 and EL3(page45) for EMI demand 1119 modify SPK1(page 28) for ME deamnd 1119 add G84 for RTC reset demand 1120 modify EC78for EMI demand((page10) 1120 modify PowerCN1 pin3 and remove EC44(page36) fro LED function 1120 remove H31 and H32(page47)for ME demand 1120 add RN61 and RN62(page3) for layout demand 1120 swap these nets(CLK_MCH_3GPLL,CLK_MCH_3GPLL#, CLK_PCIE_MINI1,CLK_PCIE_MINI1#)(page3)for CLK REQ demand 1120 add the net( SATACLKREQ#)(page3,13)for CLK REQ demand 1120 move these nets (CLK_PCIE_MINI1,CLK_PCIE_MINI1#)(page3)for CLK REQ demand 1120 modify RN61 and RN62(page3)for CLK REQ demand 1121 add EC87 for EMI demand(page18) 1121 add the part(EC89) for EMI demand(page47) 1121 add the part(EC88) for EMI demand(page45) 1121 modify R18,C43(page41) for Power demand 1121 modify R275(page42)for Power demand 1121 modify R271,R272,R286 and L16(page44) for Power demand 1124 modify U42 and delete R182,R185 (page32) for thermal function 1124 modify these names of these nets(G7922_SGND2,G7922_SGND3...) (page32) for thermal function 1124 add R302(page3) for clock gen function 1125 add the part(EC90) for EMI demand(page47) 1125 add the part(EC91) for EMI demand(page45) 1125 modify R125,R126(page18) for LCD brightness control 1125 modify RN40 and delete RN42(page32) for layout demand 1125 add EC92 and EC93 for EMI demand(page 22) 1126 add these nets (PCIE_REQ_LAN#,PCIE_REQ_MINI#)(page3)for CLK REQ demand 1126 delete R230,R233,R235,R236 and RN63(page12) for removing MDC function 1126 add C541 and modify R101(page26) for codec function 1126 modify RN61 and RN62(page3) for layout demand 1126 modify EU1,EU2 and add EU3,EU4 for EMI demand(page28) 1127 modify CRT1(page19) for customer demand 1127 swap the nets of RN61 and RN62 for layout demand(page3) 1127 modify BAT1(page45) for ME demand 1127 modify U27(page44) for power demand
5
4
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Change List
Change List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
3
2
Date: Sheet of
Change List
LA14
LA14
LA14
SB
SB
of
51 52Thursday, May 07, 2009
51 52Thursday, May 07, 2009
51 52Thursday, May 07, 2009
1
SB
Page 52
5
SB to 1
1222 modify U42 for customer demand(page32) 1222 modify these names of nets (BMC2102_DN2,DP2,DN3,DP3,PWROK,FAN_TACH,FAN_DRIVE)(page32) 1222 modify RN58 from 68 to 56 ohm for customer demand(page28) 1222 modify PCB Ver. from SB to -1(page33) 1222 modify TC5 for HDD side(page20)
D D
1222 modify card1 from 20.I0043.001 to 20.I0043.011for CE demand(PAGE30) 1223 modify the net(EMC2102_CLK_SEL) for reducing component (page32) 1223 modify the net(RSMRST#) for reducing component(page33) 1224 dummy C6(page27) 1224 add R306 for FSB Dynamic ODT(dummy)(page7) 1224 add R307 and R308 for LAN co-layout demand(page24) 1224 modify FAN1for CE demand(page32) 1224 remove R113 for reducing component (page39) 1224 modify RN54 for reducing component (page12)
4
3
2
1
0 ohm to short pad
1222 modify R277,R278(page44) 1222 modify R135,R5(page27) 1222 modify R58(page25) 1222 modify R136~140,R142~R144,R146,R149(page41) 1222 modify R21,R22(page41) 1222 modify R80,R87(page3) 1222 modify R252(page10) 1222 modify R209(page13) 1222 modify R68,R69,R79(page24) 1222 modify R97(page30) 1222 modify R159(page31) 1222 modify R189(page33) 1222 modify R281(page42) 1222 modify ER1~ER4(page28)
1224 modify R91(page3)1224 modify R191,RN48 and this net AD_OFF for reducing component (page33) 1224 modify D5(dummy)(page20) 1224 delete R165 and add RN64 for reducing component (page32)
1224 modify R67,R71(page24)
1224 modify ERN2(page34) 1226 modify TP_L1 and TP_R1 for ME demand(page37) 1226 modify R100 and C240(dummy)(page30)
C C
1226 delete R96 for reducing component (page30) 1229 modify C76,C77 from 12pF to 15pF for vender demand(page12) 1229 modify L19 for vender demand(page24) 1229 modify U30 for cost down(page18) 1229 modify U44 for cost down(page10) 1229 modify R20 for power team demand(page41) 1230 modify the name of net(RST#_CHIP)(beacuse R97 was removed)(page30) 1230 modify ODD1 for CE demand(page21) 1230 modify C33,C34 for power team demand (page41) 1230 modify D14 for CE demand(page33) 1230 Add C393,C398 for power team demand(page46) 1230 Add GND9 for EMI demand(page47) 1230 dummy C507(page26) 1230 delete Q1 and modify U1 for new AMP IC(page27)
B B
1230 delete RN35 and add R309(page27) 1231 modify R80 for clock gen voltage(3.3V to 1.05V) (page3) 1231 modify ODD1 for ME demand(page21) 0105 modify R3,R128,R129,R130,R132 and R133 for LED brightness conrtol(page36) 0105 modify R291,R292,R293 and R294 for LED brightness conrtol (page38) 0105 modify L1,L2 and L3 for EMI demand(page19) 0112 modify TC10(page44) 0113 modify ODD1 for ME demand(page21) 0113 modify U34,U38,U6,U7,U36 and U37 for power demand(page41) 0113 modify U23 and U29 for power demand(page42) 0113 modify U25,U27,TC10 and L16 for power demand(page44)
1 to 1M
0121 modify PCB Ver. from 1 to 1M(page33) 0121 add R310(page26)
A A
0204 add R457,R458 for power demand(co-layout)(page42)
0204 modify R130,R132 and R133 for LED brightness conrtol(page36)
0204 modify KB1 for CE demand(add mylar)(page33) 0204 modify the symbol of C22 (page41) 0204 modify these symbol of C531and C532 (page44) 0204 modify these symbol of EC52 and EC53 (page45) 0204 modify the symbol of EC74 (page23)
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Change List
Change List
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet of
Date: Sheet of
Change List
LA14
LA14
LA14
of
52 52Thursday, May 07, 2009
52 52Thursday, May 07, 2009
52 52Thursday, May 07, 2009
1
SB
SB
SB
Page 53
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