Page 1
5
D D
4
3
2
1
Berry DG15 Discrete/UMA Schematics Document
Arrandale
C C
Intel PCH
2010-02-03
REV : A00
B B
DY :None Installed
UMA:UMA platform installed
PARK:DIS PARK platform installed
M96:DIS M96 platform installed
VRAM_1G:VRAM 128M*16 installed
Colay :Manual modify BOM
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Cover Page
Cover Page
Cover Page
1
of
192Wednesday, February 10, 2010
of
192Wednesday, February 10, 2010
of
192Wednesday, February 10, 2010
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##OnMainBoard
1.Park-XT;512MB
(64Mx16b*4)
Dell P/N:9TGTN$AA HYNIX
D D
Dell P/N:C995R$AA SAMSUNG
2.Park-XT;1GB (128Mx16b*4)
Dell P/N:PXFYJ$AA HYNIX
Dell P/N:C09DT$AA SAMSUNG
VRAM
1GB/512MB
85,86,87,88
DDR3
800MHz
(1 and 2 co-lay)
Clock Generator
SLG8SP585
7
AMD Graphic
Park-XT
(Discrete only)
80,81,82,83,84
C C
HDMI
LCD
57
54
CRT
Left Side:
USB x 2
B B
Discreet/UMA Co-lay
LVDS(Dual Channel)
RGB CRT
CRT Board
77
Bluetooth
CAMERA
73
54
4
3
Berry Block Diagram
(Discrete/UMA co-lay)
4
HDMI
PCIe x 16
(Discrete only)
FDIx4x2
(UMA only)
Level
57
shifter
USB2.0 x 4
AZALIA
Intel CPU
Arrandale
8,9,10,11,12,13,14
DMIx4
Intel
PCH
14 USB 2.0/1.1 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
SATA ports (6)
PCIE ports (8)
LPC I/F
ACPI 1.1
PCI/PCI BRIDGE
20,21,22,23,24,25,26,27,28
HM57
DDRIII 800/1066 Channel A
DDRIII 800/1066 Channel B
PCIE x 3
SATA x 1
USB 2.0 x 4
USB 2.0 x 1
Project code : 91.4HH01.001
PCB P/N : 48.4HH01.0SA
Revision : 09909-1
I/O Board
CardReader
SATAx1 / USB2.0x1
PCIE x 1,USB x 1
Connector
USB 2.0 x 1
76
Realtek
RTS5159
78
DDRIII
800/1066
DDRIII
800/1066
PCIE x 1
USB x 1
PCIE x 1
2
Slot 0
18
Slot 1
19
10/100 NIC
RTL8103T-VB
ESATA/USB
Combo
Mini-Card
SD/MMC+/MS/
MS Pro/xD
Mini-Card
802.11a/b/g
Realtek
WWAN
Right Side:
USB x 1
RJ45
CONN
SIM
1
CPU DC/DC
ISL62883
INPUTS
+PWR_SRC
OUTPUTS
+VCC_CORE
SYSTEM DC/DC
TPS51218
INPUTS
+PWR_SRC
OUTPUTS
+1.05V_VTT
SYSTEM DC/DC
RT8205B
INPUTS
+PWR_SRC +5V_ALW
OUTPUTS
+5V_ALW2
+3.3V_RTC_LDO
+3.3V_ALW
+15V_ALW
SYSTEM DC/DC
TPS51116
INPUTS
+PWR_SRC
OUTPUTS
+1.5V_SUS
+0.75V_DDR_VTT
+V_DDR_REF
SYSTEM DC/DC
TPS51611
INPUTS
+PWR_SRC
OUTPUTS
+CPU_GFX_CORE
VGA
RT8208B
INPUTS
+PWR_SRC
OUTPUTS
+VGA_CORE
TI CHARGER
BQ24745
INPUTS
+DC_IN
+PBATT
26
SYSTEM DC/DC
OUTPUTS
+PWR_SRC
APL5930
INPUTS
+3.3V_ALW
OUTPUTS
+1.8V_RUN
+1.8V_RUN_VGA
SYSTEM DC/DC
APL5930
INPUTS OUTPUTS
26
+1.5V_SUS +1.0V_RUN_VGA
47
49
46
50
53
89
45
51
90
Switches
INPUTS OUTPUTS
Internal Analog MIC
HP1
MIC IN
A A
Azalia
CODEC
IDT
92HD79B1
SPI
Flash ROM
4MB
30
SPI
LPC Bus
62
KBC
NUVOTON
NPCE781BA0DX
SATA x 2
LPC debug port
SMBus
37
70
HDD
ODD
59
59
<Core Design>
<Core Design>
<Core Design>
2CH SPEAKER
Title
Title
Flash ROM
256kB
62
5
4
Touch
PAD
68
Int.
KB
68 25
Thermal
Main:G7922
Sec.EMC2102
3
Fan
39
58
2
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Block Diagram
Block Diagram
Block Diagram
Berry
Berry
Berry
+1.5V_SUS
+5V_ALW
PCB LAYER
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
+1.5V_RUN
+3.3V_RUN+3.3V_ALW
L1:Top
L2:VCC
L3:Signal
L4:Signal
L5:GND
L6:Bottom
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292Wednesday, February 10, 2010
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292Wednesday, February 10, 2010
+5V_RUN
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Page 3
5
4
3
2
1
D D
RT8208B
Adapter
+PWR_SRC TPS51116
+VGA_CORE
ISL62883
For Discrete
TPS51218
TPS51611
AO4407A
+1.0V_RUN_VGA
+0.75V_DDR_VTT+V_DDR_REF
APL5930KAI
+1.5V_SUS
Charger
+CPU_GFX_CORE
For UMA
+3.3V_RUN_VGA
For Discrete
+3.3V_ALW
APL5930KAI
+1.8V_RUN
For Discrete
PA102FMG
+3.3V_LAN
AO4468
+1.5V_RUN
+1.5V_RUN_CPU
Battery
BQ24745
+PBATT
+VCC_CORE
+1.05V_VTT
RT8205B
C C
+15V_ALW
+3.3V_RTC_LDO
SI2301CDS
+KBC_PWR
+5V_ALW2
+5V_ALW
UP7534BRA8
+5V_USB1
I/O Board USB Power CRT Board USB Power
AO4468
+5V_RUN
UP7534BRA8
+5V_USB2
AO4468
+3.3V_RUN
RT9198-33PBG
B B
APL5930KAI
SI3456BD
+3.3V_CRT_LDO
+1.8V_RUN_VGA
+LCDVDD
For Discrete
RTS5159
+3.3V_RUN_CARD
RTL8103T-VB
+1.2V_LOM
Power Shape
A A
5
4
Regulator LDO Switch
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Power Block Diagram
Power Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
Power Block Diagram
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
392Wednesday, February 10, 2010
of
392Wednesday, February 10, 2010
of
392Wednesday, February 10, 2010
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PCH SMBus Block Diagram
+3.3V_ALW
Θ
SRN2K2J-1-GP
SMBCLK
PCH_SMB_CLK
PCH_SMB_DATA
+3.3V_ALW
Θ
SRN2K2J-8-GP
Θ
Θ
1 1
SMBDATA
+3.3V_RUN
Θ
2N7002SPT
B
+3.3V_RUN
Θ
SRN2K2J-1-GP
PCH_SMBCLK
Θ
PCH_SMBDATA
Θ
DIMM 1
SCL
SDA
SMBus Address:A0
C
D
KBC SMBus Block Diagram
+5V_RUN
Θ
SRN10KJ-5-GP
PSDAT1
PSCLK1
TPDATA
TPCLK
+KBC_PWR
Θ
Θ
TPDATA
TPCLK
TouchPad Conn.
TPDATA
TPCLK
E
Θ
SML1CLK
SML1DATA
SML0CLK
SML0DATA
PCH
2 2
SDVO_CTRLCLK
SDVO_CTRLDATA
L_DDC_CLK
L_DDC_DATA
CRT_DDC_CLK
CRT_DDC_DATA
KBC_SCL1
KBC_SDA1
SML0_CLK
SML0_DATA
+3.3V_RUN
Θ
SRN2K2J-1-GP
UMA
PCH_HDMI_CLK
PCH_HDMI_DATA
SRN2K2J-1-GP
UMA
LDDC_CLK_PCH
LDDC_DATA_PCH
PCH_CRT_DDCCLK
PCH_CRT_DDCDATA
To KBC
Level
Shift
+3.3V_RUN
Θ
UMA
SRN0J-6-GP
2N7002DW-1-GP
PCH_HDMI_CLK
PCH_HDMI_DATA
UMA
+3.3V_RUN_VGA
Θ
SRN2K2J-1-GP
+3.3V_ALW
Θ
SRN2K2J-1-GP
XDP
Θ
Θ
Θ
Θ
Θ
PCH_SMBCLK
Θ
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA
PCH_SMBCLK
PCH_SMBDATA
DIMM 2
SCL
SDA
SMBus Address:A4
Clock
Generator
SCLK
SDATA
SMBus address:D2
Minicard
WLAN
SMB_CLK
SMB_DATA
Minicard
W-WAN
SMB_CLK
SMB_DATA
KBC
NPCE781BA0DX
GPIO73/SCL2
GPIO74/SDA2
SCL1
SDA1
BAT_SCL
BAT_SDA
KBC_SCL1
KBC_SDA1
SRN4K7J-8-GP
SRN100J-3-GP
PBAT_SMBCLK1
PBAT_SMBDAT1
2N7002DW-1-GP
Battery Conn.
CLK_SMB
SMBus address:16
DAT_SMB
BQ24745
SCL
SDA
SMBus address:12
+3.3V_RUN
Θ
+3.3V_RUN
Θ
Θ
Θ
SRN4K7J-8-GP
THERM_SCL
THERM_SDA
Thermal
SCL
SMBus address:7A
SDA
DIS
3 3
4 4
DDC1CLK
DDC1DATA
DDC2CLK
DDC2DATA
VGA
IFPC_AUX_I2CW_SCL
IFPC_AUX_I2C_SDA#
A
VGA_CRT_DDCCLK
VGA_CRT_DDCDATA
+3.3V_RUN_VGA
SRN2K2J-1-GP
DIS
GPU_HDMI_CLK
GPU_HDMI_DATA
Θ
TSCBTD3305CPWR
+5V_RUN
+5V_RUN
Θ
SRN2K2J-1-GP
B
LCD CONN
+3.3V_RUN
UMA
SRN0J-6-GP
UMA
HDMI CONN
Θ
SRN2K2J-1-GP
SRN0J-6-GP
DIS
2N7002DW-1-GP
UMA
+3.3V_RUN
Θ
+5V_RUN
Θ
SRN2K2J-1-GP
CRT_DDCCLK_CON
CRT_DDCDATA_CON
C
CRT CONN
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Berry
Berry
Berry
Date: Sheet
Date: Sheet
D
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
SMBUS Block Diagram
SMBUS Block Diagram
SMBUS Block Diagram
492Wednesday, Feb ruary 10, 2010
492Wednesday, Feb ruary 10, 2010
E
492Wednesday, Feb ruary 10, 2010
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Page 5
A
B
C
D
E
Thermal Block Diagram
1 1
Audio Block Diagram
SPKR_PORT_D_L-
SPKR_PORT_D_R+
SPEAKER
Codec
DP1
EMC2102_DP1
SC470P50V3JN-2GP
2 2
DN1
EMC2102_DN1
SC470P50V3JN-2GP
MMBT3904-3-GP
Place near CPU
Thermal
PWM CORE
92HD79B1
HP1_PORT_B_L
HP1_PORT_B_R
HP
OUT
G7922R61U
DP2
VGA_THERMDA
DN2
VGA_THERMDC
Place near GPU(DISCRETE only).
3 3
THRMDA
VGA
THRMDC
MMBT3904-3-GP
System Sensor(UMA only)
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT_A_OR_F
DMIC_CLK/GPIO1
DMIC0/GPIO2
MIC
IN
DP3
EMC2102_DP3
SC470P50V3JN-2GP
DN3
EMC2102_DN3
Put under CPU(T8 HW shutdown)
4 4
A
B
MMBT3904-3-GP
PORTC_L
PORTC_R
VREFOUT_C
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
C
D
Date: Sheet of
Analog
MIC
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Thermal/Audio Block Diagram
Thermal/Audio Block Diagram
Thermal/Audio Block Diagram
Berry
Berry
Berry
592Wednesday, February 10, 2010
592Wednesday, February 10, 2010
592Wednesday, February 10, 2010
E
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B
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D
E
Calpella Schematic Checklist Rev.0_7
Name Schematics Notes
SPKR
4 4
INIT3_3V# Weak internal pull-down. Do not pull high.
GNT3#/
GPIO55
INTVRMEN
GNT0#,
GNT1#/GPIO51
GNT2#/
GPIO53
GPIO33
3 3
SPI_MOSI
NV_ALE
NC_CLE Weak internal pull-up. Do not pull low.
HAD_DOCK_EN#
/GPIO[33]
HDA_SDO Weak internal pull-down. Do not pull high.
HDA_SYNC
GPIO15
GPIO8
GPIO27
2 2
Reboot option at power-up
Internal weak Pull-down.
Default Mode:
Connect to Vcc3_3 with 8.2-kȍ
No Reboot Mode with TCO Disabled:
- 10-kȍ weak pull-up resistor.
Internal pull-up.
Default Mode:
(Connect to ground with 4.7-kȍ weak
Low (0) = Top Block Swap Mode
pull-down resistor).
High (1) = Integrated VRM is enabled
Low (0) = Integrated VRM is disabled
Left both GNT0# and GNT1# floating. No pull up
Default (SPI):
required.
Connect GNT1# to ground with 1-kȍ pull-down
Boot from PCI:
resistor. Leave GNT0# Floating.
Connect both GNT0# and GNT1# to ground with 1-kȍ
Boot from LPC:
pull-down resistor.
Default - Internal pull-up.
= Configures DMI for ESI compatible operation (for servers
Low (0)
only. Not for mobile/desktops).
Do not pull low.
Default:
Connect to ground with 1-kȍ
Disable ME in Manufacturing Mode:
pull-down resistor.
Connect to Vcc3_3 with 8.2-kȍ weak pull-up resistor.
Enable iTPM:
Left floating, no pull-down required.
Disable iTPM:
Connect to Vcc3_3 with 8.2-kȍ weak pull-up
Enable Danbury:
resistor.
Connect to ground with 4.7-kȍ weak pull-down
Disable Danbury:
resistor.
Flash Descriptor Security will be overridden.
Low (0):
Flash Descriptor Security will be in effect.
High (1) :
Weak internal pull-down. Do not pull high.
Weak internal pull-down. Do not pull high.
Weak internal pull-up. Do not pull low.
Default = Do not connect (floating)
High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.
Pin Name
CFG[4] Disabled - No Physical Display Port attached to
CFG[3]
CFG[0]
CFG[7]
Strap Description Configuration (Default value for each bit is
DisplayPort
Presence
PCI-Express Static
Lane Reversal
PCI-Express
Configuration
Select
Reserved Temporarily used
for early
Clarksfield
samples.
1 unless specified otherwise)
1:Embedded
Embedded DisplayPort.
Enabled - An external Display Port device is
0:
connected to the Embedded Display Port.
Normal Operation.
1:
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
0:
Single PCI-Express Graphics
1:
Bifurcation enabled
0:
-
Clarksfield (only for early samples pre-ES1)
Connect to GND with 3.01K Ohm/5% resistor
Only temporary for early CFD samples
Note:
(rPGA/BGA) [For details please refer to the WW33
MoW and sighting report].
For a common motherboard design (for AUB and CFD),
the pull-down resistor should be used. Does not
impact AUB functionality.
Calpella Schematic Checklist Rev.0_7
Default
Value
1
1
1
0
Processor StrappingPCH Strapping
USB TablePCIE Routing
USB
LANE1 RESERVED
LANE2
MiniCard WLAN
LANE3 LAN
LANE4 W-WAN
LANE5
LANE6
1 1
LANE7
LANE8
RESERVED
RESERVED
H55/HM55 no support
H55/HM55 no support
Pair
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Device
USB2 (CRT Board)
USB3 (CRT Board)
WLAN (I/O Board)
RESERVED
CARD READER
BLUETOOTH
HM55 no support
HM55 no support
USB1 (I/O Board)
USB0 (I/O Board ESATA)
RESERVED
W-WAN (I/O Board)
RESERVED
CAMERA
SATA Table
SATA
Pair
0
1
2
3
4
5
Device
HDD
ODD
HM55 no support
HM55 no support
ESATA
RESERVED
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Table of Content
Table of Content
Table of Content
692Wednesday, February 10, 2010
692Wednesday, February 10, 2010
692Wednesday, February 10, 2010
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SSID = CLOCK
4
3
2
1
1 2
12
C702
C702
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
CLKIN_DMI#23
CLKIN_DMI23
X02-20091222
R701
R701
0R0603-PAD
0R0603-PAD
12
12
C701
C701
C703
DY
DY
+3.3V_RUN
C703
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
R703
R703
1 2
2K2R2J-2-GP
2K2R2J-2-GP
X02-20091222
RN702
RN702
2 3
1
4
0R4P2R-PAD
0R4P2R-PAD
RN
RN
CLK_CPU_BCLK#23
CLK_CPU_BCLK23
FSC 0 1
SPEED
133MHz
(Default)
12
C704
C704
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
CPU_STOP#
CLK_DREF#23
CLK_DREF23
CLKIN_DMI#_C
CLKIN_DMI_C
RN703
RN703
2 3
1
4
0R4P2R-PAD
0R4P2R-PAD
RN
RN
100MHz
12
C705
C705
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
CLK_PCIE_SATA#_C
CLK_PCIE_SATA_C
+3.3V_RUN_SL585
12
C706
C706
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
U701
U701
4
DOT_96#
3
DOT_96
14
SRC_2#
13
SRC_2
11
SRC_1/SATA#
10
SRC_1/SATA
22
CPU_0#
23
CPU_0
19
CPU_1#
20
CPU_1
SLG8SP585VTR-GP
SLG8SP585VTR-GP
SC12P50V2JN-3GP
SC12P50V2JN-3GP
12
C707
C707
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
+3.3V_RUN_SL585 +1.05V_RUN_SL585_IO
1
VDD_REF
VDD_DOT
VSS_SRC
VSS_CPU
12
X701
X701
1 2
5
VDD_27
VSS_DOT
2
15
18
VDD_SRC_IO
VDD_CPU_IO
CKPWRGD/PD#
REF_0/CPU_SEL
VSS_278VSS_SATA
9
12
27MHZ
27MHZ_SS
CPU_STOP#
XTAL_IN
XTAL_OUT
SDA
SCL
C713
C713
SC12P50V2JN-3GP
SC12P50V2JN-3GP
17
24
29
VDD_SRC
VDD_CPU
VSS_REF
GND
21
26
33
CLK_XTAL_IN CLK_XTAL_OUT
X-14D31818M-37GP
X-14D31818M-37GP
12
82.30005.901
82.30005.901
C712
C712
+1.05V_VTT
C708
C708
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
12
X02-20091222
R702
R702
1 2
0R0603-PAD
0R0603-PAD
12
C709
C709
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
x01 change tolerant 20091117
X01-20091116
DIS
CLK_VGA_27M_NSS_R
6
CLK_VGA_27M_SS_R
7
16
25
30
28
27
31
32
CPU_STOP#
CK_PWRGD
FSC
CLK_XTAL_IN
CLK_XTAL_OUT
+1.05V_VTT
R706
R706
4K7R2J-2-GP
4K7R2J-2-GP
DY
DY
1 2
R707
R707
10KR2J-3-GP
10KR2J-3-GP
1 2
DIS
1 2
1 2
DY
DY
R704
R704
12
33R2J-2-GP
33R2J-2-GP
12
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
PCH_SMBDATA 18,19,23,76
PCH_SMBCLK 18,19,23,76
FSC
33R2J-2-GPR708
33R2J-2-GPR708
33R2J-2-GPR709
33R2J-2-GPR709
EC703
EC703
+1.05V_RUN_SL585_IO
12
C710
C710
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
CLK_PCH_14M 23
12
C711
C711
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
12
DY
DY
CK_PWRGD
VR_CLKEN#47
CLK_VGA_27M_SS 82
EC701
EC701
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN_SL585
R705
R705
10KR2J-3-GP
10KR2J-3-GP
.
.
G
.
.
.
.
.
.
.
.
1 2
D
12
DY
DY
Q701
Q701
2N7002E-1-GP
2N7002E-1-GP
S
CLK_VGA_27M_NSS 82
EC702
EC702
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN
D D
DY
DY
x01 change tolerant 20091117
C C
CLK_PCIE_SATA#23
CLK_PCIE_SATA23
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Clock Generator SLG8SP585
Clock Generator SLG8SP585
Clock Generator SLG8SP585
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
792Monday, March 29, 2010
of
792Monday, March 29, 2010
of
792Monday, March 29, 2010
1
A00
A00
A00
Page 8
5
4
3
2
1
SSID = CPU
D D
1 OF 9
CPU1A
CPU1A
678
RN801
RN801
SRN1KJ-4-GP
SRN1KJ-4-GP
4 5
A24
DMI_RX#0
C23
DMI_RX#1
B22
DMI_RX#2
A21
DMI_RX#3
B24
DMI_RX0
D23
DMI_RX1
B23
DMI_RX2
A22
DMI_RX3
D24
DMI_TX#0
G24
DMI_TX#1
F23
DMI_TX#2
H23
DMI_TX#3
D25
DMI_TX0
F24
DMI_TX1
E23
DMI_TX2
G23
DMI_TX3
E22
FDI_TX#0
D21
FDI_TX#1
D19
FDI_TX#2
D18
FDI_TX#3
G21
FDI_TX#4
E19
FDI_TX#5
F21
FDI_TX#6
G18
FDI_TX#7
D22
FDI_TX0
C21
FDI_TX1
D20
FDI_TX2
C18
FDI_TX3
G22
FDI_TX4
E20
FDI_TX5
F20
FDI_TX6
G19
FDI_TX7
F17
FDI_FSYNC0
E17
FDI_FSYNC1
C17
FDI_INT
F18
FDI_LSYNC0
D17
FDI_LSYNC1
CLARKUNF
CLARKUNF
62.10055.341
62.10055.341
CLARKSFIELD
CLARKSFIELD
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
DMI_PTX_CRXN022
DMI_PTX_CRXN122
DMI_PTX_CRXN222
DMI_PTX_CRXN322
DMI_PTX_CRXP022
DMI_PTX_CRXP122
DMI_PTX_CRXP222
DMI_PTX_CRXP322
DMI_CTX_PRXN022
DMI_CTX_PRXN122
DMI_CTX_PRXN222
DMI_CTX_PRXN322
DMI_CTX_PRXP022
DMI_CTX_PRXP122
DMI_CTX_PRXP222
DMI_CTX_PRXP322
C C
B B
FDI_TXN022
FDI_TXN122
FDI_TXN222
FDI_TXN322
FDI_TXN422
FDI_TXN522
FDI_TXN622
FDI_TXN722
FDI_TXP022
FDI_TXP122
FDI_TXP222
FDI_TXP322
FDI_TXP422
FDI_TXP522
FDI_TXP622
FDI_TXP722
FDI_FSYNC022
FDI_FSYNC122
FDI_INT22
FDI_LSYNC022
FDI_LSYNC122
12
R804
R804
1KR2J-1-GP
1KR2J-1-GP
DIS
DIS
DIS
DIS
123
SEC. 62.10053.561
A A
1 OF 9
PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8
PEG_RX#9
PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8
PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15
PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9
PEG_TX0
PEG_TX1
PEG_TX2
PEG_TX3
PEG_TX4
PEG_TX5
PEG_TX6
PEG_TX7
PEG_TX8
PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
DMI
DMI
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15
Intel(R) FDI
Intel(R) FDI
PEG_TX#10
PEG_TX#11
PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15
PEG_IRCOMP_R
EXP_RBIAS
PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0
PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0
PEG_C_TXN15
PEG_C_TXN14
PEG_C_TXN13
PEG_C_TXN12
PEG_C_TXN11
PEG_C_TXN10
PEG_C_TXN9
PEG_C_TXN8
PEG_C_TXN7
PEG_C_TXN6
PEG_C_TXN5
PEG_C_TXN4
PEG_C_TXN3
PEG_C_TXN2
PEG_C_TXN1
PEG_C_TXN0
PEG_C_TXP15
PEG_C_TXP14
PEG_C_TXP13
PEG_C_TXP12
PEG_C_TXP11
PEG_C_TXP10
PEG_C_TXP9
PEG_C_TXP8
PEG_C_TXP7
PEG_C_TXP6
PEG_C_TXP5
PEG_C_TXP4
PEG_C_TXP3
PEG_C_TXP2
PEG_C_TXP1
PEG_C_TXP0
R801 49D9R2F-GPR801 49D9R2F-GP
1 2
R802 750R2F-GPR802 750R2F-GP
1 2
PEG_RXN[0..15]
PEG_RXP[0..15]
C816 SCD1U10V2KX-5GP
C816 SCD1U10V2KX-5GP
1 2
DIS
DIS
C815 SCD1U10V2KX-5GP
C815 SCD1U10V2KX-5GP
1 2
DIS
DIS
C814 SCD1U10V2KX-5GP
C814 SCD1U10V2KX-5GP
1 2
DIS
DIS
C813 SCD1U10V2KX-5GP
C813 SCD1U10V2KX-5GP
1 2
DIS
DIS
C812 SCD1U10V2KX-5GP
C812 SCD1U10V2KX-5GP
1 2
DIS
DIS
C811 SCD1U10V2KX-5GP
C811 SCD1U10V2KX-5GP
1 2
DIS
DIS
C810 SCD1U10V2KX-5GP
C810 SCD1U10V2KX-5GP
1 2
DIS
DIS
C809 SCD1U10V2KX-5GP
C809 SCD1U10V2KX-5GP
1 2
DIS
DIS
C808 SCD1U10V2KX-5GP
C808 SCD1U10V2KX-5GP
1 2
DIS
DIS
C807 SCD1U10V2KX-5GP
C807 SCD1U10V2KX-5GP
1 2
DIS
DIS
C806 SCD1U10V2KX-5GP
C806 SCD1U10V2KX-5GP
1 2
DIS
DIS
C805 SCD1U10V2KX-5GP
C805 SCD1U10V2KX-5GP
1 2
DIS
DIS
C804 SCD1U10V2KX-5GP
C804 SCD1U10V2KX-5GP
1 2
DIS
DIS
C803 SCD1U10V2KX-5GP
C803 SCD1U10V2KX-5GP
1 2
DIS
DIS
C802 SCD1U10V2KX-5GP
C802 SCD1U10V2KX-5GP
1 2
DIS
DIS
C801 SCD1U10V2KX-5GP
C801 SCD1U10V2KX-5GP
1 2
DIS
DIS
C832 SCD1U10V2KX-5GP
C832 SCD1U10V2KX-5GP
1 2
DIS
DIS
C831 SCD1U10V2KX-5GP
C831 SCD1U10V2KX-5GP
1 2
DIS
DIS
C830 SCD1U10V2KX-5GP
C830 SCD1U10V2KX-5GP
1 2
DIS
DIS
C829 SCD1U10V2KX-5GP
C829 SCD1U10V2KX-5GP
1 2
DIS
DIS
C828 SCD1U10V2KX-5GP
C828 SCD1U10V2KX-5GP
1 2
DIS
DIS
C827 SCD1U10V2KX-5GP
C827 SCD1U10V2KX-5GP
1 2
DIS
DIS
C826 SCD1U10V2KX-5GP
C826 SCD1U10V2KX-5GP
1 2
DIS
DIS
C825 SCD1U10V2KX-5GP
C825 SCD1U10V2KX-5GP
1 2
DIS
DIS
C824 SCD1U10V2KX-5GP
C824 SCD1U10V2KX-5GP
1 2
DIS
DIS
C823 SCD1U10V2KX-5GP
C823 SCD1U10V2KX-5GP
1 2
DIS
DIS
C822 SCD1U10V2KX-5GP
C822 SCD1U10V2KX-5GP
1 2
DIS
DIS
C821 SCD1U10V2KX-5GP
C821 SCD1U10V2KX-5GP
1 2
DIS
DIS
C820 SCD1U10V2KX-5GP
C820 SCD1U10V2KX-5GP
1 2
DIS
DIS
C819 SCD1U10V2KX-5GP
C819 SCD1U10V2KX-5GP
1 2
DIS
DIS
C818 SCD1U10V2KX-5GP
C818 SCD1U10V2KX-5GP
1 2
DIS
DIS
C817 SCD1U10V2KX-5GP
C817 SCD1U10V2KX-5GP
1 2
DIS
DIS
x01 change tolerant 20091117
PEG_RXN[0..15] 80
PEG_RXP[0..15] 80
PEG_TXN[0..15]
PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0
PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PEG_TXP[0..15]
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
CPU (PCIE/DMI/FDI)
Berry
Berry
Berry
PEG_TXN[0..15] 80
PEG_TXP[0..15] 80
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
892Monday, March 29, 2010
of
892Monday, March 29, 2010
of
892Monday, March 29, 2010
A00
A00
A00
Page 9
5
+1.05V_VTT
D D
X01 20091121
VTTPWRGOOD signal must be clean
and close to CPU
For EMI
C C
B B
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117
Processor Pullups
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R924
R924
1K1R2F-GP
1K1R2F-GP
R926
R926
DY
DY
H_PWRGD
H_PWRGD_XDP
PM_DRAM_PWRGD22
1 2
12
EC905
EC905
H_THERMTRIP#25,37,42,82
H_VTTPWRGD49
H_CATERR#
H_PROCHOT#
H_CPURST#
H_PECI25
H_PM_SYNC22
H_PWRGD25,42
EC904
EC904
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.5V_RUN_CPU+1.5V_SUS
12
DY
DY
X01 20091112
SML0_DATA23
R901 49D9R 2F-GPR901 49D9R 2F-GP
1 2
R907 68R2-G PR907 68R2-GP
1 2
R906 68R2-G P
R906 68R2-G P
1 2
DY
DY
XDP_RST#_R
VCCPWRGOOD
VDDPWRGOOD_R
H_VTTPWRGD
PLT_RST#_R
XDP_DBRESET#
EC906
EC906
DY
DY
1 2
x01 change tolerant 20091117
12
DY
DY
VDDPWRGOOD_R
3KR2F-GP
3KR2F-GP
+1.05V_VTT
PM_PWRBTN #_R22
12
C902
C902
DY
DY
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R925
R925
1K1R2F-GP
1K1R2F-GP
R935 1KR2J-1-G P
R935 1KR2J-1-G P
R937 0R2J-2-G P
R937 0R2J-2-G P
R938 0R2J-2-G P
R938 0R2J-2-G P
SML0_CLK23
Processor Compensation Signals
R902 20R2F- GPR902 20R2F- GP
R903 20R2F- GPR903 20R2F- GP
R904 49D9R 2F-GPR904 49D9R 2F-GP
R905 49D9R 2F-GPR905 49D9R 2F-GP
H_PROCHOT#47
X02-20091222
R910
R910
1 2
0R0402-PAD
0R0402-PAD
R912
R912
1 2
0R0402-PAD
0R0402-PAD
PLT_RST#21,37,70,76,78,80
EC902
EC902
EC901
EC903
EC903
1 2
1 2
1 2
1 2
EC901
DY
DY
DY
DY
1 2
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
DY
DY
DY
DY
1 2
1 2
1 2
1 2
TP901TPAD14-GP TP901TPAD14-GP
1
H_PWRGD_XDP
1 2
R917
R917
1K54R2F-GP
1K54R2F-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
XDP_PREQ#
XDP_PRDY#
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
H_CPUPWRGD_XDP
PM_PWRBTN #_XDP
PCIE_CLK_XDP_P
XDP_TCLK
SKTOCC#_R
H_CATERR#
H_CPURST#
VCCPWRGOOD
VDDPWRGOOD_R
H_COMP3
H_COMP2
H_COMP1
H_COMP0
PLT_RST#_R
12
R918
R918
750R2F-GP
750R2F-GP
XDP1
XDP1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
DY
DY
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
PAD-60P-GP
PAD-60P-GP
CPU1B
CPU1B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
CLARKUNF
CLARKUNF
A00-20100226
0D75V_EN50
NP1
61
62
63
64
NP2
4
SSID = CPU
MISC THERMAL
MISC THERMAL
CLOCKS
CLOCKS
CLARKSFIELD
CLARKSFIELD
DDR3
DDR3
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
U901
U901
1
A
VCC
2
B
GND3Y
NL17SZ08DFT2G-GP
NL17SZ08DFT2G-GP
VDDPWRGOOD_R
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
PM_EXT_TS#0
PM_EXT_TS#1
MISC
MISC
+3.3V_RUN
5
VTT_PWRGD_C
4
2 OF 9
2 OF 9
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
SM_RCOMP0
SM_RCOMP1
SM_RCOMP2
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7
12
12
+1.05V_VTT
TCK
TMS
TDO
x01 change tolerant 20091117
12
C901
C901
SCD1U10V2KX-5GP
BCLK_ITP_P
BCLK_ITP_N
R939 1KR2J-1-GP
R939 1KR2J-1-GP
XDP_TRST#
XDP_TDI
XDP_TMS
XDP_RST#_R
SCD1U10V2KX-5GP
1 2
DY
DY
DY
DY
H_CPURST#XDP_RST#_R
1 2
DY
DY
R940 0R2J-2-GP
R940 0R2J-2-GP
12
TDI
R927
R927
1K54R2F-GP
1K54R2F-GP
R941
R941
1 2
1K54R2F-GP
1K54R2F-GP
R930
R930
750R2F-GP
750R2F-GP
R936
R936
51R2J-2-GP
51R2J-2-GP
XDP_TDO
BCLK_CPU_C_P
A16
BCLK_CPU_C_N
B16
BCLK_ITP_P
AR30
BCLK_ITP_N
AT30
CLK_EXP_C_P
E16
CLK_EXP_C_N
D16
A18
A17
F6
AL1
AM1
AN1
AN15
AP15
AT28
AP27
AN28
AP28
AT27
AT29
AR27
AR29
AP29
AN25
AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23
DY
DY
PLT_RST# 21,37,70,76,78,80
X02-20091222
RN901
RN901
1
2 3
0R4P2R-PAD
0R4P2R-PAD
RN902
RN902
1
2 3
0R4P2R-PAD
0R4P2R-PAD
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
PM_EXTTS#0_C
PM_EXTTS#1_C
XDP_PRDY#
XDP_PREQ#
XDP_TCLK
XDP_TMS
XDP_TRST#
XDP_TDI_R
XDP_TDO_R
XDP_TDI_M
XDP_TDO_M
H_DBR#_R
XDP_OBS0
XDP_OBS1
XDP_OBS2
XDP_OBS3
XDP_OBS4
XDP_OBS5
XDP_OBS6
XDP_OBS7
VDDPWRGOOD_KBC 37
XDP_DBRESET# 22,23
RN
RN
4
RN
RN
4
X03-20100118
X02-20091222
R911
R911
1 2
0R0402-PAD
0R0402-PAD
3
BCLK_CPU_P 25
BCLK_CPU_N 25
CLK_EXP_P 23
CLK_EXP_N 23
SM_DRAMRST#
PM_EXTTS#0_C 53
RN903
RN903
4
RN
RN
SRN10KJ-5-GP
SRN10KJ-5-GP
1
4
2 3
RN904
RN904
0R4P2R-PAD
0R4P2R-PAD
XDP_DBRESET#
SM_DRAMRST#
X02-20091224
+1.05V_VTT
1
23
+1.5V_RUN_CPU
DY
DY
XDP_TDI_R
XDP_TDO_M
XDP_TDI_M
XDP_TDO_R
Scan Chain
(Default)
CPU Only
GMCH Only
S3_RST_GATE# 25
X01 20091117
Q901
Q901
G
.
.
...
.....
D
S
2N7002E-1-GP
2N7002E-1-GP
DY
DY
1 2
R909 0R2J-2-GP
R909 0R2J-2-GP
x01 change tolerant 20091117
PM_EXTTS#0 18
PM_EXTTS#1 19
12
R915
R915
1KR2J-1-GP
1KR2J-1-GP
DDR3 Compensation Signals
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
XDP_TMS
XDP_TDI_R
XDP_PREQ#
XDP_TCLK
X01 20091111
12
R921
R921
100KR2J-1-GP
100KR2J-1-GP
1 2
DY
DY
R928 0R2J-2-GP
R928 0R2J-2-GP
1 2
DY
DY
R929 0R2J-2-GP
R929 0R2J-2-GP
12
R931
R931
0R0402-PAD
0R0402-PAD
1 2
DY
DY
R933 0R2J-2-GP
R933 0R2J-2-GP
R934
R934
1 2
0R0402-PAD
0R0402-PAD
X02-20091222
Stuff --> R928, R931, R934
No Stuff --> R929, R933
Stuff --> R928, R929
No Stuff --> R931, R934, R933
Stuff --> R933, R934
No Stuff --> R928, R929, R931
+1.5V_SUS
12
R908
R908
1KR2J-1-GP
1KR2J-1-GP
DDR3_DRAMR ST# 18,19
12
C903
C903
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R913 100R2F-L1-G P-UR913 100R2F-L1-G P-U
1 2
R914 24D9R2F- L-GPR914 24D9R2F- L-GP
1 2
R916 130R2F-1-G PR916 130R2F-1-GP
1 2
1 2
DY
DY
R919 51R2J-2-G P
R919 51R2J-2-G P
1 2
DY
DY
R920 51R2J-2-G P
R920 51R2J-2-G P
1 2
DY
DY
R922 51R2J-2-G P
R922 51R2J-2-G P
1 2
DY
DY
R923 51R2J-2-G P
R923 51R2J-2-G P
XDP_TDI
XDP_TDO
JTAG MAPPING
XDP_TRST#
+1.05V_VTT
12
51R2J-2-GP
51R2J-2-GP
2
R932
R932
1
A00-20100208
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Berry
Berry
Berry
Taipei Hsien 221, Taiw an, R.O.C.
1
A00
A00
A00
of
992Monday, March 29, 2010
of
992Monday, March 29, 2010
of
992Monday, March 29, 2010
Title
Title
Title
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
CPU (THERMAL/CLOCK/PM )
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Page 10
5
SSID = CPU
CPU1C
CPU1C
4
3 OF 9
3 OF 9
3
CPU1D
CPU1D
2
4 OF 9
4 OF 9
1
W8
AA6
SA_CK0
AA7
M_A_DQ[63..0]18
D D
C C
B B
M_A_DQ[63..0]
M_A_BS018
M_A_BS118
M_A_BS218
M_A_CAS#18
M_A_RAS#18
M_A_WE#18
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C10
D10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AK11
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
A10
B10
E10
F10
J10
AJ7
AJ6
AJ9
AL7
AL8
SA_DQ0
SA_DQ1
C7
SA_DQ2
A7
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
A8
SA_DQ7
D8
SA_DQ8
SA_DQ9
E6
SA_DQ10
F7
SA_DQ11
E9
SA_DQ12
B7
SA_DQ13
E7
SA_DQ14
C6
SA_DQ15
SA_DQ16
G8
SA_DQ17
K7
SA_DQ18
J8
SA_DQ19
G7
SA_DQ20
SA_DQ21
J7
SA_DQ22
SA_DQ23
L7
SA_DQ24
M6
SA_DQ25
M8
SA_DQ26
L9
SA_DQ27
L6
SA_DQ28
K8
SA_DQ29
N8
SA_DQ30
P9
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
SA_DQ40
SA_DQ41
SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55
SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
SA_BS0
SA_BS1
U7
SA_BS2
SA_CAS#
SA_RAS#
SA_WE#
SA_CK#0
P7
SA_CKE0
Y6
SA_CK1
Y5
SA_CK#1
P6
SA_CKE1
AE2
SA_CS#0
AE8
SA_CS#1
CLARKSFIELD
CLARKSFIELD
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_ODT0
SA_ODT1
SA_DM0
SA_DM1
SA_DM2
SA_DM3
SA_DM4
SA_DM5
SA_DM6
SA_DM7
SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7
SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7
SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8
SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_CLK_DDR0 18
M_CLK_DDR#0 18
M_CKE0 18
M_CLK_DDR1 18
M_CLK_DDR#1 18
M_CKE1 18
M_CS#0 18
M_CS#1 18
M_ODT0 18
M_ODT1 18
M_B_DQ[63..0]19
M_A_DM[7..0] 18
M_A_DQS#[7..0] 18
M_A_DQS[7..0] 18
M_A_A[15..0] 18
M_B_DQ[63..0]
M_B_BS019
M_B_BS119
M_B_BS219
M_B_CAS#19
M_B_RAS#19
M_B_WE#19
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AF3
AG1
AK1
AG4
AG3
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
AB1
AC5
AC6
B5
SB_DQ0
A5
SB_DQ1
C3
SB_DQ2
B3
SB_DQ3
E4
SB_DQ4
A6
SB_DQ5
A4
SB_DQ6
C4
SB_DQ7
D1
SB_DQ8
D2
SB_DQ9
F2
SB_DQ10
F1
SB_DQ11
C2
SB_DQ12
F5
SB_DQ13
F3
SB_DQ14
G4
SB_DQ15
H6
SB_DQ16
G2
SB_DQ17
J6
SB_DQ18
J3
SB_DQ19
G1
SB_DQ20
G5
SB_DQ21
J2
SB_DQ22
J1
SB_DQ23
J5
SB_DQ24
K2
SB_DQ25
L3
SB_DQ26
M1
SB_DQ27
K5
SB_DQ28
K4
SB_DQ29
M4
SB_DQ30
N5
SB_DQ31
SB_DQ32
SB_DQ33
AJ3
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
AJ4
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54
SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63
SB_BS0
W5
SB_BS1
R7
SB_BS2
SB_CAS#
Y7
SB_RAS#
SB_WE#
CLARKSFIELD
CLARKSFIELD
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK0
SB_CK#0
SB_CKE0
SB_CK1
SB_CK#1
SB_CKE1
SB_CS#0
SB_CS#1
SB_ODT0
SB_ODT1
SB_DM0
SB_DM1
SB_DM2
SB_DM3
SB_DM4
SB_DM5
SB_DM6
SB_DM7
SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7
SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7
SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8
SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15
W9
M3
V7
V6
M2
AB8
AD6
AC7
AD1
D4
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_CLK_DDR2 19
M_CLK_DDR#2 19
M_CKE2 19
M_CLK_DDR3 19
M_CLK_DDR#3 19
M_CKE3 19
M_CS#2 19
M_CS#3 19
M_ODT2 19
M_ODT3 19
M_B_DM[7..0] 19
M_B_DQS#[7..0] 19
M_B_DQS[7..0] 19
M_B_A[15..0] 19
CLARKUNF
CLARKUNF
CLARKUNF
A A
5
4
3
CLARKUNF
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
CPU (DDR)
CPU (DDR)
CPU (DDR)
1
A00
A00
of
10 92Monday, March 29, 2010
of
10 92Monday, March 29, 2010
of
10 92Monday, March 29, 2010
A00
Page 11
5
4
3
2
1
SSID = CPU
5 OF 9
CPU1E
CPU1E
D D
CFG0
CFG3
C C
CFG4
CFG7
B B
DIS
DIS
DY
DY
DY
DY
DY
DY
12
12
12
12
R1101
R1101
3KR2F-GP
3KR2F-GP
R1104
R1104
3KR2J-2-GP
3KR2J-2-GP
R1105
R1105
3KR2F-GP
3KR2F-GP
R1106
R1106
3KR2F-GP
3KR2F-GP
PCI-Express Configuration Select
1:Single PEG
CFG0
0:Bifurcation enabled
CFG3 - PCI-Express Static Lane Reversal
1 :Normal Operation
CFG3
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
1:Disabled; No Physical Display Port
CFG4
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
CFG7(Reserved) - Temporarily used for early
Clarksfield samples.
CFG7 Clarksfield (only for early samples pre-ES1) -
Connect to GND with 3.01K Ohm/5% resistor.
Note: Only temporary for early CFD sample
(rPGA/BGA) [For details please refer to the
WW33 MoW and sighting report].
For a common M/B design (for AUB and CFD),
the pull-down resistor shouble be used. Does
not impact AUB functionality.
TP1101TPAD14-GP TP1101TPAD14-GP
1
TP1102TPAD14-GP TP1102TPAD14-GP
1
TP1103TPAD14-GP TP1103TPAD14-GP
1
TP1104TPAD14-GP TP1104TPAD14-GP
1
TP1105TPAD14-GP TP1105TPAD14-GP
1
TP1106TPAD14-GP TP1106TPAD14-GP
1
TP1107TPAD14-GP TP1107TPAD14-GP
1
TP1108TPAD14-GP TP1108TPAD14-GP
1
TP1109TPAD14-GP TP1109TPAD14-GP
1
TP1110TPAD14-GP TP1110TPAD14-GP
1
TP1111TPAD14-GP TP1111TPAD14-GP
1
TP1112TPAD14-GP TP1112TPAD14-GP
1
TP1113TPAD14-GP TP1113TPAD14-GP
1
TP1114TPAD14-GP TP1114TPAD14-GP
1
TP1115TPAD14-GP TP1115TPAD14-GP
1
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
AP25
AL25
AL24
AL22
AJ33
AM30
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
AG9
M27
L28
J17
H17
G25
G17
E31
E30
H16
B19
A19
A20
B20
U9
T9
AC9
AB9
J29
J28
RSVD#AP25
RSVD#AL25
RSVD#AL24
RSVD#AL22
RSVD#AJ33
RSVD#AG9
RSVD#M27
RSVD#L28
SA_DIMM_VREF
SB_DIMM_VREF
RSVD#G25
RSVD#G17
RSVD#E31
RSVD#E30
CFG0
CFG1
CFG2
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
RSVD_TP_86
RSVD#B19
RSVD#A19
RSVD#A20
RSVD#B20
RSVD#U9
RSVD#T9
RSVD#AC9
RSVD#AB9
RSVD#J29
RSVD#J28
CLARKUNF
CLARKUNF
CLARKSFIELD
CLARKSFIELD
RESERVED
RESERVED
5 OF 9
RSVD#AJ13
RSVD#AJ12
RSVD#AH25
RSVD#AK26
RSVD#AL26
RSVD_NCTF_37
RSVD#AJ26
RSVD#AJ27
RSVD#AL28
RSVD#AL29
RSVD#AP30
RSVD#AP32
RSVD#AL27
RSVD#AT31
RSVD#AT32
RSVD#AP33
RSVD#AR33
RSVD#AR32
RSVD_TP#E15
RSVD_TP#F15
RSVD#D15
RSVD#C15
RSVD#AJ15
RSVD#AH15
SA_CK2
SA_CK#2
SA_CKE2
SA_CS#2
SA_ODT2
SA_CK3
SA_CK#3
SA_CKE3
SA_CS#3
SA_ODT3
SB_CK2
SB_CK#2
SB_CKE2
SB_CS#2
SB_ODT2
SB_CK3
SB_CK#3
SB_CKE3
SB_CS#3
SB_ODT3
AJ13
AJ12
AH25
AK26
AL26
AR2
AJ26
AJ27
AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AR32
E15
F15
A2
KEY
D15
C15
AJ15
AH15
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
VSS
VSS (AP34) can be left NC is
CRB implementation; EDS/DG
recommendation to GND.
R1107
RSVD_VSS
R1107
1 2
0R0402-PAD
0R0402-PAD
X02-20091224
A A
5
4
3
2
<Core Design >
<Core Design >
<Core Design >
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (RESERVED)
CPU (RESERVED)
CPU (RESERVED)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
11 92Wednesday, February 10, 2010
11 92Wednesday, February 10, 2010
11 92Wednesday, February 10, 2010
1
A00
A00
A00
Page 12
SSID = CPU
5
4
CPU1F
CPU1F
3
6 OF 9
6 OF 9
2
1
+VCC_CORE
PROCESSOR CORE POWER
+VCC_CORE
D D
x01 change tolerant 20091117
C1206
C1206
C1207
C1201
C1201
C1205
C1205
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1207
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
C1215
C1215
C1208
C1208
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
48A
x01 change tolerant 20091117
C1220
C1220
C1219
C1219
12
12
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
C1226
C1226
12
12
C1225
C1225
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
C C
C1222
C1222
C1223
C1223
C1224
C1221
C1221
12
12
DY
DY
12
C1227
C1227
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1228
C1228
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
DY
DY
C1224
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
x01 change tolerant 20091117
C1229
C1229
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C1231
C1231
C1230
C1230
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
C1232
C1232
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5MX-3GP
DY
DY
SC10U6D3V5MX-3GP
DY
DY
x01 change tolerant 20091117
C1235
C1235
C1236
C1236
C1237
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
12
C1243
C1243
DY
DY
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
B B
C1237
12
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
C1238
C1238
12
C1239
C1239
C1240
SC10U6D3V5KX-1GP
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1240
12
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
C1241
C1241
12
C1242
C1242
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
Y35
VCC
Y34
VCC
Y33
VCC
Y32
VCC
Y31
VCC
Y30
VCC
Y29
VCC
Y28
VCC
Y27
VCC
Y26
VCC
V35
VCC
V34
VCC
V33
VCC
V32
VCC
V31
VCC
V30
VCC
V29
VCC
V28
VCC
V27
VCC
V26
VCC
U35
VCC
U34
VCC
U33
VCC
U32
VCC
U31
VCC
U30
VCC
U29
VCC
U28
VCC
U27
VCC
U26
VCC
R35
VCC
R34
VCC
R33
VCC
R32
VCC
R31
VCC
R30
VCC
R29
VCC
R28
VCC
R27
VCC
R26
VCC
P35
VCC
P34
VCC
P33
VCC
P32
VCC
P31
VCC
P30
VCC
P29
VCC
P28
VCC
P27
VCC
P26
VCC
CLARKSFIELD
CLARKSFIELD
1.1V RAIL POWER
1.1V RAIL POWER
CPU CORE SUPPLY
CPU CORE SUPPLY
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
POWER
POWER
VTT_SELECT
VCC_SENSE
VSS_SENSE_VTT
SENSE LINES
SENSE LINES
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
VTT0
PSI#
ISENSE
VSS_SENSE
VTT_SENSE
VID
VID
VID
VID
VID
VID
VID
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
AN33
H_VID0
AK35
H_VID1
AK33
H_VID2
AK34
H_VID3
AL35
H_VID4
AL33
H_VID5
AM33
H_VID6
AM35
AM34
G15
AN35
AJ34
AJ35
B15
TP_VSS_SENSE_VTT
A15
x01 change tolerant 20091117
H_VTTVID1
H_VTTVID1 = Low, 1.1V
H_VTTVID1 = High, 1.05V
x01 change tolerant 20091117
12
C1209
C1209
12
C1202
C1202
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
12
C1210
C1210
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
x01 change tolerant 20091117
12
12
C1233
C1233
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
PSI# 47
H_VID[6..0] 47
PM_DPRSLPVR 4 7
TP1201 TPAD14-GPTP1201 TPAD14-GP
1
IMVP_IMON 47
VTT_SENSE 49
1
TP1202
TP1202
TPAD14-GP
TPAD14-GP
C1234
C1234
C1211
C1211
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1216
C1216
12
12
C1212
C1212
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
+VCC_CORE
12
C1203
C1203
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1217
C1217
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
12
R1201
R1201
100R2F-L1-GP-U
100R2F-L1-GP-U
12
R1202
R1202
100R2F-L1-GP-U
100R2F-L1-GP-U
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1218
C1218
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
+1.05V_VTT
C1204
C1204
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
+1.05V_VTT
12
+1.05V_VTT
12
12
C1214
C1214
C1213
C1213
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
DY
DY
The decoupling capacitors, filter
recommendations and sense resistors on the
CPU/PCH Rails are specific to the CRB
Implementation. Customers need to follow the
recommendations in the Calpella Platform
Design Guide.
Please note that the VTT Rail
Values are Auburndale
VTT=1.05V; Clarksfield
VTT=1.1V
VCC_SENSE 47
VSS_SENSE 47
A A
CLARKUNF
CLARKUNF
5
4
3
2
<Core Design >
<Core Design >
<Core Design >
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU (VCC_CORE)
CPU (VCC_CORE)
CPU (VCC_CORE)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
12 92Monday, March 29, 2010
12 92Monday, March 29, 2010
12 92Monday, March 29, 2010
1
A00
A00
A00
Page 13
5
4
3
2
1
SSID = CPU
+CPU_GFX_CORE
7 OF 9
CPU1G
AT21
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
J24
J23
H25
K26
J27
J26
J25
H27
G28
G27
G26
F26
E26
E25
CPU1G
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VAXG
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
CLARKUNF
CLARKUNF
SENSE
SENSE
GRAPHICS
GRAPHICS
CLARKSFIELD
CLARKSFIELD
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
LINES
LINES
GRAPHICS VIDs
GRAPHICS VIDs
22A
D D
C1302
C1302
C1301
C1301
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C1304
C1304
C1303
C1303
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
C1305
C1305
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
12
UMA
UMA
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C1307
C1307
C1306
C1306
12
UMA
UMA
UMA
UMA
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C1308
C1308
12
UMA
UMA
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
Please note that the VTT Rail
C C
+1.05V_VTT
+1.05V_VTT
B B
Values are: Auburndale VTT=1.05V
Clarksfield VTT=1.1V
12
C1316
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1316
x01 change tolerant 20091117
18A
C1321
C1321
12
12
C1320
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1320
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
12
DIS
DIS
C1317
C1317
12
C1323
C1323
C1322
C1322
12
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R1302
R1302
0R3J-0-U-GP
0R3J-0-U-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
7 OF 9
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_VID
GFX_IMON
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VTT0
VTT0
VTT0
VTT0
VTT1
VTT1
VTT1
VTT1
VTT1
VTT1
VCCPLL
VCCPLL
VCCPLL
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
R1305 4K7R2J-2-GP
R1305 4K7R2J-2-GP
AR25
AT25
GFX_IMON_C
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
J22
J20
J18
H21
x01 change tolerant 20091117
H20
H19
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
L26
L27
M26
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VAXG_SENSE
VSSAXG_SENSE
GFX_VR_EN
GFX_DPRSLPVR
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
VCC_AXG_SENSE 53
VSS_AXG_SENSE 53
12
UMA
UMA
1 2
DY
DY
R1304 0R2J-2-GP
R1304 0R2J-2-GP
1 2
DIS
DIS
R1303 1KR2J-1-GP
R1303 1KR2J-1-GP
12
12
C1309
C1309
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1318
C1318
C1324
C1324
C1326
C1326
12
C1310
C1310
C1311
C1311
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
DY
DY
C1327
C1327
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C1313
C1313
C1312
C1312
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C1319
C1319
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C1325
C1325
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C1328
C1328
1 2
GFX_VID0 53
GFX_VID1 53
GFX_VID2 53
GFX_VID3 53
GFX_VID4 53
GFX_VID5 53
GFX_VID6 53
GFX_VR_EN 53
GFX_DPRSLPVR 53
GFX_IMON 53
+1.5V_RUN_CPU
3A
12
12
C1314
C1314
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
x01 change tolerant 20091117
C1315
C1315
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
12
TC1301
TC1301
SE330U2D5VDM-2GP
SE330U2D5VDM-2GP
C1331
C1331
S3 Reduction
12
C1332
C1332
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
x01 change tolerant 20091117
+1.05V_VTT
2.6A
+1.05V_VTT
1.35A
12
C1329
C1329
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
x01 change tolerant 20091117
+1.8V_RUN
12
C1330
C1330
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
12
C1333
C1333
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
DY
DY
+1.5V_SUS
12
C1334
C1334
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CPU (VCC_GFXCORE)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
13 92Monday, March 29, 2010
of
13 92Monday, March 29, 2010
of
13 92Monday, March 29, 2010
1
A00
A00
A00
Page 14
5
4
3
2
1
SSID = CPU
8 OF 9
CPU1H
CPU1H
AT20
VSS
AT17
VSS
AR31
VSS
AR28
VSS
AR26
VSS
AR24
VSS
D D
C C
B B
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
AL9
AL6
AL3
AJ8
AJ5
AJ2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
CLARKSFIELD
CLARKSFIELD
VSS
VSS
8 OF 9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
G34
G31
G20
K27
H35
H32
H28
H26
H24
H22
H18
H15
H13
H11
F30
F27
F25
F22
F19
F16
E35
E32
E29
E24
E21
E18
E13
E11
D33
D30
D26
C34
C32
C29
C28
C24
C22
C20
C19
C16
B31
B25
B21
B18
B17
B13
B11
A29
A27
A23
CPU1I
CPU1I
VSS
K9
VSS
K6
VSS
K3
VSS
J32
VSS
J30
VSS
J21
VSS
J19
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H8
VSS
H5
VSS
H2
VSS
VSS
VSS
VSS
G9
VSS
G6
VSS
G3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E8
VSS
E5
VSS
E2
VSS
VSS
VSS
VSS
D9
VSS
D6
VSS
D3
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B8
VSS
B6
VSS
B4
VSS
VSS
VSS
VSS
A9
VSS
CLARKSFIELD
CLARKSFIELD
VSS
VSS
NCTF
NCTF
NCYF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,
AP1,AP35,AR1,AR35,AT2,AT3,
AT33,AT34,C1,C35,B35
NCYF TEST PIN:
A35,AT1,AT35,B1,A3,A33,A34,
AP1,AP35,AR1,AR35,AT2,AT3,
AT33,AT34,C1,C35,B35
9 OF 9
9 OF 9
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF#A35
VSS_NCTF#AT1
VSS_NCTF#AT35
VSS_NCTF#B1
RSVD_NCTF#A3
RSVD_NCTF#A33
RSVD_NCTF#A34
RSVD_NCTF#AP1
RSVD_NCTF#AP35
RSVD_NCTF#AR1
RSVD_NCTF#AR35
RSVD_NCTF#AT2
RSVD_NCTF#AT3
RSVD_NCTF#AT33
RSVD_NCTF#AT34
RSVD_NCTF#C1
RSVD_NCTF#C35
RSVD_NCTF#B35
AR34
B34
B2
A35
AT1
AT35
B1
A3
A33
A34
AP1
AP35
AR1
AR35
AT2
AT3
AT33
AT34
C1
C35
B35
TP_MCP_VSS_NCTF1
TP_MCP_VSS_NCTF2
TP_MCP_VSS_NCTF3
TP_MCP_VSS_NCTF4
TP1401TP1401
1
TP1402TP1402
1
TP1403TP1403
1
TP1404TP1404
1
CLARKUNF
CLARKUNF
A A
5
4
3
CLARKUNF
CLARKUNF
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
CPU (VSS)
CPU (VSS)
CPU (VSS)
1
A00
A00
of
14 92Wednesday, February 10, 2010
of
14 92Wednesday, February 10, 2010
of
14 92Wednesday, February 10, 2010
A00
Page 15
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
15 92Wednesday, February 10, 2010
of
15 92Wednesday, February 10, 2010
of
15 92Wednesday, February 10, 2010
A00
A00
A00
Page 16
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
16 92Wednesday, February 10, 2010
of
16 92Wednesday, February 10, 2010
of
16 92Wednesday, February 10, 2010
A00
A00
A00
Page 17
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
17 92Wednesday, February 10, 2010
of
17 92Wednesday, February 10, 2010
of
17 92Wednesday, February 10, 2010
A00
A00
A00
Page 18
5
SSID = MEMORY
D D
M_A_BS210
M_A_BS010
M_A_BS110
M_A_DQ[63..0]10
C C
+V_DDR_REF
B B
+0.75V_DDR_VTT
x01 change tolerant 20091117
x01 change tolerant 20091118
12
C1811
C1811
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+0.75V_DDR_VTT
12
C1818
C1818
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
Place these caps
close to VTT1 and
VTT2.
C1819
C1819
12
12
C1821
C1821
C1820
C1820
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
DY
DY
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1812
C1812
SC2D2U6D3V3KX-G P
SC2D2U6D3V3KX-G P
12
C1822
C1822
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C1813
C1813
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DDR3_DRAMRST#9,19
M_ODT010
M_ODT110
+0.75V_DDR_VTT
+V_DDR_REF
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
4
H =4mm
DM1
DM1
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
DDR3-204P-47-GP
DDR3-204P-47-GP
62.10017.P31
62.10017.P31
RAS#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
EVENT#
VDDSPD
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
3
M_A_DM[7..0] 10
M_A_DQS#[7..0] 10
M_A_DQS[7..0] 10
+1.5V_SUS
M_A_A[15..0] 10
M_A_RAS# 10
M_A_WE# 10
M_A_CAS# 10
M_CS#0 10
M_CS#1 10
M_CKE0 10
M_CKE1 10
M_CLK_DDR0 10
M_CLK_DDR#0 10
M_CLK_DDR1 10
M_CLK_DDR#1 10
PCH_SMBDATA 7,19,23,76
PCH_SMBCLK 7,19,23,76
PM_EXTTS#0 9
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1801
C1801
12
SA0_DIM0
SA1_DIM0
12
+3.3V_RUN
x01 change tolerant 20091117
12
C1802
C1802
DY
DY
SC2D2U6D3V3KX-G P
SC2D2U6D3V3KX-G P
+1.5V_SUS
Layout Note:
Place these Caps near
SO-DIMMA.
2
S3 Power Reduction
PS_S3CNTRL42,50
R1803
R1803
10KR2J-3-GP
10KR2J-3-GP
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
12
If SA0 DIM0 = 1, SA1_DIM0 = 0
R1804
R1804
SO-DIMMA SPD Address is 0xA2
10KR2J-3-GP
10KR2J-3-GP
SO-DIMMA TS Address is 0x32
SODIMM A DECO UPLING
x01 change tolerant 20091117
C1803
C1803
TC1801
TC1801
Q1801
Q1801
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SE330U2D5VDM-2GP
SE330U2D5VDM-2GP
12
DY
DY
C1814
C1814
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+0.75V_DDR_VTT
12
R1806
R1806
22R2J-2-GP
22R2J-2-GP
DISCHARGE_0D75V
D
.
.
.
.
.
.
.
.
.
.
S
G
12
C1815
C1815
12
C1804
C1804
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C1816
C1816
12
C1805
C1805
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
NP1
NP1
NP2
NP2
110
113
WE#
115
114
121
73
74
101
CK0
103
102
CK1
104
M_A_DM0
11
DM0
M_A_DM1
28
DM1
M_A_DM2
46
DM2
M_A_DM3
63
DM3
M_A_DM4
136
DM4
M_A_DM5
153
DM5
M_A_DM6
170
DM6
M_A_DM7
187
DM7
200
SDA
202
SCL
198
199
SA0_DIM0
197
SA0
SA1_DIM0
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
2
C1810
C1808
C1808
C1810
C1809
C1809
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
12
12
DY
DY
DY
DY
C1806
C1806
C1807
C1807
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
12
DY
DY
C1817
C1817
12
x01 change tolerant 20091117
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
DY
DY
SEC. 62.10017.P11
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
Berry
Berry
Berry
1
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5
SSID = MEMORY
D D
C C
B B
+V_DDR_REF
x01 change tolerant 20091118
12
C1915
C1915
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Place these caps
close to VTT1 and
VTT2.
C1918
C1918
12
C1917
C1917
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+0.75V_DDR_VTT
12
12
C1919
C1919
C1920
C1920
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C1916
C1916
DY
DY
SC2D2U6D3V3KX-G P
SC2D2U6D3V3KX-G P
12
DY
DY
x01 change tolerant 20091117
M_B_BS210
M_B_BS010
M_B_BS110
M_B_DQ[63..0]10
M_ODT210
M_ODT310
+V_DDR_REF
DDR3_DRAMRST#9,18
12
C1921
C1921
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
4
DM2
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
H = 8mm
DDR3-204P-55-GP
DDR3-204P-55-GP
62.10017.Q31
62.10017.Q31
SEC. 62.10017.N71
NP1
NP1
NP2
NP2
110
RAS#
113
WE#
115
CAS#
114
CS0#
121
CS1#
73
CKE0
74
CKE1
101
CK0
103
CK0#
102
CK1
104
CK1#
M_B_DM0
11
DM0
M_B_DM1
28
DM1
M_B_DM2
46
DM2
M_B_DM3
63
DM3
M_B_DM4
136
DM4
M_B_DM5
153
DM5
M_B_DM6
170
DM6
M_B_DM7
187
DM7
200
SDA
202
SCL
198
EVENT#
199
VDDSPD
NC#/TEST
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
SO-DIMMB is pl aced farther from
the Processor than SO-DIMM A
NC#1
NC#2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
SA0_DIM1
197
SA0
SA1_DIM1
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
+1.5V_SUS
M_B_RAS# 10
M_B_WE# 10
M_B_CAS# 10
M_CS#2 10
M_CS#3 10
M_CKE2 10
M_CKE3 10
M_CLK_DDR2 10
M_CLK_DDR#2 10
M_CLK_DDR3 10
M_CLK_DDR#3 10
PCH_SMBDATA 7,18,23,76
PCH_SMBCLK 7,18,23,76
PM_EXTTS#1 9
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3
M_B_DM[7..0] 10
M_B_DQS#[7..0] 10
M_B_DQS[7..0] 10
M_B_A[15..0] 10
12
12
C1902
DY
DY
C1902
SC2D2U6D3V3KX-G P
SC2D2U6D3V3KX-G P
C1901
C1901
x01 change tolerant 20091118
+1.5V_SUS
x01 change tolerant 20091117
Layout Note:
Place these Caps near
SO-DIMMB.
+3.3V_RUN
SODIMM B DECO UPLING
C1903
C1903
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
12
DY
DY
C1912
C1912
C1911
C1911
12
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SA1_DIM1
SA0_DIM1
12
R1903
R1903
10KR2J-3-GP
10KR2J-3-GP
x01 change tolerant 20091117
C1905
C1904
C1904
C1913
C1913
C1905
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
12
12
DY
DY
C1914
C1914
12
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1906
C1906
C1908
C1908
C1907
C1907
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
12
DY
DY
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
2
+3.3V_RUN
12
C1909
C1909
12
R1902
R1902
10KR2J-3-GP
10KR2J-3-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
C1910
C1910
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
DY
DY
1
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
Berry
Berry
Berry
1
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RN2001
D D
R2002
R2002
12
DY
DY
100KR2J-1-GP
100KR2J-1-GP
+3.3V_RUN
GPU_LVDS_CLK54,82
GPU_LVDS_DATA54,82
PCH_LCDVDD_EN
Place near PCH
RN2001
1
2 3
UMA
UMA
SRN0J-6-GP
SRN0J-6-GP
UMA
UMA
4
12
R2001
R2001
2K37R2F-GP
2K37R2F-GP
Impedance:85 ohm
123
45
RN2002
C C
B B
UMA
UMA
678
RN2002
SRN2K2J-4-GP
SRN2K2J-4-GP
LCTRL_DATA
LCTRL_CLK
LDDC_CLK_PCH
LDDC_DATA_PCH
PCH_CRT_BLUE77
PCH_CRT_GREEN77
PCH_CRT_RED77
Close to ball <600mil
RN2005
RN2005
SRN150F-1-GP
SRN150F-1-GP
678
UMA
UMA
4 5
123
4
PCH_VGA_BLEN55
PCH_LCDVDD_EN55
PCH_LBKLT_CTL55
LVDS_VBG
TP2001TPAD14-GP TP2001TPAD14-GP
1
RN2004
RN2004
1
2 3
UMA
UMA
SRN0J-6-GP
SRN0J-6-GP
PCH_LVDSA_TXC#55
PCH_LVDSA_TXC55
PCH_LVDSA_TX0#55
PCH_LVDSA_TX1#55
PCH_LVDSA_TX2#55
PCH_LVDSA_TX055
PCH_LVDSA_TX155
PCH_LVDSA_TX255
PCH_LVDSB_TXC#55
PCH_LVDSB_TXC55
PCH_LVDSB_TX0#55
PCH_LVDSB_TX1#55
PCH_LVDSB_TX2#55
PCH_LVDSB_TX055
PCH_LVDSB_TX155
PCH_LVDSB_TX255
Need Level Shift
PCH_CRT_DDCCLK77
PCH_CRT_DDCDATA77
PCH_CRT_HSYNC77
PCH_CRT_VSYNC77
2.5V Tolerance
1KR2J-1-GP
1KR2J-1-GP
LDDC_CLK_PCH
LDDC_DATA_PCH
LCTRL_CLK
LCTRL_DATA
LIBG
LVD_VREFH
4
LVD_VREFL
CRT_IREF
12
R2007
R2007
U2001D
U2001D
T48
L_BKLTEN
T47
L_VDD_EN
Y48
L_BKLTCTL
AB48
L_DDC_CLK
Y45
L_DDC_DATA
AB46
L_CTRL_CLK
V48
L_CTRL_DATA
AP39
LVD_IBG
AP41
LVD_VBG
AT43
LVD_VREFH
AT42
LVD_VREFL
AV53
LVDSA_CLK#
AV51
LVDSA_CLK
BB47
LVDSA_DATA#0
BA52
LVDSA_DATA#1
AY48
LVDSA_DATA#2
AV47
LVDSA_DATA#3
BB48
LVDSA_DATA0
BA50
LVDSA_DATA1
AY49
LVDSA_DATA2
AV48
LVDSA_DATA3
AP48
LVDSB_CLK#
AP47
LVDSB_CLK
AY53
LVDSB_DATA#0
AT49
LVDSB_DATA#1
AU52
LVDSB_DATA#2
AT53
LVDSB_DATA#3
AY51
LVDSB_DATA0
AT48
LVDSB_DATA1
AU50
LVDSB_DATA2
AT51
LVDSB_DATA3
AA52
CRT_BLUE
AB53
CRT_GREEN
AD53
CRT_RED
V51
CRT_DDC_CLK
V53
CRT_DDC_DATA
Y53
CRT_HSYNC
Y51
CRT_VSYNC
AD48
DAC_IREF
AB51
CRT_IRTN
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3
4 OF 10
4 OF 10
DDPB_HPD
DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P
DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P
DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P
BJ46
BG46
BJ48
BG48
BF45
BH45
T51
T53
BG44
BJ44
AU38
BD42
BC42
BJ42
BG42
BB40
BA40
AW38
BA38
Y49
AB49
BE44
BD44
AV40
BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36
U50
U52
BC46
BD46
AT38
BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36
SDVO_TVCLKINN
SDVO_TVCLKINP
SDVO_STALLN
SDVO_STALLP
SDVO_INTN
SDVO_INTP
SDVO_CTRLCLK
SDVO_CTRLDATA
DDPB_AUXN
DDPB_AUXP
LVDS
LVDS
DDPC_CTRLCLK
DDPC_CTRLDATA
DDPC_AUXN
DDPC_AUXP
DDPC_HPD
Digital Display Interface
Digital Display Interface
DDPD_CTRLCLK
DDPD_CTRLDATA
DDPD_AUXN
DDPD_AUXP
DDPD_HPD
CRT
CRT
2
+3.3V_RUN
4
RN2006
RN2006
SRN2K2J-1-GP
SRN2K2J-1-GP
UMA
UMA
1
2 3
PCH_HDMI_CLK 57
PCH_HDMI_DATA 57
HDMI_DATA2#_C
HDMI_DATA2_C
HDMI_DATA1#_C
HDMI_DATA1_C
HDMI_DATA0#_C
HDMI_DATA0_C
HDMI_CLK#_C
HDMI_CLK_C
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
C2001 SCD1U10V2KX-5GP
C2001 SCD1U10V2KX-5GP
1 2
C2002 SCD1U10V2KX-5GP
C2002 SCD1U10V2KX-5GP
1 2
C2003 SCD1U10V2KX-5GP
C2003 SCD1U10V2KX-5GP
1 2
C2004 SCD1U10V2KX-5GP
C2004 SCD1U10V2KX-5GP
1 2
C2005 SCD1U10V2KX-5GP
C2005 SCD1U10V2KX-5GP
1 2
C2006 SCD1U10V2KX-5GP
C2006 SCD1U10V2KX-5GP
1 2
C2007 SCD1U10V2KX-5GP
C2007 SCD1U10V2KX-5GP
1 2
C2008 SCD1U10V2KX-5GP
C2008 SCD1U10V2KX-5GP
1 2
HDMI_PCH_DET 57
HDMI_PCH_DATA2# 57,82
HDMI_PCH_DATA2 57,82
HDMI_PCH_DATA1# 57,82
HDMI_PCH_DATA1 57,82
HDMI_PCH_DATA0# 57,82
HDMI_PCH_DATA0 57,82
HDMI_PCH_CLK# 57,82
HDMI_PCH_CLK 57,82
Close to VGA
Impedance:85 ohm Impedance:100 ohm
1
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
PCH (LVDS/CRT/DDI)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
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20 92Monday, March 29, 2010
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20 92Monday, March 29, 2010
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RN2101
PCI_TRDY#
PCI_DEVSEL#
INT_PIRQA#
+3.3V_RUN
D D
+3.3V_RUN
PCI_ IRDY#
INT_PIRQH#
INT_PIRQB#
INT_PIRQF#
PCI_REQ3#
+3.3V_RUN
RN2101
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RN2103
RN2103
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
RN2102
RN2102
1
2
3
4 5
SRN8K2J-4-GP
SRN8K2J-4-GP
PCI_STOP#
8
INT_PIRQE#
7
INT_PIRQC#
6
INT_PIRQG#
10
9
8
7
10
9
8
7
PCI_FRAME#
PCI_REQ2#
INT_PIRQD#
PCI_SERR#
PCI_REQ1#
PCI_PLOCK#
PCI_PERR#
PCI_REQ0#
+3.3V_RUN
+3.3V_RUN
PLT_RST#9,37,70,76,78,80
BOOT BIOS Strap
PCI_GNT#1 BOOT BIOS LocationPCI_GNT#0
0 0 LPC
C C
+3.3V_ALW
B B
A16 swap override Strap/Top-Block
Swap Override jumper
PCI_GNT#3 Low = A16 swap
0 1 Reserved
01
11
RN2104
USB_OC#2_3
SMC_WAKE_SCI#_R
PCI_GNT3#
RN2104
1
2
3
4
5 6
SRN8K2J-2-GP-U
SRN8K2J-2-GP-U
R2105
R2105
1 2
DY
DY
4K7R2J-2-GP
4K7R2J-2-GP
override/Top-Block
Swap Override enabled
High = Default
PCI
SPI(Default)
10
USB_OC#12_13
9
USB_OC#8_9USB_OC#6_7
8
USB_OC#10_11USB_OC#0_1
7
USB_OC#4_5
+3.3V_ALW
PCLK_FWH70
CLK_PCI_FB23
PCLK_KBC37
4
SSID = PCH
+3.3V_RUN
5
VCC
DY
DY
4
Y
NL17SZ08DFT2G-GP
NL17SZ08DFT2G-GP
1 2
R2101 0R0402-PADR2101 0R0402-PAD
12
C2101
C2101
DY
DY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
1 2
R2107 22R2J-2-GPR2107 22R2J-2-GP
1 2
R2108 22R2J-2-GPR2108 22R2J-2-GP
1 2
R2109 22R2J-2-GPR2109 22R2J-2-GP
1 2
DY
DY
U2101
U2101
1
A
PCI_PLTRST#
2
B
3
GND
EC2101
EC2101
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
3
5 OF 10
U2001E
U2001E
H40
AD0
N34
AD1
C44
AD2
A38
AD3
C36
AD4
J34
AD5
A40
AD6
D45
AD7
E36
AD8
H48
AD9
E40
AD10
C40
AD11
M48
AD12
M45
AD13
F53
AD14
M40
AD15
M43
AD16
J36
AD17
K48
AD18
F40
AD19
C42
AD20
K46
AD21
M51
AD22
J52
AD23
K51
AD24
L34
AD25
F42
AD26
J40
AD27
G46
AD28
F44
AD29
M47
AD30
H36
AD31
J50
C/BE0#
G42
C/BE1#
H47
C/BE2#
G34
INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#
PCI_REQ0#
PCI_REQ1#
PCI_REQ2#
PCI_REQ3#
TP2102TPAD14-GP TP2102TPAD14-GP
TP2103TPAD14-GP TP2103TPAD14-GP
TP2104TPAD14-GP TP2104TPAD14-GP
TP2110TPAD14-GP TP2110TPAD14-GP
TP2115TPAD14-GP TP2115TPAD14-GP
PCI_GNT0#
1
PCI_GNT1#
1
PCI_GNT2#
1
PCI_GNT3#
INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
INT_PIRQH#
PCIRST#
1
PCI_SERR#
PCI_PERR#
PCI_ IRDY#
PCI_DEVSEL#
PCI_FRAME#
PCI_PLOCK#
PCI_STOP#
PCI_TRDY#
PCH_PME#
1
PCI_PLTRST#
PCLK_FWH_R
CLK_PCI_FB_R
PCLK_KBC_R
C/BE3#
G38
PIRQA#
H51
PIRQB#
B37
PIRQC#
A44
PIRQD#
F51
REQ0#
A46
REQ1#/GPIO50
B45
REQ2#/GPIO52
M53
REQ3#/GPIO54
F48
GNT0#
K45
GNT1#/GPIO51
F36
GNT2#/GPIO53
H53
GNT3#/GPIO55
B41
PIRQE#/GPIO2
K53
PIRQF#/GPIO3
A36
PIRQG#/GPIO4
A48
PIRQH#/GPIO5
K6
PCIRST#
E44
SERR#
E50
PERR#
A42
IRDY#
H44
PAR
F46
DEVSEL#
C46
FRAME#
D49
PLOCK#
D41
STOP#
C48
TRDY#
M7
PME#
D5
PLTRST#
N52
CLKOUT_PCI0
P53
CLKOUT_PCI1
P46
CLKOUT_PCI2
P51
CLKOUT_PCI3
P48
CLKOUT_PCI4
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
PCI
PCI
NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3
NV_DQS0
NV_DQS1
NV_DQ0/NV_IO0
NV_DQ1/NV_IO1
NV_DQ2/NV_IO2
NV_DQ3/NV_IO3
NV_DQ4/NV_IO4
NV_DQ5/NV_IO5
NV_DQ6/NV_IO6
NV_DQ7/NV_IO7
NV_DQ8/NV_IO8
NV_DQ9/NV_IO9
NV_DQ10/NV_IO10
NV_DQ11/NV_IO11
NVRAM
NVRAM
NV_DQ12/NV_IO12
NV_DQ13/NV_IO13
NV_DQ14/NV_IO14
NV_DQ15/NV_IO15
NV_RCOMP
NV_WR#0_RE#
NV_WR#1_RE#
NV_WE#_CK0
NV_WE#_CK1
USBP0N
USBP1N
USBP2N
USBP3N
USBP4N
USBP5N
USBP6N
USBP7N
USBP8N
USBP9N
USB
USB
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P
USBRBIAS#
USBRBIAS
OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43
OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14
5 OF 10
NV_ALE
NV_CLE
NV_RB#
USBP0P
USBP1P
USBP2P
USBP3P
USBP4P
USBP5P
USBP6P
USBP7P
USBP8P
USBP9P
AY9
BD1
AP15
BD8
AV9
BG8
AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6
BD3
AY6
AU2
AV7
AY8
AY5
AV11
BF5
H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24
B25
D25
N16
J16
F16
L16
E14
G16
F12
T15
2
NV_ALE
NV_CLE
NV_RCOMP
1
USB_RBIAS_PN
USB_OC#0_1
USB_OC#2_3
USB_OC#4_5
USB_OC#6_7
USB_OC#8_9
USB_OC#10_11
USB_OC#12_13
SMC_WAKE_SCI#_R
DMI Termination Voltage
NV_CLE Set to Vss when low.
TP2105 TPAD14-GPTP2105 TPAD14-GP
Set to Vcc when high.
Danbury Technology:
Disabled when Low.
Enable when High.
Pair
USB_PN0 77
USB_PP0 77
USB_PN1 77
USB_PP1 77
USB_PN2 76
USB_PP2 76
USB_PN4 78
USB_PP4 78
USB_PN5 73
USB_PP5 73
0
1
2
3
4
5
6
7
USB_PN8 76
USB_PP8 76
USB_PN9 76
USB_PP9 76
USB_PN11 76
USB_PP11 76
USB_PN13 54
USB_PP13 54
1 2
R2106
R2106
22D6R2F-L1-GP
22D6R2F-L1-GP
8
9
10
11
12
13
USB_OC#0_1 63
USB_OC#8_9 63
1
+V_NVRAM_VCCQ
12
R2102
R2102
1KR2J-1-GP
1KR2J-1-GP
DY
DY
NV_CLE
+V_NVRAM_VCCQ
12
R2103
R2103
1KR2J-1-GP
1KR2J-1-GP
DY
DY
NV_ALE
USB
Device
USB2 (CRT Board)
USB3 (CRT Board)
WLAN (I/O Board)
X
CARD READER
BLUETOOTH
X
X
USB1 (I/O Board)
ESATA (I/O Board COMBO)
X
W-WAN (I/O Board)
X
CAMERA
KBC CLK EMI
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
PCH (PCI/USB/NVRAM)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
21 92Monday, March 29, 2010
of
21 92Monday, March 29, 2010
of
21 92Monday, March 29, 2010
1
A00
A00
A00
Page 22
5
4
3
2
1
SSID = PCH
RN2201
FDI_PCH_TXP3
FDI_PCH_TXN3
3 OF 10
U2001C
U2001C
DMI_CTX_PRXN08
DMI_CTX_PRXN18
DMI_CTX_PRXN28
R2202
R2202
1 2
49D9R2F-GP
49D9R2F-GP
DMI_CTX_PRXN38
DMI_CTX_PRXP08
DMI_CTX_PRXP18
DMI_CTX_PRXP28
DMI_CTX_PRXP38
DMI_PTX_CRXN08
DMI_PTX_CRXN18
DMI_PTX_CRXN28
DMI_PTX_CRXN38
DMI_PTX_CRXP08
DMI_PTX_CRXP18
DMI_PTX_CRXP28
DMI_PTX_CRXP38
DMI_IRCOMP_R
D D
+1.05V_VTT
C C
XDP_DBRESET#9,23
X02-20091222
R2204
R2204
PM_PWROK37
PM_DRAM_PWRGD9
PCH_RSMRST#37 PM_SLP_S4# 37,50
SUS_PWR_DN_ACK37
PM_PWRBTN#_R9
PM_PWRBTN#37
B B
AC_PRESENT_EC37
1 2
0R0402-PAD
0R0402-PAD
RN2207
RN2207
4
SRN10KJ-5-GP
SRN10KJ-5-GP
X02-20091222
R2218
R2218
1 2
0R0402-PAD
0R0402-PAD
PM_BATLOW#_R
PM_RI#
PM_PWRGD
23
1
X02-20091224
TP2206TPAD14-GP TP2206TPAD14-GP
R2213
R2213
1 2
0R0402-PAD
0R0402-PAD
R2215
R2215
1 2
0R0402-PAD
0R0402-PAD
R2219
R2219
1 2
0R0402-PAD
0R0402-PAD
X02-20091222
R2206
R2206
1 2
0R0402-PAD
0R0402-PAD
LAN_RST#1
1
PM_RSMRST#_R
PM_PWRBTN#_R
AC_PRESENT
BC24
DMI0RXN
BJ22
DMI1RXN
AW20
DMI2RXN
BJ20
DMI3RXN
BD24
DMI0RXP
BG22
DMI1RXP
BA20
DMI2RXP
BG20
DMI3RXP
BE22
DMI0TXN
BF21
DMI1TXN
BD20
DMI2TXN
BE18
DMI3TXN
BD22
DMI0TXP
BH21
DMI1TXP
BC20
DMI2TXP
BD18
DMI3TXP
BH25
DMI_ZCOMP
BF25
DMI_IRCOMP
T6
SYS_RESET#
M6
SYS_PWROK
B17
PWROK
K5
MEPWROK
A10
LAN_RST#
D9
DRAMPWROK
C16
RSMRST#
M1
SUS_PWR_DN_ACK/GPI O30
P5
PWRBTN#
P7
ACPRESENT/GPIO31
A6
BATLOW#/GPIO 72
F14
RI#
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
DMI
DMI
System Power Management
System Power Management
3 OF 10
FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7
FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7
FDI_INT
FDI_FSYNC0
FDI
FDI
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1
WAKE#
CLKRUN#/GPIO32
SUS_STAT#/GPIO61
SUSCLK/GPIO62
SLP_S5#/GPIO63
SLP_S4#
SLP_S3#
SLP_M#
TP23
PMSYNCH
SLP_LAN#/GPIO29
BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12
BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12
BJ14
BF13
BH13
BJ12
BG14
J12
Y1
P8
F3
E4
H7
P12
K8
N2
BJ10
F6
FDI_PCH_TXN0
FDI_PCH_TXN1
FDI_PCH_TXN2
FDI_PCH_TXN3
FDI_PCH_TXN4
FDI_PCH_TXN5
FDI_PCH_TXN6
FDI_PCH_TXN7
FDI_PCH_TXP0
FDI_PCH_TXP1
FDI_PCH_TXP2
FDI_PCH_TXP3
FDI_PCH_TXP4
FDI_PCH_TXP5
FDI_PCH_TXP6
FDI_PCH_TXP7
FDI_INT_C
FDI_FSYNC0_C
FDI_FSYNC1_C
FDI_LSYNC0_C
FDI_LSYNC1_C
PM_SUS_STAT#MEPWROK
PCH_SUSCLK
PCH_SLP_S5#
PM_SLP_S4#_R
PM_SLP_S3#_R
SIO_SLP_M#_R
PM_SLP_DSW#
H_PM_SYNC
PM_SLP_LAN#
R2201
R2201
1 2
UMA
UMA
0R2J-2-GP
0R2J-2-GP
PCIE_WAKE# 76
PM_CLKRUN# 37
TP2201
TP2201
TPAD14-GP
TPAD14-GP
1
1
1
TP2203TPAD14-GPTP2203TPAD14-GP
1
TP2204TPAD14-GPTP2204TPAD14-GP
1
TP2205TPAD14-GPTP2205TPAD14-GP
TP2202
TP2202
TPAD14-GP
TPAD14-GP
FDI_INT 8
A00-20100204
1 2
R2209 0R0402-PADR2209 0R0402-PAD
1 2
R2211 10R2J-2-GPR2211 10R2J-2-GP
1 2
R2214 0R0402-PADR2214 0R0402-PAD
1 2
R2216 0R0402-PADR2216 0R0402-PAD
X02-20091222
Option to " Disable " clkrun.
Pulling it down will keep the clks running.
FDI_PCH_TXN1
FDI_PCH_TXP1
FDI_PCH_TXN4
FDI_PCH_TXP4
FDI_PCH_TXP0
FDI_PCH_TXN0
FDI_PCH_TXP6
FDI_PCH_TXN6
FDI_PCH_TXN2
FDI_PCH_TXP2
FDI_PCH_TXN7
FDI_PCH_TXP7
FDI_PCH_TXP5
FDI_PCH_TXN5
FDI_LSYNC1_C
FDI_FSYNC1_C
FDI_LSYNC0_C
FDI_FSYNC0_C
PM_SLP_S3# 37,42,47,50,51,89
H_PM_SYNC 9
RN2201
1
2
3
UMA
UMA
4 5
SRN0J-7-GP
SRN0J-7-GP
RN2202
RN2202
1
2
3
UMA
UMA
4 5
SRN0J-7-GP
SRN0J-7-GP
RN2203
RN2203
1
2
UMA
UMA
3
4 5
SRN0J-7-GP
SRN0J-7-GP
RN2204
RN2204
1
2
UMA
UMA
3
4 5
SRN0J-7-GP
SRN0J-7-GP
RN2205
RN2205
1
2
UMA
UMA
3
4 5
SRN0J-7-GP
SRN0J-7-GP
PCH_SUSCLK_2102 39
PCH_SUSCLK_KBC 37
8
7
6
8
7
6
8
7
6
8
7
6
8
7
6
FDI_TXP3 8
FDI_TXN3 8
FDI_TXN1 8
FDI_TXP1 8
FDI_TXN4 8
FDI_TXP4 8
FDI_TXP0 8
FDI_TXN0 8
FDI_TXP6 8
FDI_TXN6 8
FDI_TXN2 8
FDI_TXP2 8
FDI_TXN7 8
FDI_TXP7 8
FDI_TXP5 8
FDI_TXN5 8
FDI_LSYNC1 8
FDI_FSYNC1 8
FDI_LSYNC0 8
FDI_FSYNC0 8
PM_BATLOW#_R
PM_RI#
AC_PRESENT_EC
SUS_PWR_ACK
PCIE_WAKE#
PCH_RSMRST#SUS_PWR_ACK
RN2206
RN2206
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
1 2
R2210 1KR2J-1-GPR2210 1KR2J-1-GP
R2217
R2217
1 2
10KR2J-3-GP
10KR2J-3-GP
PM_CLKRUN#
12
R2221
R2221
DY
10KR2J-3-GP
10KR2J-3-GP
DY
8
7
6
+3.3V_ALW
1 2
R2220
R2220
10KR2J-3-GP
10KR2J-3-GP
+3.3V_RUN
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
PCH (DM I/FDI/PM)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
22 92Monday, March 29, 2010
of
22 92Monday, March 29, 2010
of
22 92Monday, March 29, 2010
1
A00
A00
A00
Page 23
5
4
3
2
1
SSID = PCH
12
12
RN2303
RN2303
2 3
1
SRN2K2J-1-GP
SRN2K2J-1-GP
Q2301
Q2301
6
5
2N7002EDW-GP
2N7002EDW-GP
UMA
UMA
+3.3V_ALW
PEG_CLKREQ#_C
4
1
2
34
DIS uses 0ohm 63.R0034.1DL
UMA uses 12pF 78.12034.1FL
X2301
X2301
XTAL-25MHZ-96GP
XTAL-25MHZ-96GP
1 2
C2307
C2307
UMA
UMA
SC12P50V2JN-3GP
SC12P50V2JN-3GP
X01 2009/11/05
2 OF 10
U2001B
U2001B
BG30
PERN1
BJ30
PERP1
BF29
PETN1
BH29
PETP1
D D
PCIE_RXN276
PCIE_RXP276
PCIE_TXN276
PCIE_TXP276
PCIE_RXN376
PCIE_RXP376
PCIE_TXN376
PCIE_TXP376
PCIE_RXN476
PCIE_RXP476
PCIE_TXN476
PCIE_TXP476
C2301 SCD1U10V2KX-5GPC2301 SCD1U10V2KX-5GP
C2302 SCD1U10V2KX-5GPC2302 SCD1U10V2KX-5GP
C2303 SCD1U10V2KX-5GPC2303 SCD1U10V2KX-5GP
C2306 SCD1U10V2KX-5GPC2306 SCD1U10V2KX-5GP
C2304 SCD1U10V2KX-5GPC2304 SCD1U10V2KX-5GP
C2305 SCD1U10V2KX-5GPC2305 SCD1U10V2KX-5GP
1 2
1 2
1 2
1 2
1 2
1 2
PCIE_C_TXN2
PCIE_C_TXP2
PCIE_C_TXN3
PCIE_C_TXP3
PCIE_C_TXN4
PCIE_C_TXP4
x01 change tolerant 20091117
C C
PCIECLKRQ{0,3,4,5,6,7}# should have a 10 K pull-up to +3.3V_ALW.
PCIECLKRQ{1,2} should have a 10K pull-up to +3.3_RUN
PCIE_CLK_RQ1#
CLK_PCIE_WLAN#76
CLK_PCIE_WLAN76
WLAN_CLKREQ#76
CLK_PCIE_LAN#76
CLK_PCIE_LAN76
B B
+3.3V_ALW
RN2307
RN2307
1
8
2
7
3
6
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
R2304 10KR2J-3-GPR2304 10KR2J-3-GP
CLK_PCIE_WWAN#76
CLK_PCIE_WWAN76
WW AN_CLKREQ#76
WW AN_CLKREQ#
PCIE_CLK_RQ0#
PEG_B_CLKRQ#
PCIE_CLK_RQ5#
12
PCIE_CLK_RQ3#
PCIE_CLK_RQ5#
PEG_B_CLKRQ#
AW30
PERN2
BA30
PERP2
BC30
PETN2
BD30
PETP2
AU30
PERN3
AT30
PERP3
AU32
PETN3
AV32
PETP3
BA32
PERN4
BB32
PERP4
BD32
PETN4
BE32
PETP4
BF33
PERN5
BH33
PERP5
BG32
PETN5
BJ32
PETP5
BA34
PERN6
AW34
PERP6
BC34
PETN6
BD34
PETP6
AT34
PERN7
AU34
PERP7
AU36
PETN7
AV36
PETP7
BG34
PERN8
BJ34
PERP8
BG36
PETN8
BJ36
PETP8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P
P9
PCIECLKRQ0#/GPIO73
AM43
CLKOUT_PCIE1N
AM45
CLKOUT_PCIE1P
U4
PCIECLKRQ1#/GPIO18
AM47
CLKOUT_PCIE2N
AM48
CLKOUT_PCIE2P
N4
PCIECLKRQ2#/GPIO20
AH42
CLKOUT_PCIE3N
AH41
CLKOUT_PCIE3P
A8
PCIECLKRQ3#/GPIO25
AM51
CLKOUT_PCIE4N
AM53
CLKOUT_PCIE4P
M9
PCIECLKRQ4#/GPIO26
AJ50
CLKOUT_PCIE5N
AJ52
CLKOUT_PCIE5P
H6
PCIECLKRQ5#/GPIO44
AK53
CLKOUT_PEG_B_N
AK51
CLKOUT_PEG_B_P
P13
PEG_B_CLKRQ#/GPIO56
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
WLAN
LAN
W-WAN
SMBus
SMBus
PCI-E*
PCI-E*
Link
Link
Controller
Controller
PEG_A_CLKRQ#/GPIO47
PEG
PEG
CLKOUT_DP_N/CLKOUT_BCLK1_N
CLKOUT_DP_P/CLKOUT_BCLK1_P
From CLK BUFFER
From CLK BUFFER
CLKIN_SATA_N/CKSSCD_N
CLKIN_SATA_P/CKSSCD_P
Clock Flex
Clock Flex
CLKIN_PCILOOPBACK
CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67
2 OF 10
SMBALERT#/GPIO11
SMBCLK
SMBDATA
SML0ALERT#/GPIO60
SML0CLK
SML0DATA
SML1ALERT#/GPIO74
SML1CLK/GPIO58
SML1DATA/GPIO75
CL_CLK1
CL_DATA1
CL_RST1#
CLKOUT_PEG_A_N
CLKOUT_PEG_A_P
CLKOUT_DMI_N
CLKOUT_DMI_P
CLKIN_DMI_N
CLKIN_DMI_P
CLKIN_BCLK_N
CLKIN_BCLK_P
CLKIN_DOT_96N
CLKIN_DOT_96P
REFCLK14IN
XTAL25_IN
XTAL25_OUT
XCLK_RCOMP
B9
PCH_SMB_CLK
H14
PCH_SMB_DATA
C8
TPM_ID1
J14
SML0_CLK
C6
SML0_DATA
G8
LPD_SPI_INTR#
M14
KBC_SCL1
E10
KBC_SDA1
G12
CL_CLK
T13
CL_DATA
T11
CL_RST#
T9
PEG_CLKREQ#_C
H1
CLK_PCIE_VGA#
AD43
CLK_PCIE_VGA
AD45
CLK_EXP_N
AN4
CLK_EXP_P
AN2
AT1
AT3
CLKIN_DMI#
AW24
CLKIN_DMIPCIE_CLK_RQ0#
BA24
CLK_CPU_BCLK#
AP3
CLK_CPU_BCLK
AP1
F18
E18
AH13
AH12
CLK_PCH_14M
P41
CLK_PCI_FB
J42
XTAL25_IN
AH51
XTAL25_OUT
AH53
XCLK_RCOMP
AF38
CLK_PCH_GPIO64
T45
P43
T42
N50
1
1
1
X01 20091118
CLK48_GPIO
PCH_GPIO11 25
SML0_CLK 9
SML0_DATA 9
KBC_SCL1 37
KBC_SDA1 37
TP2302 TPAD14-GPTP2302 TPAD14-GP
TP2303 TPAD14-GPTP2303 TPAD14-GP
TP2304 TPAD14-GPTP2304 TPAD14-GP
DY
DY
1 2
R2310 0R2J-2-GP
R2310 0R2J-2-GP
CLK_PCIE_VGA# 80
CLK_PCIE_VGA 80
CLK_EXP_N 9
CLK_EXP_P 9
CLKIN_DMI# 7
CLKIN_DMI 7
CLK_CPU_BCLK# 7
CLK_CPU_BCLK 7
CLK_DREF# 7
CLK_DREF 7
CLK_PCIE_SATA# 7
CLK_PCIE_SATA 7
CLK_PCH_14M 7
CLK_PCI_FB 21
R2306 90D9R2F-1-GPR2306 90D9R2F-1-GP
1 2
TP2301
TP2301
TPAD14-GP
TP2307
TP2307
TPAD14-GP
TPAD14-GP
TPAD14-GP
1
1
PEG_CLKREQ# 82
+3.3V_ALW
RN2309
RN2309
SRN2K2J-1-GP
SRN2K2J-1-GP
SML0_DATA
SML0_CLK
+1.05V_VTT
TPM_ID1
R2305 10KR2J-3-GPR2305 10KR2J-3-GP
LPD_SPI_INTR#
R2311 10KR2J-3-GPR2311 10KR2J-3-GP
4
1
2 3
PCH_SMB_DATA
PCH_SMB_CLK
XTAL25_IN
UMA
UMA
XTAL25_OUT
4
RN2301
RN2301
SRN2K2J-1-GP
SRN2K2J-1-GP
1
2 3
KBC_SCL1
KBC_SDA1
+3.3V_RUN
1 2
84.27002.F3F
84.27002.F3F
R2303
R2303
1M1R2J-GP
1M1R2J-GP
+3.3V_ALW
PCH_SMB_CLK
PCH_SMB_DATA
+3.3V_ALW
UMA
UMA
DIS
DIS
PCH_SMBDATA 7,18,19,76
PCH_SMBCLK 7,18,19,76
X01 2009/11/06
C2308
C2308
12
COLAY
COLAY
SC12P50V2JN-3GP
SC12P50V2JN-3GP
12
1
4
12
R2308
R2308
10KR2J-3-GP
10KR2J-3-GP
12
R2309
R2309
10KR2J-3-GP
10KR2J-3-GP
23
RN2302
RN2302
SRN2K2J-1-GP
SRN2K2J-1-GP
A A
5
+3.3V_RUN
4
RN2308
RN2308
4 5
3
2
1
SRN10KJ-6-GP
SRN10KJ-6-GP
6
7
PCIE_CLK_RQ1#
8
XDP_DBRESET#
WLAN_CLKREQ#
INT_SERIRQ
XDP_DBRESET# 9,22
INT_SERIRQ 24,37
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
PCH (PCI-E/SMBUS/CLOCK/CL)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
23 92Monday, March 29, 2010
of
23 92Monday, March 29, 2010
of
23 92Monday, March 29, 2010
1
A00
A00
A00
Page 24
5
4
3
2
1
PCH_RTCX1
1 2
R2402 10MR2J-L-GPR2402 10MR2J-L-GP
X2401
X2401
D D
12
C2403
C2403
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
2 3
X-32D768KHZ-65-GP
X-32D768KHZ-65-GP
82.30001.A41
82.30001.A41
PCH_RTCX2
41
12
C2401
C2401
SC15P50V2JN-2-GP
SC15P50V2JN-2-GP
X01 X01
PCH_AZ_CODEC_SYNC30
PCH_SDOUT_CODEC30
C C
+3.3V_RUN
NO REBOOT STRAP
1 2
DY
DY
R2410 1KR2J-1-GP
R2410 1KR2J-1-GP
PCH_AZ_CODEC_BITCLK30
ACZ_SPKR
PCH_AZ_CODEC_RST#30
No Reboot Strap R23
HDA_SPKR
Low = Default
High = No Reboot
For EMI
B B
PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_RST#
EC2402
EC2402
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
1 2
DY
DY
1 2
EC2401
EC2401
SC22P50V2JN-4GP
SC22P50V2JN-4GP
+RTC_CELL
R2401
R2401
1 2
20KR2J-L2-GP
+RTC_CELL
20KR2J-L2-GP
R2403
R2403
1 2
20KR2J-L2-GP
20KR2J-L2-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2404
C2404
12
C2402
C2402
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
X01 20091118 layout swap
RN2403
RN2403
1
2 3
SRN33J-5-GP-U
SRN33J-5-GP-U
RN2402
RN2402
SRN33J-5-GP-U
SRN33J-5-GP-U
1
2 3
ACZ_SYNC_R
4
ACZ_SDATAOUT_R
4
PCH_SPI_CLK62
PCH_SPI_CS0#62
PCH_SPI_DO62
PCH_SPI_DI62
ACZ_RST#_R
ACZ_BIT_CLK
PCH_SPI_CLK
PCH_SPI_CS0#
PCH_SPI_DO
PCH_SPI_DI
21
G2401
G2401
GAP-OPEN
GAP-OPEN
+RTC_CELL
TP2404TPAD14-GP TP2404TPAD14-GP
TP2405TPAD14-GP TP2405TPAD14-GP
TP2406TPAD14-GP TP2406TPAD14-GP
TP2407TPAD14-GP TP2407TPAD14-GP
TP2408TPAD14-GP TP2408TPAD14-GP
R2413 15R2J-GPR2413 15R2J-GP
1 2
R2414 15R2J-GPR2414 15R2J-GP
1 2
1 2
R2415 0R2J-2-GP
R2415 0R2J-2-GP
R2416 15R2J-GPR2416 15R2J-GP
1 2
INTVRMEN- Integrated SUS
1.1V VRM Enable
High - Enable internal VRs
R2407
R2407
1M1R2J-GP
1M1R2J-GP
R2404 330KR2F-L-GPR2404 330KR2F-L-GP
ACZ_SPKR30
PCH_SDIN_CODEC30
ME_UNLOCK#37
DY
DY
12
1 2
ACZ_RST#_R
ACZ_SDATAOUT_R
1
1
1
1
1
PCH_RTCX1
PCH_RTCX2
PCH_RTCRST#
SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
ACZ_BIT_CLK
ACZ_SYNC_R
PCH_JTAG_TCK
PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#
SPI_CLK_R
SPI_CS#0_R
SPI_CS1#
SPI_MOSI_R
SSID = PCH
U2001A
U2001A
B13
RTCX1
D13
RTCX2
C14
RTCRST#
D17
SRTCRST#
A16
INTRUDER#
A14
INTVRMEN
A30
HDA_BCLK
D29
HDA_SYNC
P1
SPKR
C30
HDA_RST#
G30
HDA_SDIN0
F30
HDA_SDIN1
E32
HDA_SDIN2
F32
HDA_SDIN3
B29
HDA_SDO
H32
HDA_DOCK_EN#/GPIO33
J30
HDA_DOCK_RST#/GPIO13
M3
JTAG_TCK
K3
JTAG_TMS
K1
JTAG_TDI
J2
JTAG_TDO
J4
TRST#
BA2
SPI_CLK
AV3
SPI_CS0#
AY3
SPI_CS1#
AY1
SPI_MOSI
AV1
SPI_MISO
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
RTCIHDA
RTCIHDA
SPI JTAG
SPI JTAG
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LDRQ1#/GPIO23
LPC
LPC
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA3RXN
SATA3RXP
SATA3TXN
SATA3TXP
SATA4RXN
SATA4RXP
SATA4TXN
SATA
SATA
SATA4TXP
SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP
SATAICOMPO
SATAICOMPI
SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19
1 OF 10
1 OF 10
LDRQ0#
SERIRQ
LPC_LAD[0..3]
LPC_LAD0
D33
LPC_LAD1
B33
LPC_LAD2
C32
LPC_LAD3
A32
C34
A34
F34
AB9
LPC_LFRAME# 37,70
INT_SERIRQ 23,37
x01 Change tolerant 20091117
AK7
AK6
AK11
AK9
AH6
AH5
AH9
AH8
AF11
AF9
AF7
AF6
AH3
AH1
AF3
AF1
AD9
AD8
AD6
AD5
AD3
AD1
AB3
AB1
AF16
AF15
T3
Y9
V1
SATA_TXN0_C
SATA_TXP0_C
SATA_TXN1_C
SATA_TXP1_C
SATA_TXN4_C
SATA_TXP4_C
C2409 SCD01U16V2KX-3GPC2409 SCD01U16V2KX-3GP
1 2
C2410 SCD01U16V2KX-3GPC2410 SCD01U16V2KX-3GP
1 2
C2405 SCD01U16V2KX-3GPC2405 SCD01U16V2KX-3GP
1 2
C2406 SCD01U16V2KX-3GPC2406 SCD01U16V2KX-3GP
1 2
C2407 SCD01U16V2KX-3GPC2407 SCD01U16V2KX-3GP
1 2
C2408 SCD01U16V2KX-3GPC2408 SCD01U16V2KX-3GP
1 2
R2412
SATAICOMP
SATA_DET#0_R
SATA_DET#1_R
R2412
1 2
37D4R2F-GP
37D4R2F-GP
SATA_LED# 66
+1.05V_VTT
LPC_LAD[0..3] 37,70
+3.3V_RUN
4
RN2401
RN2401
SRN10KJ-5-GP
SRN10KJ-5-GP
1
2 3
SATA_RXN0_C 59
SATA_RXP0_C 59
SATA_TXN0 59
SATA_TXP0 59
SATA_RXN1_C 59
SATA_RXP1_C 59
SATA_TXN1 59
SATA_TXP1 59
SATA_RXN4_C 76
SATA_RXP4_C 76
SATA_TXN4 76
SATA_TXP4 76
HDD
ODD
ESATA
x01 Change tolerant 20091117
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
PCH (SPI/RTC/LPC/SATA/IHDA)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
24 92Monday, March 29, 2010
of
24 92Monday, March 29, 2010
of
24 92Monday, March 29, 2010
1
A00
A00
A00
Page 25
5
4
3
2
1
SSID = PCH
6 OF 10
U2001F
U2001F
S_GPIO
SIO_EXT_SCI#37
D D
RN2502
PCH_GPIO22
PCH_GPIO37
PCH_GPIO36
PCH_GPIO48
C C
B B
+3.3V_RUN
PCH_GPIO39
STP_PCI#
SRN100KJ-6-GP
SRN100KJ-6-GP
PCH_GPIO17
PCH_GPIO6
SIO_EXT_SCI#
SIO_EXT_WAKE#
PCH_GPIO24
PCH_GPIO12
SIO_EXT_SMI#
PCH_GPIO28
HOST_ALTERT#1
+3.3V_ALW
RN2502
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
RN2503
RN2503
4
RN2504
RN2504
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
R2515 100KR2J-1-GP
R2515 100KR2J-1-GP
RN2501
RN2501
1
2
3
4
5 6
SRN10KJ-L3-GP
SRN10KJ-L3-GP
DY
DY
1
23
8
7
6
+3.3V_RUN
SIO_EXT_WAKE#37
SC47P50V2JN-3GP
SC47P50V2JN-3GP
+3.3V_RUN
10
PCH_GPIO38
9
DGPU_HOLD_RST#
8
7
12
10
9
8
7
S_GPIO
PCH_TEMP_ALERT#_C
S3_RST_GATE#9
+3.3V_ALW
S3_RST_GATE#
PCH_GPIO45
PCH_GPIO57
C2501
C2501
DY
DY
SC47P50V2JN-3GP
SC47P50V2JN-3GP
PCH_TEMP_ALERT#37
12
SIO_EXT_SMI#37
PCH_GPIO22
C2502
C2502
12
DY
DY
1 2
1 2
C2503 SCD047U16V2KX-1-GPC2503 SCD047U16V2KX-1-GP
PCH_GPIO11 23
R2508
R2508
10KR2J-3-GP
10KR2J-3-GP
TP2502TPAD14-GP TP2502TPAD14-GP
R2510
R2510
1 2
0R0402-PAD
0R0402-PAD
X02-20091222
TP2503TPAD14-GP TP2503TPAD14-GP
TP2504TPAD14-GP TP2504TPAD14-GP
TP2505TPAD14-GP TP2505TPAD14-GP
TP2507TPAD14-GP TP2507TPAD14-GP
SIO_EXT_SCI#
PCH_GPIO6
SIO_EXT_WAKE#
SIO_EXT_SMI#
PCH_GPIO12
HOST_ALTERT#1
DGPU_HOLD_RST#
PCH_GPIO17
PCH_GPIO24
PCH_GPIO27
1
PCH_GPIO28
STP_PCI#
CLK_SATA_OE#
PCH_GPIO36
PCH_GPIO37
PCH_GPIO38
PCH_GPIO39
PCH_GPIO45
PCH_GPIO48
PCH_TEMP_ALERT#_C
PCH_GPIO57
PCH_NCTF_1
1
PCH_NCTF_2
1
PCH_NCTF_3
1
PCH_NCTF_4
1
Y3
BMBUSY#/GPIO0
C38
TACH1/GPIO1
D37
TACH2/GPIO6
J32
TACH3/GPIO7
F10
GPIO8
K9
LAN_PHY_PWR_CTRL/GPI O12
T7
GPIO15
AA2
SATA4GP/GPIO16
F38
TACH0/GPIO17
Y7
SCLOCK/GPIO22
H10
GPIO24
AB12
GPIO27
V13
GPIO28
M11
STP_PCI#/GPIO34
V6
SATACLKREQ#/GPIO35
AB7
SATA2GP/GPIO36
AB13
SATA3GP/GPIO37
V3
SLOAD/GPIO38
P3
SDATAOUT0/GPIO39
H3
PCIECLKRQ6#/GPIO45
F1
PCIECLKRQ7#/GPIO46
AB6
SDATAOUT1/GPIO48
AA4
SATA5GP/GPIO49
F8
GPIO57
A4
VSS_NCTF_1
A49
VSS_NCTF_2
A5
VSS_NCTF_3
A50
VSS_NCTF_4
A52
VSS_NCTF_5
A53
VSS_NCTF_6
B2
VSS_NCTF_7
B4
VSS_NCTF_8
B52
VSS_NCTF_9
B53
VSS_NCTF_10
BE1
VSS_NCTF_11
BE53
VSS_NCTF_12
BF1
VSS_NCTF_13
BF53
VSS_NCTF_14
BH1
VSS_NCTF_15
BH2
VSS_NCTF_16
BH52
VSS_NCTF_17
BH53
VSS_NCTF_18
BJ1
VSS_NCTF_19
BJ2
VSS_NCTF_20
BJ4
VSS_NCTF_21
BJ49
VSS_NCTF_22
BJ5
VSS_NCTF_23
BJ50
VSS_NCTF_24
BJ52
VSS_NCTF_25
BJ53
VSS_NCTF_26
D1
VSS_NCTF_27
D2
VSS_NCTF_28
D53
VSS_NCTF_29
E1
VSS_NCTF_30
E53
VSS_NCTF_31
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
MISC
MISC
CLKOUT_BCLK0_N/CLKOUT_PCIE8N
CLKOUT_BCLK0_P/CLKOUT_PCIE8P
GPIO
GPIO
CPU
CPU
NCTF
NCTF
RSVD
RSVD
6 OF 10
CLKOUT_PCIE6N
CLKOUT_PCIE6P
CLKOUT_PCIE7N
CLKOUT_PCIE7P
A20GATE
PECI
RCIN#
PROCPWRGD
THRMTRIP#
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5
INIT3_3V#
TP24
TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
AH45
AH46
AF48
AF47
U2
AM3
AM1
BG10
T1
BE10
BD10
BA22
AW22
BB22
AY45
AY46
AV43
AV45
AF13
M18
N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39
P6
C10
INIT3_3V#
BCLK_CPU_N 9
BCLK_CPU_P 9
H_PECI 9
SIO_RCIN# 37
1
H_PWRGD 9,42
TP2506TPAD14-GPTP2506TPAD14-GP
PCH_THERMTRIP_R
SIO_A20GATE 37
+1.05V_VTT
1 2
R2506 54D9R2F-L1-GPR2506 54D9R2F-L1-GP
1 2
Placed Within 2" from PCH
R2504
R2504
56R2J-4-GP
56R2J-4-GP
H_THERMTRIP# 9,37,42,82
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet
Date: Sheet
PCH (GPIO/CPU)
PCH (GPIO/CPU)
PCH (GPIO/CPU)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
25 92Monday, March 29, 2010
of
25 92Monday, March 29, 2010
of
25 92Monday, March 29, 2010
1
A00
A00
A00
Page 26
5
4
3
2
1
SSID = PCH
DIS
DIS
1 2
R2601 0R2J-2-GP
+1.05V_VTT
1.524A
SC10U6D3V5KX-1GP
D D
SC10U6D3V5KX-1GP
C2602
C2602
12
12
C2601
C2601
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
x01 change tolerant 20091117
+1.05V_VTT
TP2602 TPAD14-GPTP2602 TPAD14-GP
1
C C
+1.05V_VTT
3.208A
x01 change tolerant 20091117
12
C2614
C2614
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
UMA
UMA
12
C2615
C2615
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2616
C2616
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
UMA
UMA
12
C2617
C2617
x01 change tolerant 20091117
C2621
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
B B
+1.05V_VTT
C2621
TP2601
TP2601
VCCAPLLEXP
12
C2618
C2618
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+3.3V_RUN
12
357mA
VCCAFDI_VRM
VCCFDIPLL
1
TPAD14-GP
TPAD14-GP
U2001G
U2001G
AB24
VCCCORE
AB26
VCCCORE
AB28
VCCCORE
AD26
VCCCORE
AD28
VCCCORE
AF26
VCCCORE
AF28
VCCCORE
AF30
VCCCORE
AF31
VCCCORE
AH26
VCCCORE
AH28
VCCCORE
AH30
VCCCORE
AH31
VCCCORE
AJ30
VCCCORE
AJ31
VCCCORE
AK24
VCCIO
BJ24
VCCAPLLEXP
AN20
VCCIO
AN22
VCCIO
AN23
VCCIO
AN24
VCCIO
AN26
VCCIO
AN28
VCCIO
BJ26
VCCIO
BJ28
VCCIO
AT26
VCCIO
AT28
VCCIO
AU26
VCCIO
AU28
VCCIO
AV26
VCCIO
AV28
VCCIO
AW26
VCCIO
AW28
VCCIO
BA26
VCCIO
BA28
VCCIO
BB26
VCCIO
BB28
VCCIO
BC26
VCCIO
BC28
VCCIO
BD26
VCCIO
BD28
VCCIO
BE26
VCCIO
BE28
VCCIO
BG26
VCCIO
BG28
VCCIO
BH27
VCCIO
AN30
VCCIO
AN31
VCCIO
AN35
VCC3_3
AT22
VCCVRM[1]
BJ18
VCCFDIPLL
AM23
VCCIO
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
POWER
POWER
VCC CORE
VCC CORE
DMI
DMI
PCI E*
PCI E*
NAND / SPI
NAND / SPI
FDI
FDI
CRTLVDS
CRTLVDS
HVCMOS
HVCMOS
7 OF 10
7 OF 10
VCCADAC
VCCADAC
VSSA_DAC
VSSA_DAC
VCCALVDS
VSSA_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCCTX_LVDS
VCC3_3
VCC3_3
VCC3_3
VCCVRM
VCCDMI
VCCDMI
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCPNAND
VCCME3_3
VCCME3_3
VCCME3_3
VCCME3_3
AE50
AE52
AF53
AF51
AH38
AH39
AP43
AP45
AT46
AT45
AB34
AB35
AD35
AT24
AT16
AU16
AM16
AK16
AK20
AK19
AK15
AK13
AM12
AM13
AM15
AM8
AM9
AP11
AP9
+VCCA_DAC_1_2
+VCCA_DAC_1_2
12
C2603
C2603
UMA
UMA
DIS
DIS
1 2
R2604 0R2J-2-GP
R2604 0R2J-2-GP
+1.8VS_VCCTX_LVDS
R2605
R2605
DIS
DIS
1 2
0R2J-2-GP
0R2J-2-GP
12
C2611
C2611
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
35mA
+1.05VS_VCC_DMI
12
C2619
C2619
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2620
C2620
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCH_VCCME3_3
12
C2623
C2623
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
69mA
12
C2604
C2604
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+3VS_VCCA_LVD
SCD01U16V2KX-3GP
12
C2607
C2607
UMA
UMA
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
357mA
156mA
85mA
12
C2605
C2605
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
UMA
UMA
C2606
C2606
1 2
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2608
C2608
UMA
UMA
+3.3V_RUN
+1.8V_RUN
DY
DY
12
X02-20091222
R2606
R2606
1 2
0R0402-PAD
0R0402-PAD
+V_NVRAM_VCCQ
+3.3V_RUN
X02-20091222
12
R2609
R2609
0R0402-PAD
0R0402-PAD
1 2
L2602 HCB1608KF-181-GP
L2602 HCB1608KF-181-GP
R2603 0R3J-0-U-GP
R2603 0R3J-0-U-GP
UMA
UMA
1 2
R2611 0R5J-5-GP
R2611 0R5J-5-GP
C2609
C2609
X01 Change location-20091116
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
61mA
R2601 0R2J-2-GP
+3.3V_CRT_LDO
UMA
UMA
UMA
UMA
300mA
12
59mA
+1.05V_VTT
A00-20100204
UMA
UMA
1 2
R2602 0R2J-2-GP
R2602 0R2J-2-GP
+3.3V_RUN
+1.8V_RUN
+5V_RUN +3.3V_CRT_LDO
C2612
C2612
SC1U10V2KX-1GP
SC1U10V2KX-1GP
+1.8V_RUN
12
R2607
R2607
0R0402-PAD
0R0402-PAD
+3.3V_RUN
3.3V CRT LDO
U2601
U2601
12
DY
DY
VIN3VOUT
2
GND
1
EN
RT9198-33PBG-GP
RT9198-33PBG-GP
DY
DY
NC#5
4
5
DY
DY
Second 74.09091.H3F
x01 change tolerant 20091117
+3.3V_RUN
12
R2608
R2608
DY
DY
0R2J-2-GP
0R2J-2-GP
12
C2613
C2613
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
X02-20091222
R2610
4
R2610
1 2
0R0402-PAD
0R0402-PAD
VCCAFDI_VRM
A A
5
+1.8V_RUN
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
2
Date: Sheet
PCH (POWER1)
PCH (POWER1)
PCH (POWER1)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
26 92Wednesday, February 10, 2010
of
26 92Wednesday, February 10, 2010
of
26 92Wednesday, February 10, 2010
1
A00
A00
A00
Page 27
5
4
3
2
1
10 OF 10
HDA
HDA
10 OF 10
VCCIO
VCCIO
VCCIO
VCCIO
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCIO
V5REF_SUS
V5REF
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCCSATAPLL
VCCSATAPLL
VCCIO
VCCVRM
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCME
VCCME
VCCME
VCCME
VCCSUSHDA
V24
V26
Y24
Y26
V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26
U23
V23
F24
K49
J38
L38
M36
N36
P36
U35
AD13
AK3
AK1
AH22
AT20
AH19
AD20
AF22
AD19
AF20
AF19
AH20
AB19
AB20
AB22
AD22
AA34
Y34
Y35
AA35
L30
+VCCSUSHDA
12
C2705
C2705
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DY
DY
x01 change tolerant 20091117
12
C2706
C2706
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+3.3V_ALW
x01 change tolerant 20091117
+5VALW_PCH_VCC5REFSUS
+5VS_PCH_VCC5REF
12
C2718
C2718
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117
VCCSATAPLL
1
TPAD14-GP
TPAD14-GP
+1.8V_RUN
X02-20091222
R2703
R2703
1 2
0R0402-PAD
0R0402-PAD
12
C2733
C2733
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
POWER
U2001J
U2001J
TP2701
TP2701
D D
x01 change tolerant 20091117
+1.05V_VTT
C2707
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
+1.05V_VTT
C C
X01 20091121
L2702
L2702
1 2
IND-10UH-218-GP
IND-10UH-218-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
L2703
L2703
1 2
IND-10UH-218-GP
IND-10UH-218-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
+1.05VS_VCCA_A_DPL
12
C2711
C2711
DY
DY
+1.05VS_VCCA_B_DPL
12
C2716
C2716
DY
DY
12
C2707
C2712
C2712
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2717
C2717
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1.998A
12
12
DY
DY
x01 change tolerant
20091118
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
72mA
73mA
+1.05V_VTT
x01 change tolerant 20091117
12
C2720
C2720
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
B B
x01 change tolerant 20091117
C2725
C2725
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+3.3V_ALW
+1.05V_VTT
163mA
12
C2728
C2728
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117
1mA
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
A A
+RTC_CELL
C2721
C2721
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
+3.3V_RUN
12
C2730
C2730
2mA
VCCACLK
1
TPAD14-GP
TPAD14-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2704
C2704
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C2710
C2710
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2714
C2714
+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+VCCSST
+1.05VALW_INT_VCCSUS
12
C2726
C2726
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2729
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2729
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2731
C2731
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2734
C2734
DCPSUSBYP
12
C2703
C2703
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C2708
C2708
12
DY
DY
+VCCRTCEXT
+1.8V_RUN
C2722
C2722
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2732
C2732
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C2735
C2735
AP51
VCCACLK
AP53
VCCACLK
AF23
VCCLAN
AF24
VCCLAN
Y20
DCPSUSBYP
AD38
VCCME
AD39
VCCME
AD41
VCCME
AF43
VCCME
AF41
VCCME
AF42
VCCME
V39
VCCME
V41
VCCME
V42
VCCME
Y39
VCCME
Y41
VCCME
Y42
VCCME
V9
DCPRTC
AU24
VCCVRM
BB51
VCCADPLLA
BB53
VCCADPLLA
BD51
VCCADPLLB
BD53
VCCADPLLB
AH23
VCCIO
AJ35
VCCIO
AH35
12
VCCIO
AF34
VCCIO
AH34
VCCIO
AF32
VCCIO
V12
DCPSST
Y22
DCPSUS
P18
VCCSUS3_3
U19
VCCSUS3_3
U20
VCCSUS3_3
U22
VCCSUS3_3
V15
VCC3_3
V16
VCC3_3
Y16
VCC3_3
AT18
V_CPU_IO
AU18
V_CPU_IO
A12
VCCRTC
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
POWER
USB
USB
Clock and Miscellaneous
Clock and Miscellaneous
PCI/GPIO/LPC
PCI/GPIO/LPC
SATA
SATA
PCI/GPIO/LPC
PCI/GPIO/LPC
CPU
CPU
RTC
RTC
x01 change tolerant 20091117
5
4
3
+1.05V_VTT
+3.3V_ALW
+3.3V_ALW
12
C2709
C2709
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP2702
TP2702
+1.05V_VTT
+3.3V_RUN
12
21
D2701
D2701
CH751H-40PT-GP
CH751H-40PT-GP
R2702 10R2J-2-GPR2702 10R2J-2-GP
12
C2713
C2713
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C2719
C2719
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
x01 change tolerant 20091117
12
C2727
C2727
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.05V_VTT
<Core Design>
<Core Design>
6mA
+3.3V_ALW
2
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
+5V_ALW
12
C2715
C2715
SC1U10V2KX-1GP
SC1U10V2KX-1GP
+3.3V_RUN
+1.05V_VTT
PCH (POWER2)
PCH (POWER2)
PCH (POWER2)
Berry
Berry
Berry
SSID = PCH
+3.3V_RUN
21
D2702
D2702
CH751H-40PT-GP
CH751H-40PT-GP
1 2
R2701 10R2J-2-GPR2701 10R2J-2-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
27 92Wednesday, February 10, 2010
27 92Wednesday, February 10, 2010
27 92Wednesday, February 10, 2010
1
of
of
of
+5V_RUN
A00
A00
A00
Page 28
5
4
3
2
1
SSID = PCH
D D
C C
B B
A A
5
U2001H
U2001H
AB16
VSS
AA19
VSS
AA20
VSS
AA22
VSS
AM19
VSS
AA24
VSS
AA26
VSS
AA28
VSS
AA30
VSS
AA31
VSS
AA32
VSS
AB11
VSS
AB15
VSS
AB23
VSS
AB30
VSS
AB31
VSS
AB32
VSS
AB39
VSS
AB43
VSS
AB47
VSS
AB5
VSS
AB8
VSS
AC2
VSS
AC52
VSS
AD11
VSS
AD12
VSS
AD16
VSS
AD23
VSS
AD30
VSS
AD31
VSS
AD32
VSS
AD34
VSS
AU22
VSS
AD42
VSS
AD46
VSS
AD49
VSS
AD7
VSS
AE2
VSS
AE4
VSS
AF12
VSS
Y13
VSS
AH49
VSS
AU4
VSS
AF35
VSS
AP13
VSS
AN34
VSS
AF45
VSS
AF46
VSS
AF49
VSS
AF5
VSS
AF8
VSS
AG2
VSS
AG52
VSS
AH11
VSS
AH15
VSS
AH16
VSS
AH24
VSS
AH32
VSS
AV18
VSS
AH43
VSS
AH47
VSS
AH7
VSS
AJ19
VSS
AJ2
VSS
AJ20
VSS
AJ22
VSS
AJ23
VSS
AJ26
VSS
AJ28
VSS
AJ32
VSS
AJ34
VSS
AT5
VSS
AJ4
VSS
AK12
VSS
AM41
VSS
AN19
VSS
AK26
VSS
AK22
VSS
AK23
VSS
AK28
VSS
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
8 OF 10
8 OF 10
4
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47
U2001I
U2001I
AY7
VSS
B11
VSS
B15
VSS
B19
VSS
B23
VSS
B31
VSS
B35
VSS
B39
VSS
B43
VSS
B47
VSS
B7
VSS
BG12
VSS
BB12
VSS
BB16
VSS
BB20
VSS
BB24
VSS
BB30
VSS
BB34
VSS
BB38
VSS
BB42
VSS
BB49
VSS
BB5
VSS
BC10
VSS
BC14
VSS
BC18
VSS
BC2
VSS
BC22
VSS
BC32
VSS
BC36
VSS
BC40
VSS
BC44
VSS
BC52
VSS
BH9
VSS
BD48
VSS
BD49
VSS
BD5
VSS
BE12
VSS
BE16
VSS
BE20
VSS
BE24
VSS
BE30
VSS
BE34
VSS
BE38
VSS
BE42
VSS
BE46
VSS
BE48
VSS
BE50
VSS
BE6
VSS
BE8
VSS
BF3
VSS
BF49
VSS
BF51
VSS
BG18
VSS
BG24
VSS
BG4
VSS
BG50
VSS
BH11
VSS
BH15
VSS
BH19
VSS
BH23
VSS
BH31
VSS
BH35
VSS
BH39
VSS
BH43
VSS
BH47
VSS
BH7
VSS
C12
VSS
C50
VSS
D51
VSS
E12
VSS
E16
VSS
E20
VSS
E24
VSS
E30
VSS
E34
VSS
E38
VSS
E42
VSS
E46
VSS
E48
VSS
E6
VSS
E8
VSS
F49
VSS
F5
VSS
G10
VSS
G14
VSS
G18
VSS
G2
VSS
G22
VSS
G32
VSS
G36
VSS
G40
VSS
G44
VSS
G52
VSS
AF39
VSS
H16
VSS
H20
VSS
H30
VSS
H34
VSS
H38
VSS
H42
VSS
IBEXPEAK-M-GP-NF
IBEXPEAK-M-GP-NF
3
9 OF 10
9 OF 10
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
PCH (VSS)
PCH (VSS)
PCH (VSS)
1
A00
A00
of
28 92Wednesday, February 10, 2010
of
28 92Wednesday, February 10, 2010
of
28 92Wednesday, February 10, 2010
A00
Page 29
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
29 92Wednesday, February 10, 2010
of
29 92Wednesday, February 10, 2010
of
29 92Wednesday, February 10, 2010
A00
A00
A00
Page 30
SSID = AUDIO
5
4
3
2
1
+AVDD
X02-20091222
12
C3006
C3006
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C3011 SC1U10V3KX-3GPC3011 SC1U10V3KX-3GP
12
12
1 2
1 2
AUD_SPK_L+ 60
AUD_SPK_L- 60
AUD_SPK_R- 60
AUD_SPK_R+ 60
12
C3018
C3018
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
C3008
C3008
R3005 60D4R2F-GPR3005 60D4R2F-GP
R3006 60D4R2F-GPR3006 60D4R2F-GP
12
C3002
C3002
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCH_SDIN_CODEC24
PCH_SDOUT_CODEC24
PCH_AZ_CODEC_SYNC24
PCH_AZ_CODEC_RST #24
R3015
R3015
47R2J-2-GP
47R2J-2-GP
C3020
C3020
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+3.3V_RUN
Close to codec
12
C3003
C3003
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
TPAD14-GP
TPAD14-GP
TPAD14-GP
TPAD14-GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
C3004
C3004
1 2
AMP_MUTE#37
X01 20091117
AUD_SENSE_A
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP3001
TP3001
TP3002
TP3002
AUD_AGND
33R2J-2-GPR3001 33R2J-2-GPR3001
C3014
C3014
+AVDD
Close to codec
AUD_DVDDCORE
12
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PCH_AZ_CODEC_BITCL K
PCH_SDIN_CODEC_C0
PCH_SDOUT_CODEC
PCH_AZ_CODEC_SYNC
PCH_AZ_CODEC_RST #
AUD_DMIC_CLK
1
AUD_DMIC_IN0
1
AMP_MUTE#
PUMP_CAPN
12
PUMP_CAPP
12
R3018
R3018
2K49R2F-GP
2K49R2F-GP
12
C3019
C3019
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
Close to Pin13
C3001
C3001
AUD_AGND
U3001
U3001
1
DVDD_CORE
9
DVDD
3
DVDD_IO
6
HDA_BITCLK
8
HDA_SDI
5
HDA_SDO
10
HDA_SYNC
11
HDA_RST#
2
DMIC_CLK/GPIO1
4
DMIC 0/GPIO2
46
DMIC1/GPIO0/SPDIF_OUT_1
48
SPDIF_OUT_0
47
EAPD
35
CAP-
36
CAP+
7
DVSS
33
AVSS
30
AVSS
26
AVSS
42
PVSS
49
GND
92HD79B1A5NLGXTAX-GP
92HD79B1A5NLGXTAX-GP
X01 will change to 92HD79B1
P/N:71.92H79.003
R3016
R3016
20KR2F-L-GP
20KR2F-L-GP
1 2
R3022
R3022
39K2R2F-L-GP
39K2R2F-L-GP
12
VREFOUT _A_OR_F
SPKR_PORT_D_L+
SPKR_PORT_D_L-
SPKR_PORT_D_R-
SPKR_PORT_D_R+
AUD_HP1_JD# 60
EXT_MIC_JD# 60
HP0_PORT_A_L
HP0_PORT_A_R
HP1_PORT_B_L
HP1_PORT_B_R
VREFOUT _C
AVDD
AVDD
PVDD
PVDD
SENSE_A
SENSE_B
PORT_C_L
PORT_C_R
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
PC_BEEP
MONO_OUT
CAP2
VREFFILT
VREG
27
38
39
45
13
14
28
29
23
AUD_HP1_JACK_L
31
AUD_HP1_JACK_R
32
AUD_INT_MIC_R_L
19
20
24
40
41
43
44
15
16
17
18
12
25
22
21
34
V-
37
AUD_SENSE_B
Close to Pin14
C3005
C3005
x01 change tolerant 20091117
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AUD_AGND
AUD_SENSE_AAUD_SENSE_A
AUD_SENSE_BAUD_SENSE_B
X01 Change 0603 part-20091116
AUD_EXT_MIC_LAUD_EXT _MIC_L
AUD_EXT_MIC_RAUD_EXT_MIC_R
AUD_VREFOUT_B
AUD_VREFOUT_C
AUD_SPK_L+
AUD_SPK_L-AUD_SPK_L-
AUD_SPK_RAUD_SPK_R+AUD_SPK_R+
AUD_CAP2
AUD_VREFFLT
AUD_V_B
AUD_VREG
C3021 SC1U10V3KX-3GPC3021 SC1U10V3KX-3GP
C3022 SC1U10V3KX-3GPC3022 SC1U10V3KX-3GP
R3007 2K2R2J-2-GPR3007 2K2R2J-2-GP
AUD_PC_BEEP
AUD_PC_BEEP
Trace width>15 mils
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C3017
C3017
12
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
Close to codec
+AVDD
12
R3019
R3019
2K49R2F-GP
2K49R2F-GP
12
R3021
R3021
20KR2F-L-GP
20KR2F-L-GP
AUD_AGND
D D
PCH_AZ_CODEC_BITCL K
12
C3007
C3007
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN
12
R3008
R3008
10KR2J-3-GP
C C
B B
10KR2J-3-GP
AMP_MUTE#
AUD_VREFOUT_B
$]DOLD,)(0,
PCH_SDOUT_CODEC
+3.3V_RUN
1 2
x01 change tolerant 20091117
PCH_AZ_CODEC_BITCL K24
12
C3023
C3023
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
DY
DY
PCH_AZ_CODEC_SDOUT1
12
DY
DY
+5V_RUN
R3002
R3002
1 2
0R0603-PAD
0R0603-PAD
12
12
C3009
C3009
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AUD_AGND
MIC_IN_L 60
MIC_IN_R 60
1 2
1 2
AUD_VREFOUT_B 60
close to audio jack
x01 change tolerant 20091117
C3012
C3012
G3001
G3001
DUMMY-C 2
DUMMY-C 2
1 2
12
C3016
C3016
C3015
C3015
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
X02-20091222
X02-20091222
+PVDD
C3010
C3010
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
INT_MIC_L_R 60
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C3013
C3013
R3014
R3014
0R0603-PAD
0R0603-PAD
R3017
R3017
0R0603-PAD
0R0603-PAD
R3020
R3020
0R0603-PAD
0R0603-PAD
R3003
R3003
1 2
0R0603-PAD
0R0603-PAD
R3004
R3004
1 2
0R0603-PAD
0R0603-PAD
12
12
12
+5V_RUN
AUD_HP1_JACK_L2 60
AUD_HP1_JACK_R2 60
SB_SPKR_R
KBC_BEEP_R
AUD_AGND
Check
R3009
R3009
120KR2J-L-GP
120KR2J-L-GP
1 2
1 2
R3010
R3010
470KR2J-2-GP
470KR2J-2-GP
From SB
ACZ_SPKR 2 4
KBC_BEEP 37
From EC
x01 change tolerant 20091117
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Tai wan, R.O.C.
Taipei Hsien 221, Tai wan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Audio Codec 92HD81B1
Audio Codec 92HD81B1
Audio Codec 92HD81B1
Custom
Custom
Custom
Berry
Berry
Berry
Taipei Hsien 221, Tai wan, R.O.C.
30 92Monday, March 29, 2010
30 92Monday, March 29, 2010
1
30 92Monday, March 29, 2010
A00
A00
A00
of
of
of
Page 31
5
D D
4
3
2
1
(Blanking)
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
31 92Wednesday, February 10, 2010
of
31 92Wednesday, February 10, 2010
of
31 92Wednesday, February 10, 2010
A00
A00
A00
Page 32
5
D D
4
3
2
1
(Blanking)
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Reserved
Reserved
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
Reserved
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
32 92Wednesday, February 10, 2010
32 92Wednesday, February 10, 2010
32 92Wednesday, February 10, 2010
1
A00
A00
A00
Page 33
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
33 92Wednesday, February 10, 2010
of
33 92Wednesday, February 10, 2010
of
33 92Wednesday, February 10, 2010
A00
A00
A00
Page 34
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
34 92Wednesday, February 10, 2010
of
34 92Wednesday, February 10, 2010
of
34 92Wednesday, February 10, 2010
A00
A00
A00
Page 35
A
4 4
3 3
B
C
D
E
(Blanking)
2 2
1 1
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
E
of
35 92Wednesday, February 10, 2010
of
35 92Wednesday, February 10, 2010
of
35 92Wednesday, February 10, 2010
A00
A00
A00
Page 36
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
36 92Wednesday, February 10, 2010
of
36 92Wednesday, February 10, 2010
of
36 92Wednesday, February 10, 2010
A00
A00
A00
Page 37
5
X01 20091111
+KBC_PWR
12
D D
x01 change tolerant 20091118
X01 change location
X01 20091111
VDDPWRGOOD_KBC9
PH for Discrete
Internal PL for UMA
+KBC_PWR
A00-20100203
C C
R3727
R3727
10KR2J-3-GP
10KR2J-3-GP
PCB_VER0
PCB_VER1
PCB_VER2
R3731
R3731
10KR2J-3-GP
10KR2J-3-GP
A00-20100125
B B
R3701
R3701
12
DY
DY
0R2J-2-GP
0R2J-2-GP
12
R3702 0R0603-PADR3702 0R0603-PAD
12
12
DY
DY
C3706
C3701
C3701
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
+3.3V_RUN
12
12
DY
DY
C3704
C3704
KB_LED_BL_DET68
C3706
C3705
C3705
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
A00-20100301
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117
R3715
R3715
12
DIS
DIS
2K2R2J-2-GP
2K2R2J-2-GP
PLTRST_DELAY#80
3V_5V_POK46
PM_PWROK22
EC_SPI_WP#_R62
BLON_OUT54
IMVP_VR_ON47
PSID_DISABLE#76
GFX_CORE_EN89
ME_UNLOCK#24
R3728
10KR2J-3-GP
R3728
10KR2J-3-GP
12
12
R3729
R3729
DY
DY
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
10KR2J-3-GP
12
12
R3733
R3733
R3732
R3732
9*$675$3
80$
3DUN
0
*3,2
RSWLRQ
0DGLVDQ
X02-20091222
12
12
C3707
C3707
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP3704TP3704
THERMTRIP_VGA#82
SUS_PWR_DN_ACK22
3.3V_RUN_VGA_EN90
PM_SLP_S3#22,42,47,50,51,89
LID_CLOSE#69
1.0V_RUN_VGA_EN90
PWR_BTN_LED#66
WHITE_LED#_KBC66
PCH_RSMRST#22
PM_SLP_S4#22,50
USB_PWR_EN#63
10KR2J-3-GP
10KR2J-3-GP
0%9(56,21
,'
$
;
;
$
*3,2
+3.3V_RTC_LDO
12
12
C3710
C3709
C3709
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
A00-20100202
1 2
DY
DY
KBC_GPIO91
1
DISCRETE_ID
KBC_THERMTRIP#
KBC_PWRBTN_EC#
AC_IN#_KBC
PCB_VER0
KBC_BIOS_ID
PCB_VER1
EC_ENABLE#
9(5
C3710
C3708
C3708
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AD_IA45
C3715 SCD1U10V2KX-5G P
C3715 SCD1U10V2KX-5G P
PSID_EC76
PWRLED#66
9(5
CAP close to VCC-GND pin pair
VBAT
12
88
115
U3701A
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCB_VER2
U3701A
104
VREF
97
GPI90/AD0
98
GPI91/AD1
99
GPI92/AD2
100
GPI93/AD3
108
GPIO05
96
GPIO04
101
GPI94
105
GPI95
106
GPI96
107
GPI97
64
GPIO01/TB2
95
GPIO03
93
GPIO06
94
GPIO07
119
GPIO23
6
GPIO24
109
GPIO30
120
GPIO31
65
GPIO32/D_PWM
66
GPIO33/H_PWM
16
GPIO40/F_PWM
17
GPIO42/TCK
20
GPIO43/TMS
21
GPIO44/TDI
22
GPIO45/E_PWM
23
GPIO46/TRST#
24
GPIO47
25
GPIO50/TDO
26
GPIO51
27
GPIO52/RDY#
28
GPIO53
73
GPIO70
74
GPIO71
75
GPIO72
110
GPO82/TRIS#
NPCE781BA0DX-GP
NPCE781BA0DX-GP
VCC19VCC46VCC76VCC
VCC
A/D
A/D
D/A
D/A
GPIO
GPIO
116
9(5
For EMI
PM_PWROK PCLK_KBC
12
EC3702
EC3702
SC470P50V2JN-GP
SC470P50V2JN-GP
DY
DY
4
x01 change tolerant 20091118
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4
102
80
1 OF 2
1 OF 2
VDD
AVCC
GPIO41
GPIO10/LPCPD#
LRESET#
LCLK
LFRAME#
LAD0
LAD1
LPC
LPC
SMB
SMB
SP
SP
SPI
SPI
GPO83/SOUT_CR/BADDR1
SER/IR
SER/IR
GND5GND18GND45GND78GND89GND
SERIRQ
GPIO11/CLKRUN#
KBRST#
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#
GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1
GPIO66/G_PWM
GPIO77
GPIO76/SHBM
GPIO75
GPIO81
GPIO87/SIN_CR
GPO84/BADDR0
GPIO16
GPIO34
GPIO36
VCORF
AGND
103
12
EC3703
EC3703
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
X02-20100105
LAD2
LAD3
GA20
THERMTRIP_VGA_GATE82
124
7
2
3
126
127
128
1
125
8
122
121
29
9
123
68
67
69
70
81
84
83
82
91
111
113
112
114
14
15
44
C3702
C3702
+3.3V_RUN
KBC_VCORF
12
12
C3703
C3703
DY
DY
SC2D2U6D3V3KX-G P
SC2D2U6D3V3KX-G P
PLT_RST1#_1
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
ECSCI#_KBC
ECSWI#_KBC
1 2
UMA
UMA
R3714 10KR2F-2-GP
R3714 10KR2F-2-GP
1.8V_VGA_RUN_EN 90
ECSMI#_KBC
1.05VTT_PWRG D_KBC
S5_ENABLE 42
12
C3712
C3712
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
PCH_SUSCLK_KBC22
A00-20100203
KB_BL_CTRL68
R3746 0R0402-PADR3746 0R0402-PAD
EC_SPI_DI62
EC_SPI_DO62
EC_SPI_CS#62
EC_SPI_CLK62
THERM_SDA39
BAT_IN# 44
PCH_TEMP_ALERT# 25
PCLK_KBC 21
LPC_LFRAME# 24,70
LPC_LAD[0..3] 24,70
INT_SERIRQ 23,24
PM_CLKRUN# 22
SIO_RCIN# 25
SIO_A20GATE 25
PANEL_BLEN 55
KBC_SDA1 23
KBC_SCL1 23
BAT_SDA 44,45
BAT_SCL 44,45
BLUETOOTH_EN 73
WIFI_RF_EN 76
WWAN_RADIO_DIS# 76
E51_TxD 76
E51_RxD 76
AC_PRESENT_EC 22
PM_LAN_ENABLE 76
1 2
R3723 0R0402-PADR3723 0R0402-PAD
X02-20091222
+KBC_PWR
LCD_CBL_DET#54
12
R3745 33R2J-2-GPR3745 33R2J-2-GP
PURE_HW_SHUTDOWN#39,42
KB_DET#68
1 2
1 2
IMVP_PWRGD47
AMBER_LED#_KBC66
KBC_SCL1
AMP_MUTE#30
PM_PWRBTN#22
LCD_TST_EN54
KBC_BEEP30
R3737
R3737
LCD_TST54
TPDATA68
33R2J-2-GPR3734 33R2J-2-GPR3734
3
+3.3V_RUN
Q2302
Q2302
2345
1
6
2N7002EDW-G P
2N7002EDW-G P
84.27002.F3F
84.27002.F3F
+1.05V_VTT
DY
DY
DY
H_THERMTRIP#9,25,42,82
SIO_EXT_WAKE#25
SIO_EXT_SCI#25
1.05VTT_PWRG D 49,50
SIO_EXT_SMI#25
Vendor recomment FW can do it
TOURBO_BOOST
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
THERMTRIP_VGA_GATE_C
TPCLK68
EC_SPI_DO_C
EC_SPI_CLK_C
A00-20100204
DY
X02-20100104
1
2
BAS16PT-GP
BAS16PT-GP
1
2
U3701B
U3701B
77
32KX1/32KCLKIN
79
32KX2
30
GPIO55/CLKOUT
63
GPIO14/TB1
117
GPIO20/TA2
31
GPIO56/TA1
32
GPIO15/A_PWM
118
GPIO21/B_PWM
62
GPIO13/C_PWM
13
GPIO12/PSDAT3
12
GPIO25/PSCLK3
11
GPIO27/PSDAT2
10
GPIO26/PSCLK2
71
GPIO35/PSDAT1
72
GPIO37/PSCLK1
86
F_SDI
87
F_SDO
90
F_CS0#
92
F_SCK
NPCE781BA0DX-GP
NPCE781BA0DX-GP
KBC_SDA1
12
R3710
R3710
2K2R2J-2-GP
2K2R2J-2-GP
H_THERMTRIP_R#
KBC_THERMTRIP#
312
Q3705
Q3705
PMBS3904-1-GP
PMBS3904-1-GP
D3701
D3701
1
2
BAS16PT-GP
BAS16PT-GP
D3704
D3704
D3705
D3705
BAS16PT-GP
BAS16PT-GP
Q3701
Q3701
PMBS3906-GP
PMBS3906-GP
C3711
C3711
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
ECSWI#_KBC
3
ECSCI#_KBC
3
ECSMI#_KBC
3
KBSOUT15/GPIO61/XOR_OUT
PS/2
PS/2
FIU
FIU
2
DY
DY
1
3
THERM_SCL 39
12
DY
DY
KBSOUT0/JENK#
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT4/JEN0#
KBSOUT5/TDO
KBSOUT6/RDY#
KBC
KBC
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
GPIO60/KBSOUT16
GPIO57/KBSOUT17
ECRST#
12
C3716
C3716
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
2 OF 2
2 OF 2
KBSOUT3/TDI
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
VCC_POR#
10mW circuit
KBC_PWRBTN#66
EC_ENABLE#
DISCRETE_ID
E51_RxD
R3711 10KR2J-3-GP
R3711 10KR2J-3-GP
KCOL0
53
KCOL1
52
KCOL2
51
KCOL3
50
KCOL4
49
KCOL5
48
KCOL6
47
KCOL7
43
KCOL8
42
KCOL9
41
KCOL10
40
KCOL11
39
KCOL12
38
KCOL13
37
KCOL14
36
KCOL15
35
KCOL16
34
KCOL17
33
KROW0
54
KROW1
55
KROW2
56
KROW3
57
KROW4
58
KROW5
59
KROW6
60
KROW7
61
ECRST#
85
2
1 2
DY
DY
R3703 0R2J-2-GP
R3703 0R2J-2-GP
AC_IN#_KBC
+KBC_PWR
Q3704
Q3704
G
.....
.....
S
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
SSID = KBC
+KBC_PWR
DY
DY
12
R3705
R3705
2K2R2J-2-GP
2K2R2J-2-GP
A00-20100301
+3.3V_RUN
1 2
DY
DY
KCOL[0..16] 68
TP3708
TP3708
TPAD14-GP
TPAD14-GP
1
KROW[0..7] 68
PLT_RST#9,21,70,76,78,80
R3704
D3702
D3702
R3708
R3708
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
12
3
SIO_A20GATE
SIO_RCIN#
12
D3703
D3703
BAT54C-U-GP
BAT54C-U-GP
3
THERMTRIP_VGA#
BAT_SCL
BAT_SDA
ECRST#
KB_DET#
LCD_CBL_DET#
KBC_THERMTRIP#
AC_IN#_KBC
BLUETOOTH_EN
S5_ENABLE
IMVP_VR_ON
GFX_CORE_EN
PURE_HW_SHUTDOWN#
R3704
100KR2J-1-GP
100KR2J-1-GP
+3.3V_RTC_LDO
1 2
X01 change location
KBC_PWRBTN_EC#
KBC_PWRBTN#
KBC_ON#
D
BAT54C-U-GP
BAT54C-U-GP
Vendor recomment can remove
X02-20091222
R3716
R3716
12
0R0402-PAD
0R0402-PAD
12
C3714
C3714
SC470P50V2JN-GP
SC470P50V2JN-GP
DY
DY
+KBC_PWR
12
R3706
R3706
10KR2J-3-GP
10KR2J-3-GP
X01 20091111
R3707
R3707
KBC_ON#
2 3
1
PLT_RST1#_1
12
10KR2J-3-GP
10KR2J-3-GP
AC_IN# 45
RN3701
RN3701
6
7
8
SRN4K7J-10-GP
SRN4K7J-10-GP
RN3703
RN3703
4
SRN100KJ-6-GP
SRN100KJ-6-GP
R3709 100KR2J-1-GPR3709 100KR2J-1-GP
R3718 100KR2J-1-GPR3718 100KR2J-1-GP
R3712 10KR2J-3-GPR3712 10KR2J-3-GP
1 2
R3713 10KR2J-3-GPR3713 10KR2J-3-GP
1 2
R3717 10KR2J-3-GPR3717 10KR2J-3-GP
1 2
R3719 10KR2J-3-GPR3719 10KR2J-3-GP
1 2
X01 20091116
+KBC_PWR
R3722
R3722
10KR2J-3-GP
10KR2J-3-GP
1 2
+3.3V_RUN
RN3702
RN3702
4
SRN10KJ-5-GP
SRN10KJ-5-GP
KBC_ON#_GATE
45
3
2
1
1
23
12
12
1
+3.3V_RTC_LDO
G
Q3703
Q3703
12
C3713
C3713
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SI2301CDS-T1-GE3-GP
SI2301CDS-T1-GE3-GP
D S
+KBC_PWR
+KBC_PWR
12
EC3701
EC3701
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 Change tolerant 20091117
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
KBC Nuvoton NPCE781BA0DX
KBC Nuvoton NPCE781BA0DX
KBC Nuvoton NPCE781BA0DX
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Berry
Berry
Berry
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
1
A00
A00
37 92Monday, March 29, 2010
37 92Monday, March 29, 2010
37 92Monday, March 29, 2010
A00
of
of
of
Page 38
5
D D
4
3
2
1
(Blanking)
C C
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
Berry
Berry
Berry
38 92Wednesday, February 10, 2010
38 92Wednesday, February 10, 2010
38 92Wednesday, February 10, 2010
1
A00
A00
A00
of
of
of
Page 39
5
SSID = Thermal
x01 change tolerant 20091117
C3902
C3902
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
4
+5V_RUN
12
12
C3901
C3901
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+3.3V_RUN
12
R3901
R3901
10KR2J-3-GP
10KR2J-3-GP
3
2
1
D D
C C
1. Place near CPU PWM CORE and PCH.
Layout notice :
Both DN1 and DP1 routing 10 mil
trace width and 10 mil spacing.
C3905 must be near Q3901
2
Q3901
Q3901
PMBS3904-1-GP
PMBS3904-1-GP
PMBS3904-1-GP
PMBS3904-1-GP
UMA
UMA
Q3902
Q3902
3
2
3
2. System Sensor(UMA Only)
Layout notice :
Both DN2 and DP2 routing 10 mil
trace width and 10 mil spacing.
Reserved DISCRETE
VGA_THERMDC82
VGA_THERMDA82
1
DY
DY
1
DY
DY
EMC2102_DP2_UMA
DIS
DIS
1 2
R3906 0R2J-2-GP
R3906 0R2J-2-GP
DIS
DIS
1 2
R3907 0R2J-2-GP
R3907 0R2J-2-GP
12
C3904
C3904
SC470P50V2JN-GP
SC470P50V2JN-GP
EMC2102_DN2_UMA
12
C3906
C3906
SC470P50V2JN-GP
SC470P50V2JN-GP
R3904
R3904
UMA
UMA
1 2
0R2J-2-GP
0R2J-2-GP
R3903
R3903
UMA
UMA
near EMC2102
0R2J-2-GP
0R2J-2-GP
1 2
12
C3905
C3905
SC470P50V2JN-GP
SC470P50V2JN-GP
12
SC470P50V2JN-GP
SC470P50V2JN-GP
3.VGA Sensor(DISCRETE Only)
Layout notice :
Both VGA_THERMDA and VGA_THERMDC routing
10 mil trace width and 10 mil spacing.
C3907 must be near Q3902
2
Q3903
Q3903
PMBS3904-1-GP
PMBS3904-1-GP
B B
A A
3
4.HW T8 sensor
Layout notice :
Both DN3 and DP3 routing 10 mil
trace width and 10 mil spacing.
RUN_ENABLE42
12
C3908
C3908
SC470P50V2JN-GP
PCH_SUSCLK_210222
DY
DY
5
SC470P50V2JN-GP
1
12
C3909
C3909
SC470P50V2JN-GP
SC470P50V2JN-GP
C63 must be
near EMC2102
D
Q3905
Q3905
.
.
2N7002E-1-GP
2N7002E-1-GP
.
.
.
.
.
.
.
.
84.2N702.D31
84.2N702.D31
S
G
+3.3V_RUN
R3902
R3902
49D9R2F-GP
49D9R2F-GP
C3907
C3907
32K suspend clock output
R3915
R3915
1 2
10R2J-2-GP
10R2J-2-GP
CLK_32KCLK_32K_R
CLK_32K
12
C3913
C3913
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
EMC2102_VDD_3D3
12
12
C3903
C3903
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
29
U3901
U3901
GND
1
DY
DY
VDD_3V
2
DN1
3
DP1
4
DN2
5
DP2
6
DN3
7
DP3
EMC2102_SHDN
12
EMC2102_FAN_mode
12
EMC2102_DN1
EMC2102_DP1
EMC2102_DN2
EMC2102_DP2
EMC2102_DN3
EMC2102_DP3
GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled
+3.3V_RUN
GND = Fan is OFF
OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale
4
R3908
R3908
10KR2J-3-GP
10KR2J-3-GP
R3909
R3909
DY
DY
10KR2J-3-GP
10KR2J-3-GP
A00-20100204
R3911
R3911
1 2
0R0402-PAD
0R0402-PAD
EMC2102_FAN_TACH
EMC2102_FAN_DRIVE
28
27
TACH
VDD_5Va
EMC2102
EMC2102
SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#
NC#8
8
26
FANa
25
FANb
23
24
SMCLK
VDD_5Vb
+3.3V_RUN
THERM_SYS_SHDN#
3
22
SMDATA
NC#21
ALERT#
CLK_IN
CLK_SEL
RESET#
NC#15
EMC2102-DZK-GP
EMC2102-DZK-GP
14
THERM_POWER_OK#
84.2N702.D31
84.2N702.D31
THERM_SC L 37
THERM_SD A 37
21
20
GND
19
18
17
16
15
THERMTRIP#
Q3904
Q3904
G
.
...
S
2N7002E-1-GP
2N7002E-1-GP
EMC2102_FAN_TACH 58
EMC2102_FAN_DRIVE 58
+3.3V_RUN
RN3901
RN3901
4
SRN4K7J-8-GP
SRN4K7J-8-GP
SRN10KJ-5-GP
SRN10KJ-5-GP
4
RN3902
RN3902
23
1
23
1
CLK_32K
EMC2102_CLK_SEL
EM2102_RESET#
X02-20091222
R3905
R3905
1 2
0R0402-PAD
0R0402-PAD
1
TP3901TP3901
THERM_SCL
THERM_SDA
THERM_POWER_OK#
THERMTRIP#
+3.3V_RUN
GND = Internal Oscillator Selected
+3.3V = External 32.768kHz Clock Selected
Main G7922R61U for GMT P/N:74.07922.0B3
SEC. EMC2102 for SMSC P/N:74.02102.A73
+3.3V_RUN
.
.....
D
PURE_HW_SHUTDOWN# 37,42
V_DEGREE
x01 change tolerant 20091117
2
12
C3910
C3910
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C3911
C3911
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Thermal/Fan Controllor EMC2102
Thermal/Fan Controllor EMC2102
Thermal/Fan Controllor EMC2102
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
12
R3913
R3913
10KR2F-2-GP
10KR2F-2-GP
TRIP_SET Pin Voltage
V_DEGREE=(((Degree-75)/21)
12
R3914
R3914
2K37R2F-GP
2K37R2F-GP
T8 shutdown is set 88 deg-C.
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Berry
Berry
Berry
39 92Tuesday, April 06, 2010
39 92Tuesday, April 06, 2010
39 92Tuesday, April 06, 2010
1
A00
A00
A00
of
of
of
Page 40
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
40 92Wednesday, February 10, 2010
of
40 92Wednesday, February 10, 2010
of
40 92Wednesday, February 10, 2010
A00
A00
A00
Page 41
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
41 92Wednesday, February 10, 2010
of
41 92Wednesday, February 10, 2010
of
41 92Wednesday, February 10, 2010
A00
A00
A00
Page 42
5
4
3
2
1
SSID = Reset.Suspend
R4201
R4201
H_PWRGD9,25
D D
3V_5V_EN46
12
DY
DY
R4202
R4202
Run Power
C C
+3.3V_RTC_LDO
100KR2J-1-GP
100KR2J-1-GP
R4207
R4207
1 2
PS_S3CNTRL
PS_S3CNTRL 18,50
1KR2J-1-GP
1KR2J-1-GP
200KR2J-L1-GP
200KR2J-L1-GP
1 2
DY
DY
+15V_ALW
H_PWRGD_R
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
BAS16PT-GP
BAS16PT-GP
2
3
1
D4201
D4201
1 2
R4203 1KR2J-1-GPR4203 1KR2J-1-GP
R4204
R4204
100KR2J-1-GP
100KR2J-1-GP
1 2
R4205
R4205
1 2
10KR2J-3-GP
10KR2J-3-GP
E
B
DY
DY
Q4201
Q4201
12
CHT2222APT-GP
CHT2222APT-GP
C4202
C4202
C
DY
DY
x01 change to 10V tolerant 20091117
5V_RUN_ENABLE
12
H_THERMTRIP# 9,25,37,82
PURE_HW_SHUTDOW N# 37,39
S5_ENABLE 37
AO4468 MAX 9A
Rds(on) = 18.5mOhm
+5V_ALW +5V_RUN
C4201
C4201
SC6800P25V2KX-1GP
SC6800P25V2KX-1GP
U4201
U4201
GD
GD
S
D
S
D
6
7
8
SI4800BDY-T1-GP
SI4800BDY-T1-GP
84.04800.D37
84.04800.D37
S
D
S
D
S
D
S
D
45
3
2
1
x01 change to 10V tolerant 20091117
+5V_RUN
12
C4203
C4203
SC10U10V5KX-2GP
SC10U10V5KX-2GP
+5V_RUN Comsumption
Peak current 7.73A
S
5
6
123 4
S
PM_SLP_S3#22,37,47,50,51,89
RUN_ENABLE39
B B
+1.5V_RUN_CPU
S3 Power Reduction
12
R4213
R4213
220R2J-L2-GP
220R2J-L2-GP
DY
DY
DISCHARGE_1D5V_CPU_C
D
.
A A
PS_S3CNTRL
.
.
.
.
.
.
.
.
.
S
G
DY
DY
5
Q4202
Q4202
2N7002EDW-GP
2N7002EDW-GP
84.27002.F3F
84.27002.F3F
GGDD
RUN_ENABLE
2
Q4206
Q4206
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
AO4468 MAX 11.6A
Rds(on) = 18.5mOhm
R4211
R4211
1 2
10KR2J-3-GP
10KR2J-3-GP
+3.3V_ALW
3.3V_RUN_ENABLE
12
C4207
C4207
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
U4202
U4202
D
D
6
D
D
7
D
D
8
SI4800BDY-T1-GP
SI4800BDY-T1-GP
84.04800.D37
84.04800.D37
1
S3 Power Reduction X01 20091111
R4227
R4227
1 2
10KR2J-3-GP
10KR2J-3-GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
4
+1.5V_SUS
1.5V_RUN_ENABLE
12
C4210
C4210
+1.5V_RUN_CPU
DY
DY
R4214
R4214
1 2
0R5J-5-GP
0R5J-5-GP
DY
DY
R4219
R4219
1 2
0R5J-5-GP
0R5J-5-GP
TPCA8039-H MAX 34A
Rds(on) = 3.8m OHM
DIS uses 84.08039.037 TPCA8039-H Peak current=34A
UMA uses 84.07686.037 SI7686DP Peak current=35A
U4203
U4203
D
D
8
D
D
7
D
D
6
D
D
TPCA8039-H-GP
TPCA8039-H-GP
COLAY
COLAY
GD
GD
45
S
S
3
S
S
2
S
S
1
+1.5V_RUN
MAX Current 3000 mA
Design Current 2100 mA
R4215 0R0805-PADR4215 0R0805-PAD
R4220 0R0805-PADR4220 0R0805-PAD
S
S
1
S
S
2
S
S
3
G
G
45
+3.3V_RUN
+3.3V_RUN
12
C4205
C4205
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
X02-20091222
1 2
1 2
3
+1.5V_RUN
12
+3.3V_RUN Comsumption
Peak current 8.14A
1.5V_RUN for VGA Comsumption
Peak current 7.39A
+1.5V_RUN_CPU Comsumption
Peak current 3A
+1.5V_RUN for Mini-Card Comsumption
Peak current 1A
Total= 11.39A
C4208
C4208
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Power Plane Enable
Power Plane Enable
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
Power Plane Enable
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
42 92Monday, March 29, 2010
42 92Monday, March 29, 2010
42 92Monday, March 29, 2010
1
A00
A00
A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
43 92Wednesday, February 10, 2010
of
43 92Wednesday, February 10, 2010
of
43 92Wednesday, February 10, 2010
A00
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5
4
3
2
1
Batt Connecter
+VCHGR
PG4401
PG4401
D D
BATT_SENSE45
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
BAT_SCL37,45
BAT_SDA37,45
BAT_IN#37
+KBC_PWR
12
470KR2J-2-GP
470KR2J-2-GP
PR4401
PR4401
SCD1U50V3KX-GP
SCD1U50V3KX-GP
R4401 100R2J-2-GPR4401 100R2J-2-GP
1 2
R4402 100R2J-2-GPR4402 100R2J-2-GP
1 2
R4403 100R2J-2-GPR4403 100R2J-2-GP
1 2
12
PC4402
PC4402
12
12
PC4401
PC4401
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
PBAT_PRES1#
AFTP4401AFTP4401
PBAT_SMBCLK1
PBAT_SMBDAT1
BAT_ALERT
1
BATT1
BATT1
10
1
2
3
4
5
6
7
8
9
11
ALP-CON9-2-GP-U
ALP-CON9-2-GP-U
20.81316.009
20.81316.009
C C
For actual location, need to be swap all pin
Close to Batt Connector
BAT_IN#
AFTP4402AFTP4402
AFTP4403AFTP4403
5
AFTP4404AFTP4404
AFTP4405AFTP4405
B B
A A
PBAT_PRES1#
1
PBAT_SMBDAT1
1
PBAT_SMBCLK1
1
+VCHGR
1
PD4402
PD4402
3
1 2
BAV99-8-GP
BAV99-8-GP
4
3
BAT_SDA
PD4403
PD4403
3
1 2
BAV99-8-GP
BAV99-8-GP
BAT_SCL
PD4401
PD4401
3
1 2
BAV99-8-GP
BAV99-8-GP
+KBC_PWR
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
BATT CONN
BATT CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
Date: Sheet
2
Berry
Berry
Berry
BATT CONN
44 92Monday, March 29, 2010
44 92Monday, March 29, 2010
44 92Monday, March 29, 2010
of
of
of
1
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A00
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5
4
3
2
1
SSID = Charger
12
PR4517
PR4517
0R0603-PAD
0R0603-PAD
PR4518
PR4518
0R0603-PAD
0R0603-PAD
PR4528
PR4528
0R0402-PAD
0R0402-PAD
12
+PWR_SRC
12
PG4503
PG4503
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PR4524_03
12
PR4510
PR4510
0R0402-PAD
0R0402-PAD
DY
DY
CHG_AGND
BQ24745_BST1
PC4514
PC4514
SC220P50V2JN-3GP
SC220P50V2JN-3GP
12
12
DY
DY
PC4532
PC4532
CHG_AGND
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
PC4504
PC4504
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PD4501
PD4501
K A
SD103AWS-1-GP
SD103AWS-1-GP
1 2
PC4512
PC4512
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
DY
DY
PC4520
PC4520
CHG_AGND
PR4530
PR4530
1K8R6J-GP
1K8R6J-GP
12
PR4513
PR4513
DY
DY
33R3J-2-GP
33R3J-2-GP
PC4511
PC4511
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PC4523
PC4523
BATT_SENSE 44
1 2
PG4501
PG4501
12
PC4506
PC4506
DY
DY
CHG_AGND
1 2
12
PC4513
PC4513
SC3300P50V3KX-1GP
SC3300P50V3KX-1GP
DY
DY
PR4523
PR4523
1 2
0R0402-PAD
0R0402-PAD
X02-20091223
1 2
1 2
PG4504
PG4504
PG4506
PG4506
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
678
DDD
DDD
PU4504
PU4504
SSS
GD
SSS
GD
123
4 5
BQ24745_LX1
678
DDD
DDD
PU4505
PU4505
SSS
GD
SSS
GD
123
4 5
1 2
PG4505
PG4505
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
CHAGER_SRC
CHAGER_SRC
12
PC4507
PC4507
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SI4800BDY-T1-GP
SI4800BDY-T1-GP
PL4501
PL4501
1 2
L-5D6UH-GP-U
L-5D6UH-GP-U
SI4800BDY-T1-GP
SI4800BDY-T1-GP
BQ24745_CSON
12
PC4508
PC4508
SC10U25V6KX-1GP
SC10U25V6KX-1GP
BQ24745_CSOP
+DC_IN_SS
12
PR4506
PR4506
470KR2J-2-GP
470KR2J-2-GP
12
PC4509
PC4509
SCD1U50V3KX-GP
SCD1U50V3KX-GP
Charger Current=1.4~3.6A
+VCHGR1
D01R2512F-4-GP
D01R2512F-4-GP
1 2
PG4510
PG4510
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
12
DY
DY
2009/11/24
PR4519
PR4519
1 2
PG4509
PG4509
CHG_AGND
CSSP
CSSN
BOOT
VDDP
CSOP
VFB
PR4529
PR4529
+SDC_IN
12
PG4502
PG4502
PR4533_02
12
PR4508
PR4508
0R0402-PAD
0R0402-PAD
BQ24745_CSSP
28
BQ24745_CSSN
27
BQ24745_ICOUT
26
BQ24745_BOOT_1
25
BQ24745_LDO
21
BQ24745_CHARGER_UGATE
24
23
20
19
BQ24745_CSOP_1
18
17
16
15
BAT_SENSE
12
PR4502
PR4502
1 2
D01R2512F-4-GP
D01R2512F-4-GP
DY
DY
PR4507
PR4507
0R2J-2-GP
0R2J-2-GP
PC4505
PC4505
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
X02-20091223 X02-20100116
1 2
BQ24745_PHASE_GND
BQ24745_LGATE_1
X02-20091223
DY
DY
CHG_AGND
PU4502
PU4502
S
D
S
D
+DC_IN_SS
D D
+DC_IN_SS
12
PR4509
316KR3F-2-GP
PR4509
316KR3F-2-GP
X02-20091223
PR4511 0R0402-PADPR4511 0R0402-PAD
ACAV_IN
12
BQ24745_REF
12
DY
DY
10KR2F-2-GP
10KR2F-2-GP
PR4515
PR4515
12
DY
DY
15K8R3F-GP
15K8R3F-GP
PR4520
PR4520
12
PR4516
PR4516
10KR2F-2-GP
10KR2F-2-GP
BQ24745_LDO
C C
12
12
PR4514 48K7R3F-1-GPPR4514 48K7R3F-1-GP
2009/08/04
CHG_AGND
AD_IA37
PC4510
PC4510
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
PR4501
PR4501
0R2J-2-GP
0R2J-2-GP
12
+KBC_PWR
12
CHG_AGND
BAT_SCL37,44
BAT_SDA37,44
8
D
D
7
D
D
6
AO4407A-GP
AO4407A-GP
Id=-12A
Qg=-25nC
Rdson=10~38mohm
PR4504
PR4504
1 2
10KR2J-3-GP
10KR2J-3-GP
PQ4502_03
BQ24745_ACOK
84.27002.F3F
84.27002.F3F
PC4503
PC4503
SCD1U50V3KX-GP
SCD1U50V3KX-GP
x01 change tolerant 20091117
X02-20091223
PC4501
PC4501
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PG4507 GAP-CLOSE-PWR-3-GPPG4507 GAP-CLOSE-PWR-3-GP
PG4508 GAP-CLOSE-PWR-3-GPPG4508 GAP-CLOSE-PWR-3-GP
X03-20100119
12
PR4521
PR4521
4K7R2J-2-GP
PC4524
PC4524
12
SC220P50V2JN-3GP
SC220P50V2JN-3GP
BQ24745_FBO1
12
DY
DY
PC4526
PC4526
SCD1U50V3KX-GP
SCD1U50V3KX-GP
AC_IN#37
4K7R2J-2-GP
1 2
PC4521
PC4521
SC150P50V2JN-3GP
SC150P50V2JN-3GP
PR4525
PR4525
12
8K45R2F-2-GP
8K45R2F-2-GP
DY
B B
DY
This Resistor
must be 1%
tolerance.
PR4522
PR4522
200KR2F-L-GP
200KR2F-L-GP
1 2
PC4522
PC4522
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
12
PC4527
PC4527
DY
DY
12
PC4525
PC4525
SC56P50V2JN-2GP
SC56P50V2JN-2GP
PR4526
PR4526
7K5R2F-1-GP
7K5R2F-1-GP
PR4526_01
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
X02-20091223
DY
DY
PC4528
PC4528
S
S
S
S
GD
GD
PQ4501
PQ4501
3 4
2
1
2N7002EDW-GP
2N7002EDW-GP
12
PR4512
PR4512
0R0402-PAD
0R0402-PAD
12
12
12
12
12
1
2
3
45
5
6
BQ24745_DCIN
BQ24745_ACIN
12
BQ24745_ACOK
BAT_SCL_1
BAT_SDA_1
CHG_AGND
BQ24745_VICM
BQ24745_FBO
BQ24745_EAI
BQ24745_EAO
BQ24745_REF
PR4527
PR4527
1 2
0R0402-PAD
0R0402-PAD
DY
DY
PC4529
PC4529
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
PR4513_03
PR4505
PR4505
1 2
PQ4502_05
BQ24745_CE
12
PC4530
PC4530
12
PR4503
PR4503
10KR2F-2-GP
10KR2F-2-GP
CHG_AGND
22
DCIN
2
ACIN
11
VDDSMB
13
ACOK
10
SCL
9
SDA
14
NC#14
8
VICM
6
FBO
5
EAI
4
EAO
3
VREF
7
CE
12
GND
PU4501
PU4501
BQ24745RHDR-GP
BQ24745RHDR-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
100KR2J-1-GP
100KR2J-1-GP
1
CHG_AGND
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
X02-20091223
1 2
PC4502
PC4502
SCD1U50V3KX-GP
SCD1U50V3KX-GP
ICREF
ICOU T
UGATE
PHASE
LGATE
PGND
CSON
NC#16
GND
29
X02-20091223
0R0402-PAD
0R0402-PAD
modify +VCHGR
PU4503
PU4503
S
D
S
1
2
3
4 5
EC4501
EC4501
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
BQ24745_PR4505
1 2
DY
DY
1 2
D
S
D
S
D
S
D
S
D
GD
GD
AO4407A-GP
AO4407A-GP
Id=-12A
Qg=-25nC
Rdson=10~38mohm
12
EC4502
EC4502
DY
DY
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
12
12
PC4516
PC4516
PC4515
PC4515
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PR4524
PR4524
0R0402-PAD
0R0402-PAD
X02-20091223
PC4531
PC4531
SCD1U50V3KX-GP
SCD1U50V3KX-GP
+VCHGR
8
7
6
modify +VCHGR
+VCHGR
12
12
DY
DY
PC4517
PC4517
PC4518
PC4518
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
KA
12
PC4519
PC4519
DY
DY
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PD4502
PD4502
1SMA18AT3G-GP
1SMA18AT3G-GP
12
PC4533
PC4533
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
A A
x01 change tolerant 20091117
5
D
Q4502
Q4502
.
.
2N7002E-1-GP
2N7002E-1-GP
.
.
.
.
.
.
.
.
S
G
ACAV_IN
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
CHARGER BQ24745
CHARGER BQ24745
CHARGER BQ24745
of
45 92Monday, March 29, 2010
45 92Monday, March 29, 2010
45 92Monday, March 29, 2010
1
A00
A00
A00
Page 46
A
51125_ENTRIP
D
.
.
Q4601
Q4601
2N7002E-1-GP
2N7002E-1-GP
.
.
.
.
.
.
.
84.2N702.D31
84.2N702.D31
PC4615
PC4615
51125_VBST2_1
12
DY
DY
RT8205B:
PR4622
PR4604
PR4614
PR4614
0R2J-2-GP
0R2J-2-GP
PR4617
PR4617
0R2J-2-GP
0R2J-2-GP
DY
DY
TPS51125:
GND
VREF
VREG3
VREG5
GND
VREF
VREG3
VREG5
12
12
PR4618
PR4618
12
0R2J-2-GP
0R2J-2-GP
DY
DY
TONSEL
PR4619
PR4619
0R2J-2-GP
0R2J-2-GP
3V_5V_EN42
TPS51125 RT8205B
DY ASM
TPS51125 RT8205B
0R3J 4R7
PR4604
PR4604
4D7R3J-L1-GP
4D7R3J-L1-GP
PR4608 820KR2F-GP
PR4608 820KR2F-GP
51125_VREF
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
12
PR4620
PR4620
12
0R2J-2-GP
0R2J-2-GP
4 4
PTC4602
PTC4602
12
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
6K65R2F-GP
6K65R2F-GP
10KR2F-2-GP
10KR2F-2-GP
PR4609
PR4609
PR4613
PR4613
+PWR_SRC
12
PC4609
PC4609
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X02-20100116
PL4601
PL4601
1 2
IND-3D3UH-115-GP
IND-3D3UH-115-GP
PG4624
PG4624
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
12
SC330P50V2KX-3GP
SC330P50V2KX-3GP
12
12
PR4610
PR4610
0R2J-2-GP
0R2J-2-GP
DY
DY
51125_FB2_R
12
PC4625
PC4625
DY
DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
12
PC4610
PC4610
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PR4606
PR4606
2D2R5F-2-GP
2D2R5F-2-GP
PC4621
PC4621
X02-20100201
PC4611
PC4611
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
12
DY
DY
51125_LL2_R
12
DY
DY
D
678
DDD
DDD
PU4602
PU4602
FDS8880-NL-GP
FDS8880-NL-GP
SSS
GD
SSS
GD
SCD1U25V3KX-GP
SCD1U25V3KX-GP
123
4 5
SG
D
678
DDD
DDD
PU4604
PU4604
FDS6676AS-GP
FDS6676AS-GP
SSS
GD
SSS
GD
123
4 5
S
G
51125_VREF
+3.3V_ ALW_2
51125_VREF
+3.3V_ ALW_2
X02-20091228
X01 EMI stuff 20091118
Design Current =9.07A
14.25A<OCP<16.84A
+3.3V_ ALW +5V_PWR
PTC4601
PTC4601
PC4619
PC4619
12
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
x01 change tolerant 20091117
3 3
Close to VFB Pin (pin5)
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMB104T-3R3MS Cyntec 10.8mohm/11.8mohm Isat =16Arms 68.3R310.20C
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDS8880 9.6mohm/12mOhm@4.5Vgs/ 84.08880.037
L/S: FDS6676AS 5.9mOhm/7.25mOhm@4.5Vgs/ 84.06676.A37
2 2
.
S
G
PR4622
PR4622
51125_EN
1 2
820KR3J-GP
820KR3J-GP
PU4601
PU4601
51125_VBST2
1 2
1 2
12
9
BOOT2
51125_DRVH2
10
UGATE2
51125_LL2
11
PHASE2
51125_DRVL2
LGATE212LGATE1
51125_VO2
7
VOUT2
51125_FB2
5
FB2
51125_EN
13
EN
DY
DY
51125_ENTIP2
6
ENTRIP2
3
PC4623
PC4623
PR4614
PR4617 ASM
REF
51125_TONSEL
4
TONSEL
14
SKIPSEL
51125_SKIPSEL
RT8205BGQW-GP
RT8205BGQW-GP
+3.3V_ ALW_2
PG4635
PG4635
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PC4626
PC4626
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
TPS51125 RT8205B
ASM
DY
DY
CH2CH1 VREF(2V)
265kHz
200kHz
305kHz
245kHz
375kHz
300kHz
460kHz
365kHz
CH2CH1TONSEL
200kHz
250kHz
375kHz
300kHz
460kHz365kHz
460kHz
365kHz
B
51125_ENTIP1
12
12
PR4601
PR4601
PC4601
PC4601
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
DY
76K8R2F-GP
76K8R2F-GP
A00-20100224
+PWR_SRC
PC4612
PC4612
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4613
PC4613
12
12
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
DY
DY
16
VIN
51125_VBST1
22
BOOT1
51125_DRVH1
21
UGATE1
51125_LL1
20
PHASE1
51125_DRVL1
19
51125_VO1
24
VOUT1
51125_FB1
2
FB1
3V_5V_POK
23
PGOOD
51125_ENTIP1
1
ENTRIP1
15
PGND
25
GND
51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK
18
LG1_CP
VREG38VREG5
17
+5V_ALW2
Change to RT8205B
74.08205.B73
SC22U6D3V5MX-2GP
PC4628
PC4628
12
12
PC4627
PC4627
SC10U10V5KX-2GP
SC10U10V5KX-2GP
DY
DY
+3.3V_ ALW_2
OOA Auto Skip Auto Skip
OpenEN0 820kȍ to GND
enable both
LDOs, VCLK on
and ready to
turn on
switcher
channels
SC22U6D3V5MX-2GP
3D3V_AUX_S5_5_51125
12
SKIPSEL GNDVREG3 or VREG5
Operating
Mode
Operating
Mode
+3.3V_ ALW_2
6
123 4
TPS51125 RT8205B
PR4605
0R3J 4R7
PR4605
PR4605
4D7R3J-L1-GP
4D7R3J-L1-GP
1 2
X02-20091223
PR4621
PR4621
1 2
0R0402-PAD
0R0402-PAD
enable both LDOs,
VCLK off and
ready to turn on
switcher channels
12
PR4602
PR4602
100KR2J-1-GP
100KR2J-1-GP
5
51125_VBST1_1
PC4607
PC4607
PQ4602
PQ4602
2N7002EDW-GP
2N7002EDW-GP
84.27002.F3F
84.27002.F3F
51125_ENTIP2
12
DY
DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
X01 20091124
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PC4618
PC4618
+3.3V_ ALW
12
PR4615
PR4615
100KR2J-1-GP
100KR2J-1-GP
+3.3V_RTC_LDO
PWM only
12
PR4603
PR4603
82KR2F-1-GP
82KR2F-1-GP
FDS8880-NL-GP
FDS8880-NL-GP
1 2
FDS6676AS-GP
FDS6676AS-GP
3V_5V_POK 37
GND
disable all
circuit
C
51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK
12
12
12
PC4603
PC4603
PC4602
SC1KP50V2KX-1GP
PC4602
SC1KP50V2KX-1GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PD3904_1
PD3903_1
3
3
PD4601
PD4601
BAT54S-5-GP
BAT54S-5-GP
PG4605
PG4605
PD3903_2
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
+PWR_SRC
X01 EMI stuff 20091118
PC4616
PC4616
PC4614
PC4614
PC4617
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
12
DY
DY
PR4607
PR4607
2D2R5F-2-GP
2D2R5F-2-GP
51125_LL1_R
12
PC4622
PC4622
SC560P50V-GP
SC560P50V-GP
DY
DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PL4602
PL4602
IND-2D2UH-46-GP-U
IND-2D2UH-46-GP-U
PR4611
PR4611
0R2J-2-GP
0R2J-2-GP
PC4624
PC4624
PC4617
12
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X02-20100116
x01 change tolerant 20091117
PG4626
PG4626
12
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
12
12
DY
DY
PR4612
PR4612
33KR2F-GP
33KR2F-GP
51125_FB1_R
12
DY
DY
12
PR4616
PR4616
21K5R2F-GP
21K5R2F-GP
Close to VFB Pin (pin2)
D
678
DDD
DDD
PU4603
PU4603
SSS
GD
SSS
GD
123
4 5
G
S
678
D
DDD
DDD
PU4605
PU4605
SSS
GD
SSS
GD
123
4 5
SG
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDS8880 9.6mohm/12mOhm@4.5Vgs/ 84.08880.037
L/S: FDS6676AS 5.9mOhm/7.25mOhm@4.5Vgs/ 84.06676.A37
2
1
2
PD3903_04
12
PC4605
PC4605
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
12
Design Current = 8.48A
13.32A<OCP< 15.75A
PTC4603
PTC4603
12
12
PC4620
PC4620
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
x01 change tolerant 20091117
PC4608
PC4608
SCD1U25V3KX-GP
SCD1U25V3KX-GP
12
PC4604
PC4604
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PD4602
PD4602
BAT54S-5-GP
BAT54S-5-GP
1
+5V_PWR+15V_ALW
PTC4604
PTC4604
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
12
PC4606
PC4606
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+5V_PWR
PG4613
PG4613
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4614
PG4614
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4615
PG4615
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4616
PG4616
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4617
PG4617
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4618
PG4618
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4619
PG4619
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4620
PG4620
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4621
PG4621
GAP-CLOSE-PWR
GAP-CLOSE-PWR
D
+5V_ALW
12
12
12
12
12
12
12
12
12
E
1 1
Bom
Bom
Bom
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
E
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
RT8205B_5V/3D3V
RT8205B_5V/3D3V
RT8205B_5V/3D3V
Berry
Berry
Berry
A00
A00
A00
46 92Monday, March 29, 2010
46 92Monday, March 29, 2010
46 92Monday, March 29, 2010
of
of
of
Page 47
5
+PWR_SRC
12
12
TC4702
TC4702
TC4703
SE100U25VM-11GP
SE100U25VM-11GP
IMVP_PWRGD37
1 2
DY
DY
PR4726
PR4726
8K06R2F-GP
8K06R2F-GP
PC4738
PC4738
SC33P50V2JN-3GP
SC33P50V2JN-3GP
62883_COMP_R
1 2
PC4740
PC4740
SC150P50V2JN-3GP
SC150P50V2JN-3GP
TC4703
DY
DY
SE100U25VM-11GP
SE100U25VM-11GP
PSI#12
PR4771
PR4771
NTC-470K-1-GP
NTC-470K-1-GP
1 2
1 2
PC4719
PC4719
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
PR4752
PR4752
324KR2F-GP
324KR2F-GP
+3.3V_RUN
12
PR4720
PR4720
1K91R2F-1-GP
1K91R2F-1-GP
1 2
PR4704 0R0402-PADPR4704 0R0402-PAD
1 2
PR4733 0R0402-PADPR4733 0R0402-PAD
1 2
PR4781 147KR2F-GPPR4781 147KR2F- GP
1 2
PR4758
PR4758
4K02R2F-GP
4K02R2F-GP
1 2
DY
DY
D D
NTC 470K close to H/S MOSFET of Phase1
H_PROCHOT#9
6266A_NTC_R 62883_NT C
1 2
DY
DY
PR4774
PR4774
4K02R2F-GP
4K02R2F-GP
C C
ISEN3
1 2
PR4744
PR4744
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
PC4735
PC4735
SC22P50V2JN-4GP
SC22P50V2JN-4GP
DY
DY
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
PC4737
PC4737
VR_CLKEN#7
1K91R2F-1-GP
1K91R2F-1-GP
62883_PGOOD
62883_PSI#
62883_RBIAS
H_PROCHOT#_R
DY
DY
62883_VW
62883_COMP
62883_FB
ISEN3
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1
1
ISEN2
PC4702
PC4702
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1
1
2
2
2
2
VSUM-
62883_FB_VSEN
1 2
PR4714
PR4714
562R2F-GP
562R2F-GP
1 2
PR4712 1K82R 2F-1-GPPR4712 1K82R2F-1-GP
+3.3V_RUN
12
PR4745
PR4745
PU4701
PU4701
1
PGOOD
2
PSI#
3
RBIAS
4
VR_TT#
5
NTC
6
VW
7
COMP
8
FB
9
ISEN3/FB2
10
ISEN2
PC4707
PC4707
41
GND
ISL62883HRTZ-T-GP
ISL62883HRTZ-T-GP
ISEN1
1
1
PC4736
PC4736
SCD22U25V3KX-GP
SCD22U25V3KX-GP
2
2
X01 20091121
PC4716
PC4716
1 2
SC390P50V2KX-GP
SC390P50V2KX-GP
12
12
PR4735 0R0402-PADPR4735 0R0402-PAD
PR4749 0R0402-PADPR4749 0R0402-PAD
62883_CLK_EN#
62883_DPRSLPVR
39
40
CLK_EN#
DPRSLPVR
ISEN111VSEN12RTN13ISUM-14ISUM+15VDD16VIN17IMON18BOOT119UGATE1
X01 20091124
12
PC4721
PC4721
SC330P50V2KX-3GP
SC330P50V2KX-3GP
VCC_SENSE12
SC330P50V2KX-3GP
PR4724
PR4724
PR4703
PR4703
SC330P50V2KX-3GP
PR4753
PR4753
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
PR4777
PR4777
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
B B
Intel support POC (Power On Configuration).
+1.05V_VTT
PR4737
PR4737
PR4701
PR4701
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
H_VID0H_VID0
H_VID1H_VID1
H_VID2H_VID2
H_VID3H_VID3
H_VID4H_VID4
H_VID5H_VID5
H_VID6H_VID6
PM_DPRSLPVR
PSI#PSI#
PR4715
PR4715
PR4702
PR4702
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
DY
DY
A A
PR4709
PR4709
PR4768
PR4768
PR4713
PR4713
PR4732
PR4732
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
PR4727
PR4727
PR4743
PR4743
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
5
VSS_SENSE12
PR4769
PR4769
PR4705
PR4705
12
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
DY
DY
PR4710
PR4710
PR4706
PR4706
12
12
12
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
1KR2J-1-GP
DY
DY
12
PC4711
PC4711
PC4701
PC4701
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.36UH PCMC104T-R36MN1R05J Cyntec 1.05mohm/ 68.R3610.20C
O/P cap: 330U 2V EEFSX0D221E7 6mOhm 3.0Arms Panasonic/79.33719.20L
O/P cap: 220U 2V EEFSX0D331XE 7mOhm 3.4Arms Panasonic/79.22719.90L
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
PM_DPRSLPVR 12
IMVP_VR_ON 37
D4701
D4701
DY
DY
RB551V-30-2GP
RB551V-30-2GP
H_VID5
H_VID6
12
12
12
12
PR4718 0R0402-PADPR4718 0R0402-PAD
PR4746 0R0402-PADPR4746 0R0402-PAD
PR4773 0R0402-PADPR4773 0R0402-PAD
PR4755 0R0402-PADPR4755 0R0402-PAD
62883_VR_ON
62883_VID4 H_VID4
62883_VID5
62883_VID6
38
VID637VID536VID435VID334VID233VID132VID0
VR_ON
62883_ISUM-
62883_VDD
PC4722 SC1U10V2KX-1GPPC4722 SC1U10V2KX-1GP
12
12
PR4725
PR4725
82D5R2F-1-GP
82D5R2F-1-GP
VSUM_RC
PC4742
PC4742
SCD01U25V2KX-3GP
SCD01U25V2KX-3GP
1 2
1 2
PR4748 715R2F-GPPR4748 715R2F-G P
1 2
X01 20091124
PG4715
PG4715
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
4
KA
PM_SLP_S3# 22,37,42,50,51,89
H_VID0
H_VID1
H_VID2
H_VID3
12
12
12
12
PR4729 0R0402-PADPR4729 0R0402-PAD
PR4762 0R0402-PADPR4762 0R0402-PAD
PR4730 0R0402-PADPR4730 0R0402-PAD
62883_VID2
62883_VID3
62883_VID1
62883_VID0
31
PWM3/LGATE1#
20
UGATE1
BOOT1 BOOT1_PHASE1
X02-20091223
62883_VIN
PR4754 0R0402-PADPR4754 0R 0402-PAD
1 2
1 2
PR4759
PR4759
1R2F-GP
1R2F-GP
21PC4729
21PC4729
SCD22U25V3KX-GP
SCD22U25V3KX-GP
4
X01 20091111
H_VID[6..0] 12
X02-20091223
PR4766 0R0402-PADPR4766 0R0402-PAD
30
BOOT2
29
UGATE2
28
PHASE2
27
VSSP2
26
LGATE2
25
VCCP
24
23
LGATE1
22
VSSP1
21
PHASE1
PR4722
PR4722
1 2
2D2R3J-2-GP
2D2R3J-2-GP
+PWR_SRC
+5V_RUN
X01 20091111
PC4717
PC4717
SCD33U16V3KX-1GP
SCD33U16V3KX-1GP
1 2
PR4772
PR4772
BOOT2
UGATE2
PHASE2
LGATE2
62883_VCCP
62883_PWM3
LGATE1
PHASE1
SCD22U16V3KX-1-GP
SCD22U16V3KX-1-GP
12
PR4776
PR4776
6K98R2-GP
6K98R2-GP
PC4741
PC4741
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
B00T2_R
1 2
2D2R3J-2-GP
2D2R3J-2-GP
1 2
PC4710
PC4710
SCD22U16V3KX-1-GP
SCD22U16V3KX-1-GP
PC4709
PC4709
+1.05V_VTT
1 2
DY
DY
X02-20091223
PR4786
PR4786
100KR2F-L1-GP
100KR2F-L1-GP
1 2
IMVP_IM ON 12
12
PC4730
PC4730
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
VSS_SENSE 12
VSUM+
12
PR4750
PR4750
2K61R2F-1-GP
2K61R2F-1-GP
12
PR4736
PR4736
11KR2F-L-GP
11KR2F-L-GP
X02-20100108
VSUM_RR
12
PR4721
PR4721
NTC-10K-26-GP
NTC-10K-26-GP
VSUM-
NTC 10K close to Choke of Phase1
12
PC4731
PC4731
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PR4770
PR4770
1 2
DY
DY
4K02R2F-GP
4K02R2F-GP
PC4708
PC4708
12
PR4723
PR4723
0R0402-PAD
0R0402-PAD
1 2
X02-20091223
PR4731
PR4731
1 2
0R0402-PAD
0R0402-PAD
6208_FCCM
6208_PWM
2
6
3
X01 20091111
+5V_RUN
X02-20091223
12
PR4751
PR4751
0R0603-PAD
0R0603-PAD
PC4732
PC4732
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
X01 20091111
+5V_RUN
PC4734
PC4734
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
BOOT3
1
5
PU4706
PU4706
VCC
PWM
UGATE
FCCM
GND
GND
ISL6208CRZ-TGP-U
ISL6208CRZ-TGP-U
3
9
3
SCD22U16V3KX-1-GP
SCD22U16V3KX-1-GP
BOOT
PHASE
LGATE
1 2
2D2R3J-2-GP
2D2R3J-2-GP
7
8
4
PR4734
PR4734
PC4723
PC4723
PHASE3
UGATE3
LGATE3
6208_PHASE3
1 2
PU4702
PU4702
UGATE1
PHASE1
PU4703
PU4703
LGATE1
ISEN1
1 2
PR4756 10KR2F-2-GPPR4756 10KR2F-2-GP
VSUM+
1 2
PR4767 3K65R2F-1-GPPR4767 3K65R2F-1-GP
VSUM-
1 2
PR4742 1R2F-GPPR4742 1R2F-GP
ISEN2
1 2
PR4716 10KR2F-2-GPPR4716 10KR2F-2-GP
ISEN3
1 2
PR4738 10KR2F-2-GPPR4738 10KR2F-2-GP
PU4704
PU4704
UGATE2
PHASE2
PU4705
PU4705
LGATE2
ISEN2
VSUM+
VSUM-
ISEN1
ISEN3
PU4707
PU4707
UGATE3
PHASE3
PU4708
PU4708
LGATE3
ISEN3
VSUM+
VSUM-
ISEN1
ISEN2
12
PC4706
PC4706
SC10U25V6KX-1GP
678
4 5
678
DDD
DDD
G
G
4 5
678
DDD
DDD
4 5
678
DDD
DDD
G
G
4 5
1 2
PR4780 10KR2F-2-GPPR4780 10KR2F-2-GP
1 2
PR4739 3K65R2F-1-GPPR4739 3K65R2F-1-GP
1 2
PR4708 1R2F-GPPR4708 1R2F-GP
1 2
PR4760 10KR2F-2-GPPR4760 10KR2F-2-GP
1 2
PR4707 10KR2F-2-GPPR4707 10KR2F-2-GP
SC10U25V6KX-1GP
DDD S
DDD S
SI7686DP-T1-GP
SI7686DP-T1-GP
SSGD
SSGD
123
12
D
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
DY
DY
SSS
SSS
SNUBBER_1
12
123
DY
DY
PC4715
PC4715
12
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SI7686DP-T1-GP
SI7686DP-T1-GP
SSGD
S
SSGD
S
123
12
D
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
PR4728
PR4728
DY
DY
2D2R5J-1-GP
2D2R5J-1-GP
SSS
SSS
SNUBBER_2
123
12
PC4733
PC4733
DY
DY
SC330P50V2KX-3GP
SC330P50V2KX-3GP
PC4727
PC4727
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
678
DDD
DDD
SI7686DP-T1-GP
SI7686DP-T1-GP
SSGD
S
SSGD
S
123
4 5
678
12
DDD
D
DDD
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
DY
DY
SSS
SSS
G
G
SNUBBER_3
123
4 5
12
DY
DY
1 2
PR4763 10KR2F-2-GPPR4763 10KR 2F-2-GP
1 2
PR4764 3K65R2F-1-GPPR4764 3K65R2F-1-GP
1 2
PR4747 1R2F-GPPR4747 1R2F-GP
1 2
PR4719 10KR2F-2-GPPR4719 10KR 2F-2-GP
1 2
PR4765 10KR2F-2-GPPR4765 10KR 2F-2-GP
2
12
12
PC4703
PC4703
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
X02-20100116
IND-D36UH-9-GP
IND-D36UH-9-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PR4775
PR4775
PG4708
PG4708
2D2R5J-1-GP
2D2R5J-1-GP
12
PC4718
PC4718
SC330P50V2KX-3GP
SC330P50V2KX-3GP
PHASE1_R
+PWR_SRC
PC4714
PC4714
PC4713
PC4713
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
X02-20100116
PL4702
PL4702
1 2
IND-D36UH-9-GP
IND-D36UH-9-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG4712
PG4712
12
PHASE2_R
+PWR_SRC
PC4725
PC4725
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
DY
DY
X02-20100116
1 2
IND-D36UH-9-GP
IND-D36UH-9-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG4701
PG4701
PR4740
PR4740
12
2D2R5J-1-GP
2D2R5J-1-GP
PC4739
PC4739
PHASE3_RPHASE3_R
SC330P50V2KX-3GP
SC330P50V2KX-3GP
2
+PWR_SRC
PC4704
PC4704
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PL4701
PL4701
1 2
PC4712
PC4712
12
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
12
+VCC_CORE_PHASE2
PC4728
PC4728
12
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PL4703
PL4703
1
12
PC4705
PC4705
SCD1U50V3KX-GP
SCD1U50V3KX-GP
+VCC_CORE
12
12
PTC4703
PTC4703
PTC4702
12
12
PTC4705
PTC4705
PTC4706
PTC4706
ST330U2VDM-4-GP
ST330U2VDM-4-GP
+VCC_CORE
ST330U2VDM-4-GP
ST330U2VDM-4-GP
+VCC_CORE
ST330U2VDM-4-GP
ST330U2VDM-4-GP
PTC4702
SE220U2VDM-12GP
SE220U2VDM-12GP
Design Current = 48A
52.8A<OCP<67.2A
12
PTC4704
PTC4704
SE220U2VDM-12GP
SE220U2VDM-12GP
12
PTC4707
PTC4707
ST330U2VDM-4-GP
ST330U2VDM-4-GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
ISL62883_CPU_CORE
ISL62883_CPU_CORE
ISL62883_CPU_CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Berry
Berry
Berry
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
1
A00
A00
47 92Monday, March 29, 2010
47 92Monday, March 29, 2010
47 92Monday, March 29, 2010
A00
of
of
of
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG4706
PG4706
12
+VCC_CORE_PHASE1
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PG4713
PG4713
PC4726
PC4726
12
SCD1U50V3KX-GP
SCD1U50V3KX-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG4714
PG4714
12
+VCC_CORE_PHASE3+VCC_CORE_PHASE3
Page 48
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
48 92Wednesday, February 10, 2010
of
48 92Wednesday, February 10, 2010
of
48 92Wednesday, February 10, 2010
A00
A00
A00
Page 49
5
4
3
2
1
+PWR_SRC_VTT+PW R_SRC
PG4901
PG4901
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4902
PG4902
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4903
PG4903
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4904
D D
C C
PG4904
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4907
PG4907
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
M96_X01-20091124
RUNPWROK50,51,89,90
X01
1.05VTT_PWRG D
X01
1.05VTT_PWRG D37,50
1 2
PR4901 78K7R2F-GPPR4901 78K7R2F-GP
1 2
PR4903 0R0402-PADPR4903 0R 0402-PAD
X02-20091223
PC4901
PC4901
+3.3V_RUN
12
PR4908
PR4908
10KR2J-3-GP
10KR2J-3-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
PC4913
PC4913
DY
DY
A00 20100329
12
DY
DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
12
PR4904
PR4904
470KR2F-GP
470KR2F-GP
1
2
3 4
2N7002EDW-G P
2N7002EDW-G P
84.27002.F3F
84.27002.F3F
H_VTTPWRGDH_VTTPWRGDH_VTTPWRGDH_VTTPWRGDH_VTTPW RGDH_VTTPWRGDH_VTTPW RGDH_VTTPWRGD
H_VTTPWRGDH_VTTPWRGD
51218_VTT_TRIP
51218_VTT_EN
51218_VTT_VFB
51218_VTT_CCM
PQ4901
PQ4901
6
5
PU4901
PU4901
1
PGOOD
2
TRIP
3
EN
4
VFB
5
CCM
TPS51218DSCR-GP- U1
TPS51218DSCR-GP- U1
H_VTTPWRGD_R
GND
VBST
DRVH
SW
V5IN
DRVL
+3.3V_ALW
12
PR4909
PR4909
100KR2J-1-GP
100KR2J-1-GP
TPS51218 for +1.05V_VTT
PC4908
PC4908
SCD1U25V3KX-GP
11
10
9
8
7
6
+1.05V_VTT
12
PR4911
PR4911
1KR2J-1-GP
1KR2J-1-GP
51218_VBST_VTT
51218_DRVH_VTT
51218_SW_VTT
51218_DRVL_VTT
H_VTTPWRGD 9
PR4902
PR4902
2D2R3J-2-GP
2D2R3J-2-GP
1 2
51218_VBST_VTT1
+5V_ALW
12
PC4909
PC4909
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U25V3KX-GP
+PWR_SRC_VTT
DY
DY
12
X02-20100111
678
DDD
D
DDD
D
PU4902
PU4902
SIS406DN-T1-GE3-GP
SIS406DN-T1-GE3-GP
SSS
SSS
G
G
123
4 5
678
DDD
D
DDD
D
PU4904
PU4904
SIS402DN-T1-GE3-GP
SIS402DN-T1-GE3-GP
SSS
SSS
G
G
123
4 5
678
DDD
DDD
G
G
4 5
678
DDD
DDD
G
G
4 5
SC10U25V6KX-1GP
SC10U25V6KX-1GP
D
D
PU4903
PU4903
SIS406DN-T1-GE3-GP
SIS406DN-T1-GE3-GP
SSS
SSS
123
PR4905 2D2R5J-1-GP
PR4905 2D2R5J-1-GP
D
D
PU4905
PU4905
SIS402DN-T1-GE3-GP
SIS402DN-T1-GE3-GP
SSS
SSS
123
PC4912
PC4912
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4902
PC4902
1 2
X02-20100116
1 2
IND-D56UH-12-GP
IND-D56UH-12-GP
12
DY
DY
51218_SW_GND_VTT
12
DY
DY
51218_VTT_VFB
PL4901
PL4901
SC330P50V2KX-3GP
SC330P50V2KX-3GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4904
PC4904
1 2
X01 EMI stuff 20091118
SCD1U25V2KX-GP
SCD1U25V2KX-GP
PC4906
PC4906
PC4903
PC4903
1 2
1 2
x01 change tolerant 20091117
SC4D7U6D3V3KX-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PR4907
PR4907
10KR2F-2-GP
10KR2F-2-GP
PR4910
PR4910
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
PC4910
PC4910
PG4916
PG4916
12
DY
DY
+1.05V_VTT_VOUT
12
12
R1
R2
20KR2F-L-GP
20KR2F-L-GP
1 2
DY
DY
PR4906
PR4906
10R2J-2-GP
10R2J-2-GP
VTT_SENSE 12
Vout=0.704V*(R1+R2)/R2
DIS(Arrandale 1.05V_VTT)
Design Current = 20.57A
30.79A<OCP<36.39A
+1.05V_VTT
12
PTC4901
PTC4901
PC4911
PC4911
SE330U2VDM-L-GP
SE330U2VDM-L-GP
12
PTC4902
PTC4902
SE330U2VDM-L-GP
SE330U2VDM-L-GP
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Frequency setting
470K -->290KHz
200K -->340KHz
100K -->380KHz
B B
A A
5
39K -->430KHz
4
Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
H/S: SiS406DN/ POWERPAK-8/ 11.5mOhm/14.5mOhm @4.5Vgs/ 84.00406.037
L/S: SiS402DN/ POWERPAK-8/ 6.4mOhm/8mohm@4.5Vgs/ 84.00402.037
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
TPS51218_+1.05V_VTT
TPS51218_+1.05V_VTT
TPS51218_+1.05V_VTT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Berry
Berry
Berry
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
1
A00
A00
49 92Tuesday, April 06, 2010
49 92Tuesday, April 06, 2010
49 92Tuesday, April 06, 2010
A00
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5
4
3
2
1
SSID = PWR.Plane.Regulator_1p5v0p75v
+5V_ALW
PR5001
PR5001
12
5D1R3J-GP
5D1R3J-GP
14
VDDP
15
VDDP
PGND1
PGND1
VDDQS
REF
5
1 2
TPS51116_REF
12
+5V_ALW
12
PU5001
PU5001
TPS51116_VBST
22
BST
TPS51116_UGT
21
DH
TPS51116_PHS
20
LX
TPS51116_LGT
19
DL
18
17
8
9
FB
6
VCCA
+V_DDR_REF
PR5011
PR5011
0R0603-PAD
0R0603-PAD
PC5010
PC5010
SCD033U16V3KX-GP
SCD033U16V3KX-GP
TPS51116_UGT
TPS51116_VBST1
TPS51116_LGT
PC5001
PC5001
SC1U10V2KX-1GP
SC1U10V2KX-1GP
TPS51116_VDDQSNS
TPS51116_VDDQSET
SCD1U25V3KX-GP
SCD1U25V3KX-GP
+5V_ALW
DY
DY
1 2
PC5019
PC5019
PR5005
PR5005
1 2
0R3J-0-U-GP
0R3J-0-U-GP
0R2J-2-GP
0R2J-2-GP
12
PC5008
PC5008
SC1U10V2KX-1GP
SC1U10V2KX-1GP
RB551V-30-2GP
RB551V-30-2GP
TPS51116_VBST1
PR5010
PR5010
1 2
DY
DY
PD5001
PD5001
+5V_ALW
DY
DY
K A
x01-20091124
PR5002
PR5002
+3.3V_RUN
1 2
1 2
DY
DY
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
12
PC5018
PC5018
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
1 2
PC5002
PC5002
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
PR5004
PR5004
20KR2F-L-GP
20KR2F-L-GP
+1.5V_SUS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
PC5007
PC5007
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
14K7R2F-L-GP
14K7R2F-L-GP
PC5005
PC5005
DY
DY
Modified net name
D D
+PWR_SRC_1D5V
RUNPWROK49,51,89,90
1 2
PR5006 620KR2F-GPPR5006 620KR2F-GP
x01 change tolerant 20091117
RT: ASM
TI: Non_ASM
+5V_ALW
PR5008 1M1R2J-GP
PR5008 1M1R2J-GP
C C
+0D75V_DDR_P
B B
+1.5V_SUS
+0D75V_DDR_P
Design Current = 0.7A
12
12
PC5016
PC5016
PC5015
PC5015
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PR5009 0R0402-PADPR5009 0R0402-PAD
X02-20091223
12
PC5017
PC5017
x01 change tolerant 20091117
TPS51116_VDD
12
PC5003
PC5003
SC1U10V2KX-1GP
SC1U10V2KX-1GP
TPS51116_VDD_R
TPS51116_NC#12
1D5V_EN
0D75V_EN
12
TPS51116_TON
1 2
+0D75V_DDR_P +0.75V_DDR_VTT
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
16
13
PGD
12
NC#12
11
EN/PSV
10
VTTEN
23
VTTIN
7
NC#7
TPS51116RGER-GP-U
TPS51116RGER-GP-U
1
PGND2
4
TON
24
VTT
2
VTTS
GND
25
PG5001
PG5001
12
PG5016
PG5016
12
ILIM
VSSA
3
State S3 S5 VDDR VTTREF VTT
S0
Hi Hi
S3
S4/S5
Lo Lo
VDDQSET VDDQ (V) VTTREF and VTT NOTE
GND
A A
V5IN
FB Resistors
2.5
1.8
Adjustable
OnOnOnOnOn
HiLo
Off Off Off
5
VVDDQSNS/2
VVDDQSNS/2
VVDDQSNS/2
Off(Hi-Z)
DDR
DDR2
1.5 V < VVDDQ < 3 V
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 220U 2V EEFCX0D221ER 15mOhm 2.7Arms PANASONIC/ 79.22719.20L
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
Switching freq-->400KHz
4
S3 Power Reduction X01 20091111
5
+5V_ALW
DY
DY
+1.5V_RUN_CPU
PR5017
PR5017
DY
DY
1.5V_RUN_CPU_EN
4K7R2J-2-GP
4K7R2J-2-GP
12
DY
DY
12
PC5024
PC5024
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1
DY
DY
x01 change tolerant 20091118
PM_SLP_S4#22,37
+PWR_SRC_1D5V
678
PU5002
PU5002
DDD S
DDD S
SI7686DP-T1-GP
SI7686DP-T1-GP
SSGD
SSGD
123
4 5
TPS51116_PHS
678
PU5003
PU5003
DDD
D
DDD
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
SSS
SSS
G
G
123
4 5
3
PS_S3CNTRL18,42
12
PR5016
PR5016
100KR2J-1-GP
100KR2J-1-GP
1.5V_RUN_CPU_EN#
3
PQ5001
PQ5001
PMBS3904-1-GP
PMBS3904-1-GP
2
X02-20091223
678
DDD
DDD
DY
DY
G
G
4 5
PQ5002
PQ5002
G
.
...
.....
.
S
DY
DY
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
1 2
PR5007 0R0402-PADPR5007 0R0402-PAD
PU5004
PU5004
D
D
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
SSS
SSS
123
DY
DY
X02-20100201
PQ5003
PQ5003
G
.....
.....
0D75V_EN
S
D
D
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
0D75V_EN_L
PM_SLP_S3#22,37,42,47,51,89
1D5V_EN
12
PC5006
PC5006
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
+3.3V_RUN
12
DY
DY
0R2J-2-GP
0R2J-2-GP
PR5018
PR5018
10KR2J-3-GP
10KR2J-3-GP
PR5003
PR5003
1 2
X02-20091224
0R0402-PAD
0R0402-PAD
DY
DY
x01 change tolerant 20091117
PC5009
PC5009
PC5011
PC5011
PC5012
1 2
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC5012
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
X02-20100116
PL5001
PL5001
12
PR5012
PR5012
DY
DY
2D2R5F-2-GP
2D2R5F-2-GP
TPS51116_PHS_SET
12
PC5022
PC5022
SC330P50V2KX-3GP
SC330P50V2KX-3GP
1 2
IND-1D5UH-34-GP
IND-1D5UH-34-GP
TPS51116_VDDQSNS
TPS51116_VDDQSET
2
PR5013
PR5013
30KR2F-GP
30KR2F-GP
PR5014
PR5014
30KR2F-GP
30KR2F-GP
PR5019
PR5019
DY
DY
1 2
1.05VTT_PWRGD 37,49
PR5015
PR5015
0R2J-2-GP
0R2J-2-GP
1 2
12
x01 change tolerant 20091117
12
PC5004
PC5004
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
12
PC5014
PC5014
PC5013
PC5013
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1 2
PG5017
PG5017
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
12
12
DY
DY
PC5023
PC5023
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
12
0D75V_EN 9
+PWR_SRC
Design Current = 14.45A
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
22.71A<OCP< 26.84A
12
12
PC5021
PC5021
PC5020
PC5020
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
x01 change tolerant 20091117
Close to VFB Pin (pin5)
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+PWR_SRC_1D5V
PG5002
PG5002
12
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5003
PG5003
12
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5004
PG5004
12
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5006
PG5006
12
GAP-CLOSE-PWR
GAP-CLOSE-PWR
+1.5V_SUS
x01 change to 330uF 20091124
PTC5001
PTC5001
PTC5002
PTC5002
12
12
DY
DY
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
TPS51116_+1.5V_SUS
TPS51116_+1.5V_SUS
TPS51116_+1.5V_SUS
Berry
Berry
Berry
1
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50 92Monday, March 29, 2010
50 92Monday, March 29, 2010
50 92Monday, March 29, 2010
Page 51
5
4
SSID = PWR.Plane.Regulator_1p8v
3
2
1
D D
+3.3V_ALW
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
C C
B B
PG5107
PG5107
PG5106
PG5106
+1.8V_RUN_VIN
12
12
X02-20091223
RUNPWROK49,50,89,90
PM_SLP_S3#22,37,42,47,50,89
PR5113 0R0402-PADPR5113 0R0402-PAD
PR5109 0R0402-PADPR5109 0R0402-PAD
APL5930 for +1.8V_RUN
+1.8V_RUN_VIN+5V_ALW
12
PC5110
PC5110
SC1U10V2KX-1GP
SC1U10V2KX-1GP
6
PU5101
PU5101
1 2
1 2
1.8V_RUN_POK
1D8V_RUN_EN
APL5930KAI-TRG-GP
APL5930KAI-TRG-GP
12
DY
DY
PC5114
PC5114
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
7
POK
8
EN
VIN#5
VIN#9
VCNTL
VOUT#3
VOUT#4
GND
1
5
9
3
4
2
FB
SO-8-P
5912_1.8V_RUN_FB
12
PC5109
PC5109
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
16K5R2F-2-GP
16K5R2F-2-GP
12
PR5111
PR5111
12
PR5110
PR5110
13K3R2F-L1-GP
13K3R2F-L1-GP
12
PC5113
PC5113
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DY
DY
Design Current =1.23A
+1.8V_RUN_P
SC22U6D3V5MX-2GP
12
PC5108
PC5108
SC22U6D3V5MX-2GP
12
PC5111
PC5111
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
PC5112
PC5112
DY
DY
Vout=0.8V*(R1+R2)/R2
+1.8V_RUN_P
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5105
PG5105
1 2
PG5108
PG5108
1 2
+1.8V_RUN
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
APL5930_+1.8V_RUN
APL5930_+1.8V_RUN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
APL5930_+1.8V_RUN
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
51 92Monday, March 29, 2010
51 92Monday, March 29, 2010
51 92Monday, March 29, 2010
1
A00
A00
A00
Page 52
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
52 92Wednesday, February 10, 2010
of
52 92Wednesday, February 10, 2010
of
52 92Wednesday, February 10, 2010
A00
A00
A00
Page 53
5
SSID = CPU.GFX.Regulator
X02-20091223
GFX_VR_EN13
D D
51611_VREFF
UMA
UMA
X01 20091121
Close to VGA
DY
UMA
UMA
PR5325
PR5325
DY
1 2
PR5321 NTC-100K-10-GP
PR5321 NTC-100K-10-GP
1 2
PR5322 0R2J-2-GP
PR5322 0R2J-2-GP
1 2
5
1 2
DY
DY
PR5320 11K8R2F-GP
PR5320 11K8R2F-GP
PM_EXTTS#0_C9
C C
GFX_IMON13
18K7R2F-GP
18K7R2F-GP
GFX_DPRSLPVR13
GFX_VID613
GFX_VID513
GFX_VID413
GFX_VID313
GFX_VID213
GFX_VID113
GFX_VID013
B B
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
I0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V EEFSX0D331ER 9mOhm 3Arms PANASONIC/ 79.33719.L01
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
A A
1 2
PR5310 0R 0402-PADPR5310 0R0402-PAD
51611_VREFF
6263AGND
UMA
UMA
1 2
UMA
UMA
1 2
PR5312 1K69R 2F-2-GP
PR5312 1K69R 2F-2-GP
A00-20100224
12
PC5315
PC5315
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
51611_CSP
51611_CSN
51611_GSNS
51611_VSNS
51611_THERM
DY
DY
12
PC5317
PC5317
UMA
UMA
SC3300P50V2KX-1GP
SC3300P50V2KX-1GP
PRN5301
PRN5301
6
7
UMA
UMA
8
SRN0J-7-GP
SRN0J-7-GP
PRN5302
PRN5302
6
7
UMA
UMA
8
SRN0J-7-GP
SRN0J-7-GP
51611_VREFF
PR5311
PR5311
UMA
UMA
1 2
90K9R2F-GP
90K9R2F-GP
1 2
PC5313 SC2D2U10V 3KX-1GP
PC5313 SC2D2U10V 3KX-1GP
UMA
UMA
PC5314
PC5314
SC68P50V2JN-1GP
SC68P50V2JN-1GP
51611_VREFF
51611_DROOP
32
31
33
PU5301
PU5301
GND
VREF
1
GND
2
CSP
3
CSN
4
GNDSNS
5
TPS51611RHBR-GP
TPS51611RHBR-GP
VSNS
6
7
8
51611_DPRSLP_1
51611_VID6
51611_VID5
51611_VID4
51611_VID3
51611_VID2
51611_VID1
51611_VID0
THERM
VR_TT#
IMON
DPRSLP9VID610VID511VID412VID313VID214VID115VID0
51611_VR_TT 6236A_BOOT_C
45
3
2
1
45
3
2
1
51611_V5FILT
30
V5FILT
DROOP
UMA
UMA
UMA
UMA
51611_ISLEW
29
ISLEW
UMA
UMA
1 2
51611_OSRSEL
28
OSRSEL
DY
1 2
PR5313 0R2J-2-GP
PR5313 0R2J-2-GP
PR5314 0R2J-2-GP
PR5314 0R2J-2-GP
51611_TONSEL
27
TONSEL
51611_TRIPSEL
1 2
PR5315 0R2J-2-GPDYPR5315 0R2J-2-GP
26
TRIPSEL
+3.3V_ALW
51611_VREFF
DY
UMA
UMA
1 2
PR5316 0R2J-2-GPDYPR5316 0R2J-2-GP
51611_VR_ON
25
VR_ON
CLKEN#
PGOOD
MODE
V5IN
DRVL
LL
VBST
DRVH
74.51611.073
74.51611.073
16
4
DY
1 2
1 2
1K91R2F-1-GP
1K91R2F-1-GP
PR5318 0R2J-2-GPDYPR5318 0R2J-2-GP
PR5317 0R2J-2-GP
PR5317 0R2J-2-GP
24
23
22
21
20
19
18
17
6263AGND
4
+3.3V_RUN
PR5319
PR5319
UMA
UMA
1 2
51611_CLKEN
51611_BOOT
51611_CSP
51611_CSN
X02-20091223
PR5333
PR5333
1 2
0R0402-PAD
0R0402-PAD
VCC_AXG_SENSE13
VSS_AXG_SENSE13
12
DY
51611_PGOOD
UMA
UMA
UMA
UMA
PR5301 10KR2F-2-GPDYPR5301 10KR2F-2-GP
2D2R3J-2-GP
2D2R3J-2-GP
1 2
PR5323
PR5323
51611_UGATE
51611_LGATE
12
PC5320
PC5320
SC33P50V2JN-3GP
SC33P50V2JN-3GP
12
PC5322
PC5322
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+3.3V_RUN
+5V_ALW
PC5301
PC5301
1 2
UMA
UMA
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
UMA
UMA
PR5327
PR5327
1 2
UMA
UMA
330R2F-GP
330R2F-GP
UMA
UMA
PR5332
PR5332
1 2
UMA
UMA
330R2F-GP
330R2F-GP
X01 20091118
51611_PHASE51611_THERM_R
PC5316
PC5316
1 2
SCD22U16V3KX-2-GP
SCD22U16V3KX-2-GP
UMA
UMA
Close to choke (L5301)
51611_CSP_R
12
12
PC5321
PC5321
PC5326
PC5326
DY
DY
SCD022U50V3KX-GP
SCD022U50V3KX-GP
SCD022U50V3KX-GP
SCD022U50V3KX-GP
X01-0713
+CPU_GFX_COR E
PR5334
PR5334
100R2F-L1-GP-U
100R2F-L1-GP-U
UMA
UMA
1 2
PR5335
PR5335
100R2F-L1-GP-U
100R2F-L1-GP-U
UMA
UMA
1 2
SI7686DP-T1-GP
SI7686DP-T1-GP
UMA
UMA
1 2
51611_CSP_CSN
12
3
PU5302
PU5302
UMA
UMA
4 5
DDD
DDD
PU5303
PU5303
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
G
G
UMA
UMA
4 5
PR5326
PR5326
NTC-100K-10-GP
NTC-100K-10-GP
PR5331
PR5331
29K4R2F-GP
29K4R2F-GP
UMA
UMA
51611_GSNS
51611_VSNS
PG5324
PG5324
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG5325
PG5325
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
3
+PWR_SRC +VGFXCORE_PWR_SRC
PG5301
PG5301
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5303
PG5303
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5305
PG5305
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5308
PG5308
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5311
PG5311
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
12
PC5302
PC5302
UMA
S
S
123
D
D
SSS
SSS
123
12
1 2
PR5330
PR5330
86K6R2F-GP
86K6R2F-GP
UMA
UMA
UMA
PU5304
PU5304
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
PR5328
PR5328
UMA
UMA
24K3R2F-1-GP
24K3R2F-1-GP
678
DDD
DDD
DY
DY
G
G
4 5
678
DDD
DDD
678
SSGD
SSGD
X01 20091124
PC5323
PC5323
UMA
UMA
SC33P50V2JN-3GP
SC33P50V2JN-3GP
12
PC5324
PC5324
UMA
UMA
SC33P50V2JN-3GP
SC33P50V2JN-3GP
PC5325
PC5325
1 2
UMA
UMA
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
UMA
UMA
D
D
SSS
SSS
123
12
+VGFXCORE_PWR_SRC
12
12
PC5303
PC5303
UMA
UMA
SC10U25V6KX-1GP
SC10U25V6KX-1GP
12
PR5324
PR5324
DY
DY
PG5322
PG5322
2D2R3J-2-GP
2D2R3J-2-GP
51611_RF
12
DY
DY
PC5318
PC5318
SC470P50V2KX-3GP
SC470P50V2KX-3GP
51611_CSP_G
PC5304
PC5304
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X02-20100116
IND-D56UH-12-GP
IND-D56UH-12-GP
12
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
51611_CSN_R
PL5301
PL5301
1 2
UMA
UMA
PG5323
PG5323
2
Design Current =17.6A
27.2<OCP<32.15A
+CPU_GFX_COR E
PC5319
SC22U6D3V5MX-2GPDYPC5319
SC22U6D3V5MX-2GP
PC5312
SC22U6D3V5MX-2GPDYPC5312
SC22U6D3V5MX-2GP
PC5311
SC22U6D3V5MX-2GPDYPC5311
SC22U6D3V5MX-2GP
PTC5302
SE330U2VDM-L-GP
PTC5302
SE330U2VDM-L-GP
PTC5301
PTC5301
UMA
UMA
12
12
SE330U2VDM-L-GP
SE330U2VDM-L-GP
UMA
UMA
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
12
12
12
DY
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
2
12
DY
DY
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
TPS51611_+GFX_CORE(UMA)
TPS51611_+GFX_CORE(UMA)
TPS51611_+GFX_CORE(UMA)
Berry
Berry
Berry
1
53 92Monday, March 29, 2010
53 92Monday, March 29, 2010
53 92Monday, March 29, 2010
of
of
of
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A00
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Page 54
SSID = VIDEO
LVDS CONNECTOR
LCD1
LCD1
48
41
42
43
44
45
46
47
49
IPEX-CONN40-2R-GP-U
IPEX-CONN40-2R-GP-U
20.F1093.040
20.F1093.040
x01 change tolerant 20091117
50
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
51
Camera Power
X02-20091222
R5414
R5414
1 2
0R0603-PAD
0R0603-PAD
EC5405
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
EC5405
GFX_PWR_SRC
+LCDVDD
3.3V_LCD_RUN
LCD_BRIGHTNESS
BLON_OUT_C
LCD_CBL_DET#_C
LCD_TST_C
LCD_DET_G
For Camera GND
+3.3V_CAMERA+3.3V_RUN
12
12
DY
DY
x02-20091208
DIS
3.3V_LCD_RUN
x01 change tolerant 20091117
12
C5401
C5401
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
LVDSB_TX2 55
LVDSB_TX2# 55
LVDSB_TX1 55
LVDSB_TX1# 55
LVDSB_TX0 55
LVDSB_TX0# 55
LVDSB_TXC 55
LVDSB_TXC# 55
LVDSA_TXC 55
LVDSA_TXC# 55
LVDSA_TX2 55
LVDSA_TX2# 55
LVDSA_TX1 55
LVDSA_TX1# 55
LVDSA_TX0 55
LVDSA_TX0# 55
GPU_LVDS_DATA 20,82
GPU_LVDS_CLK 20,82
+3.3V_CAMERA
C5403
C5403
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
DIS
1 2
R5404 0R2J-2-GP
R5404 0R2J-2-GP
UMA
UMA
1 2
R5407 0R2J-2-GP
R5407 0R2J-2-GP
C5402
C5402
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
USB_CAMERA#
USB_CAMERA
Close to LVDS connector
LVDSB_TXC#
LVDSB_TXC
LVDSA_TXC#
LVDSA_TXC
EC5406
EC5406
+3.3V_RUN_VGA
+3.3V_RUN
LCD_BRIGHTNESS
12
EC5407
EC5407
DY
DY
DY
DY
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
1 2
R5408 100KR2J-1-GPR5408 100KR2J-1-GP
BLON_OUT_C
12
12
EC5408
EC5408
DY
DY
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
+3.3V_RUN
12
R5401
R5401
DY
DY
10KR2J-3-GP
10KR2J-3-GP
R5405
R5405
DY
DY
100KR2J-1-GP
100KR2J-1-GP
1 2
LCD_CBL_DET#_C
LCD_TST_C
LCD_DET_G
SRN100J-4-GP
SRN100J-4-GP
A00-20100204
R5409 0R0603-PADR5409 0R0603-PAD
R5411 0R0603-PADR5411 0R0603-PAD
12
EC5409
EC5409
DY
DY
SC5D6P50V2CN-1GP
SC5D6P50V2CN-1GP
R5402
R5402
RN5401
RN5401
1
2
3
4 5
1 2
1 2
100R2J-2-GP
100R2J-2-GP
1 2
8
7
6
LCD_BRIGHTNESS
LCD_TST_C
12
12
EC5401
EC5401
DY
DY
DY
DY
SC33P50V2JN-3GP
SC33P50V2JN-3GP
For EMI request
LBKLT_CTL 55
BLON_OUT 37
LCD_CBL_DET# 37
LCD_TST 37
USB_PN13 21
USB_PP13 21
EC5402
EC5402
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SSID = Inverter
GFX_PWR_SRC
12
C5407
C5406
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C5406
C5407
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
SSID = VIDEO
LCD POWER
+15V_ALW
LCDVDD_EN55
D5401
D5401
BAT54C-U-GP
BAT54C-U-GP
LCD_TST_EN37
1 2
R5412 330KR2J-L1-GPR5412 330KR2J-L1-GP
1 2
C5409 SCD1U25V2KX-GPC5409 SCD1U25V2KX-GP
R5406
R5406
12
LCDVCC_EN
3
INVERTER POWER
34
2
1
FPVCC_CTL3
+PWR_SRC
150R3J-L-GP
150R3J-L-GP
LCDVDD_1
54 92Monday, March 29, 2010
54 92Monday, March 29, 2010
54 92Monday, March 29, 2010
+LCDVDD
R5416
R5416
of
of
of
Change Poly-fuse
F5401
F5401
12
POLYSW-1D1A24V-GP-U
POLYSW-1D1A24V-GP-U
Main:69.50007.A41
Second:69.50007.A31
+3.3V_RUN
Q5401
Q5401
D
D
D
1
2
3 4
FPVCC_CTL1
12
DY
DY
100KR2J-1-GP
100KR2J-1-GP
+5V_ALW
Q5403
Q5403
R1
R1
1
R2
R2
PDTC144EU-1-GP
PDTC144EU-1-GP
X01 change part-20091116
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
LCD/Inverter Connector
LCD/Inverter Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
LCD/Inverter Connector
Berry
Berry
Berry
D
6
D
D
D
D
G
G
SI3456DDV-T1-GE3-GP
SI3456DDV-T1-GE3-GP
84.27002.F3F
84.27002.F3F
3
2
5
S
S
Q5402
Q5402
5
6
2N7002EDW-GP
2N7002EDW-GP
1 2
R5415 100KR2J-1-GPR5415 100KR2J-1-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
12
A00
A00
A00
Page 55
5
4
3
2
1
LVDS Channel A
RN5501
RN5501
PCH_LVDSA_TX2#20
PCH_LVDSA_TX220
PCH_LVDSA_TXC#20
PCH_LVDSA_TXC20
D D
Impedance:85 ohm
GPU_LVDSA_TX2#82
GPU_LVDSA_TX282
GPU_LVDSA_TXC#82
GPU_LVDSA_TXC82
Impedance:100 ohm
PCH_LVDSA_TX0#20
PCH_LVDSA_TX020
PCH_LVDSA_TX1#20
PCH_LVDSA_TX120
Impedance:85 ohm
GPU_LVDSA_TX0#82
GPU_LVDSA_TX082
GPU_LVDSA_TX1#82
GPU_LVDSA_TX182
Impedance:100 ohm
C C
UMA
UMA
DIS
DIS
UMA
UMA
DIS
DIS
6
7
8
SRN0J-7-GP
SRN0J-7-GP
RN5503
RN5503
4 5
3
2
1
SRN0J-7-GP
SRN0J-7-GP
RN5507
RN5507
6
7
8
SRN0J-7-GP
SRN0J-7-GP
RN5508
RN5508
4 5
3
2
1
SRN0J-7-GP
SRN0J-7-GP
45
3
2
1
LVDSA_TX2# 54
LVDSA_TX2 54
LVDSA_TXC# 54
LVDSA_TXC 54
Impedance:90 ohm
6
7
8
45
3
2
1
6
7
8
LVDSA_TX0# 54
LVDSA_TX0 54
LVDSA_TX1# 54
LVDSA_TX1 54
Impedance:90 ohm
LVDSA_TX0# 54
LVDSA_TX0 54
LVDSA_TX1# 54
LVDSA_TX1 54
Panel BL brightness/Power En/BL En
RN5502
RN5502
45
3
PCH_VGA_BLEN20
PCH_LCDVDD_EN20
PCH_LBKLT_CTL20
VGA_BLEN82
VGA_LBKLT_CTL82
VGA_LCDVDD_EN82
6
7
UMA
UMA
8
SRN0J-7-GP
SRN0J-7-GP
RN5504
RN5504
6
7
8
SRN0J-7-GP
SRN0J-7-GP
DIS
DIS
2
1
45
3
2
1
PANEL_BLEN 37
LCDVDD_EN 54
LBKLT_CTL 54
LVDS Channel B
RN5505
RN5505
PCH_LVDSB_TXC#20
PCH_LVDSB_TXC20
PCH_LVDSB_TX0#20
PCH_LVDSB_TX020
Impedance:85 ohm
GPU_LVDSB_TXC#82
GPU_LVDSB_TXC82
GPU_LVDSB_TX0#82
GPU_LVDSB_TX082
B B
Impedance:100 ohm
PCH_LVDSB_TX1#20
PCH_LVDSB_TX120
PCH_LVDSB_TX2#20
PCH_LVDSB_TX220
Impedance:85 ohm
GPU_LVDSB_TX1#82
GPU_LVDSB_TX182
GPU_LVDSB_TX2#82
GPU_LVDSB_TX282
Impedance:100 ohm
UMA
UMA
UMA
UMA
DIS
DIS
DIS
DIS
6
7
8
SRN0J-7-GP
SRN0J-7-GP
RN5510
RN5510
4 5
3
2
1
SRN0J-7-GP
SRN0J-7-GP
RN5509
RN5509
6
7
8
SRN0J-7-GP
SRN0J-7-GP
RN5506
RN5506
4 5
3
2
1
SRN0J-7-GP
SRN0J-7-GP
45
3
2
1
6
7
8
45
3
2
1
6
7
8
LVDSB_TXC# 54
LVDSB_TXC 54
LVDSB_TX0# 54
LVDSB_TX0 54
Impedance:90 ohm
LVDSB_TXC# 54
LVDSB_TXC 54
LVDSB_TX0# 54
LVDSB_TX0 54
LVDSB_TX1# 54
LVDSB_TX1 54
LVDSB_TX2# 54
LVDSB_TX2 54
Impedance:90 ohm
LVDSB_TX1# 54
LVDSB_TX1 54
LVDSB_TX2# 54
LVDSB_TX2 54
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
LVDS_Switch
LVDS_Switch
LVDS_Switch
1
of
55 92Monday, March 29, 2010
of
55 92Monday, March 29, 2010
of
55 92Monday, March 29, 2010
A00
A00
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5
D D
4
3
2
1
(Blanking)
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
LVDS_Switch
LVDS_Switch
LVDS_Switch
56 92Wednesday, February 10, 2010
56 92Wednesday, February 10, 2010
56 92Wednesday, February 10, 2010
1
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5
SSID = VIDEO
x01 change to 10V tolerant 20091117
D D
+3.3V_RUN
R5703 4K7R2J-2-GP
R5703 4K7R2J-2-GP
R5704 4K7R2J-2-GP
R5704 4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
Change from 5.1K to 4.7K.
C C
B B
C5717
C5717
UMA
UMA
12
UMA
UMA
12
DY
DY
12
R5706
R5706
+3.3V_RUN
DY
DY
Impedance:100 ohm
HDMI Level Shifter & CONNECTOR
+3.3V_RUN +3.3V_RUN
12
12
R5701
R5701
R5702
R5702
DY
DY
4K7R2J-2-GP
+3.3V_RUN
12
12
C5716
C5716
UMA
UMA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
HDMI_PCH_CLK#20,82
HDMI_PCH_CLK20,82
HDMI_PCH_DATA0#20,82
HDMI_PCH_DATA020,82
HDMI_PCH_DATA1#20,82
HDMI_PCH_DATA120,82
HDMI_PCH_DATA2#20,82
HDMI_PCH_DATA220,82
1 2
UMA
UMA
R5708 4K7R2J-2-GP
R5708 4K7R2J-2-GP
1st Parade 71.P8101.003
2nd Pericom 71.03411.B03
12
C5715
C5715
UMA
UMA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R5705
R5705
UMA
UMA
499R2F-2-GP
499R2F-2-GP
12
HDMI_DDC_EN
12
C5714
C5714
C5701
C5701
UMA
UMA
UMA
UMA
2
3
4
6
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
U5701
U5701
IN_D1IN_D1+
IN_D2IN_D2+
IN_D3IN_D3+
IN_D4IN_D4+
PC0
PC1
REXT
RT_EN#
OE#
DDC_EN
PS8101-GP
PS8101-GP
11
VCC
GND
1
5
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
38
39
41
42
44
45
47
48
HDMI_PC0
HDMI_PC1
HDMI_REXT
12
10
HDMI_OE# DDC_DATA_HDMI
25
32
HDMI DISCRETE/ UMA Co-lay
Close to Level Shift
RN5708 SRN0J-6-GP
HDMI_PCH_CLK#
HDMI_PCH_CLK
HDMI_PCH_DATA0#
HDMI_PCH_DATA1#
HDMI_PCH_DATA2# HDMI_DATA2#_R
HDMI_PCH_DATA2 HDMI_DATA2_R
RN5708 SRN0J-6-GP
2 3
DIS
DIS
1
4
2 3
DIS
DIS
1
4
RN5709 SRN0J-6-GP
RN5709 SRN0J-6-GP
RN5710 SRN0J-6-GP
RN5710 SRN0J-6-GP
2 3
DIS
DIS
1
4
2 3
DIS
DIS
1
4
RN5711 SRN0J-6-GP
RN5711 SRN0J-6-GP
HDMI_CLK#_R
HDMI_CLK_R
HDMI_DATA0#_R
HDMI_DATA0_RHDMI_PCH_DATA0
HDMI_DATA1#_R
HDMI_DATA1_RHDMI_PCH_DATA1
Close to HDMI Connector
Impedance:100 ohm
+5V_RUN
15
21
VCC
VCC
UMA
UMA
GND
GND
12
18
12
DY
DY
26
VCC
GND
24
4K7R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
DY
DY
HDMI_CCT2
HDMI_CCT1
33
40
46
35
VCC
VCC
VCC
VCC
NC#3434NC#35
OUT_D1-
OUT_D1+
OUT_D2-
OUT_D2+
OUT_D3-
OUT_D3+
OUT_D4-
OUT_D4+
HPD_SINK
SDA_SINK
SCL_SINK
GND
GND
GND
GND36GND
GND
GND
27
31
37
43
49
x01 change tolerant 20091117
C5706 SCD1U10V2KX-5GP
C5706 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5707 SCD1U10V2KX-5GP
C5707 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5708 SCD1U10V2KX-5GP
C5708 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5709 SCD1U10V2KX-5GP
C5709 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5713 SCD1U10V2KX-5GP
C5713 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5710 SCD1U10V2KX-5GP
C5710 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5711 SCD1U10V2KX-5GP
C5711 SCD1U10V2KX-5GP
1 2
DIS
DIS
C5712 SCD1U10V2KX-5GP
C5712 SCD1U10V2KX-5GP
1 2
DIS
DIS
HDMI_PLL_GND
D
.
.
DIS
DIS
.
.
.
.
.
.
.
.
G
R5714
R5714
100KR2J-1-GP
100KR2J-1-GP
4
Impedance:100 ohm
Close to HDMI Connector
HDMI_LS_TXC#
23
HDMI_LS_TXC
22
HDMI_LS_TX0#
20
HDMI_LS_TX0
19
HDMI_LS_TX1#
17
HDMI_LS_TX1
16
HDMI_LS_TX2#
14
HDMI_LS_TX2
13
8
SDA
9
SCL
7
HPD
HPD_HDMI_CON
30
29
DDC_CLK_HDMI
28
12
12
DIS
DIS
DIS
DIS
R5715 499R2F-2-GP
R5715 499R2F-2-GP
Q5703
Q5703
2N7002E-1-GP
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
S
1
2 3
SRN0J-6-GP
SRN0J-6-GP
1
2 3
SRN0J-6-GP
SRN0J-6-GP
1
2 3
SRN0J-6-GP
SRN0J-6-GP
1
2 3
DY
DY
Impedance:100 ohm
12
12
DIS
DIS
DIS
DIS
R5716 499R2F-2-GP
R5716 499R2F-2-GP
R5718 499R2F-2-GP
R5718 499R2F-2-GP
R5717 499R2F-2-GP
R5717 499R2F-2-GP
UMA
UMA
UMA
UMA
UMA
UMA
UMA
UMA
PCH_HDMI_DATA 20
PCH_HDMI_CLK 20
12
R5707
R5707
20KR2J-L2-GP
20KR2J-L2-GP
12
12
DIS
DIS
DIS
DIS
R5719 499R2F-2-GP
R5719 499R2F-2-GP
RN5703SRN0J-6-GP
RN5703SRN0J-6-GP
4
RN5704
RN5704
4
RN5706
RN5706
4
RN5707
RN5707
4
HDMI_PCH_DET 20
12
DIS
DIS
R5720 499R2F-2-GP
R5720 499R2F-2-GP
R5721 499R2F-2-GP
R5721 499R2F-2-GP
HDMI_CLK#
HDMI_CLK
HDMI_DATA0#
HDMI_DATA0
HDMI_DATA1#
HDMI_DATA1
HDMI_DATA2#
HDMI_DATA2
HDMI_DATA0#
HDMI_DATA1#
HDMI_DATA2#
12
DIS
DIS
R5722 499R2F-2-GP
R5722 499R2F-2-GP
HDMI_CLK#
HDMI_CLK
HDMI_DATA0
HDMI_DATA1
HDMI_DATA2
3
HDMI CONN
HDMI1
HDMI1
22
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
SKT-HDMI19P-69-GP
SKT-HDMI19P-69-GP
23
22.10296.211
22.10296.211
200KR2J-L1-GP
200KR2J-L1-GP
+3.3V_RUN_VGA
+5V_RUN
DDC_CLK_HDMI
DDC_DATA_HDMI
HPD_HDMI_CON
12
R5710
R5710
DY
DY
SRN2K2J-1-GP
SRN2K2J-1-GP
U5702
U5702
1
1OE
1A
7
2A
2OE
DY
DY
8
VCC
1B
4
GND
2B
TSCBTD3305CPW R-GP
TSCBTD3305CPW R-GP
GPU_HDMI_CLK
GPU_HDMI_DATA
HDMI_DATA2
HDMI_DATA2#
HDMI_DATA1
HDMI_DATA1#
HDMI_DATA0
HDMI_DATA0#
HDMI_CLK
HDMI_CLK#
DIS
DIS
HDMI_HPD_B
1 2
R5711 150KR2J-L1-GP
R5711 150KR2J-L1-GP
+3.3V_RUN_VGA
4
RN5702
RN5702
DY
DY
1
2 3
2
5
3
6
RN5705
RN5705
2 3
1
SRN0J-6-GP
SRN0J-6-GP
+3.3V_RUN_VGA
R5712
R5712
10KR2J-3-GP
10KR2J-3-GP
DIS
DIS
1
DIS
DIS
+5V_RUN
4
1
4
+5V_RUN
12
C5705
C5705
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
3
Q5702
Q5702
PMBS3904-1-GP
PMBS3904-1-GP
2
12
DIS
DIS
RN5701
RN5701
SRN1K5J-GP
SRN1K5J-GP
5V Tolerance
2 3
GPU_HDMI_CLK 82
GPU_HDMI_DATA 82
DDC_CLK_HDMI
DDC_DATA_HDMI
2
12
R5709
R5709
UMA
UMA
20KR2J-L2-GP
20KR2J-L2-GP
HDMI_OE#
D
Q5701
Q5701
.
.
UMA
UMA
HPD_HDMI_CON
.
.
G
2N7002E-1-GP
2N7002E-1-GP
.
.
.
.
84.2N702.D31
84.2N702.D31
.
.
S
x01 change tolerant 20091117
HDMI_HPD_DET 82
1
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Berry
Berry
Berry
Taipei Hsien 221, Taiw an, R.O.C.
1
A00
A00
57 92Monday, March 29, 2010
57 92Monday, March 29, 2010
57 92Monday, March 29, 2010
A00
of
of
of
Title
Title
Title
HDMI Level Shifter/Connector
HDMI Level Shifter/Connector
HDMI Level Shifter/Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Page 58
5
4
3
2
1
SSID = User.Interface
ITP Connector
D D
H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.
CPU
TCK(PIN AC5)
C C
ITP Connector
TCK(PIN 5)
FBO(PIN 11)
SSID = Thermal
Fan Connector
B B
31
*Layout* 15 mil
EMC2102_FAN_TACH39
EMC2102_FAN_DRIVE39
12
C5801
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
A A
C5801
AFTP5801AFTP5801
KA
D5801
D5801
RB551V-30-2GP
RB551V-30-2GP
1
FAN1
FAN1
5
3
2
1
4
FOX-CON3-6-GP-U
FOX-CON3-6-GP-U
20.D0210.103
AFTP5802AFTP5802
AFTP5803AFTP5803
EMC2102_FAN_TACH
1
EMC2102_FAN_DRIVE
1
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ITP/Fan Connector
ITP/Fan Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
ITP/Fan Connector
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
58 92Monday, March 29, 2010
of
58 92Monday, March 29, 2010
of
58 92Monday, March 29, 2010
1
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A00
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Page 59
SSID = SATA
SATA HDD Connector
+3.3V_RUN
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
+5V_RUN
12
C5904
C5904
DY
DY
SC10U10V5KX-2GP
SC10U10V5KX-2GP
x01 Change tolerant 20091117
SATA_TXP024
SATA_TXN024
SATA_RXP0_C24
SATA_RXN0_C24
x01 Change tolerant 20091117
12
C5901
C5901
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C5906
C5905
C5905
C5903 SCD01U16V2KX-3GPC5903 SCD01U16V2KX-3GP
1 2
C5902 SCD01U16V2KX-3GPC5902 SCD01U16V2KX-3GP
1 2
C5906
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
ODD Connector
SATA_RXP0
SATA_RXN0
HDD1
HDD1
P1
V33
P2
V33
P3
V33
P7
V5
P8
V5
P9
V5
P13
P14
P15
S2
S3
S6
S5
SKT-SATA7P-15P-17-GP
SKT-SATA7P-15P-17-GP
62.10065.C71
62.10065.C71
V12
V12
V12
A+
A-
B+
B-
GND
GND
GND
GND
GND
GND
GND
GND
DAS/DSS
16
16
17
17
18
18
S1
S4
S7
P4
P5
P6
P10
P12
P11
ODD1
ODD1
8
NP1
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
NP2
9
SKT-SATA7P+6P-42-GP
SKT-SATA7P+6P-42-GP
62.10065.581
62.10065.581
SATA_RX1-_C
SATA_RX1+_C
SATA_TXP1 24
C5907 SCD01U16V2KX-3GPC5907 SCD01U16V2KX-3GP
1 2
C5908 SCD01U16V2KX-3GPC5908 SCD01U16V2KX-3GP
1 2
SATA_TXN1 24
SATA_RXN1_C 24
SATA_RXP1_C 24
x01 Change tolerant 20091117
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 Change tolerant 20091117
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
+5V_RUN
12
12
C5910
C5910
SC10U10V5KX-2GP
C5909
C5909
SC10U10V5KX-2GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
HDD/ODD
HDD/ODD
HDD/ODD
of
59 92Monday, March 29, 2010
of
59 92Monday, March 29, 2010
of
59 92Monday, March 29, 2010
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5
SSID = AUDIO
4
3
2
1
6SHDNHU
D D
&RQQHFWRU
/,1(
287
A00-20100406
5
SPK1
SPK1
FOX-CON4-24-GP
FOX-CON4-24-GP
1
AUD_SPK_L+30
AUD_SPK_R-30
AUD_SPK_R+30
12
12
12
DY
DY
DY
DY
EC6002
EC6002
SC100P50V2JN-3GP
SC100P50V2JN-3GP
DY
DY
EC6001
EC6001
SC100P50V2JN-3GP
SC100P50V2JN-3GP
C C
12
DY
DY
EC6003
EC6003
EC6004
EC6004
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
AFTP6001AFTP6001
AFTP6005AFTP6005
AFTP6007AFTP6007
AFTP6009AFTP6009
SEC. 20.F0693.004
AUD_SPK_L-
1
AUD_SPK_L+
1
AUD_SPK_R-
1
AUD_SPK_R+
1
2
3
4
6
1
AUD_HP1_JD#30AUD_SPK_L-30
AUD_HP1_JACK_L230
AUD_HP1_JACK_R230
X01 modify to GND 20091120
AFTP6002AFTP6002
AFTP6003AFTP6003
AFTP6004AFTP6004
AFTP6008AFTP6008
AUD_HP1_JACK_L2
AUD_HP1_JACK_R2
EC6005
EC6005
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
AUD_HP1_JD#
1
AUD_HP1_JACK_L1
1
AUD_HP1_JACK_R1
1
12
12
600ohm 100MHz
200mA 0.5ohm DC
BLM18BD601SN1D-GP
BLM18BD601SN1D-GP
L6001
L6001
1 2
1 2
L6002 BLM18BD601SN1D-GPL6002 BLM18BD601SN1D-GP
EC6006
EC6006
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
AUD_HP1_JD#
AUD_HP1_JACK_L1
AUD_HP1_JACK_R1
12
x02-20091224
12
EC6007
EC6007
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
AFTP6006AFTP6006
EC6008
EC6008
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1
LINEOUT1
LINEOUT1
6
5
2
4
1
3
7
8
PHONE-JK383-GP
PHONE-JK383-GP
22.10133.K31
X01 modify to GND 20091120
0,&,1
AUD_VREFOUT_B30
RN6001
RN6001
SRN4K7J-8-GP
SRN4K7J-8-GP
MIC_IN_L30
B B
A A
MIC_IN_R30
MIC_IN_L_C
AFTP6011AFTP6011
AFTP6012AFTP6012
AFTP6013AFTP6013
5
1
MIC_IN_R_C
1
EXT_MIC_JD#
1
1
23
,QWHUQDO
4
X02-20091222
R6001 0R0603-PADR6001 0R0603-PAD
R6002 0R0603-PADR6002 0R0603-PAD
EXT_MIC_JD#30
12
12
MIC_IN_L_C
MIC_IN_R_C
12
12
EC6011
EC6010
EC6010
SC100P50V2JN-3GP
SC100P50V2JN-3GP
X01 modify to GND 20091120
4
EC6011
SC100P50V2JN-3GP
SC100P50V2JN-3GP
MICIN1
MICIN1
8
7
3
1
4
2
5
6
PHONE-JK383-GP
PHONE-JK383-GP
22.10133.K31
22.10133.K31
AFTP6010AFTP6010
1
X02-20100206
3
DY
DY
1 2
EC6012 SCD1U10V2KX-5GP
EC6012 SCD1U10V2KX-5GP
1 2
EC6013 SCD1U10V2KX-5GPEC6013 SCD1U10V2KX-5GP
1 2
EC6014 SCD1U10V2KX-5GPEC6014 SCD1U10V2KX-5GP
DY
DY
1 2
EC6015 SCD1U10V2KX-5GP
EC6015 SCD1U10V2KX-5GP
1 2
EC6016 SCD1U10V2KX-5GPEC6016 SCD1U10V2KX-5GP
DY
DY
1 2
EC6017 SCD1U10V2KX-5GP
EC6017 SCD1U10V2KX-5GP
0LFURSKRQH
INT_MIC_L_R30
EC6009
EC6009
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
2
MIC1 is in DIP
MIC1 is in DIP
MIC1
MIC1
1
MICROPHONE-40-GP-U1
MICROPHONE-40-GP-U1
12
2
23.42143.001
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Audio Jack
Audio Jack
Audio Jack
1
of
60 92Monday, April 26, 2010
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60 92Monday, April 26, 2010
of
60 92Monday, April 26, 2010
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
61 92Wednesday, February 10, 2010
of
61 92Wednesday, February 10, 2010
of
61 92Wednesday, February 10, 2010
A00
A00
A00
Page 62
5
SSID = Flash.ROM
4
3
2
1
SPI FLASH ROM (4M byte) for PCH
+3.3V_RUN
D D
PCH_SPI_CS0#24
PCH_SPI_DI24
C C
PCH_SPI_CS0#
EC6202
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
EC6202
1 2
15R2J-GP
15R2J-GP
12
DY
DY
R6202
R6202
678
RN6201
RN6201
SRN4K7J-10-GP
SRN4K7J-10-GP
123
4 5
PCH_SPI_DI_R
PCH_SPI_WP#
PCH_SPI_HOLD_0#
U6201
U6201
1
CS#
SO
WP#
GND
VCC
NC#7
SCK
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
2
3
4
MX25L3205DM2I-12G-GP
MX25L3205DM2I-12G-GP
8
7
6
5
SI
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
+3.3V_RUN
PCH_SPI_HOLD_0#
EC6203
EC6203
DY
DY
12
C6201
C6201
DY
DY
12
12
DY
DY
x01 change tolerant 20091117
EC6204
EC6204
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN
+KBC_PWR
12
C6202
C6202
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PCH_SPI_CLK 24
PCH_SPI_DO 24
SPI FLASH ROM (256K byte) for KBC
+KBC_PWR
SC10U6D3V5MX-3GP
X02 20091221
100KR2J-1-GP
100KR2J-1-GP
EC_SPI_CS#37
EC_SPI_DI37
EC_SPI_WP#_R37
B B
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
R6205 0R0402-PADR6205 0R0402-PAD
R6206 0R0402-PADR6206 0R0402-PAD
12
12
EC6201
EC6201
DY
DY
DY
DY
1 2
1 2
R6208
R6208
100KR2J-1-GP
100KR2J-1-GP
R6203
R6203
12
4
RN6202
RN6202
SRN100KJ-6-GP
DY
DY
1 2
SRN100KJ-6-GP
1
2 3
EC_SPI_DI_R EC_SPI_HOLD#
EC_SPI_WP#
R6201
R6201
10KR2J-3-GP
10KR2J-3-GP
EC_SPI_HOLD#
U6202
U6202
1
CS#
2
SO
3
WP#
4
GND
MX25L2005C-12G-GP
MX25L2005C-12G-GP
SC10U6D3V5MX-3GP
8
VCC
7
HOLD#
6
SCLK
5
SI
EC6205
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
EC6205
C6203
C6203
+KBC_PWR
12
DY
DY
12
DY
DY
x01 change tolerant 20091117
12
DY
DY
EC6206
EC6206
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
12
C6204
C6204
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
EC_SPI_CLK 37
EC_SPI_DO 37
X02-20091221
2
1
4
+3.3V_RTC_LDO
RTC_PWR
AFTP6202AFTP6202
R6210
R6210
1 2
1KR2J-1-GP
1KR2J-1-GP
+RTC_VCC
AFTP6203AFTP6203
+RTC_VCC
1
RTC1
RTC1
1
PWR
2
GND
NP1
NP1
NP2
1
NP2
BAT-CON2-1-GP-U
BAT-CON2-1-GP-U
62.70001.011
62.70001.011
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Flash/RTC
Flash/RTC
Flash/RTC
1
A00
A00
of
62 92Monday, March 29, 2010
of
62 92Monday, March 29, 2010
of
62 92Monday, March 29, 2010
A00
U6203
+RTC_CELL
U6203
SSID = RBATT
3
C6205
C6205
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
A A
5
1 2
SDMG0340LC7F-GP-U
SDMG0340LC7F-GP-U
Width=20mils
Page 63
5
4
3
2
1
SSID = USB
Close to I/O connector
IO Board USB Power
Support 2A
U6301
U6301
D D
12
C6301
C6301
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
USB POWER SW
DY
at least 80 mil
USB_PWR_EN#37
Main UP7534BRA8-15 P/N:74.07534.079
1
GND
2
VIN
3
VIN
EN#4OC#
UP7534BRA8-15-GP
UP7534BRA8-15-GP
VOUT#8
VOUT#7
VOUT#6
8
7
6
5
SEC AP2101MPG-13 P/N: 74.02101.079
at least 80 mil
SC1U10V2KX-1GP
SC1U10V2KX-1GP
USB_OC#8_9 21
x01 Change tolerant 20091117
CRT Board USB Power
Close to CRT Board connector
C C
Support 2A
U6302
12
C6303
C6303
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
at least 80 mil
USB_PWR_EN#37
U6302
1
GND
VOUT#8
2
VIN
VOUT#7
3
VIN
VOUT#6
EN#4OC#
UP7534BRA8-15-GP
UP7534BRA8-15-GP
8
7
6
5
at least 80 mil
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C6302
C6302
C6304
C6304
+5V_USB1+5V_ALW
12
+5V_USB2+5V_ALW
12
USB_OC#0_1 21
x01 Change tolerant 20091117
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
USB Power SW
USB Power SW
USB Power SW
1
of
63 92Monday, March 29, 2010
of
63 92Monday, March 29, 2010
of
63 92Monday, March 29, 2010
A00
A00
A00
Page 64
5
D D
4
3
2
1
(Blanking)
C C
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Berry
Berry
Berry
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
64 92Wednesday, February 10, 2010
64 92Wednesday, February 10, 2010
64 92Wednesday, February 10, 2010
1
A00
A00
A00
of
of
of
Page 65
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
65 92Wednesday, February 10, 2010
of
65 92Wednesday, February 10, 2010
of
65 92Wednesday, February 10, 2010
A00
A00
A00
Page 66
5
SSID = User.Interface
4
3
2
1
Power LED(White)
E
C
E
C
+5V_ALW
12
EC6601
EC6601
DY
DY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
+5V_RUN
SATA_LED_R
DY
DY
+5V_ALW
WHITE_LED_BAT
DY
DY
+5V_ALW
12
EC6604
EC6604
SC220P50V2KX-3GP
SC220P50V2KX-3GP
12
EC6602
EC6602
SC220P50V2KX-3GP
SC220P50V2KX-3GP
12
EC6603
EC6603
DY
DY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
R6604
R6604
R6602
R6602
12
12
12
12
1KR2J-1-GP
1KR2J-1-GP
12
1KR2J-1-GP
1KR2J-1-GP
R6601 1KR2J-1-GPR6601 1KR2J-1-GP
R6603 1KR2J-1-GPR6603 1KR2J-1-GP
R6609 1KR2J-1-GPR6609 1KR2J-1-GP
R6606
R6606
1 2
1KR2J-1-GP
1KR2J-1-GP
PWR_LED_BLED_PWR
POWER_SW _LED_B
POWER_SW _LED_C
X02-20100203
SATA_LED
BAT_WHITE
BAT_AMBERAMBER_LED_BAT
PWR_LED_B
SATA_LED
BAT_WHITE
BAT_AMBER
LEDBD1
LEDBD1
7
1
2
3
4
5
6
8
ACES-CON6-13-GP
ACES-CON6-13-GP
Q6602
Q6602
R2
D D
RN6601
RN6601
WHITE_LED#_KBC37
SATA_LED#24
AMBER_LED#_KBC37
PWRLED#37
1
2 3
1
2 3
4
SRN15KJ-3-GP
SRN15KJ-3-GP
RN6602
RN6602
4
SRN15KJ-3-GP
SRN15KJ-3-GP
WHITE_LED_BAT#
SATA_LED#_C
AMBER_LED_BAT#
PWRLED#_C
X02-20100108
C C
PWRLED#_C
SATA_LED#_C
WHITE_LED_BAT#
SATA HDD LED(White)
B
84.00143.M11
84.00143.M11
Battery LED1(White)
R2
B
R1
R1
PDTA143ET-GP
PDTA143ET-GP
84.00143.M11
84.00143.M11
Q6601
Q6601
R2
R2
E
R1
R1
C
PDTA143ET-GP
PDTA143ET-GP
Q6603
Q6603
R2
R2
B
R1
R1
PDTA143ET-GP
PDTA143ET-GP
84.00143.M11
84.00143.M11
Battery LED2(Amber)
Q6604
Q6604
R2
R2
AMBER_LED_BAT#
B B
B
84.00143.M11
84.00143.M11
R1
R1
PDTA143ET-GP
PDTA143ET-GP
E
C
Power button LED(White)
PWRBTN1
KBC_PWRBTN#37
X01 20091111
Q6605
Q6605
R2
DY
DY
A A
PWR_BTN_LED#37
5
1 2
R6607 15KR2J-1-GP
R6607 15KR2J-1-GP
PWR_BTN_LED#_C
R2
B
R1
R1
DY
DY
PDTA143ET-GP
PDTA143ET-GP
84.00143.M11
84.00143.M11
4
+5V_ALW
E
POWER_SW _LED_R POW ER_SW_LED_C
C
A00-20100205
1 2
DY
DY
R6610 100R2J-2-GP
R6610 100R2J-2-GP
1 2
DY
DY
R6608 100R2J-2-GP
R6608 100R2J-2-GP
POWER_SW _LED_B
1 2
R6605 100R2J-2-GPR6605 100R2J-2-GP
A00-20100203
3
KBC_PWRBTN#_C
POWER_SW _LED_C
POWER_SW _LED_B
PWRBTN1
5
1
2
3
4
6
ACES-CON4-10-GP-U
ACES-CON4-10-GP-U
20.K0320.004
20.K0320.004
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
LED Bard/Power Button
LED Bard/Power Button
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
LED Bard/Power Button
A3
A3
A3
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
66 92Monday, March 29, 2010
of
66 92Monday, March 29, 2010
of
66 92Monday, March 29, 2010
1
A00
A00
A00
Page 67
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
67 92Wednesday, February 10, 2010
of
67 92Wednesday, February 10, 2010
of
67 92Wednesday, February 10, 2010
A00
A00
A00
Page 68
5
4
3
2
1
SSID = Touch.PadSSID = KBC
D D
Internal KeyBoard Connector
TouchPad Connector
A00-20100203
KB1
KB1
31
1
KROW7
2
KROW6
3
KROW4
4
KROW2
5
KROW5
6
KROW1
7
KROW3
8
KROW0
9
KCOL5
10
KCOL4
11
KCOL7
12
KCOL6
13
KCOL8
14
KCOL3
15
KCOL1
16
KCOL2
17
KCOL0
18
KCOL12
32
ACES-CON30-8-GP
ACES-CON30-8-GP
19
KCOL16
20
KCOL15
21
KCOL13
22
KCOL14
23
KCOL9
24
KCOL11
25
KCOL10
26
27
28
29
30
C C
B B
A00-20100205
F6801
F6801
1 2
DY
12
C6804
C6804
DY
DY
A A
5
DY
FUSE-D5A6V-2-GP
FUSE-D5A6V-2-GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
DY
DY
R6802 0R2J-2-GP
R6802 0R2J-2-GP
KB_LED_BL_DET37
AFTP6801AFTP6801
1
1
AFTP6802AFTP6802
1
AFTP6803AFTP6803
1
AFTP6804AFTP6804
1
AFTP6805AFTP6805
1
AFTP6806AFTP6806
1
AFTP6807AFTP6807
1
AFTP6808AFTP6808
1
AFTP6809AFTP6809
1
AFTP6810AFTP6810
1
AFTP6811AFTP6811
1
AFTP6812AFTP6812
1
AFTP6813AFTP6813
1
AFTP6814AFTP6814
1
AFTP6815AFTP6815
1
AFTP6816AFTP6816
1
AFTP6817AFTP6817
1
AFTP6818AFTP6818
1
AFTP6819AFTP6819
1
AFTP6821AFTP6821
1
AFTP6823AFTP6823
1
AFTP6822AFTP6822
1
AFTP6824AFTP6824
1
AFTP6825AFTP6825
1
AFTP6826AFTP6826
1
AFTP6827AFTP6827
1
KB_DET# 37
KROW[0..7] 37
KCOL[0..16] 37
AFTP6828AFTP6828
KB Backlight Connector
KB_LED_DET_C
100R2J-2-GP
100R2J-2-GP
DY
DY
12
R6801
R6801
100KR2J-1-GP
100KR2J-1-GP
+5V_KB_BL+5V_RUN
12
C6806
C6806
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
G
KB_BL_CTRL#
DS
KB_LED_PWR
L6801
L6801
1 2
DY
DY
BLM18PG181SN1D-GP
BLM18PG181SN1D-GP
R6803
R6803
100KR2J-1-GP
100KR2J-1-GP
KB_BL_CTRL37
12
C6805
C6805
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
R6804
R6804
1 2
DY
DY
12
DY
DY
DY
DY
4
20.K0320.004
20.K0320.004
KBLIT1
KBLIT1
5
1
2
DY
DY
3
4
6
ACES-CON4-10-GP-U
ACES-CON4-10-GP-U
Q6801
Q6801
P8503BMG-GP
P8503BMG-GP
+5V_RUN
+5V_RUN
1
23
RN6801
RN6801
SRN10KJ-5-GP
SRN10KJ-5-GP
4
TPCLK37
TPDATA37
12
12
DY
DY
DY
DY
C6802
AFTP6832AFTP6832
AFTP6833AFTP6833
AFTP6834AFTP6834
C6802
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+5V_KB_BL
KB_LED_BL_DET
KB_BL_CTRL#
1
AFTP6835AFTP6835
3
1
1
1
C6803
C6803
SC33P50V2JN-3GP
SC33P50V2JN-3GP
AFTP6829AFTP6829
AFTP6830AFTP6830
AFTP6831AFTP6831
2
x01 change tolerant 20091117
12
C6801
C6801
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TPAD1
TPAD1
6
4
3
2
1
5
ACES-CON4-10-GP-U
ACES-CON4-10-GP-U
AFTP6820AFTP6820
+5V_RUN
1
TPCLK
1
TPDATA
1
1
20.K0320.004
20.K0320.004
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Key Board/Touch Pad
Key Board/Touch Pad
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet
Date: Sheet
Key Board/Touch Pad
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
68 92Monday, March 29, 2010
68 92Monday, March 29, 2010
68 92Monday, March 29, 2010
1
A00
A00
of
of
A00
Page 69
5
4
3
2
1
AFTP6901AFTP6901
AFTP6902AFTP6902
D D
C C
+3.3V_ALW
1
LID_CLOSE#_1
1
LID_CLOSE#37
+3.3V_ALW
12
DY
DY
12
DY
DY
R6901
R6901
100KR2J-1-GP
100KR2J-1-GP
LID_CLOSE#
C6902
C6902
SCD047U16V2KX-1-GP
SCD047U16V2KX-1-GP
x01 Change tolerant 20091117
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R6902 0R0402-PADR6902 0R0402-PAD
12
X02-20091223
+3.3V_ALW
12
C6903
C6903
LID_CLOSE#_1
HALLSW1
HALLSW1
2
VDD
3
OUT
S-5711ACDL-M3T1S-GP
S-5711ACDL-M3T1S-GP
AFTP6903AFTP6903
VSS
1
1
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Berry
Berry
Berry
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Hall Sensor
Hall Sensor
Hall Sensor
69 92Monday, March 29, 2010
69 92Monday, March 29, 2010
69 92Monday, March 29, 2010
1
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Page 70
5
D D
LPC_LAD024,37
LPC_LAD124,37
LPC_LAD224,37
LPC_LAD324,37
LPC_LFRAME#24,37
PLT_RST#9,21,37,76,78,80
PCLK_FWH21
C C
4
+3.3V_RUN
DB1
DB1
1
2
3
4
5
6
DY
DY
7
8
9
10
11
12
MLX-CON10-7-GP
MLX-CON10-7-GP
3
2
1
20.D0183.110
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Berry
Berry
Berry
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Dubug connector
Dubug connector
Dubug connector
70 92Monday, March 29, 2010
70 92Monday, March 29, 2010
70 92Monday, March 29, 2010
of
of
of
1
A00
A00
A00
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5
D D
4
3
2
1
(Blanking)
C C
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
RESERVED
RESERVED
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
RESERVED
Berry
Berry
Berry
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A00
A00
A00
71 92Wednesday, February 10, 2010
71 92Wednesday, February 10, 2010
71 92Wednesday, February 10, 2010
of
of
of
1
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
RESERVED
RESERVED
RESERVED
1
of
72 92Wednesday, February 10, 2010
of
72 92Wednesday, February 10, 2010
of
72 92Wednesday, February 10, 2010
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5
SSID = User.Interface
4
3
2
1
D D
AFTP7301AFTP7301
AFTP7302AFTP7302
AFTP7304AFTP7304
AFTP7305AFTP7305
AFTP7314AFTP7314
USB_PP521
USB_PN521
BT_ACT76
BLUETOOTH_EN37
C C
B B
WLAN_ACT76
12
DY
DY
Bluetooth Module conn.
BT1
BT1
15
NP1
2
1
4
3
6
5
8
7
10
9
12
14
NP2
16
HRS-CONN14D-GP-U
HRS-CONN14D-GP-U
12
DY
DY
R7303
R7303
100KR2J-1-GP
100KR2J-1-GP
BLUETOOTH_DET#
1
WLAN_ACT
BDC_ON
1
BLUETOOTH_EN
BT_LED
1
BLUETOOTH_GPIO3
1
BLUETOOTH_GPIO5
1
BT_ACT
BLUETOOTH_EN
WLAN_ACT
12
EC7302
EC7302
R7304
R7304
10KR2J-3-GP
10KR2J-3-GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
11
13
20.F0987.014
20.F0987.014
BT_ACT
USB_PP5
USB_PN5
1
AFTP7316AFTP7316
AFTP7317AFTP7317
AFTP7315AFTP7315
AFTP7318AFTP7318
AFTP7319AFTP7319
AFTP7320AFTP7320
AFTP7313AFTP7313
WLAN_ACT
1
BLUETOOTH_EN
1
BT_ACT
1
+3.3V_RUN
1
USB_PP5
1
USB_PN5
1
+3.3V_RUN
x01 change tolerant 20091118
12
C7301
C7301
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Bluetooth
Bluetooth
Bluetooth
1
of
73 92Monday, March 29, 2010
of
73 92Monday, March 29, 2010
of
73 92Monday, March 29, 2010
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A00
A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
of
74 92Wednesday, February 10, 2010
of
74 92Wednesday, February 10, 2010
of
74 92Wednesday, February 10, 2010
A00
A00
A00
Page 75
5
D D
4
3
2
1
(Blanking)
C C
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
Berry
Berry
Berry
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
75 92Wednesday, February 10, 2010
75 92Wednesday, February 10, 2010
75 92Wednesday, February 10, 2010
of
of
of
1
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5
4
3
2
1
IO Board CONN 80 pin
IOBD1
IOBD1
85
86
D D
86%(6$7$
::$186%
86%
:/$186%
::$13&,(
::$13&,(
::$1:/$160%86
+DC_IN_SS
C C
WW AN_RADIO_DIS#37
/$13&,(
/$13&,(
USB_PP921
USB_PN921
USB_PP1121
USB_PN1121
USB_PN821
USB_PP821
USB_PP221
USB_PN221
E51_RXD37
E51_TXD37
PCIE_RXP423
PCIE_RXN423
PCIE_TXP423
PCIE_TXN423
PCH_SMBDATA7,18,19,23
PCH_SMBCLK7,18,19,23
WIFI_RF_EN37
WW AN_CLKREQ#23
PSID_DISABLE#37
PCIE_RXP323
PCIE_RXN323
PCIE_TXP323
PCIE_TXN323
X02-20091230
2 1
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
83
82
ACES-CONN80D-GP
ACES-CONN80D-GP
20.F1009.080
20.F1009.080
NP1
84
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
NP2
A00-20100203
SATA_TXN4 24
SATA_TXP4 24
SATA_RXN4_C 24
SATA_RXP4_C 24
PCIE_TXP2 23
PCIE_TXN2 23
PCIE_RXP2 23
PCIE_RXN2 23
CLK_PCIE_WLAN 23
CLK_PCIE_WLAN# 23
CLK_PCIE_LAN 23
CLK_PCIE_LAN# 23
CLK_PCIE_WWAN 23
CLK_PCIE_WWAN# 23
at least 80 mil
+5V_ALW
+3.3V_ALW
+1.5V_RUN
PM_LAN_ENABLE 37
PLT_RST# 9,21,37,70,78,80
WLAN_CLKREQ# 23
PCIE_WAKE# 22
BT_ACT 73
WLAN_ACT 73
PSID_EC 37
6$7$(6$7$
6$7$(6$7$
:/$13&,(
:/$13&,(
:/$1&/.
/$1&/.
::$1&/.
+5V_USB1
+3.3V_RUN
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
IO Board Connector
IO Board Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
IO Board Connector
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
76 92Monday, March 29, 2010
of
76 92Monday, March 29, 2010
of
76 92Monday, March 29, 2010
1
A00
A00
A00
Page 77
5
4
3
2
1
CRT Board Connector
CRTBD1
CRTBD1
21
1
at least 80 mil
2
3
4
USB_PN1_C
5
USB_PP1_C
6
7
8
9
10
D D
SEC. 20.F1035.020
11
12
13
14
15
16
17
18
19
20
22
ACES-CON20-1-GP-U
ACES-CON20-1-GP-U
20.F0772.020
20.F0772.020
USB_PN0_C
USB_PP0_C
CRT_DDCCLK_CON
CRT_DDCDATA_CON
CRT RGB
Close to CRT Board CONN
RN7701
RN7701
1
VGA_CRT_RED82
VGA_CRT_GREEN82
C C
VGA_CRT_BLUE82
PCH_CRT_RED20
PCH_CRT_GREEN20
PCH_CRT_BLUE20
2
3
DIS
DIS
4 5
SRN0J-7-GP
SRN0J-7-GP
RN7702
RN7702
1
2
3
UMA
UMA
4 5
SRN0J-7-GP
SRN0J-7-GP
CRT DDCDATA & DDCCLK level shift
+3.3V_RUN
Need Level Shift
PCH_CRT_DDCDATA20
PCH_CRT_DDCCLK20
5V Tolerance
B B
VGA_CRT_DDCDATA82
VGA_CRT_DDCCLK82
RN7709
RN7709
2 3
DIS
DIS
1
SRN0J-6-GP
SRN0J-6-GP
+5V_USB2
+5V_RUN
86%3257
CRT_R
CRT_G
CRT_B
CRT_HSYNC_CON
CRT_VSYNC_CON
86%3257
&575*%
&57+96<1&
&5760%86
Filter design on CRT Board
8
7
6
8
7
6
Pull High 5V Design on CRT Board
1
UMA
UMA
4
23
4
RN7707
RN7707
SRN2K2J-1-GP
SRN2K2J-1-GP
+3.3V_RUN
Q7701
Q7701
UMA
UMA
6
2N7002EDW-G P
2N7002EDW-G P
84.27002.F3F
84.27002.F3F
2345
1
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_DDCDATA_CON
CRT_DDCCLK_CON
A00-20100120
USB_PN1_C
34
2
CRT_RED
CRT_GREEN
CRT_BLUE
SRN150F-1-GP
SRN150F-1-GP
RN7708
RN7708
1
34
2
1
678
123
USB_PP1_C
USB_PN0_C
USB_PP0_C
X01 20091111
&575*%
CRT Hsync & Vsync level shift
RN7703
3.3V Tolerance
VGA_CRT_HSYNC80,82
VGA_CRT_VSYNC80,82
PCH_CRT_HSYNC20
PCH_CRT_VSYNC20
2.5V Tolerance?
RN7703
SRN0J-6-GP
SRN0J-6-GP
1
4
2 3
DIS
DIS
2 3
1
4
UMA
UMA
RN7704
RN7704
SRN33J-5-GP-U
SRN33J-5-GP-U
X02-20100105
FILTER-130-GP
FILTER-130-GP
TR7701
TR7701
TR7702
TR7702
FILTER-130-GP
FILTER-130-GP
DY
DY
4 5
USB_PN1 21
USB_PP1 21
USB_PN0 21
USB_PP0 21
12
12
C7703
C7703
SC8P250V2CC-GP
SC8P250V2CC-GP
12
C7704
C7704
DY
DY
DY
DY
SC8P250V2CC-GP
SC8P250V2CC-GP
Close to CRT Board CONN
A00-20100120
CRT_HSYNC_IN
CRT_VSYNC_IN
1 2
FCM1608CF-220T05-GP
FCM1608CF-220T05-GP
1 2
FCM1608CF-220T05-GP
FCM1608CF-220T05-GP
1 2
FCM1608CF-220T05-GP
FCM1608CF-220T05-GP
C7705
C7705
SC8P250V2CC-GP
SC8P250V2CC-GP
L7701
L7701
L7702
L7702
L7703
L7703
RN7706
RN7706
1
2 3
0R4P2R-PAD
0R4P2R-PAD
RN
RN
CRT_HSYNC_CON
4
CRT_VSYNC_CON
X02-20100108
12
C7706
C7706
C7707
C7707
SC10P50V2JN-4GP
SC10P50V2JN-4GP
CRT_R
CRT_G
CRT_B
12
12
C7708
C7708
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
SC10P50V2JN-4GP
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Berry
Berry
Berry
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
CRT Board Connector
CRT Board Connector
CRT Board Connector
77 92Monday, March 29, 2010
77 92Monday, March 29, 2010
77 92Monday, March 29, 2010
of
of
1
of
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A00
A00
Page 78
5
4
3
2
1
SSID = SDIO
D D
Card Reader connector
C C
x01 20091121
PLT_RST#9,21,37,70,76,80
A00-20100120
USB_PN421
34
2
TR7801
TR7801
B B
USB_PP421
1
FILTER-130-GP
FILTER-130-GP
+3.3V_RUN
USB_PN4_C
USB_PP4_C
CARDBD1
CARDBD1
1
2
3
4
5
6
MLX-CON6-21-GP
MLX-CON6-21-GP
20.F1035.006
20.F1035.006
7
8
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
CARD Reader CONN
CARD Reader CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
2
CARD Reader CONN
Berry
Berry
Berry
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A00
A00
A00
78 92Monday, March 29, 2010
78 92Monday, March 29, 2010
78 92Monday, March 29, 2010
of
of
of
1
Page 79
5
H2
H1
H1
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
D D
1
H2
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
1
H3
H3
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
1
H4
H4
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
4
H7
H6
H5
H5
HOLE256R111-GP
HOLE256R111-GP
1
1
H6
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
1
H7
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
3
H9
H8
H8
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
1
1
H9
HTE95BE95R29-R-5-GP
HTE95BE95R29-R-5-GP
1
2
1
H10
H10
HOLE335R115-GP
HOLE335R115-GP
1
H11
H11
HOLE256R111-GP
HOLE256R111-GP
1
CPU Thermal module hole GPU Thermal module hole
HTML2
HTML1
HTML1
HOLE197R166-GP
HOLE197R166-GP
1
DY
DY
HTML2
HOLE197R166-GP
HOLE197R166-GP
1
DY
DY
HTML3
HTML3
HOLE197R166-GP
HOLE197R166-GP
1
DY
DY
HGPU1
HGPU1
STF237R117H83-1-GP
STF237R117H83-1-GP
1
stand off
HBT1
HBT1
STF237R117H123-GP
STF237R117H123-GP
1
EMI Reserve
+PWR_SRC
C C
12
12
DY
DY
EC7942
EC7942
B B
EMI Reserve
DY
DY
12
EC7901
EC7901
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
EC7940
EC7940
SCD1U25V2KX-GP
SPR1
SPR1
SPRING-58-GP
SPRING-58-GP
1
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X01 stuff 20091119
12
EC7902
EC7902
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
EC7941
EC7941
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC7904
EC7904
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
EC7939
EC7939
12
EC7903
EC7903
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
EC7943
EC7943
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X01 RF Reserved-20091118
+PWR_SRC_1D5V
12
EC7908
EC7908
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
EC7905
EC7905
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
EC7938
EC7938
SCD1U25V2KX-GP
SCD1U25V2KX-GP
+PWR_SRC
12
EC7912
EC7912
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
12
EC7907
EC7907
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC7913
EC7913
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
DY
DY
12
EC7909
EC7909
SCD1U25V2KX-GP
SCD1U25V2KX-GP
56pF*756pF*1
12
EC7917
EC7917
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
12
EC7919
EC7919
+VGFXCORE_PWR_SRC
12
EC7920
EC7920
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
DY
DY
DY
DY
12
12
EC7922
EC7922
EC7906
EC7906
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC7925
EC7925
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
+PWR_SRC_VTT +PWR_SRC_1D5V
12
EC7911
EC7911
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X01 stuff 20091118
+PWR_SRC +1.5V_SUS
12
EC7921
EC7921
12
SCD1U25V2KX-GP
SCD1U25V2KX-GP
EC7933
EC7933
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC7916
EC7916
DY
DY
SCD1U25V2KX-GP
SCD1U25V2KX-GP
0.1uF*2
+1.05V_VTT
12
EC7923
EC7923
DY
DY
+1.5V_SUS
X02-20100208
12
EC7924
EC7924
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
UMA
UMA
UMA
UMA
12
EC7926
EC7926
SCD1U25V2KX-GP
SCD1U25V2KX-GP
UMA
UMA
12
EC7927
EC7927
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
+CPU_GFX_CORE
0.1uF*2
12
12
EC7946
A00-20100204
A A
DY
DY
EC7946
EC7947
EC7947
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
DY
+VGA_CORE
56pF*1 56pF*3 56pF*2
12
EC7928
EC7928
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
+1.5V_SUS +VCC_CORE
DY
DY
12
EC7931
EC7931
12
EC7932
EC7932
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
DY
DY
12
EC7930
EC7930
SC56P50V2JN-2GP
SC56P50V2JN-2GP
12
EC7934
EC7934
UMA
UMA
12
EC7935
EC7935
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
+5V_RUN
12
DY
DY
56pF
EC7937
EC7937
SC56P50V2JN-2GP
SC56P50V2JN-2GP
DY
DY
12
EC7945
EC7945
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
DY
EC7929
EC7929
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
DY
12
X02-20100209
5
4
3
EC7936
EC7936
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
DY
2
12
EC7944
EC7944
SCD1U25V2KX-GP
SCD1U25V2KX-GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
79 92Wednesday, February 10, 2010
of
79 92Wednesday, February 10, 2010
of
79 92Wednesday, February 10, 2010
1
A00
A00
A00
Page 80
5
4
3
2
1
PEG_TXP[0..15]8
PEG_TXN[0..15]8
VGA1A
VGA1A
1 OF 8
1 OF 8
x01 change tolerant 20091117
PEG_TXP0
PEG_TXN0
D D
C C
B B
CLK_PCIE_VGA23
CLK_PCIE_VGA#23
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
X02-20091208
PARK
PARK
1 2
R8018 10KR2F-2-GP
R8018 10KR2F-2-GP
R8020
R8020
7,70,76,78
PLT_RST#
PLTRST_DELAY#37
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
R8021
R8021
1 2
0R0402-PAD
0R0402-PAD
PWRGOOD
VGA_RST#
AA38
PCIE_RX0P
Y37
PCIE_RX0N
Y35
PCIE_RX1P
W36
PCIE_RX1N
W38
PCIE_RX2P
V37
PCIE_RX2N
V35
PCIE_RX3P
U36
PCIE_RX3N
U38
PCIE_RX4P
T37
PCIE_RX4N
T35
PCIE_RX5P
R36
PCIE_RX5N
R38
PCIE_RX6P
P37
PCIE_RX6N
P35
PCIE_RX7P
N36
PCIE_RX7N
N38
PCIE_RX8P
M37
PCIE_RX8N
M35
PCIE_RX9P
L36
PCIE_RX9N
L38
PCIE_RX10P
K37
PCIE_RX10N
K35
PCIE_RX11P
J36
PCIE_RX11N
J38
PCIE_RX12P
H37
PCIE_RX12N
H35
PCIE_RX13P
G36
PCIE_RX13N
G38
PCIE_RX14P
F37
PCIE_RX14N
F35
PCIE_RX15P
E37
PCIE_RX15N
AB35
PCIE_REFCLKP
AA36
PCIE_REFCLKN
AJ21
NC#AJ21
AK21
NC#AK21
AH16
PWRGOOD
AA30
PERST#
MADISON-PRO-2-GP
MADISON-PRO-2-GP
CLOCK
CLOCK
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
DIS
DIS
PEG_C_RXP0
Y33
PEG_C_RXN0
Y32
PEG_C_RXP1
W33
PEG_C_RXN1
W32
PEG_C_RXP2
U33
PEG_C_RXN2
U32
PEG_C_RXP3
U30
PEG_C_RXN3
U29
PEG_C_RXP4
T33
PEG_C_RXN4
T32
PEG_C_RXP5
T30
PEG_C_RXN5
T29
PEG_C_RXP6
P33
PEG_C_RXN6
P32
PEG_C_RXP7
P30
PEG_C_RXN7
P29
PEG_C_RXP8
N33
PEG_C_RXN8
N32
PEG_C_RXP9
N30
PEG_C_RXN9
N29
PEG_C_RXP10
L33
PEG_C_RXN10
L32
PEG_C_RXP11
L30
PEG_C_RXN11
L29
PEG_C_RXP12
K33
PEG_C_RXN12
K32
PEG_C_RXP13
J33
PEG_C_RXN13
J32
PEG_C_RXP14
K30
PEG_C_RXN14
K29
PEG_C_RXP15
H33
PEG_C_RXN15
H32
PCIE_CALRP
Y30
PCIE_CALRN
Y29
PEG_RXP[0..15] 8
PEG_RXN[0..15] 8
C8001 SCD1U10V2KX-5GP
C8001 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8002 SCD1U10V2KX-5GP
C8002 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8003 SCD1U10V2KX-5GP
C8003 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8004 SCD1U10V2KX-5GP
C8004 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8005 SCD1U10V2KX-5GP
C8005 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8006 SCD1U10V2KX-5GP
C8006 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8008 SCD1U10V2KX-5GP
C8008 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8007 SCD1U10V2KX-5GP
C8007 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8009 SCD1U10V2KX-5GP
C8009 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8010 SCD1U10V2KX-5GP
C8010 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8011 SCD1U10V2KX-5GP
C8011 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8012 SCD1U10V2KX-5GP
C8012 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8013 SCD1U10V2KX-5GP
C8013 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8014 SCD1U10V2KX-5GP
C8014 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8016 SCD1U10V2KX-5GP
C8016 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8015 SCD1U10V2KX-5GP
C8015 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8018 SCD1U10V2KX-5GP
C8018 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8017 SCD1U10V2KX-5GP
C8017 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8020 SCD1U10V2KX-5GP
C8020 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8019 SCD1U10V2KX-5GP
C8019 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8021 SCD1U10V2KX-5GP
C8021 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8022 SCD1U10V2KX-5GP
C8022 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8023 SCD1U10V2KX-5GP
C8023 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8024 SCD1U10V2KX-5GP
C8024 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8025 SCD1U10V2KX-5GP
C8025 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8026 SCD1U10V2KX-5GP
C8026 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8028 SCD1U10V2KX-5GP
C8028 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8027 SCD1U10V2KX-5GP
C8027 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8030 SCD1U10V2KX-5GP
C8030 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8029 SCD1U10V2KX-5GP
C8029 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8032 SCD1U10V2KX-5GP
C8032 SCD1U10V2KX-5GP
1 2
DIS
DIS
C8031 SCD1U10V2KX-5GP
C8031 SCD1U10V2KX-5GP
1 2
DIS
DIS
R8017
R8017
DIS
DIS
1 2
1K27R2F-L-GP
1K27R2F-L-GP
1 2
R8019 2KR2F-3-GP
R8019 2KR2F-3-GP
DIS
DIS
PEG_RXP0
PEG_RXN0
PEG_RXP1
PEG_RXN1
PEG_RXP2
PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4
PEG_RXP5
PEG_RXN5
PEG_RXP6
PEG_RXN6
PEG_RXP7
PEG_RXN7
PEG_RXP8
PEG_RXN8
PEG_RXP9
PEG_RXN9
PEG_RXP10
PEG_RXN10
PEG_RXP11
PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
+1.0V_RUN_VGA
CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
THEY MUST NOT CONFLICT DURING RESET
STRAPS
TX_PWRS_ENB
RESERVED
VGA_DIS
RESERVED
BIOS_ROM_EN
VIP_DEVICE_STRAP_EN
RSVD
AUD[1]
PIN
GPIO0
GPIO1TX_DEEMPH_EN
GPIO2BIF_GEN2_EN_A 0
GPIO5GPIO5_AC_BATT
GPIO8 RESERVED
GPIO[13:11]ROMIDCFG[2:0]
GPIO21 RESERVED
GPIO_22_ROMCSB
V2SYNC
H2SYNC 0
GENERICC 0RSVD
HSYNC X
VSYNC XAUD[0]
TX_PWRS_ENB82
TX_DEEMPH_EN82
BIF_GEN2_EN_A82
GPIO8_ROMSO82
VGA_DIS82
CONFIG082
CONFIG182
CONFIG282
VGA_CRT_VSYNC77,82
VGA_CRT_HSYNC77,82
VSYNC_DAC282
HSYNC_DAC282
BIOS_ROM_EN82
GPIO5_AC_BATT82
GPIO21_BB_EN82
DESCRIPTION OF DEFAULT SETTINGS
Transmitter Power Savings Enable
0: 50% Tx output swing 1: Full Tx output swing
PCIE TRANSMITTER DE-EMPHASIS ENABLED
0:Tx de-emphasis disabled 1:Tx de-emphasis enabled
0:Advertises the PCIe device as 2.5GT/s capable at power on.
1:Advertises the PCIe device as 5.0GT/s capable at power on.
optional input allow the system to request a fast
power reduction by setting GPIO5 to low.
0:VGA Controller capacity enabled
1:The device won't be recognized as the system's VGA controller
BIOS_ROM_EN=1, Config[2:0] defines the ROM type
BIOS_ROM_EN=0, Config[2:0] defines the primary memory aperture size
0:Disable external BIOS ROM device
VIP Device Strap Enable indicates to the software driver that it sense
whether or not a VIP device is connected on the VIP Host interface.
1:Enable external BIOS ROM device
RESERVED
RESERVED
AUD[1:0]:11-Audio for both DisplayPort and HDMI
PIN STRAPS
DY
DY
R8001 3KR2J-2-GP
R8001 3KR2J-2-GP
1 2
DY
DY
R8002 3KR2J-2-GP
R8002 3KR2J-2-GP
1 2
DY
DY
R8003 10KR2J-3-GP
R8003 10KR2J-3-GP
1 2
DY
DY
R8004 10KR2J-3-GP
R8004 10KR2J-3-GP
1 2
DY
DY
R8005 10KR2J-3-GP
R8005 10KR2J-3-GP
1 2
DIS
DIS
R8006 10KR2J-3-GP
R8006 10KR2J-3-GP
1 2
DY
DY
R8007 10KR2J-3-GP
R8007 10KR2J-3-GP
1 2
DY
DY
R8008 10KR2J-3-GP
R8008 10KR2J-3-GP
1 2
R8009 10KR2J-3-GP
R8009 10KR2J-3-GP
1 2
DIS
DIS
R8010 10KR2J-3-GP
R8010 10KR2J-3-GP
1 2
DIS
DIS
DY
DY
R8012 10KR2J-3-GP
R8012 10KR2J-3-GP
1 2
DY
DY
R8013 10KR2J-3-GP
R8013 10KR2J-3-GP
1 2
DY
DY
R8014 10KR2J-3-GP
R8014 10KR2J-3-GP
1 2
DY
DY
R8015 10KR2J-3-GP
R8015 10KR2J-3-GP
1 2
DY
DY
R8016 10KR2J-3-GP
R8016 10KR2J-3-GP
1 2
+3.3V_RUN_VGA
RECOMMENDED SETTINGS
0= DO NOT INSTALL RESISTOR
1 = INSTALL 3K RESISTOR
X = DESIGN DEPENDANT
NA = NOT APPLICABLE
RECOMMEND
PLATFORM
SETTING
X
X
1
1
0
?
0
0GPIO9
XXX
0
X
X
0
0
0
0 0 1
(256MB)
0
0
0
0
0
1
1
X02-20091224
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GPU_PCIE/STRAPPING(1/5)
GPU_PCIE/STRAPPING(1/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
GPU_PCIE/STRAPPING(1/5)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
80 92Monday, March 29, 2010
of
80 92Monday, March 29, 2010
of
80 92Monday, March 29, 2010
1
A00
A00
A00
Page 81
5
3 OF 8
VGA1C
VGA1C
DDR2
MDA[0..31]85 MDB[0..31]87
D D
MDA[32..63]86
C C
X02-20091208
+1.5V_RUN
DY
MEM_CALRN0
1 2
R8104243R2F-2-GPDYR8104243R2F-2-GP
PARK
PARK
MEM_CALRN1
1 2
R8106243R2F-2-GP
R8106243R2F-2-GP
DY
MEM_CALRN2
1 2
R8110
R8110
1 2
243R2F-2-GP
243R2F-2-GP
R8111
R8111
1 2
243R2F-2-GP
243R2F-2-GP
R8112
R8112
1 2
243R2F-2-GP
243R2F-2-GP
DIS
DIS
DY
DY
DY
DY
R8107243R2F-2-GPDYR8107243R2F-2-GP
MEM_CALRP1
MEM_CALRP0
MEM_CALRP2
B B
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
MVREFDA
MVREFSA
MEM_CALRN0
MEM_CALRN1
MEM_CALRN2
MEM_CALRP1
MEM_CALRP0
MEM_CALRP2
DDR2
GDDR3/GDDR5
GDDR3/GDDR5
DDR3
DDR3
C37
DQA0_0/DQA_0
C35
DQA0_1/DQA_1
A35
DQA0_2/DQA_2
E34
DQA0_3/DQA_3
G32
DQA0_4/DQA_4
D33
DQA0_5/DQA_5
F32
DQA0_6/DQA_6
E32
DQA0_7/DQA_7
D31
DQA0_8/DQA_8
F30
DQA0_9/DQA_9
C30
DQA0_10/DQA_10
A30
DQA0_11/DQA_11
F28
DQA0_12/DQA_12
C28
DQA0_13/DQA_13
A28
DQA0_14/DQA_14
E28
DQA0_15/DQA_15
D27
DQA0_16/DQA_16
F26
DQA0_17/DQA_17
C26
DQA0_18/DQA_18
A26
DQA0_19/DQA_19
F24
DQA0_20/DQA_20
C24
DQA0_21/DQA_21
A24
DQA0_22/DQA_22
E24
DQA0_23/DQA_23
C22
DQA0_24/DQA_24
A22
F22
D21
A20
F20
D19
E18
C18
A18
F18
D17
A16
F16
D15
E14
F14
D13
F12
A12
D11
F10
A10
C10
G13
H13
J13
H11
G10
G8
K9
K10
G9
A8
C8
E8
A6
C6
E6
A5
L18
L20
L27
N12
AG12
M12
M27
AH12
MADISON-PRO-2-GP
MADISON-PRO-2-GP
DQA0_25/DQA_25
DQA0_26/DQA_26
DQA0_27/DQA_27
DQA0_28/DQA_28
DQA0_29/DQA_29
DQA0_30/DQA_30
DQA0_31/DQA_31
DQA1_0/DQA_32
DQA1_1/DQA_33
DQA1_2/DQA_34
DQA1_3/DQA_35
DQA1_4/DQA_36
DQA1_5/DQA_37
DQA1_6/DQA_38
DQA1_7/DQA_39
DQA1_8/DQA_40
DQA1_9/DQA_41
DQA1_10/DQA_42
DQA1_11/DQA_43
DQA1_12/DQA_44
DQA1_13/DQA_45
DQA1_14/DQA_46
DQA1_15/DQA_47
DQA1_16/DQA_48
DQA1_17/DQA_49
DQA1_18/DQA_50
DQA1_19/DQA_51
DQA1_20/DQA_52
DQA1_21/DQA_53
DQA1_22/DQA_54
DQA1_23/DQA_55
DQA1_24/DQA_56
DQA1_25/DQA_57
DQA1_26/DQA_58
DQA1_27/DQA_59
DQA1_28/DQA_60
DQA1_29/DQA_61
DQA1_30/DQA_62
DQA1_31/DQA_63
MVREFDA
MVREFSA
MEM_CALRN0
MEM_CALRN1
MEM_CALRN2
MEM_CALR P1
MEM_CALR P0
MEM_CALR P2
MEMORY INTERFACE A
MEMORY INTERFACE A
GDDR5/DDR2/GDDR3
GDDR5/DDR2/GDDR3
EDCA0_0/QSA_0/RDQSA_0
EDCA0_1/QSA_1/RDQSA_1
EDCA0_2/QSA_2/RDQSA_2
EDCA0_3/QSA_3/RDQSA_3
EDCA1_0/QSA_4/RDQSA_4
EDCA1_1/QSA_5/RDQSA_5
EDCA1_2/QSA_6/RDQSA_6
EDCA1_3/QSA_7/RDQSA_7
DDBIA0_0/QSA_0#/WDQSA_0
DDBIA0_1/QSA_1#/WDQSA_1
DDBIA0_2/QSA_2#/WDQSA_2
DDBIA0_3/QSA_3#/WDQSA_3
DDBIA1_0/QSA_4#/WDQSA_4
DDBIA1_1/QSA_5#/WDQSA_5
DDBIA1_2/QSA_6#/WDQSA_6
DDBIA1_3/QSA_7#/WDQSA_7
DIS
DIS
12
R8113
R8113
Ra Ra
40D2R2F-GP
40D2R2F-GP
M96
M96
12
M96
M96
R8117
R8117
100R2F-L1-GP-U
100R2F-L1-GP-U
Rb Rb RbRb
M96
M96
3 OF 8
DDR2
DDR2
GDDR5/GDDR3
GDDR5/GDDR3
DDR3
DDR3
MAA0_0/MAA_0
MAA0_1/MAA_1
MAA0_2/MAA_2
MAA0_3/MAA_3
MAA0_4/MAA_4
MAA0_5/MAA_5
MAA0_6/MAA_6
MAA0_7/MAA_7
MAA1_0/MAA_8
MAA1_1/MAA_9
MAA1_2/MAA_10
MAA1_3/MAA_11
MAA1_4/MAA_12
MAA1_5/MAA_13_BA2
MAA1_6/MAA_14_BA0
MAA1_7/MAA_A15_BA1
WCKA0_0/DQMA_0
WCKA0#_0/DQMA_1
WCKA0_1/DQMA_2
WCKA0#_1/DQMA_3
WCKA1_0/DQMA_4
WCKA1#_0/DQMA_5
WCKA1_1/DQMA_6
WCKA1#_1/DQMA_7
ADBIA0/ODTA0
ADBIA1/ODTA1
CLKA0
CLKA0#
CLKA1
CLKA1#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0#_0
CSA0#_1
CSA1#_0
CSA1#_1
CKEA0
CKEA1
WEA0#
WEA1#
MAA0_8
MAA1_8
GDDR5
GDDR5
12
C8104
C8104
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DDR3/GDDR3 Memory Stuff Option(Mad/Park)
GDDR5
GDDR3
A A
5
MVDDQ
Ra
Rb
1.5V
40.2R
100R
1.8V/1.5V
40.2R
100R
4
G24
J23
H24
J24
H26
J26
H21
G21
H19
H20
L13
G16
J16
H16
J17
H17
A32
C32
D23
E22
C14
A14
E10
D9
C34
D29
D25
E20
E16
E12
J10
D7
A34
E30
E26
C20
C16
C12
J11
F8
J21
G19
H27
G27
J14
H14
K23
K19
K20
K17
K24
K27
M13
K16
K21
J20
K26
L15
H23
J19
MAA0 85,86
MAA1 85,86
MAA2 85,86
MAA3 85,86
MAA4 85,86
MAA5 85,86
MAA6 85,86
MAA7 85,86
MAA8 85,86
MAA9 85,86
MAA10 85,86
MAA11 85,86
MAA12 85,86
A_BA2 85,86
A_BA0 85,86
A_BA1 85,86
DQMA0 85
DQMA1 85
DQMA2 85
DQMA3 85
DQMA4 86
DQMA5 86
DQMA6 86
DQMA7 86
QSAP_0 85
QSAP_1 85
QSAP_2 85
QSAP_3 85
QSAP_4 86
QSAP_5 86
QSAP_6 86
QSAP_7 86
QSAN_0 85
QSAN_1 85
QSAN_2 85
QSAN_3 85
QSAN_4 86
QSAN_5 86
QSAN_6 86
QSAN_7 86
ODTA0 85
ODTA1 86
CLKA0 85
CLKA0# 85
CLKA1 86
CLKA1# 86
RASA0# 85
RASA1# 86
CASA0# 85
CASA1# 86
CSA0#_0 85
CSA1#_0 86
CKEA0 85
CKEA1 86
WEA0# 85
WEA1# 86
MAA13 85,86
MDB[32..63]88
X01-20091116
+3.3V_RUN_VGA
DY
DY
1 2
R8122
R8122
DIS
DIS
10KR2J-3-GP
10KR2J-3-GP
1 2
PLACE MVREF DIVIDERS AND CAPS CLOSE T O ASIC
12
R8115
R8115
40D2R2F-GP
40D2R2F-GP
Ra Ra
DIS
DIS
12
DIS
DIS
R8119
R8119
100R2F-L1-GP-U
100R2F-L1-GP-U
DIS
DIS
M96
M96
M96
M96
12
R8114
R8114
40D2R2F-GP
40D2R2F-GP
12
R8118
R8118
100R2F-L1-GP-U
100R2F-L1-GP-U
M96
M96
12
C8105
C8105
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 Change tolerant 20091117
DDR3/GDDR3 Memory Stuff Option(M92/M96)
DDR3
1.5V
40.2R
100R
4
MVDDQ
R8121
R8121
10KR2J-3-GP
10KR2J-3-GP
20100210
12
C8106
C8106
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
GDDR3
1.8V/1.5V
Ra
40.2R
100R
Rb
TEST_EN
1
23
4
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
MVREFDB
MVREFSB
CLKTESTA
CLKTESTB
RN8101
RN8101
SRN4K7J-8-GP
SRN4K7J-8-GP
M96
M96
+1.5V_RUN+1.5V_RUN+1.5V_RUN+1.5V_RUN
12
DIS
DIS
12
DIS
DIS
3
C5
C3
E3
E1
F1
F3
F5
G4
H5
H6
J4
K6
K5
L4
M6
M1
M3
M5
N4
P6
P5
R4
T6
T1
U4
V6
V1
V3
Y6
Y1
Y3
Y5
AA4
AB6
AB1
AB3
AD6
AD1
AD3
AD5
AF1
AF3
AF6
AG4
AH5
AH6
AJ4
AK3
AF8
AF9
AG8
AG7
AK9
AL7
AM8
AM7
AK1
AL4
AM6
AM1
AN4
AP3
AP1
AP5
Y12
AA12
AD28
AK10
AL10
R8116
R8116
40D2R2F-GP
40D2R2F-GP
R8120
R8120
100R2F-L1-GP-U
100R2F-L1-GP-U
DDR3
1.5V
100R
100R
3
VGA1D
VGA1D
DDR2
DDR2
GDDR3/GDDR5
GDDR3/GDDR5
DDR3
DDR3
DQB0_0/DQB_0
DQB0_1/DQB_1
DQB0_2/DQB_2
DQB0_3/DQB_3
DQB0_4/DQB_4
DQB0_5/DQB_5
DQB0_6/DQB_6
DQB0_7/DQB_7
DQB0_8/DQB_8
DQB0_9/DQB_9
DQB0_10/DQB_10
DQB0_11/DQB_11
DQB0_12/DQB_12
DQB0_13/DQB_13
DQB0_14/DQB_14
DQB0_15/DQB_15
DQB0_16/DQB_16
DQB0_17/DQB_17
DQB0_18/DQB_18
DQB0_19/DQB_19
DQB0_20/DQB_20
DQB0_21/DQB_21
DQB0_22/DQB_22
DQB0_23/DQB_23
DQB0_24/DQB_24
DQB0_25/DQB_25
DQB0_26/DQB_26
DQB0_27/DQB_27
DQB0_28/DQB_28
DQB0_29/DQB_29
DQB0_30/DQB_30
DQB0_31/DQB_31
DQB1_0/DQB_32
DQB1_1/DQB_33
DQB1_2/DQB_34
DQB1_3/DQB_35
DQB1_4/DQB_36
DQB1_5/DQB_37
DQB1_6/DQB_38
DQB1_7/DQB_39
DQB1_8/DQB_40
DQB1_9/DQB_41
DQB1_10/DQB_42
DQB1_11/DQB_43
DQB1_12/DQB_44
DQB1_13/DQB_45
DQB1_14/DQB_46
DQB1_15/DQB_47
DQB1_16/DQB_48
DQB1_17/DQB_49
DQB1_18/DQB_50
DQB1_19/DQB_51
DQB1_20/DQB_52
DQB1_21/DQB_53
DQB1_22/DQB_54
DQB1_23/DQB_55
DQB1_24/DQB_56
DQB1_25/DQB_57
DQB1_26/DQB_58
DQB1_27/DQB_59
DQB1_28/DQB_60
DQB1_29/DQB_61
DQB1_30/DQB_62
DQB1_31/DQB_63
MVREFDB
MVREFSB
TESTEN
CLKTESTA
CLKTESTB
MADISON-PRO-2-GP
MADISON-PRO-2-GP
MVREFSBMVREFDBMVREFSAMVREFDA
12
DIS
DIS
C8107
C8107
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4 OF 8
4 OF 8
DDR2
DDR2
GDDR5/GDDR3
GDDR5/GDDR3
DDR3
DDR3
P8
MAB0_0/MAB_0
T9
MAB0_1/MAB_1
P9
MAB0_2/MAB_2
N7
MAB0_3/MAB_3
N8
MAB0_4/MAB_4
N9
MAB0_5/MAB_5
U9
MAB0_6/MAB_6
U8
MAB0_7/MAB_7
Y9
MAB1_0/MAB_8
W9
MAB1_1/MAB_9
MAB1_2/MAB_10
MAB1_3/MAB_11
MAB1_4/MAB_12
WCKB0_0/DQMB_0
WCKB0#_0/DQMB_1
WCKB0_1/DQMB_2
WCKB0#_1/DQMB_3
WCKB1_0/DQMB_4
WCKB1#_0/DQMB_5
WCKB1_1/DQMB_6
WCKB1#_1/DQMB_7
MEMORY INTERFACE B
MEMORY INTERFACE B
GDDR5/DDR2/GDDR3
GDDR5/DDR2/GDDR3
EDCB0_0/QSB_0/RDQSB_0
EDCB0_1/QSB_1/RDQSB_1
EDCB0_2/QSB_2/RDQSB_2
EDCB0_3/QSB_3/RDQSB_3
EDCB1_0/QSB_4/RDQSB_4
EDCB1_1/QSB_5/RDQSB_5
EDCB1_2/QSB_6/RDQSB_6
EDCB1_3/QSB_7/RDQSB_7
DDBIB0_0/QSB_0#/WDQSB_0
DDBIB0_1/QSB_1#/WDQSB_1
DDBIB0_2/QSB_2#/WDQSB_2
DDBIB0_3/QSB_3#/WDQSB_3
DDBIB1_0/QSB_4#/WDQSB_4
DDBIB1_1/QSB_5#/WDQSB_5
DDBIB1_2/QSB_6#/WDQSB_6
DDBIB1_3/QSB_7#/WDQSB_7
DIS
DIS
AC8
AC9
AA7
AA8
MAB1_5/BA2
Y8
MAB1_6/BA0
AA9
MAB1_7/BA1
H3
H1
T3
T5
AE4
AF5
AK6
AK5
F6
K3
P3
V5
AB5
AH1
AJ9
AM5
G7
K1
P1
W4
AC4
AH3
AJ8
AM3
T7
ADBIB0/ODTB0
W7
ADBIB1/ODTB1
L9
CLKB0
L8
CLKB0#
AD8
CLKB1
AD7
CLKB1#
T10
RASB0#
Y10
RASB1#
W10
CASB0#
AA10
CASB1#
P10
CSB0#_0
L10
CSB0#_1
AD10
CSB1#_0
AC10
CSB1#_1
U10
CKEB0
AA11
CKEB1
N10
WEB0#
AB11
WEB1#
T8
MAB0_8
W8
DRAM_RST#
GDDR5
GDDR5
MAB1_8
DRAM_RST
AH11
This basic topology should be used for DRAM_RST for
**
DDR3/GDDR3/GDDR5.These Capacitors and Resistor values
are an example only. The Series R and || Cap values
will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board
to pass Reset Signal Spec.
R_MEM_2
C_MEM
12
DIS
DIS
Designator
R_MEM_1
R_MEM_2
R_MEM_3
C_MEM
2
MAB0 87,88
MAB1 87,88
MAB2 87,88
MAB3 87,88
MAB4 87,88
MAB5 87,88
MAB6 87,88
MAB7 87,88
MAB8 87,88
MAB9 87,88
MAB10 87,88
MAB11 87,88
MAB12 87,88
B_BA2 87,88
B_BA0 87,88
B_BA1 87,88
DQMB0 87
DQMB1 87
DQMB2 87
DQMB3 87
DQMB4 88
DQMB5 88
DQMB6 88
DQMB7 88
QSBP_0 87
QSBP_1 87
QSBP_2 87
QSBP_3 87
QSBP_4 88
QSBP_5 88
QSBP_6 88
QSBP_7 88
QSBN_0 87
QSBN_1 87
QSBN_2 87
QSBN_3 87
QSBN_4 88
QSBN_5 88
QSBN_6 88
QSBN_7 88
ODTB0 87
ODTB1 88
CLKB0 87
CLKB0# 87
CLKB1 88
CLKB1# 88
RASB0# 87
RASB1# 88
CASB0# 87
CASB1# 88
CSB0#_0 87
CSB1#_0 88
CKEB0 87
CKEB1 88
WEB0# 87
WEB1# 88
MAB13 87,88
DIS
DIS
1 2
R8103 51R2J-2-GP
R8103 51R2J-2-GP
C8103
C8103
SC68P50V2JN-1GP
SC68P50V2JN-1GP
For Mannhatton
10K
51R
DNI
68pF
2
+1.5V_RUN
12
R_MEM_3
R8102
R8102
DY
DY
2K2R2J-2-GP
2K2R2J-2-GP
12
R_MEM_1
R8105
R8105
DIS
DIS
10KR2J-3-GP
10KR2J-3-GP
For M96-M2/M92-M2
0R/Short
1
MEM_RST 85,86,87, 88
X01-20091118
2.2nF
DNI
10K
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C .
Taipei Hsien 221, Taiwan, R.O.C .
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
C
C
C
GPU Memory(2/5)
GPU Memory(2/5)
GPU Memory(2/5)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C .
81 92Monday, March 29, 2010
81 92Monday, March 29, 2010
81 92Monday, March 29, 2010
1
A00
A00
A00
of
of
of
Page 82
5
MEMORY ID Table
DVPDATA[0:3]
0001
0011
0010
0000
D D
DDR3 Hynix-H5TQ1G63BFR-12C (800MHz) 64M*16
DDR3 Hynix-H5TQ2G63BFR-12C (800MHz) 128M*16
DDR3 SAMSUNG K4W2G1646B-HC12 (800MHz) 128M*16
DDR3 SAMSUNG-K4W1G1646E-HC12 (800MHz) 64M*16
X02-20100104
2N7002EDW-G P
2N7002EDW-G P
Q8203
Q8203
84.27002.F3F DY
84.27002.F3F DY
H_THERMTRIP#9,25,37,42
THERMTRIP_VGA_GATE37
JTAG_TRST#_VGA
X01-20091116
R8201
R8201
10KR2J-3-GP
10KR2J-3-GP
C C
JTAG SIGNAL OPTION
B B
A A
JTAG_TCK_VGA
DY
DY
+3.3V_RUN_VGA
Signal
R8203
R8203
DY
DY
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
R8205
R8205
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
JTAG_TMS_VGA
Normal
mode
"1"(PU)TESTEN "1"(PU)
"0"(PD) "1"(PU)JTAG_TRST#
JTAG_TCK
CLK
JTAG_TMS
X02-20091210
Voltage Swing:1.8V
R8212 124R2F-U-GP
R8212 124R2F-U-GP
Description
MEM_ID Control
X02-20091222
GPU_LVDS_CLK20,54
GPU_LVDS_DATA20,54
PWRCNTL_089
PEG_CLKREQ#23
R8204
R8204
1 2
X01-20091116
+1.8V_RUN_VGA
R8207 10KR2J-3-GP
R8207 10KR2J-3-GP
R8209 10KR2J-3-GP
R8209 10KR2J-3-GP
+3.3V_RUN_VGA
1
TP8207 TPAD14- GPTP8207 TPAD14-G P
TP8203
TP8203
TP8213
TP8213
TP8209
TP8209
PWRCNTL_189
TP8202 TPAD14-GPTP8202 TPAD14-G P
DY
DY
0R2J-2-GP
0R2J-2-GP
DVPDATA[0:3] Default:Pull down
5
12
R8208
R8208
DY
DY
10KR2J-3-GP
10KR2J-3-GP
Straps
pilot run
mode
I2C Bus for LVDS
TX_DEEMPH_EN80
BIF_GEN2_EN_A80
GPIO5_AC_BATT80
BIOS_ROM_EN80
THERMTRIP_R
6
123 4
Debug
mode
"0"(PD)
THERMTRIP_VGA
THERMTRIP_VGA# 37
D
Q8202
Q8202
.
.
2N7002E-1-GP
.
.
.
.
.
.
.
.
G
2N7002E-1-GP
84.2N702.D31
84.2N702.D31
S
X02-20100104
DY
DY
TX_PWRS_ENB80
GPIO8_ROMSO80
VGA_DIS80
CONFIG080
CONFIG180
CONFIG280
GPIO21_BB_EN80
CLK_VGA_27M_SS7
For new version no 27M
NC
"1"(PU)
"1"(PU)"1"(PU)
1 2
NC
NC
+1.8V_RUN_VGA
DIS
DIS
1 2
BLM18PG471SN1D-GP
BLM18PG471SN1D-GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
+1.0V_RUN_VGA
L8207 BLM18PG471SN1D-GP
L8207 BLM18PG471SN1D-GP
M96
M96
XTALINCLK_VGA_27M_NSS
12
R8213
R8213
150R2F-1-GP
150R2F-1-GP
M96
M96
Clock Input Configuraiton - GDDR3/DDR3
a) 27MHz crystal connected to XTALIN or XTALOUT or
b) 27MHz (1.8V) oscillator connected to XTALIN or
c) 27MHz (3.3V) oscillator connected to XO_IN (Park, Madison, and Broadway only)
5
L8201
L8201
C8205
C8205
DIS
DIS
1 2
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
(1.8V@75mA DPLL_PVDD)
PLACE VREFG DIVIDER AND CAP
CLOSE TO ASIC
12
C8218
C8218
12
DY
DY
DIS
DIS
x01 Change tolerant 20091117
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1.0V@125mA DPLL_VDDC)
(1.1V@150mA DPLL_VDDC For M96/M92)
12
12
C8221
DY
DY
L8204
L8204
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
C8221
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
C8220
C8220
+1.8V_RUN_VGA
+1.8V_RUN_VGA
12
DIS
DIS
DPLL_PVDD
C8219
C8219
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
DIS
DIS
DIS
DIS
DIS
DIS
12
C8222
C8222
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R8217
R8217
249R2F-GP
249R2F-GP
CLK_VGA_27M_NSS7
12
DIS
DIS
(1.8V@20mA TSVDD)
12
12
C8224
C8224
DIS
DIS
SC1U6D3V2KX-GP
C8223
C8223
SC1U6D3V2KX-GP
DY
DY
4
Hynix
Hynix
1 2
1 2
VRAM_1G
VRAM_1G
TP8223 TPAD14-GPTP8223 T PAD14-GP
1
23
RN8201
RN8201
SRN4K7J-8-GP
SRN4K7J-8-GP
DIS
DIS
4
4
SRN0J-6-GP
SRN0J-6-GP
VGA_BLEN55
TP8208 TPAD14- GPTP8208 TPAD14-G P
TPAD14-GP
TPAD14-GP
1
TPAD14-GP
TPAD14-GP
1
TPAD14-GP
TPAD14-GP
1
1
TP8205 TPAD14-GPTP8205 TPAD14-G P
1
TP8206 TPAD14-GPTP8206 TPAD14-G P
1
TP8211 TPAD14-GPTP8211 TPAD14-G P
1
TP8218 TPAD14-GPTP8218 TPAD14-G P
1
TP8219 TPAD14-GPTP8219 TPAD14-G P
1
TP8212 TPAD14-GPTP8212 TPAD14-G P
1
TP8220 TPAD14-GPTP8220 TPAD14-G P
1
TP8221 TPAD14-GPTP8221 TPAD14-G P
1
HDMI_HPD_DET57
R8216
R8216
499R2F-2-GP
499R2F-2-GP
C8217
C8217
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
DIS
DIS
DPLL_VDDC
X02 20091208
R8211 0R2J-2-GP
R8211 0R2J-2-GP
VGA_THERMDA39
VGA_THERMDC39
TP8214 TPAD14-GPTP8214 TPAD14-G P
DIS
DIS
1
TP8222 TPAD14-GPTP8222 T PAD14-GP
1
RN8202
RN8202
DIS
DIS
1
GPU_VREFG
DPLL_PVDD
R8210 0R2J-2- GP
R8210 0R2J-2- GP
1 2
1
12
GPU_LVDS_CLK_C
1
GPU_LVDS_DATA_C
23
GPIO6_VGA
GPIO16_SSIN
GPIO17_VGA
GPIO18_VGA
THERMTRIP_VGA
JTAG_TRST#_VGA
JTAG_TDI_VGA
JTAG_TCK_VGA
JTAG_TMS_VGA
GENERICE_HPD4
1 2
PARK
PARK
M96
M96
DY
DY
TSVDD
C8225
C8225
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
MEM_ID0
MEM_ID1
MEM_ID2
MEM_ID3
VPIO14_VGA
JTAG_TDO_VGA
GEN_A
GEN_B
GENERICC
GENERICD
GENERICF
GENERICG
XTALIN
XTALOUT
XO_IN
C8226
C8226
SC470P50V2JN-GP
SC470P50V2JN-GP
1 2
FAN_PWM
x01 Change tolerant 20091117
4
VGA1B
VGA1B
AR8
DVPCNTL_MVP_0
AU8
DVPCNTL_MVP_1
AP8
DVPCNTL_0
AW8
DVPCNTL_1
AR3
DVPCNTL_2
AR1
DVPCLK
AU1
DVPDATA_0
AU3
DVPDATA_1
AW3
DVPDATA_2
AP6
DVPDATA_3
AW5
DVPDATA_4
AU5
DVPDATA_5
AR6
DVPDATA_6
AW6
DVPDATA_7
AU6
DVPDATA_8
AT7
DVPDATA_9
AV7
DVPDATA_10
AN7
DVPDATA_11
AV9
DVPDATA_12
AT9
DVPDATA_13
AR10
DVPDATA_14
AW10
DVPDATA_15
AU10
DVPDATA_16
AP10
DVPDATA_17
AV11
DVPDATA_18
AT11
DVPDATA_19
AR12
DVPDATA_20
AW12
DVPDATA_21
AU12
DVPDATA_22
AP12
DVPDATA_23
AK26
SCL
AJ26
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
AH20
GPIO_0
AH18
GPIO_1
AN16
GPIO_2
AH23
GPIO_3_SMBDATA
AJ23
GPIO_4_SMBCLK
AH17
GPIO_5_AC_BATT
AJ17
GPIO_6
AK17
GPIO_7_BLON
AJ13
GPIO_8_ROMSO
AH15
GPIO_9_ROMSI
AJ16
GPIO_10_ROMSCK
AK16
GPIO_11
AL16
GPIO_12
AM16
GPIO_13
AM14
GPIO_14_HPD2
AM13
GPIO_15_PWRCNTL_0
AK14
GPIO_16_SSIN
AG30
GPIO_17_THERMAL_INT
AN14
GPIO_18_HPD3
AM17
GPIO_19_CTF
AL13
GPIO_20_PWRCNTL_1
AJ14
GPIO_21_BB_EN
AK13
GPIO_22_ROMCS#
AN13
GPIO_23_CLKREQ#
AM23
JTAG_TRST#
AN23
JTAG_TDI
AK23
JTAG_TCK
AL24
JTAG_TMS
AM24
JTAG_TDO
AJ19
GENERICA
AK19
GENERICB
AJ20
GENERICC
AK20
GENERICD
AJ24
GENERICE_HPD4
AH26
GENERICF
AH24
GENERICG
AK24
HPD1
AH13
VREFG
AM32
DPLL_PVDD
AN32
DPLL_PVSS
AN31
DPLL_VDDC
AV33
XTALIN
AU34
XTALOUT
AW34
XO_IN
AW35
XO_IN2
AF29
DPLUS
AG29
DMINUS
AK32
TS_FDO
AL31
TS_A
AJ32
TSVDD
AJ33
TSVSS
MADISON-PRO-2-GP
MADISON-PRO-2-GP
MUTI GFX
MUTI GFX
I2C
I2C
PLL/CLOCK
PLL/CLOCK
THERMAL
THERMAL
DIS
DIS
DPA
DPA
DPB
DPB
TXCCM_DPC3N
DPC
DPC
TXCDM_DPD3N
DPD
DPD
DAC1
DAC1
DAC2
DAC2
DDC/AUX
DDC/AUX
DDCCLK_AUX3P
DDCDATA_AUX3N
DDCCLK_AUX4P
DDCDATA_AUX4N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDCCLK_AUX7P
DDCDATA_AUX7N
2 OF 8
2 OF 8
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
TXCCP_DPC3P
TX0P_DPC2P
TX0M_DPC2N
TX1P_DPC1P
TX1M_DPC1N
TX2P_DPC0P
TX2M_DPC0N
TXCDP_DPD3P
TX3P_DPD2P
TX3M_DPD2N
TX4P_DPD1P
TX4M_DPD1N
TX5P_DPD0P
TX5M_DPD0N
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
COMP
H2SYNC
V2SYNC
VDD2DI
VSS2DI
A2VDD
A2VDDQ
A2VSSQ
R2SET
DDC1CLK
DDC1DATA
AUX1P
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDC6CLK
DDC6DATA
3
AU24
AV23
AT25
AR24
AU26
AV25
AT27
AR26
AR30
AT29
AV31
AU30
AR32
AT31
AT33
AU32
AU14
AV13
AT15
AR14
AU16
AV15
AT17
AR16
AU20
AT19
AT21
AR20
AU22
AV21
AT23
AR22
AD39
R
AD37
R#
AE36
G
AD35
G#
AF37
B
AE38
B#
AC36
AC38
GPU_RSET
AB34
AD34
AE34
AC33
AC34
AC30
R2
AC31
R2#
AD30
G2
AD31
G2#
AF30
B2
AF31
B2#
AC32
C
AD32
Y
AF32
AD29
AC29
AG31
AG32
AG33
AD33
AF33
R2SET
AA29
AM26
AN26
AM27
AL27
AM19
AL19
AN20
AM20
AL30
AM30
AL29
AM29
AN21
AM21
AJ30
AJ31
AK30
AK29
3
HDMI_PCH_CLK 20,57
HDMI_PCH_CLK# 20,57
HDMI_PCH_DATA0 20,57
HDMI_PCH_DATA0# 20,57
HDMI_PCH_DATA1 20,57
HDMI_PCH_DATA1# 20,57
HDMI_PCH_DATA2 20,57
HDMI_PCH_DATA2# 20,57
R8202 10KR2J-3-GP
R8202 10KR2J-3-GP
+3.3V tolerant
VGA_CRT_HSYNC 77,80
VGA_CRT_VSYNC 77,80
1 2
R8214 499R2F-2-GP
R8214 499R2F-2-GP
AVDD
VDD1DI
+1.8V_RUN_VGA
DIS
DIS
1 2
715R2F-GP
715R2F-GP
R8218
R8218
VGA_CRT_DDCCLK 77
VGA_CRT_DDCDATA 77
GPU_HDMI_CLK 57
GPU_HDMI_DATA 57
1 2
DIS
DIS
DIS
DIS
+3.3V_RUN_VGA
VGA_BLEN
VGA_CRT_RED 77
VGA_CRT_GREEN 77
VGA_CRT_BLUE 77
VGA_CRT_BLUE
VGA_CRT_GREEN
VGA_CRT_RED
AVSSQ
AVSSQ
HSYNC_DAC2 80
VSYNC_DAC2 80
DDC1 channel for CRT
DDC2 channel for HDMI
DDC1/DDC2/DDC6 have 5V-tolerant
C8227
C8227
12
DY
DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
RN8204
RN8204
1
2
DIS
DIS
3
4 5
SRN150F-1-GP
SRN150F-1-GP
X02-20091222
R8206
R8206
1 2
0R0402-PAD
0R0402-PAD
A2VDDQ
X8201
X8201
XTALIN
DY
DY
2 3
XTAL-27MHZ-85-GP
XTAL-27MHZ-85-GP
2
LVDS Interface
7 OF 8
VGA1G
VGA1G
LVDS CONTROL
LVDS CONTROL
LVTMDP
LVTMDP
DIS
DIS
MADISON-PRO-2-GP
MADISON-PRO-2-GP
8
7
6
41
XTALOUT
7 OF 8
AK27
VARY_BL
AJ27
DIGON
TXOUT_U3P
TXOUT_U3N
TXOUT_L3P
TXOUT_L3N
L8202
L8202
DIS
DIS
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
L8203
L8203
DIS
DIS
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
AK35
AL36
AJ38
AK37
AH35
AJ36
AG38
AH37
AF35
AG36
AP34
AR34
AW37
AU35
AR37
AU39
AP35
AR35
AN36
AP37
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
+1.8V_RUN_VGA
x01 Change tolerant 20091117
L8205
L8205
DIS
DIS
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
+3.3V_RUN_VGA
C8228
C8228
1 2
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
DY
2
RN8203
RN8203
1
4
DIS
DIS
2 3
SRN10KJ-5-GP
SRN10KJ-5-GP
VGA_LBKLT_CTL 55
VGA_LCDVDD_EN 55
GPU_LVDSB_TXC 55
GPU_LVDSB_TXC# 55
GPU_LVDSB_TX0 55
GPU_LVDSB_TX0# 55
GPU_LVDSB_TX1 55
GPU_LVDSB_TX1# 55
GPU_LVDSB_TX2 55
GPU_LVDSB_TX2# 55
GPU_LVDSA_TXC 55
GPU_LVDSA_TXC# 55
GPU_LVDSA_TX0 55
GPU_LVDSA_TX0# 55
GPU_LVDSA_TX1 55
GPU_LVDSA_TX1# 55
GPU_LVDSA_TX2 55
GPU_LVDSA_TX2# 55
(1.8V@65mA AVDD)
x01 Change tolerant 20091117
12
C8201
C8201
DIS
DIS
(1.8V@100mA VDD1DI)
12
C8202
C8202
DIS
DIS
(1.8V@50mA VDD2DI)
C8209
C8209
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
(1.8V@1.5mA A2VDDQ)
C8212
C8212
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 Change tolerant 20091117
(3.3V@130mA A2VDD)
AVDD
12
12
C8204
C8204
C8203
C8203
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
AVSSQ
VDD1DI
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 Change tolerant 20091117
12
12
C8206
C8206
C8207
C8207
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8210
C8210
DY
DY
DY
DY
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
A2VDDQ
12
C8213
C8213
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8215
C8215
DY
DY
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
1
C8216
C8216
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
GPU_DP/LVDS/CRT/GPIO(3/5)
GPU_DP/LVDS/CRT/GPIO(3/5)
GPU_DP/LVDS/CRT/GPIO(3/5)
A2
A2
A2
Berry
Berry
Berry
1
A00
A00
82 92Monday, March 29, 2010
82 92Monday, March 29, 2010
82 92Monday, March 29, 2010
A00
of
of
of
Page 83
+1.5V_RUN
D D
+1.8V_RUN_VGA
C C
For DDR3/GDDR5, MVDDQ = 1.5V
12
C8301
C8301
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8318
C8318
DIS
DIS
x01 change tolerant 20091117
12
C8303
C8303
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
DIS
DIS
L8301 BLM15BD121SS1D-G P
L8301 BLM15BD121SS1D-G P
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
x01 change tolerant 20091117
1 2
DIS
DIS
L8302 BLM15BD121SS1D-G P
L8302 BLM15BD121SS1D-G P
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
B B
5
x01 change tolerant 20091117
12
12
C8304
C8304
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8319
C8319
DIS
DIS
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C8335
C8335
12
12
C8306
C8306
C8305
C8305
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8320
C8320
C8321
C8321
DIS
DIS
DIS
DIS
(1.8V@110mA VDD_CT)
+3.3V_RUN_VGA
12
C8374
C8374
DIS
DIS
(1.8V@40mA PCIE_PVDD)
12
C8376
C8376
DIS
DIS
(For M96 SPV10 = VDDC)
(For M97, Broadway, Madison and Park SPV10 = 1.0V)
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
12
C8366
C8366
DIS
DIS
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8375
C8375
DIS
DIS
12
C8377
C8377
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8307
C8307
C8308
C8308
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8322
C8322
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8323
C8323
DY
DY
x01 change tolerant 20091117
12
C8351
C8351
C8352
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8367
C8367
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
X02-20091208
+1.5V_RUN
M96
M96
1 2
L8306 BLM15BD121SS1D-GP
L8306 BLM15BD121SS1D-GP
120ohm, 0.3A
X02-20091208
12
+VGA_CORE
C8378
C8378
DIS
DIS
+1.0V_RUN_VGA
BLM18PG471SN1D-GP
BLM18PG471SN1D-GP
C8352
DIS
DIS
C8368
C8368
L8307
L8307
BLM18PG471SN1D-GP
BLM18PG471SN1D-GP
L8303
L8303
1 2
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117
M97, Broadwa y, Madison and Park onl y
M96 do not support core vsense feature
X02-20091208
12
12
C8309
C8309
C8310
C8310
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8324
C8324
C8325
C8325
DY
DY
DY
DY
12
C8353
C8353
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8369
C8369
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
M96
M96
PCIE_PVDD
M96
M96
1 2
PARK
PARK
C8379
C8379
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
12
C8311
C8311
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8326
C8326
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8354
C8354
DIS
DIS
12
C8394
C8394
SPV10
(120mA SPV10)
12
DIS
DIS
TP8301 TPAD14-GPTP8301 TPAD14-G P
TP8302 TPAD14-GPTP8302 TPAD14-G P
12
C8312
C8312
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8327
C8327
DY
DY
12
C8355
C8355
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VDDRH
1 2
M96
M96
R8302 0R2J-2-GP
R8302 0R2J-2-GP
M96
M96
1 2
R8303 0R2J-2-GP
R8303 0R2J-2-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
MPV18
SPV18
12
C8380
C8380
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
FB_VDDC
1
FB_VDDCI
1
M96
M96
1 2
R8304 0R2J-2-GP
R8304 0R2J-2-GP
VDDC_CT
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8381
C8381
DIS
DIS
VCORE_SEN/RTN and VDDCI_SEN/RTN route as diff eretial pair
M97, Broadwa y, Madison and Park onl y
(1.8V@75mA SPV18)
PARK
PARK
1 2
L8304 BLM15BD121SS1D-G P
L8304 BLM15BD121SS1D-G P
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
(M97, Broadway and Madison: 1.8V@150mA MPV18)
(Park: 1.8V@75mA MPV18)
PARK
PARK
1 2
L8305 BLM18PG471SN1D-GP
L8305 BLM18PG471SN1D-GP
A A
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
C8389
C8389
C8392
C8392
12
PARK
PARK
12
PARK
PARK
x02-20091208
SPV18
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C8391
C8391
C8390
C8390
PARK
PARK
PARK
PARK
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
MPV18
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C8396
C8396
C8393
C8393
PARK
PARK
PARK
PARK
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
5
4
VGA1E
VGA1E
MEM I/O
MEM I/O
AC7
VDDR1
AD11
VDDR1
AF7
VDDR1
AG10
VDDR1
AJ7
VDDR1
AK8
VDDR1
AL9
VDDR1
G11
VDDR1
G14
VDDR1
G17
VDDR1
G20
VDDR1
G23
VDDR1
G26
VDDR1
G29
VDDR1
H10
VDDR1
J7
VDDR1
J9
VDDR1
K11
VDDR1
K13
VDDR1
K8
VDDR1
L12
VDDR1
L16
VDDR1
L21
VDDR1
L23
VDDR1
L26
VDDR1
L7
VDDR1
M11
VDDR1
N11
VDDR1
P7
VDDR1
R11
VDDR1
U11
VDDR1
U7
VDDR1
Y11
VDDR1
Y7
VDDR1
LEVEL
LEVEL
TRANSLATION
TRANSLATION
AF26
VDD_CT
AF27
VDD_CT
AG26
VDD_CT
AG27
VDD_CT
I/O
I/O
AF23
VDDR3
AF24
VDDR3
AG23
VDDR3
AG24
VDDR3
AF13
VDDR4
AF15
VDDR4
AG13
VDDR4
AG15
VDDR4
AD12
VDDR4
AF11
VDDR4
AF12
VDDR4
AG11
VDDR4
M20
NC_VDDRHA
VSSRHA
M21
NC_VSSRHA
V12
NC_VDDRHB
VSSRHB
U12
NC_VSSRHB
PLL
PLL
AB37
PCIE_PVDD
H7
MPV18
H8
MPV18
AM10
SPV18
AN9
SPV10
AN10
SPVSS
VOLTAGE
VOLTAGE
SENESE
SENESE
AF28
FB_VDDC
AG28
FB_VDDCI
FB_GND
AH29
FB_GND
MADISON-PRO-2-GP
MADISON-PRO-2-GP
NOTE1:
Back Bias is not supported on M97, Broadway, Madison and Park
For the M96 Back Bias circuitry, refer to REF134
NOTE2:
FB_VDDC, FB_VDDCI and FB_GND are not support on M96
NOTE3:
M97 VDDC and VDDCI ball assignments are different from M96.
If M96 is populated on this design, VDDC and VDDCI will be shorted on the substrate.
NOTE4:
For M2 design compatibility, refer to the document AN_M96_Ax and AN_M97_Ax
4
ISOLATED
ISOLATED
CORE I/O
CORE I/O
DIS
DIS
5 OF 8
5 OF 8
PCIE
PCIE
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDR
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
PCIE_VDDC
VDDC
CORE
CORE
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
POWER
POWER
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC/BIF_VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC/BIF_VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDC
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
VDDCI
x01 change tolerant 20091117
AA31
AA32
AA33
AA34
V28
W29
W30
Y31
G30
G31
H29
H30
J29
J30
L28
M28
N28
R28
T28
U28
AA15
AA17
AA20
AA22
AA24
AA27
AB16
AB18
AB21
AB23
AB26
AB28
AC17
AC20
AC22
AC24
AC27
AD18
AD21
AD23
AD26
AF17
AF20
AF22
AG16
AG18
AG21
AH22
AH27
AH28
M26
N24
N27
R18
R21
R23
R26
T17
T20
T22
T24
T27
U16
U18
U21
U23
U26
V17
V20
V22
V24
V27
Y16
Y18
Y21
Y23
Y26
Y28
AA13
AB13
AC12
AC15
AD13
AD16
M15
M16
M18
M23
N13
N15
N17
N20
N22
R12
R13
R16
T12
T15
V15
Y13
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8313
C8313
DY
DY
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8328
C8328
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8336
C8336
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
12
C8346
C8346
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
x01 change tolerant 20091117 x01 change tolerant 20091117
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8356
C8356
DIS
DIS
12
C8370
C8370
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DIS
DIS
A00 change 22uF 20100329
(GDDR3/DDR3 1.12V@4A VDDCI)
(GDDR5 1.12V@16A VDDCI)
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8382
C8382
DIS
DIS
(1.8V@504mA PCIE_VDDR)
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8314
C8314
DIS
DIS
12
12
C8330
C8330
C8329
C8329
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DIS
DIS
X02-20091224
12
C8337
C8337
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C8348
C8348
C8347
C8347
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8357
C8357
DIS
DIS
12
C8371
C8371
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DIS
DIS
12
12
C8383
C8383
C8384
C8384
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DIS
DIS
3
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8358
C8358
DIS
DIS
3
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
+1.8V_RUN_VGA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8316
C8316
C8315
C8315
DY
DY
DIS
DIS
(1.0V@1920mA PCIE_VDDC)
12
12
C8332
C8332
C8331
C8331
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DIS
DIS
12
C8339
C8339
DIS
DIS
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
DY
DY
12
C8385
C8385
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
12
12
C8341
C8341
C8340
C8340
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DIS
DIS
x01 change tolerant 20091117
12
C8350
C8350
C8349
C8349
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8360
C8360
C8359
C8359
DIS
DIS
DY
DY
12
C8373
C8373
C8372
C8372
DIS
DIS
12
C8386
C8386
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
X02-20091224
2
12
C8317
C8317
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
DIS
DIS
+1.0V_RUN_VGA
12
C8333
C8333
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
12
C8334
C8334
C8302
C8302
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
DIS
DIS
DIS
DIS
For UMA +VGA_CORE connect to GND
+VGA_CORE
12
C8364
C8364
DIS
DIS
UMA
UMA
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
R8301
R8301
0R3J-0-U-GP
0R3J-0-U-GP
12
C8365
C8365
COLAY
COLAY
12
12
C8342
C8342
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8361
C8361
DIS
DIS
12
C8343
C8343
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8362
C8362
DIS
DIS
12
C8344
C8344
C8345
C8345
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8363
C8363
DIS
DIS
VDDCI and VDDC should have seperate regulators with a merge option on PCB
For Madison and Park, VDDCI and VDDC can share one common regulator
+VGA_CORE
12
C8387
C8387
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
12
C8388
C8388
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DIS
DIS
A00 change 22uF 20100329
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
2
Date: Sheet
1
GPU_POWER(4/5)
GPU_POWER(4/5)
GPU_POWER(4/5)
Berry
Berry
Berry
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
83 92Wednesday, March 31, 2010
83 92Wednesday, March 31, 2010
83 92Wednesday, March 31, 2010
of
of
of
A00
A00
A00
Page 84
5
6 OF 8
GND
GND
GND/PX_EN
VSS_MECH
VSS_MECH
VSS_MECH
6 OF 8
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
A3
A37
AA16
AA18
AA2
AA21
AA23
AA26
AA28
AA6
AB12
AB15
AB17
AB20
AB22
AB24
AB27
AC11
AC13
AC16
AC18
AC2
AC21
AC23
AC26
AC28
AC6
AD15
AD17
AD20
AD22
AD24
AD27
AD9
AE2
AE6
AF10
AF16
AF18
AF21
AG17
AG2
AG20
AG22
AG6
AG9
AH21
AJ10
AJ11
AJ2
AJ28
AJ6
AK11
AK31
AK7
AL11
AL14
AL17
AL2
AL20
AL21
AL23
AL26
AL32
AL6
AL8
AM11
AM31
AM9
AN11
AN2
AN30
AN6
AN8
AP11
AP7
AP9
AR5
B11
B13
B15
B17
B19
B21
B23
B25
B27
B29
B31
B33
B7
B9
C1
C39
E35
E5
F11
F13
A39
AW1
AW39
VSS_MECH1
VSS_MECH2
VSS_MECH3
+1.8V_RUN_VGA
BLM18PG471SN1D-GP
BLM18PG471SN1D-GP
LVDS mode
(1.0V@120mA DPE_VDD10)
DP mode
(1.0V@110mA DPE_VDD10)
+1.0V_RUN_VGA
DP mode
(1.8V@130mA DPF_VDD18)
LVDS mode
(1.8V@200mA DPF_VDD18)
+1.8V_RUN_VGA
BLM18PG471SN1D-GP
BLM18PG471SN1D-GP
LVDS mode
(1.0V@120mA DPF_VDD10)
DP mode
(1.0V@110mA DPF_VDD10)
+1.0V_RUN_VGA
TP8401TPAD14-GP TP8401TPAD14-GP
1
TP8402TPAD14-GP TP8402TPAD14-GP
1
TP8403TPAD14-GP TP8403TPAD14-GP
1
VGA1F
VGA1F
AB39
PCIE_VSS
E39
PCIE_VSS
F34
PCIE_VSS
F39
PCIE_VSS
G33
PCIE_VSS
G34
PCIE_VSS
H31
PCIE_VSS
H34
PCIE_VSS
H39
PCIE_VSS
J31
PCIE_VSS
J34
PCIE_VSS
K31
PCIE_VSS
K34
PCIE_VSS
K39
PCIE_VSS
D D
C C
B B
L31
PCIE_VSS
L34
PCIE_VSS
M34
PCIE_VSS
M39
PCIE_VSS
N31
PCIE_VSS
N34
PCIE_VSS
P31
PCIE_VSS
P34
PCIE_VSS
P39
PCIE_VSS
R34
PCIE_VSS
T31
PCIE_VSS
T34
PCIE_VSS
T39
PCIE_VSS
U31
PCIE_VSS
U34
PCIE_VSS
V34
PCIE_VSS
V39
PCIE_VSS
W31
PCIE_VSS
W34
PCIE_VSS
Y34
PCIE_VSS
Y39
PCIE_VSS
F15
GND
F17
GND
F19
GND
F21
GND
F23
GND
F25
GND
F27
GND
F29
GND
F31
GND
F33
GND
F7
GND
F9
GND
G2
GND
G6
GND
H9
GND
J2
GND
J27
GND
J6
GND
J8
GND
K14
GND
K7
GND
L11
GND
L17
GND
L2
GND
L22
GND
L24
GND
L6
GND
M17
GND
M22
GND
M24
GND
N16
GND
N18
GND
N2
GND
N21
GND
N23
GND
N26
GND
N6
GND
R15
GND
R17
GND
R2
GND
R20
GND
R22
GND
R24
GND
R27
GND
R6
GND
T11
GND
T13
GND
T16
GND
T18
GND
T21
GND
T23
GND
T26
GND
U15
GND
U17
GND
U2
GND
U20
GND
U22
GND
U24
GND
U27
GND
U6
GND
V11
GND
V16
GND
V18
GND
V21
GND
V23
GND
V26
GND
W2
GND
W6
GND
Y15
GND
Y17
GND
Y20
GND
Y22
GND
Y24
GND
Y27
GND
U13
GND
V13
GND
MADISON-PRO-2-GP
MADISON-PRO-2-GP
DIS
DIS
4
VGA1H
VGA1H
DPB_VDD18
AP20
DPEF_CALR
R8406
R8406
150R2F-1-GP
150R2F-1-GP
1 2
AW14
AW16
AW20
AW22
AW18
AM33
AM34
AM39
AP21
AP13
AT13
AN17
AP16
AP17
AP22
AP23
AP14
AP15
AN19
AP18
AP19
AH34
AJ34
AL33
AN34
AP39
AR39
AU37
AF34
AG34
AK33
AK34
AF39
AH39
AK39
AL34
DPC_VDD18
DPC_VDD18
DPC_VDD10
DPC_VDD10
DPC_VSSR
DPC_VSSR
DPC_VSSR
DPC_VSSR
DPC_VSSR
DPD_VDD18
DPD_VDD18
DPD_VDD10
DPD_VDD10
DPD_VSSR
DPD_VSSR
DPD_VSSR
DPD_VSSR
DPD_VSSR
DPCD_CALR
DP E/F POWER
DP E/F POWER
DPE_VDD18
DPE_VDD18
DPE_VDD10
DPE_VDD10
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPE_VSSR
DPF_VDD18
DPF_VDD18
DPF_VDD10
DPF_VDD10
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPF_VSSR
DPEF_CALR
MADISON-PRO-2-GP
MADISON-PRO-2-GP
+1.0V_RUN_VGA
(1.0V@110mA DPC_VDD10)
+1.0V_RUN_VGA
(1.0V@110mA DPD_VDD10)
DP mode
(1.8V@130mA DPE_VDD18)
LVDS mode
L8401
L8401
DIS
DIS
1 2
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
L8408
L8408
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
L8405
L8405
1 2
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
L8407
L8407
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
(1.8V@200mA DPE_VDD18)
12
C8401
C8401
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DIS
DIS
DIS
DIS
DIS
DIS
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
For M97/M96, DPF_VDD18 can be shared with DPE_VDD18
For M97/M96, DPF_VDD10 can be shared with DPE_VDD10
x01 change tolerant 20091117
12
12
C8424
C8404
C8404
C8423
C8423
C8426
C8426
C8424
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8427
C8427
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
x01 change tolerant 20091117
12
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
DIS
DIS
C8418
C8418
12
DIS
DIS
DIS
DIS
C8433
C8433
DPE_VDD18
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
12
DIS
DIS
C8428
C8428
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
R8401
R8401
C8419
C8419
DPE_VDD10
C8425
C8425
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DPF_VDD18
DPF_VDD10
DIS
DIS
DPD_VDD18
DIS
DIS
DPCD_CALR DPAB_CALR
1 2
150R2F-1-GP
150R2F-1-GP
12
C8434
C8434
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DIS
DIS
For dual link DVI using DPA AND DPB, DPA_VDDxx and DPB_VDDxx can be shared respectively
For dual link DVI using DPC AND DPD, DPC_VDDxx and DPD_VDDxx can be shared respectively
For dual link LVDS, DPE_VDDxx and DPF_VDDxx can be shared respectively
DP A/B POWERDP C/D POWER
DP A/B POWERDP C/D POWER
DIS
DIS
3
DPA_VDD18
DPA_VDD18
DPA_VDD10
DPA_VDD10
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPA_VSSR
DPB_VDD18
DPB_VDD18
DPB_VDD10
DPB_VDD10
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPB_VSSR
DPAB_CALR
DP PLL POWER
DP PLL POWER
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
DPC_PVDD
DPC_PVSS
DPD_PVDD
DPD_PVSS
DPE_PVDD
DPE_PVSS
DPF_PVDD
DPF_PVSS
8 OF 8
8 OF 8
DPA_VDD18
AN24
AP24
AP31
AP32
AN27
AP27
AP28
AW24
AW26
DPB_VDD18
AP25
AP26
AN33
AP33
AN29
AP29
AP30
AW30
AW32
AW28
150R2F-1-GP
150R2F-1-GP
AU28
AV27
AV29
AR28
AU18
AV17
AV19
AR18
(1.8V@20mA DPE_PVDD)
AM37
AN38
DPF_PVDD_1
AL38
AM35
DPF_PVSS
DPA_VDD10
(1.0V@110mA DPA_VDD10)
12
12
C8402
C8402
C8403
C8403
DIS
DIS
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
x01 change tolerant 20091117
(1.0V@110mA DPB_VDD10)
DPA_PVDD
x01 change tolerant 20091117
R8404
R8404
1 2
DIS
DIS
(1.8V@20mA DPA_PVDD)
12
C8412
C8412
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
(1.8V@20mA DPB_PVDD)
(1.8V@20mA DPC_PVDD)
(1.8V@20mA DPD_PVDD)
DPF_PVDD
PARK
PARK
1 2
R8407 0R2J-2-GP
R8407 0R2J-2-GP
PARK
PARK
1 2
R8408 0R2J-2-GP
R8408 0R2J-2-GP
x02 20091208
(1.8V@20mA DPF_PVDD)
12
C8429
C8429
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117
DIS
DIS
+1.0V_RUN_VGA
12
C8413
C8413
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8430
C8430
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8405
C8405
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
C8414
C8414
DIS
DIS
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
12
DIS
DIS
2
L8403
L8403
DIS
DIS
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
L8404
L8404
DIS
DIS
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
L8406
L8406
DIS
DIS
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
C8416
C8416
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
+1.0V_RUN_VGA
+1.8V_RUN_VGA
DNI for M96/M92
L8402
L8402
1 2
BLM15BD121SS1D-GP
BLM15BD121SS1D-GP
PARK
PARK
1 2
R8402 0R2J-2-GP
R8402 0R2J-2-GP
PARK
PARK
1 2
R8405 0R2J-2-GP
R8405 0R2J-2-GP
PARK
PARK
C8406
C8406
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
C8409
C8409
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
C8415
C8415
SC4D7U6D3V3KX-G P
SC4D7U6D3V3KX-G P
1
(1.8V@130mA DPA_VDD18)
(1.8V@130mA DPB_VDD18)
x01 change tolerant 20091117
12
12
C8407
C8407
PARK
PARK
PARK
PARK
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8410
C8410
DY
DY
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
(1.8V@130mA DPD_VDD18)
12
12
C8421
C8421
DY
DY
PARK
PARK
DY
DY
x01 change tolerant 20091117
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
DPA_VDD18+1.8V_RUN_VGA
12
C8408
C8408
PARK
PARK
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DPB_VDD18
12
C8411
C8411
PARK
PARK
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DPD_VDD18
C8422
C8422
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
GPU_DPPWR/GND(5/5)
GPU_DPPWR/GND(5/5)
GPU_DPPWR/GND(5/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Berry A00
Berry A00
Berry A00
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
1
of
84 92Monday, February 22, 2010
of
84 92Monday, February 22, 2010
of
84 92Monday, February 22, 2010
Page 85
5
4
3
2
1
x01 change tolerant 20091117 x01 change tolerant 20091117
C8509
C8508
C8508
12
C8507
D D
C C
B B
C8507
M96
M96
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
CLKA081
CLKA0#81
56R2F-1-GP
56R2F-1-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
x01 20091121
12
M96
M96
R8508
R8508
C8503
C8503
M96
M96
C8509
12
C8510
C8510
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
56R2F-1-GP
56R2F-1-GP
GPU_CLKA0_T
12
M96
M96
12
M96
M96
R8507
R8507
M96
M96
C8512
C8512
C8511
C8511
12
12
M96
M96
M96
M96
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8502
C8502
12
M96
M96
VRAM1_VREF
VRAM2_VREF
R8503 243R2F-2-GP
R8503 243R2F-2-GP
MAA081,86
MAA181,86
MAA281,86
MAA381,86
MAA481,86
MAA581,86
MAA681,86
MAA781,86
MAA881,86
MAA981,86
MAA1081,86
MAA1181,86
MAA1281,86
MAA1381,86
A_BA081,86
A_BA181,86
A_BA281,86
CKEA081
DQMA281 DQMA181
DQMA081
WEA0#81
CASA0#81
RASA0#81
C8514
C8514
1 2
+1.5V_RUN +1.5V_RUN
C8513
C8513
12
12
M96
M96
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8505
C8505
12
M96
M96
M96
M96
VRAM_ZQ1 VRAM_ZQ2
+1.5V_RUN
VRAM1
VRAM1
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
12
R8510
R8510
2K1R2F-GP
2K1R2F-GP
M96
M96
12
R8511
R8511
2K1R2F-GP
2K1R2F-GP
M96
M96
M96
M96
VRAM1_VREF
M96
M96
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
12
C8504
C8504
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
MDA3 MDA29
E3
MDA7
F7
MDA1
F2
MDA6
F8
MDA2
H3
MDA4
H8
MDA0
G2
MDA5
H7
MDA20 MDA8
D7
MDA19
C3
MDA23
C8
MDA18
C2
MDA22
A7
MDA16
A2
MDA21
B8
MDA17
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDA[0..31] 81
QSAP_2 81
QSAN_2 81
QSAP_0 81
QSAN_0 81
ODTA0 81
CSA0#_0 81
MEM_RST 81,86,87,88
12
C8524
C8524
M96
M96
C8525
C8525
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
C8516
C8516
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8515
C8515
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8518
C8518
M96
M96
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
12
C8517
C8517
C8519
C8519
M96
M96
M96
M96
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C8521
C8521
12
M96
M96
VRAM2_VREF
VRAM1_VREF
+1.5V_RUN
1 2
R8504 243R2F-2-GP
R8504 243R2F-2-GP
M96
M96
MAA081,86
MAA181,86
MAA281,86
MAA381,86
MAA481,86
MAA581,86
MAA681,86
MAA781,86
MAA881,86
MAA981,86
MAA1081,86
MAA1181,86
MAA1281,86
MAA1381,86
A_BA081,86
A_BA181,86
A_BA281,86
CLKA081
CLKA0#81
CKEA081
DQMA381
WEA0#81
CASA0#81
RASA0#81
12
R8513
R8513
2K1R2F-GP
2K1R2F-GP
M96
M96
12
R8512
R8512
2K1R2F-GP
2K1R2F-GP
M96
M96
C8520
C8520
12
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8522
C8522
12
M96
M96
VRAM2_VREF
M96
M96
VRAM2
VRAM2
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
12
C8506
C8506
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
M96
M96
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
E3
MDA24
F7
MDA30
F2
MDA26
F8
MDA28
H3
MDA27
H8
MDA25
G2
MDA31
H7
D7
MDA14
C3
MDA9
C8
MDA10
C2
MDA15
A7
MDA12
A2
MDA13
B8
MDA11
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDA[0..31] 81
QSAP_1 81
QSAN_1 81
QSAP_3 81
QSAN_3 81
ODTA0 81
CSA0#_0 81
MEM_RST 81,86,87,88
x01 change tolerant 20091117
A A
5
4
3
x01 change tolerant 20091117
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GPU-VRAM1,2 (1/4)
GPU-VRAM1,2 (1/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet
Date: Sheet
GPU-VRAM1,2 (1/4)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
85 92Monday, March 29, 2010
of
85 92Monday, March 29, 2010
of
85 92Monday, March 29, 2010
1
A00
A00
A00
Page 86
5
VRAM3
VRAM3
K8
K2
12
C8602
C8602
D D
C C
12
C8607
C8607
M96
M96
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
x01 change tolerant 20091117
CLKA181
CLKA1#81
R8607
R8607
56R2F-1-GP
56R2F-1-GP
C8603
C8603
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
C8610
C8610
12
12
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
M96
M96
GPU_CLKA1_T
12
M96
M96
12
C8611
C8611
C8612
C8612
C8609
C8609
M96
M96
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VRAM3_VREF VRAM4_VREF
VRAM4_VREF VRAM3_VREF
12
R8608
R8608
56R2F-1-GP
56R2F-1-GP
M96
M96
12
12
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C8606
C8606
12
M96
M96
R8603 243R2F-2-GP
R8603 243R2F-2-GP
MAA081,85
MAA181,85
MAA281,85
MAA381,85
MAA481,85
MAA581,85
MAA681,85
MAA781,85
MAA881,85
MAA981,85
MAA1081,85
MAA1181,85
MAA1281,85
MAA1381,85
A_BA081,85
A_BA181,85
A_BA281,85
CKEA181
DQMA581
DQMA481
WEA1#81
CASA1#81
RASA1#81
C8614
C8614
C8613
C8613
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
12
1 2
M96
M96
12
M96
M96
C8608
C8608
M96
M96
N1
R9
B2
D9
G7
R1
N9
A8
A1
C1
C9
D2
E9
F1
H9
H2
H1
M8
VRAM_ZQ3 VRAM_ZQ4
L8
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
D3
E7
L3
K3
J3
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
x01 20091121
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFDQ
VREFCA
ZQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7
BA0
BA1
BA2
CK
CK#
CKE
DMU
DML
WE#
CAS#
RAS#
M96
M96
4
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
3
12
C8616
C8616
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
M96
M96
CKEA181
DQMA681
DQMA781
WEA1#81
CASA1#81
RASA1#81
+1.5V_RUN+1.5V_RUN
C8615
C8615
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8619
C8619
12
M96
M96
MDA36
E3
MDA38
F7
MDA33
F2
MDA39
F8
MDA32
H3
MDA34
H8
MDA35
G2
MDA37
H7
MDA46
D7
MDA43
C3
MDA45
C8
MDA40
C2
MDA44
A7
MDA41
A2
MDA47
B8
MDA42
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDA[32..63] 81
QSAP_5 81
QSAN_5 81
QSAP_4 81
QSAN_4 81
ODTA1 81
CSA1#_0 81
MEM_RST 81,85,87,88
x01 change tolerant 20091117x01 change tolerant 20091117
12
C8621
C8621
C8618
C8618
M96
M96
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
CLKA181
CLKA1#81
12
C8623
C8623
M96
M96
M96
M96
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8622
C8622
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8625
C8625
M96
M96
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
12
C8624
C8624
M96
M96
M96
M96
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8617
C8617
12
M96
M96
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
R8604 243R2F-2-GP
R8604 243R2F-2-GP
MAA081,85
MAA181,85
MAA281,85
MAA381,85
MAA481,85
MAA581,85
MAA681,85
MAA781,85
MAA881,85
MAA981,85
MAA1081,85
MAA1181,85
MAA1281,85
MAA1381,85
A_BA081,85
A_BA181,85
A_BA281,85
12
M96
M96
2
VRAM4
VRAM4
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
M96
M96
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
1
MDA61
E3
MDA57
F7
MDA63
F2
MDA60
F8
MDA59
H3
MDA56
H8
MDA62
G2
MDA58
H7
MDA50
D7
MDA55
C3
MDA49
C8
MDA52
C2
MDA48
A7
MDA54
A2
MDA51
B8
MDA53
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDA[32..63] 81
QSAP_6 81
QSAN_6 81
QSAP_7 81
QSAN_7 81
ODTA1 81
CSA1#_0 81
MEM_RST 81,85,87,88
B B
+1.5V_RUN
12
R8601
R8601
2K1R2F-GP
2K1R2F-GP
M96
M96
VRAM3_VREF
12
M96
M96
R8602
R8602
2K1R2F-GP
2K1R2F-GP
M96
M96
12
C8601
C8601
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.5V_RUN
12
12
R8605
R8605
2K1R2F-GP
2K1R2F-GP
M96
M96
R8606
R8606
2K1R2F-GP
2K1R2F-GP
M96
M96
M96
M96
VRAM4_VREF
12
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8605
C8605
x01 change tolerant 20091117
x01 change tolerant 20091117
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GPU-VRAM3,4 (2/4)
GPU-VRAM3,4 (2/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet of
GPU-VRAM3,4 (2/4)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
86 92Monday, March 29, 2010
86 92Monday, March 29, 2010
86 92Monday, March 29, 2010
1
A00
A00
A00
Page 87
5
x01 change tolerant 20091117 x01 change tolerant 20091117
K8
K2
12
12
12
C8710
C8707
C8707
DIS
DIS
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8710
C8702
C8702
SC1U6D3V2KX-GP
D D
C C
SC1U6D3V2KX-GP
12
C8709
C8709
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VRAM5_VREF
VRAM6_VREF
C87011
C87011
20090902
CLKB081
CLKB0#81
56R2F-1-GP
56R2F-1-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
R8707
R8707
C8703
C8703
12
DIS
DIS
GPU_CLKB0_T
12
56R2F-1-GP
56R2F-1-GP
DIS
DIS
R8708
R8708
DIS
DIS
12
12
C87012
C87012
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
R8704 243R2F-2-GP
R8704 243R2F-2-GP
12
C87013
C87013
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8706
C8706
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
DIS
DIS
MAB081,88
MAB181,88
MAB281,88
MAB381,88
MAB481,88
MAB581,88
MAB681,88
MAB781,88
MAB881,88
MAB981,88
MAB1081,88
MAB1181,88
MAB1281,88
MAB1381,88
B_BA081,88
B_BA181,88
B_BA281,88
CKEB081
DQMB381
DQMB181
WEB0#81
CASB0#81
RASB0#81
12
DIS
DIS
12
C8714
C8714
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8708
C8708
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VRAM_ZQ5 VRAM_ZQ6
N1
R9
B2
D9
G7
R1
N9
A8
A1
C1
C9
D2
E9
F1
H9
H2
H1
M8
L8
N3
P7
P3
N2
P8
P2
R8
R2
T8
R3
L7
R7
N7
T3
M7
M2
N8
M3
J7
K7
K9
D3
E7
L3
K3
J3
x01 20091121
B B
+1.5V_RUN +1.5V_RUN
12
R8701
R8701
2K1R2F-GP
2K1R2F-GP
DIS
DIS
VRAM5_VREF VRAM6_VREF
DIS
DIS
12
C8701
C8701
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
DIS
DIS
R8702
R8702
2K1R2F-GP
2K1R2F-GP
4
VRAM5
VRAM5
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VREFDQ
VREFCA
ZQ
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
NC#M7
BA0
BA1
BA2
CK
CK#
CKE
DMU
DML
WE#
CAS#
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
DIS
DIS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
3
MDB14
E3
MDB13
F7
MDB12
F2
MDB15
F8
MDB11
H3
MDB8
H8
MDB9
G2
MDB10
H7
MDB26 MDB1
D7
MDB27
C3
MDB30
C8
MDB24 MDB4
C2
MDB31
A7
MDB25 MDB7
A2
MDB29
B8
MDB28
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDB[0..31] 81
12
12
C8717
C8717
C8715
C8715
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
QSBN_3 81 QSBN_0 81
QSBP_1 81
QSBN_1 81
ODTB0 81
CSB0#_0 81
MEM_RST 81,85,86,88
12
12
C8720
C8720
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VRAM6_VREF
VRAM5_VREF
C8721
C8721
12
12
C8723
C8723
DY
DY
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
CLKB081
CLKB0#81
12
DIS
DIS
12
DIS
DIS
C8722
C8722
C8724
C8724
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8718
C8718
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
R8706 243R2F-2-GP
R8706 243R2F-2-GP
MAB081,88
MAB181,88
MAB281,88
MAB381,88
MAB481,88
MAB581,88
MAB681,88
MAB781,88
MAB881,88
MAB981,88
MAB1081,88
MAB1181,88
MAB1281,88
MAB1381,88
B_BA081,88
B_BA181,88
B_BA281,88
CKEB081
DQMB081
DQMB281
WEB0#81
CASB0#81
RASB0#81
R8703
R8703
2K1R2F-GP
2K1R2F-GP
R8705
R8705
2K1R2F-GP
2K1R2F-GP
2
12
12
C8725
C8725
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8719
C8719
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DIS
DIS
12
C8705
C8705
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DIS
DIS
+1.5V_RUN+1.5V_RUN
VRAM6
VRAM6
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
DIS
DIS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
ODT
CS#
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
1
MDB16
E3
MDB18
F7
MDB20
F2
MDB19
F8
MDB22
H3
MDB17
H8
MDB23
G2
MDB21
H7
D7
MDB5
C3
MDB2
C8
C2
MDB3
A7
A2
MDB0
B8
MDB6
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDB[0..31] 81
QSBP_0 81QSBP_3 81
QSBP_2 81
QSBN_2 81
ODTB0 81
CSB0#_0 81
MEM_RST 81,85,86,88
x01 change tolerant 20091117 x01 change tolerant 20091117
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GPU-VRAM5,6 (3/4)
GPU-VRAM5,6 (3/4)
GPU-VRAM5,6 (3/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
87 92Monday, March 29, 2010
of
87 92Monday, March 29, 2010
of
87 92Monday, March 29, 2010
1
A00
A00
A00
Page 88
5
4
3
2
1
12
C8824
C8824
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DIS
DIS
CKEB181
DQMB781
DQMB681
WEB1#81
CASB1#81
RASB1#81
+1.5V_RUN+1.5V_RUN
12
C8825
C8825
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8818
C8818
12
DIS
DIS
VRAM8
VRAM8
K8
VDD
K2
VDD
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
DIS
DIS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MDB53
E3
MDB51
F7
MDB55
F2
MDB49
F8
MDB54
H3
MDB48
H8
MDB52
G2
MDB50
H7
MDB61
D7
MDB62
C3
MDB58
C8
MDB59
C2
MDB63
A7
MDB56
A2
MDB57
B8
MDB60
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDB[32..63] 81
QSBP_7 81
QSBN_7 81
QSBP_6 81
QSBN_6 81
ODTB1 81
CSB1#_0 81
MEM_RST 81,85,86,87
VRAM7
VRAM7
K8
VDD
K2
VDD
12
C8802
C8802
C8808
C8808
DIS
D D
C C
B B
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
CLKB181
CLKB1#81
56R2F-1-GP
56R2F-1-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
x01 20091121
12
12
C8809
C8809
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
R8807
R8807
C8803
C8803
12
C8810
C8810
C8811
C8811
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
VRAM7_VREF VRAM8_VREF
VRAM8_VREF
12
R8808
R8808
56R2F-1-GP
56R2F-1-GP
DIS
GPU_CLKB1_T
12
DIS
DIS
DIS
DIS
DIS
12
12
C8813
C8813
C8812
C8812
DIS
DIS
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C8806
C8806
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
R8803 243R2F-2-GP
R8803 243R2F-2-GP
DIS
DIS
MAB081,87
MAB181,87
MAB281,87
MAB381,87
MAB481,87
MAB581,87
MAB681,87
MAB781,87
MAB881,87
MAB981,87
MAB1081,87
MAB1181,87
MAB1281,87
MAB1381,87
B_BA081,87
B_BA181,87
B_BA281,87
CKEB181
DQMB481
DQMB581
WEB1#81
CASB1#81
RASB1#81
12
12
C8814
C8814
DIS
DIS
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8807
C8807
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
VRAM_ZQ7 VRAM_ZQ8
N1
VDD
R9
VDD
B2
VDD
D9
VDD
G7
VDD
R1
VDD
N9
VDD
A8
VDDQ
A1
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H9
VDDQ
H2
VDDQ
H1
VREFDQ
M8
VREFCA
L8
ZQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC#
T3
A13
M7
NC#M7
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK#
K9
CKE
D3
DMU
E7
DML
L3
WE#
K3
CAS#
J3
RAS#
DUMMY-K4W2G1646B-HC12-GP
DUMMY-K4W2G1646B-HC12-GP
DIS
DIS
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
DQSU
DQSU#
DQSL
DQSL#
ODT
CS#
RESET#
NC#T7
NC#L9
NC#L1
NC#J9
NC#J1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MDB40
E3
MDB43
F7
MDB47
F2
MDB44
F8
MDB41
H3
MDB45
H8
MDB42
G2
MDB46
H7
MDB36
D7
MDB35
C3
MDB39
C8
MDB32
C2
MDB37
A7
MDB33
A2
MDB38
B8
MDB34
A3
C7
B7
F3
G3
K1
L2
T2
T7
L9
L1
J9
J1
J8
M1
M9
J2
P9
G8
B3
T1
A9
T9
E1
P1
G1
F9
E8
E2
D8
D1
B9
B1
G9
MDB[32..63] 81
QSBP_4 81
QSBN_4 81
QSBP_5 81
QSBN_5 81
ODTB1 81
CSB1#_0 81
MEM_RST 81,85,86,87
12
C8816
C8816
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
CLKB181
CLKB1#81
x01 change tolerant 20091117x01 change tolerant 20091117
12
C8820
C8820
C8819
C8819
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
C8821
C8821
DIS
DIS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
VRAM7_VREF
12
C8822
C8822
DY
DY
DIS
DIS
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
12
12
C8823
C8823
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C8817
C8817
12
DIS
DIS
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
R8804 243R2F-2-GP
R8804 243R2F-2-GP
MAB081,87
MAB181,87
MAB281,87
MAB381,87
MAB481,87
MAB581,87
MAB681,87
MAB781,87
MAB881,87
MAB981,87
MAB1081,87
MAB1181,87
MAB1281,87
MAB1381,87
B_BA081,87
B_BA181,87
B_BA281,87
+1.5V_RUN +1.5V_RUN
12
DIS
DIS
12
DIS
DIS
R8801
R8801
2K1R2F-GP
2K1R2F-GP
VRAM7_VREF VRAM8_VREF
12
C8801
C8801
SCD1U10V2KX-5GP
R8802
R8802
2K1R2F-GP
2K1R2F-GP
DIS
DIS
SCD1U10V2KX-5GP
12
DIS
DIS
12
DIS
DIS
R8805
R8805
2K1R2F-GP
2K1R2F-GP
R8806
R8806
2K1R2F-GP
2K1R2F-GP
DIS
DIS
12
C8804
C8804
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
x01 change tolerant 20091117 x01 change tolerant 20091117
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
GPU-VRAM7,8 (4/4)
GPU-VRAM7,8 (4/4)
GPU-VRAM7,8 (4/4)
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
of
88 92Monday, March 29, 2010
of
88 92Monday, March 29, 2010
of
88 92Monday, March 29, 2010
1
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5
SSID = Video.PWR.Regulator
D D
4
3
RT8208BGQW for +VGA_CORE
+PWR_SRC
2
X01 EMI stuff 20091118
1
X01 20091111
+5V_RUN
SI7686DP-T1-GP
PR8910
12
PC8908
PC8908
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PR8903
PR8903
12
DIS
DIS
10R2F-L-GP
10R2F-L-GP
X01 20091124
C C
RUNPWROK49,50,51,90
PC8904
PC8904
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
DIS
DIS
A00-20100204
GFX_CORE_EN37
PR8921 0R0402-PADPR8921 0R0402-PAD
DIS
DIS
1 2
PR8905 7K15R2F-L-GP
PR8905 7K15R2F-L-GP
1 2
+GFX_CORE_CS
+GFX_CORE_EN_R
+GFX_CORE_TON
DIS
DIS
PU8901
PU8901
16
TON
9
VDDP
2
VDD
4
PGOOD
10
CS
15
EM/DEM
17
GND
RT8208BGQW-GP
RT8208BGQW-GP
DIS
DIS
RT8208B:74.08208.A73
BOOT
UGATE
PHASE
LGATE
VOUT
13
12
11
8
7
G0
3
FB
14
G1
5
D1
6
D0
1
PR8910
1 2
DIS
DIS
249KR2F-GP
249KR2F-GP
+GFX_CORE_BOOT +GFX_CORE_BOOT_C
+GFX_CORE_UGATE
+GFX_CORE_PHASE+GFX_CORE_VDD
+GFX_CORE_LGATE
+GFX_CORE_FB
PWRCNTL_1#
PWRCNTL_0#
+GFX_CORE_VOUT
PR8902
PR8902
DIS
DIS
1R3J-L1-GP
1R3J-L1-GP
12
PWRCNTL_0 82
PWRCNTL_1 82
PC8906
PC8906
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1 2
DIS
DIS
SI7686DP-T1-GP
PU8903
PU8903
PU8902
PU8902
DIS
DIS
4 5
G
G
4 5
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
678
678
DDD
DDD
DDD S
DDD S
SSGD
SSGD
123
123
X01 20091111
PM_SLP_S3#22,37,42,47,50,51
K A
D8901 RB551V-30-2GP
D8901 RB551V-30-2GP
DY
DY
x01 change tolerant 20091117
B B
+GFX_CORE_EN_R
12
PC8912
PC8912
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
Park-XT
PWRCNTL_0 +VGA_CORE
H
L
H
L 1.12V
PWRCNTL_1
H
H
L
L
0.9V
0.95V
1.05V
Madison-LP
LH
L
+VGA_COREPWRCNTL_0LPWRCNTL_1
H
0.9VH
0.95V
1.12V
12
12
DIS
DIS
DIS
DIS
DIS
PC8903
PC8903
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
678
2D2R5F-2-GP
2D2R5F-2-GP
DDD
D
DDD
D
DIS
DIS
SSS
SSS
123
DIS
PC8914
PC8914
PU8904
PU8904
D
D
DIS
DIS
SSS
SSS
G
G
4 5
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
12
DIS
DIS
PC8905
PC8905
SC10U25V6KX-1GP
SC10U25V6KX-1GP
12
PR8906
PR8906
DY
DY
VGA_CORE_DIV
12
DY
DY
12
12
DIS
DIS
PC8911
PC8911
SCD1U25V2KX-GP
SCD1U25V2KX-GP
X02-20100116
PL8901
PL8901
1 2
IND-D56UH-12-GP
IND-D56UH-12-GP
+GFX_CORE_VOUT
PC8910
PC8910
SC330P50V2KX-3GP
SC330P50V2KX-3GP
PC8907
PC8907
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
Vout=0.75V*(R1+R2)/R2
Design Current = 21.94A
24.14A<OCP< 28.53A
x01 change tolerant 20091117
DIS
DIS
12
PG8920
PG8920
12
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
DY
DY
12
PR8908
PR8908
10KR2F-2-GP
10KR2F-2-GP
DIS
DIS
12
DY
DY
12
DY
DY
PC8917 SC10P50V2JN-4GP
PC8917 SC10P50V2JN-4GP
PC8913 SC10P50V2JN-4GP
PC8913 SC10P50V2JN-4GP
+VGA_CORE
12
PTC8901
PTC8901
SE330U2VDM-L-GP
SE330U2VDM-L-GP
PC8915
PC8915
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
12
PTC8902
PTC8902
DIS
DIS
12
PTC8903
PTC8903
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
DIS
DIS
X02-20100201
+GFX_CORE_FB
12
PR8909
PR8909
150KR2F-L-GP
150KR2F-L-GP
DIS
DIS
PWRCNTL_0#
12
PR8911
PR8911
49K9R2F-L-GP
49K9R2F-L-GP
DIS
DIS
DIS
DIS
12
PWRCNTL_1#
x01 20091124
PR8912
PR8912
44K2R2F-1-GP
44K2R2F-1-GP
M96-LP
PWRCNTL_0 +VGA_CORE
L
L L 1.0V
A A
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.56uH PCMC104T-R56MN Cyntec DCR:1.6mohm/1.8mohm Isat=25Arms 68.R5610.10D
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
5
4
PWRCNTL_1
H
H
0.9VH
0.95V
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
RT8208B_+VGA_CORE
RT8208B_+VGA_CORE
RT8208B_+VGA_CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
3
2
Date: Sheet
Arsenal DJ1 Discrete
Arsenal DJ1 Discrete
Arsenal DJ1 Discrete
Taipei Hsien 221, Taiwan, R.O.C.
of
89 92Wednesday, March 31, 2010
of
89 92Wednesday, March 31, 2010
of
89 92Wednesday, March 31, 2010
1
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A00
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5
4
3
2
1
APL5930 for +1.8V_RUN_VGA
+1.8V_RUN_VGA_P +1.8V_RUN_VGA
PG9002
PG9002
+3.3V_RUN +1.8V_RUN_VGA_VIN
D D
+5V_ALW
X02-20091230
R9006
R9006
100KR2J-1-GP
100KR2J-1-GP
M96
M96
1 2
1.8V_DIS_GATE
5
6
M96
M96
123 4
C C
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
X02-20091230
PQ9001
PQ9001
2N7002EDW-GP
2N7002EDW-GP
84.27002.F3F
84.27002.F3F
1.8V_DIS
1 2
R9005 10R2J-2-GP
R9005 10R2J-2-GP
1.8V_VGA_RUN_EN
PG9001
PG9001
12
PG9004
PG9004
12
RUNPWROK49,50, 51,89
1.8V_VGA_RUN_EN37
Vo=0.8*(1+(R1/R2))
+1.8V_RUN_VGA
M96
M96
Vout=0.8V*(R1+R2)/R2
X02-20091230
M96
M96
1 2
R9009 0R2J-2-GP
R9009 0R2J-2-GP
PR9002
PR9002
1 2
0R0402-PAD
0R0402-PAD
PC9002
PC9002
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1.8V_RUN_VGA_POK
1.8V_VGA_RUN_EN_C
12
PC9001
PC9001
DY
DY
APL5930KAI-TRG-GP
APL5930KAI-TRG-GP
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
+5V_RUN +1.8V_RUN_VGA_VIN
12
DIS
DIS
6
PU9001
PU9001
7
POK
8
EN
DIS
DIS
VIN#5
VIN#9
VCNTL
VOUT#3
VOUT#4
GND
1
FB
SO-8-P
5
9
3
4
2
5912_1.8V_DELAY_FB
DIS
DIS
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
16K5R2F-2-GP
16K5R2F-2-GP
DIS
DIS
12
PC9003
PC9003
DIS
DIS
PR9003
PR9003
12
12
PR9006
PR9006
13K3R2F-L1-GP
13K3R2F-L1-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC68P50V2JN-1GP
SC68P50V2JN-1GP
DY
DY
DIS
DIS
12
PC9005
PC9005
12
PC9004
PC9004
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG9003
PG9003
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Design Current =1.13A
+1.8V_RUN_VGA_P
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC9006
PC9006
12
DIS
DIS
DY
DY
PC9007
PC9007
12
+3.3V_RUN_VGA
PARK
PARK
1 2
R9001 0R2J-2-GP
R9001 0R2J-2-GP
+3.3V_RUN
B B
3.3V_RUN_VGA_EN37
12
R9002
R9002
M96
M96
100KR2J-1-GP
100KR2J-1-GP
3.3V_ALW_1
2N7002EDW-GP
2N7002EDW-GP
84.27002.F3F M96
84.27002.F3F M96
M96
M96
Q9002
Q9002
Q9001
Q9001
DS
SI2301CDS-T1-GE3-GP
SI2301CDS-T1-GE3-GP
Id: 2A
G
Rds: 0.15ohm
5
6
123 4
X02-20091208
+3.3V_RUN_VGA
M96
M96
3.3V_RUN_VGA_1
12
R9004
R9004
100R2J-2-GP
100R2J-2-GP
APL5930KAI for +1.0V_RUN_VGA
M96
M96
M96
M96
+3.3V_ALW
1 2
1.0V_DIS_GATE
6
123 4
R9007
R9007
100KR2J-1-GP
100KR2J-1-GP
5
PQ9002
PQ9002
2N7002EDW-GP
2N7002EDW-GP
84.27002.F3F
84.27002.F3F
1.0V_DIS
R9010 10R2J-2-GP
R9010 10R2J-2-GP
M96
M96
1 2
R9003 0R2J-2-GP
R9003 0R2J-2-GP
1.0V_DIS_GATE_EN
DY
DY
1 2
R9008 0R2J-2-GP
R9008 0R2J-2-GP
1.0V_RUN_VGA_EN37
M96
M96
1 2
1.0V_RUN_VGA_EN
RUNPWROK
X02-20091224
+1.0V_RUN_VGA
RUNPWROK49,50, 51,89
PR9007
PR9007
1 2
0R0402-PAD
0R0402-PAD
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1.0V_RUN_VGA_EN_C
12
DY
DY
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
Vout=0.8V*(R1+R2)/R2
PC9008
PC9008
7
8
PC9011
PC9011
APL5930KAI-TRG-GP
APL5930KAI-TRG-GP
12
M96
M96
PU9002
PU9002
POK
EN
M96
M96
+5V_ALW
6
VIN#5
VIN#9
VCNTL
VOUT#3
VOUT#4
GND
1
FB
SO-8-P
+1.5V_SUS
5
9
3
4
2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
PC9009
PC9009
M96
M96
X02-20091208
12KR2F-L-GP
12KR2F-L-GP
12
PR9009
PR9009
M96
M96
5930_1.0VRUN_FB
12
PR9011
PR9011
32K4R2F-1-GP
32K4R2F-1-GP
M96
M96
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
12
PC9010
PC9010
DY
DY
+1.0V_RUN_VGA
Design Current: 1.51A
+1.0V_RUN_VGA
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
12
PC9013
PC9013
PC9012
PC9012
M96
M96
M96
M96
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
PARK
PARK
1 2
R9011 0R5J-5-GP
R9011 0R5J-5-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
PC9014
PC9014
DY
DY
+1.05V_VTT
X01 20091120
X01-20091116
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C .
Taipei Hsien 221, Taiwan, R.O.C .
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet of
DISCRETE VGA POWER
DISCRETE VGA POWER
DISCRETE VGA POWER
C
C
C
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C .
90 92Monday, March 29, 2010
90 92Monday, March 29, 2010
90 92Monday, March 29, 2010
1
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5
4
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1
D15 Intel-Power Up Sequence
(AC mode)
+RTC_VCC
PCH_RTCRST#
+PWR_SRC
D D
+3.3V_RTC_LDO
S5_ENABLE
+5V_ALW
+3.3V_ALW
+5VALW_PCH_VCC5REFSUS
+15V_ALW
3V_5V_POK
SUS_PWR_DN_ACK
PCH_RSMRST#(EC Delay 40ms)
PCH_SUSCLK_KBC
AC_PRESENT_EC
AC
AC
PM_SLP_S4#
C C
B B
A A
PM_SLP_S3#
PM_LAN_ENABLE
+3.3V_LAN
+1.5V_SUS
+V_DDR_REF(0.9V)
+5V_RUN
+3.3V_RUN
+5VS_PCH_VCC5REF
+1.5V_RUN
+1.8V_RUN
GFX_CORE_EN(Discrete only)------Delay 5ms
+VGA_CORE(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)------Delay 4ms
+1.0V_RUN_VGA(Discrete only)
1.8V_VGA_RUN_EN(Discrete only)------Delay 5ms
+1.8V_RUN_VGA(Discrete only)
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
+3.3V_RUN_VGA(Discrete only)
RUNPWROK
+1.05V_VTT
+0.75V_DDR_VTT
H_VTTPWRGD
GFX_VR_EN(UMA only)
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
IMVP_VR_ON
+VCC_CORE
CLK_CPU_BCLK
CK_PWRGD
IMVP_PWRGD
PM_PWROK
PM_DRAM_PWRGD
H_PWRGD
PLT_RST#
PLTRST_DELAY#
H_CPURST#
T1
T2
T3
T4
KBC_PWRBTN_EC#
PM_PWRBTN#
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
+1.05V_VTT
AC
PM_PWRBTN#
3V_5V_POK
T14
-->Reserved for sequence
T39
( >99ms )
T41
(for S3 Reduction)
5
red word: KBC GPIO
T5
T6
T7
T8
T9
T10
>10ms
Press Power button
T13
T15
>30us
T16
T17
T18
T19
T20
T21
T40
T42
<3ms
1.5CPU_1.05VTT_PWRGD
T11
<200ms
T12
T23
T24
43
+1.5V_RUN_CPU
H_VTTPWRGD
PM_PWROK
+VCC_CORE
T22
>1ms
KBC GPIO36 control
TPS51125 to KBC GPIO46
PCH to KBC GPI94
KBC GPIO43 to PCH
PCH to KBC GPIO00
KBC_PWRBTN_EC# GPIO3
KBC GPO84 to PCH
KBC GPO16 to LAN
+5V_RUN & +3.3V_RUN need meet 0.7V difference
H_PWRGD
T25
>1ms
T26
T27
T28
T29
T30
T31
T32
T33
T34
CPU to TPS51611
KBC GPO53 to ISL62883
CLKIN_BCLK(from CK505) stable
>1ms
T44
T45
Delay 10ms
>5ms
T46
3ms< <20ms
T47
>100ns
T49
T50
T51
0.05ms< <650ms
>1ms
T48
>1ms
>1ms
T52
T53
>1ms
4
KBC GPIO71 to RT8208B
KBC GPIO30 to APL5930
KBC GPIO66 to APL5930
KBC GPI95
T35
TPS51218 to KBC GPI34
T36
T37
T38
UMA GFX CORE Power
CPU CORE Power
ISL62883 to CLOCKGEN
ISL62884 to KBC GPO14
KBC GPIO47 to PCH
KBC LRESET#
T54
KBC GPIO45
T55
(DC mode)
+RTC_VCC
PCH_RTCRST#
+PWR_SRC
+3.3V_RTC_LDO
KBC_PWRBTN_EC#
+KBC_PWR
S5_ENABLE
+5V_ALW
+3.3V_ALW
+5VALW_PCH_VCC5REFSUS
+15V_ALW
3V_5V_POK
PM_PWRBTN#
SUS_PWR_DN_ACK
PCH_RSMRST#
PCH_SUSCLK_KBC
DC
PM_SLP_S4#
PM_SLP_S3#
PM_LAN_ENABLE
+3.3V_LAN
+1.5V_SUS
+V_DDR_REF(0.9V)
+5V_RUN
+3.3V_RUN
+5VS_PCH_VCC5REF
+1.5V_RUN
+1.8V_RUN
GFX_CORE_EN(Discrete only) T26
+VGA_CORE(Discrete only)
1.0V_RUN_VGA_EN(Discrete only)
+1.0V_RUN_VGA(Discrete only)
1.8V_VGA_RUN_EN(Discrete only)
+1.8V_RUN_VGA(Discrete only)
+3.3V_RUN_VGA_EN(Discrete only)-->DY reserved
+3.3V_RUN_VGA(Discrete only)
RUNPWROK
+1.05V_VTT
1.5CPU_1.05VTT_PWRGD(after delay 1ms GPI96-VDDPWRGOOD_EC output for s3 reduction)
+0.75V_DDR_VTT
H_VTTPWRGD
+1.05V_VTT
GFX_VR_EN(UMA only)
+CPU_GFX_CORE(UMA only)
1.5CPU_1.05VTT_PWRGD
IMVP_VR_ON
+VCC_CORE
CLK_CPU_BCLK
CK_PWRGD
IMVP_PWRGD
PM_PWROK
PM_DRAM_PWRGD
H_PWRGD
PLT_RST#
PLTRST_DELAY#
H_CPURST#
3
red word: KBC GPIO
T1
T2
PCH_RSMRST#
T14
T39
T41
(for S3 Reduction)
Press Power button
T3
T4
T5
T6
T15
>30us
T16
T17
T18
T19
T20
T21
-->Reserved for sequence
T40
( >99ms )
T42
<3ms
1.5CPU_1.05VTT_PWRGD
KBC_PWRBTN_EC# GPIO3
EC_ENABLE# ( GPIO51) keep low
KBC GPIO36 control
+5V_ALW & +3.3V_ALW need meet 0.7V difference
T7 +5V_ALW & +3.3V_ALW need meet 0.7V difference
T8
T9
TPS51125 to KBC GPIO46
T10
KBC GPO84 to PCH
T12
PCH to KBC GPI94
>10ms
KBC GPIO43 to PCH
PCH to KBC GPIO01
T13
T11
KBC GPO16 to LAN
+5V_RUN & +3.3V_RUN need meet 0.7V difference
T22
T23
T24
H_PWRGD
T25
>1ms
T27
T28
T29
T30
T31
CPU to TPS51611
KBC GPO53 to ISL62883
CLKIN_BCLK(from CK505) stable
>1ms
43
+1.5V_RUN_CPU
H_VTTPWRGD
PM_PWROK
+VCC_CORE
>1ms
T44
Delay 10ms
>5ms
T46
3ms< <20ms
T47
>100ns
T49
T50
T51
0.05ms< <650ms
T52
2
T45
>1ms
T48
>1ms
>1ms
T32
T33
T34
T53
>1ms
KBC GPIO71 to RT8208B
KBC GPIO30 to APL5930
KBC GPIO66 to APL5930
KBC GPI95
T35
TPS51218 to KBC GPI34
T36
T37
T38
UMA GFX CORE Power
CPU CORE Power
ISL62883 to CLOCKGEN
ISL62884 to KBC GPO14
KBC GPIO47 to PCH
KBC LRESET#
T54
KBC GPIO45
T55
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Tuesday, March 02, 2010
Tuesday, March 02, 2010
Tuesday, March 02, 2010
Date: Sheet
Date: Sheet
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Power Sequence
Power Sequence
Power Sequence
Berry
Berry
Berry
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C C
4
3
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B B
A A
5
4
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<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Change History
Change History
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Wednesday, February 10, 2010
Wednesday, February 10, 2010
Wednesday, February 10, 2010
Date: Sheet
Date: Sheet
Change History
Berry
Berry
Berry
Taipei Hsien 221, Taiwan, R.O.C.
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