Wistron BAD40 HC Schematic

5

4

3

2

1

BAD40_HC

DIS/UMA Schematics Document

D D

Sandy&Ivy Bridge

Intel PCH

C C

DY :None Installed
DIS:DIS installed
DIS_Muxless :BOTH DIS or Muxless installed
DIS_PX:BOTH DIS or PX installed

ANNIE: ONLY FOR ANNIE solution.
PSL: KBC795 PSL circuit for 10mW solution installed.
10mW: External circuit for 10mW solution installed.
65W: for 65W adaptor installed.
90W: for 90W adaptor installed.

DIS_PX_Muxless:DIS or PX or Muxless installed.
Muxless: Muxless installed.(PX4.0)
PX:MUX installed.(PX3.0)
PX_Muxless:BOTH PX or Muxless installed.

B B

UMA:UMA installed
UMA_Muxless:BOTH UMA or Muxless installed
UMA_PX_Muxless:UMA or PX or Muxless installed

<Variant Name>

<Variant Name>

A A

5

4

3

2

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet

Date: Sheet

Date: Sheet of

Cover Page

Cover Page

Cover Page

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

1 108

of

1 108

of

1 108

1

1

1

1

5

Buttom Docking

D D

VGA/HDMI(DVI)/DP
HP OUT/SPDIF/MIC IN/LINE IN/

USB2.0/USB3.0/DC JACK/
LAN/SERIAL PORT/PARALLEL PORT

49

HDMI

LCD

CRT

51

49

50

Right Side:
USB x 1

##External Module

C C

B B

SWITCHEDP

SWITCH

SWITCH

SWITCHSWITCH

HP1

MIC IN

2CH SPEAKER

4

27MHz

USB CHARGER

107

USB x 1

Bluetooth

CAMERA

Smart Card

Internal Analog MIC

63

49

76

BAD40 HC Block Diagram

##OnMainBoard

VRAM

2GB/1GB

Nvidia N13PGS

Discreet/UMA/PX Co-lay

Display Port

USB2.0 x 4

Azalia
CODEC

CX20584

(Discrete/UMA/co-lay)

88,89,90,91

DDR3
900MHz

83.84,85,86,87

EDP

HDMI

LVDS(Dual Channel)

RGB CRT

AZALIA

29

PCIe x 16

(Discrete only)

FDIx4x2
(UMA only)

PCIE

Flash ROM

8MB+4MB

3

Intel CPU

IVY Bridge

4,5,6,7,8,9,10,11,12,13

DMIx4

QM77

Intel

PCH
Panther Point

10 USB2.0 ports
4 USB3.0 ports

ETHERNET (10/100/1000Mb)

High Definition Audio

SATA 3G ports (4)
SATA 6G ports (2)
PCIE ports (8)

LPC I/F
ACPI 1.1

17,18,19,20,21,22,23,24,25,26

SPI

LPC debug port

LPC Bus

60

KBC

NUVOTON

NPCE885

Touch
PAD

Int.
KB

27

DDRIII 1333 Channel A

DDRIII 1333 Channel B

SMBus

32.768 KHz

25MHz

71

SMBus

Thermal

T7718

G sensor

USB x 1

PCIE x 1,USB x 2

SATA3.0

SATA3.0

SATA2.0

2869 2569

79

USB3.0 x3

Fan

28

DDRIII
1333

DDRIII
1333

PCIE x 1

PCIE x 1
USB x 1

PCIE x 1

PCIE x 1

HDD

mSATA

OOD

2

Project Code: 91.4SA01.001
Project Name: BAD40_HC
PCB No: 11245
PCB Version: 1
PCB Name: BAD40 HC MB

Slot 0

14

Slot 1

15

Express Card

75

Mini-Card

56

66

56

802.11a/b/g

BCM 57760

intel 82579

CardReader

RTS5209

Mini-Card

WWAN

Right Side:
USB x 3

65

31

105

32

66

SWITCH

SD/MMC+/MS/
MS Pro/xD

USB x1

25MHz

SIM

66

25MHz

RJ45
CONN

1

SYSTEM DC/DC

TPS5146

INPUTS

5V_S5

CPU DC/DC

VT1317SFCX

INPUTS

DCBATOUT

SYSTEM DC/DC

RT8237AGQW

INPUTS

DCBATOUT

SYSTEM DC/DC

RT8239CGQW

INPUTS

DCBATOUT 5V_S5

SYSTEM DC/DC

RT8207LGQW

INPUTS

DCBATOUT

SYSTEM DC/DC

VT1317SFCX

INPUTS

59

DCBATOUT

VGA

RT8208AGQW

INPUTS

DCBATOUT

TI CHARGER

BQ24745RHDR

INPUTS

DCBATOUT

26

SYSTEM DC/DC

RT8015AGQW

INPUTS

3D3V_S5

48

OUTPUTS

0D85V_S0

42~43

OUTPUTS

VCC_CORE

OUTPUTS

1D05V_VTT

OUTPUTS

5V_AUX_S5
3D3V_AUX_S5

3D3V_S5

OUTPUTS

1D5V_S3
0D75V_S0
DDR_VREF_S3

OUTPUTS

VCC_GFXCORE_PWR

OUTPUTS

VGA_CORE

40

OUTPUTS

BT+

OUTPUTS

1D8V_S0

45

41

46

44

92

47

SYSTEM DC/DC

INPUTS OUTPUTS

26

Switches

INPUTS OUTPUTS

1D5V_S3

1D5V_VGA_S0
3D3V_VGA_S03D3V_S0

PCB LAYER

L1:Top

L5:Power

L2:GND

L6:Signal
L7:GND

L3:Signal

L8:Bottom

L4:Signal

A A

HR PX

HR PX

HR PX

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu R d., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Block Diagram

Block Diagram

BAD40_HC

BAD40_HC

BAD40_HC

1

2 108

2 108

2 108

of

of

1

1

1

A

PCH Strapping

Name Schematics Notes

SPKR

INIT3_3V# Weak internal pull-up. Leave as "No Connect".
GNT3#/GPIO55

4 4

GNT2#/GPIO53
GNT1#/GPIO51

SPI_MOSI

NV_ALE

Reboot option at power-up

Internal weak Pull-down.

Default Mode:

Connect to Vcc3_3 with 8.2-kΩ

No Reboot Mode with TCO Disabled:

- 10-kΩ weak pull-up resistor.

GNT[3:0]# functionality is not available on Mobile.
Mobile: Used as GPIO only
Pull-up resistors are not required on these signals.
If pull-ups are used, they should be tied to the Vcc3_3power rail.

Enable Danbury:

Disable Danbury:

Enable Danbury:

Disable Danbury:

Huron River Schematic Checklist Rev.0_7

Connect to Vcc3_3 with 8.2-k? weak pull-up resistor.

Left floating, no pull-down required.

Connect to +NVRAM_VCCQ with 8.2-kohm
weak pull-up resistor [CRB has it pulled up
with 1-kohm no-stuff resistor]

Leave floating (internal pull-down)

B

C

Processor Strapping

Pin Name Strap Description Configuration (Default value for each bit is

CFG[2]

PCI-Express Static
Lane Reversal

CFG[4]

CFG[6:5]

CFG[7]

PCI-Express
Port Bifurcation
Straps

PEG DEFER TRAINING

1 unless specified otherwise)

1:

Normal Operation.
Lane Numbers Reversed 15 -> 0, 14 -> 1, ...

0:

Disabled - No Physical Display Port attached to

1:

Embedded DisplayPort.
Enabled - An external Display Port device is

0:

connectd to the EMBEDDED display Port

11 : x16 - Device 1 functions 1 and 2 disabled
10 : x8, x8 - Device 1 function 1 enabled ;
function 2 disabled
01 : Reserved - (Device 1 function 1 disabled ;
function 2 enabled)
00 : x8, x4, x4 - Device 1 functions 1 and 2
enabled

1:

PEG Train immediately following xxRESETB de assertion
PEG Wait for BIOS for training

0:

D

Huron River Schematic Checklist Rev.0_7

Default
Value

1

0

11

1

E

NC_CLE DMI termination voltage. Weak internal pull-up. Do not pull low.

Low (0) - Flash Descriptor Security will be overridden. Also,
when this signals is sampled on the rising edge of PWROK
then it will also disable Intel ME and its features.

HAD_DOCK_EN#
/GPIO[33]

3 3

High (1) - Security measure defined in the Flash Descriptor will be enabled.
Platform design should provide appropriate pull-up or pull-down depending on
the desired settings. If a jumper option is used to tie this signal to GND as
required by the functional strap, the signal should be pulled low through a weak
pull-down in order to avoid asserting HDA_DOCK_EN# inadvertently.
Note: CRB recommends 1-kohm pull-down for FD Override. There is an internal
pull-up of 20 kohm for DA_DOCK_EN# which is only enabled at boot/reset for
strapping functions.

HDA_SDO Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
HDA_SYNC

GPIO15

GPIO8

2 2

GPIO27

Weak internal pull-down. Do not pull high. Sampled at rising edge of RSMRST#.
Low (1) - Intel ME Crypto Transport Layer Security (TLS) cipher suite with no

confidentiality High (1) - Intel ME Crypto Transport Layer Security (TLS) cipher
suite with confidentiality

Note : This is an un-muxed signal.
This signal has a weak internal pull-down of 20 kohm which is enabled when PWROK is low.
Sampled at rising edge of RSMRST#.
CRB has a 1-kohm pull-up on this signal to +3.3VA rail.

GPIO8 on PCH is the Integrated Clock Enable strap and is required to be pulled-down
using a 1k +/- 5% resistor. When this signal is sampled high at the rising edge of
RSMRST#, Integrated Clocking is enabled, When sampled low, Buffer Through Mode is
enabled.

Default = Do not connect (floating)

High(1) = Enables the internal VccVRM to have a clean supply for
analog rails. No need to use on-board filter circuit.
Low (0) = Disables the VccVRM. Need to use on-board filter
circuits for analog rails.

POWER PLANE

5V_S0
3D3V_S0
1D8V_S0
1D5V_S0
1D05V_VTT
0D85V_S0
0D75V_S0
VCC_CORE
VCC_GFXCORE
1D8V_VGA_S0
3D3V_VGA_S0
1V_VGA_S0

5V_USBX_S3
1D5V_S3
DDR_VREF_S3

BT+
DCBATOUT
5V_S5
5V_AUX_S5
3D3V_S5
3D3V_AUX_S5

3D3V_AUX_KBC

3D3V_AUX_S5

VOLTAGE DESCRIPTION

5V

3.3V

1.8V

1.5V

1.05V

0.95 - 0.85V

0.75V

0.35V to 1.5V

0.4 to 1.25V

1.8V

3.3V
1V

5V

1.5V

0.75V

6V-14.1V
6V-14.1V
5V
5V

3.3V

3.3V

3.3V3D3V_LAN_S5

3.3V

3.3V

Voltage Rails

ACTIVE IN

S0

CPU Core Rail
Graphics Core Rail

S3

AC Brick Mode only

All S states

WOL_EN

DSW, Sx ON for supporting Deep Sleep states

G3, Sx

Legacy WOL

Powered by Li Coin Cell in G3
and +V3ALW in Sx

USB Table

Pair

PCIE Routing

0
1

LANE1
LANE2
LANE3 Card Reader
LANE4 Mini Card1(WLAN)

1 1

LANE5
LANE6
LANE7
LANE8

N/A

Mini Card2(WWAN)

N/A

Intel /BCM LAN
New Card

N/A

SATA Table

SATA

Pair

0
1
2
3
4
5

Device

HDD1
mSATA

N/A
N/A

ODD

N/A

2
3
4
5
6
7
8
9
10
11
12
13

Device
USB. port 1
USB. port 2
USB. port 3

Dock

X

Fingerprint

X
X
Mini Card2 (WWAN) &BT
X
3G SIM
Mini Card1 (WLAN)
CAMERA

New Card

SMBus ADDRESSES

2

I C / SMBus Addresses

Device

EC SMBus 1
Battery
CHARGER

EC SMBus 2
PCH
eDP

PCH SMBus
SO-DIMMA (SPD)
SO-DIMMB (SPD)
Digital Pot
G-Sensor
MINI

Address Hex Bus Ref Des

HURON RIVER ORB

BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA
BAT_SCL/BAT_SDA

SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA
SML1_CLK/SML1_DATA

PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK
PCH_SMBDATA/PCH_SMBCLK

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

Table of Content

Table of Content

Table of Content

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

3 108

of

3 108

of

3 108

1

1

1

5

4

3

2

1

SSID = CPU

Signal Routing Guideline:
PEG_ICOMPO keep W/S=12/15 mils and routing length less than 500 mils.
PEG_ICOMPI & PEG_RCOMPO keep W/S=4/15 mils and routing length less than 500 mils.

1 OF 9

CPU1A

CPU1A

D D

C C

B B

NOTE.
Processor strap CFG[4] should be pulled low to enable Embedded DisplayPort.

Note:
Intel DMI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.

Note:
Intel FDI supports both Lane
Reversal and polarity inversion
but only at PCH side. This is
enabled via a soft strap.

Note:
Lane reversal does not apply to
FDI sideband signals.

1D05V_VTT

Signal Routing Guideline:
EDP_ICOMPO keep W/S=12/15 mils and routing
length less than 500 mils.
EDP_COMPIO keep W/S=4/15 mils and routing
length less than 500 mils.

DMI_TXN[3:0]19

DMI_TXP[3:0]19

DMI_RXN[3:0]19

DMI_RXP[3:0]19

FDI_TXN[7:0]19

FDI_TXP[7:0]19

R402 24D9R2F-L-GPR402 24D9R2F-L-GP

1 2

R403 10KR2J-3-GPR403 10KR2J-3-GP

1 2

eDP_AUXP_CPU103
eDP_AUXN_CPU103

eDP_TXP0_CPU103
eDP_TXP1_CPU103

eDP_TXN0_CPU103
eDP_TXN1_CPU103

DMI_TXN0
DMI_TXN1
DMI_TXN2
DMI_TXN3

DMI_TXP0
DMI_TXP1
DMI_TXP2
DMI_TXP3

DMI_RXN0
DMI_RXN1
DMI_RXN2
DMI_RXN3

DMI_RXP0
DMI_RXP1
DMI_RXP2
DMI_RXP3

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

FDI_FSYNC019
FDI_FSYNC119

FDI_INT19
FDI_LSYNC019

FDI_LSYNC119

DP_COMP
eDP_HPD

B27
B25
A25
B24

B28
B26
A24
B23

G21
E22
F21
D21

G22
D22
F20
C21

A21
H19
E19
F18
B21
C20
D18
E17

A22
G19
E20
G18
B20
C19
D19
F17

H20

H17

A18
A17
B16

C15
D15

C17
F16
C16
G15

C18
E16
D16
F15

J18
J17

J19

Stuff to disable internal graphics

DMI_RX#0
DMI_RX#1
DMI_RX#2
DMI_RX#3

DMI_RX0
DMI_RX1
DMI_RX2
DMI_RX3

DMI_TX#0
DMI_TX#1
DMI_TX#2
DMI_TX#3

DMI_TX0
DMI_TX1
DMI_TX2
DMI_TX3

FDI0_TX#0
FDI0_TX#1
FDI0_TX#2
FDI0_TX#3
FDI1_TX#0
FDI1_TX#1
FDI1_TX#2
FDI1_TX#3

FDI0_TX0
FDI0_TX1
FDI0_TX2
FDI0_TX3
FDI1_TX0
FDI1_TX1
FDI1_TX2
FDI1_TX3

FDI0_FSYNC
FDI1_FSYNC

FDI_INT
FDI0_LSYNC

FDI1_LSYNC

EDP_COMPIO
EDP_ICOMPO
EDP_HPD

EDP_AUX
EDP_AUX#

EDP_TX0
EDP_TX1
EDP_TX2
EDP_TX3

EDP_TX#0
EDP_TX#1
EDP_TX#2
EDP_TX#3

IVY-BRIDGE

IVY-BRIDGE

DMI

DMI

Intel(R) FDI

Intel(R) FDI

eDP

eDP

62.10055.321

62.10055.321

SB 0923

function for power saving.

FDI_LSYNC0
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC1
FDI_INT

678

DIS

DIS

12

RN401

RN401
SRN1KJ-4-GP

SRN1KJ-4-GP

DIS

DIS

123

4 5

A A

R404

R404
1KR2J-1-GP

1KR2J-1-GP

1 OF 9

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RX#0
PEG_RX#1
PEG_RX#2
PEG_RX#3
PEG_RX#4
PEG_RX#5
PEG_RX#6
PEG_RX#7
PEG_RX#8

PEG_RX#9
PEG_RX#10
PEG_RX#11
PEG_RX#12
PEG_RX#13
PEG_RX#14
PEG_RX#15

PEG_RX0
PEG_RX1
PEG_RX2
PEG_RX3
PEG_RX4
PEG_RX5
PEG_RX6
PEG_RX7
PEG_RX8

PEG_RX9
PEG_RX10
PEG_RX11
PEG_RX12
PEG_RX13
PEG_RX14
PEG_RX15

PEG_TX#0
PEG_TX#1
PEG_TX#2
PEG_TX#3
PEG_TX#4
PEG_TX#5
PEG_TX#6
PEG_TX#7
PEG_TX#8
PEG_TX#9

PEG_TX#10
PEG_TX#11

PCI EXPRESS* - GRAPHICS

PCI EXPRESS* - GRAPHICS

PEG_TX#12
PEG_TX#13
PEG_TX#14
PEG_TX#15

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9
PEG_TX10
PEG_TX11
PEG_TX12
PEG_TX13
PEG_TX14
PEG_TX15

NOTE:
Select a Fast FET similar to 2N7002E whose rise/
fall time is less than 6 ns. If HPD on eDP interface is
disabled, connect it to CPU VCCIO via a 10-kΩ pull-Up
resistor on the motherboard.

eDP_HPD_R103

J22
J21
H22

K33
M35
L34
J35
J32
H34
H31
G33
G30
F35
E34
E32
D33
D31
B33
C32

J33
L35
K34
H35
H32
G34
G31
F33
F30
E35
E33
F32
D34
E31
C33
B32

M29
M32
M31
L32
L29
K31
K28
J30
J28
H29
G27
E29
F27
D28
F26
E25

M28
M33
M30
L31
L28
K30
K27
J29
J27
H28
G28
E28
F28
D27
E26
D25

PEG_IRCOMP_R

PEG_RXN15
PEG_RXN14
PEG_RXN13
PEG_RXN12
PEG_RXN11
PEG_RXN10
PEG_RXN9
PEG_RXN8
PEG_RXN7
PEG_RXN6
PEG_RXN5
PEG_RXN4
PEG_RXN3
PEG_RXN2
PEG_RXN1
PEG_RXN0

PEG_RXP15
PEG_RXP14
PEG_RXP13
PEG_RXP12
PEG_RXP11
PEG_RXP10
PEG_RXP9
PEG_RXP8
PEG_RXP7
PEG_RXP6
PEG_RXP5
PEG_RXP4
PEG_RXP3
PEG_RXP2
PEG_RXP1
PEG_RXP0

PEG_C_TXN15
PEG_C_TXN14
PEG_C_TXN13
PEG_C_TXN12
PEG_C_TXN11
PEG_C_TXN10
PEG_C_TXN9
PEG_C_TXN8
PEG_C_TXN7
PEG_C_TXN6
PEG_C_TXN5
PEG_C_TXN4
PEG_C_TXN3
PEG_C_TXN2
PEG_C_TXN1
PEG_C_TXN0

PEG_C_TXP15
PEG_C_TXP14
PEG_C_TXP13
PEG_C_TXP12
PEG_C_TXP11
PEG_C_TXP10
PEG_C_TXP9
PEG_C_TXP8
PEG_C_TXP7
PEG_C_TXP6
PEG_C_TXP5
PEG_C_TXP4
PEG_C_TXP3
PEG_C_TXP2
PEG_C_TXP1
PEG_C_TXP0

R406

R406

EDP

EDP

R401

R401

1 2

24D9R2F-L-GP

24D9R2F-L-GP

C401 SCD22U10V2KX-1GP

C401 SCD22U10V2KX-1GP
C402 SCD22U10V2KX-1GP

C402 SCD22U10V2KX-1GP
C403 SCD22U10V2KX-1GP

C403 SCD22U10V2KX-1GP
C404 SCD22U10V2KX-1GP

C404 SCD22U10V2KX-1GP
C405 SCD22U10V2KX-1GP

C405 SCD22U10V2KX-1GP
C406 SCD22U10V2KX-1GP

C406 SCD22U10V2KX-1GP
C407 SCD22U10V2KX-1GP

C407 SCD22U10V2KX-1GP
C408 SCD22U10V2KX-1GP

C408 SCD22U10V2KX-1GP
C409 SCD22U10V2KX-1GP

C409 SCD22U10V2KX-1GP
C410 SCD22U10V2KX-1GP

C410 SCD22U10V2KX-1GP
C411 SCD22U10V2KX-1GP

C411 SCD22U10V2KX-1GP
C412 SCD22U10V2KX-1GP

C412 SCD22U10V2KX-1GP
C413 SCD22U10V2KX-1GP

C413 SCD22U10V2KX-1GP
C414 SCD22U10V2KX-1GP

C414 SCD22U10V2KX-1GP
C415 SCD22U10V2KX-1GP

C415 SCD22U10V2KX-1GP
C416 SCD22U10V2KX-1GP

C416 SCD22U10V2KX-1GP
C417 SCD22U10V2KX-1GP

C417 SCD22U10V2KX-1GP
C418 SCD22U10V2KX-1GP

C418 SCD22U10V2KX-1GP
C419 SCD22U10V2KX-1GP

C419 SCD22U10V2KX-1GP
C420 SCD22U10V2KX-1GP

C420 SCD22U10V2KX-1GP
C421 SCD22U10V2KX-1GP

C421 SCD22U10V2KX-1GP
C422 SCD22U10V2KX-1GP

C422 SCD22U10V2KX-1GP
C423 SCD22U10V2KX-1GP

C423 SCD22U10V2KX-1GP
C424 SCD22U10V2KX-1GP

C424 SCD22U10V2KX-1GP
C425 SCD22U10V2KX-1GP

C425 SCD22U10V2KX-1GP
C426 SCD22U10V2KX-1GP

C426 SCD22U10V2KX-1GP
C427 SCD22U10V2KX-1GP

C427 SCD22U10V2KX-1GP
C428 SCD22U10V2KX-1GP

C428 SCD22U10V2KX-1GP
C429 SCD22U10V2KX-1GP

C429 SCD22U10V2KX-1GP
C430 SCD22U10V2KX-1GP

C430 SCD22U10V2KX-1GP
C431 SCD22U10V2KX-1GP

C431 SCD22U10V2KX-1GP
C432 SCD22U10V2KX-1GP

C432 SCD22U10V2KX-1GP

2N7002K-2-GP

2N7002K-2-GP

G

12

EDP

EDP

S

Q401

Q401

84.2N702.J31

84.2N702.J31

100KR2J-1-GP

100KR2J-1-GP

2ND = 84.07002.I31

2ND = 84.07002.I31

1D05V_VTT

PEG_RXN[0..15] 83

PEG_RXP[0..15] 83

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

1 2

DIS_PX_Muxless

DIS_PX_Muxless

20100614 V1.1

D

eDP_HPD

PEG_TXN15
PEG_TXN14
PEG_TXN13
PEG_TXN12
PEG_TXN11
PEG_TXN10
PEG_TXN9
PEG_TXN8
PEG_TXN7
PEG_TXN6
PEG_TXN5
PEG_TXN4
PEG_TXN3
PEG_TXN2
PEG_TXN1
PEG_TXN0

PEG_TXP15
PEG_TXP14
PEG_TXP13
PEG_TXP12
PEG_TXP11
PEG_TXP10
PEG_TXP9
PEG_TXP8
PEG_TXP7
PEG_TXP6
PEG_TXP5
PEG_TXP4
PEG_TXP3
PEG_TXP2
PEG_TXP1
PEG_TXP0

HR PX

HR PX

HR PX

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

PEG_TXN[0..15] 83

PEG_TXP[0..15] 83

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (PCIE/DMI/FDI)

CPU (PCIE/DMI/FDI)

CPU (PCIE/DMI/FDI)

BAD40_HC

BAD40_HC

BAD40_HC

4 108

4 108

4 108

of

of

1

1

1

SSID = CPU

5

H_SNB_IVB#22

D D

1D05V_VTT

1 2

R501

R501
62R2J-GP

62R2J-GP

CRB : 47pf
CEKLT:43pf

C C

B B

A A

H_PROCHOT#

12

C502

C502
SC47P50V2JN-3GP

SC47P50V2JN-3GP

PLT_RST#

5

XDP_DBRESET#

H_PROCHOT#27,42

PM_DRAM_PWRGD19,37

VDDPWRGOOD37

RN503

RN503
SRN1K5J-1-GP

SRN1K5J-1-GP

1
2
3
4 5

R513

R513

1 2

56R2J-4-GP

56R2J-4-GP

H_THERMTRIP#22,36

H_PM_SYNC19

H_CPUPW RGD22,36

1 2

R505

R505

BUF_CPU_RST#

3D3V_S0

8
7
6

BUF_CPU_RST#

4

CPU1B

CPU1B

C26

PROC_SELECT#

AN34

SKTOCC#

AL33

CATERR#

H_PECI22,27

H_PROCHOT#_R SM_RCOMP_0

R503

R503

1 2

10KR2J-3-GP

10KR2J-3-GP

DY

DY

0R2J-2-GP

0R2J-2-GP

AN33

PECI

AL32

PROCHOT#

AN32

THERMTRIP#

AM34

PM_SYNC

AP33

UNCOREPWRGOOD

V8

SM_DRAMPWROK

AR33

RESET#

62.10055.321

62.10055.321

H_CPUPW RGD BUF_CPU_RST#

IVY-BRIDGE

IVY-BRIDGE

12

EC501

EC501
SC120P50V2JN-1GP

SC120P50V2JN-1GP

MISCTHERMALPWR MANAGEMENT

MISCTHERMALPWR MANAGEMENT

CLOCKS

CLOCKS

DDR3

DDR3

JTAG & BPM

JTAG & BPM

4

3

DPLL_REF_CLK

DPLL_REF_CLK#

SM_DRAMRST#

SM_RCOMP0
SM_RCOMP1
SM_RCOMP2

MISC

MISC

12

EC502

EC502
SC5P50V2CN-2GP

SC5P50V2CN-2GP

DY

DY

3

2 OF 9

2 OF 9

A28

BCLK

BCLK#

PRDY#
PREQ#

TCK
TMS

TRST#

TDI

TDO

DBR#

BPM#0
BPM#1
BPM#2
BPM#3
BPM#4
BPM#5
BPM#6
BPM#7

CLK_EXP_P 20

A27

CLK_EXP_N 20

CLK_DP_P_R

A16

CLK_DP_N_R

A15

R8

AK1
A5
A4

AP29
AP27

AR26
AR27
AP30

AR28
AP26

AL35

AT28
AR29
AR30
AT30
AP32
AR31
AT31
AR32

1 2

SM_RCOMP_1
SM_RCOMP_2

Signal Routing Guideline:
SM_RCOMP keep routing length less than 500 mils.

XDP_TRST#

XDP_TDO

XDP_DBRESET#

CLK_DP_P_R 20
CLK_DP_N_R 20

R502

R502

4K99R2F-L-GP

4K99R2F-L-GP

R506 140R2F-GPR506 140R2F-GP

1 2

R507 25D5R2F-GPR507 25D5R2F-GP

1 2

R508 200R2F-L-GPR508 200R2F-L-GP

1 2

2

SM_DRAMRST# 37

XDP_TDO
XDP_TRST#

2

Disabling Guidelines:
If motherboard only supports external graphics:
Connect DPLL_REF_SSCLK on Processor to GND through
1K +/- 5% resistor.
Connect DPLL_REF_SSCLK# on Processor to VCCP
through 1K +/- 5% resistorpower (~15 mW) may be
wasted.

CLK_DP_P_R
CLK_DP_N_R

1D05V_VTT

RN501

RN501
SRN51J-GP

SRN51J-GP

2 3
1

4

HR PX

HR PX

HR PX

Title

Title

Title

CPU (THERMAL/CLOCK/PM )

CPU (THERMAL/CLOCK/PM )

CPU (THERMAL/CLOCK/PM )

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

RN502

RN502

1
2 3

SRN1KJ-7-GP

SRN1KJ-7-GP

20100628 V1.3

DIS

DIS

BAD40_HC

BAD40_HC

BAD40_HC

1

4

1D05V_VTT

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

5 108

of

5 108

of

5 108

1

1

1

5

4

3

2

1

SSID = CPU

4 OF 9

3 OF 9

CPU1C

CPU1C

IVY-BRIDGE

IVY-BRIDGE

M_A_DQ[63:0]14 M_B_DQ[63:0]15

D D

C C

B B

M_A_DQ[63:0]

M_A_BS014
M_A_BS114
M_A_BS214

M_A_CAS#14
M_A_RAS#14
M_A_WE#14

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

G10

N10

M10

AG6
AG5
AK6
AK5
AH5
AH6

AK8
AK9

AH8
AH9
AL9

AL8
AP11
AN11

AL12
AM12
AM11

AL11
AP12
AN12

AJ14
AH14

AL15
AK15

AL14
AK14

AJ15
AH15

AE10

AF10

AE8
AD9
AF9

C5

SA_DQ0

D5

SA_DQ1

D3

SA_DQ2

D2

SA_DQ3

D6

SA_DQ4

C6

SA_DQ5

C2

SA_DQ6

C3

SA_DQ7

F10

SA_DQ8

F8

SA_DQ9
SA_DQ10

G9

SA_DQ11

F9

SA_DQ12

F7

SA_DQ13

G8

SA_DQ14

G7

SA_DQ15

K4

SA_DQ16

K5

SA_DQ17

K1

SA_DQ18

J1

SA_DQ19

J5

SA_DQ20

J4

SA_DQ21

J2

SA_DQ22

K2

SA_DQ23

M8

SA_DQ24
SA_DQ25

N8

SA_DQ26

N7

SA_DQ27
SA_DQ28

M9

SA_DQ29

N9

SA_DQ30

M7

SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37

AJ5

SA_DQ38

AJ6

SA_DQ39

AJ8

SA_DQ40
SA_DQ41

AJ9

SA_DQ42
SA_DQ43
SA_DQ44
SA_DQ45
SA_DQ46
SA_DQ47
SA_DQ48
SA_DQ49
SA_DQ50
SA_DQ51
SA_DQ52
SA_DQ53
SA_DQ54
SA_DQ55

V6

SA_DQ56
SA_DQ57
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63

SA_BS0
SA_BS1
SA_BS2

SA_CAS#
SA_RAS#
SA_WE#

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

3 OF 9

SA_CK0

SA_CLK#0

SA_CKE0

SA_CK1

SA_CLK#1

SA_CKE1

SA_CK2

SA_CLK#2

SA_CKE2

SA_CK3

SA_CLK#3

SA_CKE3

SA_CS#0
SA_CS#1
SA_CS#2
SA_CS#3

SA_ODT0
SA_ODT1
SA_ODT2
SA_ODT3

SA_DQS#0
SA_DQS#1
SA_DQS#2
SA_DQS#3
SA_DQS#4
SA_DQS#5
SA_DQS#6
SA_DQS#7

SA_DQS0
SA_DQS1
SA_DQS2
SA_DQS3
SA_DQS4
SA_DQS5
SA_DQS6
SA_DQS7

SA_MA0
SA_MA1
SA_MA2
SA_MA3
SA_MA4
SA_MA5
SA_MA6
SA_MA7
SA_MA8

SA_MA9
SA_MA10
SA_MA11
SA_MA12
SA_MA13
SA_MA14
SA_MA15

AB6
AA6
V9

AA5
AB5
V10

AB4
AA4
W9

AB3
AA3
W10

AK3
AL3
AG1
AH1

AH3
AG3
AG2
AH2

C4
G6
J3
M6
AL6
AM8
AR12
AM15

D4
F6
K3
N6
AL5
AM9
AR11
AM14

AD10
W1
W2
W7
V3
V2
W3
W6
V1
W5
AD8
V4
W4
AF8
V5
V7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DIM0_CLK_DDR0 14
M_A_DIM0_CLK_DDR#0 14
M_A_DIM0_CKE0 14

M_A_DIM0_CLK_DDR1 14
M_A_DIM0_CLK_DDR#1 14
M_A_DIM0_CKE1 14

M_A_DIM0_CS#0 14
M_A_DIM0_CS#1 14

M_A_DIM0_ODT0 14
M_A_DIM0_ODT1 14

M_A_DQS#[7:0] 14

M_A_DQS[7:0] 14

M_A_A[15:0] 14

M_B_DQ[63:0]

M_B_BS015
M_B_BS115
M_B_BS215

M_B_CAS#15
M_B_RAS#15
M_B_WE#15

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

D10

K10

AM5
AM6
AR3

AP3
AN3
AN2
AN1

AP2

AP5
AN9

AT5

AT6

AP6
AN8
AR6
AR5
AR9

AJ11

AT8

AT9

AH11

AR8

AJ12
AH12
AT11
AN14
AR14
AT14
AT12
AN15
AR15
AT15

AA9
AA7

AA10

AB8
AB9

CPU1D

CPU1D

IVY-BRIDGE

IVY-BRIDGE

C9

SB_DQ0

A7

SB_DQ1
SB_DQ2

C8

SB_DQ3

A9

SB_DQ4

A8

SB_DQ5

D9

SB_DQ6

D8

SB_DQ7

G4

SB_DQ8

F4

SB_DQ9

F1

SB_DQ10

G1

SB_DQ11

G5

SB_DQ12

F5

SB_DQ13

F2

SB_DQ14

G2

SB_DQ15

J7

SB_DQ16

J8

SB_DQ17
SB_DQ18

K9

SB_DQ19

J9

SB_DQ20

J10

SB_DQ21

K8

SB_DQ22

K7

SB_DQ23

M5

SB_DQ24

N4

SB_DQ25

N2

SB_DQ26

N1

SB_DQ27

M4

SB_DQ28

N5

SB_DQ29

M2

SB_DQ30

M1

SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
SB_DQ47
SB_DQ48
SB_DQ49
SB_DQ50
SB_DQ51
SB_DQ52
SB_DQ53
SB_DQ54

R6

SB_DQ55
SB_DQ56
SB_DQ57
SB_DQ58
SB_DQ59
SB_DQ60
SB_DQ61
SB_DQ62
SB_DQ63

SB_BS0
SB_BS1
SB_BS2

SB_CAS#
SB_RAS#
SB_WE#

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

4 OF 9

SB_CK0

SB_CLK#0

SB_CKE0

SB_CK1

SB_CLK#1

SB_CKE1

SB_CK2

SB_CLK#2

SB_CKE2

SB_CK3

SB_CLK#3

SB_CKE3

SB_CS#0
SB_CS#1
SB_CS#2
SB_CS#3

SB_ODT0
SB_ODT1
SB_ODT2
SB_ODT3

SB_DQS#0
SB_DQS#1
SB_DQS#2
SB_DQS#3
SB_DQS#4
SB_DQS#5
SB_DQS#6
SB_DQS#7

SB_DQS0
SB_DQS1
SB_DQS2
SB_DQS3
SB_DQS4
SB_DQS5
SB_DQS6
SB_DQS7

SB_MA0
SB_MA1
SB_MA2
SB_MA3
SB_MA4
SB_MA5
SB_MA6
SB_MA7
SB_MA8

SB_MA9
SB_MA10
SB_MA11
SB_MA12
SB_MA13
SB_MA14
SB_MA15

AE2
AD2
R9

AE1
AD1
R10

AB2
AA2
T9

AA1
AB1
T10

AD3
AE3
AD6
AE6

AE4
AD4
AD5
AE5

D7
F3
K6
N3
AN5
AP9
AK12
AP15

C7
G3
J6
M3
AN6
AP8
AK11
AP14

AA8
T7
R7
T6
T2
T4
T3
R2
T5
R3
AB7
R1
T1
AB10
R5
R4

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DIM0_CLK_DDR0 15
M_B_DIM0_CLK_DDR#0 15
M_B_DIM0_CKE0 15

M_B_DIM0_CLK_DDR1 15
M_B_DIM0_CLK_DDR#1 15
M_B_DIM0_CKE1 15

M_B_DIM0_CS#0 15
M_B_DIM0_CS#1 15

M_B_DIM0_ODT0 15
M_B_DIM0_ODT1 15

M_B_DQS#[7:0] 15

M_B_DQS[7:0] 15

M_B_A[15:0] 15

62.10055.321

62.10055.321

62.10055.321

A A

5

4

3

62.10055.321

2

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

CPU (DDR)

CPU (DDR)

CPU (DDR)

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

6 108

of

6 108

of

6 108

1

1

1

1

5

4

3

2

1

SSID = CPU

5 OF 9

CPU1E

CPU1E

TPAD14-OP-GP

TPAD14-OP-GP

TP701

TP701

TPAD14-OP-GP

TPAD14-OP-GP

AK28

1

TP702

TP702

CFG2

TPAD14-OP-GP

D D

DIS_PX_Muxless

DIS_PX_Muxless

R702

R702

1KR2J-1-GP

1KR2J-1-GP

CFG2 CFG4

12

12

EDP

EDP

1KR2J-1-GP

1KR2J-1-GP

R703

R703

TP703

TP703

TPAD14-OP-GP

CFG4
CFG5
CFG6
CFG7

PEG Static Lane Reversal

CFG2

1: Normal Operation; Lane #
definition matches socket pin map definition

0:Lane Reversed

C C

PCIE Port Bifurcation Straps

CFG[6:5]

B B

11: x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled

SA

DY

DY

12

R704

R704
1KR2J-1-GP

1KR2J-1-GP

DY

DY

12

R705

R705
1KR2J-1-GP

1KR2J-1-GP

DY

DY

12

R706

R706
1KR2J-1-GP

1KR2J-1-GP

CFG7CFG5 CFG6

CFG0

AK29

1

CFG1

AL26

CFG2

AL27

1

CFG3

AK26

CFG4

AL29

CFG5

AL30

CFG6

AM31

CFG7

AM32

CFG8

AM30

CFG9

AM28

CFG10

AM26

CFG11

AN28

CFG12

AN31

CFG13

AN26

CFG14

AM27

CFG15

AK31

CFG16

AN29

CFG17

AJ31

VAXG_VAL_SENSE

AH31

VSSAXG_VAL_SENSE

AJ33

VCC_VAL_SENSE

AH33

VSS_VAL_SENSE

AJ26

RSVD#AJ26

F25

RSVD#F25

F24

RSVD#F24

F23

RSVD#F23

D24

RSVD#D24

G25

RSVD#G25

G24

RSVD#G24

E23

RSVD#E23

D23

RSVD#D23

C30

RSVD#C30

A31

RSVD#A31

B30

RSVD#B30

B29

RSVD#B29

D30

RSVD#D30

B31

RSVD#B31

A30

RSVD#A30

C29

RSVD#C29

J20

RSVD#J20

B18

RSVD#B18

J15

RSVD#J15

IVY-BRIDGE

IVY-BRIDGE

CFG

CFG

RESERVED

RESERVED

PEG DEFER TRAINING

1: PEG Train immediately following xxRESETB de assertion

CFG7

0: PEG Wait for BIOS for training

5 OF 9

VCC_DIE_SENSE

VSS_DIE_SENSE

RSVD#L7
RSVD#AG7
RSVD#AE7
RSVD#AK2

RSVD#W8

RSVD#AT26

RSVD#AM33

RSVD#AJ27

RSVD#T8

RSVD#J16
RSVD#H16

RSVD#G16

RSVD_NCTF#AR35
RSVD_NCTF#AT34
RSVD_NCTF#AT33
RSVD_NCTF#AP35
RSVD_NCTF#AR34

RSVD_NCTF#B34
RSVD_NCTF#A33
RSVD_NCTF#A34
RSVD_NCTF#B35
RSVD_NCTF#C35

RSVD#AJ32
RSVD#AK32

BCLK_ITP

BCLK_ITP#

RSVD_NCTF#AT2
RSVD_NCTF#AT1
RSVD_NCTF#AR1

AH27
AH26

L7
AG7
AE7
AK2

W8

AT26
AM33
AJ27

T8
J16
H16
G16

AR35
AT34
AT33
AP35
AR34

B34
A33
A34
B35
C35

AJ32
AK32

AN35
AM35

AT2
AT1
AR1

62.10055.321

62.10055.321

A A

5

4

3

2

HR PX

HR PX

HR PX

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

CPU (RESERVED)

CPU (RESERVED)

CPU (RESERVED)

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

7 108

of

7 108

of

7 108

1

1

1

1

5

SSID = CPU

PROCESSOR CORE POWER

VCC_CORE

D D

C C

0308 -1
change to 78.2261T.5BL for acousit noice

12

12

12

DY

DY

12

0312 -1

12

DY

12

DY

DY

DY

12

12

C868

C868

C873

C873

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

B B

A A

0308 -1

53A

12

12

C801

C801

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C820

C820

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C816

C816

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C837

C837

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C855

C855

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C846

C846

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C869

C869

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C876

C876

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

5

C803

C803

C802

C802

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C818

C818

C819

C819

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C821

C821

C822

C822

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

0308 -1
change to 78.2261T.5BL for acousit noice

12

C835

C835

C836

C836

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C854

C854

C860

C860

DY

DY

DY

DY

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C862

C862

C847

C847

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

12

C870

C870

C871

C871

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

C872

C872

DY

DY

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

12

12

12

12

DY

DY

12

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C874

C874

SC22U4V3MX-GP

SC22U4V3MX-GP

DY

DY

DY

DY

C811

C811

C804

C804

SC22U4V3MX-GP

SC22U4V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

C815

C815

C817

C817

0308 -1

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

12

12

12

C824

C824

C823

C823

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

12

C834

C834

C833

C833

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

12

C859

C859

C857

C857

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

12

C865

C865

C866

C866

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C875

C875

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

C826

C826

C825

C825

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C832

C832

C831

C831

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C858

C858

C856

C856

DY

DY

DY

DY

DY

DY

VCC Output Decoupling Recommendation:
4 x 470 uF at Bottom Socket Edge
8 x 22 uF at Top Socket Cavity
8 x 22 uF at Top Socket Edge
8 x 22 uF at Bottom Socket Cavity

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C863

C863

C864

C864

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

SC22U4V3MX-GP

4

POWER

CPU1F

CPU1F

VCC_CORE

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

12

C827

C827

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C828

C828

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C861

C861

DY

DY

SC22U4V3MX-GP

SC22U4V3MX-GP

12

C867

C867

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

4

AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26

Y35
Y34
Y33
Y32
Y31
Y30
Y29
Y28
Y27
Y26
V35
V34
V33
V32
V31
V30
V29
V28
V27
V26
U35
U34
U33
U32
U31
U30
U29
U28
U27
U26
R35
R34
R33
R32
R31
R30
R29
R28
R27
R26
P35
P34
P33
P32
P31
P30
P29
P28
P27
P26

VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
VCC51
VCC52
VCC53
VCC54
VCC55
VCC56
VCC57
VCC58
VCC59
VCC60
VCC61
VCC62
VCC63
VCC64
VCC65
VCC66
VCC67
VCC68
VCC69
VCC70
VCC71
VCC72
VCC73
VCC74
VCC75
VCC76
VCC77
VCC78
VCC79
VCC80
VCC81
VCC82
VCC83
VCC84
VCC85
VCC86
VCC87
VCC88
VCC89
VCC90
VCC91
VCC92
VCC93
VCC94
VCC95
VCC96
VCC97
VCC98
VCC99
VCC100

62.10055.321

62.10055.321

POWER

IVY-BRIDGE

IVY-BRIDGE

CORE SUPPLY

CORE SUPPLY

3

PEG AND DDR

PEG AND DDR

VIDALERT#

VCC_SENSE
VSS_SENSE

VCCIO_SENSE

VSS_SENSE_VCCIO

SENSE LINES SVID

SENSE LINES SVID

3

6 OF 9

6 OF 9

VCCIO1
VCCIO2
VCCIO3
VCCIO4
VCCIO5
VCCIO6
VCCIO7
VCCIO8

VCCIO9
VCCIO10
VCCIO11
VCCIO12
VCCIO13
VCCIO14
VCCIO15
VCCIO16
VCCIO17
VCCIO18
VCCIO19
VCCIO20
VCCIO21
VCCIO22
VCCIO23
VCCIO24

VCCIO25
VCCIO26
VCCIO27
VCCIO28
VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33
VCCIO34
VCCIO35
VCCIO36
VCCIO37
VCCIO38
VCCIO39

VCCIO40

VIDSCLK
VIDSOUT

AH13
AH10
AG10
AC10
Y10
U10
P10
L10
J14
J13
J12
J11
H14
H12
H11
G14
G13
G12
F14
F13
F12
F11
E14
E12

E11
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11

J23

AJ29
AJ30
AJ28

AJ35
AJ34

B10
A10

VCCIO_SENSE
VSSIO_SENSE

H_CPU_SVIDALRT#

1215 SC

1
1

2

VCCIO Output Decoupling Recommendation:
2 x 330 uF (3 x 330 uF for 2012 capable designs)
5 x 22 uF & 5 x 0805 no-stuff at Bottom
7 x 22 uF & 2 x 0805 no-stuff at Top

12

12

12

C805

C805

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

No-stuff sites outside the socket may be removed.
No-stuff sites inside the socket cavity need to remain.

12

C812

C812

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C806

C806

C807

C807

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

C814

C814

C813

C813

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C809

C809

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

C829

C829

C830

C830

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

C810

C810

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

C842

C842

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

C839

C839

C838

C838

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1D05V_VTT

12

C844

C844

C843

C843

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

close to CPU

R803 43R2J-GPR803 43R2J-GP

1 2

H_CPU_SVIDCLK 42

H_CPU_SVIDDAT 42

TP801 TPAD14-OP-GPTP801 TPAD14-OP-GP
TP802 TPAD14-OP-GPTP802 TPAD14-OP-GP

H_CPU_SVIDDAT

VR_SVID_ALERT#

VR_SVID_ALERT# 42

VCC_CORE

R801,R802 close to CPU

12

R801

R801
100R2F-L1-GP-U

100R2F-L1-GP-U

12

R802

R802
100R2F-L1-GP-U

100R2F-L1-GP-U

2

R804 130R2F-1-GPR804 130R2F-1-GP

1 2

R805 75R2F-2-GPR805 75R2F-2-GP

1 2

0412 -1M

12

12

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC1U10V2KX-1GP

C878

C878

C877

C877

VCCSENSE 42
VSSSENSE 42

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

1D05V_VTT

12

12

C840

C840

C841

C841

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C845

C845

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1D05V_VTT

1D05V_VTT

12

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

SC1U10V2KX-1GP

SC1U10V2KX-1GP

C879

C879

C880

C880

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VCC_CORE)

CPU (VCC_CORE)

CPU (VCC_CORE)

BAD40_HC

BAD40_HC

BAD40_HC

1

8 108

8 108

8 108

1

1

1

1

of

of

5

SSID = CPU

VCC_GFXCORE

1201 SC

UMA_PX_Muxless

UMA_PX_Muxless

DY

DY

12

UMA_PX_Muxless

UMA_PX_Muxless

12

UMA_PX_Muxless

UMA_PX_Muxless

D D

VAXG Output Decoupling Recommendation:
2 x 470 uF at Bottom Socket Edge
2 x 22 uF at Top Socket Cavity
4 x 22 uF at Top Socket Edge
2 x 22 uF at Bottom Socket Cavity
4 x 22 uF at Bottom Socket Edge

12

C903

C903

C904

C904

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

UMA_PX_Muxless

UMA_PX_Muxless

12

C918

C918

C919

C919

UMA_PX_Muxless

UMA_PX_Muxless

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1201 SC

12

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

UMA_PX_Muxless

UMA_PX_Muxless

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

PROCESSOR VAXG: 38A

12

12

C902

C902

C901

C901

UMA_PX_Muxless

UMA_PX_Muxless

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

C907

C907

C908

C908

DY

DY

UMA_PX_Muxless

UMA_PX_Muxless

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C905

C905

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C920

C920

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1201 SC

DY

C926

C926

12

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

12

C928

C928

C927

C927

UMA_PX_Muxless

UMA_PX_Muxless

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C929

C929

UMA_PX_Muxless

UMA_PX_Muxless

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

12

C923

C923

UMA_PX_Muxless

UMA_PX_Muxless

C C

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

12

12

C925

C925

UMA_PX_Muxless

UMA_PX_Muxless

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

1201 SC

UMA_PX_Muxless

UMA_PX_Muxless

DY

DY

12

12

C932

C932

C931

C931

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

UMA_PX_Muxless

UMA_PX_Muxless

1D8V_S0

Disabling Guidelines for External Graphics Designs:
Can connect to GND if motherboard only supports external
graphics and if GFX VR is not stuffed.
Can be left floating (Gfx VR keeps VAXG rail from floating)

B B

if the VR is stuffed

PROCESSOR VCCPLL: 1.8A

12

C922

C922

SC1U10V2KX-1GP

SC1U10V2KX-1GP

VCCPLL Output Decoupling Recommendation:
1 x 330 uF
2 x 1 uF
1 x 10 uF

VCC_GFXCORE

R903

R903
0R3J-0-U-GP

0R3J-0-U-GP

DIS

DIS

1 2

R904

R904
0R3J-0-U-GP

0R3J-0-U-GP

DIS

DIS

1 2

4

POWER

CPU1G

CPU1G

AT24

VAXG1

AT23

VAXG2

AT21

VAXG3

C906

C906

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

C921

C921

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C930

C930

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

AT20
AT18

AT17
AR24
AR23
AR21
AR20
AR18
AR17
AP24
AP23
AP21
AP20
AP18
AP17
AN24
AN23
AN21
AN20
AN18
AN17
AM24
AM23
AM21
AM20
AM18
AM17

AL24

AL23

AL21

AL20

AL18

AL17
AK24
AK23
AK21
AK20
AK18
AK17

AJ24

AJ23

AJ21

AJ20

AJ18

AJ17
AH24
AH23
AH21
AH20
AH18
AH17

B6
A6
A2

VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
VAXG37
VAXG38
VAXG39
VAXG40
VAXG41
VAXG42
VAXG43
VAXG44
VAXG45
VAXG46
VAXG47
VAXG48
VAXG49
VAXG50
VAXG51
VAXG52
VAXG53
VAXG54

VCCPLL1
VCCPLL2
VCCPLL3

62.10055.321

62.10055.321

POWER

IVY-BRIDGE

IVY-BRIDGE

GRAPHICS

GRAPHICS

1.8V RAIL

1.8V RAIL

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

SA_DIMM_VREFDQ

VREFMISC

VREFMISC

SB_DIMM_VREFDQ

DDR3 -1.5V RAILS

DDR3 -1.5V RAILS

SA RAIL

SA RAIL

VCCSA_SENSE

VAXG_SENSE

VCCSA_VID0
VCCSA_VID1

VCCIO_SEL

3

R906,R907 close to CPU

7 OF 9

7 OF 9

AK35
AK34

Refer to the latest Huron River Mainstream PDG
(Doc# 436735) for more details on S3 power
reduction implementation.

+V_SM_VREF_CNT should have 10 mil trace width

SM_VREF

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15

VCCSA1
VCCSA2
VCCSA3
VCCSA4
VCCSA5
VCCSA6
VCCSA7
VCCSA8

AL1

B4
D1

AF7
AF4
AF1
AC7
AC4
AC1
Y7
Y4
Y1
U7
U4
U1
P7
P4
P1

PROCESSOR VCCSA: 6A

M27
M26
L26
J26
J25
J24
H26
H25

VCCSA_SENSE

H23

VCCSA_VID0

C22

VCCSA_VID1

C24

H_SNB_IVB#_PWRCTRL

A19

SB 1020

change to DY

for co-lay

H_SNB_IVB#_PWRCTRL

+V_SM_VREF_CNT 37

Chief River

PROCESSOR VDDQ: 10A

12

C909

C909

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C916

C916

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

R902

R902
100R2F-L1-GP-U

100R2F-L1-GP-U

DY

DY

VCC_AXG_SENSE

12

C912

C912

0D85V_S0

12

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

VSS_AXG_SENSE

C913

C913

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

VCC_AXG_SENSE 42
VSS_AXG_SENSE 42

M_VREF_DQ_DIMM0_C 37
M_VREF_DQ_DIMM1_C 37

12

12

C910

C910

C911

C911

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C915

C915

VCCSA Output Decoupling Recommendation:
1 x 330 uF
2 x 10 uF at Bottom Socket Cavity
1 x 10 uF at Bottom Socket Edge

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

R902 need be close to pin H23.

VCCSA_SENSE 48

3D3V_S5

12

R911

R911

100KR2J-1-GP

100KR2J-1-GP

2

VCC_GFXCORE

12

R906

R906
100R2F-L1-GP-U

100R2F-L1-GP-U

UMA_PX_Muxless

UMA_PX_Muxless

12

R907

R907
100R2F-L1-GP-U

100R2F-L1-GP-U

UMA_PX_Muxless

UMA_PX_Muxless

SNB

󰵓󰵓󰵓󰵓󰸿󰸿󰸿󰸿󶁜󶁜󶁜󶁜

1010 back IVB

M_VREF_DQ_DIMM0_C
M_VREF_DQ_DIMM1_C

1D5V_S0

12

C914

C914

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

VDDQ Output Decoupling Recommendation:
1 x 330 uF
6 x 10 uF

VCCSA_VID0
VCCSA_VID1

4

RN902

RN902

SRN1KJ-7-GP

SRN1KJ-7-GP

DY

DY

1

2 3

1D05V_VTT1D05V_VTT

R908

R908

R912

R913

R913

R912
10KR2J-3-GP

DY

10KR2J-3-GP

DY

1 2

10KR2J-3-GP

10KR2J-3-GP

R914

R914
10KR2J-3-GP

10KR2J-3-GP

1 2

10KR2J-3-GP

10KR2J-3-GP

DY

DY

1 2

1 2

1

VCCSA_VID0 48
VCCSA_VID1 48

PIn A19

H
L

1 2

R905

R905
0R3J-0-U-GP

0R3J-0-U-GP

DIS

DIS

0R3J-0-U-GP

0R3J-0-U-GP

DIS

DIS

1 2

R901

R901

1.05V
1V

A A

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VCC_GFXCORE)

CPU (VCC_GFXCORE)

CPU (VCC_GFXCORE)

BAD40_HC

BAD40_HC

BAD40_HC

1

of

of

9 108

9 108

9 108

1

1

1

5

4

3

2

1

SSID = CPU

9 OF 9

8 OF 9

CPU1H

CPU1H

AT35

VSS1

AT32

VSS2

AT29

VSS3

AT27

VSS4

AT25

VSS5

AT22

VSS6

D D

C C

B B

AT19
AT16
AT13
AT10

AT7
AT4

AT3
AR25
AR22
AR19
AR16
AR13
AR10

AR7

AR4

AR2
AP34
AP31
AP28
AP25
AP22
AP19
AP16
AP13
AP10

AP7

AP4

AP1
AN30
AN27
AN25
AN22
AN19
AN16
AN13
AN10

AN7

AN4
AM29
AM25
AM22
AM19
AM16
AM13
AM10

AM7
AM4
AM3
AM2

AM1
AL34
AL31
AL28
AL25
AL22
AL19
AL16
AL13
AL10

AL7
AL4

AL2
AK33
AK30
AK27
AK25
AK22
AK19
AK16
AK13
AK10

AK7

AK4

AJ25

VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80

IVY-BRIDGE

IVY-BRIDGE

VSS

VSS

8 OF 9

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AJ22
AJ19
AJ16
AJ13
AJ10
AJ7
AJ4
AJ3
AJ2
AJ1
AH35
AH34
AH32
AH30
AH29
AH28
AH25
AH22
AH19
AH16
AH7
AH4
AG9
AG8
AG4
AF6
AF5
AF3
AF2
AE35
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE9
AD7
AC9
AC8
AC6
AC5
AC3
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
Y9
Y8
Y6
Y5
Y3
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
U9
U8
U6
U5
U3
U2

T35
T34
T33
T32
T31
T30
T29
T28
T27
T26

N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
M34

L33
L30
L27

K35
K32
K29
K26

J34

J31
H33
H30
H27
H24
H21
H18
H15
H13
H10

G35
G32
G29
G26
G23
G20
G17
G11
F34
F31
F29

CPU1I

CPU1I

IVY-BRIDGE

VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170

P9

VSS171

P8

VSS172

P6

VSS173

P5

VSS174

P3

VSS175

P2

VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS187
VSS188
VSS189
VSS190

L9

VSS191

L8

VSS192

L6

VSS193

L5

VSS194

L4

VSS195

L3

VSS196

L2

VSS197

L1

VSS198
VSS199
VSS200
VSS201
VSS202
VSS203
VSS204
VSS205
VSS206
VSS207
VSS208
VSS209
VSS210
VSS211
VSS212
VSS213

H9

VSS214

H8

VSS215

H7

VSS216

H6

VSS217

H5

VSS218

H4

VSS219

H3

VSS220

H2

VSS221

H1

VSS222
VSS223
VSS224
VSS225
VSS226
VSS227
VSS228
VSS229
VSS230
VSS231
VSS232
VSS233

IVY-BRIDGE

VSS

VSS

9 OF 9

VSS234
VSS235
VSS236
VSS237
VSS238
VSS239
VSS240
VSS241
VSS242
VSS243
VSS244
VSS245
VSS246
VSS247
VSS248
VSS249
VSS250
VSS251
VSS252
VSS253
VSS254
VSS255
VSS256
VSS257
VSS258
VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285

F22
F19
E30
E27
E24
E21
E18
E15
E13
E10
E9
E8
E7
E6
E5
E4
E3
E2
E1
D35
D32
D29
D26
D20
D17
C34
C31
C28
C27
C25
C23
C10
C1
B22
B19
B17
B15
B13
B11
B9
B8
B7
B5
B3
B2
A35
A32
A29
A26
A23
A20
A3

62.10055.321

62.10055.321

62.10055.321

A A

5

4

3

62.10055.321

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

2

Date: Sheet

CPU (VSS)

CPU (VSS)

CPU (VSS)

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

10 108

of

10 108

of

10 108

1

1

1

1

5

D D

4

3

2

1

reserve

C C

B B

JE40 delete XDP function

HR PX

HR PX

HR PX

Wistron Corporation

Wistron Corporation

A A

Title

Title

Title

XDP

XDP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

XDP

BAD40_HC

BAD40_HC

BAD40_HC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

1

11 108

11 108

11 108

1

1

5

D D

C C

4

3

2

1

(Blanking)

B B

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

A A

Title

Title

Title

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Reserved

BAD40_HC

BAD40_HC

BAD40_HC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

1

12 108

12 108

12 108

1

1

5

D D

C C

4

3

2

1

(Blanking)

B B

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

A A

Title

Title

Title

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Reserved

BAD40_HC

BAD40_HC

BAD40_HC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

1

13 108

13 108

13 108

1

1

5

SSID = MEMORY

M_A_A[15:0] 6

D D

M_A_BS26
M_A_BS06

M_A_BS16

M_A_DQ[63:0]6

DDR_VREF_S3

M_VREF_DQ_DIMM0

C C

B B

A A

0308 -1 1228 SC

1 2

12

12

C1411

C1411

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

0D75V_S0

12

C1419

C1419

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

R1404

R1404
0R0603-PAD

0R0603-PAD

M1

M1

Tracew should be at least 20 mils wide

C1413

C1413

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Place these caps
close to VTT1 and
VTT2.

12

12

C1420

C1420

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

5

12

R1405

R1405
0R3J-0-U-GP

0R3J-0-U-GP

DY

DY

1125 SC for RF

12

C1422

C1422

C1421

C1421

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

DDR_WR_VREF01_B4 37

12

C1418

C1418

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

M_A_DIM0_ODT06
M_A_DIM0_ODT16

DDR3_DRAMRST#15,37

M_A_DQS#[7:0] 6
M_A_DQS[7:0] 6

M_VREF_DQ_DIMM0

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

DDR_VREF_S3

0D75V_S0

4

H =4mm

4

DM1

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-122-GP

DDR3-204P-122-GP

62.10017.Z51

62.10017.Z51
2nd = 62.10017.V51

2nd = 62.10017.V51

RAS#

WE#

CAS#
CS0#

CS1#
CKE0

CKE1

CK0#

CK1#

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

EVENT#

VDDSPD

NC#1
NC#2

NC#/TEST

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

3

NP1

NP1

NP2

NP2

110
113
115

114
121

73
74

101

CK0

103
102

CK1

104
11

28
46
63
136
153
170
187

200

SDA

202

SCL

198
199
197

SA0

201

SA1

77
122
125

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D5V_S3

M_A_RAS# 6
M_A_WE# 6
M_A_CAS# 6

M_A_DIM0_CS#0 6
M_A_DIM0_CS#1 6

M_A_DIM0_CKE0 6
M_A_DIM0_CKE1 6

M_A_DIM0_CLK_DDR0 6
M_A_DIM0_CLK_DDR#0 6

M_A_DIM0_CLK_DDR1 6
M_A_DIM0_CLK_DDR#1 6

PCH_SMBDATA 15,20,66,79
PCH_SMBCLK 15,20,66,79

TS#_DIMM0_1 15

3

12

C1401

C1401

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Layout Note:
Place these Caps near
SO-DIMMA.

3D3V_S0

1D5V_S3

2

SODIMM A DECOUPLING

12

12

C1403

C1403

C1404

C1404

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C1416

C1416

2

1

Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32

Thermal EVENT

TS#_DIMM0_1

12

12

C1405

C1405

C1406

C1406

DY

DY

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C1417

C1417

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

HR PX

HR PX

HR PX

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom
Date: Sheet

Date: Sheet

Date: Sheet of

R1403

R1403

1 2

12

C1407

C1407

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

3D3V_S0

10KR2J-3-GP

10KR2J-3-GP

12

12

C1408

C1408

C1409

C1409

DY

DY

DY

DY

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DDR3-SODIMM1

DDR3-SODIMM1

DDR3-SODIMM1

BAD40_HC

BAD40_HC

BAD40_HC

1

12

C1410

C1410

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

14 108

14 108

14 108

11

11

11

of

of

5

SSID = MEMORY

M_B_A[15 :0] 6

D D

C C

DDR_VREF_S 3

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C1515

C1515

0D75V_S0

1125 SC for RF

12

C1518

C1518

B B

SC68P50V2JN-1GP

SC68P50V2JN-1GP

R1502

R1502

1 2

0R0603-PAD

0R0603-PAD

12

M1

M1

C1517

C1517

Place these caps
close to VTT1 and
VTT2.

12

M_VREF_DQ _DIMM1

12

C1519

C1519

C1520

C1520

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1228 SC0308 -1

R1503

R1503
0R3J-0-U-GP

0R3J-0-U-GP

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_B_BS26
M_B_BS06

M_B_BS16

M_B_DQ[63:0]6

12

12

C1521

C1521

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_B_DQS# [7:0] 6
M_B_DQS[7:0] 6

DDR_WR_VREF01_D1 37

M_B_DIM0_ ODT06
M_B_DIM0_ ODT16

DDR3_DRAMRS T#14,37

0D75V_S0

4

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_DQS# 0
M_B_DQS# 1
M_B_DQS# 2
M_B_DQS# 3
M_B_DQS# 4
M_B_DQS# 5
M_B_DQS# 6
M_B_DQS# 7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

DDR_VREF_S 3

M_VREF_DQ _DIMM1

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78
79

109
108

15
17

16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68

70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

10

27

45

62
135
152
169
186

12

29

47

64
137
154
171
188

116
120

126

30

203
204

H = 8mm

DM2

DM2

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

BA0
BA1

5

DQ0

7

DQ1
DQ2
DQ3

4

DQ4

6

DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

ODT0
ODT1

VREF_CA

1

VREF_DQ
RESET#

VTT1
VTT2

DDR3-240P-28-GP

DDR3-240P-28-GP

62.10017.R91

62.10017.R91

1st = 62.10024.G01

1st = 62.10024.G01

2nd = 62.10024.D41

2nd = 62.10024.D41

RAS#
CAS#

CS0#
CS1#

CKE0
CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#77

NC#122

NC#125/TES T

3

NP1

NP1

NP2

NP2

110
113

WE#

115
114

121
73

74
101

CK0

103
102

CK1

104
11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198
199
197

SA0

SA1_DIM1

201

SA1

77
122
125

75

VDD

76

VDD

81

VDD

82

VDD

87

VDD

88

VDD

93

VDD

94

VDD

99

VDD

100

VDD

105

VDD

106

VDD

111

VDD

112

VDD

117

VDD

118

VDD

123

VDD

124

VDD

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D5V_S3

M_B_RAS# 6
M_B_WE # 6
M_B_CAS# 6

M_B_DIM0_ CS#0 6
M_B_DIM0_ CS#1 6

M_B_DIM0_ CKE0 6
M_B_DIM0_ CKE1 6

M_B_DIM0_ CLK_DDR0 6
M_B_DIM0_ CLK_DDR#0 6

M_B_DIM0_ CLK_DDR1 6
M_B_DIM0_ CLK_DDR#1 6

PCH_SMBDA TA 14,20,66,79
PCH_SMBCL K 14,20,66,79

TS#_DIMM0_1 14

12

R1501

R1501
10KR2J-3-G P

10KR2J-3-G P

Layout Note:
Place these Caps near
SO-DIMMB.

2

Note:
SO-DIMMB SPD Address is 0xA4
SO-DIMMB TS Address is 0x34

SO-DIMMB is placed farther from
the Processor than SO-DIMMA

3D3V_S0

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C1501

C1501

1D5V_S3

SODIMM B DECOUPLING

DY

DY

12

C1503

C1503

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

DY

DY

C1505

C1505

C1504

C1504

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

12

C1513

C1513

12

12

12

12

C1506

C1506

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C1514

C1514

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C1507

C1507

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1

12

12

C1509

C1509

C1508

C1508

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

C1510

C1510

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

A A

HR PX

HR PX

HR PX

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

DDR3-SODIMM2

DDR3-SODIMM2

DDR3-SODIMM2

BAD40_HC

BAD40_HC

BAD40_HC

1

15 1 08

of

15 1 08

of

15 1 08

1

1

1

5

D D

4

3

2

1

C C

B B

A A

5

(Blanking)

4

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

DDR3-SODIMM2

DDR3-SODIMM2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet of

3

Date: Sheet of

2

DDR3-SODIMM2

BAD40_HC

BAD40_HC

BAD40_HC

16 108

16 108

16 108

1

1

1

1

5

D D

3D3V_S0

UMA_PX_Muxless

UMA_PX_Muxless

2 3
1

RN1701

RN1701
SRN2K2J-1-GP

SRN2K2J-1-GP

RN1702

RN1702
SRN100KJ-6-GP

SRN100KJ-6-GP

1
2 3

UMA_PX_Muxless

UMA_PX_Muxless

C C

B B

4

4

L_CTRL_DATA
L_CTRL_CLK

L_BKLT_EN
LVDS_VDD_EN

CRT_DDC_CLK95
CRT_DDC_DATA95

L_DDC_DATA(PAGE17):
This signal is on the LVDS interface.
This signal needs to be left NC if eDP is
used for the local flat panel display

2K37R2F-GP

2K37R2F-GP

UMA_PX_Muxless

UMA_PX_Muxless

Place near PCH

3D3V_S0

4

RN1707

RN1707
SRN4K7J-8-GP

SRN4K7J-8-GP

UMA_PX_Muxless

UMA_PX_Muxless

1

2 3

Close to PCH side

CRT_BLUE
CRT_GREEN
CRT_RED

R1701

R1701

4

L_BKLT_EN94

LVDS_VDD_EN94

L_BKLT_CTRL94

LVDS_DDC_CLK_R94
LVDS_DDC_DATA_R94

12

0313 -1

LVDSA_CLK#94
LVDSA_CLK94

LVDSA_DATA0#94
LVDSA_DATA1#94
LVDSA_DATA2#94

LVDSA_DATA094
LVDSA_DATA194
LVDSA_DATA294

CRT_BLUE95
CRT_GREEN95
CRT_RED95

CRT_HSYNC95
CRT_VSYNC95

RN1704

RN1704

1
2 3

0R4P2R-PAD

0R4P2R-PAD

UMA_PX_Muxless

UMA_PX_Muxless

1KR2D-1-GP

1KR2D-1-GP

R1702

R1702

RN

RN

4

12

L_CTRL_CLK
L_CTRL_DATA

LVDS_IBG

JE40 modify

LVDS_VREFH
LVDS_VREFL

DAC_IREF_R

3

PCH1D

PCH1D

J47

L_BKLTEN

M45

L_VDD_EN

P45

L_BKLTCTL

T40

L_DDC_CLK

K47

L_DDC_DATA

T45

L_CTRL_CLK

P39

L_CTRL_DATA

AF37

LVD_IBG

AF36

LVD_VBG

AE48

LVD_VREFH

AE47

LVD_VREFL

AK39

LVDSA_CLK#

AK40

LVDSA_CLK

AN48

LVDSA_DATA#0

AM47

LVDSA_DATA#1

AK47

LVDSA_DATA#2

AJ48

LVDSA_DATA#3

AN47

LVDSA_DATA0

AM49

LVDSA_DATA1

AK49

LVDSA_DATA2

AJ47

LVDSA_DATA3

AF40

LVDSB_CLK#

AF39

LVDSB_CLK

AH45

LVDSB_DATA#0

AH47

LVDSB_DATA#1

AF49

LVDSB_DATA#2

AF45

LVDSB_DATA#3

AH43

LVDSB_DATA0

AH49

LVDSB_DATA1

AF47

LVDSB_DATA2

AF43

LVDSB_DATA3

N48

CRT_BLUE

P49

CRT_GREEN

T49

CRT_RED

T39

CRT_DDC_CLK

M40

CRT_DDC_DATA

M47

CRT_HSYNC

M49

CRT_VSYNC

T43

DAC_IREF

T42

CRT_IRTN

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

2

4 OF 10

4 OF 10

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_0N

DDPC_0P

DDPC_1N

DDPC_1P

DDPC_2N

DDPC_2P

DDPC_3N

DDPC_3P

DDPD_0N

DDPD_0P

DDPD_1N

DDPD_1P

DDPD_2N

DDPD_2P

DDPD_3N

DDPD_3P

AP43
AP45

AM42
AM40

AP39
AP40

P38
M39

AT49
AT47
AT40

AV42
AV40
AV45
AV46
AU48
AU47
AV47
AV49

P46
P42

AP47
AP49
AT38

AY47
AY49
AY43
AY45
BA47
BA48
BB47
BB49

M43
M36

AT45
AT43
BH41

BB43
BB45
BF44
BE44
BF42
BE42
BJ42
BG42

UMA_PX_Muxless

UMA_PX_Muxless

HDMI

DDBP_DATA2#
DDBP_DATA2
DDBP_DATA1#
DDBP_DATA1
DDBP_DATA0#
DDBP_DATA0
DDBP_DATA3#
DDBP_DATA3

DDPC_CTRLCLK
DDPC_CTRLDATA

DDCP_AUX#
DDCP_AUX

DDCP_DATA0#
DDCP_DATA0
DDCP_DATA1#
DDCP_DATA1
DDCP_DATA2#
DDCP_DATA2
DDCP_DATA3#
DDCP_DATA3

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

LVDS

LVDS

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

CRT

CRT

DDPD_HPD

3D3V_S0

4

1

2 3

RN1706

RN1706
SRN2K2J-1-GP

SRN2K2J-1-GP

DDBP_DATA2# 51
DDBP_DATA2 51
DDBP_DATA1# 51
DDBP_DATA1 51
DDBP_DATA0# 51
DDBP_DATA0 51
DDBP_DATA3# 51
DDBP_DATA3 51

DDCP_AUX# 52
DDCP_AUX 52

DDCP_DATA0# 52
DDCP_DATA0 52
DDCP_DATA1# 52
DDCP_DATA1 52
DDCP_DATA2# 52
DDCP_DATA2 52
DDCP_DATA3# 52
DDCP_DATA3 52

DDI Port B Detect:(SDVO_CTRL_ DATA)
1: Port B detected
0: Port B not detected

PCH_HDMI_CLK 51
PCH_HDMI_DATA 51

2K2R2F-GP

2K2R2F-GP

DP

R1704

R1704

1

PCH_DP1_HPD 51

3D3V_S0

UMA_PX_Muxless

UMA_PX_Muxless

R1703

R1703
2K2R2F-GP

1 2

1 2

2K2R2F-GP

PCH_DP_HPD 52

DY

DY

678

RN1705

RN1705
SRN150F-1-GP

SRN150F-1-GP

UMA_PX_Muxless

UMA_PX_Muxless

123

A A

4 5

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

5

4

3

2

Date: Sheet

PCH (LVDS/CRT/DDI)

PCH (LVDS/CRT/DDI)

PCH (LVDS/CRT/DDI)

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

17 108

of

17 108

of

17 108

1

11

11

11

5

4

3

2

1

USB30_TXN182
USB30_TXN282
USB30_TXN382
USB30_TXN4104
USB30_TXP182
USB30_TXP282
USB30_TXP382
USB30_TXP4104

DGPU_HOLD_RST#83
DGPU_SELECT#94,95,103
DGPU_PWR_EN#93

SATA_ODD_DA#56

GSENSOR_INT179

0826 SB

3D3V_S0

12

R1823

R1823

DY

DY

12

R1824

R1824

SB 0920

DGPU_PWM_SELECT#94

R1804 22R2J-2-GPR1804 22R2J-2-GP
R1805 22R2J-2-GPR1805 22R2J-2-GP
R1806 22R2J-2-GPR1806 22R2J-2-GP

4

10KR2J-3-GP

10KR2J-3-GP

DGPU_PWR_EN#

10KR2J-3-GP

10KR2J-3-GP

USB30_RXN182

USB30_RXN282
USB30_RXN382
USB30_RXN4104

USB30_RXP182

USB30_RXP282
USB30_RXP382
USB30_RXP4104

3D3V_S0

1 2
1 2
1 2

0314 -1 for EMI

USB_PN13_C
USB_PP13_C

R1814

R1814
8K2R2J-3-GP

8K2R2J-3-GP

1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

R1813

R1813

1 2

0R0402-PAD

0R0402-PAD

1 2

R1821

R1821
0R0402-PAD

0R0402-PAD

0131 SD

USB30_TXN1_C

C1801SCD1U10V2KX-4GP C1801SCD1U10V2KX-4GP

USB30_TXN2_C

C1802SCD1U10V2KX-4GP C1802SCD1U10V2KX-4GP

USB30_TXN3_C

C1803SCD1U10V2KX-4GP C1803SCD1U10V2KX-4GP

USB30_TXN4_C

C1804SCD1U10V2KX-4GP C1804SCD1U10V2KX-4GP

USB30_TXP1_C

C1805SCD1U10V2KX-4GP C1805SCD1U10V2KX-4GP

USB30_TXP2_C

C1806SCD1U10V2KX-4GP C1806SCD1U10V2KX-4GP

USB30_TXP3_C

C1807SCD1U10V2KX-4GP C1807SCD1U10V2KX-4GP

USB30_TXP4_C

C1808SCD1U10V2KX-4GP C1808SCD1U10V2KX-4GP

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

DGPU_PWM_SELECT#

INT_PIRQE#
INT_PIRQF#
INT_PIRQG#
GSENSOR_INT1_R

PLT_RST#5,27,31,32,36,65,66,71,75,82,83,97,105

CLK_PCI_LPC_R
CLK_PCI_FB_R
CLK_PCI_KBC_R

FILTER-137-GP

FILTER-137-GP

4 3

TR1801

TR1801

21

BG26

BJ26

BH25

BJ16
BG16
AH38
AH37
AK43
AK45

AH12

AB46
AB45

AY16
BG46

BE28
BC30
BE32

BJ32
BC28
BE30

BF32
BG32
AV26
BB26
AU28
AY30
AU26
AY26
AV28

AW30

C18
N30

H3

AM4
AM5

Y13
K24
L24

B21

M20

K40
K38
H38
G38

C46
C44
E40

D47
E42
F46

G42
G40
C42
D44

K10

C6

H49
H43
J48
K42
H40

PCH1E

PCH1E

TP1
TP2
TP3
TP4
TP5
TP6
TP7
TP8
TP9
TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
TP20

TP21
TP22
TP23
TP24

USB3RN1
USB3RN2
USB3RN3
USB3RN4
USB3RP1
USB3RP2
USB3RP3
USB3RP4
USB3TN1
USB3TN2
USB3TN3
USB3TN4
USB3TP1
USB3TP2
USB3TP3
USB3TP4

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ1#/GPIO50
REQ2#/GPIO52
REQ3#/GPIO54

GNT1#/GPIO51
GNT2#/GPIO53
GNT3#/GPIO55

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

PME#
PLTRST#

CLKOUT_PCI0
CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

PANTHER-GP-NF

PANTHER-GP-NF

USB_PN13 75
USB_PP13 75

3

RSVD

RSVD

PCI

PCI

71.PANTH.00U

71.PANTH.00U

5 OF 10

5 OF 10

RSVD1
RSVD2
RSVD3
RSVD4

RSVD5
RSVD6

RSVD7
RSVD8

RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22

RSVD23
RSVD24

RSVD25
RSVD26

RSVD27
RSVD28

RSVD29

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

USBP10N

USBP10P

USB

USB

USBP11N

USBP11P

USBP12N

USBP12P

USBP13N

USBP13P

USBRBIAS#

USBRBIAS

OC0#/GPIO59
OC1#/GPIO40
OC2#/GPIO41
OC3#/GPIO42
OC4#/GPIO43

OC5#/GPIO9
OC6#/GPIO10
OC7#/GPIO14

OC[3:0]# for Device 29 (Ports 0-7)
OC[7:4]# for Device 26 (Ports 8-13)

AY7
AV7
AU3
BG4

AT10
BC8

AU2
AT4
AT3
AT1
AY3
AT5
AV3
AV1
BB1
BA3
BB5
BB3
BB7
BE8
BD4
BF6

AV5
AV10

AT8
AY5

BA2
AT12

BF3

USB Ext. port 1 (HS)
External debug port use on Huron river platform

C24
A24
C25
B25
C26
A26
K28
H28
E28
D28
C28
A28
C29
B29

0915 SB

N28
M28
L30
K30
G30
E30

1208 SC

C30
A30
L32
K32
G32
E32

USB_PN13_C

C32

USB_PP13_C

A32

USB_RBIAS

C33

B33

3D3V_S5

A14
K20
B17
C16
L16
A16
D14
C14

1 2

1216 SC

R1811

R1811
22D6R2F-L1-GP

22D6R2F-L1-GP

R1820

R1820
10KR2J-3-GP

10KR2J-3-GP

USB_PN0 82
USB_PP0 82
USB_PN1 82
USB_PP1 82
USB_PN2 82
USB_PP2 82
USB_PN3 104
USB_PP3 104

USB_PN5 69
USB_PP5 69

USB_PN8 66
USB_PP8 66

USB_PN10 66
USB_PP10 66
USB_PN11 65
USB_PP11 65
USB_PN12 49
USB_PP12 49

1 2

USB Table

Pair

0
1
2
3
4
5
6
7
8
9
10
11
12
13

Device
USB port 2 on S/B
USB port 3 on S/B
USB port 4 on S/B(usb charger)
DOCK

BLUETOOTH(from port3)
Fingerprint(from port2)(NO USE)

X
X

Mini Card2 (WWAN)

USB port1(SATA Combo),on M/B

3G Card

Mini Card1 (WLAN)
CAMERA
New Card or USB HUB(New/Smart)

1125 SC for RF

CLK_PCI_KBCCLK_PCI_LPC CLK_PCI_FB

EC1802

12

DY

DY

EC1801

EC1801

SC22P50V2JN-4GP

SC22P50V2JN-4GP

12

2

EC1802

DY

DY

SC33P50V2JN-3GP

SC33P50V2JN-3GP

12

DY

DY

EC1803

EC1803

SC10P50V2JN-4GP

SC10P50V2JN-4GP

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet

Date: Sheet

Date: Sheet of

PCH (PCI/USB/NVRAM)

PCH (PCI/USB/NVRAM)

PCH (PCI/USB/NVRAM)

BAD40_HC

BAD40_HC

BAD40_HC

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

of

18 108

18 108

18 108

1

1

1

1

SSID = PCH

RN1801

RN1801
SRN8K2J-2-GP-U

GSENSOR_INT1

D D

3D3V_S0

A16 swap override Strap/Top-Block
Swap Override jumper

C C

PCI_GNT#3 Low = A16 swap

INT_PIRQB#
INT_PIRQF#

DGPU_HOLD_RST#

override/Top-Block
Swap Override enabled
High = Default

GNT1#/GPIO51 BOOT BIOS LocationSATA1GP/GPIO19

0 0 LPC
0 1 Reserved

B B

A A

SRN8K2J-2-GP-U

1
2
3
4
5 6

R1822

R1822

1 2

10KR2J-3-GP

10KR2J-3-GP

BOOT BIOS Strap

11

5

10

INT_PIRQD#

9

INT_PIRQE#

8

INT_PIRQC#INT_PIRQA#

7

INT_PIRQG#

Reserved 01

SPI(Default)

CLK_PCI_LPC71
CLK_PCI_FB20
CLK_PCI_KBC27,82

3D3V_S0

0826 SB

5

4

3

2

1

SSID = PCH

D D

Signal Routing Guideline:
DMI_ZCOMP keep W=4 mils and
routing length less than 500
mils.
DMI_IRCOMP keep W=4 mils and
routing length less than 500
mils.

1D05V_VTT

R1901 49D9R2F-GPR1901 49D9R2F-GP
R1902 750R2F-GPR1902 750R2F-GP

R1926

R1926
10KR2J-3-GP

10KR2J-3-GP

1 2

DY

PM_MPW ROK36

S0_PWR_GOOD27,42

PM_DRAM_PWRGD5,37

DY

1 2

R1904

R1904
100KR2J-1-GP

100KR2J-1-GP

SYS_PWROK36

C C

S0_PWR_GOOD after PM_SLP_S3# delay 200 ms

SUS_PW R_ACK27

PM_PWRBTN#27,97

B B

A A

AC_PRESENT27

3D3V_S5

SYS_PWROK

PWROK

3D3V_S0

R1924 0R0402-PADR1924 0R0402-PAD

1 2

R1930 0R2J-2-GP

R1930 0R2J-2-GP

1 2

R1929 0R2J-2-GP

R1929 0R2J-2-GP

iAMT_SBA

iAMT_SBA

RN1901

RN1901
SRN10KJ-6-GP

SRN10KJ-6-GP

8
7
6

R1922 10KR2J-3-GP

R1922 10KR2J-3-GP

Non_iAMT_SBA

Non_iAMT_SBA

R1921 10KR2J-3-GPR1921 10KR2J-3-GP

R1908

R1908
100KR2J-1-GP

100KR2J-1-GP

5

DMI_RXN[3:0]4

DMI_RXP[3:0]4

DMI_TXN[3:0]4

DMI_TXP[3:0]4

DMI_RXN04
DMI_RXN14
DMI_RXN24
DMI_RXN34

DMI_RXP04
DMI_RXP14
DMI_RXP24
DMI_RXP34

DMI_TXN04
DMI_TXN14
DMI_TXN24
DMI_TXN34

DMI_TXP04
DMI_TXP14
DMI_TXP24
DMI_TXP34

1 2
1 2

0628 Modify:
Change R1904 to 100K 0402 from 10K and default stuff.

JE40 modify

1 2

R1905

R1905
10KR2J-3-GP

10KR2J-3-GP

12

BATLOW #

1

PM_RI#

2

AC_PRESENT

3

SUS_PW R_ACK

45

12

12

PWRBTN#
This signal has an internal pull-up resistor

12

DMI_COMP_R
RBIAS_CPY

SUS_PW R_ACK

SYS_RESET#

PWROK

Non_iAMT_SBA

Non_iAMT_SBA

APWROK

PM_SLP_LAN#

PCIE_WAKE#

PM_RSMRST#

PM_RSMRST#

BATLOW #

PM_RI#

PM_RSMRST#
CRB : PL 10K

PCH1C

PCH1C

BC24

DMI0RXN

BE20

DMI1RXN

BG18

DMI2RXN

BG20

DMI3RXN

BE24

DMI0RXP

BC20

DMI1RXP

BJ18

DMI2RXP

BJ20

DMI3RXP

AW24

DMI0TXN

AW20

DMI1TXN

BB18

DMI2TXN

AV18

DMI3TXN

AY24

DMI0TXP

AY20

DMI1TXP

AY18

DMI2TXP

AU18

DMI3TXP

BJ24

DMI_ZCOMP

BG25

DMI_IRCOMP

BH21

DMI2RBIAS

C12

SUSACK#

K3

SYS_RESET#

P12

SYS_PWROK

L22

PWROK

L10

APWROK

B13

DRAMPWROK

C21

RSMRST#

K16

SUSWARN#/SUSPWRDNACK/GPIO30

E20

PWRBTN#

H20

ACPRESENT/GPIO31

E10

BATLOW#/GPIO72

A10

RI#

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

PCIE_WAKE#
CRB : 1K
CEKLT: 10K

ANNIE : PL 100K

4

DMI

FDI

DMI

FDI

SUS_STAT#/GPIO61

System Power Management

System Power Management

SLP_LAN#/GPIO29

R1916

R1916

10KR2J-3-GP

10KR2J-3-GP

3 OF 10

3 OF 10

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT
FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

DSWVRMEN

DPWROK

WAKE#

CLKRUN#/GPIO32

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4#

SLP_S3#

SLP_A#

SLP_SUS#

PMSYNCH

3D3V_AUX_S5

1 2

3V_5V_POK_#

BJ14
AY14
BE14
BH13
BC12
BJ12
BG10
BG9

BG14
BB14
BF14
BG13
BE12
BG12
BJ10
BH9

AW16
AV12
BC10
AV14
BB10

A18

PCH_DPW ROK

E22

B9

N3

1222 SC0302 -1 for SBA

G8

N14

D10

H4

F4

SLP_A#

G10

G16

AP14

K14

R1909

R1909
100KR2J-1-GP

100KR2J-1-GP

12

5
6

FDI_TXN[7:0] 4
FDI_TXP[7:0] 4

DSWODVREN

PCIE_WAKE# 31,65,75

PM_CLKRUN# 27,82

SUS_STAT# 82

PCH_SUSCLK_KBC 27

PM_SLP_S5#

PM_SLP_S4# 27,46

R1928 0R2J-2-GP

R1928 0R2J-2-GP
R1927 0R2J-2-GP

R1927 0R2J-2-GP

PM_SLP_SUS#

H_PM_SYNC 5

34
2
1

3

FDI_TXN0 4
FDI_TXN1 4
FDI_TXN2 4
FDI_TXN3 4
FDI_TXN4 4
FDI_TXN5 4
FDI_TXN6 4
FDI_TXN7 4

FDI_TXP0 4
FDI_TXP1 4
FDI_TXP2 4
FDI_TXP3 4
FDI_TXP4 4
FDI_TXP5 4
FDI_TXP6 4
FDI_TXP7 4

FDI_INT 4
FDI_FSYNC0 4
FDI_FSYNC1 4
FDI_LSYNC0 4
FDI_LSYNC1 4

DY

DY

TP1901TP1901

1

1 2

DY

DY

1 2

iAMT_SBA

iAMT_SBA

TP1902TP1902

1

PM_RSMRST#

R1910

R1910
0R0402-PAD

0R0402-PAD

1 2

1 2

R1911

R1911
10KR2J-3-GP

10KR2J-3-GP

PM_SLP_S3# 27,29,36,37,47,75,82

0302 -1 for SBA

PM_SLP_LAN# 27,36,45

1 2

R1912

R1912

1KR2J-1-GP

1KR2J-1-GP

Q1901

Q1901
2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

84.2N702.A3F

2nd = 84.2N702.F3F

2nd = 84.2N702.F3F

For platforms not supporting Deep S4/S5

1.VccSUS3_3 and VccDSW3_3 will rise at the same time (connected on board)

2.DPWROK and RSMRST# will rise at the same time (connected on board)

3.SLP_SUS# and SUSACK# are left as ‘no connect’

4.SUSWARN# used as SUSPWRDNACK/GPIO30

PM_RSMRST#

PM_SLP_A# 27,36

RSMRST#_KBC 27

3V_5V_POK 41

RTC_AUX_S5

2

DSWODVREN - On Die DSW VR Enable

HIGH Enabled (DEFAULT)

LOW Disabled

R1917 330KR2J-L1-GPR1917 330KR2J-L1-GP

1 2

DSWODVREN

PM_CLKRUN#

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

R1918 330KR2J-L1-GP

R1918 330KR2J-L1-GP

1 2

DY

DY

R1919

R1919
8K2R2J-3-GP

8K2R2J-3-GP

1 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH (DM I/FDI/PM)

PCH (DM I/FDI/PM)

PCH (DM I/FDI/PM)

BAD40_HC

BAD40_HC

BAD40_HC

19 108

19 108

19 108

1

of

of

RTC_AUX_S5

3D3V_S0

1

1

1

5

SSID = PCH

D D

C C

Card Reader

WLAN CLK

USB3.0 CLK(reserve)

B B

LAN CLK

A A

PCIE_RXN266

PCIE_RXP266
PCIE_TXN266
PCIE_TXP266

PCIE_RXN332

PCIE_RXP332
PCIE_TXN332
PCIE_TXP332

PCIE_RXN465

PCIE_RXP465
PCIE_TXN465
PCIE_TXP465

C2003 SCD1U10V2KX-5GPC2003 SCD1U10V2KX-5GP

1 2

C2004 SCD1U10V2KX-5GPC2004 SCD1U10V2KX-5GP

1 2

C2013 SCD1U10V2KX-5GPC2013 SCD1U10V2KX-5GP

1 2

C2014 SCD1U10V2KX-5GPC2014 SCD1U10V2KX-5GP

1 2

C2001 SCD1U10V2KX-5GPC2001 SCD1U10V2KX-5GP

1 2

C2002 SCD1U10V2KX-5GPC2002 SCD1U10V2KX-5GP

1 2

1201 sc

PCIE_RXN631,105

PCIE_RXP631,105
PCIE_TXN631,105
PCIE_TXP631,105

PCIE_RXN775

PCIE_RXP775
PCIE_TXN775
PCIE_TXP775

C2011 SCD1U10V2KX-5GPC2011 SCD1U10V2KX-5GP

1 2

C2012 SCD1U10V2KX-5GPC2012 SCD1U10V2KX-5GP

1 2

C2025 SCD1U10V2KX-5GPC2025 SCD1U10V2KX-5GP

1 2

C2026 SCD1U10V2KX-5GPC2026 SCD1U10V2KX-5GP

1 2

0921 SB

3GLAN CLK

CLK_PCIE_WWAN#66
CLK_PCIE_WWAN66

PCIE_CLK_WWAN_REQ#66

CLK_PCIE_CARD#32
CLK_PCIE_CARD32

PCIE_CLK_CARD_REQ#32

CLK_PCIE_WLAN#65
CLK_PCIE_WLAN65

PCIE_CLK_WLAN_REQ#65

CLK_PCIE_LAN#31,105
CLK_PCIE_LAN31,105

PCIE_CLK_LAN_REQ#31,105

0907 SB

CLK_PCIE_NEW#75
CLK_PCIE_NEW75

PCIE_CLK_NEW_REQ#75

3D3V_S0

RN2018

RN2018
SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

PCIE_CLK_CARD_REQ#

4

PCIE_CLK_WWAN_REQ#

PCIECLKRQ1# and PCIECLKRQ2#
Support S0 power only

5

RN2017

RN2017

SRN33J-5-GP-U

SRN33J-5-GP-U

2 3
1

0312 -1

0R4P2R-PAD

0R4P2R-PAD

2 3
1

RN2015

RN2015

0312 -1

RN2019

RN2019

1
2 3

0R4P2R-PAD

0R4P2R-PAD

4

4

RN

RN

RN

RN

4

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN3_C
PCIE_TXP3_C

PCIE_TXN4_C
PCIE_TXP4_C

PCIE_TXN6_C
PCIE_TXP6_C

PCIE_TXN7_C
PCIE_TXP7_C

PCIE_REQ0#

CLK_PCH_SRC2_N
CLK_PCH_SRC2_P

PCIE_REQ4#

CLK_PCH_SRC5_N
CLK_PCH_SRC5_P

PEG_B_CLKRQ#

CLK_PCIE_NEW#_C
CLK_PCIE_NEW_C

PCIE_REQ7#

4

PCH1B

PCH1B

BG34

PERN1

BJ34

PERP1

AV32

PETN1

AU32

PETP1

BE34

PERN2

BF34

PERP2

BB32

PETN2

AY32

PETP2

BG36

PERN3

BJ36

PERP3

AV34

PETN3

AU34

PETP3

BF36

PERN4

BE36

PERP4

AY34

PETN4

BB34

PETP4

BG37

PERN5

BH37

PERP5

AY36

PETN5

BB36

PETP5

BJ38

PERN6

BG38

PERP6

AU36

PETN6

AV36

PETP6

BG40

PERN7

BJ40

PERP7

AY40

PETN7

BB40

PETP7

BE38

PERN8

BC38

PERP8

AW38

PETN8

AY38

PETP8

Y40

CLKOUT_PCIE0N

Y39

CLKOUT_PCIE0P

J2

PCIECLKRQ0#/GPIO73

AB49

CLKOUT_PCIE1N

AB47

CLKOUT_PCIE1P

M1

PCIECLKRQ1#/GPIO18

AA48

CLKOUT_PCIE2N

AA47

CLKOUT_PCIE2P

V10

PCIECLKRQ2#/GPIO20

Y37

CLKOUT_PCIE3N

Y36

CLKOUT_PCIE3P

A8

PCIECLKRQ3#/GPIO25

Y43

CLKOUT_PCIE4N

Y45

CLKOUT_PCIE4P

L12

PCIECLKRQ4#/GPIO26

V45

CLKOUT_PCIE5N

V46

CLKOUT_PCIE5P

L14

PCIECLKRQ5#/GPIO44

AB42

CLKOUT_PEG_B_N

AB40

CLKOUT_PEG_B_P

E6

PEG_B_CLKRQ#/GPIO56

V40

CLKOUT_PCIE6N

V42

CLKOUT_PCIE6P

T13

PCIECLKRQ6#/GPIO45

V38

CLKOUT_PCIE7N

V37

CLKOUT_PCIE7P

K12

PCIECLKRQ7#/GPIO46

AK14

CLKOUT_ITPXDP_N

AK13

CLKOUT_ITPXDP_P

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

4

3GLAN

Card Reader

WLAN

USB 3.0

PCI-E*

PCI-E*

Intel/BCM LAN

NEW CARD

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SMBUSController

SMBUSController

SML1ALERT#/PCHHOT#/GPIO74

SML1CLK/GPIO58

SML1DATA/GPIO75

Link

Link

PEG_A_CLKRQ#/GPIO47

CLKOUT_PEG_A_N

CLKOUT_PEG_A_P

CLOCKS

CLOCKS

CLKIN_PCILOOPBACK

CLKOUTFLEX0/GPIO64
CLKOUTFLEX1/GPIO65
CLKOUTFLEX2/GPIO66
CLKOUTFLEX3/GPIO67

FLEX CLOCKS

FLEX CLOCKS

2 OF 10

2 OF 10

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1

CL_DATA1

CL_RST1#

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKOUT_DP_N
CLKOUT_DP_P

CLKIN_DMI_N
CLKIN_DMI_P

CLKIN_GND1_N
CLKIN_GND1_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_SATA_N
CLKIN_SATA_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

XCLK_RCOMP

3

E12

SMB_CLK

H14

SMB_DATA

C9

A12

SML0_CLK

C8

SML0_DATA

G12

PCH_GPIO74

C13

SML1_CLK

E14

SML1_DATA

M16

CL_CLK

M7

CL_DATA

T11

CL_RST#

P10

PEG_CLKREQ#_R

M10

CLKOUT_PEG_A_N

AB37

CLKOUT_PEG_A_P

AB38

AV22

CLK_EXP_N 5

AU22

CLK_EXP_P 5

CLKOUT_DP_N

AM12

CLKOUT_DP_P

AM13

CLK_BUF_EXP_N

BF18

CLK_BUF_EXP_P

BE18

CLK_BUF_CPYCLK_N

BJ30

CLK_BUF_CPYCLK_P

BG30

CLK_BUF_DOT96_N

G24

CLK_BUF_DOT96_P

E24

CLK_BUF_CKSSCD_N

AK7

CLK_BUF_CKSSCD_P

AK5

CLK_BUF_REF14

K45

H45

XTAL25_IN

V47

XTAL25_OUT

V49

XCLK_RCOMP

Y47

1 2

K43

TPM_TCM_TYPE1

F47
H47

DGPU_PRSNT#

K49

SB 0920 For RF

NEWCARD_PWR_EN

3

R2007

R2007
90D9R2F-1-GP

90D9R2F-1-GP

1

1212 SC

12

DY

DY

EC_SWI# 27
SMB_CLK 31,75
SMB_DATA 31,75

DRAMRST_CNTRL_PCH 37
SML0_CLK 105
SML0_DATA 105

SML1_CLK 27
SML1_DATA 27

CL_CLK 65

CL_DATA 65

CL_RST# 65

0308 -1

0R0402-PAD

0R0402-PAD
R2003

R2003

12

DIS_PX_Muxless

DIS_PX_Muxless

0R4P2R-PAD

0R4P2R-PAD

2 3
1

4

RN2016

RN2016

DIS_PX_Muxless

DIS_PX_Muxless

RN

RN

0R4P2R-PAD

0R4P2R-PAD

2 3
1

4

RN2020

RN2020

RN

RN

EDP

EDP

0312 -1

2 3
1

RN2008

RN2008
SRN10KJ-5-GP

SRN10KJ-5-GP

CLK_PCI_FB 18

1D05V_VTT

NEWCARD_PWR_EN 75

TP2001

TP2001

TPAD14-OP-GP

TPAD14-OP-GP

FC2001

FC2001

SC22P50V2JN-4GP

SC22P50V2JN-4GP

PEG_CLKREQ#_R

PEG_CLKREQ# 83

CLK_PCIE_VGA# 83
CLK_PCIE_VGA 83

CLK_DP_N_R 5
CLK_DP_P_R 5

4

CLK_BUF_REF14
CLK_BUF_CKSSCD_P
CLK_BUF_CKSSCD_N

1215 SC

2

3D3V_S0

12

R2004

R2004
10KR2J-3-GP

10KR2J-3-GP

12

R2005

R2005
10KR2J-3-GP

10KR2J-3-GP

DY

DY

3D3V_S0

SRN2K2J-1-GP

SRN2K2J-1-GP
RN2007

RN2007

1
2 3

SMB_DATA

Q2001

Q2001
2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

84.2N702.A3F

2nd = 84.2N702.F3F

2nd = 84.2N702.F3F

SMB_CLK

1
2
3
4
5 6

RN2009

RN2009
SRN10KJ-L3-GP

SRN10KJ-L3-GP

3D3V_S0 3D3V_S0

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

XTAL25_IN

XTAL25_OUT

12

R2012

R2012

UMA_Muxless

UMA_Muxless

12

R2010

R2010

DIS_PX

DIS_PX

10
9
8
7

6
5

CLK_BUF_EXP_P

CLK_BUF_EXP_N
CLK_BUF_DOT96_N
CLK_BUF_DOT96_P

need very close to PCH

CLK_PCIE_CARD# CLK_PCIE_CARD

12

EC2001

EC2001

SC22P50V2JN-4GP

SC22P50V2JN-4GP

2

1

SMB_CLK
SMB_DATA

SML0_DATA
SML0_CLK

SML1_CLK
SML1_DATA

PCH_GPIO74
PCIE_REQ0#

DRAMRST_CNTRL_PCH

4

1
2
34

SB 0916

R2006

R2006
1M1R2J-GP

1M1R2J-GP

1 2

12

R2013

R2013

10KR2J-3-GP

10KR2J-3-GP

DIS_UMA

DIS_UMA

DGPU_PRSNT#

12

R2011

R2011

10KR2J-3-GP

10KR2J-3-GP

PX_Muxless

PX_Muxless

3D3V_S5

<Variant Name>

<Variant Name>

<Variant Name>

12

EC2002

EC2002

SC22P50V2JN-4GP

SC22P50V2JN-4GP

Title

Title

Title

PCH (PCI-E/SMBUS/CLOCK/CL)

PCH (PCI-E/SMBUS/CLOCK/CL)

PCH (PCI-E/SMBUS/CLOCK/CL)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

4

4
2 3

1
1

2 3

PCH_SMBDATA 14,15,66,79

PCH_SMBCLK 14,15,66,79

SC12P50V2JN-3GP

SC12P50V2JN-3GP

X2001

X2001
XTAL-25MHZ-149-GP

XTAL-25MHZ-149-GP

1 2

82.30020.D11

82.30020.D11

2nd = 82.30020.I01

2nd = 82.30020.I01

UMA_DISCRETE#
UMA: 1 1
DIS :0 1
SG(PX) : 0 0
Optimus(Muxless) : 1 0

UMA_DIS# 22

RN2001

RN2001
SRN10KJ-6-GP

SRN10KJ-6-GP

1
2
3
4 5

RN2002

RN2002

SRN10KJ-6-GP

SRN10KJ-6-GP

1
2
3
4 5

RN2003

RN2003

1

SRN2K2J-1-GP

SRN2K2J-1-GP

23

RN2004

RN2004

23

SRN2K2J-1-GP

SRN2K2J-1-GP

1

RN2005

RN2005
SRN2K2J-1-GP

SRN2K2J-1-GP

4

RN2006

RN2006

4

SRN10KJ-5-GP

SRN10KJ-5-GP

R2009

R2009

1 2

1KR2J-1-GP

1KR2J-1-GP

CRB : 1K
CEKLT: 10K

12

C2008

C2008

C2007

C2007
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

12

PCIE_CLK_WLAN_REQ#

8

PCIE_CLK_LAN_REQ#

7

PCIE_REQ7#

6

PCIE_REQ4#

PEG_B_CLKRQ#

8

PCIE_CLK_NEW_REQ#

7
6

EC_SWI#

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

BAD40_HC

BAD40_HC

BAD40_HC

1

3D3V_S5

20 108

20 108

20 108

1

1

1

of

of

5

HDA_SYNC
HDA_SDOUT

HDA_RST#
HDA_BITCLK

RTC_AUX_S5

R2111

R2111
R2106

R2106

1 2
1 2

20KR2F-L-GP

20KR2F-L-GP
20KR2F-L-GP

20KR2F-L-GP

SSID = PCH

SB 0923

1 2

R2101 10MR2J-L-GPR2101 10MR2J-L-GP

X2101

D D

12

C2101

C2101

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

HDA_CODEC_SYNC29
HDA_CODEC_SDOUT29

HDA_CODEC_RST#29
HDA_CODEC_BITCLK29

C C

X2101

2 3

X-32D768KHZ-65-GP

X-32D768KHZ-65-GP

82.30001.A41

82.30001.A41

2nd = 82.30001.841

2nd = 82.30001.841

41

RTC_X1
RTC_X2

12

C2102

C2102

DY

DY

1
2 3

12

EC2102

EC2102
SC22P50V2JN-4GP

SC22P50V2JN-4GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

R2122

R2122
33R2J-2-GP

33R2J-2-GP

12
12

R2123

R2123
33R2J-2-GP

33R2J-2-GP

4

RN2102

RN2102
SRN33J-5-GP-U

SRN33J-5-GP-U

Flash Descriptor Security Overide

+3VS_+1.5VS_HDA_IO

DY

DY

1 2

R2102

R2102
1KR2J-1-GP

1KR2J-1-GP

HDA_SDOUT

HDA_SDOUT

Low = Default
High = Enable

No Reboot Strap

HDA_SPKR

+3VS_+1.5VS_HDA_IO

R2103 1KR2J-1-GPR2103 1KR2J-1-GP

B B

This signal has a weak internal pull down.
On Die PLL VR is supplied by 1.5V when
sampled high, 1.8 V when sampled low.
Needs to be pulled High for Huron River platform.
co-operate with R2310

1 2

Low = Default
High = No Reboot

HDA_SYNC

PLL ODVR VOLTAGE

HDA_SYNC

A A

HDA_CODEC_SYNC

Low = 1.8V (Default)
High = 1.5V

5V_S0

G

D

S

Q2101

Q2101
2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

84.2N702.J31

2ND = 84.07002.I31

2ND = 84.07002.I31

5

R2124

R2124
33R2J-2-GP

33R2J-2-GP

HDA_SYNC_R HDA_SYNC

1 2

4

3

1103 SC for AFR 1103 SC

G

12

C2104

C2104

SC1U16V3KX-5GP

SC1U16V3KX-5GP

RTC Reset

12

C2103

C2103
SC1U16V3KX-5GP

SC1U16V3KX-5GP

INTVRMEN- Integrated SUS

1.05V VRM Enable
High - Enable internal VRs
Low - Enable external VRs

ME_UNLOCK27

21

G2101

G2101
GAP-OPEN

GAP-OPEN

RTC_AUX_S5

HDA_SPKR29

HDA_SDIN029

1 2

330KR2F-L-GP

330KR2F-L-GP

R2107

R2107
1KR2J-1-GP

1KR2J-1-GP

D

2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

84.2N702.J31

2ND = 84.07002.I31

2ND = 84.07002.I31

1M1R2J-GP

1M1R2J-GP

R2104

R2104

12

1 2

R2105

R2105

Q2102

Q2102

RTC_X1
RTC_X2
RTC_RST#
SRTC_RST#
SM_INTRUDER#
PCH_INTVRMEN

HDA_BITCLK
HDA_SYNC

HDA_RST#

HDA_SDOUT

SMARTCARD_DET

PCH_JTAG_TCK_BUF

JE40 modify

S

R2127

R2127

RTC_RST#_S

1 2

2K2R2J-2-GP

2K2R2J-2-GP

A20
C20
D20
G22

K22
C17

N34

L34

T10

K34

E34
G34
C34

A34

A36

C36
N32

J3
H7
K5
H1

1223 SC

SPI_CLK_R60

SPI_CS0#_R60
SPI_CS1#_R60

SPI_SI_R60

SPI_SO_R60

HDA_SYNC: This strap is sampled on rising edge of RSMRST# and is used to
sample 1.5V VccVRM supply mode. 1K external pull-up resistor is required on this
signal on the board. Signal may have leakage paths via powered off devices (Audio
Codec) and hence contend with the external pull-up. A blocking FET is
recommended in such a case to isolate HDA_SYNC from the Audio Codec device
until after the Strap sampling is complete.

4

DY

DY

EC2101

EC2101

1 2

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

1 2
1 2

R2109 0R2J-2-GPR2109 0R2J-2-GP

PCH_SPI_CS0#

0R2J-2-GP

0R2J-2-GP

PCH_SPI_CS1#

R2115

R2115

DUAL ROM

DUAL ROM

T3

Y14

T1

V4
U3

3

12

R2175

R2175
100KR2J-1-GP

100KR2J-1-GP

PCH1A

PCH1A

RTCX1
RTCX2
RTCRST#
SRTCRST#
INTRUDER#
INTVRMEN

HDA_BCLK
HDA_SYNC
SPKR
HDA_RST#

HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3

HDA_SDO

HDA_DOCK_EN#/GPIO33
HDA_DOCK_RST#/GPIO13

JTAG_TCK
JTAG_TMS
JTAG_TDI
JTAG_TDO

SPI_CLK
SPI_CS0#
SPI_CS1#

SPI_MOSI
SPI_MISO

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

SMARTCARD_DET

PCH_JTAG_TCK_BUF

RTCIHDA

RTCIHDA

JTAG

JTAG

SPI

SPI

3D3V_S0

12

DY

DY

12

RTCRST_ON 27

1 OF 10

1 OF 10

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

LPC

LPC

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

SERIRQ

SATA0RXN

SATA0RXP
SATA0TXN
SATA0TXP

SATA1RXN

SATA1RXP

SATA 6G

SATA 6G

SATA1TXN
SATA1TXP

SATA2RXN

SATA2RXP
SATA2TXN
SATA2TXP

SATA3RXN

SATA3RXP
SATA3TXN
SATA3TXP

SATA4RXN

SATA4RXP
SATA4TXN

SATA

SATA

SATA4TXP

SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATAICOMPO

SATAICOMPI

SATA3RCOMPO

SATA3COMPI

SATA3RBIAS

SATALED#
SATA0GP/GPIO21
SATA1GP/GPIO19

R2126

R2126
1KR2J-1-GP

1KR2J-1-GP

H->Smart Card
L->Non Smart Card

R2125

R2125
1KR2J-1-GP

1KR2J-1-GP

1 2

C38
A38
B37
C37

D36
E36

K36
V5

AM3
AM1
AP7
AP5

AM10
AM8
AP11
AP10

AD7
AD5
AH5
AH4

AB8
AB10
AF3
AF1

Y7
Y5
AD3
AD1

Y3
Y1
AB3
AB1

Y11
Y10

AB12
AB13

AH1

P3
V14
P1

PSW_CLR#22

R2121

R2121
4K7R2J-2-GP

4K7R2J-2-GP

2

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

1208 SC

SATA_DET#0

2

LPC_AD[0..3]

SATA_RXN0 56
SATA_RXP0 56
SATA_TXN0 56
SATA_TXP0 56

SATA_RXN1 66
SATA_RXP1 66
SATA_TXN1 66
SATA_TXP1 66

SATA_COMP

SATA3_COMP

RBIAS_SATA3

SATA_LED#
INT_SERIRQ
SATA_DET#0

1

LPC_AD[0..3] 27,71,82

LPC_FRAME# 27,71,82

INT_SERIRQ 27,82

HDD1

mSATA

SATA_RXN4 56
SATA_RXP4 56
SATA_TXN4 56
SATA_TXP4 56

ODD

ESATA

1D05V_VTT

R2112 37D4R2F-GPR2112 37D4R2F-GP

1 2

R2113 49D9R2F-GPR2113 49D9R2F-GP

1 2

R2114 750R2F-GPR2114 750R2F-GP

1 2

SATA_LED# 68

RN2103

RN2103
SRN10KJ-6-GP

SRN10KJ-6-GP

1
2
3
4 5

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

PCH (SPI/RTC/LPC/SATA/IHDA)

PCH (SPI/RTC/LPC/SATA/IHDA)

PCH (SPI/RTC/LPC/SATA/IHDA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

1D05V_VTT

3D3V_S0

8
7
6

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

BAD40_HC

BAD40_HC

BAD40_HC

21 108

21 108

21 108

1

of

of

1

1

1

3D3V_S0

1
2 3

SRN10KJ-5-GP

SRN10KJ-5-GP

GPIO27 has a weak[20K] internal pull up.
To enable on-die PLL Voltage regurator,
should not place external pull down.

D D

INTERNAL GFX EXTERNAL GFX

R2205 DY 10K

3D3V_S5 1D8V_S0

DY

DY

R2206 100K DY

C C

EDP#_LVDS H L

DGPU_HPD_INTR#

EC_SCI#

MFG_MODE
S_GPIO

PCH_TEMP_ALERT#

B B

USB3_PWR_ON
LAN_DIS#

PCH_GPIO15

VRAM Frequency
Pull high: 800MHZ

3D3V_S0

Pull low :900MHZ

12

R2218

R2218
10KR2J-3-GP

10KR2J-3-GP

UMA_VRAM800MHZ

UMA_VRAM800MHZ

A A

12

R2219

R2219
10KR2J-3-GP

10KR2J-3-GP

VRAM900MHZ

VRAM900MHZ

5

RN2203

RN2203

4

0908 SB

12

R2220

R2220
10KR2J-3-GP

10KR2J-3-GP

PCH_GPIO24

12

R2207

R2207
100KR2J-1-GP

100KR2J-1-GP

LVDS eDP

SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

1
2
3
4 5

8
7
6

1 2

PCH_GPIO22

5

H_RCIN#

H_A20GATE

RN2201

RN2201

RN2202

RN2202

SRN10KJ-6-GP

SRN10KJ-6-GP

RN2204

RN2204

SRN10KJ-6-GP

SRN10KJ-6-GP

R2201

R2201

1KR2J-1-GP

1KR2J-1-GP

4

8
7
6

1
2
3
45

SATA_ODD_PRSNT#56

3D3V_S0

PassWord Clear

1124 SC
del R2206

1208 SC for Del e-SATA

3D3V_S0

3D3V_S5

1G_512M

1G_512M

3D3V_S0

VRAM Size

3D3V_S0

12

R2214

R2214

2G

2G

10KR2J-3-GP

10KR2J-3-GP

12

R2215

R2215

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

Note:
For PCH debug with XDP, need to NO STUFF R2218

R2202

R2202

1 2

200KR2F-L-GP

200KR2F-L-GP

0806 delete TP2202, TP2203

PSW_CLR#21

JE40 delete FP function

G2201

G2201
GAP-OPEN

GAP-OPEN

12

R2224

R2224
10KR2J-3-GP

10KR2J-3-GP

eSATA_DET#

12

R2209

R2209
10KR2J-3-GP

10KR2J-3-GP

DY

DY

12

R2216

R2216

1G

1G

VRAM_SIZE1
VRAM_SIZE2

12

R2217

R2217

512M_2G

512M_2G

4

SSID = PCH

S_GPIO

TP2203

TP2203

TP2204

TP2204

TP2211TPAD14-OP-GP TP2211TPAD14-OP-GP

EC_VPS_SMI#

DGPU_HPD_INTR#

ICC_EN#
LAN_DIS#

PCH_GPIO15

SATA_ODD_PRSNT#

PCH_GPIO22
PCH_GPIO24
PCH_GPIO27

1

PLL_ODVR_EN

DMI_OVRVLTG
FDI_OVRVLTG
MFG_MODE

1

PCH_TEMP_ALERT#

1

USB3_PWR_ON

1

PCH_NCTF_1

1

PCH_NCTF_3

1

PCH_NCTF_2

1

PCH_NCTF_4

1

EC_VPS_SMI#27

EC_SCI#27

LAN_DIS#105

DGPU_PWROK92,93

TPAD14-OP-GP

TPAD14-OP-GP

PSW_CLR#

21

TPAD14-OP-GP

TPAD14-OP-GP

4

EDP#_LVDS49

TP2210TPAD14-OP-GPTP2210TPAD14-OP-GP

TP2206TPAD14-OP-GPTP2206TPAD14-OP-GP

TP2208TPAD14-OP-GPTP2208TPAD14-OP-GP

TP2207TPAD14-OP-GPTP2207TPAD14-OP-GP
TP2209TPAD14-OP-GPTP2209TPAD14-OP-GP

eSATA_DET#

TPM_TCM_TYPE2

PCH1F

PCH1F

T7

BMBUSY#/GPIO0

A42

TACH1/GPIO1

H36

TACH2/GPIO6

E38

TACH3/GPIO7

C10

GPIO8

C4

LAN_PHY_PWR_CTRL/GPIO12

G2

GPIO15

U2

SATA4GP/GPIO16

D40

TACH0/GPIO17

T5

SCLOCK/GPIO22

E8

GPIO24

E16

GPIO27

P8

GPIO28

K1

STP_PCI#/GPIO34

K4

GPIO35

V8

SATA2GP/GPIO36

M5

SATA3GP/GPIO37

N2

SLOAD/GPIO38

M3

SDATAOUT0/GPIO39

V13

SDATAOUT1/GPIO48

V3

SATA5GP/GPIO49/TEMP_ALERT#

D6

GPIO57

A4

VSS_NCTF_1#A4

A44

VSS_NCTF_2#A44

A45

VSS_NCTF_3#A45

A46

VSS_NCTF_4#A46

A5

VSS_NCTF_5#A5

A6

VSS_NCTF_6#A6

B3

VSS_NCTF_7#B3

B47

VSS_NCTF_8#B47

BD1

VSS_NCTF_9#BD1

BD49

VSS_NCTF_10#BD49

BE1

VSS_NCTF_11#BE1

BE49

VSS_NCTF_12#BE49

BF1

VSS_NCTF_13#BF1

BF49

VSS_NCTF_14#BF49

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

3

6 OF 10

6 OF 10

A20GATE

PECI

RCIN#

THRMTRIP#

INIT3_3V#

DF_TVS

TS_VSS1
TS_VSS2
TS_VSS3
TS_VSS4

NC_1

C40
B41
C41
A40

P4
AU16
P5
AY11
AY10
T14
AY1

AH8
AK11
AH10
AK10

P37

BG2
BG48
BH3
BH47
BJ4
BJ44
BJ45
BJ46
BJ5
BJ6
C2
C48
D1
D49
E1
E49
F1
F49

VRAM_SIZE1
VRAM_SIZE2

H_PECI_R

PCH_THERMTRIP_R

NV_CLE

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,

NCTF TEST PIN:

A4,A44,A45,A46,A5,A6,B3,B47,

GPIO

GPIO

VSS_NCTF_16#BG48

VSS_NCTF_18#BH47

VSS_NCTF_20#BJ44
VSS_NCTF_21#BJ45

NCTF

NCTF

VSS_NCTF_22#BJ46

BD1,BD49,BE1,BE49,BF1,BF49,

BG2,BG48,BH3,BH47,BJ4,BJ44,

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,

D49,E1,E49,F1,F49

BD1,BD49,BE1,BE49,BF1,BF49,

BG2,BG48,BH3,BH47,BJ4,BJ44,

BJ45,BJ46,BJ5,BJ6,C2,C48,D1,

D49,E1,E49,F1,F49

TACH4/GPIO68
TACH5/GPIO69
TACH6/GPIO70
TACH7/GPIO71

PROCPWRGD

CPU/MISC

CPU/MISC

VSS_NCTF_15#BG2

VSS_NCTF_17#BH3

VSS_NCTF_19#BJ4

VSS_NCTF_23#BJ5
VSS_NCTF_24#BJ6

VSS_NCTF_25#C2

VSS_NCTF_26#C48

VSS_NCTF_27#D1

VSS_NCTF_28#D49

VSS_NCTF_29#E1

VSS_NCTF_30#E49

VSS_NCTF_31#F1

VSS_NCTF_32#F49

PLL ON DIE VR ENABLE

NOTE:This signal has a weak internal pull-up 20K
ENABLED -- HIGH (R2212 UNSTUFFED) DEFAULT
DISABLED -- LOW (R2212 STUFFED)

PLL_ODVR_EN

3

DY

DY

R2212

R2212

1 2

1KR2J-1-GP

1KR2J-1-GP

UMA_DIS# 20

H_A20GATE 27

DY

DY

H_RCIN# 27

H_CPUPWRGD 5,36

0908 SB

3D3V_S5

2

R2203

R2203

1 2

FDI_OVRVLTG

12

R2208

R2208
10KR2J-3-GP

10KR2J-3-GP

DMI_OVRVLTG

12

R2210

R2210
10KR2J-3-GP

10KR2J-3-GP

12

R2223

R2223

10KR2J-3-GP

10KR2J-3-GP

ICC_EN#

R2211

R2211
1KR2J-1-GP

1KR2J-1-GP

DY

DY

1 2

2

SATA_ODD_PW RGT 56

0R2J-2-GP

0R2J-2-GP

PCH_THERMTRIP_R

1

12

R2221

R2221
2K2R2J-2-GP

2K2R2J-2-GP

NV_CLE

H_PECI 5,27

-1. 4/11

R2204

R2204

1 2

390R2F-2GP

390R2F-2GP

RN2205

RN2205
SRN56J-4-GP

SRN56J-4-GP

1
2 3

DY

DY

1 2

4

1D05V_VTT

H_THERMTRIP# 5,36

R2222

R2222
1KR2J-1-GP

1KR2J-1-GP

H_SNB_IVB# 5

FDI TERMINATION VOLTAGE OVERRIDE

GPIO37
(FDI_OVRVLTG)

LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)

DMI TERMINATION VOLTAGE OVERRIDE

GPIO36
(DMI_OVRVLTG)

Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.

LOW - Tx, Rx terminated to same voltage
(DC Coupling Model DEFAULT)

Integrated Clock Chip Enable

ICC_EN#

HIGH (R2211 DY)- DISABLED [DEFAULT]

LOW (R2211)- ENABLED

GPIO8 has a weak[20K] internal pull up.

Integrated Clock Enable functionality is achieved
via soft-strap. The default is integrated clock
enable.

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH (GPIO/CPU)

PCH (GPIO/CPU)

PCH (GPIO/CPU)

BAD40_HC

BAD40_HC

BAD40_HC

1

22 108

22 108

22 108

of

of

1

1

1

5

1D05V_VTT

(1uFx3)

1D05V_VTT

6A

1.3A

12

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

2.925A(Total current of VCCIO)

DY

DY

12

C2306

C2306

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2301

C2301

12

C2302

C2302

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2307

C2307

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D05V_VTT

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2303

C2303

C2308

C2308

SSID = PCH

D D

C C

(10uFx1_0603)

(1uF x4)

0.266A (Totally VCC3_3 current)

3D3V_S0

SCD1U10V2KX-5GP

(0.1uF x1)

0.159A(Totally current of VCCVRM)

0308 -1

1D5V_S0

B B

1D8V_S0

1 2

R2316 0R0603-PADR2316 0R0603-PAD

1 2

R2317 0R3J-0-U-GP

R2317 0R3J-0-U-GP

DY

DY

VCCVRM

0.042A (Totally current of VCCDMI)

SCD1U10V2KX-5GP

12

VCCVRM

1D05V_VTT

1D05V_VTT

C2310

C2310

0806 check VCCAFDIPLL

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2304

C2304

JE40 modify

12

C2309

C2309

JE40 modify

4

POWER

PCH1G

PCH1G

AA23

VCCCORE1

AC23

VCCCORE2

AD21

VCCCORE3

AD23

VCCCORE4

AF21

VCCCORE5

AF23

VCCCORE6

AG21

VCCCORE7

AG23

VCCCORE8

AG24

VCCCORE9

AG26

VCCCORE10

AG27

VCCCORE11

AG29

VCCCORE12

AJ23

VCCCORE13

AJ26

VCCCORE14

AJ27

VCCCORE15

AJ29

VCCCORE16

AJ31

VCCCORE17

AN19

VCCIO28

BJ22

VCCAPLLEXP

AN16

VCCIO15

AN17

VCCIO16

AN21

VCCIO17

AN26

VCCIO18

AN27

VCCIO19

AP21

VCCIO20

AP23

VCCIO21

AP24

VCCIO22

AP26

VCCIO23

AT24

VCCIO24

AN33

VCCIO25

AN34

VCCIO26

BH29

VCC3_3_3

AP16

VCCVRM2

BG6

VCCAFDIPLL

AP17

VCCIO27

AU20

VCCDMI2

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

POWER

VCC CORE

VCC CORE

VCCIO

VCCIO

FDI

FDI

CRTLVDS

CRTLVDS

DMI

DMI

DFT / SPI HVCMOS

DFT / SPI HVCMOS

VCCADAC

VSSADAC

VCCALVDS
VSSALVDS

VCCTX_LVDS1
VCCTX_LVDS2
VCCTX_LVDS3
VCCTX_LVDS4

VCC3_3_6

VCC3_3_7

VCCVRM3

VCCDMI1

VCCCLKDMI

VCCDFTERM1

VCCDFTERM2

VCCDFTERM3

VCCDFTERM4

7 OF 10

7 OF 10

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

VCCSPI

3

+VCCA_DAC_1_2

U48

U47

UMA_PX_Muxless

UMA_PX_Muxless

+3VS_VCCA_LVDS

AK36
AK37

AM37
AM38
AP36
AP37

V33

V34

AT16

AT20

AB36

+1.05VS_VCC_DMI_CCI

AG16

AG17

AJ16

AJ17

C2326

C2326

V1

(0.1uF/0.01uF x1)
(10uF x1_0603)

12

C2313

C2313

1 2

DIS

DIS

R2303

R2303
0R2J-2-GP

0R2J-2-GP

+1.8VS_VCCTX_LVDS

R2309

R2309
0R2J-2-GP

0R2J-2-GP

DIS

DIS

1 2

12

VCCVRM

12

C2320

C2320

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2321

C2321

12

12

C2322

C2322
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C2314

C2314

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

UMA_PX_Muxless

UMA_PX_Muxless

UMA_PX_Muxless

UMA_PX_Muxless

12

C2316

C2316

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

(0.1uFx1)

C2319

C2319
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

JE40 modify

0.02A

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C2325

C2325

DY

DY

C2323

C2323
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2315

C2315

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

DY

DY

0.001A

0.06A

UMA_PX_Muxless

UMA_PX_Muxless

12

C2317

C2317

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

L2303

L2303
IND-10UH-218-GP

IND-10UH-218-GP

68.10050.10Y

68.10050.10Y

2nd = 68.10090.10B

2nd = 68.10090.10B

1 2

0.19A

JE40 modify

0.02A

0.02A

(1uFx1)

(1uFx1)

C2318

C2318

SC1U25V3KX-1-GP

SC1U25V3KX-1-GP

DY

DY

1 2

3D3V_S0

1D05V_VTT

(1uF x1)

2

0308 -1

R2315

R2315

1 2

0R0805-PAD

0R0805-PAD

UMA_PX_Muxless

UMA_PX_Muxless

R2304

R2304

1 2

0R0603-PAD

0R0603-PAD

UMA_PX_Muxless

UMA_PX_Muxless

R2305

R2305

1 2

0R0805-PAD

0R0805-PAD

UMA_PX_Muxless

UMA_PX_Muxless

(0.01uF x2)
(22uF x1)

1D05V_VTT

(1uFx1)
(10uFx1)

1D8V_S0

3D3V_S5

R2301

R2301
0R2J-2-GP

0R2J-2-GP

1 2

DIS

DIS

3D3V_DAC_S0

3D3V_S0

1D8V_S0

3D3V_S0

U2301 for ANNIE flicker issue
R2315 for don't flicker solution

3.3V CRT LDO

1230 SC

5V_S0 3D3V_DAC_S0

C2311

C2311

SC1U10V2KX-1GP

SC1U10V2KX-1GP

12

U2301

U2301

1

IN

2

GND
EN3NC#4

AME8818BEEV330Z-GP

AME8818BEEV330Z-GP

74.08818.B3F

74.08818.B3F

2nd = 74.70233.03F

2nd = 74.70233.03F

OUT

5
4

0104 SC add 2nd source

1

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C2312

C2312

C2327

C2327

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

A A

5

4

3

2

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

PCH (POWER1)

PCH (POWER1)

PCH (POWER1)

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

23 108

of

23 108

of

23 108

1

1

1

1

5

4

3

2

1

10 OF 10

POWER

PCH1J

SSID = PCH

0.002A

(10uFx1) (0.1uFx1)
(1uFx1)

D D

C C

1D05V_VTT

1 2

IND-10UH-218-GP

IND-10UH-218-GP

L2402

L2402

68.10050.10Y

68.10050.10Y

2nd = 68.10090.10B

2nd = 68.10090.10B

1 2

IND-10UH-218-GP

IND-10UH-218-GP

L2403

L2403

68.10050.10Y

68.10050.10Y

2nd = 68.10090.10B

2nd = 68.10090.10B

B B

(1uFx1)

0.08A

(220uFx1)

+1.05VS_VCCA_A_DPL+1.05VS_VCCA_A_DPL

0.08A

+1.05VS_VCCA_B_DPL+1.05VS_VCCA_B_DPL

12

C2409

C2409
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

(1uFx1)
(220uFx1)

12

C2410

C2410
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2411

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2411

JE40 modify 07/16

1D05V_VTT

(1uFx1)

C2414

C2414

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1D05V_M

1D05V_VTT

A A

5

(0.1uFx2)
(4.7uFx1_0603)

RTC_AUX_S5

(0.1uFx2)
(1uFx1)

6uA

3D3V_S5

3D3V_S0

1D05V_M

12

C2403

C2403

C2404

C2404

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

+VCCRTCEXT

12

(0.1uFx1)

0.055A

12

1D05V_VTT

R2416

R2416

1 2

DY

DY

C2417

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C2417

12

DY

DY

12

C2402

C2402
SC1U10V2KX-1GP

SC1U10V2KX-1GP

1.01A (Total current of VCCASW)

12

12

C2406

C2406

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0.16A (Totally current of VCCVRM

1D05V_VTT

0R2J-2-GP

0R2J-2-GP

12

C2420

C2420
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

4

TP17 TPAD14-OP-GPTP17 TPAD14-OP-GP

TP19 TPAD14-OP-GPTP19 TPAD14-OP-GP

1D05V_VTT

12

C2407

C2407

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

(22uFx2_0603)

(1uFx3)

VCCVRM

C2412

C2412
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1 2

C2413

C2413
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1 2

12

C2421

C2421
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

DY

12

C2418

C2418

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

VCCACK

1

VCCAPLLDMI2

1

(10uFx1)

12

C2408

C2408

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

+1.05VS_VCCA_A_DPL
+1.05VS_VCCA_B_DPL

JE40 modify

(1uFx1)

0.095A

JE40 modify

(1uFx1)

+VCCSST

12

(0.1uFx1)

C2415

C2415
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1D05V_M_DCPSUS

12

C2419

C2419

DY

DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

PCH1J

AD49

VCCACLK

T16

VCCDSW3_3

V12

DCPSUSBYP

T38

VCC3_3_5

BH23

VCCAPLLDMI2

AL29

VCCIO14

AL24

DCPSUS3

AA19

VCCASW1

AA21

VCCASW2

AA24

VCCASW3

AA26

VCCASW4

AA27

VCCASW5

AA29

VCCASW6

AA31

VCCASW7

AC26

VCCASW8

AC27

VCCASW9

AC29

VCCASW10

AC31

VCCASW11

AD29

VCCASW12

AD31

VCCASW13

W21

VCCASW14

W23

VCCASW15

W24

VCCASW16

W26

VCCASW17

W29

VCCASW18

W31

VCCASW19

W33

VCCASW20

N16

DCPRTC

Y49

VCCVRM4

BD47

VCCADPLLA

BF47

VCCADPLLB

AF17

VCCIO7

AF33

VCCDIFFCLKN1

AF34

VCCDIFFCLKN2

AG34

VCCDIFFCLKN3

AG33

VCCSSC

V16

DCPSST

T17

DCPSUS1

V19

DCPSUS2

BJ8

V_PROC_IO

A22

VCCRTC

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

POWER

Clock and Miscellaneous

Clock and Miscellaneous

CPURTC

CPURTC

3

PCI/GPIO/LPCMISC

PCI/GPIO/LPCMISC

SATA USB

SATA USB

HDA

HDA

10 OF 10

VCCIO29
VCCIO30
VCCIO31
VCCIO32
VCCIO33

VCCSUS3_3_7
VCCSUS3_3_8
VCCSUS3_3_9

VCCSUS3_3_10

VCCSUS3_3_6

VCCIO34

V5REF_SUS

DCPSUS4

VCCSUS3_3_1

V5REF

VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
VCCSUS3_3_5

VCC3_3_1
VCC3_3_8
VCC3_3_4

VCC3_3_2

VCCIO5

VCCIO12
VCCIO13

VCCIO6

VCCAPLLSATA

VCCVRM1

VCCIO2
VCCIO3
VCCIO4

VCCASW22

VCCASW23

VCCASW21

VCCSUSHDA

N26
P26
P28
T27
T29

0.097A (Totally current of VCCSUS3_3)

T23
T24
V23
V24
P24

T26

M26

AN23
AN24

P34

N20
N22
P20
P22

AA16
W16
T34

AJ2

AF13

AH13
AH14

AF14
AK1

AF11

AC16
AC17
AD17

T21

V21

T19

P32

1D05V_VTT

+5VA_PCH_VCC5REFSUS

TP21 TPAD14-OP-GPTP21 TPAD14-OP-GP

DCPSUS4

1

3D3V_S5

+5VS_PCH_VCC5REF

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VCCAPLLSATA

VCCVRM

1D05V_M

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0.01A

C2433

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2433

TPAD14-OP-GP

TPAD14-OP-GP

1

12

12

12

12

C2428

C2428

12

C2430

C2430

12

C2429

C2429

12

C2432

C2432

TP27

TP27

12

C2435

C2435

+3VS_+1.5VS_HDA_IO

(0.1uFx1)

12

C2424

C2424
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

JE40 modify

2

C2423

C2423
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2425

C2425
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

JE40 modify

1D05V_VTT

(1uFx1)

3D3V_S5

(0.1uFx1)

3D3V_S5

(0.1uFx1)

0.001A

0.001A

3D3V_S5

(1uFx1)

JE40 modify 07/16

(0.1uFx2)

12

C2431

C2431
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

(0.1uFx1)

(1uFx1)

1D05V_VTT

(1uFx1)

3D3V_S5

AK

D2401

D2401
CH751H-40-1-GP

CH751H-40-1-GP

1 2

R2408

R2408
10R2J-2-GP

10R2J-2-GP

12

C2426

C2426

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

3D3V_S0

AK

D2402

D2402

DY

DY

CH751H-40-1-GP

CH751H-40-1-GP

1 2

12

C2427

C2427
SC1U10V2KX-1GP

SC1U10V2KX-1GP

3D3V_S0

3D3V_S5 1D5V_S5

3D3V_S0

3D3V_S5

1D05V_VTT

12

C2436

C2436

SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

+3VS_+1.5VS_HDA_IO

R2409 0R3J-0-U-GP

R2409 0R3J-0-U-GP

R2415 0R3J-0-U-GP

R2415 0R3J-0-U-GP

R2413 0R0603-PADR2413 0R0603-PAD

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

0308 -1

R2414

R2414
909R2F-GP

909R2F-GP

1 2

U2401

U2401

1

VIN

2

GND
EN3NC#4

G9090-150T11U-GP

G9090-150T11U-GP

74.09090.A3F

74.09090.A3F

1 2

DY

DY

1 2

DY

DY

1 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH (POWER2)

PCH (POWER2)

PCH (POWER2)

BAD40_HC

BAD40_HC

BAD40_HC

83.R0304.D8F

83.R0304.D8F

R2407

R2407
10R2J-2-GP

10R2J-2-GP

DY

DY

VOUT

1

5V_S5

(0.1uFx1)

5V_S0

(1uFx1)

12

R2402

R2402
750R2F-GP

750R2F-GP

DY

DY

1D5V_S5

5
4

24 108

of

24 108

of

24 108

12

C2416

C2416

SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

12

C2405

C2405

3D3V_S5

1D5V_S0

1D5V_S5

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1

1

1

5

4

3

2

1

SSID = PCH

D D

C C

B B

A A

5

PCH1H

PCH1H

H5

VSS0

AA17

VSS1

AA2

VSS2

AA3

VSS3

AA33

VSS4

AA34

VSS5

AB11

VSS6

AB14

VSS7

AB39

VSS8

AB4

VSS9

AB43

VSS10

AB5

VSS11

AB7

VSS12

AC19

VSS13

AC2

VSS14

AC21

VSS15

AC24

VSS16

AC33

VSS17

AC34

VSS18

AC48

VSS19

AD10

VSS20

AD11

VSS21

AD12

VSS22

AD13

VSS23

AD19

VSS24

AD24

VSS25

AD26

VSS26

AD27

VSS27

AD33

VSS28

AD34

VSS29

AD36

VSS30

AD37

VSS31

AD38

VSS32

AD39

VSS33

AD4

VSS34

AD40

VSS35

AD42

VSS36

AD43

VSS37

AD45

VSS38

AD46

VSS39

AD8

VSS40

AE2

VSS41

AE3

VSS42

AF10

VSS43

AF12

VSS44

AD14

VSS45

AD16

VSS46

AF16

VSS47

AF19

VSS48

AF24

VSS49

AF26

VSS50

AF27

VSS51

AF29

VSS52

AF31

VSS53

AF38

VSS54

AF4

VSS55

AF42

VSS56

AF46

VSS57

AF5

VSS58

AF7

VSS59

AF8

VSS60

AG19

VSS61

AG2

VSS62

AG31

VSS63

AG48

VSS64

AH11

VSS65

AH3

VSS66

AH36

VSS67

AH39

VSS68

AH40

VSS69

AH42

VSS70

AH46

VSS71

AH7

VSS72

AJ19

VSS73

AJ21

VSS74

AJ24

VSS75

AJ33

VSS76

AJ34

VSS77

AK12

VSS78

AK3

VSS79

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

8 OF 10

8 OF 10

VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158

AK38
AK4
AK42
AK46
AK8
AL16
AL17
AL19
AL2
AL21
AL23
AL26
AL27
AL31
AL33
AL34
AL48
AM11
AM14
AM36
AM39
AM43
AM45
AM46
AM7
AN2
AN29
AN3
AN31
AP12
AP19
AP28
AP30
AP32
AP38
AP4
AP42
AP46
AP8
AR2
AR48
AT11
AT13
AT18
AT22
AT26
AT28
AT30
AT32
AT34
AT39
AT42
AT46
AT7
AU24
AU30
AV16
AV20
AV24
AV30
AV38
AV4
AV43
AV8
AW14
AW18
AW2
AW22
AW26
AW28
AW32
AW34
AW36
AW40
AW48
AV11
AY12
AY22
AY28

4

PCH1I

PCH1I

AY4

VSS159

AY42

VSS160

AY46

VSS161

AY8

VSS162

B11

VSS163

B15

VSS164

B19

VSS165

B23

VSS166

B27

VSS167

B31

VSS168

B35

VSS169

B39

VSS170

B7

VSS171

F45

VSS172

BB12

VSS173

BB16

VSS174

BB20

VSS175

BB22

VSS176

BB24

VSS177

BB28

VSS178

BB30

VSS179

BB38

VSS180

BB4

VSS181

BB46

VSS182

BC14

VSS183

BC18

VSS184

BC2

VSS185

BC22

VSS186

BC26

VSS187

BC32

VSS188

BC34

VSS189

BC36

VSS190

BC40

VSS191

BC42

VSS192

BC48

VSS193

BD46

VSS194

BD5

VSS195

BE22

VSS196

BE26

VSS197

BE40

VSS198

BF10

VSS199

BF12

VSS200

BF16

VSS201

BF20

VSS202

BF22

VSS203

BF24

VSS204

BF26

VSS205

BF28

VSS206

BD3

VSS207

BF30

VSS208

BF38

VSS209

BF40

VSS210

BF8

VSS211

BG17

VSS212

BG21

VSS213

BG33

VSS214

BG44

VSS215

BG8

VSS216

BH11

VSS217

BH15

VSS218

BH17

VSS219

BH19

VSS220

H10

VSS221

BH27

VSS222

BH31

VSS223

BH33

VSS224

BH35

VSS225

BH39

VSS226

BH43

VSS227

BH7

VSS228

D3

VSS229

D12

VSS230

D16

VSS231

D18

VSS232

D22

VSS233

D24

VSS234

D26

VSS235

D30

VSS236

D32

VSS237

D34

VSS238

D38

VSS239

D42

VSS240

D8

VSS241

E18

VSS242

E26

VSS243

G18

VSS244

G20

VSS245

G26

VSS246

G28

VSS247

G36

VSS248

G48

VSS249

H12

VSS250

H18

VSS251

H22

VSS252

H24

VSS253

H26

VSS254

H30

VSS255

H32

VSS256

H34

VSS257

F3

VSS258

PANTHER-GP-NF

PANTHER-GP-NF

71.PANTH.00U

71.PANTH.00U

3

9 OF 10

9 OF 10

VSS259
VSS260
VSS261
VSS262
VSS263
VSS264
VSS265
VSS266
VSS267
VSS268
VSS269
VSS270
VSS271
VSS272
VSS273
VSS274
VSS275
VSS276
VSS277
VSS278
VSS279
VSS280
VSS281
VSS282
VSS283
VSS284
VSS285
VSS286
VSS287
VSS288
VSS289
VSS290
VSS291
VSS292
VSS293
VSS294
VSS295
VSS296
VSS297
VSS298
VSS299
VSS300
VSS301
VSS302
VSS303
VSS304
VSS305
VSS306
VSS307
VSS308
VSS309
VSS310
VSS311
VSS312
VSS313
VSS314
VSS315
VSS316
VSS317
VSS318
VSS319
VSS320
VSS321
VSS322
VSS323
VSS324
VSS325
VSS328
VSS329
VSS330
VSS331
VSS333
VSS334
VSS335
VSS337
VSS338
VSS340
VSS342
VSS343
VSS344
VSS345
VSS346
VSS347
VSS348
VSS349
VSS350
VSS351
VSS352

H46
K18
K26
K39
K46
K7
L18
L2
L20
L26
L28
L36
L48
M12
P16
M18
M22
M24
M30
M32
M34
M38
M4
M42
M46
M8
N18
P30
N47
P11
P18
T33
P40
P43
P47
P7
R2
R48
T12
T31
T37
T4
W34
T46
T47
T8
V11
V17
V26
V27
V29
V31
V36
V39
V43
V7
W17
W19
W2
W27
W48
Y12
Y38
Y4
Y42
Y46
Y8
BG29
N24
AJ3
AD47
B43
BE10
BG41
G14
H16
T36
BG22
BG24
C22
AP13
M14
AP3
AP1
BE16
BC16
BG28
BJ28

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A3

A3

A3

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

2

Date: Sheet

PCH (VSS)

PCH (VSS)

PCH (VSS)

BAD40_HC

BAD40_HC

BAD40_HC

Taipei Hsien 221, Taiwan, R.O.C.

25 108

of

25 108

of

25 108

1

1

1

1

5

D D

C C

4

3

2

1

B B

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

A A

Title

Title

Title

Clock(colay)

Clock(colay)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Clock(colay)

BAD40_HC

BAD40_HC

BAD40_HC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

1

26 108

26 108

26 108

1

1

53
52
51
50
49
48
47
43
42
41
40
39
38
37
36
35
34
33

54
55
56
57
58
59
60
61

DY

DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

3D3V_AUX_KBC

1108 SC

KCOL0
KCOL1
KCOL2
KCOL3
KCOL4
KCOL5
KCOL6
KCOL7
KCOL8
KCOL9
KCOL10
KCOL11
KCOL12
KCOL13
KCOL14
KCOL15
KCOL16
KCOL17

KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7

BAT_SDA

8

BAT_SCL

7

SMB2_CLK

6

SMB2_DAT

CHG_ON#

12

LID_CLOSE#

12

INSTANT_VIEW_BTN#

4

NCT5605Y_WAKE#

S5_ENABLE

8

ECRST#

7

BD_AC_IN#

6

5V_CHARGER_EN

ADT_TYPE
DISCRETE#

3D3V_AUX_KBC

10KR2F-2-GP

10KR2F-2-GP

1 2
12

C2723

C2723
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

R2781

R2781

2

3D3V_AUX_S5

3D3V_S5

4

RN2717

RN2717
SRN4K7J-8-GP

SRN4K7J-8-GP

1

2 3

SML1_CLK_C

2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

84.2N702.A3F

SML1_DATA_C

KCOL[0..16] 69

KCOL17 69

TP2701 TPAD14-OP-GPTP2701 TPAD14-OP-GP

1

KROW[0..7] 69

3D3V_AUX_KBC

R2707

R2707

12

100KR2F-L1-GP

100KR2F-L1-GP

65W

65W

12

R2701

R2701

100KR2F-L1-GP

100KR2F-L1-GP

90W

90W

1128 SC for model ID reporting

3D3V_AUX_KBC

R2725

R2725

20KR2F-L-GP

20KR2F-L-GP

R2728

R2728

100KR2F-L1-GP

100KR2F-L1-GP

2

3D3V_AUX_S5

EC_SWI#20

EC_SCI#22

UMA

UMA

12

12

Q2703

Q2703

6

SB 0915

12

R2710

R2710
10KR2F-2-GP

10KR2F-2-GP

12

R2739

R2739
10KR2F-2-GP

10KR2F-2-GP

DIS_PX_Muxless

DIS_PX_Muxless

MODEL_ID

1
2345

3D3V_AUX_KBC

0131 SD

1 2

R2756

R2756
0R0402-PAD

0R0402-PAD

DY

DY

1 2

R2760

R2760
0R2J-2-GP

0R2J-2-GP

DY

DY

R2758

R2758

1 2

0R2J-2-GP

0R2J-2-GP

1 2

R2759 0R0402-PADR2759 0R0402-PAD

1

DY

DY

2

D2701

D2701
BAT54S-5-GP

BAT54S-5-GP

83.BAT54.P81

83.BAT54.P81

2nd = 83.BAT54.N81

2nd = 83.BAT54.N81

ECSWI#_KBC

ECSCI#_KBC

3

SML1_CLK 20

SML1_DATA 20

for KBC885

VBKUP

KBC_PWRBTN#82

1

3D3V_AUX_S5

G2701

G2701

GAP-OPEN

GAP-OPEN

2 1

BD_PWNBTN#104

1 2

DY

DY

R2774

R2774
10KR2J-3-GP

10KR2J-3-GP

0604 Modify:
RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN.

HR PX

HR PX

HR PX

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

3D3V_AUX_KBC

R2704

R2704
330KR2J-L1-GP

330KR2J-L1-GP

1 2

12

R2757

R2757
470R2J-2-GP

470R2J-2-GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

DY

3D3V_AUX_S5

R2708

R2708
330KR2J-L1-GP

330KR2J-L1-GP

1 2

BLUETOOTH_EN

KBC Nuvoton NPCE795

KBC Nuvoton NPCE795

KBC Nuvoton NPCE795

BAD40_HC

BAD40_HC

BAD40_HC

1

3D3V_AUX_S5

R2772

R2772
0R0805-PAD

0R0805-PAD

1 2

EC_GPIO6

12

C2717

C2717

EC_GPIO97

12

12

C2724

C2724

R2761

R2761

470R2J-2-GP

470R2J-2-GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

DY

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

27 108

of

27 108

of

27 108

1

1

1

3D3V_AUX_KBC

0628 Modify:
Move R2771 to closed 3D3V_AUX_KBC power
rail base on layout placement.

12

12

D D

H:MIC UNMUTE/L:MIC MUTE

12

12

C2704

C2704

C2701

C2701

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

C2706

C2706

C2705

C2705

DY

DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

TPAD14-OP-GP

TPAD14-OP-GP

1128 SC

1220 SC

AC_IN#40

0604 Modify:

C C

RN2704 pull-Low 10K Resistor to DY
on BLUETOOTH_EN.

3D3V_S0

RN2708

RN2708

0914 SB

SRN10KJ-6-GP

SRN10KJ-6-GP

1

8

2

7

3

6

4 5

SB LID_CLOSE# can not pull high, becaus e push pull

3D3V_AUX_KBC

B B

suggest RN2708 Pin5 cha nge FAN_TACH1

RN2707

RN2707

SRN100KJ-6-GP

SRN100KJ-6-GP

STOP_CHG#

1

4

2 3

R2786

R2786

PM_SLP_A#

12

10KR2F-2-GP

10KR2F-2-GP

DY

DY

R2770

R2770

1KR2J-1-GP

1KR2J-1-GP

1 2

AD_OFF

EC_GPIO47 High Active

PROCHOT_EC

100KR2J-1-GP

100KR2J-1-GP

G

S

Q2702

Q2702
2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

84.2N702.J31

2ND = 84.07002.I31

2ND = 84.07002.I31

D

12

R2732

R2732

SSID = KBC

SB 0923

12

12

C2707

C2707

C2708

C2708

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

AD_IA40

C2714 SCD1U10V2KX-5GP

C2714 SCD1U10V2KX-5GP

1 2

DY

DY

RTCRST_ON21

BAT_SEL_A/B#39

TP2703

TP2703

HDMI_DVI_IN51

SUS_PWR_ACK19

BD_AC_IN#104

5V_CHARGER_EN41

LID_CLOSE#70

TP2704TPAD14-OP-GP TP2704TPAD14-OP-GP

AD_OFF38

DGPUHOT86

S5_ENABLE36,97,107

HDMI_IN51

BAT_A_IN#39

TP2705TPAD14-OP-GP TP2705TPAD14-OP-GP

RSMRST#_KBC19

PM_SLP_S4#19,46
ME_UNLOCK21
BAT_B_IN#39

TP2716TPAD14-OP-GPTP2716TPAD14-OP-GP

dGPU_ALARM86
PM_SLP_LAN#19,36,45
S0_PWR_GOOD19,42

SPI_WP2#60
USB_PWR_EN#82
AC_PRESENT19

EC_VPS_SMI# 22

PowerSmartBTN#

FAN_TACH1 28

0207 SD

12

C2709

C2709

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

PCB_VER_AD

ADT_TYPE

SC 1103

AOAC_EN

1

0131 SD

1 2

R2703 0R0402-PADR2703 0R0402-PAD

MODEL_ID

EC_GPIO6

RTC_AUX_S5_KBC

1

1

EC_ENABLE

1

VBKUP

EC_GPIO97

KBC_VCORF

12

C2712

C2712
SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

H_PROCHOT# 5,42

12

C2710

C2710

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

KBC_GPIO3

BD_CRT_IN

NPCE795PA0DX-GP-U

NPCE795PA0DX-GP-U

1st = 71.00885.A0G

1st = 71.00885.A0G

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

115

102

U2701A

U2701A

104

100
101

105
106

108

114
109

110
112
107

VCC19VCC46VCC76VCC88VCC

VREF

97

GPIO90/AD0

98

GPIO91/AD1

99

GPIO92/AD2
GPIO93/AD3

GPIO94/DA0
GPIO95/DA1
GPIO96/DA2

79

GPIO2

95

GPIO3/AD6

96

GPIO4/AD5
GPIO5/AD4

93

PSL_IN2#_GPIO6

94

GPIO7/AD7
GPIO16

6

GPIO24
GPIO30

14

GPIO34/CIRRXL

15

GPIO36

80

GPIO41

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

23

GPIO46/CIRRXM/TRST#

26

GPIO51

73

PSL_IN1_GPIO70

74

PSL_OUT_GPIO71

75

VBKUP

82

GPIO75

83

GPO76/SHBM

84

GPIO77

91

GPIO81
GPO82/IOX_LDSH/TEST#
GPIO84/IOX_SCLK/XORTR#
GPIO97

44

VCORF

GND18GND45GND78GND89GND

SPIDI

12

R2773

R2773
100KR2J-1-GP

100KR2J-1-GP

0604 Modify:
Add Pull down 100k ohm at F_SDI for Power consumption concern.

RSMRST#_KBC

BD_DVI_IN
BD_HDMI_IN

HDMI_DVI_IN
BD_DP_IN

4

VDD

AVCC

LRESET#

LFRAME#

GPIO11/CLKRUN#

GPIO65/SMI#

ECSCI#/GPIO54

GPIO10/LPCPD#

GPIO67/PWUREQ#

GPIO85/GA20

KBRST#/GPIO86

GPIO52/PSDAT3/RDY#

GPIO50/PSCLK3/TDO

GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
GPIO47/SCL4
GPIO53/SDA4

F_SDI/F_SDIO1

F_SDIO/F_SDIO0

GND

AGND

5

116

103

NOTE:
Connect GND and AGND planes via either
0R resistor or one poi nt layout connection.

RN2715

RN2715

SRN100KJ-6-GP

SRN100KJ-6-GP

1

4

2 3

RN2712

RN2712

SRN100KJ-6-GP

SRN100KJ-6-GP

1

4

2 3

RN2713

RN2713

SRN100KJ-6-GP

SRN100KJ-6-GP

1

4

2 3

5

4

3D3V_S0

SB 0923

12

12

C2713

C2713

C2702

C2702

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

1 OF 2

1 OF 2

7
2

LCLK

3

LPC_AD3

1

LAD3

LPC_AD2

128

LAD2

LPC_AD1

127

LAD1

LPC_AD0

126

LAD0

125

SERIRQ

8
9

ECSCI#_KBC

29
124

ECSWI#_KBC

123
121
122

1228 SC

27

USB_CHARGER_STATUS#

25

NCT5605Y_WAKE#

11
10
71
72

70
69

SML1_CLK_C

67

SML1_DATA_C

68

SMB2_CLK

119

SMB2_DAT

120

PROCHOT_EC

24
28

90

F_CS0#

92

F_SCK

86
87

NOTE:
Locate resistors R271 9 and R2722 clos e
to the NPCE791L.

0915 SB

PURE_HW_SHUTDOWN#28,36

3D3V_S0

0915 SB

RTC_AUX_S5

C2711

C2711
SC220P50V2KX-3GP

SC220P50V2KX-3GP

1 2

DY

DY

PANEL_BLEN 94

H_A20GATE 22
H_RCIN# 22

1

ILIM_SEL 82

TPDATA 69

BD_DVI_IN 104

SPICS# 60
SPICLK 60

SPIDI 60

RN2709

RN2709
SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

RN2703

RN2703

SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

RN2704

RN2704

SRN10KJ-5-GP

SRN10KJ-5-GP

1
2 3

0131 SD

1 2

R2785

R2785
0R0402-PAD

0R0402-PAD

PLT_RST# 5,18,31,32,36,65,66,71,75,82,83,97,105

CLK_PCI_KBC 18,82

LPC_FRAME# 21,71,82

LPC_AD[0..3] 21,71,82

INT_SERIRQ 21,82
PM_CLKRUN# 19,82

BD_HDMI_IN 104

BLON_OUT 49

TP2706

TP2706

TPAD14-OP-GP

TPAD14-OP-GP

1227 SC

<------ TP

BAT_SCL 39,40,104
BAT_SDA 39,40,104
SML1_CLK_C 39,51,79,86
SML1_DATA_C 39,51,79,86

SPIDO 60

3D3V_AUX_S5

4

PURE_HW_SHUTDOWN#_R

2nd = 84.03906.F11

2nd = 84.03906.F11

AMP_MUTE#

4

WIRELESS_SW#

MUTE_BTN#

4

BACKUP_BTN#

for KBC885

RTC_AUX_S5_KBC

3D3V_AUX_KBC

0302 -1

R2724

R2724

64K9R2F-1-GP

64K9R2F-1-GP

PCB_VER_AD

R2726

R2726

100KR2F-L1-GP

100KR2F-L1-GP

<------ BATTERY / CHARGER

<------PCH / EDP

3D3V_AUX_S5

B

Q2701

Q2701
MMBT3906-4-GP

MMBT3906-4-GP

84.T3906.A11

84.T3906.A11

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR

12

12

AMP_MUTE#29
PCH_SUSCLK_KBC19

3D3V_S5

1 2

R2789 10KR2J-3-GP

R2789 10KR2J-3-GP

DY

DY

1 2

R2791 10KR2J-3-GPR2791 10KR2J-3-GP

ECRST#

12

E

C2715

C2715

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

DY

C

ADT_TYPE A/D(PIN99) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

120W 0.82V33.0K
Reserved

SA
SB
SC
SD

-1

-2

ILIM_SEL

INSTANT_VIEW_BTN#82

1128 SC

USB_CHARGER_CTL182

USB_CHARGER_CTL282

H_PECI5,22

1D05V_VTT

E51_RxD

BD_IN#

PURE_HW_SHUTDOWN#

Prevent BIOS data loss

90W
30W
40W

3

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

5V_CHARGER

12

R2706

R2706

10KR2J-3-GP

10KR2J-3-GP

DY

DY

FAN_TACH128

PM_PWRBTN#19,97

PM_SLP_S3#19,29,36,37,47,75,82

CHARGE_LED68

KBC_BEEP29TPCLK 69

FAN1_PWM28

MUTE_LED82

STDBY_LED68

PWRLED68,82

E51_RxD65

E51_TxD65

R2721 43R2J-GPR2721 43R2J-GP

1 2

N/A65W

100.0K

10.0K

20.0K

47.0K

64.9K

PULL-HIGH RESISTOR VOLTAGE

10.0K

20.0K

33.0K

47.0K

64.9K

76.8

100.0K

1227 SC
Del USB_CHARGER_STATUS#

U2701B

U2701B

31

GPIO56/TA1

117

GPIO20/TA2

63

GPIO14/TB1

64

GPIO01/TB2

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

81

GPIO66/G_PWM

66

GPIO33/H_PWM

22

GPIO45/E_PWM

16

GPIO40/F_PWM

ECRST#

85

VCC_POR#

113

GPIO87/CIRRXM/SIN_CR

111

GPIO83/SOUT_CR/TRIST#

30

GPIO55/CLKOUT/IOX_DIN_DIO

77

GPIO00/EXTCLK

PECI

13

PECI

12

VTT

12

NPCE795PA0DX-GP-U

NPCE795PA0DX-GP-U

C2716

C2716

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1st = 71.00885.A0G

1st = 71.00885.A0G

71.00795.00G

71.00795.00G

VCC

100.0K
N/A

100.0K

100.0K

100.0K

100.0K

3D3V_AUX_S5

3

U2702

U2702

1

GND

2

RESET#

G690L293T73UF-GP

G690L293T73UF-GP

DY

DY

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.65V-3

KBSOUT15/GPIO61/XOR_OUT

3D3V_AUX_KBC

3.3V
0V

0.3V

0.55V

1.06V

1.3VReserved 100.0K

2 OF 2

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK
KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7

KBSOUT8
KBSOUT9/SDP_VIS#
KBSOUT10/P80_CLK

KBSOUT11/P80_DAT

KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62

GPIO60/KBSOUT16
GPIO57/KBSOUT17

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

1
2
3
4 5

RN2701 SRN4K7J-10-GPRN2701 SRN4K7J-10-GP

R2790 10KR2J-3-GPR2790 10KR2J-3-GP
R2782 10KR2J-3-GP

R2782 10KR2J-3-GP

1
2 3

RN2710 SRN10KJ-5-GPRN2710 SRN10KJ-5-GP

1
2
3
4 5

RN2705 SRN10KJ-6-GPRN2705 SRN10KJ-6-GP

65W_90W#
High: 65W / Low 90W
DISCRETE#
High: UMA / Low: Discrete

NCT5606Y-0 (Addr: 0x32)

PowerSmartLED82

BD_PWR_LED104

BD_USB_Power_EN104

WLAN_TEST_LED82
PowerSmartBTN#82

A A

MUTE_BTN#82

CODEC_EAPD_MUTE#29

1 2

R2702

R2702
0R0402-PAD

0R0402-PAD

0131 SD

PM_SLP_A#19,36

6

LED3/GP13

7

VSS

8

GP20

9

GP21

10

GP22

BD_DP_IN52,104

5

5

GP2311GP2412GP2513BEEP/GP1414A2/GP15

SMB2_DAT
SMB2_CLK

U2703

U2703

1

2

NCT5605Y-GP-U

NCT5605Y-GP-U

SCLK

SDAT

LED0/GP103LED1/GP114LED2/GP12

20

3VDD

19

RST#

3D3V_AUX_KBC_INT#

18

INT#

R2780 10KR2F-2-GPR2780 10KR2F-2-GP

17

A0/GP17

16

A1/GP16

15

3D3V_AUX_KBC 3D3V_AUX_KBC

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

3D3V_AUX_KBC

C2719

C2719

C2718

1 2

CAP_LED 68

3G_LED 82

C2718

NUMLOCK_LED 82

3D3V_AUX_KBC_RST#

3D3V_AUX_KBC

CHG_ON# 40

R2784

R2784
10KR2F-2-GP

10KR2F-2-GP

1 2
12

C2722

C2722
SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

4

BD_USB_CHARGER_EN#104

USB_CHARGER_PORT_EN#82

AFTP19AFTP19

NCT5606Y-0 (Addr: 0x30)

DC_BATFULL68

WIRELESS_SW#82

STOP_CHG#40

DISCRETE#

0131 SD

BD_IN#29,51,95,104,106

BACKUP_BTN#82

1 2

R2709

R2709
0R0402-PAD

0R0402-PAD

1

6
7
8
9

10

3

VPS_EN_KBC

LED3/GP13
VSS
GP20
GP21
GP22

KBC_GPIO23

5

GP2311GP2412GP2513BEEP/GP1414A2/GP15

SMB2_DAT
SMB2_CLK

U2704

U2704

1

2

NCT5605Y-GP-U

NCT5605Y-GP-U

SCLK

SDAT

LED0/GP103LED1/GP114LED2/GP12

20

3VDD

19

RST#

3D3V_AUX_KBC_INT#_R

18

INT#

17

A0/GP17

16

A1/GP16

15

WIRELESS_EN 65
BACKUP_LED 82

NCT5605Y_WAKE#NCT5605Y_WAKE#

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C2720

C2720

1 2

R2783 10KR2F-2-GPR2783 10KR2F-2-GP

3G_EN 66
BLUETOOTH_EN 65

12

C2721

C2721

3D3V_AUX_KBC_RST#_R

5

4

3

2

1

SSID = Thermal

D D

C C

3D3V_S0

DY

DY

Q2801

Q2801

MMBT3904-3-GP

MMBT3904-3-GP

84.03904.T11

84.03904.T11
2nd = 84.03904.L06

2nd = 84.03904.L06

12

DY

DY

R2808

R2808

NTC-100K-8-GP

NTC-100K-8-GP

2.System Sensor, Put on palm rest

ALERT#

3D3V_S0

U2801

U2801

1

VDD

2

D+

3

D­T_CRIT#4GND

NCT7718W-GP

NCT7718W-GP

12

C2801

C2801

C

B

E

12

C2802

C2802

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.

P2800_DXP

12

C2806

C2806
SC470P50V3JN-2GP

SC470P50V3JN-2GP

P2800_DXN

12

C2807

C2807

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

THERM_SYS_SHDN#

3D3V_S0

12

R5 SB

R2813

R2813
18K7R2D-GP

18K7R2D-GP

SCL
SDA

ALERT#

3D3V_S0

R2807

R2807
0R2J-2-GP

0R2J-2-GP

1 2

DY

DY

D2801

D2801

FAN_TACH127

CH551H-30GP-GP

CH551H-30GP-GP

83.R5003.J8F

83.R5003.J8F

2nd = 83.R5003.H8H

2nd = 83.R5003.H8H

12

R2805

R2805
10KR2J-3-GP

10KR2J-3-GP

DY

DY

KA

FAN_TACH1_C

check? SB

8
7
6
5

ALERT#

TMDS_SCL_A 51
TMDS_SDA_A 51

Fan controller P2793

*Layout* 15 mil

KA

D2802

D2802
CH551H-30GP-GP

83.R5003.J8F

83.R5003.J8F

2nd = 83.R5003.H8H

2nd = 83.R5003.H8H

FAN1_PW M27

CH551H-30GP-GP

C2815

C2815
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

DY

DY

FAN_TACH1_C

5V_S0

5V_S0

12

C2809

C2809

SC4D7U10V3KX-GP

SC4D7U10V3KX-GP

ACES-CON4-41-GP

ACES-CON4-41-GP

12

C2808

C2808

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SB 0909 for ME

FAN1

FAN1

4
3
2

1

5 6

20.F2040.004

20.F2040.004
2nd = 20.F1808.004

2nd = 20.F1808.004

1.H/W T8 Shutdown

R7 SB

3D3V_S0

SB 1011

R2811

R2811

0R2J-2-GP

0R2J-2-GP

1 2

DY

DY

2

D

Q2802

Q2802

2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

84.2N702.J31

2ND = 84.07002.I31

2ND = 84.07002.I31

THERM_SYS_SHDN#

S

IMVP_PWRGD_C

G

2

0308 -1

1 2

1 2

0R2J-2-GP

0R2J-2-GP

SC 1107

12

R2812

R2812

3D3V_AUX_S5

1

C2811

C2811

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

DY

3

DY

DY

B B

D2803

D2803
BAT54PT-GP

BAT54PT-GP

83.00054.T81

83.00054.T81

2ND = 83.BAT54.D81

2ND = 83.BAT54.D81

3rd = 83.BAT54.S81

3rd = 83.BAT54.S81

PURE_HW _SHUTDOWN#27,36

10KR2J-3-GP

10KR2J-3-GP

DY

DY

A A

5

4

3

12

R2809

R2809
2KR2F-3-GP

2KR2F-3-GP

R2810 0R0402-PADR2810 0R0402-PAD

R2814

R2814

DY

DY

3D3V_S0

IMVP_PWRGD 36,42

HR PX

HR PX

HR PX

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Thermal T7718/Fan Controllor P2793

Thermal T7718/Fan Controllor P2793

Thermal T7718/Fan Controllor P2793

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

BAD40_HC

BAD40_HC

BAD40_HC

28 108

28 108

28 108

1

of

of

1

1

1

5

D2901

D2901

AMP_MUTE#27

PM_SLP_S3#19,27,36,37,47,75,82

D D

3D3V_S0

2

3

1

BAW56-5-GP

BAW56-5-GP

83.00056.Q11

83.00056.Q11

2ND = 83.00056.K11

2ND = 83.00056.K11

CX20584_MUTE#

3D3V_S0

DY

DY

R2903

R2903

12

10KR2J-3-GP

10KR2J-3-GP

R2901

R2901

1 2

0R0402-PAD

0R0402-PAD

R2905

R2905

1 2

0R0402-PAD

0R0402-PAD

GPIO/SPK_MUTE#

EXT_MUTE#

4

DY

DY

DY

DY

DY

DY

1 2

1 2

1 2

C2937

C2937

C2936

C2936

C2935

C2935

R2906

R2906
0R0805-PAD

0R0805-PAD

1 2

R2907

R2907
0R0805-PAD

0R0805-PAD

1 2

3

AUD_AGND

AUDIO_PC_BEEP

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DMIC_12 DMIC_CLK

12

EC2901

EC2901

DY

DY

SC22P50V2JN-4GP

SC22P50V2JN-4GP

C2902

C2902

DY

DY

AUDIO_BEEP

12

EC2902

EC2902

2

D2902

D2902

1

3

R2933

R2933

BAT54CGP-GP

BAT54CGP-GP

10KR2J-3-GP

10KR2J-3-GP

1 2

SC22P50V2JN-4GP

SC22P50V2JN-4GP

2

83.R2003.H81

83.R2003.H81
2nd = 83.R2003.Q81

2nd = 83.R2003.Q81

KBC_BEEP 27

HDA_SPKR 21

MB_HP_L MB_HP_R

1

12

EC2903

EC2903

12

EC2904

EC2904

12

R2947

R2947
10KR2J-3-GP

10KR2J-3-GP

Q2901

DY

DY

R2918

R2918

12

C2917

C2917

10KR2J-3-GP

10KR2J-3-GP

3 4
2
1

Q2901

BD_IN#_BJT

5
6

2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

84.2N702.A3F

2nd = 84.2N702.F3F

2nd = 84.2N702.F3F

12

12

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C2918

C2918

5V_S0

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

R2946 10KR2J-3-GPR2946 10KR2J-3-GP

3D3V_S0

C2911 SC10U6D3V3MX-GPC2911 SC10U6D3V3MX-GP

C2915

C2915

12
12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1205 SC

12

C2919

C2919

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

HDA_CODEC_SYNC21

HDA_CODEC_BITCLK21

HDA_CODEC_SDOUT21

HDA_SDIN021

HDA_CODEC_RST#21

3D3V_S0

12

C2920

C2920

12

C2927

C2927

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2938

C2938

SC33P50V2JN-3GP

SC33P50V2JN-3GP

12

BD_IN#_CODEC

BD_IN#27,51,95,104,106

3D3V_S0

C C

12

12

12

C2906

C2906

B B

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C2907

C2907

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2912

C2912

3D3V_S0

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

CODEC_SYNC

C2901 SC10U6D3V3MX-GPC2901 SC10U6D3V3MX-GP

12

C2905

C2905

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

1 2

SCD1U10V2KX-5GPC2913 SCD1U10V2KX-5GPC2913

LDO_OUT_3D3V

12

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2930

C2930

DY

DY

1D5V_S0

C2921

C2921

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

G

S

C2909

C2909

12

C2928

C2928

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

C2929

C2929

SYNC_CTL

DY

DY

2N7002K-2-GP

2N7002K-2-GP

D

Q2904

Q2904

CODEC_EAPD_MUTE#27

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

3D3V_S0

R2908

R2908

12

AUD_AGND

12

R2935

R2935
33KR2F-GP

33KR2F-GP

CODEC_SYNC

33R2J-2-GP

33R2J-2-GP

AVEE

C2924

C2924

12

DY

DY

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

C2903

C2903

1 2

CX20584_SDATA

12

GPIO/SPK_MUTE#
BD_IN#_CODEC

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2925 SCD1U10V2KX-5GPC2925 SCD1U10V2KX-5GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

SC10P50V2JN-4GP

CX20584_FLYP
CX20584_FLYN

FILT_1.8

CLASS_D_REF

12

SC10P50V2JN-4GP

SC10P50V2JN-4GP

10

7
6
8

11
47

46
45

22
23

24
29

9
4

21

5

31
30

18
15
20

49

CX20584-21Z-GP

CX20584-21Z-GP

SENSE_A

U2901

U2901

SYNC

SPDIF/BEEPGAIN
BIT_CLK
SDATA_OUT
SDATA_IN
RESET#

GPIO0/EAPD#

GPIO1/SPK_MUTE#
GPIO2/SPDIF2

FLY_P
FIY_N

AVEE
AVDD_HP

VDD_IO
VAUX_3.3
DVDD_3.3
FILT_1.8

AVDD_5V
AVDD_3.3V

RPWR_5.0
LPWR_5.0
CLASS_D_REF

GND

3D3V_S0

PC_BEEP
DMIC_1/2

DMIC_CLK0

DMIC_3/4

EXT_MUTE#

PORTA_L

PORTA_R
PORTD_L

PORTD_R

PORTB_L

PORTB_R
PORTC_L

PORTC_R

PORTE_L

PORTE_R

PORTF_L

PORTF_R

FILT_1.65

12

R2928

R2928
5K1R2F-2-GP

5K1R2F-2-GP

R2929 10KR2F-2-GPR2929 10KR2F-2-GP

R2939 39K2R2F-L-GPR2939 39K2R2F-L-GP

1 2

48

AUDIO_PC_BEEP

13

DMIC_12_C

3

DMIC_CLK_C

2
1

AUD_SPK_L-_C

16

LEFT-

AUD_SPK_L+C

14

LEFT+

AUD_SPK_R-C

17

RIGHT-

AUD_SPK_R+C

19

RIGHT+

B_BIAS
C_BIAS

SENSEA
SENSEB

EXT_MUTE#

12

CX20584_A_L

25

CX20584_A_R

26
27

28
39

40

CX20584_C_L

35

CX20584_C_R

36

CX20584_D_L

33

CX20584_D_R CX20584_D_R_C

34
41

42
38

37

SENSE_A

44

SENSE_B

43

FILT_1.65V

32

C2931

C2931

12

L2931 NBQ100505T-100Y-N-GPL2931 NBQ100505T-100Y-N-GP

1 2

L2930 NBQ100505T-100Y-N-GPL2930 NBQ100505T-100Y-N-GP

1 2

0131 SD

R2940

R2940
R2941

R2941
R2942

R2942
R2943

R2943

1 2

C2914 SC2D2U6D3V3KX-GPC2914 SC2D2U6D3V3KX-GP

1 2

C2916 SC2D2U6D3V3KX-GPC2916 SC2D2U6D3V3KX-GP

1 2

C2922 SC10U6D3V3MX-GPC2922 SC10U6D3V3MX-GP

1 2

C2923 SC10U6D3V3MX-GPC2923 SC10U6D3V3MX-GP

C_BIAS

12

12

C2932

C2932

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

AUD_AGND

EXT_MIC_JD# 58

SENSE_PORT_C

AUD_HP1_JD# 58

SENSE_PORT_A

1 2

0R0805-PAD

0R0805-PAD

1 2

0R0805-PAD

0R0805-PAD

1 2

0R0805-PAD

0R0805-PAD

1 2

0R0805-PAD

0R0805-PAD

R2921

R2921

1 2

3KR2F-GP

3KR2F-GP

1 2

3KR2F-GP

3KR2F-GP

R2923

R2923

DOCK_SPDIF 104

1212 SC
change to 36 ohm for Vender

CX20584_C_L_C
CX20584_C_R_C

CX20584_D_L_C

MB_MICIN_L
MB_MICIN_R

3D3V_S0

SENSE_B

DMIC_12 58
DMIC_CLK 58

AUD_SPK_L- 58
AUD_SPK_L+ 58

AUD_SPK_R- 58
AUD_SPK_R+ 58

R2912 36R3F-GPR2912 36R3F-GP

1 2
1 2

R2913 36R3F-GPR2913 36R3F-GP

R2916 100R2F-L1-GP-UR2916 100R2F-L1-GP-U

1 2
1 2

R2917 100R2F-L1-GP-UR2917 100R2F-L1-GP-U
R2927 100R2F-L1-GP-UR2927 100R2F-L1-GP-U

1 2
1 2

R2938 100R2F-L1-GP-UR2938 100R2F-L1-GP-U

12

R2932

R2932
5K1R2F-2-GP

5K1R2F-2-GP

R2937

R2937

1 2

39K2R2F-L-GP

39K2R2F-L-GP

L2901

L2901

1 2

SBK160808T-601Y-N-GP

SBK160808T-601Y-N-GP

L2902

L2902

1 2

SBK160808T-601Y-N-GP

SBK160808T-601Y-N-GP

Dock

Dock
Dock

Dock

RN2902 SRN33J-5-GP-U

RN2902 SRN33J-5-GP-U

2 3
1

4

Dock

Dock

DOCK_LINEIN_JD# 104

DOCK_LINEOUT_L 104
DOCK_LINEOUT_R 104

MB_HP_L 58
MB_HP_R 58

DOCK_MIC_IN_L 104
DOCK_MIC_IN_R 104

MB_MICIN_L 58
MB_MICIN_R 58

DOCK_LINEIN_L 104
DOCK_LINEIN_R 104

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

R2944

R2944

A A

5

1 2

0R0402-PAD

0R0402-PAD

UMA 3G

UMA 3G

UMA 3G

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Audio Codec

Audio Codec

Audio Codec

BAD40_HC

BAD40_HC

BAD40_HC

1

29 108

29 108

29 108

of

of

1

1

1

5

4

3

2

1

AUDIO OP AMPLIFIER

D D

C C

B B

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

A A

Title

Title

Title

Audio AMP

Audio AMP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
A4

A4

A4

Thursday, April 12, 2012

Thursday, April 12, 2012

Thursday, April 12, 2012

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Audio AMP

BAD40_HC

BAD40_HC

BAD40_HC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

1

30 108

30 108

30 108

1

1