Winbond Electronics W24L010AK-12, W24L010AK-10, W24L010AJ-15, W24L010AJ-12, W24L010AJ-10 Datasheet

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W24L010A
2
3
5
6
7
8
141516
V
OE
CS1
DD
A9
CS1
WE
OE
128K × 8 HIGH SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W24L010A is a high speed, low power CMOS static RAM organized as 131072 × 8 bits that operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high performance CMOS technology.
FEATURES
High speed access time:10/12/15 nS (max.)
Low power consumption:
− Active: 300 mW (typ.)
Single +3.3V power supply
Fully static operation
PIN CONFIGURATIIONS
32
1
NC
A16
2
A14
3
4
A12
A7
5
A6
6
A5
7
A4
8
A3
9
A2
10
A1
11
A0
12
I/O1
13
I/O2
14
I/O3
15
V
SS
16
A11
A8
A13
4 WE CS2
A15
NC
9
10
A16
11
A14
12
A12
13 A0
A7 A6 A5 A4
32-pin
TSOP
V
DD
31
A15
30
CS2
29
WE A13
28
A8
27
A9
26
A11
25
OE
24
A10
23
22
CS1
21
I/O8
20
I/O7
I/O6
19
I/O5
18
17
I/O4
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
A10
I/O8 I/O7 I/O6 I/O5 I/O4 V DQ3 DQ2 DQ1
A1 A2 A3
All inputs and outputs directly TTL/LVTTL
compatible
Three-state outputs
Available packages: 32-pin 300 mil SOJ, skinny DIP and TSOP
BLOCK DIAGRAM
V
DD
V
SS
A0
.
A16
DECODER
.
CORE
CORE
ARRAY
CS2 CS1
OE
CONTROL
WE
I/O1
I/O8
. .DATA I/O
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0−A16
I/O1−I/O8
, CS2
SS
VDD Power Supply VSS Ground
NC No Connection
Address Inputs Data Inputs/Outputs Chip Select Inputs
Write Enable Input Output Enable Input
Publication Release Date: September 1999
- 1 - Revision A2
W24L010A
CS1
OE WE
CS1
CS1
CS1
CS1
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to VSS Potential -0.5 to +4.6 V Input/Output to VSS Potential -0.5 to VDD +0.5 V Allowable Power Dissipation 1.0 W Storage Temperature -65 to +150 Operating Temperature 0 to +70
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
TRUTH TABLE
°
C
°
C
CS2
H X X X Not Selected High Z ISB, I X L X X Not Selected High Z ISB, I
MODE
I/O1−I/O8
VDD CURRENT
SB1 SB1
L H H H Output Disable High Z IDD L H L H Read Data Out IDD L H X L Write Data In IDD
OPERATING CHARACTERISTICS
(VDD = 3.3V ±5%, VSS = 0V, TA = 0 to 70° C)
PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT
Input Low Voltage VIL - -0.5 - +0.8 V Input High Voltage VIH - +2.0 - VDD +0.5 V Input Leakage Current ILI VIN = VSS to VDD -10 - +10 Output Leakage
Current
ILO
I/O
V
= VSS to VDD
= VIH or CS2 = VIL
-10
-
+10
or OE = VIH or WE = VIL Output Low Voltage VOL IOL = +8.0 mA - - 0.4 V Output High Voltage VOH IOH = -4.0 mA 2.4 - - V
10 - - 130 mA Operating Power 12 - - 120 mA 15 - - 100 mA
Supply Current
IDD
= VIL,
CS2 = VIH
I/O = 0 mA Cycle = MIN
Duty = 100% Standby Power ISB
Supply Current I
SB1
Note: Typical characteristics are at VDD = 3.3V, TA = 25° C.
= VIH, or CS2 = VIL ≥ VDD -0.2V or
CS2 ≤ 0.2V
- - 15 mA
- - 5 mA
µ
A
µ
A
- 2 -
W24L010A
CAPACITANCE
(VDD = 3.3V, TA = 25° C, f = 1 MHz)
PARAMETER SYM. CONDITIONS MAX. UNIT
Input Capacitance CIN VIN = 0V 8 pF Input/Output Capacitance C
Note: These parameters are sampled but not 100% tested.
I/O
V
AC TEST CONDITIONS
PARAMETER CONDITIONS
Input Pulse Levels 0V to 3V Input Rise and Fall Times 3 nS Input and Output Timing Reference Level 1.5V Output Load CL = 30 pF, IOH/IOL = -4 mA/8 mA
OUT
= 0V 10 pF
AC TEST LOADS AND WAVEFORM
R1 320 ohm
3.3V
OUTPUT
30 pF
Including Jig and Scope
R2
350 ohm
3.0V
0V
10%
3 nS
(For T
CLZ1,
90% 90%
10%
R1 320 ohm
3.3V
OUTPUT
T
T
CLZ2, OLZ, CHZ1, CHZ2, OHZ,
3 nS
T T
T
5 pF
Including Jig and Scope
T T
WHZ,
R2 350 ohm
)
OW
Publication Release Date: September 1999
- 3 - Revision A2
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