W24258
32K × 8 CMOS STATIC RAM
GENERAL DESCRIPTION
The W24258 is a normal speed, very low power CMOS static RAM organized as 32768 × 8 bits that
operates on a wide voltage range from 2.7V to 5.5V power supply. The W24258 family, W2425870LE and W24258-70LI, can meet requirement of various operating temperature. This device is
manufactured using Winbond's high performance CMOS technology.
FEATURES
• Low power consumption:
− Active: 350 mW (max.)
− Standby: 6 µW (max.)/3V
25 µW (max.)/5V
• Access time: 70 nS (max.)/5V
100 nS (max.)/3V
• Single 3V/5V power supply
• Fully static operation
• All inputs and outputs directly TTL compatible
• Three-state outputs
• Battery back-up operation capability
• Data retention voltage: 2V (min.)
• Packaged in 28-pin 600 mil DIP, 330 mil SOP
and standard type one TSOP (8 mm × 13.4
mm)
PIN CONFIGURATIONS
1
A14
A12
2
A7
3
A6
4
A5
5
A4
6
28-pin
7
DIP
8
9
10
11
12
13
14
1
2
3
4
5
6
28-pin
7
TSOP
8
9
1
0
1
1
1
A11
A13
WE
V
A14
A12
A3
A2
A1
A0
I/O1
I/O2
I/O3
V
SS
OE
A9
A8
DD
A7
A6
A5
A4
A3
BLOCK DIAGRAM
CLK GEN. PRECHARGE CKT.
A12
A14
28
V
DD
27
WE
A13
26
25
A8
24
A9
A11
23
OE
22
A10
21
20
CS
19
I/O8
18
I/O7
17
I/O6
I/O5
16
15
I/O4
A2
A3
A4
A5
A6
A7
A13
I/O1
I/O8
CS
OE
R
O
W
D
E
C
O
D
E
R
DATA
CNTRL.
CLK
GEN.
CORE CELL ARRAY
512 ROWS
64 X 8 COLUMNS
I/O CKT.
COLUMN DECODER
A10 A1 A0 A8 A9
A11
PIN DESCRIPTION
A10
28
CS
27
I/O8
26
I/O7
25
I/O6
24
I/O5
23
I/O4
22
V
SS
21
20
I/O3
I/O2
19
I/O1
18
A0
17
A1
16
A2
15
SYMBOL DESCRIPTION
A0−A14
I/O1−I/O8
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
VDD Power Supply
VSS Ground
Publication Release Date: November 1998
- 1 - Revision A8
TRUTH TABLE
W24258
MODE
H X X Not Selected High Z ISB, ISB1
L H H Output Disable High Z IDD
L L H Read Data Out IDD
L X L Write Data In IDD
I/O1−I/O8
VDD CURRENT
DC CHARACTERISTICS
Absolute Maximum Ratings
PARAMETER RATING UNIT
Supply Voltage to VSS Potential -0.5 to +7.0 V
Input/Output to VSS Potential -0.5 to VDD +0.5 V
Allowable Power Dissipation 1.0 W
Storage Temperature -65 to +150
Operating Temperature LE -20 to 85
LI -40 to 85
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
°C
°C
°C
Operating Characteristics
(VDD = 5V ±10%; VDD = 3V ±10%; VSS = 0V; TA (°C) = -20 to 85 for LE; -40 to 85 for LI)
PARAMETER SYM. TEST CONDITIONS
Input Low Voltage VIL - -0.5 +0.8 -0.5 +0.6 V
Input High Voltage VIH - +2.2 VDD +0.5 +2.0 VDD +0.5 V
Input Leakage
Current
Output Leakage
Current
Output Low Voltage VOL IOL = +2.1 mA - 0.4 - 0.4 V
Output High
Voltage
ILI VIN = VSS to VDD -1 +1 -1 +1
ILO VI/O = VSS to VDD,
= VIH (min.) or
= VIH (min.) or
= VIL (max.)
VOH IOH = -1.0 mA 2.4 - 2.2 - V
- 2 -
5V ±10% 3V ±10%
MIN. MAX. MIN. MAX.
-1 +1 -1 +1
UNIT
µA
µA
W24258
Operating Characteristics, continued
PARAMETER SYM. TEST CONDITIONS
Operating
Power Supply
IDD
= VIL (max.), I/O = 0 mA,
Cycle = min., Duty = 100%
Current
Standby
Power Supply
Current
Note: Typical parameter is measured under ambient temperature TA = 25° C and VDD = 5V / 3V.
ISB
= VIH (min.), Cycle =
min., Duty = 100%
ISB1
≥ VDD -0.2V
CAPACITANCE
(VDD = 5V, TA = 25° C, f = 1 MHz)
PARAMETER SYM. CONDITIONS MAX. UNIT
Input Capacitance CIN VIN = 0V 6 pF
Input/Output Capacitance CI/O VOUT = 0V 8 pF
Note: These parameters are sampled but not 100% tested.
5V ±10% 3V ±10%
MIN. TYP. MAX. MIN. TYP. MAX.
- - 70 - - 30 mA
- - 3 - - 1 mA
- 0.7 5 - 0.5 2
UNIT
µA
AC CHARACTERISTICS
AC Test Conditions
PARAMETER CONDITIONS
Input Pulse Levels
Input Rise and Fall Times 5 nS
Input and Output Timing Reference Level 1.5V
Output Load See the drawing below
AC Test Loads and Waveform
1 TTL
OUTPUT
100 pF
Including
Jig and
Scope
2.4V/3.0V
0V
5 nS
3V ±10%, 0V to 2.4V
5V ±10%, 0V to 3.0V
1 TTL
OUTPUT
5 pF
Including
Jig and
Scope
(For T T T T T T )
CLZ, OLZ, CHZ, OHZ, WHZ, OW
90%
10%
90%
10%
5 nS
Publication Release Date: November 1998
- 3 - Revision A8
W24258
AC Characteristics, continued
(VDD = 5V ±10%; VDD = 3V ±10%; VSS = 0V; TA (°C) = -20 to 85 for LE; -40 to 85 for LI)
Read Cycle
PARAMETER SYM. 5V 3V UNIT
MIN. MAX. MIN. MAX.
Read Cycle Time TRC 70 - 100 - nS
Address Access Time TAA - 70 - 100 nS
Chip Select Access Time TACS - 70 - 100 nS
Output Enable to Output Valid TAOE - 35 - 50 nS
Chip Selection to Output in Low Z TCLZ* 10 - 15 - nS
Output Enable to Output in Low Z TOLZ* 5 - 5 - nS
Chip Deselection to Output in High Z TCHZ* - 30 - 35 nS
Output Disable to Output in High Z TOHZ* - 30 - 35 nS
Output Hold from Address Change TOH 10 - 15 - nS
∗ These parameters are sampled but not 100% tested
Write Cycle
PARAMETER SYM. 5V 3V UNIT
MIN. MAX. MIN. MAX.
Write Cycle Time TWC 70 - 100 - nS
Chip Selection to End of Write TCW 50 - 70 - nS
Address Valid to End of Write TAW 50 - 70 - nS
Address Setup Time TAS 0 - 0 - nS
Write Pulse Width TWP 50 - 70 - nS
Write Recovery Time
Data Valid to End of Write TDW 30 - 50 - nS
Data Hold from End of Write TDH 0 - 0 - nS
Write to Output in High Z TWHZ* - 25 - 30 nS
Output Disable to Output in High Z TOHZ* - 25 - 30 nS
Output Active from End of Write TOW 5 - 10 - nS
∗ These parameters are sampled but not 100% tested
TWR 0 - 0 - nS
- 4 -