This specification provides a general guideline on the performance and the integration of W2CBW00DI,
a complete wireless subsystem featuring full 802.11 b/g WLAN capability as well as class 1.5 Bluetooth
capabilities in a small form factor module solution. The W2CBW00DI device was designed to simplify
the process of adding wireless capability without lengthy design cycles or complex RF design. Both
radios are fully tested for coexistence, both internally and with other external radio technologies. A
full menu of certifications will also be provided, simplifying the certification process for your entire
end product and further reducing valuable time-to-market. Based on world-class silicon from
Wi2Wi partner Marvell, the W2CBW00DI has also been fully optimized for throughput and receive
sensitivity through careful design practices. St ate-of-the a rt softwa re de vel opment resourc es are also
available to create drivers for uniq ue processors an d operating systems if needed, or to optimize the
wireless subsystem to fit your needed application with ease.
The specification maximum and minimu m limits prese nted herein are those guaranteed when the unit is
integrated into the Wi2Wi’s W2CBW00DI-DEV Developm ent Syst em. Th ese limits ar e to se rve as th e
Page 3 of 20
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
representative performance characteristics of the W2CBW00DI when properly designed into a
customer’s product. Wi2Wi makes no warranty, implied or otherwise specified, with respect to a
customers design and the performance characteristics presented in this specification.
W2CBW00DI device is available in dual antenna configuration.
This device also complies with Part 15 of the FCC Rules. Operation is subject to the following two
conditions: (1) this device may not cause harmful interference, and (2) this device must accept any
interference received, including interfere nce that may cause undesired operation.
Modifications or changes to this equipment not expressly approved by Wi2Wi may void the user’s
authority to operate this equipment.
2 Features
•
Compact design for easy integration:16 mm x 16mm x 2.3mm
•
LGA with 76 pins
•
WLAN technology based on Marvell’s 88W8688
•
Bluetooth technology based on Marvell’s 88W8688
•
Certified dual mode radio
•
Industrial Temperature support
•
Optimized RF and ele ctrica l design for bett er perf ormance i n co-exis tence wi th other wirel ess
standards
•
Dual-antenna design with separate antenna pins for Bluetooth and WLAN
•
Operates in 2.4 GHz ISM band
•
ROHS Compliant
•
Fully integrated coexistence solution
•
WLAN Specific Features
SDIO 1.1 and G-SPI interfaces
o 802.11s Mesh Networking
o 802.11h Dynamic Frequency Selection
o 802.11e Quality of Service
o 50-Ohm antenna launch
o Support for WinCE, Windows XP SP3, Vista 32 bit, and Linux 2.6.xx(can be ported to
other operati ng systems)
o 1, 2, 5.5 and 11 Mbps data rates for 802.11b (DSSS/CCK modulation)
o 6, 9, 12, 18, 24, 36, 48 and 54 Mbps data rates for 802.1 1g (OFDM modulation)
• Bluetooth Specific Features
o
UART interface
o
50-Ohm antenna launch
o
Support for WinCE, Windows XP SP3, Vista 32 bit and Linux 2.6.xx (can be ported to
other operating systems)
o
GFSK modulation for Bluetooth version 2.1
o
Data rate up to 1Mbps for Bluetooth version 2.1
o
Data rate up to 3 Mbps for Bluetooth EDR
o
Support for Class 1.5 Bluetooth
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
W2CBW00DI is a complete module combination of 88W8688 802.1b/g and Bluetooth. It includes
all
the components needed to operate both the radios. It pres erv es the ch aracteristics from Marvell chipset
while providing the optimized system level functionality and performance.
3.1 Block Diagram
Figure #1 shows the detailed block diagram of W2CBW00DI
Figure 1: Block Diagram
.
3.2 Pin Description
Table 1: Pin Description
Pin
1
2
3
4
5
6
7
8
Page 5 of 20
Pin Name
HSPWR1
HSPWR2
HSPWR3
GND4
GND5
ANT_SEL_N
TR_N
TR3_N
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
For connection to a host processor, the W2CBW00DI supports the Secure Digital Input Output
(SDIO) and Generic SPI (G-SPI) interfaces for WLAN. The choice of interface is dependent on the
required data throughput, with SDIO having a throughput that is approximately four times greater than
G-SPI.
If the WLAN SDIO interface is selected for connection to a host processor, then the host processor must
support SDIO – (SD is not sufficient). If the selected processor does not have an integrated SDIO
controller, then an external SDIO bridge can be used (e.g. SDIO-PCI Bridge for interfacing with a
process supporting PCI interface only).
If the WLAN G-SPI interface is selected for connection to a host processor, then the host processor
must support G-SPI – (SPI is not sufficient). If the selecte d processor only has SPI, then it might be
possible to implement G-SPI with a combination of the SPI and a GPIO pin for interrupt. If the
selected processor does not have SPI interface, then it might be possible to implement a G-SPI
interface using a combination of GPIO pins. Please contact your sales representative if your
processor does not support SDIO or G-SPI interfaces.
5.1 SDIO Interface
W2CBW00DI supports SDIO device interface that conforms to the industry standard SDIO FullSpeed card specification and allows a host controller using the SDIO bus protocol to access the
WLAN device. The SDIO interface contains interface circuitry between an external SDIO bus and
the internal shared bus.
W2CBW00DI acts as a device on the SDIO bus. The host unit can access registers of the SDIO
interface directly and can access shared memory in the device through the use of BARs and a DMA
engine.
The SDIO device interface main features include:
•
On-chip memory used for CIS
•
Supports SPI, 1-bit SDIO, and 4-bit SDIO transfer modes at the full clock range of 0 to 50
MHz
•
Special interrupt register for information exchange
Page 10 of 20
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
The SDIO-SPI CS Signal timing is identical to all other SDIO inputs
Table 4: SDIO Timing Data
Symbol Parameter ConditionMin Typ Max Units
fpp Clock Frequency
T
WL
T
WH
T
ISU
T
IH
T
ODLY
TOH Out p u t H old Time High speed2.5 -- -- Ns
Clock Low Time
Clock High Time
Input Setup Time
Input Hold Time
Output Delay Time -- 0 -- 14 Ns
Normal 0 -- 25 MHz
High speed0 -- 50 MHz
Normal 10 -- -- Ns
High speed7 -- -- Ns
Normal 10 -- -- Ns
High speed7 -- -- Ns
Normal 5 -- -- Ns
High speed6 -- --
Normal 5 -- -- Ns
High speed2 -- --
Wi2Wi, Inc. Rev.1.0
Dated: February 19, 2010
Note
:
Over full range of values specified in the Recommended Operating Cond itions unless otherwise spe cified
5.3 G-SPI Interface
W2CBW00DI supports a generic, half-duplex, DMA-assisted G-SPI host interface (G-SPI) that
allows a host controller using a Generic SPI bus protocol to access the WLAN de vice. The G-SPI
interface contains interface circuitry between an external G-SPI bus and the internal shared bus.
The 88W8688 acts as the device on the G-SPI bus. The host unit can access the G-SPI registers
directly and can access shared memory in the device through the use of BARs and a DMA engine.
The G-SPI unit supports Generic SPI Interface protocols as detailed in the following sections. The
design is capable of 50 MHz operation. The interface supports the following functionality:
Page 12 of 20
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
G-SPI unit bus device operation
G-SPI unit register read / write
Interrupt generation to internal CPU
Interrupt generation to the SPI unit host
DMA to internal memories
Wake Interrupt to the Power Management Unit
Table 5: GSPI Pin Map
W2CBW00DI Pin NameGe ne ri c SPI Bu s N ame Type Description
SPI_CLK SCLK Input SPI Unit Clock Input
SPI_SCSn CSn Input SPI U n i t A c t i v e L ow C h i p S el e c t I n p u t
SPI_SDI DI Input SPI Unit Data In p u t
SPI_SDO DO Output SPI Unit Data Output
SPI_SINTn INTn Output SPI Unit Active Low Interrupt Output
SPI_CLK_REQ CLK_EN Output S P I U n i t C l o c k E n a b l e O u t p u t
RESETn RSTn Input Reset Input
Wi2Wi, Inc. Rev.1.0
Dated: February 19, 2010
6 Bluetooth External Interfaces
For connection to a host processor, the W2CBW00DI supports UART interface. There is also a PCM
interface for connection to audio PCM devices such analog to digital and digital to analog
converters. The PCM selec tio n i s m ade in f ir mw ar e.
6.1 UART Interface
W2CBW00DI UART interface provides a simple mechanism for communicating with other serial
device s using the RS232 standard. Four signals are us ed to implemen t the UART func tion:
•
BT_UART_TX
•
BT_UART_RX
•
BT_UART_RTS
•
BT_UART_CTS
•
BT_UART_DSR
•
BT UART DTR
When W2CBW00DI is connected to another digital device, BT_UART_RX and BT_UART_TX
transfer data between the two devices. The remaining two signals, BT_UART_CTS and
BT_UART_RTS, can be used to implement RS232 hardware flow control where both are active low
indicators.
To communicate with the UART at its maximum data rate using a standard PC, an accelerated
serial port adapter card is required for the PC. An external RS232 transceiver ch ip is also needed.
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
Flow Control RTS/CTS or None
Parity None, Odd or Even
Number of Stop Bits 1 or 2
Bits per Channel 8
Minimum
Maximum 4MBaud (≤1% Error)
1200 Baud (≤2% Error)
9600 Baud (≤1 % Error)
The UART interface is capable of resetting W2CBW00DI upon reception of a break signal.
6.2 PCM Interface
Pulse Code Modulation (PCM) is a standard method used to digitize audio (particularly voice)
patterns for transmission over digital communication channels. Through its PCM interface,
W2CBW00DI has hardware suppor t for co ntinu al transmission and reception of PCM data, so
reducing processor overhead for wireless headset applications. W2CBW00DI offers a bi-directional
digital audio interface that routes directly into t h e baseband layer of the on-chip firmware. It does not
pass t hr oug h t he H CI p rot oco l l aye r. Hardware on W2CBW00DI allows the data to be sent to and
received from a SCO connection.
Up to three SCO connections can be supported by the PCM interface at any one time.
W2CBW00DI can operate as the PCM interface Master generating an output clock of 128, 256 or
512kHz. When configured as PCM interface slave it can operate with an input clock up to 2048kHz.
W2CBW00DI is compatible with a variety of clock formats, including Long Frame Sync, Short
Frame Sync and GCI timing environments.
It supports 13 or 16-bit linear, 8-bit
μ
-law or A-law compounded sample formats at 8k samples/s, and
can receive and transmit on any selection of three of the first four slots following PCM_SYNC.
7 Antenna and Clock
W2CBW00DI has two antenna interfaces, one for Bluetooth and one for WLAN. Both of these
interfaces have 50 Ohm impedance.
W2CBW00DI has an internal crystal oscillator with 38.4 MHz frequency (frequency stability +/20ppm) and requires no external clock source. This crystal provides clock for both WLAN and
Bluetooth.
Page 14 of 20
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
Wi2Wi can provide the end user driver needed for operating WLAN part of W2CBW00DI, if
available, otherwise a 3
rd
part developer can create for a fixed NRE. This driver is specific to the
operating system, processor and host bus – it cannot be used for any other processors, operating
systems or host buses. Since the operating system and platform matrix is quite large, it is not possible
to have all the combinations off the shelf. Please contact your sales represen tative on the actual driver
availability.
The following is a brief description of the driv er features along with the processors, operating
systems and host buses.
Bluetooth portion of W2CBW00DI needs stack and profiles for operation. It uses a st andard HCI
interface – any commercial stack or profile supporting the st andard interface will work with
W2CBW00DI.
WinCE, WinMobile and Vista 32 bit have embedded stack and basic profiles that work with
W2CBW00DI. Advanced profiles for these operating systems can be procured from commercial vendors
like IV T, iAnywhere and Toshiba.
Wi2Wi will work with the customers to provide a suitable solution for the stack and profiles. There
may be some additional cost associated with this based on the requirements. Please contact your
sales representative to get more details.
The following are the key features of a typical HCI stack:
•
Bluetooth v2.1 + EDR mandatory functionality
o
EDR, 3Mbps payload data rate
o
Support 2-DH1, 2-DH3, 2-DH5, 3-DH1, 3-DH3 and 3-DH5 packet types
o
Support 2-EV3, 2-EV5, 3-EV3 and 3-EV5 packet types
•
Bluetooth v1 .2 mandatory functionality:
o
Adaptive Frequency Hopping (AFH), including classifier
A simplified view of the overall WLAN so ftware architecture is illustrated in the figure below. It is
partitioned between the host processor and the WLAN firmware that resides on the Wi2Wi WiFi
module.
Figure 3: Software Architecture
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
The TCP/IP stack, Ethernet Driver and the 802.11 extensions reside on the host processor. The
Hardware Interface Driver, which can be G-SPI or SDIO, is partitioned between the host and the
firmware on the WiFi.
The WLAN firmware for the WiFi is downloaded through the selected host interface (G-SPI or
SDIO) by the Hardware Interface Driver at power up.
Once the firm ware is dow nlo aded, the Dat a Pa th and th e Con trol Path bet ween th e host and W iFi are
established, and information can flow between the two devices.
10 Manufacturing Notes
10.1 Physical Dimensions and Pin Locations
•
Physical Size: 16mm x 16mm x 2.3mm
•
Pad Size: 0.25mm X 0.63mm
•
Pad Spacing: 0.66 mm
•
Pins: 76 (4 x 19) +4 Corner ground Pads for shield
Figure 4: Physical Dimensions and Pin Locations for a Dual Antenna Device
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
W2CBW00DI is an MSL3 grade part. After opening the bag, the parts should be:
Stored as per J-STD-003 standard
a.
b.
Mounted within 72 hours of factory conditions (<=30C, 60% RH)
If any of the above conditions is not met, the parts should be baked as listed below prior to assembly:
S90C for 4 hours
a.
b.
M125C for 12 hours
10.3 Recommended Reflow Profile
Figure 5: Reflow Profile
TBD
11 Disclaimers
Wi2Wi, Inc. PRODUCTS ARE NOT AUTHORISED FOR USE AS CRITICAL COMPONENTS IN
LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF
THE MANAGING DIRECTOR OF Wi2Wi, Inc.
The definitions used herein are:
a) Life support devices or systems are devices which (1) are intended for surgical implan t into the body,
or (2) support or sustain life and whose failure to perform when properly used in accordance with the
instructions for use provided in the labeling can reasonably be expected to result in a significant injury
to the user. b) A critical component is any component of a life support device or system whose failure to
perform can be reasonably expected to cause the failure of the life support device or system, or to affect
its safety or effectiveness.
Wi2Wi does not assume responsibility for use of any of the circuitry described, no circuit patent licenses
are implied and Wi2Wi reserves the right at any time to change without notice said circuitry and
specifications.
11.1 Data Sheet Status
Wi2Wi, Inc. reserves the right to change the specification without prior notice in order to improve the
design and supply the best possible product. Updated information, firmware and release notes will
be made available on www.wi2wi.com. Please check with Wi2Wi Inc. for the m ost recent data
before initiating or completing a design.
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.
W2CBW00DI shall conform to the following standards when integrated to the W2CBW00DI-DEV
development system (these certificati ons ha ve not b een com ple ted yet as t he pa rt w ill g o int o pr oduc tio n.
13 References
13.1 Specifications
•
•
•
•
IEEE 802.11 b/g wireless LAN Specification
Specification of the Bluetooth System, v2.1+EDR,
SDIO full-speed card specification
Universal Serial Bus Specification, v2.0, 27 April 2000
13.2 Trademarks, Patents and Licenses
• Trademarks: Bluetooth, Wi-Fi
• L
icenses: 88W8688 Software from Marvell;
13.3 Other
• W2CBW00DI-DEV: Development Kit, WLAN – Bluetooth Module
The content of this document is to be treated as strictly confidential and is not to be disclosed,
Reproduced or used, except as authorized in writing by Wi2Wi, Inc.