Wavetek 1395, 1395 Mate Operation And Maintenance Manual

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SM

View

Instra

OPLKATION

AND

MAIN

I

ENANCL

MANUAL

Model

l395/1395

Mate

50

MHz

VXIbus Arbitrary

Waveform

Synthesizer

O

1996 Wavetek

Ltd

This document contains information proprietary
to Wavetek and is provided solely

for

instrument

operation and maintenance. The information in

this document may not be duplicated in any

manner without the prior approval in writing
from Wavetek.

Wavetek

Ltd.

Hurricane

W'q,

Norwich Airp~)rt Industrial

Estatc

Nurwch
Nl~rfolk Nllh hJ13

I1K

Manual Revision

C,

6195

Manual Part Number 1006-00-0699

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WARRANTY

Wavetek warrants that all products manufactured by Wavetek conform to published Wavetek
specifications and are free from defects in materials and workmanship for a period of one

(1)

year from the date of delivery when used under normal conditions and within the service condi­tions for which they were furnished.

The obligation of Wavetek arising from a Warranty claim shall be limited to repairing, or at its
option, replacing without charge, any product which in Wavetek's sole opinion proves to be
defective within the scope of the Warranty. In the event Wavetek is not able to modify, repair or
replace non-conforming defective parts or components to a condition as warrantied within a
reasonable time after receipt thereof, Buyers shall be credited for their value at the original
purchase price.

Wavetek must be notified in writing of the defect or nonconformity within the Warranty period
and the affected product returned to Wavetek's factory or to an authorized service center within

(30)

days after discovery of such defect or nonconformity.

For product warranties requiring return to Wavetek, products must be returned to a service
facility designated by Wavetek. Buyer shall prepay shipping charges, taxes, duties and insurance
for products returned to Wavetek for warranty service. Except for products returned to Buyer

from another country, Wavetek shall pay for return of products to Buyer.

Wavetek shall have no responsibility hereunder for any defect or damage caused by improper
storage, improper installation, unauthorized modification, misuse, neglect, inadequate mainte­nance, accident or for any product which has been repaired or altered by anyone other than
Wavetek or its authorized representative and not in accordance with instructions furnished by
Wavetek.

Exclusion of Other Warranties

The Warranty described above is Buyer's sole and exclusive remedy and no other warranty,
whether written or oral, is expressed or implied. Wavetek specifically disclaims the implied
warranties of merchantability and fitness for a particular purpose. No statement, representation,

agreement, or understanding, oral or written, made by an agent, distributor, representative, or
employee of Wavetek, which is not contained in the foregoing Warranty will be binding upon
Wavetek, unless made in writing and executed by an authorized Wavetek employee. Under no

circumstances shall Wavetek be liable for any direct, indirect, special, incidental, or consequen-

tial damages, expenses, losses or delays (including loss of profits) based on contract, tort, or any

other legal theory.

This product complies with the requirements of the following European Community Directives:

Cf

89/33B/EEC

(Electromagnaic

Compatiblllty)

and

731231EEC

(Low

Voltage)

as amended

by

93/68/EEC (CE

Marking).

However, noisy or intense electromagnetic fields in the vicinity of the equipment can disturb the measurement
circuit.

Users should exercise caution and use appropriate connection and cabling configurations to avoid

misleading results when making precision measurements in the presence of electromagnetic interference.

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SAFETY

FIRST

PROTECT YOURSELF.

Follow these precautions:

Don't touch the outputs of the instrument or any exposed test wiring
carrying the output signals. This instrument can generate hazardous voltages and
currents.

.

Don't bypass the

VXI

chassis' power cord's ground lead with two-wire

extension cords or plug adaptors.

.

Don't disconnect the green and yellow safety-earth-ground wire that

connects the ground lug of the

VXI

chassis power receptacle to the chassis

ground terminal (marked with

@

or

a

).

Don't hold your eyes extremely close to an rf output for a long time. The

normally nonhazardous low-power rf energy generated by the instrument could

possibly cause eye

injury.

Don't energize the

VXI

chassis until directed to by the installation

instructions.

.

Don't repair the instrument unless you are a qualified electronics techni-

cian and know how to work with hazardous voltages.

.

Pay attention to the

WARNING

statements. They point out situations

that can cause injury or death.

.

Pay attention to the

CAUTION

statements. They point out situations that

can cause equipment damage.

CONTENTS

iii

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CONTENTS

SECTION 1 GENERAL

1.1 THE MODEL 1395

...................................................................................

1-1

1.2 SPECIFICATIONS

....................................................................................

1-1

.......................................................................

1.2.1 Waveforms (Functions) 1-1

..................................................

1.2.2 ARB Waveform Creation and Editing 1-1

.............................................................................

.

1 2.3 Operational Modes 1-2

..........................................................

1.2.4 Input and Output Specifications 1-2

...............................................................................................

1.2.4.1 Outputs 1-2

1.2.4.2 Inputs

..................................................................................................

1-4

1.2.5 Waveform Characteristics

...................................................................

1-5

1.2.6 Frequency

...........................................................................................

1-6

.......................................................

1 .2. 6.1 Arb Clock and Waveform Timing: 1-6

...........................................................................................

1.2.7 Amplitude 1-6

1.2.8 Offset

..................................................................................................

1-6

1.2.9 Filtering

..............................................................................................

1-6

1.2.1

0

Linked SEQuence Operation

..............................................................

1-7

1.2.11 Sweep

.................................................................................................

1-7

1.2.1 2 Triggering

......................................................................................

1-7

1.2.1 3 Modulation

........................................................................................

1-8

1.2.1 4 Intermodule Operation

........................................................................

1-8

1.2.15 Frequency List

....................................................................................

1-9

1.2.1 6 Option

...............................................................................................

1-9

...........................................................................

1.2.1 7 AutoCal/Diagnostics 1-9
1

.

3 GENERAL

.................................................................................................

1-9

.............................................................................

1.3.1 SCPl Programming 1-9

1.3.2 VXI Interface

......................................................................................

1-10

1.3.3 Environmental-

....................................................................................

1-11

1.3.4 Size

.....................................................................................................

1-11

1.3.5 Power

.................................................................................................

1-11

1.3.6 Reliability

............................................................................................

1-11

..........................................................................

1.3.7 Cooling Requirement 1-11

1.3.8 Safety

.................................................................................................

1-11

1.3.9 EMC

....................................................................................................

1-11

SECTION

2

PREPARATION

2.1 RECEIVING INSPECTION

.......................................................................

2-1

2.1.1 Unpacking Instructions

.......................................................................

2-1

2.1.2 Returning Equipment

..........................................................................

2-1

2.2 PREPARATION FOR STORAGE OR SHIPMENT

....................................

2-1

2.2.1 Packaging

...........................................................................................

2-1

2.2.2 Storage

...............................................................................................

2-1

2.3 PREPARATION FOR USE

.......................................................................

2-1

..................................................................

2.3.1 Logical Address Selection 2-2

.............................................................

2.3.2 Data Transfer Bus Arbitration 2-2

2.4 INSTALLATION

.........................................................................................

2-4

......................

2.5 INITIAL CHECKOUT AND OPERATION VERIFICATION

2-4

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CONTENTS (Continued)

SECTION 3 OPERATION

.......................................................................................

3.1 INTRODUCTION 3-1

.................................................

3.2 CONNECTORS AND LED INDICATORS 3-1

................................................................

3.3 MODEL 1395 PROGRAMMING 3-1

........................................................................

SCPl Command Table 3-1
Long and Short Form Keywords

.........................................................

3-4

Command Message Format

...............................................................

3-4

Program Message Unit

.......................................................................

3-4

Program Message

..............................................................................

3-4

Program Message Delimiters

.............................................................

3-4

Parameter Forms

................................................................................

3-4

..........................................................

Program Message Terminators 3-8

...............................................................................................

Queries 3-8
Model 1395 SCPl Commands

...........................................................

3-9

CALibration Subsystem

..................................................................

3-9

............................................................................

INlTiate Subsystem 3-11

............................................................................

OUTPut Subsystem 3-11

...............................................................................

RESet Subsystem 3-13
SOURce Subsystem

..........................................................................

3-13

............................................................................

STATUS Subsystem 3-18
SYSTem Subsystem

.....................................................................

3-19

TEST Subsystem

...........................................................................

3-19

Trace Subsystem

................................................................................

3-20

TRlGger Subsystem

.........................................................................

3-22

High Speed Binary Waveform Transfer

.............................................

3-22

IEEE-488.2 Common Commands

.......................................................

3-25

3.4 MODEL 1395 OPERATION

.....................................................................

3-25

...........................................................................

Output Terminations 3-25

.......................................................................

Input/Output Protection 3-26

...................................................................

Power OnIReset Defaults 3-26

...................................................................

Standard Functions (CW) 3-29

..................................

Trace Operations and USER Function (RAST)

3-29

Trace Definition

.................................................................................

3-29

Trace Data

..........................................................................................

3-31

.........................................

Trace Copy. Resize. Rename. and Delete

3-32

Trace Limits

......................................................................................

3-32

Trace Queries

...................................................................................

3-33

Waveform Download Operations

........................................................

3-34

.............................................

Definite Length Arbitrary Block Transfer 3-34

.............................................................

WaveForm DSPTM Download 3-35

....................................................................

Shared Memory Transfer 3-37

Non-continuous Modes

.......................................................................

3-38

Triggered Operation

..........................................................................

3-39

.................................................................................

Gated Operation 3-42

...........................................................................

Sequence Operation 3-42

...................................................................

CONTinuous Sequencing 3-42
TRlGgered Mode Sequencing

............................................................

3-45

AMISCM Operation

...........................................................................

3-45

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CONTENTS (Continued)

SyncIPosition Markers

........................................................................

3-46

Frequency Sweep

...............................................................................

3-47

Sweep Generator

...............................................................................

3-48

Frequency List

....................................................................................

3-49

SUMBUS Operation

............................................................................

3-49

Clock InpuWOutput Operation

.............................................................

3-51

Intermodule Operations

.....................................................................

3-54

lntermodule Triggering

.......................................................................

3-54

Intermodule Phase Lock

.....................................................................

3-58

SECTION

4

CALIBRATION

...................................................................................

4.1 FACTORY REPAIR 4-1

..........................................................................................

4.2 CALIBRATION 4-1

4.3 REQUIRED TEST EQUIPMENT

...............................................................

4-1

....................................

4.4 PERFORMANCE VERIFICATION PROCEDURE 4-1
Standard Test Equipment

...................................................................

4-2

Standard Test Conditions

..................................................................

4-2

Test Specifications

..............................................................................

4-2

.................................................................................

VXlbus Interface 4-2
Self Test

.............................................................................................

4-2

Function Output OnIOff

......................................................................

4-2

Trigger Count

.....................................................................................

4-2

....................................................................................

Trigger Source 4-3

....................................................................

Sine Amplitude Accuracy 4-3

...............................................................

Square Amplitude Accuracy 4-4

...........................................................................

Attenuator Accuracy 4-4

DC Offset Accuracy

............................................................................

4-4

..........................................................................

Frequency Response 4-5

...................................................................

Square Waveform Quality 4-5

.....................................................................

Squarewave Duty Cycle 4-5
Sync Marker Output

...........................................................................

4-6

Position Marker Output

.......................................................................

4-6

Clock Output

.......................................................................................

4-6

Clock Input

..........................................................................................

4-6

Frequency Sweep

..............................................................................

4-6

.....................................................................

4.5 ALIGNMENT PROCEDURE 4-7

...................................................................................

4.5.1 Self Calibration 4-7

...............................................................

4.5.2 Semi-Automated Procedure 4-7

.........................................................................................

4.5.3 Preparation 4-7

4.5.4 Connector Termination

.......................................................................

4-8

4.5.5 Alignment Procedure

..........................................................................

4-8

4.5.5.1 Square Wave Symmetry

...................................................................

4-8

4.5.5.2 Square Wave Quality

..........................................................................

4-8

.........................................................................

4.5.5.3 SUMBUS Driver Zero 4-9

...................................................................................

4.5.5.4 Self Calibration 4-9

............................................................................................

4.5.5.5 SCM Null 4-9

4.5.5.6

Elliptic Filter Amplitude Flatness Correction

.......................................

4-10

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CONTENTS (Continued)

SECTION

5

PARTS AND SCHEMATICS

5.1 DRAWINGS

..............................................................................................

5-1

5.2 ERRATA

...................................................................................................

5-1

5.3 ORDERING PARTS

..................................................................................

5-1

APPENDIX

A

SELF CALIBRATION

A.l INTRODUCTION

.......................................................................................

A-1

A.2 CALIBRATION QUERY RESPONSE

...................................................

A-1

APPENDIX

B

SELF TEST

.......................................................................................

B.l INTRODUCTION B-1
B.2 TEST QUERY RESPONSE

....................................................................

B-1

APPENDIX C SCPI CONFORMANCE INFORMATION

C.l INTRODUCTION ....................................................................................... C-1

C.2 REFERENCE INFORMATION

..................................................................

C-1

C.3 SCPl CONFORMANCE INFORMATION

...............................................

C-2

(2.3.1 Model 1395 SCPl version

...................................................................

C-2

C.4 MODEL 1395 SCPl COMMAND SYNTAX

..............................................

C-2

C.4.1 SCPl Confirmed Commands

............................................................

C-2

C.4.2 SCPl Approved Commands

.........................................................

C-2

C.4.3 Commands not part of the SCPI Specification

....................................

C-2

C.4.4 Incomplete Command lnplementation

................................................

C-2

APPENDIX D SCPl COMMAND TREE

D.l COMMAND TREES

.................................................................................

D-1

APPENDIX E SAMPLE PROGRAMS

E.l INTRODUCTION

.......................................................................................

E-1

E.l.l Example 1

....................................................................................... E-1

E.1.2 Example 2

......................................................................................

E-2

E.1.3 Example

3

...........................................................................................

E-3

E.1.4 Example 4

........................................................................................... E-4

E.1.5 Example 5

...........................................................................................

E-5

APPENDIX F MATE INTERFACE SYNTAX

.......................................................................................

F.l INTRODUCTION F-1
F.2 GAL COMMAND

....................................................................................... F-1

..................................................

F.3 ARB GENERATOR DOCUMENTATION F-1

................................................

F.4

ARB GENERATOR ERROR MESSAGES F-2

.........................................

F.5 MlSC ARB GENERATOR DOCUMENTATION F-4

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Table 2-1

Table 3-1
Table 3-2
Table 3-4
Table

3-5

Table 3-6

Table

4-1

Table C-2

Test Equipment and Tools

.....................................................

2-4

Model

1395

Front Panel

.........................................................

3-3

Model 1395 Command Summary

..........................................

3-5

.......................................................................

Error Messages

3-24

IEEE

488.2 Common Commands

........................................

3-25

................................................

Input and Output Impedances 3-26

List of Test Equipment

...........................................................

4-1

Model 1395 Command Summary

........................................

C-3

viii

CONTENTS

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ILLUSTRATIONS

Figure 1-1

Figure 2-1
Figure 2-2

Figure 3-1
Figure 3-3
Figure 3-4
Figure

3-5

Figure 3-6
Figure 3-7

Figure 3-8
Figure 3-3
Figure

3-10

Figure 3-1 1

Figure 3-1

2

Figure 3-1 3
Figure 3-14

Figure

D-1
Figure D-2
Figure D-3

Figure D-4

Figure D-5

Figure D-6
Figure D-7
Figure D-8

Figure

F-1
Figure F-2
Figure F-3
Figure F-4
Figure F-5

Model 1395 50 MHz Arbitrary Waveform Synthesizer

......,....

1-0

.........................................................

Set the Logical Address

2-2

Bus Arbitration Level Jumpers

...............................................

2-3

.........................................................

Model 1395 Front Panel 3-2

.................................................................

Output Termination 3-26

.......................................

Model 1395 Basic Operating Setup

3-27

...................................

Continuous Waveform Characteristics 3-28
Definite Length Arbitrary Block Data Format

..........................

3-33

VXlbus System Using "External Host" GPlB Controller

.........

3-36

Triggered Waveform Characteristics. Count

=

1

....................

3-38

GateIBurst Waveform Characteristics

....................................

3-40

CONTinuous Sequence State Diagram

.................................

3-41

TRlGgered Sequence State Diagram

....................................

3-44

Sweep Mode Characteristics

................................................

3-47

Intermodule Triggering Backplane Connections

....................

3-51

Intermodule Triggering Command References

......................

3-52

Subsystems (Root Node)

.......................................................

D-1

INITiate. STATUS. TEST. and RESet Subsystems

.................

D-2

SOURce Subsystem

............................................................

D-3

TRACe Subsystem

...........................................................

D-4

TRlGger Subsystem

..............................................................

D-5

OUTPut System

......................................................................

D-6

SYSTem Subsystem

..............................................................

D-7

CALibrator Subsystem

..........................................................

D-8

..................................................

Common Command Format F-4

......................................................

Sine and Triangle Format F-5

.....................................................

Square and Ramp Format F-6

............................................

User Defined Waveform Format F-7
DC Function Format

...............................................................

F-8

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-

50

MHz

Arbitrar)

Waveform Synthesiz

model

1395

RUN

0

FAIL

@

CLK

INIOUT

TRIG IN

MAIN OUT

model

1395

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Specificalions

Section

1

1.1

THE

MODEL

1395

The MODEL 1395 is a high performance Synthe­sized Arbitrary Waveform Generator (ARB) with
the following main features:

Up to 50 MHz Sampling Frequency

12 Bit Vertical Resolution
32K points (128K optional) Horizontal Reso-

lution
Intermodule Triggering, Summing and

Phase Control
Waveform Linking and Looping
64K bytes Shared Memory for fast data

transfer
SCPI Compatible Command Language
Single Slot, C-Size VXIbus Module

The waveform synthesizer can be programmed to
produce standard waveforms in the frequency
range of 1

pHz to 25 MHz; or arbitrary waveforms
from 5 points minimum to 32K (128K) maximum
sampled at frequencies from 125 mHz to 50 MHz.
Additionally, a Clock Output is provided from 125
mHz to 100 MHz.

Waveforms can be created by selection of the stan­dard waveforms, drawing waveforms by defining
straight line segments, or downloading of binary
images. The A24 Shared Memory may be used for
significantly faster downloads than by using the
word-serial protocol.

The main waveform output provides up to 15 Vp­p into 50R (30 Vp-p, open circuit). Waveform dc
offset or dc output

is

also provided up to k7.5 V

into 50R (k15 V into open circuit).
The control language adheres to the SCPI (Stan-

dard Commands for Programmable Instruments)

format Version 1992.0, February 1992 (refer to the
SCPI manual for further information). SCPI is an
industry standard language for remote instrument
programming. The Wavetek Model 1395 wave-

form synthesizer is a single-slot "C" size VXIbus
module. Using any manufacturer's VXIbus chas­sis, the Model 1395 can be controlled using the
SCPI language and the appropriate controller.

Multiple

ARBS may be linked and operated togeth­er inside one VXIbus chassis. Series operation is
provided by full support of the VXIbus SUMBUS
protocol. A signal programmed at the output may
be sent to the SUMBUS, or signal present at the
SUMBUS may be summed into the model 1395 out-

put. In parallel operation, model 1395's may be
slaved to a master clock/trigger bus on the VXIbus
backplane to create a multichannel waveform syn­thesizer with phase control between channels.

The model 1395 has extensive self-adjustment util­ities built in. Calibration constants are maintained
in non-volatile memory (contains no battery).

1.2

SPECIFICATIONS

1.2.1

Waveforms

(Functions)

Programmable standard functions include sine, tri­angle, square, positive ramp, negative ramp, posi­tive haversine, negative haversine, random
(noise), sinc (sin x/x) and dc. (The function

"WTST"

is a reserved function name used for fac-

tory maintenance, and it should not be selected as

a

function or used to name an arbitrary wave­form.) One to fifty arbitrary waveforms (traces)
may be stored by name in volatile 32,768 point

(optionally 131,072 point) RAM memory. Each

trace has 12 bits vertical resolution, and from

5

points to the maximum number of points in the
waveform memory horizontal resolution.

1.2.2

ARB

Waveform Craatlon

and

Edltlng

The Arb has a variety of ways to create a wave-

form. Binary data may be down-loaded from a
computer. Internal "standard waveform" algo­rithms will create exactly one cycle of the wave­form requiring nothing more than a name and a
space set aside for it (random, sinc and dc,

obvi-

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ously, are not cyclical). Previously created wave­shapes residing in memory may be copied to a
new trace. Waveforms can be built using line seg­ments.

The Model

1395

Arb has several editing features.
After filling memory with data defining the wave­form, the user may select only a portion to be
"played back" using the

TRACe : LIMi

t

com­mand. The selected portion may be used for cre­ating a new waveshape using the

TRAC

e

:

DATA

command. A trace may also be overwritten with
new data with the

TRACe : DATA

command. Any
waveform may be stretched or shrunk by copying
it into a different size memory space; waveform
points are automatically added or removed to re­tain the integrity of the shape using the

TRACe : DATA

command.

By

copying waveshape
segments end to end, new waveshapes can be cre­ated with the

TRACe : DATA

command. A wave-

form may be resized using the

TRACe : POINt

s

command. A line segment of any size between

5

points and the maximum memory size can be cre­ated using the

TRACe : LINE

command. Any

waveform in the directory can be selected for

"play back" with the

FUNCt

i

on

:

USER

<trace-name> and

FUNC

t

i

on

:

SHAPe USER

commands. Individual waveshapes may be delet­ed by name or the entire memory can be erased

using the

TRAC

e

:

DELe

t

e

command.

1.2.8

Oparatlonal

Modes

CONTinuous:

The selected trace is output continuously at the
selected frequency, amplitude and offset. The
sync marker is output once per waveform (select­able as a pulse at the start of the waveform or as a
zero-crossing output of the waveform) and the

position marker is output at any selected points of
the waveform. Frequency is determined by the

TRACe : MODE (CW

or

RAST~~),

programmed

FREQuency

value

(CW

waveform frequency or

RASTer

sample clock frequency), and

ROSC

i

1

-

lator

:

SOURce (IN~ernal

125 mHz to

10

MHz, VXIbus

CLOCk,

or

EXTernal

clock
source). For details, see paragraph 1.2.6, Fre­quency.

TRIGgered:

Waveform output is quiescent at first data point

of selected trace until a triggering event (select­able by

TRIG^^^:

SOURce

as

INTernal,

EX-

Ternal,

VXIbus

TTLTrg

or VXIbus Local Bus

CHAin),

after which waveform cycle(s)

at

the
programmed frequency, amplitude and offset is
initiated. The waveform completes the number of
cycles set by the

Trigger

Count

and returns to its
quiescent baseline value for another triggering cy­cle. The triggering baseline is the level of the first
waveform address.

For details, see paragraph 1.2.12, Triggering.

GATE:

Same as Triggered except output is continuous for
duration of gate signal. Last waveform cycle is al­ways completed when gate signal is removed.

AMISCM:

Operates as in Continuous Made above, except
that the output can be Amplitude Modulated or
Suppressed Carrier Modulated by external sig­nals. For details, see paragraph 1.2.13, Modula­tion.

SWEep:

Operates as in Continuous Mode above, except
that the output frequency can be swept by an in­ternal sweep generator between programmed
start and stop frequencies.

Sweep capability is provided for standard wave-

.

forms and Arbitrary waveforms with a length that
is a multiple of

4096

points. A horizontal sweep

output voltage is also provided. For details, see

paragraph 1.2.11, Sweep.

Linked Sequence mode provides sophisticated
linking, looping and advancing of multiple wave­form segments. This allows the creation of long
and very complex waveform sequences. For de­tails, see paragraph 1.2.10, Linked Sequence

Op-

eration.

1

.2.4

Input

and

Output

8pedflcatlolu

1.2.4.1

Outputs

The Model 1395 Arb has four output signals on
the front panel: the function output, the position
marker, the sync marker, and the sample clock.
The Arb also provides a clock to the selected
VXIbus backplane ECLTRG line, and a trigger

output to the VXIbus Local Bus or to the selected
VXIbus TTLTRG line. The

ECL

Trigger lines can
be used to share waveform sample clocks. The
TTL Trigger lines can be used for intermodule
triggering.

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MAIN

OUT:

Front panel mounted female BNC, source of pro­grammed function at selected frequency, ampli­tude and offset. Source impedance is

50

Q.

Protected against short circuit to ground.

SYNC MARKER/H-SWEEP OUTPUT:

Front panel mounted female BNC. The SYNC
MARKER is a TTL compatible pulse into

50R

at
the waveform frequency. Sync generation tech­nique is selectable as

"ZCRO

s s"

or as

"BBI

TS

".

If

ZCROSS

is selected, the sync is generated from
zero-cross detecting the waveform. The sync
marker is a TTL high whenever the waveform is
positive. This is the preferred selection when

TRACe : MODE

is set to

cw

(phase accumulation).

This is because in

CW

a particular point may not

be used in every scan through the trace.
When

BBITS

is selected, the SYNC MARKER is a
TTL high for a variable number of samples (see
POSITION MARKER description for explanation)
starting at the first waveform memory location
used. When

TRACe :MODE

is

RASTer,

either
sync technique is applicable. Protected against
short circuit to ground.

Levels:

Low level < 0.4V

into > 508

High level > 2.OV

into > 508

Rise and Fall time:

<

5

ns into

50R

Configuration as a H-Sweep (Horizontal Sweep)

is made when the Frequency Mode is set to Sweep
or to List. A linear output ramp from

0

to

+10

volts

(f500

mV, open circuit) proportional to
sweep position between selected start and stop
limits is provided to drive the horizontal axis of a
display device. The output impedance is

600 R

f

5%.

POSITION MARKER OUTPUT:

Front panel mounted female BNC. TTL compati­ble pulse into

50 51.

User can clear the markers
low at all points or set the marker high at any
point in a trace. Protected against short circuit to
ground.

A marker set at address zero will be true during
the trigger quiescent baseline. If address

1

is set
(and zero is not), the POSITION MARKER output
follows the trigger event plus the pipeline delay.

The Position Marker is one trace point (not neces­sarily

1

clock) wide for each location selected. In
Raster mode, the trace point corresponds to a
clock cycle. In CW mode, for high frequency
waveforms, a trace point may not be accessed in

each pass through the waveform. For very low
frequencies, and in CW mode, each trace point
may be sampled for a number of clock cycles.

Levels:

Low level < 0.4V

into > 5052

High level > 2.OV

into > 50R

Rise and Fall time:

<8

ns into

50R

CLOCK INIOUT:

Front panel mounted BNC, selectable as either
TTL level clock input or TTL level clock output.
TTL Clock output is

0.1251

Hz to

50

MHz wave-

form sample clock in normal operation and

0.1251

Hz to

100

MHz in Clock mode. The output is pro-

tected against short circuits to ground.

Configured as an output:

Range:

0.1251

Hz to

100

MHz

Resolution/Accuracy:

Same as the frequency synthesizer.

Levels:

Low level < 0.5V

into

5062

High level > 2.1V

into

50R

Rise and Fall time:

<3

ns into

50R

TRIGGER OUTPUT (to

VXI

Backplane):

One of the eight VXIbus TTLTrigger lines can be

programmed as trigger output. The source of the

output trigger signal can be selected as "BIT",

"Loop COMplete", or "Burst COMplete". The

BIT

signal is set to be output during a specified
Trace or segment within a SEQuence, either at the
end (Trigger Marker) of the Trace or at selected
point(s) within the Trace (Position Marker).

LC OMP

1

e

t

e

indicates that a SEQuence segment

has completed its loop count.

BCOMp

1

e

t

e

indi­cates a Trace or a SEQuence has completed its
burst count.

When these sources are selected, the minimum

pulse width is

30

ns and maximum frequency

that can be applied to a VXIbus TTLTrigger line is

12.5

MHz (per VXIbus specification). Exceeding
these limits should be avoided by setting wave­form sample frequency below

33

MHz or by pro-

gramming

2

consecutive BITS when using the TTL

Trigger lines for a trigger output.

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CLOCK OUTPUT

(to

VXI

Backplane):

Either of the ECL Trigger lines can be pro-

grammed

as

a

clock output for intermodule tim­ing. The "master" module supplies its internal
clock to this output to be used by "slave" mod­ules as a clock reference for Phase Lock or for
tightly controlled trigger timing. When in
TRACe: MODE

CW

and internal clock is selected,

the internal clock is a fixed 50

MHz.

In
TRACe:MODE RASTer the internal clock's mantis­sa can range from 25 MHz to 50 MHz with 5 dig­its or 0.1

mHz of resolution under user control.

To set Phase Lock ON, the module selected as the
"master" drives the selected ECL Trigger line
(ECLTrg<n> ON) with its frequency synthesizer
clock signal. All modules, including the "mas­ter", get their Reference Oscillator (clock) from
the

ECLTrg line (R0SC:SOUR ECLT<n>) for opti­mum timing accuracy. When ECLTrg<n> is select­ed as an output by the "master":

Clock Frequency Range:

25 MHz to 50 MHz (Raster);

50 MHz

(CW).

Resolution/Accuracy:

Same as frequency synthesizer.

SUMBUS OUTPUT

(to

VXI Backplane):

Analog signals at the 1395's MAIN OUT may also
be summed into the VXIbus SUMBUS line with a

fixed scale factor (see Intermodule Analog Sum­ming, paragraph 1.2.14). A full amplitude 15 Vpp
signal at the MAIN OUT results in a

75

mApp sig­nal driving the 25R SUMBUS line. SUMBUS driv­er specifications are:

Scale Factor:

Accuracy:
Load Impedance:

Output Impedance:
Compliance:

Bandwidth:

5 mAN (5 mApp signal at the SUMBUS
line for each Vpp MAIN OUT).

*

(6%

+

2.5mA)

25Q

+_

2% (VXlbus specification)

>

10 kR in parallel with < 20 pF

f

1.2 V minimum

>

50

MHz

(limited by the backplane)

1.2.4.2

Inputs

The Model 1395 has two TTL signal inputs on the

front panel, clock and trigger. The external clock
frequency may range from dc to 50 MHz, the ex­ternal trigger may range from dc to 5 MHz. Addi­tionally, clock inputs can be accessed from the
selected VXIbus ECL Trigger line, and trigger in-

puts can be accessed through VXIbus Local Bus
or the selected TTL Trigger line. The clock and
trigger input lines from the backplane are limited

by the VXIbus specifications to a maximum of

62.5 MHz for clock and 12.5 MHz for trigger. See
VXIbus System Specification for usage.

TRIG IN:

Front panel mounted female BNC, accepts exter­nal TTL triggering signal. Input impedance is >1
kR. Protected to

f

15 Vdc.

Trigger Slope:

Positive or Negative selectable

Amplitude Range:

TTL levels, VinHmin = 2.1 V, VinLmax

=

0.8V

Min pulse width:

20 ns

Frequency:

dc to 5 MHz

AM IN:

Front panel mounted female BNC. Signal present
at this input amplitude modulates the Main Out­put signal. AM (amplitude modulation) and SCM
(suppressed carrier modulation) are supported.
Protected to k 20 Vdc. For details, see paragraph

1.2.13, Modulation.

Frequency Range:

dc to 500 kHz

Amplitude Range:

~t

15 V maximum

Input Impedance:

10 kR

CLOCK INIOUT:

Front panel mounted female BNC, selectable as
either TTL level clock input or TTL level clock
output. Clock input used as waveform sample
clock. Input impedance is

1

kR. Protected to k20

Vdc.

Configured

as an input:

Frequency:

dc to 50 MHz

Amplitude Range:

TTL levels, VinHrnin = 2.0 V, VinLmax

=

0.4V

Min Pulse Width:

10

ns

TRIGGER INPUT

(from

VXlbus Backplane):

One of the eight VXIbus TTL Trigger lines (TTL­TrgO-7) can be programmed as trigger input from
the VXIbus to the model 1395. The TTL Trigger

line has a VXI specification limit of 12.5 MHz
maximum and 30 ns minimum pulse width. Ad­ditionally, the 1395 module has a practical limit of

5

MHz maximum for a trigger input signal.

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If

another

1395

module is driving the TTL Trigger

line, the above limits must not be exceeded. See

"Trigger

Output (to

VXI

Backplane)"

in para-

graph 1.2.4.1.
See paragraph 1.2.12, Triggering, for examples of

VXIbus Backplane triggering.

CLOCK

INPUT (from VXI Backplane):

The ECL Trigger lines can be programmed as a
clock input from the VXIbus to the model 1395.
The "master" module supplies its internal clock to

this output to be used by "slave" channels as a
clock source for waveform generation. This al­lows tightly coupled intermodule operation in
Phase Lock or triggered modes.

The "slave" module(s) will receive the clock sig­nal on the selected

ECLTrigger line when the Ref-

erence Oscillator

Source(R0SC:SOUR) is ECLTrgO

or ECLTrgl:

Clock Frequency Range:

25 MHz

to

50 MHz

(Raster);

50 MHz

(CW).

Note

For Standard functions, Trace Mode is

CW,
and the waveform sample frequency (and thus
the Clock output from the Master) is

50

MHz

fixed. For the USER function, Trace Mode

is

Raster, sample frequency is selectable, and the
Master's clock output will vary between

25

MHz and

50

MHz with the mantissa of the

1SOURce:I FREQuency:RASTer parameter.

SUMBUS INPUT (from VXI Backplane):

Analog inputs on the VXIbus SUMBUS line may
be summed into a model 1395 MAIN OUT with a
selection of scale factors (see Intermodule Analog
Summing, paragraph 1.2.14). With no

SUMBUS
attenuation selected, a 1.875 Vpp (75 mA driving
25R) signal on the

SUMBUS line will drive the

MAIN out to its full-scale amplitude of

15

Vpp.

SUMBUS receiver specifications are:

Scale Factor (1:1 atten):

8 VIV (8 Vpp out at

MAIN OUT

for each

Vpp input at the

SUMBUS).

Accuracy:

+(6% t 200rnV t 2.5rnA)

Input Impedance:

>

10

kR

in parallel with < 20

pF

Bandwidth:

>

50 MHz

Local Bus lnputslOutputs (VXlbus Backplane)

The VXIbus Local Bus is used for triggering and
phase locking.

LBUSAOO, LBUSBOO

These pins are internally connected to as the
Phase Reset Bus. The Phase Reset signal is moni­tored by all phase locked modules. When this
signal is asserted all modules are reset and held at
the start address of the active trace. This signal
can be driven by any phase locked module. If is

driven whenever phase lock is enabled and a pro­gramming change is made.

LBUSAOP

This pin is used to receive the Chain Trigger sig­nal from the module to the left. The Chain Trig­ger signal is one of the trigger sources.

LBUSB02

This pin is used to drive the Chain Trigger signal
to the module to the right. The Chain Trigger sig­nal is always enabled and its source is the same as
that for the TTL Trigger Lines.

LBUSAO3, LBUSBO3

These pins are internally connected to form the

End Trigger Bus. The End Trigger Bus is used to
carry the End Trigger signal from the right-most
module back to the left-most module. Any mod­ule may be programmed to drive the End Trigger
signal. The End Trigger signal is one of the trig­ger sources.

1.2.5

Waveform Characterlstlcs

Square Transition Time:

For slOVp-p:

~9.0

ns

For > 10 Vp-p:

~9.5

ns

Square Aberrations:

~(5% t 20

mV)

Square Symmetry:

(0

"C

to

+50

"C)

r

10 MHz:

50%*2%

Sine Distortion: (Maximum Harmonic level, Elliptic filter
selected)

<I00 kHz, s 10 Vp-p:

-60

dBc

c100 kHz, I 15 Vp-p:

-55

dBc

<5

MHz, >10Vp-p:

-40

dBc

d0 MHz,

51

OVp-p:

-35

dBc

40 MHz,

>1

OVp-p:

-28 dBc

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Intermodulation Products: (Maximum Spur level, Elliptic

filter selected)

<5 MHz:

-

60 dBc

<I0 MHz:

-

50 dBc

120 MHz:

-

35 dBc

1.2.6

Frequency

Range:

Sine - 1pHz to 20 MHz.
Square

-

1pHz to 25 MHz

Haversines

-

1pHz to 20 MHz.

Other Standard Waveforms

-

lpHz to

2 MHz.

Resolution

-8 digits limited by 1 pHz, 5 digits when >20 MHz; 5
digits when in Triggered or Gated modes, or when the selected
function is

USER

vs. a Standard function.

Frequency Accuracy-

Determined by the selected clock source. When
internal source, frequency reference is provided by the VXlbus
ICLKIOI. Frequency accuracy is equal to the selected source
accuracy specification t200 nHz.

1.2.6.1

Arb Clock and Waveform Timing:

CW (Phase Accumulate) Mode:

The waveform is generated by a phase accumula­tor. "Standard" waveforms occupy a fixed 4k
block of points and are output in CW playback
mode. When standard waveforms are selected in
a triggered or gated mode of operation, the clock
frequency resolution is reduced from eight to five
digits.

Raster Mode:

User defined (arbitrary) waveforms are generated
by scanning through each point in the trace, one
clock cycle per point. User waveforms can have
horizontal resolution ranging from

5

points to

32K

(128K

optional) points. The internal raster

clock frequency is programmable from

125

mHz

to

50

MHz with 5 digits resolution, limited by

0.1

mHz. Waveform frequency is calculated by divid-

ing the clock frequency by the number of points
in the trace.

12.7

Arplltude

Range:

0.015 to 15Vp-p into 50R

0.03 to 30Vp-p into

>

10

kR

Resolution:

3.5 digits

Monotonicity:

0.2

90

Sinewave Flatness: ( relative to 1 kHz amplitude, Elliptic
filter selected, non-sweep modes)

c

5 MHz,

T,,, f 10°C

:

*2

96

<

5 MHz, 0 to 50°C:

*5

4b

<

20 MHz,

T,,,

_+

10°C:

+_

5

Oh

c

20 MHz, 0 to 50°C:

+lo

%

Accuracy: The greater of

+1%

of setting or the following

Limit:

Ampl(Vp)

+

ABS(0ffset)

>

2.500 & 17.500 V

>

1.250 & 12.500 V

>

0.625

&

1

1.250 V

>

312.5 & 1625 mV

>

156.3

&

5

312.5 mV

>

78.13

&

1

156.3 mV

>

39.06 & 178.13 mV

1

39.06 mV

1.2.8

Otlset

Range:

Resolution:
Accuracy:

Limit

*

7.5Vdc into 50R

k

l5Vdc into 210 kR

3.5 digits
The same as for Amplitude Accuracy.

1.2.9

FlIterlne

(user selectable):

20

MHZ-4 pole Bessel

20

MHz 7 pole, 6 zero Elliptic

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1.2.1 0 Unked

SEQuence

Opemvtlon

Number of Waveform Segments:

2

to

4

Segment Loop Count
Start Conditions:

Advance Conditions:

Advance Trigger Types.

Advance Types:

Sequence Modes.

1 to

65,535

or continuous.

Requires a trigger to Start a SEQuence.
Uses the Word Serial command or any
selected start trigger event.

Segment Loop Count complete;

Loop continuously until selected
advance trigger event true;

Loop done and advance trigger true

Event -Trigger must transition to the
true state to qualify as an event Tr~gger
event is latched

Level

-

Trigger must be in the true state
to initiate an advance. Trigger is not
latched

Synchronous

-

Current segment is

completed before next segment starts
Asynchronous

-

When advance

conditions

are met, next segrnent is

slarted Immediately Current segment

1s

not completed.

Continuous

or Triggered; Trigger Count

selectable (1 to 524,287).

Notes

Ifadvance condition from last segment to first
segment is "advance trigger true" or "Loop
done and advance trigger true", the sequence
must be run in continuous mode.

The trace limits of each trace taken from each

block in the sequence are determined by the

trace selected by the

TRACe:SELect command

previous to selecting the

SEQuence Mode.

1.2.11

Sweep

Sweep Time:

30 ms to 1000 s (15 frequency points at
30 ms) with (11512) s resolution and an
accuracy of 0.1% +(1/512) s.

Sweep Modes:

Continuous up

or

down

-

Output frequency sweeps from start
frequency to stop frequency, or stop to start if direction is
down, with selected characteristic (linear or log).

Continuous up/down

-

Output frequency sweeps from start frequency
to stop frequency, then back to start frequency with selected
characteristic.

Triggered

up

or down

-

Same as Continuous except output holds at

start frequency (or stop

if

down selected) until receipt of
trigger. Programmed number of sweeps, set by Sweep Count,
are completed for each trigger signal.

Triggered up/down

-

Same as Continuous upldown except output

holds at start frequency until receipt

of

trigger. Programmed

number of sweeps are completed for each trigger signal.

Triggered Sweep & Hold

-

Same as Triggered up or down except

frequency is held at end of each sweep. An additional trigger

is required to return to beginning of sweep.

Triggered Sweep & Hold with Reverse

-

Same as Triggered upldown

except frequency

IS

held at stop frequency. An additional

trigger is required to initiate a sweep back to start frequency.

Sweep Spacing.

Linear or Log

Sweep Count:

1

to 1,000,000

Minimum sweep trfgger pulse width:

>

500

p

1.2.1

2

Wiggering

Trigger Sources:

BUS Trlgger ('TRG or GET; TR1Gger:IMMEOiate)
VXlbus Word Serlal Tr~gger Command
Trlgger Input Connector(s)
Internal Trigger Generator(s)
VXI TTL Trigger line driven by another module
Chained Trigger, receive trigger signal on the VXlbus Local Bus driven

from adjacent module.

Linked Sequence Advance Condition:

derived from:

Trigger Count Complete

Loop Complete from any or all segments

of a linked sequence.

Waveform Complete from an arbitrary
waveform or any or all segments of a
linked sequence.

Trigger Destinations:

Start Trigger:

Initiates gated or trigger modes and
starts sequences.

Advance Trigger:

Conditions advances between segments
of

a

linked sequence.

Internal Trigger Generator(s):

Period:

200 ns to 1000 s

Resolution:

200 ns

Accuracy:

Same as VXlbus ICLKI 01

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Trigger Delays and Jitter: (Specified for Trigger lnput
connectors with

TTL

input signal)

Delay:

With Standard Functions:

<250

ns

With User Waveforms:

~400

ns

Jitter: With Standard Functions:

<20

ns

With User Waveforms:

<40

ns

Note

Trigger delays and jitter specified with inter­nal sample clock only.

If

external clock is

used:

Delay:
Jitter:

Trigger Count:

7

clock periods

+

400

ns

+

1

clock period

For waveforms:

1

to

1,048,575

For sequences:

1

to

524,287

Note

Triggered modes

of

operation are limited to

10

MHz waveform frequency with 5 digits of

frequency resolution.

1.2.1

8

Modulation

Types:

AM

(Double sideband

with

carrier)
SCM (Double sideband suppressed carrier)
B3nd width:

>

500

kHz

Carrier Suppression (SCM):

>

-40

dB

Modulation Distortion:

Modulation Freq

I

100

kHz:No

harmonic

>

-50

d8c

Modulation Freq

I

I

MHz: No harmonic

>

-30

dBc

SCM Scale Factor:

5

VN

AM

Scale Factor: Proportional to programmed amplitude, as

follows:

Scale Factor Accuracy:

Carrier

2

5

MHz:

t5

%;

Carrier

>

5

MHz:

+20

Oh

Ampl(Vp) + ABS(0ffset)

>

2.500

&

5

7.500 V

>1.250& 12.500V

>

0.625 & 11.250

V

>

312.5 & 1625

mV

>

156.3

&

2

312.5

mV

>

78.13

&

5

156.3

mV

>

39.06

&

5

78.13

mV

5

39.06

mV

Note

Ratio of Vout to

Vin

re-

quired for

I00

%

AM

1O:l

5:l

2.5:l

1.25:l

0.625:l

0.3125:l

0.1563:l

0.07813:l

All scale factors assume Main Output termi-

nated into

500

load.

Intermodule Analog Summing:

The waveform from the

1395

module can be driv-

en onto the VXIbus Backplane SUMBUS. The

1395

can also receive the VXI backplane SUMBUS
signal, and sum it with the MAIN OUT output
signal. To extend the dynamic range of the SUM­BUS signal, the

1395

provides eight input attenua-

tors selectable from the following:

Attenuation,

dB:

I

Division, ratio:

-42

I

111

28

Note

For SUMBUS Driver/Receiver specifications (Scale Factor,
bandwidth, etc.) refer to paragraph

1.2.4.1,

SUMBUS

Output (driver) and Paragraph

1.2.4.2,

SUMBUS lnput

(receiver).

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Intermodule Phase Control

Two

adjacent modules can be assigned a fixed
phase relationship. The "Slave" module must be
driven by the "Master's" clock generator and the
waveforms must

be

of the same length and fre­quency. Any change in phase angle between
channels will require one waveform

cycle

to re-ac­quire phase lock. Phase control signals use the
VXIbus Local Bus.

Note

Phase lock operates with adjacent model

1395's

using the VXlhus Local

Bus.

Frequency Range.

1

pHz

to

SO

MHz

Phase

Resolution

360°14096 points, standard

functior;~,

360°/polnts, User def~ne~i

~aveforms

Phase

Accuracy

+

(tfl x 360")

where

t

=

1

cloc~

perwd

t

10

ns

and

T

--

waveform

oeriod

Intermodule

Triggering

Adjacent modules can also use the

VXI

Lo;

<i!

Bus

to "daisy chain" a trlgger signal from the "<tartf'
module, through a number of adjacent

rr:~~ci:iles

~r,

the "Chain"

to

the "End" module. Each

module

receives the triggering signal on the Local Bus
CHAin line from the module to its left, and dr~ves
the CHAin line with its selected Trigger Source

to

the module on its right. The "End" module can
be set up to drive a selected TTL Trigger line with

its selected Trigger Source back to the "Start"

module, ciosing the loop.

In this fashion, complex and versatile intermod­ule triggering schemes may be set up. Each mod­ule can have its Trigger Source (the signal that it
uses to drive the CHAin line) and its output

waveform set up independently. Trigger Sources

include BIT (pulse occurring at the end of or in a
selected position within a trace), Burst

COMplete,

or Loop COMplete.

1.2.1

5

Frequency

List

Fast frequency changes are possible using

[Source:] Frequency:Mode List. In this mode of
operation the output frequency is determined by
the contents of the Frequency List. The Frequency
List is a user programmable list of up to

1024

fre-

quency values.

A

trigger event causes a transition to the next fre­quency in the list. When the last frequency in the
list

is

reached the next trigger returns

to

the

first

frequency in the list. The effective size of the list
is programmable from

1

to 1024 using the

[Source:)List:Points command.

The maximum effective trigger rate in this mode

is approximately

2

kHz.

1.2.1

6

Option

Expanded Waveform

RAM

Quadruples waveform data storage volatile RAM
from

32

I(

to

128

K

points.

1.2.1

7

AutoCallDlagnostics

Each

1395

AKB Module contains time and

DC
voltage measurement capability. This feature pro­vides the ability to conduct a limited AutoCal and

self

didgnostic.

Some

parts of the calibration

(e.g., amplifier flatness) require the use of exter­nal measurement equipment. The calibration data
is stored in

EEPROhl.

The

Processor accesses the

data and uses

it

to

correct the output as required

to maintain the specified performance.

Performancr specifications apply within the
specified environmental conditions after a

20

minute warm up prriod. Specifications are
subject to change without notice.

The

"T,,,"

nomenclature used in this specifi­cation refers to the ambient temperature at
which the last full Calibration was performed.
This temperature

musf be within the range of

10

to

40

"C.

1.3

GENERAL

1.8.1

8CPI

Programming

The Model

1395

Arb adheres to the Standard
Commands for Programmable Instruments (SCPI)
remote programming format Version 1992.0, Feb­ruary 1992 (refer to the SCPI manual for further
information). SCPI is an industry standard lan­guage for remote instrument programming. It ad­dresses a variety of test and measurement
instrument requirements.

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The Wavetek Model

1395

Arbitrary Waveform

Generator is a single slot,

C

size VXIbus module.
Using any manufacturer's VXIbus chassis, the
Model

1395

Arb can be controlled using the SCPI
language and the appropriate controller. Root
level commands include:

MODE

OUTPut SOURce

STATUS

SY

STem TRlGger

CALibration lNlTiate RESet

TEST TRACe

The model 1395 supports all Word Serial Com­mands specified in the VXIbus System Specifica­tion (Rev. 1.3) Tables E.l and E.2 for the above
subset/protocol classification. It also supports all
IEEE-488.2 Common Commands mandated for
use with SCPI.

1.8.2

VXl

Interface

The internal frequency synthesizer and internal

trigger timer utilize the CLKlO signal.

TTLTrigger Lines

Trigger signals can be sourced and received on

any one of the eight TT'L Trigger Lines.

ECL

Trigger

Lines

Thc ECL Trigger L1ne5 can be used to share

the

output of one module's mternal frequency synthe-

sizes

~imong mult~ple module5 This allows

muti-

ules

to

share a clock

wlth

the same phase

I'h~s

1s

~mportant in order

to

phase link multiple mod-

ules

Local Bus

The Local Bus is us&

ti:

transfer high speed trig­ger and synchronizat~on signals between sdjdcent
modules in a VXIbus chassis.

ECL

level signals

appear on LBUSAOO, LBUSCOO, LBUS A01 and

LBUSCOI. TTL level signals appear on LBUSAOZ,
LBUSC02, LBUS A03 and LBUSC03. These signals
are always enabled.

The CHAIN trigger signal is driven onto
LBUSCO2 and received from LBUSA02. This sig­nal is used to trigger adjacent modules. Multiple
adjacent modules can propagate the CHAIN trig­ger down the chain.

The

END

CHAIN trigger is bussed between
LBUSA03 and LBUSC03. Any module can be pro­grammed to drive or receive this signal. Typically
the last module in the chain is programmed to

drive the

END

CHAIN

trigger signal while the
first module in the chain is programmed to re­ceive it. This allows the loop to be closed

in

the

chain.

Shared Memory

64k bytes of A24/D16 Shared Memory are avail­able to be used for the high speed transfer of trace
data. Data transfer rates using Shared Memory
are much higher than what is possible using Word
Serial Data Transfer Protocol.

VXlbus Interface Card

The VXIbus Interface Card contains a Message Based
Device interface (MBD) which supports the following
subsets/protocols:

A16/A24 Dl6 Slave
A16/A24 Dl6 Master
VXIbus Instrument Protocol (I)
VXIbus IEEE-488.2 Instrument Protocol

(14)
Event Generator

Response Generator

211

Ward Srrml Commands specified in the

VXlbus

System Specificat~on

(Rev

1.7)

Tables

F

1

317d

E

2

tor

the abnve qubiet/protc!ci~l clas51flca

tlon are supported

Processor & Memory

*

64

kB

of

local

Static RAM

*

128

k13

of EPROM

*

Renl Time Clock generates system tick and
adds time and event capability to applica­tion code.

VXlbus Interface

VXIbus P1 and P2 connector
A16/A24 Dl6 Bus Master capability
64 kB A24 Dl6 Shared Memory
Implements the complete Message Based

Device interface.

Full A16/A24 register access qualification.
Drivers and Transceivers meet the high

VMEbus output drive requirements.
All optional A16 Registers provided.

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Application Interface

Access to all CPU address, data and con­trol lines

VXIbus TTL Trigger and Local Bus head­ers.

VXIbus

ECL

Trigger

and 10

MHz

clock

buffers.
SYSCLOCK, RESET" and

ACFAIL

lines

Power supplies +5, -5.2, -2,

+12,

+24

1.8.8 Environmental

Temperature Range:

Operating:
Storage:
Warm-up Time:

Altitude:

Operating:
Storage:

Temperature of last Self Calibration

ilO°C

for specified operation.

0°C

to

50°C.

-40°C

to

+71°C

(RH

not controlled).

30

minutes for specified operation,

except stability specifications require

60

minutes.

Sea level to

10,000

ft.

Sea level to

15,000

ft.

Relative Humidity (non-condensing):

0°C

to

+lO°C:

not controlled.

+I1

"C

to

+30°C:

95

k

5%

RH

max.

+3I0C

to

+40°C:

75

i

5%

RH

max.

+41°C

to

+50°C:

45

*

5%

RH

max.

Vibration:

Operates at a vibration level of

0.013

in.

from

5

to

55

Hz

(29

at

55

Hz).

1.8.6

Power

Total:

Voltage

+24

Vdc

t5

Vdc

-2

Vdc

-5.2

Vdc

-24

Vdc

+12

Vdc

-12

Vdc

1.8.8

Reliability

<

35Watts

Peak

Current

250

mA

2000

rnA

250

rnA

2200

mA

250

mA

200

mA

350

mA

Dynamic

Current

200

mA

100

mA

20

mA

100

mA

200

rnA

50

mA

50

mA

22,000 hours MTBF at 25"C, ground benign.
MIL-HDBK-217 calculation at 50% component

stress.

1.8.7 Cooling

Requirement

Within a VXIbus mainframe with cooling air. Min-

imum airflow requirement for 10°C rise is 0.20
mm (0.0075 in)

H,O

at 8.57 l/sec (18.15

CFM).

1.8.8 Safety

Designed to MIL-T-28800D, UL-1244, and the
VXIbus System Specification, Revision 1.3.

1.8.8

EMC

MIL-STD-461C, Part 7, RE-02, and VXIbus System
Specification, Revision 1.3; RE, RS,

CE,

CS.

Shock:

Non-operating,

409, 9

ms half-sine

Bench Handling:

Non-operating. 4 in. or point of balance

drop, any face, solid wooden surface.

1.8.4 Size

Dimensions:

Single slot,

"C"

size

VXI

module.

(31

x

262 x 350

mm).

Weight:

t1.6

kg

(3.4

Ib).

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Section

2

2.1

RECEIVING INSPECTION

Check the shipment at the time of delivery and in­spect each box for damage. Describe any box
damage and list any shortages on the delivery in­voice.

2.1

.l

Unpacking

Instructlam

Unpack the boxes . Unpack the boxes in a
clean and dry environment. Save all the pack­ing material in case the instrument must be re­turned for repair.

Inspect the shipment for damage.

Inspect
the equipment carefully for any signs of me­chanical damage regardless of the condition of
the shipping boxes.

If necessary, file a claim. In the case of me­chanical damage, call the shipper immediately

and start the claim process.
Call Wavetek. Call Wavetek's Customer Ser-

vice representative (619 279-2200) to inform
them that the shipment arrived damaged.
Please be prepared to provide a detailed dam­age report.

2.1.2

Returning

Equipment

Please follow these steps when you return equip­ment to Wavetek:

1.

Save the packing material. Always return
equipment in its original packing material and

boxes. If you use inadequate material, you'll

have to pay to repair any shipping damage as
carriers won't pay claims on incorrectly
packed equipment.

2.

Call Wavetek Customer Service and ask for

a

return authorization. The Wavetek Customer
Service representative (619 279-2200) will ask

for your name, telephone number, company

name, equipment type, model number, serial

number, and a description of the problem.

If at all possible, always use the original shipping
container. However, when using packing materi­als other than the original, use the following
guidelines:

1.

Wrap the Model 1395 in ESD sensitive packing
material.

2.

Use a double-walled cardboard shipping con­tainer.

Protect all sides, including the top and bottom,
with shock absorbing material (minimum of

2
inch thick material) to prevent movement of the
Model 1395 within the container. Seal the ship­ping container with approved sealing tape. Mark

"FRAGILE" on all sides, top, and bottom of the

shipping container.

The Model 1395 should be stored in a clean, dry
environment. In high humidity environments,
protect the Model 1395 from temperature varia­tions that could cause internal condensation. The

following environmental conditions apply to both
shipping and storage;

Temperature:

-40°C

to

+71

OC

Relative Humidity:

not controlled,

non-condensing

Altitude:

<40000

ft.

(121

92

m)

Vibration:

<

29

Shock:

<

409

2.3

PREPARATION FOR USE

Paragraph 2.3 covers the following topics:

Logical Address Selection
Data Transfer Bus Arbitration
Installation

3.

Pack and ship the equipment.

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The VXIbus chassis Resource Manager identifies
units in the system by the unit's logical address.
The VXIbus logical address can range from

0

to

255. However, addresses

0

and 255 are reserved

for special functions. Address

0

identifies the Re­source Manager. Address 255 permits the Re­source Manager to dynamically address the unit
based on the units VXIbus chassis slot.

To change the Model 1395's logical address, use

the eight position

DIP

switch (figure 2-1) ac-

cessible from the side panel. The Model

1395

uses

binary values

(2O

to

Z7)

to set the address using the
active low address switch. This means the OFF
position represents a logical

1.

Conversely, an

ON position represents a logical

0.

Switch posi-

tion number one is the least significant bit of the

address. Insert

A

in figure 2-1 illustrates a switch

set to

a

logical address of 3.

Wavetek ships the Model 1395 with a logical ad­dress of

255

for Dynamic Configuration. Refer to

insert B in figure

2-1.

2.8.2

Data

Trarurler

Bw

Arbltraion

The Model 1395 has VMEbus Mastership capabili­ty. This means the Sweep/Function Generator,
when enabled, sends Responses and Events as
signals to its Commander. The Model 1395 cannot

drive the interrupt lines.

The Model 1395 is configured as

a

level 3 re-

questor

by

the factory. The level 3 Bus Request

and Bus Grant lines are used (BR3*, BG3IN*, and

BG30UT*).

The other Bus Grant lines are daisy­chained by jumpers. The VMEbus specifications
describe three priority schemes: Prioritized,
Round-robin, and Single level. The Prioritized ar­bitration assigns the bus according to a fixed pri­ority scheme where each of four bus lines has a

Figure

2-1.

Set the

Logical

Address

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4

PAN

HEAD

CONNECTORS

INTERBOARD
CONNECTORS

BUSREQUEST

ARBITRATION LEVEL

JUMPER BLOCK

Figure

2-2.

Bus Arbitration Level Jumpers

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priority from highest (BR3") to lowest (BRO*).

Round-robin arbitration assigns the bus on a ro­tating basis. Single level arbitration only accepts
requests on BR3*.

If a different requestor level is required, the jump-

ers must be changed. The following instructions

and figure 2-2 will aid in reconfiguring the Model

1395 to a new level. Refer to the

VMEbus specifi-

cation for more information on

'data transfer

bus

arbitration'.

CAUTION

The SweepIFunction Generator con­tains

CMOS

devices which are sen-

sitive to static electricity.

When

performing the bus arbitration level
change, static electricity discharge
straps should be worn.

Remove the four flat head screws on the Mod­el 1395 left side panel, remove the panel.

Remove the four pan head screws holding the
VXIbus Interface card to the main Sweep!
Function Generator board.

Slowly and gently lift the VXIbus Interface
card up from the Function Generator board.
Considerable force may be required as there
are four connectors between the two boards
with a total of 136 pins. Do not use a metallic
prying tool.

Change the data transfer bus arbitration
jumpers to the desired level. Refer to figure 2-

2.
Carefully install the VXIbus Interface card

onto the Sweep/Function Generator board.
Install the four pan head screws, the side pan­el and the four flat head screws.

2.4

INSTALLATION

The instrument will be installed in a VXIbus

mainframe in any slot except slot 0 (zero). When
inserting the instrument into the mainframe, it
should be gently rocked back and forth to seat the

connectors into the backplane receptacles. The

ejectors will be at right angles to the front panel
when the instrument is properly seated into the
backplane. The two captive screws above and be-

low the ejectors are used to secure the instrument
into the chassis.

This procedure provides the operator, service

technician, receiving inspector, etc. with a quick
method of verifying the functional operation of
the Model 1395. This procedure does not test the
unit's specifications. This procedure assumes the
Model 1395 is properly installed in

a

"C"

size
VXIbus chassis with a VXIbus controller in slot 0.
Required tools and test equipment are given in table
2-1.

Table

2-1.

Test Equipment

and

Tools

Equipment

Oscilloscope
Signal Source

BNC 50R Feed­through (2 ea.)

BNC Coax

Cable (2 ea.)

1

Comments

Bandwidth: 100

MHz

Frequency: 1 kHz to 5 MHz

Output: TTL

Accuracy: 0.5%

Power: 2W
RG58U, 3 ft. length

Because each step in the procedure is dependent
on the preceding step, start with step 1 and con­tinue through to the end. Do not send any com­mand unless specifically instructed to do so
within the procedure.

1) Verify proper LED operation during instru­ment power-up

2)

Send:

*tst?

If response = 0, continue
If response

+

0, decode error value

(see Appendix

B).

Note

If the test fails on a new or newly factory re-

paired unit, call Wavetek Customer Service at

619/279-2200

or

FAX

619/565-9558.

LED

Run
Fail
MODID

A16

A24

Normal Result

On

On, then Off after a second
Flashes very briefly
Flashes
Off

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Connect a coax cable between the MAIN

OUT

connector and oscilloscope through a

50R

ter-

minator.

Send:

outp on

Verify lVp, 1 kHz

sine wave at the MAIN

OUT

connector.

Move cable from the MAIN

OUT

connector to

the MARKER SYNC connector.

Send:

mark:sync on

Verify

TTL

level,

1

kHz

square wave from the

MARKER SYNC connector.

Send:

mark: sync: sour bbit

Verify sets of TTL level pulses at 1 ms inter­vals.

Move cable from the MARKER SYNC connec­tor to the MAIN OUT connector.

Send:

trac:def temp, 50;data

temp,tri;:func:shap user

Verify lVp,

1

MHz

triangle wave.

Move cable from the ARB OUT connector to
the MARKER POSITION connector.

Send:

mark:pos :poin temp, 1 ;poin

temp,3;poin temp,5

Verify three TTL level pulses, each with a

width of

20

ns separated by an interval of

20

Send:

mark:pos :aoff temp

Verify pulses disappear.

Move cable from the MARKER POSITION

connector to the ARB

OUT

connector.

Connect an external

100

kHz,

TTL

level signal

to the

TRIG

IN connector through a

5052

ter-

minator.

Send:

init:cont off; : trig:sour

ext;:trac:data temp,sin

Verify a lVp, 1 ps wide sine wave at 10 ps in­tervals.

10) Change the 100

kHz

external TTL signal to

5

MHz.

Move the external source cable from

the TRIG IN connector to the CLOCK IN con-

nector.

Send:

init: cont on; : rosc :sour

ext

Verify lVp, 100

kHz

sine wave.

ns.

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Operation

Section

3

8.1 Introduction

This section provides the Operator/Programmer
with the information needed to operate the Model

1395 Arbitrary Waveform Synthesizer in a VXI sys­tem. The unit resides in a VXI chassis and is sub­ject to all of the restrictions and benefits of that

environment.

Paragraph 3.2 describes the Model 1395 connec-

tors and

LED

indicators. Paragraph 3.3 defines
the Model 1395 programming messages. Para­graph 3.4 demonstrates how to operate the Model

1395 using the defined messages.

8.Z Connectors and

LED

Indicators

This paragraph describes the Model 1395 front
panel connectors and LED indicators. Figure 3-1
illustrates the front panel; bold numbers identify
the indicators and connectors. Table 3-1 describes
the function of each item shown in figure 3-1.

8.3 Model 1395 Programming

The Model 1395 communicates within the SCPI
(Standard Commands for Programmable Instru­ments) and IEEE 488.2 standards. Therefore, the
Model 1395 must respond to two types of com­mands: SCPI commands and IEEE 488.2 Common
Commands. The IEEE 488.2 Common Commands

support functions that are common to all instru­ments, such as reset, self test and status reporting.
Common Commands are non-hierarchical (can be

included within

SCPI

commands without disturb­ing their hierarchical relationships) and are easily
identified by their leading asterisk

(*).

SCPI com­mands support functions that are specific to the
instrument.

This paragraph provides the following informa­tion:
SCPI Command Table Paragraph 3.3.1.
Command Message Format Paragraph 3.3.2.
Model 1395 SCPI Commands Paragraph 3.3.3.

IEEE 488.2 Common Commands Paragraph 3.3.4.

8.8.1

8CPI

Command

Table

Table 3-2 lists the SCPI commands used in the
Model 1395 and indicates their hierarchical rela-

tionships. The IEEE 488.2 Common Commands
are listed in a separate table (Table 3-5). The SCPI
Command

able-is

organized as follows:

Keyword

[SOURce]

:FREQuency

I

:CWl

:MODE

STARt
STOP

Parameter

Form

Notes

The indentations of

keywords

indicates their hierar­chical relationships according to a tree system.
The left-most edge is called the

root node.

Key­words closer to the root node are higher in hierar­chy; lower nodes are to the right of their parent
node. To program or query a

settable parameter,
the full path must be defined to reach the keyword
appended with the required parameter form.

A

SCPI programming string typically starts at the
root node and proceeds to the right through
branch nodes to the

leaf node.

This string of key-

words, separated by colons and completely defin-

ing a single path, is defined as a Program Header.

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