Vishay VS-ST280C Series Data Sheet

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TO-200AB (A-PUK)
PRODUCT SUMMARY
Package TO-200AB (A-PUK)
Diode variation Single SCR
I
T(AV)
V
DRM/VRRM
V
TM
I
GT
T
J
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 500 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case TO-200AB (A-PUK)
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
• AC controllers
  
500 A
400 V, 600 V
1.36 V
90 mA
-40 °C to 125 °C
      
VS-ST280C Series
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
I
T(AV)
I
T(RMS)
I
TSM
2
t
I
V
DRM/VRRM
t
q
T
J
T
hs
T
hs
50 Hz 7850
60 Hz 8220
50 Hz 308
60 Hz 281
Typical 100 μs
500 A
55 °C
960 A
25 °C
400 to 600 V
- 40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
ST280C..C
V
VOLTAGE
CODE
04 400 500
06 600 700
DRM/VRRM
PEAK AND OFF-STATE VOLTAGE
, MAXIMUM REPETITIVE
NON-REPETITIVE PEAK VOLTAGE
V
V
, MAXIMUM
RSM
I
DRM/IRRM
T
= TJ MAXIMUM
V
J
A
kA2s
MAXIMUM AT
mA
30
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Document Number: 94400
VS-ST280C Series
www.vishay.com
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current at heatsink temperature
Maximum RMS on-state current I
T(RMS)
Maximum peak, one-cycle non-repetitive surge current
Maximum I
Maximum I
2
t for fusing I2t
2
t for fusing I2t t = 0.1 to 10 ms, no voltage reapplied 3080 kA2s
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of on-state slope resistance r
High level value of on-state slope resistance r
Maximum on-state voltage V
Maximum holding current I
Maximum (typical) latching current I
I
T(AV)
I
TSM
T(TO)1
T(TO)2
t1
t2
TM
H
L
180° conduction, half sine wave double side(single side) cooled
DC at 25 °C heatsink temperature double side cooled 960
t = 10 ms
t = 8.3 ms 8220
t = 10 ms
t = 8.3 ms 6900
t = 10 ms
t = 8.3 ms 281
t = 10 ms
t = 8.3 ms 200
(16.7 % x x I (I > x I (16.7 % x x I (I > x I
No voltage reapplied
100 % V reapplied
RRM
No voltage reapplied
100 % V reapplied
), TJ = TJ maximum 0.88
T(AV)
), TJ = TJ maximum 0.47
T(AV)
T(AV)
T(AV)
RRM
< I < x I
< I < x I
Ipk = 1050 A, TJ = 125 °C, tp = 10 ms sine pulse 1.36 V
TJ = 25 °C, anode supply 12 V resistive load
Vishay Semiconductors
500 (185) A
55 (85) °C
Sinusoidal half wave, initial T
= TJ maximum
J
), TJ = TJ maximum 0.84
T(AV)
), TJ = TJ maximum 0.50
T(AV)
1000 (300)
7850
6600
308
218
600
A
kA2s
V
m
mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum non-repetitive rate of rise of turned-on current
Typical delay time t
Typical turn-off time t
dI/dt
d
q
Gate drive 20 V, 20 , t T
= TJ maximum, anode voltage  80 % V
J
Gate current 1 A, dIg/dt = 1 A/μs V
= 0.67 % V
d
DRM
ITM = 300 A, TJ = TJ maximum, dI/dt = 20 A/μs, V
= 50 V, dV/dt = 20 V/μs, gate 0 V 100 , tp = 500 μs
R
1 μs
r
, TJ = 25 °C
DRM
1000 A/μs
1.0 μs
100
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of off-state voltage
Maximum peak reverse and off-state leakage current
dV/dt T
I
,
RRM
I
DRM
= TJ maximum linear to 80 % rated V
J
TJ = TJ maximum, rated V
DRM/VRRM
DRM
500 V/μs
applied 30 mA
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Document Number: 94400
VS-ST280C Series
www.vishay.com
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current I
Maximum peak positive gate voltage + V
Maximum peak negative gate voltage - V
DC gate current required to trigger I
DC gate voltage required to trigger V
DC gate current not to trigger I
DC gate voltage not to trigger V
GM
G(AV)
GM
GT
GD
GD
TJ = TJ maximum, tp 5 ms 10.0
TJ = TJ maximum, f = 50 Hz, d% = 50 2.0
TJ = TJ maximum, tp 5 ms 3.0 A
GM
TJ = TJ maximum, tp 5 ms
GM
TJ = - 40 °C
= 25 °C 90 150
J
= 125 °C 40 -
T
J
TJ = - 40 °C 2.9 -
GT
= 25 °C 1.8 3.0
J
T
= 125 °C 1.2 -
J
Maximum required gate trigger/ current/voltage are the lowest value which will trigger all units 12 V anode to cathode applied
Maximum gate current/voltage not to trigger is the maximum
TJ = TJ maximum
value which will not trigger any unit with rated V cathode applied
DRM
Vishay Semiconductors
TYP. MAX.
180 -
anode to
VALUES
20
5.0
10 mA
0.30 V
UNITS
W
V
mAT
VT
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum operating junction temperature range
Maximum storage temperature range T
Maximum thermal resistance, junction to heatsink
Maximum thermal resistance, case to heatsink
R
R
T
J
Stg
thJ-hs
thC-hs
DC operation single side cooled 0.17
DC operation double side cooled 0.08
DC operation single side cooled 0.033
DC operation double side cooled 0.017
Mounting force, ± 10 %
Approximate weight 50 g
Case style See dimensions - link at the end of datasheet TO-200AB (A-PUK)
R
CONDUCTION ANGLE
CONDUCTION
thJC
SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION
SINGLE SIDE DOUBLE SIDE SINGLE SIDE DOUBLE SIDE
180° 0.016 0.016 0.011 0.011
120° 0.019 0.019 0.019 0.019
90° 0.024 0.024 0.026 0.026
60° 0.035 0.035 0.036 0.037
30° 0.060 0.060 0.060 0.061
Note
• The table above shows the increment of thermal resistance R
when devices operate at different conduction angles than DC
thJC
- 40 to 125
- 40 to 150
4900 (500)
TEST CONDITIONS UNITS
T
= TJ maximum K/W
J
°C
K/W
N
(kg)
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
Document Number: 94400
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