Vishay VS-ST280CH Series Data Sheet
www.vishay.com
TO-200AB (A-PUK)
PRODUCT SUMMARY
Package TO-200AB (A-PUK)
Diode variation Single SCR
I
T(AV)
V
DRM/VRRM
V
TM
I
GT
T
J
Phase Control Thyristors
(Hockey PUK Version), 500 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case TO-200AB (A-PUK)
• Extended temperature range
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
• AC controllers
500 A
400 V, 600 V
1.35 V
90 mA
-40 °C to 150 °C
VS-ST280CH Series
Vishay Semiconductors
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
I
T(AV)
I
T(RMS)
I
TSM
2
t
I
V
DRM/VRRM
t
q
T
J
T
hs
T
hs
50 Hz 7200
60 Hz 7500
50 Hz 260
60 Hz 230
Typical 100 μs
500 A
80 °C
1130 A
25 °C
400 to 600 V
-40 to 150 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
, MAXIMUM
V
V
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
RSM
V
I
DRM/IRRM
AT T
= TJ MAXIMUM
J
TYPE NUMBER
VS-ST280CH..C
V
DRM/VRRM
VOLTAGE
CODE
04 400 500
06 600 700
REPETITIVE PEAK AND
OFF-STATE VOLTAGE
A
kA2s
MAXIMUM
mA
75
Revision: 16-Dec-13
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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Document Number: 94401
VS-ST280CH Series
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ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current I
T(RMS)
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
2
t for fusing I2t
2
t for fusing I2t t = 0.1 to 10 ms, no voltage reapplied 2600 kA2s
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of on-state slope resistance r
High level value of on-state slope resistance r
Maximum on-state voltage V
Maximum holding current I
Maximum (typical) latching current I
I
T(AV)
I
TSM
T(TO)1
T(TO)2
t1
t2
TM
H
L
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled 1130
t = 10 ms
t = 8.3 ms 7500
t = 10 ms
t = 8.3 ms 6300
t = 10 ms
t = 8.3 ms 235
t = 10 ms
t = 8.3 ms 165
(16.7 % x x I
(I > x I
(16.7 % x x I
(I > x I
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
< I < x I
T(AV)
), TJ = TJ maximum 0.88
T(AV)
< I < x I
T(AV)
), TJ = TJ maximum 0.47
T(AV)
Ipk = 1000 A, TJ = TJ maximum, tp = 10 ms sine pulse 1.35 V
TJ = 25 °C, anode supply 12 V resistive load
Vishay Semiconductors
500 (185) A
80 (110) °C
Sinusoidal half wave,
initial T
= TJ maximum
J
), TJ = TJ maximum 0.84
T(AV)
), TJ = TJ maximum 0.50
T(AV)
1000 (300)
7200
6000
260
180
600
A
kA2s
V
m
mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum non-repetitive rate of rise
of turned-on current
Typical delay time t
Typical turn-off time t
dI/dt
d
q
Gate drive 20 V, 20 , t
T
= TJ maximum, anode voltage 80 % V
J
Gate current 1 A, dIg/dt = 1 A/μs
V
0.67 % V
d
DRM
ITM = 300 A, TJ = TJ maximum, dI/dt = 20 A/μs,
V
= 50 V, dV/dt = 20 V/μs, gate 0 V 100 , tp = 500 μs
R
1 μs
r
, TJ = 25 °C
DRM
1000 A/μs
1.0
μs
100
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
dV/dt T
I
,
RRM
I
DRM
= TJ maximum linear to 80 % rated V
J
TJ = TJ maximum, rated V
DRM/VRRM
DRM
500 V/μs
applied 75 mA
UNIT
S
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94401
VS-ST280CH Series
www.vishay.com
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current I
Maximum peak positive gate voltage + V
Maximum peak negative gate voltage - V
DC gate current required to trigger I
DC gate voltage required to trigger V
DC gate current not to trigger I
DC gate voltage not to trigger V
GM
G(AV)
GM
GT
GT
GD
GD
TJ = TJ maximum, tp 5 ms 10.0
TJ = TJ maximum, f = 50 Hz, d% = 50 2.0
TJ = TJ maximum, tp 5 ms 3.0 A
GM
TJ = TJ maximum, tp 5 ms
GM
TJ = - 40 °C
= 25 °C 90 150
J
= 150 °C 30 -
T
J
TJ = - 40 °C 2.9 -
= 25 °C 1.8 3.0
J
T
= 150 °C 1.0 -
J
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
Maximum gate current/voltage
not to trigger is the maximum
TJ = TJ maximum
value which will not trigger any
unit with rated V
cathode applied
Vishay Semiconductors
VALUES
TYP. MAX.
20
5.0
180 -
10 mA
anode to
DRM
0.30 V
UNITS
W
V
mAT
VT
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum operating junction and
storage temperature range
Maximum thermal resistance,
junction to heatsink
Maximum thermal resistance,
case to heatsink
Mounting force, ± 10 %
Approximate weight 50 g
Case style See dimensions - link at the end of datasheet TO-200AB (A-PUK)
R
CONDUCTION
thJ-hs
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION
SINGLE SIDE DOUBLE SIDE SINGLE SIDE DOUBLE SIDE
180° 0.016 0.017 0.011 0.011
120° 0.019 0.019 0.019 0.019
90° 0.024 0.024 0.026 0.026
60° 0.035 0.035 0.036 0.037
30° 0.060 0.060 0.060 0.061
Note
• The table above shows the increment of thermal resistance R
T
R
R
, T
J
thJ-hs
thC-hs
Stg
DC operation single side cooled 0.17
DC operation double side cooled 0.08
DC operation single side cooled 0.033
DC operation double side cooled 0.017
when devices operate at different conduction angles than DC
thJ-hs
- 40 to 150 °C
4900
(500)
TEST CONDITIONS UNITS
T
= TJ maximum K/W
J
K/W
N
(kg)
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94401
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