Vishay VS-ST230C Series Data Sheet
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TO-200AB (A-PUK)
PRODUCT SUMMARY
Package TO-200AB (A-PUK)
Diode variation Single SCR
I
T(AV)
V
DRM/VRRM
V
TM
I
GT
T
J
400 V, 800 V, 1200 V, 1400 V,
1600 V, 1800 V, 2000 V
Phase Control Thyristors
(Hockey PUK Version), 410 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case TO-200AB (A-PUK)
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
• AC controllers
410 A
1.69 V
90 mA
-40 °C to 125 °C
VS-ST230C Series
Vishay Semiconductors
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER TEST CONDITIONS VALUES UNITS
I
T(AV)
I
T(RMS)
I
TSM
2
t
I
V
DRM/VRRM
t
q
T
J
T
hs
T
hs
50 Hz 5700
60 Hz 5970
50 Hz 163
60 Hz 149
Typical 100 μs
410 A
55 °C
780 A
25 °C
400 to 2000 V
-40 to 125 °C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
, MAXIMUM
VOLTAGE
V
V
, MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
1
RSM
V
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TYPE NUMBER
VS-ST230C..C
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
V
VOLTAGE
CODE
04 400 500
08 800 900
12 1200 1300
14 1400 1500
16 1600 1700
18 1800 1900
20 2000 2100
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
REPETITIVE PEAK AND OFF-STATE
DRM/VRRM
A
kA2s
I
DRM/IRRM,
AT T
Document Number: 94398
MAXIMUM
= TJ MAXIMUM
J
mA
30
VS-ST230C Series
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ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current I
T(RMS)
Maximum peak, one-cycle
non-repetitive surge current
Maximum I
Maximum I
2
t for fusing I2t
2
t for fusing I2t t = 0.1 to 10 ms, no voltage reapplied 1630 kA2s
Low level value of threshold voltage V
High level value of threshold voltage V
Low level value of on-state slope resistance r
High level value of on-state slope resistance r
Maximum on-state voltage V
Maximum holding current I
Maximum (typical) latching current I
I
T(AV)
I
TSM
T(TO)1
T(TO)2
t1
t2
TM
H
L
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled 780
t = 10 ms
t = 8.3 ms 5970
t = 10 ms
t = 8.3 ms 5000
t = 10 ms
t = 8.3 ms 148
t = 10 ms
t = 8.3 ms 105
(16.7 % x x I
(I > x I
(16.7 % x x I
(I > x I
No voltage
reapplied
100 % V
reapplied
RRM
No voltage
reapplied
100 % V
reapplied
), TJ = TJ maximum 0.98
T(AV)
), TJ = TJ maximum 0.81
T(AV)
T(AV)
T(AV)
RRM
< I < x I
< I < x I
Ipk = 880 A, TJ = TJ maximum, tp = 10 ms sine pulse 1.69 V
TJ = 25 °C, anode supply 12 V resistive load
Vishay Semiconductors
Sinusoidal half wave,
initial T
= TJ maximum
J
), TJ = TJ maximum 0.92
T(AV)
), TJ = TJ maximum 0.88
T(AV)
410 (165) A
55 (85) °C
5700
4800
163
115
600
1000 (300)
A
kA2s
V
m
mA
SWITCHING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum non-repetitive rate of rise
of turned-on current
dI/dt
Typical delay time t
Typical turn-off time t
Gate drive 20 V, 20 , t
T
= TJ maximum, anode voltage 80 % V
J
d
q
Gate current 1 A, dIg/dt = 1 A/μs
V
= 0.67 % V
d
DRM
ITM = 300 A, TJ = TJ maximum, dI/dt = 20 A/μs,
V
= 50 V, dV/dt = 20 V/μs, gate 0 V 100 , tp = 500 μs
R
1 μs
r
, TJ = 25 °C
DRM
1000 A/μs
1.0
μs
100
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise
of off-state voltage
Maximum peak reverse and
off-state leakage current
dV/dt T
I
,
RRM
I
DRM
= TJ maximum linear to 80 % rated V
J
TJ = TJ maximum, rated V
DRM/VRRM
DRM
500 V/μs
applied 30 mA
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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Document Number: 94398
VS-ST230C Series
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TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS
Maximum peak gate power P
Maximum average gate power P
Maximum peak positive gate current I
Maximum peak positive gate voltage + V
Maximum peak negative gate voltage - V
DC gate current required to trigger I
DC gate voltage required to trigger V
GM
G(AV)
GM
GM
GM
GT
GT
TJ = TJ maximum, tp 5 ms 10.0
TJ = TJ maximum, f = 50 Hz, d% = 50 2.0
TJ = TJ maximum, tp 5 ms 3.0 A
TJ = TJ maximum, tp 5 ms
TJ = - 40 °C
T
= 25 °C 90 150 mA
J
= 125 °C 40 -
T
J
TJ = - 40 °C 2.9 -
= 25 °C 1.8 3.0
J
T
= 125 °C 1.2 -
J
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
Vishay Semiconductors
VALUES
TYP. MAX.
20
5.0
180 -
UNITS
W
V
VT
DC gate current not to trigger I
DC gate voltage not to trigger V
GD
TJ = TJ maximum
GD
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
cathode applied
anode to
DRM
10 mA
0.25 V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum operating temperature range T
Maximum storage temperature range T
Maximum thermal resistance,
junction to heatsink
Maximum thermal resistance,
case to heatsink
R
R
J
Stg
thJ-hs
thC-hs
DC operation single side cooled 0.17
DC operation double side cooled 0.08
DC operation single side cooled 0.033
DC operation double side cooled 0.017
Mounting force, ± 10 %
Approximate weight 50 g
Case style See dimensions - link at the end of datasheet TO-200AB (A-PUK)
R
CONDUCTION
thJC
CONDUCTION ANGLE
SINUSOIDAL CONDUCTION RECTANGULAR CONDUCTION
SINGLE SIDE DOUBLE SIDE SINGLE SIDE DOUBLE SIDE
180° 0.015 0.017 0.011 0.011
120° 0.018 0.019 0.019 0.019
90° 0.024 0.024 0.026 0.026
60° 0.035 0.035 0.036 0.036
30° 0.060 0.060 0.060 0.061
Note
• The table above shows the increment of thermal resistance R
when devices operate at different conduction angles than DC
thJC
- 40 to 125
- 40 to 150
4900
(500)
TEST CONDITIONS UNITS
T
= TJ maximum K/W
J
°C
K/W
N
(kg)
Revision: 16-Dec-13
For technical questions within your region: DiodesAmericas@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94398
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