VISHAY TFDU4300 Technical data

Infrared Transceiver Module (SIR, 115.2 kbit/s)
for IrDA

Description

The TFDU4300 is a low profile (2.5 mm) infrared
transceiver module with independent logic reference
voltage (V
compliant to the latest IrDA
for fast infrared data communication, supporting

®

IrDA

speeds up to 115.2 kbit/s (SIR) and carrier
based remote control. The transceiver module con­sists of a PIN photodiode, an infrared emitter (IRED),
and a low-power control IC to provide a total front-end
solution in a single package.

This device covers an extended IrDA
range of close to 1 m. With an external current control
resistor the current can be adjusted for shorter
ranges.

This Vishay SIR transceiver is built in a new smaller
package using the experiences of the lead frame
BabyFace technology.

®

applications

) for low voltage IO interfacing. It is

logic

®

physical layer standard

®

low power

The RXD output pulse width is independent of the
optical input pulse width and stays always at a fixed
pulse width thus making the device optimum for stan­dard Endecs. TFDU4300 has a tri-state output and is
floating in shut-down mode with a weak pull-up.

TFDU4300

Vishay Semiconductors

18065

Features

• Compliant to the latest IrDA® physical
layer specification (9.6 kbit/s to

115.2 kbit/s) and TV Remote Control,
bi-directional operation included.

• Operates from 2.4 V to 5.5 V within specification
over full temperature range from - 30 °C to + 85 °C

• Logic voltage 1.5 V to 5.5 V is independent of
IRED driver and analog supply voltage

• Split power supply, transmitter and receiver can be
operated from two power supplies with relaxed
requirements saving costs, US Patent No.
6,157,476

• Extended IrDA

• Typical Remote Control range 12 m

• Low power consumption
(< 0.12 mA supply current)

• Power shutdown mode (< 5 µA shutdown current
in full temperature range, up to 85 °C)

®

Low Power range to about 70 cm

e3

Applications

• Ideal for battery operated applications

• Telecommunication products

(cellular phones, pagers)

• Digital still and video cameras

• Printers, fax machines, photocopiers, screen

• projectors

• Medical and industrial data collection

• Diagnostic systems

• Surface mount package, low profile (2.5 mm)

- (L 8.5 mm × H 2.5 mm × W 2.9 mm)

• High efficiency emitter

• Low profile (universal) package capable of
surface mount soldering to side and top view
orientation

• Directly interfaces with various Super I/O and con­troller devices as e.g. TOIM4232

• Tri-state-receiver output, floating in shut down with
a weak pull-up

• Compliant with IrDA background light
specification

• EMI immunity in GSM bands > 300 V/m verified

• Lead (Pb)-free device

• Device in accordance to RoHS 2002/95/EC and
WEEE 2002/96EC

• Notebook computers, desktop PCs,

Palmtop computers (Win CE, Palm PC), PDAs

• Internet TV boxes, video conferencing systems

• External infrared adapters (Dongles)

• Data loggers

• GPS

• Kiosks, POS, Point and Pay devices including

IrFM - applications

Document Number 82614

Rev. 1.5, 05-Dec-05

www.vishay.com

1

TFDU4300

RED C

Vishay Semiconductors

Parts Table

Part Description Qty / Reel

TFDU4300-TR1 Oriented in carrier tape for side view surface mounting 750 pcs

TFDU4300-TR3 Oriented in carrier tape for side view surface mounting 2500 pcs

TFDU4300-TT1 Oriented in carrier tape for top view surface mounting 750 pcs

TFDU4300-TT3 Oriented in carrier tape for top view surface mounting 2500 pcs

Functional Block Diagram

V

logic

Push-Pull

Amplifier

Comparator

Driver

RXD

Vcc2

18282

SD

TXD

Logic
&

Control

Controlled Driver

GND

Pin Description

Pin Number Function Description I/O Active

1V

CC2

IRED Anode

Connect IRED anode directly to the power supply (V

current can be decreased by adding a resistor in series between the

power supply and IRED anode. A separate unregulated power

supply can be used at this pin.

2 IRED Cathode IRED Cathode, internally connected to the driver transistor

3 TXD This Schmitt-Trigger input is used to transmit serial data when SD

is low. An on-chip protection circuit disables the LED driver if the

TXD pin is asserted for longer than 300 μs. The input threshold

voltage adapts to and follows the logic voltage swing defined by the

applied V

logic

voltage.

4 RXD Received Data Output, push-pull CMOS driver output capable of

driving standard CMOS or TTL loads. During transmission the RXD

output is inactive. No external pull-up or pull-down resistor is

required. Floating with a weak pull-up of 500 kΩ (typ.) in shutdown

mode. The voltage swing is defined by the applied V

5 SD Shutdown. The input threshold voltage adapts to and follows the

logic voltage swing defined by the applied V

6V

7V

CC1

logic

V

defines the logic voltage level of the I/O ports to adap the logic

logic

Supply Voltage

voltage swing to the IR controller. The RXD output range is from 0

V to V

, for optimum noise suppression the inputs- logic decision

logic

level is 0.5 x V

logic

8 GND Ground

logic

). IRED

CC2

voltage

logic

voltage.

IHIGH

OLOW

IHIGH

I

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2

Document Number 82614

Rev. 1.5, 05-Dec-05

TFDU4300

Vishay Semiconductors

Pinout

TFDU4300
weight 75 mg

Definitions:

In the Vishay transceiver data sheets the following nomenclature is

used for defining the IrDA

®

operating modes:

SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared

standard with the physical layer version IrPhy 1.0

MIR: 576 kbit/s to 1152 kbit/s

FIR: 4 Mbit/s

VFIR: 16 Mbit/s

MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy

1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the

Low Power Option to MIR and FIR and VFIR was added with IrPhy

1.4.A new version of the standard in any case obsoletes the former

version.

With introducing the updated versions the old versions are obso-

lete. Therefore the only valid IrDA

®

standard is the actual version

18101

1234

IRED A

IRED C

TXD

56

RXD SD Vcc

7

Vlog

8

GND

IrPhy 1.4 (in Oct. 2002).

Absolute Maximum Ratings

Reference point Ground (pin 8) unless otherwise noted.
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

Parameter Test Conditions Symbol Min Ty p. Max Unit

Supply voltage range,
transceiver

Supply voltage range,
transmitter

Supply voltage range, V

logic

- 0.3 V < V

- 0.5 V < V

- 0.5 V < V

- 0.5 V < V

- 0.5 V < V

- 0.3 V < V

RXD output voltage - 0.5 V < V

- 0.3 V < V

Voltage at all inputs Note: V

in

< 6 V

CC2

< 6 V

logic

< 6 V

CC1

< 6 V

logic

< 6 V

CC1

< 6 V

CC2

< 6 V

CC1

< 6 V

logic

≥ V

is allowed V

CC1

V

V

V

V

CC1

CC2

logic

RXD

IN

Input current for all pins, except IRED anode

pin

Output sinking current 25 mA

Power dissipation see derating curve P

Junction temperature T

Ambient temperature range
(operating)

Storage temperature range T

D

J

T

amb

stg

Soldering temperature see recommended solder profile 260 °C

Average output current, pin 1 I

Repetitive pulsed output
current, pin 1 to pin 2

t < 90 μs, t

< 20 % I

on

IRED(DC)

IRED(RP)

- 0.5 + 6.0 V

- 0.5 + 6.0 V

- 0.5 + 6.0 V

- 0.5 V

+ 0.5 V

logic

- 0.5 + 6.0 V

10 mA

250 mW

125 °C

- 30 + 85 °C

- 40 + 100 °C

125 mA

600 mA

Document Number 82614

Rev. 1.5, 05-Dec-05

www.vishay.com

3

TFDU4300

Vishay Semiconductors

Eye safety information

Parameter Test Conditions Symbol Min Ty p. Max Unit

Virtual source size Method: (1-1/e) encircled

energy

Maximum intensity for class 1 IEC60825-1 or EN60825-1,

edition Jan. 2001, operating
below the absolute maximum
ratings

*)

Due to the internal limitation measures the device is a "class 1" device under all conditions.

**)

IrDA specifies the max. intensity with 500 mW/sr.

Note: We apologize to use sometimes in our documentation the abbreviation LED and the word Light Emitting Diode instead of Infrared
Emitting Diode (IRED) for IR-emitters. That is by definition wrong; we are here following just a bad trend.

Typical values are for design aid only, not guaranteed nor subject to production testing and may vary with time.

d1.31.8 mm

I

e

*)

(500)

**)

mW/sr

www.vishay.com

4

Document Number 82614

Rev. 1.5, 05-Dec-05

Electrical Characteristics

Transceiver

Tested at T
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

Supply voltage Remark: For 2.4 V < V

Idle supply current at V
(receive mode, no signal)

Idle supply current at V
(receive mode, no signal)

Average dynamic supply
current, transmitting

Standby supply current SD = High, T = 25 °C, E

Standby supply current, V

Operating temperature range T

Output voltage low, RXD C

Output voltage high, RXD I

RXD to V

Input voltage low (TXD, SD) V

Input voltage high (TXD, SD)

Input voltage high (TXD, SD)

Input leakage current (TXD, SD) V

Controlled pull down current SD, TXD = "0" to "1",

Input capacitance (TXD, SD) C

*)

Standard illuminant A

**)

To provide an improved immunity with increasing V

recommended to use the specified min/max values to avoid increased operating current.

= 25 °C, V

amb

CC1

= V

= 2.7 V to 5.5 V unless otherwise noted.

CC2

Parameter Test Conditions Symbol Min Ty p. Max Unit

V

CC1

2.4 5.5 V

2.6 V at T

< - 25 °C a minor

amb

CC1

<

reduction of the receiver
sensitivity may occur

CC1

logic

SD = Low, E
T

amb

V

CC1

SD = Low, E
T

amb

V

CC1

SD = Low, E

= 1 klx*),

e

= - 25 °C to + 85 °C,

= V

= 2.7 V to 5.5 V

CC2

= 1 klx*),

e

= 25 °C,

= V

= 2.7 V to 5.5 V

CC2

= 1 klx*), V

e

log

,

I

CC1

I

CC1

I

log

pin 7, no signal, no load at RXD

I

= 300 mA, 20 % Duty

IRED

I

CC1

Cycle

= 0 klx I

e

SD = High, T = 70 °C I

SD = High, T = 85 °C I

no signal, no load I

logic

= 15 pF V

Load

= - 500 μAV

OH

I

= - 250 μA, C

OH

impedance R

CC1

CMOS level

CMOS level

= 0.9 x V

IN

V

< 0.15 V

IN

**)

**)

logic

, V

, V

logic

Load

logic

logic

= 15 pF V

≥ 2.5 V

< 2.5 V

SD, TXD = "0" to "1",
V

> 0.7 V

IN

logic

the typical threshold level is increasing with V

logic

V

V

I

I

IRTx

I

IRTx

SD

SD

SD

log

A

OL

OH

OH

RXD

IL

IH

IH

ICH

IN

- 30 + 85 °C

- 0.5 0.15 x V

0.8 x V

logic

0.9 x V

logic

400 500 600 kΩ

- 0.5 0.5 V

V

- 0.5 6 V

logic

0.8 x V

logic

- 2 + 2 μA

- 1 0 1 μA

TFDU4300

Vishay Semiconductors

90 130 μA

75 μA

1 μA

0.65 mA

0.1 μA

2 μA

3 μA

1 μA

logic

V

+ 0.5 V

logic

V

+ 0.5 V

logic

6V

+ 150 μA

5pF

and set to 0.5 x V

logic

V

logic

. It is

Document Number 82614

Rev. 1.5, 05-Dec-05

www.vishay.com

5

TFDU4300

Vishay Semiconductors

Optoelectronic Characteristics

Receiver

Tested at T
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

Minimum irradiance E
angular range **)

Maximum Irradiance Ee In
Angular Range ***)

Maximum no detection
irradiance

Rise time of output signal 10 % to 90 %, CL = 15 pF t

Fall time of output signal 90 % to 10 %, C

RXD pulse width of output signal input pulse length > 1.2 μst

Stochastic jitter, leading edge

Standby /Shutdown delay,
receiver startup time

Latency t

*)

Equivalent to IrDA® Background Light and Electromagnetic Field Test: Fluorescent Lighting Immunity.

**)

IrDA sensitivity definition: Minimum Irradiance Ee In Angular Range, power per unit area. The receiver must meet the BER specifica­tion while the source is operating at the minimum intensity in angular range into the minimum half-angular range at the maximum Link
Length.

***)

Maximum Irradiance Ee In Angular Range, power per unit area. The optical delivered to the detector by a source operating at the
maximum intensity in angular range at Minimum Link Length must not cause receiver overdrive distortion and possible ralated link errors.
If placed at the Active Output Interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER). For more defini­tions see the document “Symbols and Terminology” on the Vishay Website (http://www.vishay.com/docs/82512/82512.pdf).

= 25 °C, V

amb

CC1

= V

= 2.7 V to 5.5 V unless otherwise noted.

CC2

Parameter Test Conditions Symbol Min Ty p. Max Unit

in

e

9.6 kbit/s to 115.2 kbit/s

λ = 850 nm - 900 nm
α = 0 °, 15 °

λ = 850 nm - 900 nm E

λ = 850 nm - 900 nm

, tf < 40 ns,

t

r

= 1.6 μs at f = 115 kHz,

t

po

E

e

e

E

e

4

(0.4)

40
(4)

5

(500)

80
(8)

mW/m

(μW/cm

kW/m

(mW/cm2)

mW/m

(μW/cm

no output signal allowed

20 100 ns

20 100 ns

1.65 2.0 3.0 µs

250 ns

= 15 pF t

L

input irradiance = 100 mW/m

r(RXD)

f(RXD)

PW

2

,

≤ 115.2 kbit/s

after shutdown active or

150 µs

power-on

L

100 150 µs

2

2)

2

2

2)

www.vishay.com

6

Document Number 82614

Rev. 1.5, 05-Dec-05

TFDU4300

Vishay Semiconductors

Transmitter

Tested at T
Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.

IRED operating current
limitation

Forward voltage of built-in IRED I

Output leakage IRED current TXD = 0 V, 0 < V

Output radiant intensity α = 0 °, 15 °

Output radiant intensity, angle of
half intensity

Peak - emission wavelength

Spectral bandwidth Δλ 45 nm

Optical rise time, fall time t

Optical output pulse duration input pulse width 1.6 < t

Optical overshoot 25 %

*)

Using an external current limiting resistor is allowed and recommended to reduce IRED intensity and operating current when current
reduction is intended to operate at the IrDA
will allow a power minimized operation at IrDA

**)

Note: Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for

the standard Remote Control applications with codes as e.g. Phillips RC5/RC6

= 25 °C, V

amb

CC1

= V

= 2.7 V to 5.5 V unless otherwise noted.

CC2

Parameter Test Conditions Symbol Min Ty p. Max Unit

No external resistor for current

limitation

*)

= 300 mA V

f

< 5.5 V I

CC1

I

D

IRED

I

e

f

250 300 350 mA

1.4 1.8 1.9 V

- 1 1 µA

30 65 mW/sr

TXD = High, SD = Low

= 5.0 V, α = 0 °, 15 °

V

CC1

I

e

0.04 mW/sr

TXD = Low or SD = High
(Receiver is inactive as long as
SD = High)

α ± 24 °

**)

< 20

TXD

ropt

λ

p

, t

fopt

t

opt

880 900 nm

100 ns

t

-0.15 t

TXD

+ 0.15 µs

TXD

µs

input pulse width t

®

low power conditions. E.g. for V

®

low power conditions.

≥ 20 µs t

TXD

opt

= 3.3 V a current limiting resistor of RS = 56 Ω

CC2

®

or RECS 80.

20 300 µs

Document Number 82614

Rev. 1.5, 05-Dec-05

www.vishay.com

7

TFDU4300

Vishay Semiconductors

Recommended Circuit Diagram

Operated with a clean low impedance power supply
the TFDU4300 needs no additional external compo­nents. However, depending on the entire system
design and board layout, additional components may
be required (see figure 1).

V

IRED

V

cc

GND

V

logic

SD

TXD

RXD

19295

Figure 1. Recommended Application Circuit

C1

R1 *)

R2

C2

*) R1 is optional when reduced intensity is used

The capacitor C1 is buffering the supply voltage and
eliminates the inductance of the power supply line.
This one should be a Tantalum or other fast capacitor
to guarantee the fast rise time of the IRED current.
The resistor R1 is the current limiting resistor, which
may be used to reduce the operating current to levels
below the specified controlled values for saving bat­tery power.
Vishay’s transceivers integrate a sensitive receiver
and a built-in power driver. The combination of both
needs a careful circuit board layout. The use of thin,
long, resistive and inductive wiring should be avoided.
The shutdown input must be grounded for normal
operation, also when the shutdown function is not
used.

, IRED A

V

cc2

V

cc1

Ground

V

logic

SD

TXD

RXD

IRED C

The inputs (TXD, SD) and the output RXD should be
directly connected (DC - coupled) to the I/O circuit.
The capacitor C2 combined with the resistor R2 is the
low pass filter for smoothing the supply voltage. R2,
C1 and C2 are optional and dependent on the quality
of the supply voltages VCC1 and injected noise. An
unstable power supply with dropping voltage during
transmision may reduce the sensitivity (and transmis­sion range) of the transceiver.

The placement of these parts is critical. It is strongly
recommended to position C2 as close as possible to
the transceiver pins.

When extended wiring is used as in bench tests the
inductance of the power supply can cause dynami­cally a voltage drop at VCC2. Often some power sup­plies are not able to follow the fast current rise time.
In that case another 4.7 µF (type, see table under C1)
at VCC2 will be helpful.

Under extrem EMI conditions as placing an RF-trans­mitter antenna on top of the transceiver, we recom­mend to protect all inputs by a low-pass filter, as a
minimum a 12 pF caoacitor, especially at the RXD
port. The transceiver itself withstands EMI at a GSM
frequencies above 500 V/m. When interference is
observed, the wiring to the inputs picks it up. It is ver­ified by DPI measurements that as long as the inter­fering RF - voltage is below the logic threshold levels
of the inputs and equivalent levels at the outputs no
interferences are expected.

One should keep in mind that basic RF - design rules
for circuits design should be taken into account.
Especially longer signal lines should not be used with­out termination. See e.g. “The Art of Electronics” Paul
Horowitz, Winfield Hill, 1989, Cambridge University
Press, ISBN: 0521370957.

Table 1.
Recommended Application Circuit Com­ponents

Compo

nent

C1 4.7 µF, 16 V 293D 475X9 016B

C2 0.1 µF, Ceramic VJ 1206 Y 104 J XXMT

R1 depends on current to be

R2 47 Ω, 0.125 W CRCW-1206-47R0-F-RT1

www.vishay.com

8

Recommended Value Vishay Part Number

adjusted

Document Number 82614

Rev. 1.5, 05-Dec-05

19296

TFDU4300

Vishay Semiconductors

Figure 2. Typical application circuit

Figure 2 shows an example of a typical application for
to work with low voltage logic (connected to V
seperate supply voltage V

and using the transceiver

S

DD

), a

with the IRED Anode connebcted to the unregulated
battery V

. This method reduces the peak load of

batt

the regulated power supply and saves therefore
costs. Alternatively all supplies can also be tied to
only one voltage source. R1 and C1 are not used in
this case and are depending on the circuit design in
most cases not necessary.

I/O and Software

In the description, already different I/Os are men­tioned. Different combinations are tested and the
function verified with the special drivers available
from the I/O suppliers. In special cases refer to the
I/O manual, the Vishay application notes, or contact
directly Vishay Sales, Marketing or Application.
For operating at RS232 ports the ENDEC TOIM4232
is recommended.

Current Derating Diagram

Figure 3 shows the maximum operating temperature
when the device is operated without external current
limiting resisor.

90

85

80

75

70

65

60

Ambient Temperature (°C)

55

50

2.0 2.5 3.0 3.5 4.0

18097

Operating Voltage [V] at duty cycle 20 %

Figure 3. Current Derating Diagram

4.5

5.0 5.5 6.0

Document Number 82614

Rev. 1.5, 05-Dec-05

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9

TFDU4300

Vishay Semiconductors

Table 2. Truth table

Inputs Outputs Remark

SD TXD

high

> 1 ms

low high x high inactive I

low high

> 50 µs

low low < 4 high inactive 0 Ignoring low signals below the

low low > Min. irradiance E

low low > Max. Irradiance E

Optical input Irradiance mW/m

x x weakly pulled

x high inactive 0 Protection is active

< Max. irradiance E

2

e

e

e

RXD Transmitter Operation

0 Shutdown

(500 kΩ) to V

low (active) 0

undefined 0 Overload conditions can cause

CC1

e

IrDA

Response to an IrDA

Transmitting

®

defined threshold for noise

immunity

®

optical input signal

unexpected outputs

compliant

www.vishay.com

10

Document Number 82614

Rev. 1.5, 05-Dec-05

Recommended Solder Profiles for TFDU4300

Time/s

10 s max. at 230 °C

120 s...180 s

240 °C max.

30 s max.

T

peak

= 260 °C

Solder Profile for Sn/Pb soldering

260

240

220

200

180

160

140

120

100

80

Tem perat ure/°C

60

40

20

0

2...4 °C/s

0 50 100 150 200 250 300 350

160 °C max.

Figure 4. Recommended Solder Profile for Sn/Pb soldering

2...4 °C/s

90 s max.

19431_1

TFDU4300

Vishay Semiconductors

Lead-Free, Recommended Solder Profile

The TFDU4300 is a lead-free transceiver and quali­fied for lead-free processing. For lead-free solder
paste like Sn-(3.0 - 4.0)Ag-(0.5 - 0.9)Cu, there are two
standard reflow profiles: Ramp-Soak-Spike (RSS)
and Ramp-To-Spike (RTS). The Ramp-Soak-Spike
profile was developed primarily for reflow ovens
heated by infrared radiation. With widespread use of
forced convection reflow ovens the Ramp-To-Spike
profile is used increasingly. Shown below in figure 5 is
Vishay’s recommended profile for use with the
TFDU4300 transceivers. For more details please
refer to Application note: SMD Assembly Instruction

.

275

250

225

200

175

150

125

100

Temperature/°C

75

50

25

0

0 50 100 150 200 250 300 350

19532_1

T ≥ 255 °C for 10 s....30 s

T ≥ 217 °C for 70 s max

2°C...3°C/s

90 s...120 s

70 s max.

Time/s

Figure 5. Solder Profile, RSS Recommendation

2°C...4°C/s

Document Number 82614

Rev. 1.5, 05-Dec-05

www.vishay.com

11

TFDU4300

0

20

40

60

80

100

120

140

160

180

200

220

240

260

280

0 50 100 150 200 250 300

Time/s

Tempe ratur e/°C

<4 °C/s

1.3 °C/s

Time above 217 °C t ≤ 70 s
Time above 250 °C t ≤ 40 s
Peak temperature T

peak

= 260 °C

<2 °C/s

T

peak

= 260 °C max

Vishay Semiconductors

A ramp-up rate less than 0.9 °C/s is not recommended. Ramp-up rates faster than 1.3 °C/s damage an optical
part because the thermal conductivity is less than compared to a standard IC.

www.vishay.com

12

Figure 6. Solder Profile, RTS Recommendation

Document Number 82614

Rev. 1.5, 05-Dec-05

Package Dimensions in mm

TFDU4300

Vishay Semiconductors

Document Number 82614

Rev. 1.5, 05-Dec-05

19700

www.vishay.com

13

TFDU4300

Vishay Semiconductors

Reel Dimensions

14017

Tape Width A max. N W1 min. W2 max. W3 min. W3 max.

mm mm mm mm mm mm mm

16 180 60 16.4 22.4 15.9 19.4

16 330 50 16.4 22.4 15.9 19.4

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14

Document Number 82614

Rev. 1.5, 05-Dec-05

Tape Dimensions in mm

TFDU4300

Vishay Semiconductors

Drawing-No.: 9.700-5280.01-4
Issue: 1; 03.11.03

Document Number 82614

Rev. 1.5, 05-Dec-05

19855

Figure 7. Tape drawing, TFDU4300 for top view mounting

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15

TFDU4300

Vishay Semiconductors

Drawing-No.: 9.700-5279.01-4
Issue: 1; 08.12.04

www.vishay.com

16

19856

Figure 8. Tape drawing, TFDU4300 for side view mounting

Document Number 82614

Rev. 1.5, 05-Dec-05

TFDU4300

Vishay Semiconductors

Ozone Depleting Substances Policy Statement

It is the policy of Vishay Semiconductor GmbH to

1. Meet all present and future national and international statutory requirements.

2. Regularly and continuously improve the performance of our products, processes, distribution and operating

systems with respect to their impact on the health and safety of our employees and the public, as well as
their impact on the environment.

It is particular concern to control or eliminate releases of those substances into the atmosphere which are
known as ozone depleting substances (ODSs).

The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs
and forbid their use within the next ten years. Various national and international initiatives are pressing for an
earlier ban on these substances.

Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use
of ODSs listed in the following documents.

1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments

respectively

2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental

Protection Agency (EPA) in the USA

3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.

Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting
substances and do not contain such substances.

We reserve the right to make changes to improve technical design

and may do so without further notice.

Parameters can vary in different applications. All operating parameters must be validated for each

customer application by the customer. Should the buyer use Vishay Semiconductors products for any

unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all

claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal

damage, injury or death associated with such unintended or unauthorized use.

Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany

Document Number 82614

Rev. 1.5, 05-Dec-05

www.vishay.com

17

Legal Disclaimer Notice

Vishay

Document Number: 91000 www.vishay.com
Revision: 08-Apr-05 1

Notice

Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.

Information contained herein is intended to provide a product description only. No license, express or implied, by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Vishay's
terms and conditions of sale for such products, Vishay assumes no liability whatsoever, and disclaims any express
or implied warranty, relating to sale and/or use of Vishay products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright, or other intellectual property right.

The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications.
Customers using or selling these products for use in such applications do so at their own risk and agree to fully
indemnify Vishay for any damages resulting from such improper use or sale.