Vishay SiR472DP Schematic

N-Channel 30-V (D-S) MOSFET

C

T

SiR472DP

Vishay Siliconix

PRODUCT SUMMARY

VDS (V) R

30

0.012 at V

0.015 at V

DS(on)

(Ω)

GS

= 10 V

= 4.5 V

a, g

I

(A)

D

20

Qg (Typ.)

6.8 nC

FEATURES

• Halogen-free

• TrenchFET

• Low Thermal Resistance PowerPAK Package with Low 1.07 mm Profile

®

Power MOSFET

®

RoHS

OMPLIAN

• Optimized for High-Side Synchronous Rectifier

PowerPAK SO-8

6.15 mm

D

8

D

7

D

6

5

Bottom View

Ordering Information: SiR472DP-T1-GE3 (Lead (Pb)-free and Halogen-free)

S

1

D

5.15 mm

S

2

S

3

G

4

Operation

• 100 % R

Tested

g

• 100 % UIS Tested

APPLICATIONS

• Notebook CPU Core

- High-Side Switch

D

G

S

N-Channel MOSFET

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter Symbol Limit Unit

Drain-Source Voltage Gate-Source Voltage

= 25 °C

T

C

T

= 70 °C

Continuous Drain Current (T

= 150 °C)

J

C

TA = 25 °C TA = 70 °C

Pulsed Drain Current

T

= 25 °C

Continuous Source-Drain Diode Current

Single Pulse Avalanche Current Avalanche Energy

Maximum Power Dissipation

C

TA = 25 °C

L = 0.1 mH

T

= 25 °C

C

T

= 70 °C

C

= 25 °C

T

A

TA = 70 °C

Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature)

d, e

V

DS

V

GS

I

D

I

DM

I

S

I

AS

E

AS

± 20

20

20 14 11

20

3.2

30

50

22 24

b, c

V

g

A

g

mJ

29.8

P

D

T

, T

J

stg

19.0

b, c

3.9

b, c

2.5

- 55 to 150 260

W

°C

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient Maximum Junction-to-Case (Drain) Steady State

Notes: a. Base on T b. Surface Mounted on 1" x 1" FR4 board.

= 25 °C.

C

c. t = 10 s. d. See Solder Profile (

http://www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed

copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and

is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components. f. Maximum under Steady State conditions is 70 °C/W. g. Package Limited.

Document Number: 68897 S-82488-Rev. C, 13-Oct-08

b, f

t ≤ 10 s

R

thJA

R

thJC

27 32

3.5 4.2

°C/W

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1

SiR472DP

Vishay Siliconix

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

Parameter Symbol Test Conditions Min. Typ. Max. Unit

Static

Drain-Source Breakdown Voltage

V

Temperature Coefficient ΔVDS/T

DS

V

Temperature Coefficient ΔV

GS(th)

Gate-Source Threshold Voltage

Gate-Source Leakage

Zero Gate Voltage Drain Current

On-State Drain Current

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

b

a

Input Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Gate Resistance

Tur n -O n De l ay T i m e

Rise Time

Turn-Off Delay Time

Fall Time

Tur n -O n De l ay T i m e

Rise Time

Turn-Off Delay Time

Fall Time

V

DS

J

GS(th)/TJ

V

GS(th)

I

GSS

I

DSS

I

V

D(on)

R

DS(on)

g

fs

C

iss

C

oss

C

rss

Q

g

Q

gs

Q

gd

R

g

t

d(on)

t

r

t

d(off)

t

f

t

d(on)

t

r

t

d(off)

t

f

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current

Pulse Diode Forward Current

a

Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Reverse Recovery Fall Time

Reverse Recovery Rise Time

I

S

I

SM

V

SD

t

rr

Q

rr

t

a

t

b

Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %. b. Guaranteed by design, not subject to production testing.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the de vice. These are stress rating s only, and functiona l operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

VGS = 0 V, ID = 250 µA

ID = 250 µA

V

= VGS, ID = 250 µA

DS

VDS = 0 V, VGS = ± 20 V

V

DS

= 30 V, V

DS

= 30 V, V

V

GS

≥ 5 V, V

DS

V

= 10 V, ID = 13.8 A

GS

= 4.5 V, ID = 12.4 A

GS

= 0 V

GS

= 0 V, TJ = 55 °C

= 10 V

GS

VDS = 15 V, ID = 13.8 A

VDS = 15 V, V

V

= 15 V, V

DS

= 0 V, f = 1 MHz

GS

= 10 V, ID = 13.8 A

GS

= 5 V, ID = 13.8 A

GS

f = 1 MHz 0.36 1.8 3.6 Ω

V

= 15 V, RL = 1.4 Ω

DD

≅ 11 A, V

I

D

V

≅ 11 A, V

I

D

DD

= 4.5 V, Rg = 1 Ω

GEN

= 15 V, RL = 1.4 Ω

= 10 V, Rg = 1 Ω

GEN

TC = 25 °C

IS = 2.6 A

IF = 11 A, dI/dt = 100 A/µs, TJ = 25 °C

30 V

28

- 6

mV/°C

1.2 2.5 V

± 100 nA

1

10

20 A

0.0097 0.0120

0.0122 0.0150

52 S

820

195

73

15 23

6.8 10.2

2.5

2.3

16 24

12 18

16 24

10 20

816

10 20

16 24

815

25

50

0.8 1.2 V

15 30 ns

612nC

8

7

µA

Ω

pFOutput Capacitance

nC

ns

A

ns

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Document Number: 68897

S-82488-Rev. C, 13-Oct-08

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

SiR472DP

Vishay Siliconix

50

VGS=10thru 4 V

40

30

20

- Drain Current (A)I

D

10

0

02468 10

- Drain-to-Source Voltage (V)

V

DS

VGS=3V

Output Characteristics

0.015

0.013

0.011

0.009

- On-Resistance (Ω)R

DS(on)

0.007

VGS=4.5V

VGS=10V

5

4

3

2

- Drain Current (A)I

D

1

0

0.0 0.5 1.0 1.5 2.0 2.5 3.0

- Gate-to-Source Voltage (V)

V

GS

TC=- 55 °C

TC= 25 °C

TC= 125 °C

Transfer Characteristics

1200

900

600

C - Capacitance (pF)

300

C

iss

C

oss

0.005 0 1020304050

On-Resistance vs. Drain Current and Gate Voltage

10

ID= 13.8 A

8

6

4

- Gate-to-Source Voltage (V)

GS

2

V

0

048 12 16

Document Number: 68897 S-82488-Rev. C, 13-Oct-08

ID- Drain Current (A)

VDS=15V

VDS= 24 V

Qg- Total Gate Charge (nC)

Gate Charge

C

rss

0

0 6 12 18 24 30

VDS- Drain-to-Source Voltage (V)

Capacitance

1.8

ID=13.8 A

1.5

1.2

- On-Resistance (Normalized)

DS(on)

R

0.9

0.6

- 50 - 25 0 25 50 75 100 125 150

-Junction Temperature (°C)

T

J

VGS=10V

VGS=4.5V

On-Resistance vs. Junction Temperature

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3

SiR472DP

Vishay Siliconix

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

100

10

TJ= 150 °C

1

0.1

- Source Current (A)I

S

0.01

0.001

0.0 0.2 0.4 0.6 0.8 1.0 1.2

VSD-Source-to-Drain Voltage (V)

Source-Drain Diode Forward Voltage

2.2

2.0

1.8

(V)V

1.6

GS(th)

1.4

1.2

ID= 250 µA

TJ= 25 °C

0.030

0.025

0.020

TJ= 125 °C

0.015

- On-Resistance (Ω)R

0.010

DS(on)

0.005

0.000 02468 10

VGS- Gate-to-Source Voltage (V)

TJ=25 °C

On-Resistance vs. Gate-to-Source Voltage

40

30

20

Power (W)

10

1.0

- 50 - 25 0 25 50 75 100 125 150

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TJ- Temperature (°C)

Threshold Voltage

- Drain Current (A)

D

I

0

0.01 0.1 1 10 100 1000

Single Pulse Power, Junction-to-Ambient

100

Limited byR

10

1

0.1 TA= 25 °C

Single Pulse

0.01

0.1 1 10 100

V

* V

> minimum VGSat which R

GS

*

DS(on)

BVDSS Limited

- Drain-to-Source Voltage (V)

DS

DS(on)

100 µs

1ms

10 ms

100 ms

1s 10 s

DC

is specified

Safe Operating Area, Junction-to-Ambient

Time (s)

Document Number: 68897

S-82488-Rev. C, 13-Oct-08

TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted

45

36

27

Package Limited

18

- Drain Current (A)

D

I

9

0

0 25 50 75 100 125 150

TC- Case Temperature (°C)

Current Derating*

SiR472DP

Vishay Siliconix

40

30

20

Power (W)

10

0

0 25 50 75 100 125 150

- Case Temperature (°C)

T

C

Power Derating, Junction-to-Case

* The power dissipation PD is based on T

= 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper

J(max)

2.5

2.0

1.5

Power (W)

1.0

0.5

0.0 0 25 50 75 100 125 150

T

-Ambient Temperature (°C)

A

Power Derating, Junction-to-Ambient

dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package

limit.

Document Number: 68897 S-82488-Rev. C, 13-Oct-08

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5

Vishay SiR472DP Schematic [ru]