VISHAY SiP41109, SiP41110 Technical data

查询SIP41109供应商

SiP41109/41110

New Product

Vishay Siliconix

Half-Bridge N-Channel MOSFET Driver for DC/DC Conversion

FEATURES APPLICATIONS

D PWM With Tri-State Enable
D 12-V Low-Side Gate Drive (SiP41109)
D 8-V Low-Side Gate Drive (SiP41110)
D Undervoltage Lockout
D Internal Bootstrap Diode
D Switching Frequency Up to 1 MHz
D 30-ns Max Propagation Delay
D Drive MOSFETs In 5- to 48-V Systems
D Adaptive Shoot-Through Protection

DESCRIPTION

The SiP41109 and SiP41110 are high-speed half-bridge
MOSFET drivers for use in high frequency, high current,
multiphase dc-to-dc synchronous rectifier buck power
supplies. They are designed to operate at switching
frequencies up to 1 MHz. The high-side driver is bootstrapped
to allow driving n-channel MOSFETs.

They feature adaptive shoot-through protection to prevent
simultaneous conduction of the external MOSFETs. There are
two options available for the voltage of the high-side and

D Multi-Phase DC/DC Conversion
D High Current Low Voltage DC/DC Converters
D High Frequency DC/DC Converters
D Mobile and Desktop Computer DC/DC Converters
D Core Voltage Supplies for PC Micro-Processors

low-side drivers. In the SiP41109, the regulator supplies gate
drive voltage to the high-side driver and V

CC

low-side driver. in the SiP41110, the regulator supplies the
high- and low-side gate drive voltage.

The SiP41109 and SiP41110 are assembled in a
lead (Pb)-free 8-pin SOIC package for operation over the
industrial operating range (−40 _C to 85 _C).

supplies the

TYPICAL APPLICATION CIRCUIT

+5 to 48 V

+12 V

Controller

PVcc

SiP41109/41110

PWM
(Tri-State)

V

CC

GND

BOOT

UGATE

PHASE

LGATE

V

OUT

GND

Document Number: 73023
S-51104—Rev. A, 13-Jun-05

GND

www.vishay.com

1

SiP41109/41110

mA

V

High-Side Drive C

c

V

− V

= 8 V

V

= 8 V

SiP4111 0

A

V

= 12 V

SiP41109

Vishay Siliconix

New Product

ABSOLUTE MAXIMUM RATINGS (ALL VOLTAGES REFERENCED TO GND = 0 V)

V CC, PV

CC

BOOT, PHASE −0.3 to 55 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

−0.3 to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Thermal Impedance (Q

SO-8 130_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

BOOT to PHASE −0.3 to 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage Temperature −40 to 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating Junction Temperature 125_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Power Dissipation

a

Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 7.7 mW/_C

SO-8 770 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

b

)

JA

RECOMMENDED OPERATING RANGE (ALL VOLTAGES REFERENCED TO GND = 0 V)

V

CC

V

LX

C

BOOT

10.8 to 13.2 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

.48 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

BOOT to PHASE . 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating Temperature Range −40 to 85_C. . . . . . . . . . . . . . . . . . . . . . . . . . .

.100 nF to 1 mF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

SPECIFICATIONS

a

Parameter Symbol

Power Supplies

Supply Voltage V

Quiescent Current I

Supply Current I

Tristate (Shutdown) Current I

Reference Voltage

Break-Before-Make V

PWM Input

Input High V

Input Low V

Bias Current I

Tristate Threshold

Tristate Holdoff Timeout

High V

Low V

c

Bootstrap Diode

Forward Voltage V

MOSFET Drivers

I

-

urrent

Low-Side Drive Current

c

c

PKH(source)

I

PKH(sink)

I

PKL(source)

I

PKL(sink)

I

PKL(source)

I

PKL(sink)

CCQ

CCT

BBM

TSH

t

TST

CC

DD

IH

IL

B

TSL

Test Conditions Unless Specified

VCC = 12 V, V

− V

BOOT

PHASE

TA = −40 to 85_C

= 8 V

Min

Limits

a

TypbMaxaUnit

10.8 13.2 V

PWM Non-Switching 5.6 9.5

f

= 100 kHz, C

PWM

LOAD

= 3 nF

SiP41109 12.5

SiP41110 11.0

mA

PWM = Open 850 1200 mA

2.5 V

4.0 V

CC

1.0

PWM 5 V or 0 V "600 "1000 mA

3.0

2.0

V

240 ns

F

IF = 40 mA, TA = 25_C 0.70 0.85 1.0 V

0.8

1.0

0.9

1.2

1.4

1.8

PVCC

PVCC

BOOT

−

PHASE

www.vishay.com

2

Document Number: 73023

S-51104—Rev. A, 13-Jun-05

SiP41109/41110

10% − 90%, V

− V

= 8 V, C

= 3 nF

10% − 90%, V

− V

= 12 V, C

= 3 nF

ns

V

V

_C

SPECIFICATIONS

Parameter UnitMax

New Product

a

Test Conditions Unless Specified

Test Conditions Unless Specified

Symbol

VCC = 12 V, V

VCC = 12 V, V

− V

− V

BOOT

BOOT

T

T

= −40 to 85_C

= −40 to 85_C

A

A

PHASE

PHASE

= 8 V

= 8 V

Vishay Siliconix

Limits

Min

a

Typ

b

a

MOSFET Drivers

R

High-Side Driver Impedance

Low-Side Driver Impedance

DH(source)

R

R

DL(source)

R

R

DL(source)

R

High-Side Rise Time t

High-Side Fall Time t

High-Side Rise Time Bypass

High-Side Fall Time Bypass

High-Side Propagation Delay

c

Low-Side Rise Time t

Low-Side Fall Time t

Low-Side Propagation Delay

DH(sink)

DL(sink)

DL(sink)

rH

fH

t

d(off)H

t

d(on)H

rL

fL

t

d(off)L

t

d(on)L

V

BOOT

V

−

−

10% − 90%, V

10% − 90%, V

10% − 90%, V

10% − 90%, V

C

C

C

C

V

PVCC

PVCC

− V

= 8 V, PHASE = GND

PHASE

= 8 V SiP41110

= 12 V SiP41109

−

BOOT

PHASE

−

BOOT

PHASE

See Timing Waveforms

BOOT

LOAD

BOOT

LOAD

BOOT

LOAD

BOOT

LOAD

− V

= 3 nF

− V

= 3 nF

− V

= 3 nF

− V

= 3 nF

PHASE

PHASE

PHASE

PHASE

= 8 V

= 12 V

= 8 V

= 12 V

See Timing Waveforms

LOAD

LOAD

SiP41110 40

SiP41109 40

SiP41110 30

SiP41109 30

2.3 4.2

1.9 3.5

2.9 5.2

1.3 2.4

2.4 4.3

1.2 2.2

45

35

45

35

15

15

15

15

PHASE Timer

PHASE Falling Timeout

c

t

PHASE

380 ns

PVCC Regulator

Output Voltage PV

Output Current I

Current Limit I

CC

PVCC

LIM

V

= 0 V 120 200 280

DRV

Line Regulation LNR VCC = 10.8 V to 13.2 V 0.05 0.5 %/V

Load Regulation LDR 5 mA to 80 mA 0.1 1.0 %

7.6 8 8.4 V

80 100

PVCC Regulator UVLO

PVCC Rising

PV

Falling

CC

UVLO2

Hysteresis Hyst 100 300 500 mV

6.7 7.2

6.4 6.9

High-Side Undervoltage Lockout

Threshold V

V

Undervoltage Lockout

CC

Threshold V

UVHS

UVLO1

Power on Reset Time POR 2.5 ms

Rising or Falling 2.5 3.35 4.0 V

5.0 5.3 5.6 V

Thermal Shutdown

Temperature T

Hysteresis T

Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at V

SD

H

Temperature Rising 165

Temperature Falling 25

= 12 V unless otherwise noted.

CC

W

ns

mA

_

Document Number: 73023
S-51104—Rev. A, 13-Jun-05

www.vishay.com

3