VISHAY SiE812DF Datasheet

SiE812DF

PRODUCT SUMMARY

VDS (V)

r

DS(on)

0.0026 at V

40

0.0034 at V

Package Drawing

http://www.vishay.com/doc?72945

D

(Ω)

GS

e

= 10 V

= 4.5 V

6 7 8 9 10 D S S G D

New Product

N-Channel 40-V (D-S) MOSFET

FEATURES

ID (A)

Silicon

Packag e

Limit

163

143

PolarPAK

67 89

a

Limit

60

Qg (Typ)

52 nC

10

D D S G

• TrenchFET® Gen II Power MOSFET

• Ultra Low Thermal Resistance Using Top-Exposed PolarPAK Double-Sided Cooling

• Leadframe-Based New Encapsulated Package

- Die Not Exposed

- Same Layout Regardless of Die Size

• Low Q

gd/Qgs

• 100 % R

APPLICATIONS

•VRM

• DC/DC Conversion: Low-Side

• Synchronous Rectification

Vishay Siliconix

®

Package for

Ratio Helps Prevent Shoot-Through

and UIS Tested

g

D

RoHS

COMPLIANT

G

D S S G D 5 4 3 2 1

Top View Bottom View

Top surface is connected to pins 1, 5, 6, and 10

Ordering Information: SiE812DF-T1-E3 (Lead (Pb)-free)

1 4 3 2 5

S

N-Channel MOSFET

For Related Documents

http://www.vishay.com/ppg?74337

ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted

Parameter Symbol Limit Unit

Drain-Source Voltage Gate-Source Voltage

Continuous Drain Current (T

= 150 °C)

J

= 25 °C

T

C

= 70 °C

T

C

V

DS

V

GS

60

I

D

TA = 25 °C TA = 70 °C

Pulsed Drain Current I

= 25 °C

T

Continuous Source-Drain Diode Current

Single Pulse Avalanche Current Avalanche Energy

Maximum Power Dissipation

C

TA = 25 °C

L = 0.1 mH

T

= 25 °C

C

T

= 70 °C

C

= 25 °C

T

A

DM

I

S

I

AS

E

AS

P

D

TA = 70 °C

T

Operating Junction and Storage Temperature Range

d, e

Soldering Recommendations (Peak Temperature)

Notes: a. Package limited. b. Surface Mounted on 1" x 1" FR4 board. c. t = 10 sec. d. See Solder Profile (http://www.vishay.com/doc?73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.

, T

J

stg

40

± 20

163 (Silicon Limit)

a

(Package Limit)

a

60

b, c

33

b, c

27

100

a

60

b, c

4.3 50

125 mJ 125

80

b, c

5.2

b, c

3.3

- 50 to 150 260

V

A

W

°C

Document Number: 74337 S-62025-Rev. A, 16-Oct-06

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1

SiE812DF

Vishay Siliconix

THERMAL RESISTANCE RATINGS

Parameter Symbol Typical Maximum Unit

Maximum Junction-to-Ambient

Maximum Junction-to-Case (Drain Top)

Maximum Junction-to-Case (Source)

Notes: a. Surface Mounted on 1" x 1" FR4 board. b. Maximum under Steady State conditions is 68 °C/W. c. Measured at source pin (on the side of the package).

SPECIFICATIONS TJ = 25 °C, unless otherwise noted

Parameter Symbol Test Conditions Min Typ Max Unit

Static

Drain-Source Breakdown Voltage V V

Temperature Coefficient ΔV

DS

Temperature Coefficient ΔV

V

GS(th)

Gate-Source Threshold Voltage

Gate-Source Leakage

Zero Gate Voltage Drain Current

On-State Drain Current

Drain-Source On-State Resistance

Forward Transconductance

Dynamic

Input Capacitance

Reverse Transfer Capacitance

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Gate Resistance

Tur n -On Del ay Time

Rise Time

Turn-Off Delay Time

Fall Time

Tur n -On Del ay Time

Rise Time

Turn-Off Delay Time

Fall Time

Drain-Source Body Diode Characteristics

Continuous Source-Drain Diode Current

Pulse Diode Forward Current Body Diode Voltage

Body Diode Reverse Recovery Time

Body Diode Reverse Recovery Charge

Reverse Recovery Fall Time

Reverse Recovery Rise Time

Notes: a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 % b. Guaranteed by design, not subject to production testing.

b

a, b

a, c

a

t ≤ 10 sec R

Steady State

DS

DS /TJ

GS(th) /TJ

V

GS(th)

I

GSS

I

DSS

I

V

D(on)

r

DS(on)

g

fs

C

iss

C

oss

C

rss

Q

g

Q

gs

Q

gd

R

g

t

d(on)

t

r

t

d(off)

t

f

t

d(on)

t

r

t

d(off)

t

f

I

S

I

SM

V

SD

t

rr

Q

rr

t

a

t

b

R

thJC

V

GS

VDS = V

V

DS

V

= 40 V, V

DS

V

= 20 V, V

V

DS

= 20 V, V

V

DS

V

= 10 V, V

DS

V

≅ 10 A, V

I

D

V

≅ 10 A, V

I

D

IF = 10 A, di/dt = 100 A/µs, TJ = 25 °C

thJA

(Drain) 0.8 1

thJC

20 24

(Source) 2.2 2.7

= 0 V, ID = 250 µA

ID = 250 µA

, ID = 250 µA

GS

= 0 V, V

= 40 V, V

DS

≥ 5 V, V

DS

= 10 V, ID = 25 A

GS

= 4.5 V, ID = 25 A

GS

= 20 V, ID = 25 A

DS

= ± 20 V

GS

= 0 V, TJ = 55 °C

GS

= 0 V

= 10 V

40 V

45.5

- 7.1

1.5 2.3 3 V

± 100 nA

1

10

25 A

0.0022 0.0026

0.0028 0.0034

154 S

8300

= 0 V, f = 1 MHz

GS

800

360

= 10 V, ID = 25 A

GS

111 170

52 80

= 4.5 V, ID = 20 A

GS

25

15

f = 1 MHz 1.15 1.7 Ω

50 75

= 20 V, RL = 2 Ω

DD

= 4.5 V, Rg = 1 Ω

GEN

265 400

50 75

10 15

20 30

= 20 V, RL = 2 Ω

DD

= 10 V, Rg = 1 Ω

GEN

15 25

60 90

10 15

TC = 25 °C

60

100

IS = 10 A

0.8 1.2 V

50 75 ns

65 100 nC

27 ns

23

°C/W

mV/°C

µA

Ω

pFOutput Capacitance

nC

ns

A

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

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Document Number: 74337

S-62025-Rev. A, 16-Oct-06

TYPICAL CHARACTERISTICS 25 °C, unless noted

SiE812DF

Vishay Siliconix

100

VGS = 10 thru 6 V

80

)A( tnerruC niarD -I

60

40

D

20

0

0.0 0.1 0.2 0.3 0.4 0.5

- Drain-to-Source Voltage (V)

V

DS

5 V

Output Characteristics

0.0030

0.0028

(Ω) ecnatsiseR-

nO

-

DS(on)

r

0.0026

0.0024

0.0022

0.0020

VGS = 4.5 V

VGS = 10 V

0 20406080100

4 V

3 V

)A( tnerruC niarD -I

)Fp( ecnati

c a pa

C

- C

20

16

12

8

D

4

0

01234

TC = 125 °C

25 °C

V

- Gate-to-Source Voltage (V)

GS

- 55 °C

Transfer Characteristics

10000

8000

6000

4000

2000

C

oss

C

rss

0

0 5 10 15 20 25 30 35 40

C

iss

- Drain Current (A)

I

D

On-Resistance vs. Drain Current and Gate Voltage

10

)V( e

g atl

o V ecruoS-ot-etaG

-

SG

V

ID = 25 A

8

VDS = 20 V

6

VDS = 32 V

4

2

0

0 20406080100120

Qg - Total Gate Charge (nC)

Gate Charge

Document Number: 74337 S-62025-Rev. A, 16-Oct-06

VDS - Drain-to-Source Voltage (V)

Capacitance

1.8 VGS = 10 V, 4.5 V

= 25 A

I

D

1.6

ecnatsi

1.4

)dezilamroN(

s eR

-

1.2

nO -

) no(

1.0

S D

r

0.8

0.6

- 50 - 25 0 25 50 75 100 125 150

- Junction Temperature (°C)

T

J

On-Resistance vs. Junction Temperature

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