SiE808DF
PRODUCT SUMMARY
VDS (V)
0.0016 at V
20
0.0025 at V
Package Drawing
r
DS(on)
D
e
(Ω)
= 10 V 220
GS
= 4.5 V 117
GS
678910
DSSGD
New Product
N-Channel 20-V (D-S) MOSFET
FEATURES
ID (A)
Silicon
Packag e
Limit
PolarPAK
67 89
a
Limit
60
60
Qg (Typ)
46 nC
10
DDSG
• TrenchFET® Gen II Power MOSFET
• Ultra Low Thermal Resistance Using
Top-Exposed PolarPAK
Double-Sided Cooling
• Leadframe-Based New Encapsulated Package
- Die Not Exposed
- Same Layout Regardless of Die Size
• Low Q
gd/Qgs
• 100 % R
APPLICATIONS
•VRM
• DC/DC Conversion: Low-Side
• Synchronous Rectification
Vishay Siliconix
®
Package for
Ratio Helps Prevent Shoot-Through
and UIS Tested
g
D
RoHS
COMPLIANT
DSSGD
54321
Top View Bottom View
Top surface is connected to pins 1, 5, 6, and 10
Ordering Information: SiE808DF-T1-E3 (Lead (Pb)-free)
14325
For Related Documents
G
S
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol
Drain-Source Voltage V
Gate-Source Voltage V
T
= 25 °C
C
= 70 °C
Continuous Drain Current (T
= 150 °C)
J
T
C
DS
GS
I
D
TA = 25 °C
TA = 70 °C
Pulsed Drain Current I
= 25 °C
T
Continuous Source-Drain Diode Current
Single Pulse Avalanche Current
Avalanche Energy E
Maximum Power Dissipation
C
TA = 25 °C
L = 0.1 mH
= 25 °C
T
C
T
= 70 °C 80
C
= 25 °C
T
A
DM
I
S
I
AS
AS
P
D
TA = 70 °C
T
Operating Junction and Storage Temperature Range
d, e
Soldering Recommendations (Peak Temperature)
Notes:
a. Package limited is 60 A.
b. Surface Mounted on 1" x 1" FR4 board.
c. t = 10 sec.
d. See Solder Profile (http://www.vishay.com/doc?73257). The PolarPAK is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework Conditions: manual soldering with a soldering iron is not recommended for leadless components.
, T
J
stg
Document Number: 73739
S-60621-Rev. A, 24-Apr-06
Limit
20
± 20
220 (Silicon Limit)
a
60
(Package Limit)
a
60
b, c
45
b, c
36
100
a
60
b, c
4.3
35
61 mJ
125
b, c
5.2
b, c
3.3
- 50 to 150
260
Unit
V
A
W
°C
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1
SiE808DF
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter Symbol
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain Top)
Maximum Junction-to-Case (Source)
Notes:
a. Surface Mounted on 1" x 1" FR4 board.
b. Maximum under Steady State conditions is 68 °C/W.
c. Measured at source pin (on the side of the package).
a, b
a, c
t ≤ 10 sec R
Steady State
R
thJA
(Drain) 0.8 1
R
thJC
(Source) 2.2 2.7
thJC
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter Symbol Test Conditions Min Typ Max Unit
Static
V
Drain-Source Breakdown Voltage V
Temperature Coefficient ΔV
V
DS
Temperature Coefficient ΔV
V
GS(th)
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
b
a
a
a
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Gate Resistance
Turn-on Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Turn-on Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
DS
DS /TJ
GS(th) /TJ
GS(th)
GSS
I
DSS
I
V
D(on)
r
DS(on)
g
fs
C
iss
C
oss
C
rss
Q
g
Q
gs
Q
gd
R
g
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulse Diode Forward Current
a
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Reverse Recovery Fall Time
Reverse Recovery Rise Time
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %
b. Guaranteed by design, not subject to production testing.
I
S
I
SM
V
SD
t
rr
Q
rr
t
a
t
b
V
DS
V
V
DS
V
DS
I
D
I
D
IF = 10 A, di/dt = 100 A/µs, TJ = 25 °C
GS
VDS = V
V
DS
V
DS
= 20 V, V
DS
V
GS
V
GS
V
DS
= 10 V, V
DS
= 10 V, V
= 10 V, V
V
DD
≅ 10 A, V
V
DD
≅ 10 A, V
= 0 V, V
= 0 V, ID = 250 µA
ID = 250 µA
, ID = 250 µA
GS
= ± 20 V
GS
= 20 V, V
≥ 5 V, V
GS
= 0 V, TJ = 55 °C
GS
GS
= 10 V, ID = 25 A
= 4.5 V, ID = 25 A
= 10 V, ID = 25 A
= 0 V, f = 1 MHz
GS
= 10 V, ID = 25 A
GS
= 4.5 V, ID = 20 A
GS
f = 1 MHz 0.9 1.35 Ω
= 10 V, RL = 1 Ω
= 4.5 V, Rg = 1 Ω
GEN
= 10 V, RL = 1 Ω
= 10 V, Rg = 1 Ω
GEN
TC = 25 °C
IS = 10 A
Typical Maximum
20 24
20 V
1.5 2.3 3 V
= 0 V
= 10 V
25 A
Unit
°C/W
26.5
- 7.3
mV/°C
± 100 nA
1
10
0.0013 0.0016
0.0021 0.0025
µA
Ω
95 S
8800
1600
pF
600
102 155
46 70
26
nC
8
180 270
215 325
50 75
15 25
25 40
55 85
ns
55 85
10 15
60
100
A
0.8 1.2 V
56 85ns
60 90 nC
26
30
ns
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 73739
S-60621-Rev. A, 24-Apr-06
TYPICAL CHARACTERISTICS 25 °C, unless noted
SiE808DF
Vishay Siliconix
100
80
)A( tnerruC niarD –I
60
40
D
20
0
0.00 0.05 0.10 0.15 0.20 0.25 0.30
V
– Drain-to-Source Voltage (V)
DS
VGS = 10 thru 5 V
Output Characteristics
0.0030
)
0.0026
(Ω ecnatsis
e
R-nO
–
)no(SD
r
0.0022
0.0018
0.0014
VGS = 4.5 V
VGS = 10 V
VGS = 4 V
VGS = 3 V
20
16
)A( tnerruC niarD –I
12
8
D
4
0
1.5 2.0 2.5 3.0 3.5 4.0
TC = 125 °C
TC = 25 °C
– Gate-to-Source Voltage (V)
V
GS
Transfer Characteristics
)Fp( ecnati
c
a
pa
C
–
C
10000
8000
6000
4000
2000
C
oss
C
rss
C
iss
TC = - 55 °C
0.0010
0 20406080100
I
– Drain Current (A)
D
On-Resistance vs. Drain Current and Gate Voltage
10
)V( e
g
atl
o
V ecruoS-ot-etaG
–
SG
V
ID = 20 A
8
VDS = 10 V
6
VDS = 16 V
4
2
0
0 20406080100120
Qg – Total Gate Charge (nC)
Gate Charge
Document Number: 73739
S-60621-Rev. A, 24-Apr-06
0
05101520
VDS – Drain-to-Source Voltage (V)
Capacitance
1.6
VGS = 4.5 V, 10 V
= 25 A
I
1.4
ecnatsi
)dezilamroN(
1.2
s
eR
nO –
1.0
)
no(
S
D
r
0.8
0.6
- 50 - 25 0 25 50 75 100 125 150
– Junction Temperature (°C)
T
J
D
On-Resistance vs. Junction Temperature
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