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SiC769CD
Technical data
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VISHAY SiC769CD Technical data

Integrated DrMOS Power Stage
DESCRIPTION
The SiC769CD incorporates an advanced MOSFET gate driver IC. This IC accepts a single PWM input from the V controller and converts it into the high side and low side MOSFET gate drive signals. The driver IC is designed to implement the skip mode (SMOD) function for light load efficiency improvement. Adaptive dead time control also works to improve efficiency at all load points. The SiC769CD has a thermal warning (THDN) that alerts the system of excessive junction temperature. The driver IC includes an enable pin, UVLO and shoot through protection.
The SiC769CD is optimized for high frequency buck applications. Operating frequencies in excess of 1 MHz can easily be achieved.
The SiC769CD is packaged in Vishay Siliconix high performance PowerPAK MLP6 x 6 package. Compact co-packaging of components helps to reduce stray inductance, and hence increases efficiency.
core
power
SiC769CD
Vishay Siliconix
FEATURES
•
• Integrated Gen III MOSFETs and DrMOS compliant gate driver IC
• Enables V
• Easily achieve > 90 % efficiency in multi-phase, low output voltage solutions
• Low ringing on the VSWH pin reduces EMI
• Pin compatible with DrMOS 6 x 6 version 3.0
• Tri-state PWM input function prevents negative output voltage swing
• 5 V logic levels on PWM
• MOSFET threshold voltage optimized for 5 V driver bias
R
supply
• Automatic skip mode operation (SMOD) for light load efficiency
• Under-voltage lockout
• Built-in bootstrap schottky diode
• Adaptive deadtime and shoot through protection
• Thermal shutdown warning flag
• Low profile, thermally enhanced PowerPAK 40 pin package
• Halogen-free according to IEC 61249-2-21 definition
• Compliant to RoHS directive 2002/95/EC
APPLICATIONS
• CPU and GPU core voltage regulation
• Server, computer, workstation, game console, graphics boards, PC
switching at 1 MHz
core
®
MLP 6 x 6
SiC769CD APPLICATION DIAGRAMM
5 V
V
CIN
SMOD
Controller
PWM
Document Number: 64981 S10-0113-Rev. D, 18-Jan-10
DSBL#
PWM
THDN
SiC769CD
V
VDRV
Gate Driver
C
GND
GH
GL
Figure 1
V
IN
BOOT
V
SWH
PHASE
P
GND
IN
V
O
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SiC769CD
Vishay Siliconix
ORDERING INFORMATION
Part Number Packag e
SiC769CD-T1-E3 PowerPAK MLP66-40
SiC769DB Reference board
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter Symbol Min. Max. Unit
V V
PWM
THDN
V
V
IN
V
SW
V
DRV
V
CIN
, V
, V
V
BS
BS_PH
T
A
T
J
T
STG
DSBL#
SMOD
- 0.3 20
- 0.3 20
- 0.3 7.0
- 0.3 7.0
,
- 0.3
+ 0.3
V
CIN
V
- 0.3 27
- 0.3 29
- 0.3 7
- 40 125
150
- 65 150
°CStorage Junction Temperature
Input Voltage
Switch Node Voltage (DC)
Drive Input Voltage
Control Input Voltage
Logic Pins
Boot Voltage DC (referenced to C
Boot Voltage < 200 ns Transient (referenced to C
GND
)
)
GND
Boot to Phase Voltage DC
Boot to Phase Voltage < 200 ns - 0.3 9
Ambient Temperature Range
Maximum Junction Temperature
Soldering Peak Temperature 260
Note:
= 25 °C and all voltages referenced to P
a. T
A
GND
= C
unless otherwise noted.
GND
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating/conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min. Typ. Max. Unit
Input Voltage V
Control Input Voltage V
Drive Input Voltage V
Switch Node V
SW_DC
IN
CIN
DRV
3.0 12 16
4.5 5.5
4.5 5.5
12 16
V
Note: a. Recommended operating conditions are specified over the entire temperature range, and all voltages referenced to P
otherwise noted.
GND
= C
GND
unless
THERMAL RESISTANCE RATINGS
Parameter Symbol Typ. Max. Unit
Maximum Power Dissipation at T
Maximum Power Dissipation at T
= 25 °C P
PCB
= 100 °C P
PCB
Thermal Resistance from Junction to Top
Thermal Resistance from Junction to PCB
D_25C
D_100C
R
th_J_TOP
R
th_J_PCB
25
10
15
W
5
°C/W
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Document Number: 64981
S10-0113-Rev. D, 18-Jan-10
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
Test Conditions Unless Specified
V
= V
DSBL#
V
= 12 V, V
Parameter Symbol
IN
T
A
Power Supplies
V
= 0 V, no switching 20
DSBL#
V
Control Input Current I
CIN
Drive Input Current (Dynamic) I
VCIN
VDRV
V
DSBL#
= 5 V, no switching 400
DSBL#
= 5 V, fs = 300 kHz, D = 0.1 600
fs = 300 kHz, D = 0.1 11 16
= 1000 kHz, D = 0.1 40 54
f
s
Bootstrap Supply
V
Bootstrap Switch Forward Voltage V
BS Diode
= 5 V, forward bias current 2 mA 0.60 0.75 V
VCIN
Control Inputs (PWM, DSBL#, SMOD)
PWM Rising Threshold V
PWM Falling Threshold V
PWM Tristate Rising Threshold V
PWM Tristate Falling Threshold V
PWM Tristate Rising Threshold Hysteresis V
PWM Tristate Falling Threshold Hysteresis V
Tristate Hold-Off Time
b
PWM Input Current I
SMOD, DSBL# Logic Input Voltage
Pull Down Impedance R
THDN Output Low V
th_pwm_r
th_pwm_f
th_tri_r
th_tri_f
hys_t ri_r
hys_t ri_f
t
TSHO
PWM
V
LOGIC_LH
V
LOGIC_LH
THDN
THDNL
V
PWM
V
PWM
Rising (low to high) 2.0
Falling (high to low) 0.8
5 kΩ resistor pull-up to V
Protection
Thermal Warning Flag Set 150
Thermal Warning Flag Hysteresis 15
Under Voltage Lockout
Under Voltage Lockout Falling, off threshold 2.5 2.9
Under Voltage Lockout Hysteresis V
High Side Gate Discharge Resistor
b
V
UVLO
UVLO_HYST
R
HS_DSCRG
Rising, on threshold 3.3 3.9
V
= V
VDRV
VCIN
Notes: a. Typical limits are established by characterization and are not production tested. b. Guaranteed by design.
= 5 V,
SMOD
= V
VDRV
= 25 °C Min. Typ.aMax. Unit
VCIN
5 V,
3.5 3.8 4.2
0.8 1.0 1.2
0.9 1.3 1.8
3.4 3.7 4.0
= 5 V 250
= 0 V - 250
CIN
= 0 V; VIN = 12 V 20.2 kΩ
SiC769CD
µAV
mA
200
300
150 ns
40 Ω
0.04 V
400 mV
mV
µA
V
V
°CThermal Warning Flag Clear 135
V
Document Number: 64981 S10-0113-Rev. D, 18-Jan-10
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SiC769CD
Vishay Siliconix
MOSFET SPECIFICATIONS
Test Conditions Unless Specified
V
= V
VCIN
Parameter Symbol
V
High Side
Low Side
R
DS(on)_H
V
R
DS(on)_L
DS
DS
V
VIN
VGS = 0 V, IDS = 250 µA 20 V
VGH = 5 V, resistance measured
VGS = 0 V, IDS = 250 µA 20 V
VGL = 5 V, resistance measured
Note: a. Typical MOSFET Parameters are provided as a design guide.
TIMING SPECIFICATIONS
Test Conditions Unless Specified
V
VDRV
Parameter Symbol
Turn Off Propagation Delay High Side
a
Rise Time High Side t
Fall Time High Side t
Turn Off Propagation Delay Low Side
a
Rise Time Low Side t
Fall Time Low Side t
Dead Time Rising t
Dead Time Falling t
t
d_on_HS
r_HS
f_HS
t
d_off_LS
r_LS
f_LS
dead_on
dead_off
Note: a. Min. and Max. are not 100 % production tested.
V
VIN
25 % of PWM to 90 % of GH 10 20 30
10 % to 90 % of GH 8
90 % to 10 % of GH 8
75 % of PWM to 90 % of GL 10 20 30
10 % to 90 % of GL 8
90 % to 10 % of GL 8
10 % of GL to 10 % of GH 15
10 % of GH to 10 % of GL 15
DSBL#
= 12 V, TA = 25 °C Min. Typ.aMax. Unit
at package pins
at package pins
= V
= V
VCIN
= 12 V, TA = 25 °C Min. Typ. Max. Unit
= 5 V,
DSBL#
6.0 mΩ
1.7 mΩ
= 5 V,
ns
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Document Number: 64981
S10-0113-Rev. D, 18-Jan-10
TIMING DEFINITIONS
PWM
GH
SiC769CD
Vishay Siliconix
75 %
25 %
GL
90 %
10 %
SW
1234 5678
Region Definition Symbol
1 Turn off propagation delay LS t
2 Fall time LS t
3 Dead time rising t
4Rise time HSt
5 Turn off propagation delay HS t
6Fall time HSt
7 Dead time falling t
8 Rise time LS t
Note: GH is referenced to the high side source. GL is referenced to the low side source.
SiC769CD BLOCK DIAGRAM
90 %
10 %
d_off_LS
f_LS
dead_on
r_HS
d_off_HS
f_HS
dead_off
r_LS
V
CIN
DSBL#
THDN
PWM
SMOD
Document Number: 64981 S10-0113-Rev. D, 18-Jan-10
V
DRV
UVLO
Thermal Warning
Tristate
PWM
C
GND
AST CNTL
DCM DETECT
GH
GL
V
IN
BOOT
PHASE
VSWH
P
GND
Figure 2
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