12-V VCM/Spindle Motor Driver for Large Capacity HDD
FEATURES
• 12-V Motor Supply
• Blocking Schottky Diode Replaced by External Synchronous Rectifier
• Spindle Motor Driver Features:
– External LITTLE FOOT® Drivers for High Current/Power Application
– Constant Off-Time PWM Current Drive Mini mizin g Powe r Diss ip ati on
– Sensorless Motor Commutation Immune to PWM Noise
– Externally Controlled Start-Up/Run Function
– Low-Jitter Commutation Output for External Speed Control
– Level Shifting Buffer Amplifier for PWM DAC
– Adjustable Output Slew Rate Control
– Unique Commutation Driver Minimizing Audible Noise
– Programmable Phase Advance for High Speed Motor
– Speed Triggered Motor Brake for Enhanced Reliability
• Voice Coil Motor Driver Features:
– External LITTLE FOOT Drivers for High Current/Power Application
– Low Crossover Distortion in Linear Mode (Class AB)
– Selectable Constant Frequency PWM or Linear Operation
– Programmable Retract Voltage Clamp
– Level Shifting Buffer Amplifier for PWM DAC
– Direct VCM Retract Control Input
– Current Sense Output for Enhanced Servo Control
– Fixed PWM Output Slew Rate Limit
• System Manager Features:
– Power-On Reset Generator
– Adjustable System Voltage Monitor
– 2.3/5.0-V±5%, 150 ppm/°C Reference Output for External PWM DAC
– Programmable Timer for Head Retract and Spindle Brake Delay
– Built-In Test Ability
• 3-Wire Synchronous Serial Data Interface
• Internal Registe rs and Ad dress Dec oding w ith Full Readback Capabi lity
Si9993CS
Vishay Siliconix
Si9993
DESCRIPTION
The Si9993CS consists of a 3-phase brushless dc motor
(spindle) PWM controll er an d a li nea r/PWM transconductance
stage suitable for driving a voice coil motor (head actuator). T o
meet the power handling capability required for a high
capacity hard disk drive, both drivers utilize external LITTLE
FOOT half-bridges (Siliconix Si9942 recommended). A
separate LITTLE FOOT PMOS switch (Si9430) is used as a
FaxBack 408-970-5600, request 70653S-60752–Rev. A, 05-Apr-99
www.siliconix.com1
synchronous r ectifier in place of the usual Scho ttky blocking
diode.
Si9993CS is manufactured in a junction-isolated BiC/DMOS
process (JIBCD15) and is available in a 64-pin SQFP
package, specified to operate over the commercial (0°C to
70°C) temperature range.
Si9993CS
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
S-60752–Rev. A, 05-Apr-99FaxBack 408-970-5600, request 70653
Supply Range . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 to 14 V
MOT
- 0.3 V) to 14 V
DD
AGND, DGND, PWRGND to GND. . . . . . . . . . . . . . . . . . -0.3 to 0.3 V
SENA, SENB, SENC, CT, VCM+, VCM-Pin . . . . .-1.0 to V
, FCOM, STEPCLK, ENCOM , SY SCLK, PWMIN,
POR
+ 1.0 V
CC
PWMOUT, RESETVCM, IPCLK, IPDATA
and IPENABLE pins . . . . . . . . . . . . . . . . . . . . . . .-0.3 to V
* Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause
permanent dama ge. Functional op eration at conditi ons other than th e operating conditio ns specified is not i mplied. Only on e Absolute Maximum rating should be
applied at any one time. Device mounted on one-inch square FR4 Board.
+ 0.3 V
DD
SPECIFICATIONS
Operating Conditions:
VCC = V
R
SRADJ
ParameterSymbolSpecific Test Conditions
Power Suppl y
Supply Current
I
CC
Control Logic
Low Input CurrentI
High Input CurrentI
Low Input Voltage
(All Digital Inputs)
High Input Voltage
(All Digital Inputs)
Low Output Voltage (POR
High Output Voltage (POR
Low Output Voltage
(FCOM, PWMOU T )
High Output Voltage
(FCOM, PWMOU T )
IPDATA Setup Time to Rising
IPCLK Edge
Rising IPCLK Edge to IPDATA
Hold Time
IPDATA Clock Cycle Timet
IPDATA Hold for IPDATA Driver
Turnaround
IPCLK High and Low Timet
IPDATA Propagation Delay
WRT IPCLK Falling Edge
IPENABLE Setup Time WRT
IPCLK Rising Edge
IPENABLE Hold Time WRT
IPCLK Rising Edge
WRT IPCLK Falling Edge to
Data Tri-State
)V
)V
= 12 V ±10%, VDD = 5 V ±10%, V
MOT
= 20 kΩ ±1%, Si9942-Si9430 LITTLE FOOT Driver, F
I
DD
+ I
I
CLAMP
IL
IH
V
V
OL
OH
V
OL
V
OH
t
t
t
t
t
t
t
MOT
IL
IH
1
2
3
4
5
6
7
8
9
+
Normal Operation, Serial Port Idle0.21.2
D7D6(REG0/5) = 00, All Clocks Disabled0.020.1
Normal Operation
No Load at V
D7D6(REG0/5) = 00, All Clocks Disabled46
REF(OUT)
VIN = V
I
OUT
I
OUT
I
OUT
I
OUT
See Timing Diagram, Figures 1 and 2.
See Timing Diagram, Figures 1 and 2.10ns
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to V
Maximum Current (All Input Pins). . . . . . . . . . . . . . . . . . . . . .±20 mA
Storage Temperatur e (T
Operating Temperature (T
Junction Temperature (T