D Ultra Low Dropout—300 mV at 300-mA Load
D Low Noise—75 mV
(10-Hz to 100-kHz)
RMS
Available
D Out-of-Regulation Error Flag (power good)
D Shutdown Control
D 130-mA Ground Current at 300-mA Load
D Fast Start-Up (50 mS)
D 1.5% Guaranteed Output Voltage Accuracy
D 400-mA Peak Output Current Capability
D Uses Low ESR Ceramic Capacitors
D Fast Line and Load Transient Response (v 30 ms)
D 1-mA Maximum Shutdown Current
D Output Current Limit
D Reverse Battery Protection
D Built-in Short Circuit and Thermal Protection
DESCRIPTION
The Si91872 is a 300-mA CMOS LDO (low dropout) voltage
regulator. It is the perfect choice for low voltage, low power
applications. An ultra low ground current and ultra fast turn-on
make this part attractive for battery operated power systems.
The Si91872 also offers ultra low dropout voltage to prolong
battery life in portable electronics. Systems requiring a quiet
voltage source will benefit from the Si91872’s low output noise.
The Si91872 is designed to maintain regulation while
delivering 400-mA peak current, making it ideal for systems
that have a high surge current upon turn-on.
For better transient response and regulation, an active
pull-down circuit is built into the Si91872 to clamp the output
D Output—Auto-Discharge In Shutdown Mode
D Fixed 1.2, 1.8, 2.5, 2.6, 2.8, 3.0, 3.3, 5.0-V Output
Voltage Options
D MLP33-5 PowerPAKr Package
APPLICATIONS
D Cellular Phones, Wireless Handsets
D Noise-Sensitive Electronic Systems, Laptop and
Palmtop Computers
D PDAs
D Pagers
D Digital Cameras
D MP3 Player
D Wireless Modem
voltage when it rises beyond normal regulation. The Si91872
automatically discharges the output voltage by connecting the
output to ground through a 100-W n-channel MOSFET when
the device is put in shutdown mode.
The Si91872 features reverse battery protection to limit
reverse current flow to approximately 1-mA in the event
reversed battery is applied at the input, thus preventing
damage to the IC.
The Si91872 is available in both the standard and
lead (Pb)-free 5-pin MLP33 PowerPAK packages and is
specified to operate over the industrial temperature range of
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 20 mW/_C above T
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Auto Discharge ResistanceR_DISSi91872 OnlyRoom100W
SD Pin Input Current
SD HysteresisV
V
Turn-On Timet
OUT
f
I
IN(SD)
HYST(SD)
ON
V
SD
VSD = 0 VRoom0.11mA
High = Regulator ON (Rising)Full1.5V
VSD = 1.5 V, VIN = 6 VRoom0.7mA
Full150mV
(See Figure 1), I
= 100 mARoom50ms
LOAD
ERROR Output
ERROR High LeakageI
ERROR Low VoltageV
ERROR Voltage ThresholdV
ERROR Voltage Threshold
Hysteresis
Notes
a. Room = 25_C, Full = −40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that V
e. Ground current is specified for normal operation as well as “drop-out” operation.
f.The device’s shutdown pin includes a typical 2-MW internal pull-down resistor connected to ground.
g. V
OUT(nom)
is V
when measured with a 1-V differential to VIN.
OUT
does not not drop below 2.0 V.
IN
OFF
OL
ERROR
V
HYST(ERROR)
ERROR v VIN. V
V
OUT
V
Falling, I
OUT
V
OUT(nom)
in RegulationFull1mA
OUT
I
= 0.5 mAFull0.4V
SINK
Below V
OUT
g
g
OUT(nom)
= 1 mA, V
, VIN w 2 V
OUT(nom)
w 2 V
Full−2−4−6
t 2 V, VIN u 2 VFull−4
Room1.5
Limits
−40 to 85_C
b
Typ
c
b
IN
mV
_C
V
%
TIMING WAVEFORMS
Document Number: 72013
S-51147—Rev. F, 20-Jun-05
0.95 V
tr v 1 mS
t
ON
NOM
0 V
V
SD
V
OUT
FIGURE 1. Timing Diagram for Power-Up
V
V
IN
NOM
www.vishay.com
3
Si91872
Vishay Siliconix
PIN CONFIGURATION: MLP33-5
MLP33-5 PowerPAK
SD
ERROR
V
V
OUT
1
2
3
IN
4
Top View
5
GND
GND
5
GND
GND
PIN DESCRIPTION
Pin NumberNameFunction
1SDBy applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused
2ERRORThe open drain output is an error flag output which goes low when V
3V
4V
5GNDGround pin. For better thermal capability, directly connected to large ground plane
IN
OUT
Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground
The Si91872 is a low-noise, low drop-out and low quiescent
current linear voltage regulator, packaged in a small footprint
MLP33-5 package. The Si91872 can supply loads up to
300 mA. As shown in the block diagram, the circuit consists of
a bandgap reference, error amplifier, p-channel pass transistor
and feedback resistor string. Additional blocks, not shown in
the block diagram, include a precise current limiter, reverse
battery and current protection, and thermal sensor.
Thermal Overload Protection
The thermal overload protection limits the total power
dissipation and protects the device from being damaged.
When the junction temperature exceeds 150_C, the device
turns the p-channel pass transistor off.
Reverse Battery Protection
The Si91872 has a battery reverse protection circuitry that
disconnects the internal circuitry when V
drops below the
IN
GND voltage. There is no current drawn in such an event.
When the SD pin is hardwired to VIN, the user must connect
pin to VIN via a 100-kW resistor if reverse battery
the SD
protection is desired. Hardwiring the SD
pin directly to the V
pin is allowed when reverse battery protection is not desired.
ERROR
ERROR is an open drain output that goes low when V
OUT
is
less than 4% of its normal value. To obtain a logic level output,
connect a pull-up resister from ERROR to V
voltage equal to or less than V
impedance (off) when SD
pin is low.
. ERROR pin is high
IN
or any other
OUT
package and the circuit board, and the ambient temperature.
The power dissipation is defined as
= (VIN – V
P
D
OUT
) * I
OUT
.
Junction temperature is defined as
T
= TA + ((PD * (RθJC + RθCA)).
J
To calculate the limits of performance, these equations must
be rewritten.
Allowable power dissipation is calculated using the equation
P
= (TJ − T
D
)/ (RθJC + RθCA)
A
While allowable output current is calculated using the equation
I
OUT
= (TJ − T
)/ (RθJC + RθCA) * (VIN – V
A
OUT
).
Ratings of the Si91872 that must be observed are
T
= 125 _C, T
Jmax
IN
Rθ
= 8 _C/W.
JC
= 85 _C, (VIN – V
Amax
OUT)max
= 5.3 V,
The value of RθCA is dependent on the PC board used. The
value of Rθ
for the board used in device characterization is
CA
approximately 46 _C/W.
Figure 1 shows the performance limits graphically for the
Si91872 mounted on the circuit board used for thermal
characterization.
Auto-Discharge
has an internal 100-W (typ.) discharge path to ground
V
OUT
when SD
pin is low for the Si91872.
Stability
0.35
0.30
0.25
TA = 50_C
TA = 70_C
The circuit is stable with only a small output capacitor equal to
0.20
6 nF/mA (= 2 mF @ 300 mA). Since the bandwidth of the error
amplifier is around 1−3 MHz and the dominant pole is at the
output node, the capacitor should be capacitive in this range,
(A)I
OUT
TA = 85_C
0.15
i.e., for 150-mA load current, an ESR <0.2 W is necessary.
Parasitic inductance of about 10 nH can be tolerated.
Safe Operating Area
The ability of the Si91872 to supply current is ultimately
dependent on the junction temperature of the pass device.
Junction temperature is in turn dependent on power
dissipation in the pass device, the thermal resistance of the
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability da ta for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see