D Low 135-mV Dropout at 150-mA Load
D Guaranteed 150-mA Output Current
D 300-mA Peak Output Current Capability
Available
D Uses Low ESR Ceramic Output Capacitor
D Fast Load And Line Transient Response
D Low Output Noise
D 1-mA Maximum Shutdown Current
D Built-in Short Circuit And Thermal Protection
D Fixed 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3.0-V, 3.3-V, 5.0-V
or Adjustable Output Voltage Options (Version B)
DESCRIPTION
The Si9183 is a high performance yet size saving 150-mA
CMOS LDO (low dropout) voltage regulator. Its ultra low
ground current and dropout voltage prolong battery life in
portable electronics. The device provides LINE/LOAD
transient response and ripple rejection superior to that of
Bipolar or BiCMOS LDO regulators. It is designed to maintain
regulation while delivering 300-mA peak current. The Si9183
drives lower cost ceramic, as well as tantalum, output
capacitors. Stability is guaranteed from maximum load current
down to 0-mA load. An external noise bypass capacitor
connected to the device’s CBP pin will reduce the LDO’s
D Thin SOT-23 5-Pin Package
APPLICATIONS
D Battery Powered Portable Systems
D Cellular Phones
D PDAs, Palmtops
D Pagers
D Post Regulators for Multi-Output Converters
D Notebook Computers
self-noise for low noise applications. The Si9183 includes a
shutdown feature that allows users to completely disable the
device and save power when no output is required.
The Si9183, in Thin SOT23-5 packaging, is available in two
versions (Version A or B). Version A offers low noise
performance, while Version B features adjustable output
voltage.
The Si9183 is available in both standard and lead (Pb)-free
packages.
TYPICAL APPLICATIONS CIRCUITS
Si9183-A
1
V
IN
1 mF2.2 mF
SD
ON
OFF
FIGURE 1. Version A with Low Output NoiseFIGURE 2. Version B with Adjustable Output
Notes
a. Device mounted with all leads soldered or welded to multi-layer (1S2P)
JEDEC board, horizontal orientation.
b. Derate 5.5 mW/_C above T
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, V
Output Voltage, V
SD
Input Voltage, V
= 1 mF, C
C
IN
C
Range = 1 mF to 10 mF ("20% tolerance, "20% over temperature; ESR = 0.4 to 4 W at dc to 100 kHz, 0 t0 0.4 W > 100 kHz) )
OUT
IN
(Adjustable Version)1.5 V to 5 V. . . . . . . . . . . . . . . . . .
Notes
a. Room = 25_C, Full = −40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at V
V
= 2.5 V, while typical values for dropout voltage at V
OUT
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that V
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.V
is defined as the output voltage of the DUT at 1 mA.
OUT
does not not drop below 2.0 V.
IN
IH
V
IL
I
IL
I
IH
HYST
High = Regulator ON (Rising)Full1.2V
Low = Regulator OFF (Falling)Full0.4
VSD = 0 V, Regulator OFFRoom0.01
VSD = 6 V, Regulator ONRoom1.0
Full100mV
< 2 V are measured at V
OUT
OUT
= 1.8 V.
Limits
−40 to 85_C
b
Typ
c
OUT
b
IN
w 2 V are measured at
dB
mV
ms
_
_C
V
mA
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
www.vishay.com
3
Si9183
Vishay Siliconix
TIMING WAVEFORMS
V
IN
t
ON
0.95 V
NOM
V
OUTVOUT
FIGURE 3. Timing Diagram for Power-Up
V
NOM
PIN CONFIGURATION
Thin SOT-23, 5-Pin
V
GND
SD
1
IN
2
3
5
V
OUT
BP (Version A)
4
FB (Version B)
PIN DESCRIPTION
Pin NumberNameFunction
1V
2GNDGround pin. Local ground for CBP and C
3SDBy applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
4 (Version A)BP
4 (Version B)FBConnect to divided output voltage to adjust the regulation point.
5V
IN
OUT
Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground.
.
OUT
Noise bypass pin. For low noise applications, a 0.1-mF or larger ceramic capacitor should be connected from this pin to
ground.
The Si9183 is a low drop out, low quiescent current, linear
regulator family with very fast transient response. It is primarily
designed for battery powered applications where battery run
time is at a premium. The low quiescent current allows
extended standby time while low drop out voltage enables the
system to fully utilize battery power before recharge. The
Si9183 is a very fast regulator with bandwidth exceeding
50 kHz while maintaining low quiescent current at light load
conditions. With this bandwidth, the Si9183 is one of the
fastest LDO available today. The Si9183 is stable with one of
any output capacitor types from 1 mF to 10.0 mF. However,
X5R or X7R ceramic capacitors are recommended for best
output noise and transient performance.
V
IN
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough source
impedance. For practical circuits, a 1.0-mF or larger ceramic
capacitor is recommended. When the source impedance is
not low enough and/or the source is several inches from the
Si9183, then a larger input bypass capacitor is needed. It is
required that the equivalent impedance (source impedance,
wire, and trace impedance in parallel with input bypass
capacitor impedance) must be smaller than the input
impedance of the Si9183 for stable operation. When the
source impedance, wire, and trace impedance are unknown,
it is recommended that an input bypass capacitor be used of
a value that is equal to or greater than the output capacitor.
V
OUT
GND
Ground is the common ground connection for V
It is also the local ground connection for C
BP
and V
IN
OUT
, ADJ, and SD.
ADJ
For the adjustable output version, use a resistor divider R1 and
R2, connect R1 from V
to ADJ and R2 from ADJ to ground.
OUT
R2 should be in the 25-kW to 150-kW range for low power
consumption, while maintaining adequate noise immunity.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value,
ǒ
V
R1 +
OUT
V
is nominally 1.215 V.
ADJ
* V
V
ADJ
ADJ
Ǔ
R2
(1)
SHUTDOWN (SD)
controls the turning on and off of the Si9183. V
SD
guaranteed to be on when the SD
greater than 1.2 V. V
is guaranteed to be off when theSD
OUT
pin voltage equals or is
OUT
is
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si9183 will draw less than 1-mA current from the
source. To automatically turn on V
applied, tie the SD
pin to VIN.
whenever the input is
OUT
.
V
is the output voltage of the regulator. Connect a bypass
OUT
capacitor from V
to ground. The output capacitor can be
OUT
any value from 1.0 mF to 10.0 mF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?71258
www.vishay.com
10
.
C
BP
For low noise application, connect a high frequency ceramic
capacitor from C
to ground. A 0.01-mF or a 0.1-mF X5R or
BP
X7R is recommended.
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
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