Vishay Si9183DT-18-T1, Si9183DT-25-T1, Si9183DT-285-T1, Si9183DT-28-T1, Si9183DT-30-T1 Schematic [ru]
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Vishay Siliconix
High-Performance, Size Saving 150-mA CMOS LDO Regulator
FEATURES
Si9183
D Low 135-mV Dropout at 150-mA Load
D Guaranteed 150-mA Output Current
D 300-mA Peak Output Current Capability
Available
D Uses Low ESR Ceramic Output Capacitor
D Fast Load And Line Transient Response
D Low Output Noise
D 1-mA Maximum Shutdown Current
D Built-in Short Circuit And Thermal Protection
D Fixed 1.8-V, 2.5-V, 2.8-V, 2.85-V, 3.0-V, 3.3-V, 5.0-V
or Adjustable Output Voltage Options (Version B)
DESCRIPTION
The Si9183 is a high performance yet size saving 150-mA
CMOS LDO (low dropout) voltage regulator. Its ultra low
ground current and dropout voltage prolong battery life in
portable electronics. The device provides LINE/LOAD
transient response and ripple rejection superior to that of
Bipolar or BiCMOS LDO regulators. It is designed to maintain
regulation while delivering 300-mA peak current. The Si9183
drives lower cost ceramic, as well as tantalum, output
capacitors. Stability is guaranteed from maximum load current
down to 0-mA load. An external noise bypass capacitor
connected to the device’s CBP pin will reduce the LDO’s
D Thin SOT-23 5-Pin Package
APPLICATIONS
D Battery Powered Portable Systems
D Cellular Phones
D PDAs, Palmtops
D Pagers
D Post Regulators for Multi-Output Converters
D Notebook Computers
self-noise for low noise applications. The Si9183 includes a
shutdown feature that allows users to completely disable the
device and save power when no output is required.
The Si9183, in Thin SOT23-5 packaging, is available in two
versions (Version A or B). Version A offers low noise
performance, while Version B features adjustable output
voltage.
The Si9183 is available in both standard and lead (Pb)-free
packages.
TYPICAL APPLICATIONS CIRCUITS
Si9183-A
1
V
IN
1 mF 2.2 mF
SD
ON
OFF
FIGURE 1. Version A with Low Output Noise FIGURE 2. Version B with Adjustable Output
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
V
IN
2
GND
3
SD
Thin SOT-23, 5-Lead
5
V
OUT
4
BP
V
0.1 mF
OUT
Si9183-B
1
V
IN
1 mF 2.2 mF
SD
ON
OFF
V
IN
2
GND
3
SD
Thin SOT-23, 5-Lead
5
V
OUT
4
FB
V
OUT
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1
Si9183
Output Voltage Accuracy
OUT
DV
100
VIN V
%/V
@
)
@V
w 2.5 V)
IN OUT
Dropout Voltage
d
GND
m
BW = 50 Hz to 100 kHz
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, V
Input Voltage, V
SD
Output Current, I
Output Voltage, V
Maximum Junction Temperature, T
Storage Temperature, T
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SD
OUT
OUT
STG
150_C. . . . . . . . . . . . . . . . . . . . . . .
J(max)
Short Circuit Protected. . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3 V to V
−65_C to 125_C. . . . . . . . . . . . . . . . . . . . . . . . . .
ESD (Human Body Model) 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
−0.3 V to V
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . .
O(nom)
6.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IN
Power Dissipation (Package)
5-Pin SOT-23 555 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Impedance (Q
5-Pin SOT-23 180 _C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Device mounted with all leads soldered or welded to multi-layer (1S2P)
JEDEC board, horizontal orientation.
b. Derate 5.5 mW/_C above T
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, V
Output Voltage, V
SD
Input Voltage, V
= 1 mF, C
C
IN
C
Range = 1 mF to 10 mF ("20% tolerance, "20% over temperature; ESR = 0.4 to 4 W at dc to 100 kHz, 0 t0 0.4 W > 100 kHz) )
OUT
IN
(Adjustable Version) 1.5 V to 5 V. . . . . . . . . . . . . . . . . .
OUT
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SD
= 2.2 mF (ceramic, X5R or X7R type) , CBP = 0.1 mF (ceramic)
OUT
2 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0 V to V
Operating Ambient Temperature, T
Operating Junction Temperature, T
IN
a
, b
)
JA
= 25_C.
A
A
J
−40_C to 85_C. . . . . . . . . . . . . . . . . . . .
−40_C to 125_C. . . . . . . . . . . . . . . . . . .
SPECIFICATIONS (TA = 25_C)
Test Conditions
Unless Otherwise Specified
VIN = V
C
Parameter Symbol
Input Voltage Range V
IN
= 1 mF, C
IN
Output Voltage Range Adjustable Version Full 1.5 5
V
V
OUT
OUT
V
VIN − V
VIN − V
GND
IN(off)
O(peak)
FB
OUT(nom)
OUT
OUT
FB
N
1 mA v I
From VIN = V
From VIN = 5.5 V to 6 V Full −0.18 0.18
V
= 1.5 V, From VIN = 2.5 V to 3.5 V Full −0.18 0.18
OUT
V
= 5 V, From VIN = 5.5 V to 6 V Full −0.18 0.18
OUT
V
w 0.95 x V
OUT
BW = 50 Hz to 100 kHz
I
= 150 mA
OUT
Output Voltage Accuracy
(Fixed Versions)
Feedback Voltage (ADJ version) V
Line Regulation
(Except 5-V Version)
Line Regulation (5-V Version)
Line Regulation (ADJ Version)
Dropout Voltage
V
OUT
Dropout Voltage
(@V
OUT
d
w 2.5 V
d
t 2.5 V, VIN w 2 V)
Ground Pin Current I
Shutdown Supply Current I
FB Pin Current I
Peak Output Current I
Output Noise Voltage e
+ 1 V, I
OUT(nom)
= 2.2 mF, VSD = 1.5 V
OUT
OUT
= 1 mA
TempaMinbTypcMax
Full 2 6
v 150 mA
OUT
Room −1.5 1.5
Full −2.5 2.5
Room 1.188 1.215 1.240
Full 1.176 1.252
+ 1 V
OUT(nom)
to V
I
I
OUT
I
OUT
I
OUT
+ 2 V
OUT(nom)
= 10 mA Room 1 20
OUT
= 150 mA
= 150 mA
I
= 0 mA Room 150
OUT
= 150 mA
Full −0.18 0.18
Room 135 170
Full 180 220
Room 235 320
Full 380
Room 500
Full 900
VSD = 0 V Full 0.1 1 mA
VFB = 1.2 V Room 2 100 nA
, tpw = 2 ms Room 250 300 mA
OUT(nom)
w/o C
BP
Room 300
CBP = 0.1 mF Room 100
Limits
−40 to 85_C
b
Unit
V
% V
O(nom)
V
%/V
mV
mA
mV (rms)
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Document Number: 71258
S-51147—Rev. G, 20-Jun-05
Si9183
pp j
OUT IN
OUT
mV
VIN = 4.3 V
Vishay Siliconix
SPECIFICATIONS (TA = 25_C)
Test Conditions
Test Conditions
Unless Otherwise Specified
Unless Otherwise Specified
VIN = V
VIN = V
C
C
= 1 mF, C
Parameter UnitMax
Symbol
= 1 mF, C
IN
IN
+ 1 V, I
+ 1 V, I
OUT(nom)
OUT(nom)
= 2.2 mF, VSD = 1.5 V
= 2.2 mF, VSD = 1.5 V
OUT
OUT
OUT
OUT
= 1 mA
= 1 mA
Temp
a
Min
f = 1 kHz Room 60
Ripple Rejection DV
OUT
/DV
I
IN
OUT
= 150 mA
f = 10 kHz Room 40
f = 100 kHz Room 30
Dynamic Line Regulation DV
Dynamic Load Regulation DV
V
Turn-On-Time t
OUT
O(line)
O(load)
ON
VIN : V
I
OUT
V
VIN = 4.3 V
OUT
OUT(nom)
t
= 5 ms, I
R/tF
+ 1 V to V
OUT
= 150 mA
OUT(nom)
+ 2 V
Room 10
: 1 mA to 150 mA, tR/tF = 2 ms Room 30
w/o CBP Cap Room 5
= 3.3 V
CBP = 0.1 mF Room 1000
Thermal Shutdown
Thermal Shutdown Junction Temp t
Thermal Hysteresis t
Short Circuit Current I
J(s/d)
HYST
SC
V
= 0 V Room 400 mA
OUT
Room 165
Room 20
Shutdown Input
V
SD Input Voltage
SD Input Current
e
Shutdown Hysteresis V
Notes
a. Room = 25_C, Full = −40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at V
V
= 2.5 V, while typical values for dropout voltage at V
OUT
d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V
differential, provided that V
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f. V
is defined as the output voltage of the DUT at 1 mA.
OUT
does not not drop below 2.0 V.
IN
IH
V
IL
I
IL
I
IH
HYST
High = Regulator ON (Rising) Full 1.2 V
Low = Regulator OFF (Falling) Full 0.4
VSD = 0 V, Regulator OFF Room 0.01
VSD = 6 V, Regulator ON Room 1.0
Full 100 mV
< 2 V are measured at V
OUT
OUT
= 1.8 V.
Limits
−40 to 85_C
b
Typ
c
OUT
b
IN
w 2 V are measured at
dB
mV
ms
_
_C
V
mA
Document Number: 71258
S-51147—Rev. G, 20-Jun-05
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Si9183
Vishay Siliconix
TIMING WAVEFORMS
V
IN
t
ON
0.95 V
NOM
V
OUTVOUT
FIGURE 3. Timing Diagram for Power-Up
V
NOM
PIN CONFIGURATION
Thin SOT-23, 5-Pin
V
GND
SD
1
IN
2
3
5
V
OUT
BP (Version A)
4
FB (Version B)
PIN DESCRIPTION
Pin Number Name Function
1 V
2 GND Ground pin. Local ground for CBP and C
3 SD By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused.
4 (Version A) BP
4 (Version B) FB Connect to divided output voltage to adjust the regulation point.
5 V
IN
OUT
Input supply pin. Bypass this pin with a 1-mF ceramic or tantalum capacitor to ground.
.
OUT
Noise bypass pin. For low noise applications, a 0.1-mF or larger ceramic capacitor should be connected from this pin to
ground.
Output voltage. Connect C
between this pin and ground.
OUT
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Document Number: 71258
S-51147—Rev. G, 20-Jun-05
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