VISHAY Si4830ADY Technical data

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Dual N-Channel 30-V (D-S) MOSFET with Schottky Diode

Si4830ADY

Vishay Siliconix

PRODUCT SUMMARY

V

(V) r

DS

30

0.022 @ VGS = 10 V 7.5

0.030 @ VGS = 4.5 V 6.5

(W) I

DS(on)

SCHOTTKY PRODUCT SUMMARY

VSD (V)

V

(V)

DS

30 0.50 V @ 1.0 A 2.0

Ordering Information: Si4830ADY—E3 (Lead Free)

Diode Forward Voltage

SO-8

S

1

1

G

2

1

S

3

2

G

4

2

Top View

Si4830ADY-T1—E3 (Lead Free with Tape and Reel)

D

8

1

D

7

1

D

6

2

D

5

2

FEATURES

(A)

D

D LITTLE FOOTr Plus Schottky
D Si4830DY Pin Compatible
D PWM Optimized
D 100% R

Tested

g

APPLICATIONS

D Asymmetrical Buck-Boost DC/DC Converter

I

(A)

F

D

G

1

N-Channel MOSFET

1

G

2

S

1

D

2

S

2

N-Channel MOSFET

Schottky Diode

ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)

Parameter Symbol 10 secs Steady State Unit

Drain-Source Voltage V

Gate-Source Voltage V

a

TA = 25_C

TA = 70_C

TA = 25_C

TA = 70_C

P

a

Continuous Drain Current (TJ = 150_C)

Pulsed Drain Current I

Continuous Source Current (Diode Conduction)

Maximum Power Dissipation

Operating Junction and Storage Temperature Range TJ, T

_

a

I

DM

I

DS

GS

D

S

D

stg

7.5 5.7

6.0 4.6

1.7 0.9

2.0 1.1

1.3 0.7

30

"20

30

−55 to 150 _C

THERMAL RESISTANCE RATINGS

MOSFET Schottky

Parameter Symbol

Maximum Junction-to-Ambient

Maximum Junction-to-Foot (Drain) Steady-State R

Notes
a. Surface Mounted on 1” x 1” FR4 Board.

a

t v 10 sec

Steady-State

R

thJA

thJF

Typ Max Typ Max

52 62.5 53 62.5

93 110 93 110

35 40 35 40

V

A

W

Unit

_C/W

Document Number: 72021
S-32621—Rev. D, 29-Dec-03

www.vishay.com

1

Si4830ADY

b

b

DS

,

GS

,

D

VDD = 15 V, RL = 15 W

g

rm

Vishay Siliconix

MOSFET SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED).

Parameter Symbol Test Condition Min TypaMax Unit

Static

Gate Threshold Voltage V

Gate-Body Leakage I

Zero Gate Voltage Drain Current I

On-State Drain Current

b

Drain-Source On-State Resistance

Forward Transconductance

b

Diode Forward Voltage

Dynamic

a

Total Gate Charge Q

Gate-Source Charge Q

Gate-Drain Charge Q

Gate Resistance R

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

Source-Drain Reverse Recovery Time t

Notes
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width v

300 ms, duty cycle v 2%.

GS(th)

GSS

DSS

I

D(on)

r

DS(on)

g

V

d(on)

d(off)

fs

SD

g

gs

gd

g

r

f

rr

VDS = 30 V, VGS = 0 V, TJ = 85_C

VDS = VGS, I

VDS = 0 V, V

VDS = 30 V, VGS = 0 V

V

DS

= 250 mA 0.8 3.0 V

D

= "20 V "100 nA

GS

Ch-1

Ch-2 100

_

Ch-1

Ch-2 2000

= 5 V, VGS = 10 V 20 A

VGS = 10 V, ID = 7.5 A 0.017 0.022

VGS = 4.5 V, ID = 6.5 A 0.024 0.030

VDS = 15 V, ID = 7.5 A 19 S

IS = 1 A, VGS = 0 V

V

= 15 V, VGS = 4.5 V, ID = 7.5 A

DS

VDD = 15 V, RL = 15 W

ID ^ 1 A, V

= 10 V, Rg = 6 W

GEN

IF = 1.7 A, di/dt = 100 A/ms

Ch-1

Ch-2 0.47 0.5

Ch-1

Ch-2 32 55

1

15

0.75 1.2

7 11

2.9

2.5

0.5 1.5 2.4 W

9 15

10 17

19 30

9 15

35 55

mA

W

V

nC

ns

SCHOTTKY SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED)

Parameter Symbol Test Condition Min Ty p Max Unit

Forward Voltage Drop V

Maximum Reverse Leakage Current I

Junction Capacitance C

F

rm

T

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2

IF = 1.0 A 0.47 0.50

IF = 1.0 A, TJ = 125_C 0.36 0.42

Vr = 30 V 0.004 0.100

Vr = 30 V, TJ = 100_C 0.7 10

Vr = −30 V, TJ = 125_C 3.0 20

Vr = 10 V

50 pF

Document Number: 72021

S-32621—Rev. D, 29-Dec-03

V

mA