VISHAY S904T, S904TR Datasheet
S904T/S904TR
Vishay Telefunken
MOSMIC for TV–Tuner Prestage with 9 V Supply
Voltage
MOSMIC - MOS Monolithic Integrated Circuit Electrostatic sensitive device.
Observe precautions for handling.
Applications
Low noise gain controlled input stages in UHF-and
VHF- tuner with 9 V supply voltage.
Features
D
Integrated gate protection diodes
D
Low noise figure
D
20mS forward transadmittance
D
Biasing network on chip
21
94 9279
43
S904T Marking: 904
Plastic case (SOT 143)
1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1
13 579
D
RFC
C block
V
DD
RF out
94 9296
C block
AGC
RF in
C block
D
Improved cross modulation at gain reduction
D
High AGC-range
D
SMD package
G2
G1
S
21
94 9278
95 10831
43
S904TR Marking: 90R
Plastic case (SOT 143R)
1 = Source, 2 = Drain, 3 = Gate 2, 4 = Gate 1
Absolute Maximum Ratings
T
= 25_C, unless otherwise specified
amb
Parameter Test Conditions Symbol Value Unit
Drain - source voltage V
Drain current I
Gate 1/Gate 2 - source peak current ±I
Gate 1/Gate 2 - source voltage ±V
Total power dissipation T
≤ 60 °C P
amb
G1/G2SM
G1/G2SM
Channel temperature T
Storage temperature range T
DS
D
tot
Ch
stg
12 V
30 mA
10 mA
6 V
200 mW
150
–55 to +150
Maximum Thermal Resistance
T
= 25_C, unless otherwise specified
amb
Parameter T est Conditions Symbol Value Unit
Channel ambient on glass fibre printed board (25 x 20 x 1.5) mm
plated with 35mm Cu
Document Number 85068
Rev. 3, 20-Jan-99
3
R
thChA
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450 K/W
°
°
C
C
1 (4)
S904T/S904TR
g
g
Vishay Telefunken
Electrical DC Characteristics
T
= 25_C, unless otherwise specified
amb
Parameter Test Conditions Symbol Min Typ Max Unit
Gate 1 - source
breakdown voltage
Gate 2 - source
breakdown voltage
Gate 1 - source +V
leakage current
Gate 2 - source
leakage current
Drain current VDS = 9 V, V
Self-biased
operating current
Gate 2 - source
cut-off voltage
Electrical AC Characteristics
±I
= 10 mA, V
G1S
±I
= 10 mA, V
G2S
= 5 V, V
G1S
–V
= 5 V, V
G1S
±V
= 5 V, V
G2S
VDS = 9 V, V
VDS = 9 V, V
= VDS = 0 ±V
G2S
= VDS = 0 ±V
G1S
= VDS = 0 +I
G2S
= VDS = 0 –I
G2S
= VDS = 0 ±I
G1S
= 0, V
G1S
= nc, V
G1S
= nc, ID = 20 mA V
G1S
= 4 V I
G2S
= 4 V I
G2S
(BR)G1SS
(BR)G2SS
G1SS
G1SS
G2SS
DSS
DSP
G2S(OFF)
7 10 V
7 10 V
50 500mA
7 10 14 mA
1.0 V
50
m
100mA
20 nA
A
VDS = 9 V, V
= 4 V, f = 1 MHz , T
G2S
= 25_C, unless otherwise specified
amb
Parameter Test Conditions Symbol Min Typ Max Unit
Forward transadmittance y
Gate 1 input capacitance C
Feedback capacitance C
Output capacitance C
Power gain GS = 2 mS, GL = 0.5 mS, f = 200 MHz G
GS = 3,3 mS, GL = 1 mS, f = 800 MHz G
AGC range VDS = 9 V, V
= 1 to 4 V, f = 800 MHz
G2S
17 20 23 mS
21s
2.0 2.5 pF
20 fF
0.9 pF
26 dB
40 dB
D
issg1
rss
oss
ps
ps
G
ps
16.5 20 dB
Noise figure GS = 2 mS, GL = 0.5 mS, f = 200 MHz F 1 dB
GS = 3,3 mS, GL = 1 mS, f = 800 MHz F 1.6 2.5 dB
Caution for Gate 1 switch-off mode:
No external DC-voltage on Gate 1 in active mode!
Switch-off at Gate 1 with V
Using open collector switching transistor (inside of PLL), insert 10 kW collector resistor.
< 0.7 V is feasible.
G1S
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2 (4)
Document Number 85068
Rev. 3, 20-Jan-99
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