Vishay IRFR320, IRFU320, SiHFR320, SiHFU320 Data Sheet
www.vishay.com
DPAK
(TO-252)
IPAK
(TO-251)
G
D
S
S
D
G
D
IRFR320, IRFU320, SiHFR320, SiHFU320
Vishay Siliconix
Power MOSFET
PRODUCT SUMMARY
VDS (V) 400
R
(Ω)V
DS(on)
Q
(Max.) (nC) 20
g
Q
(nC) 3.3
gs
Q
(nC) 11
gd
Configuration Single
= 10 V 1.8
GS
D
FEATURES
• Dynamic dV/dt rating
• Repetitive avalanche rated
• Surface mount (IRFR320,SiHFR320)
• Straight lead (IRFU320,SiHFU320)
• Available in tape and reel
• Fast switching
• Ease of paralleling
• Material categorization: for definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
G
S
N-Channel MOSFET
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The DPAK is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The straight
lead version (IRFU, SiHFU series) is for through-hole
mounting applications. Power dissipation levels up to 1.5 W
are possible in typical surface mount applications.
ORDERING INFORMATION
Package DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) DPAK (TO-252) IPAK (TO-251)
Lead (Pb)-free and Halogen-free SiHFR320-GE3 SiHFR320TRL-GE3
Lead (Pb)-free
IRFR320PbF IRFR320TRLPbF
SiHFR320-E3 SiHFR320TL-E3
Note
a. See device orientation.
a
SiHFR320TR-GE3 a- SiHFU320-GE3
a
a
IRFR320TRPbF
SiHFR320T-E3
a
IRFR320TRRPbF aIRFU320PbF
a
SiHFR320TR-E3 aSiHFU320-E3
Available
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
Gate-Source Voltage V
Continuous Drain Current V
Pulsed Drain Current
a
Linear Derating Factor 0.33
Linear Derating Factor (PCB Mount)
Single Pulse Avalanche Energy
Repetitive Avalanche Current
Repetitive Avalanche Energy
e
b
a
a
Maximum Power Dissipation T
Maximum Power Dissipation (PCB Mount)
Peak Diode Recovery dV/dt
c
e
Operating Junction and Storage Temperature Range T
Soldering Recommendations (Peak Temperature)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
= 50 V, starting TJ = 25 °C, L = 29 mH, Rg = 25 Ω, IAS = 3.1 A (see fig. 12).
DD
c. I
≤ 3.1 A, dI/dt ≤ 65 A/μs, VDD ≤ VDS, TJ ≤ 150 °C.
SD
d. 1.6 mm from case.
S14-2355-Rev. E, 08-Dec-14
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: hvm@vishay.com
at 10 V
GS
= 25 °C
C
TA = 25 °C 2.5
d
for 10 s 260
DS
± 20
GS
T
= 25 °C
C
= 100 °C 2.0
C
I
D
IDM 12
E
AS
I
AR
E
AR
P
D
dV/dt 4.0 V/ns
, T
J
stg
-55 to +150
1
400
3.1
0.020
W/°C
160 mJ
3.1 A
4.2 mJ
42
Document Number: 91273
V
AT
W
°C
IRFR320, IRFU320, SiHFR320, SiHFU320
D
S
G
www.vishay.com
e. When mounted on 1" square PCB (FR-4 or G-10 material).
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Maximum Junction-to-Ambient R
Maximum Junction-to-Ambient
(PCB Mount)
a
Maximum Junction-to-Case (Drain) R
thJA
R
thJA
thJC
--110
--50
--3.0
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
V
Temperature Coefficient ΔVDS/TJ Reference to 25 °C, ID = 1 mA - 0.51 - V/°C
DS
Gate-Source Threshold Voltage V
Gate-Source Leakage I
Zero Gate Voltage Drain Current I
Drain-Source On-State Resistance R
Forward Transconductance g
DS
GS(th)
V
GSS
DSS
VGS = 10 V ID = 1.9 A
DS(on)
fs
Dynamic
Input Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Gate-Drain Charge Q
Turn-On Delay Time t
Rise Time t
Turn-Off Delay Time t
Fall Time t
Internal Drain Inductance L
Internal Source Inductance L
iss
- 120 -
oss
-47-
rss
g
--3.3
gs
--11
gd
d(on)
r
-30-
d(off)
-13-
f
D
V
Between lead,
6 mm (0.25") from
package and center of
S
die contact
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
Pulsed Diode Forward Current
a
Body Diode Voltage V
Body Diode Reverse Recovery Time t
Body Diode Reverse Recovery Charge Q
Forward Turn-On Time t
S
I
SM
SD
rr
rr
on
MOSFET symbol
showing the
integral reverse
p - n junction diode
TJ = 25 °C, IF = 3.3 A, dI/dt = 100 A/μs
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 μs; duty cycle ≤ 2 %.
VGS = 0 V, ID = 250 μA 400 - - V
VDS = VGS, ID = 250 μA 2.0 - 4.0 V
= ± 20 V - - ± 100 nA
GS
VDS = 400 V, VGS = 0 V - - 25
= 320 V, VGS = 0 V, TJ = 125 °C - - 250
V
DS
b
VDS = 50 V, ID = 1.9 A 1.7 - - S
VGS = 0 V,
V
= - 25 V,
DS
f = 1.0 MHz, see fig. 5
= 3.3 A, VDS = 320 V,
I
= 10 V
GS
V
R
= 18 Ω, RD = 56 Ω, see fig. 10
g
TJ = 25 °C, IS = 3.1 A, VGS = 0 V
D
see fig. 6 and 13
= 200 V, ID = 3.3 A,
DD
b
b
D
G
S
b
b
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Vishay Siliconix
°C/W
--1.8Ω
- 350 -
--20
-10-
-14-
-4.5-
-7.5-
--3.1
--12
--1.6V
- 270 600 ns
-1.43.0μC
μA
pFOutput Capacitance C
nC Gate-Source Charge Q
ns
nH
A
S14-2355-Rev. E, 08-Dec-14
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
For technical questions, contact: hvm@vishay.com
2
Document Number: 91273
IRFR320, IRFU320, SiHFR320, SiHFU320
0.01
0.1
1
10
45678910
I
D
, Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
TJ= 150 °C
TJ= 25 °C
VDS= 26.2V
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Vishay Siliconix
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 2 - Typical Output Characteristics, T
= 150 °C
C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
S14-2355-Rev. E, 08-Dec-14
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
3
For technical questions, contact: hvm@vishay.com
Document Number: 91273
www.vishay.com
IRFR320, IRFU320, SiHFR320, SiHFU320
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 8 - Maximum Safe Operating Area
S14-2355-Rev. E, 08-Dec-14
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
4
Document Number: 91273
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