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IRF9530S, SiHF9530S
www.vishay.com
Vishay Siliconix
S16-0754-Rev. D, 02-May-16
1
Document Number: 91077
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Power MOSFET
FEATURES
• Surface mount
• Available in tape and reel
• Dynamic dV/dt rating
• Repetitive avalanche rated
•P-channel
• 175 °C operating temperature
• Fast switching
• Material categorization: for definitions of
compliance please see www.vishay.com/doc?99912
Note
*
Thi s datasheet pro vi des information about parts that are
RoHS-compliant and / or parts that are non-RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details.
DESCRIPTION
Third generation power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
The D
2
PAK (TO-263) is a surface mount power package
capable of accommodating die sizes up to HEX-4. It
provides the highest power capability and the lowest
possible on-resistance in any existing surface mount
package. The D
2
PAK (TO-263) is suitable for high current
applications because of its low internal connection
resistance and can dissipate up to 2.0 W in a typical surface
mount application.
Note
a. See device orientation.
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. V
DD
= -25 V, starting T
J
= 25 °C, L = 4.2 mH, R
g
= 25 , I
AS
= -12 A (see fig. 12).
c. I
SD
- 12 A, dI/dt 140 A/μs, V
DD
V
DS
, T
J
175 °C.
d. 1.6 mm from case.
e. When mounted on 1" square PCB (FR-4 or G-10 material).
PRODUCT SUMMARY
V
DS
(V) -100
R
DS(on)
()V
GS
= -10 V 0.30
Q
g
max. (nC) 38
Q
gs
(nC) 6.8
Q
gd
(nC) 21
Configuration Single
D
2
PAK (TO-263)
G
D
S
ORDERING INFORMATION
Package D
2
PAK (TO-263) D
2
PAK (TO-263) D
2
PAK (TO-263)
Lead (Pb)-free and Halogen-free SiHF9530S-GE3 SiHF9530STRL-GE3
a
SiHF9530STRR-GE3
a
Lead (Pb)-free
IRF9530SPbF IRF9530STRLPbF
a
IRF9530STRRPbF
a
SiHF9530S-E3 SiHF9530STL-E3
a
SiHF9530STR-E3
a
ABSOLUTE MAXIMUM RATINGS (T
C
= 25 °C, unless otherwise noted)
PARAMETER SYMBOL LIMIT UNIT
Drain-Source Voltage V
DS
-100
V
Gate-Source Voltage V
GS
± 20
Continuous Drain Current V
GS
at - 10 V
T
C
= 25 °C
I
D
-12
AT
C
= 100 °C -8.2
Pulsed Drain Current
a
I
DM
-48
Linear Derating Factor 0.59
W/°C
Linear Derating Factor (PCB mount)
e
0.025
Single Pulse Avalanche Energy
b
E
AS
400 mJ
Avalanche Current
a
I
AR
-12 A
Repetitive Avalanche Energy
a
E
AR
8.8 mJ
Maximum Power Dissipation T
C
= 25 °C
P
D
88
W
Maximum Power Dissipation (PCB mount)
e
T
A
= 25 °C 3.7
Peak Diode Recovery dV/dt
c
dV/dt - 5.5 V/ns
Operating Junction and Storage Temperature Range T
J
, T
stg
-55 to +175
°C
Soldering Recommendations (Peak temperature)
d
for 10 s 300
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IRF9530S, SiHF9530S
www.vishay.com
Vishay Siliconix
S16-0754-Rev. D, 02-May-16
2
Document Number: 91077
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Note
a. When mounted on 1" square PCB (FR-4 or G-10 material).
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
THERMAL RESISTANCE RATINGS
PARAMETER SYMBOL TYP. MAX. UNIT
Maximum Junction-to-Ambient R
thJA
-62
°C/W
Maximum Junction-to-Ambient
(PCB mount)
a
R
thJA
-40
Maximum Junction-to-Case (Drain) R
thJC
-1.7
SPECIFICATIONS (T
J
= 25 °C, unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
Static
Drain-Source Breakdown Voltage V
DS
V
GS
= 0, I
D
= -250 μA -100 - - V
V
DS
Temperature Coefficient V
DS
/T
J
Reference to 25 °C, I
D
= -1 mA - -0.10 - V/°C
Gate-Source Threshold Voltage V
GS(th)
V
DS
= V
GS
, I
D
= -250 μA -2.0 - -4.0 V
Gate-Source Leakage I
GSS
V
GS
= ± 20 V - - ± 100 nA
Zero Gate Voltage Drain Current I
DSS
V
DS
= -100 V, V
GS
= 0 V - - -100
μA
V
DS
= -80 V, V
GS
= 0 V, T
J
= 150 °C - - -500
Drain-Source On-State Resistance R
DS(on)
V
GS
= -10 V I
D
= -7.2 A
b
- - 0.30
Forward Transconductance g
fs
V
DS
= -50 V, I
D
= -7.2 A
b
3.7 - - S
Dynamic
Input Capacitance C
iss
V
GS
= 0 V,
V
DS
= -25 V,
f = 1.0 MHz, see fig. 5
- 860 -
pFOutput Capacitance C
oss
- 340 -
Reverse Transfer Capacitance C
rss
-93-
Total Gate Charge Q
g
V
GS
= -10 V
I
D
= -12 A, V
DS
= -80 V,
see fig. 6 and 13
b
--38
nC Gate-Source Charge Q
gs
--6.8
Gate-Drain Charge Q
gd
--21
Turn-On Delay Time t
d(on)
V
DD
= -50 V, I
D
= -12 A,
R
G
= 12 , R
D
= 3.9 , see fig. 10
b
-12-
ns
Rise Time t
r
-52-
Turn-Off Delay Time t
d(off)
-31-
Fall Time t
f
-39-
Internal Drain Inductance L
D
Between lead,
6 mm (0.25") from
package and center of
die contact
-4.5-
nH
Internal Source Inductance L
S
-7.5-
Gate Input Resistance R
g
f = 1 MHz, open drain 0.4 - 3.3
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current I
S
MOSFET symbol
showing the
integral reverse
p -n junction diode
---12
A
Pulsed Diode Forward Current
a
I
SM
---48
Body Diode Voltage V
SD
T
J
= 25 °C, I
S
= -12 A, V
GS
= 0 V
b
---6.3V
Body Diode Reverse Recovery Time t
rr
T
J
= 25 °C, I
F
= -12 A, dI/dt = 100 A/μs
b
- 120 240 ns
Body Diode Reverse Recovery Charge Q
rr
-0.460.92μC
Forward Turn-On Time t
on
Intrinsic turn-on time is negligible (turn-on is dominated by L
S
and L
D
)
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IRF9530S, SiHF9530S
www.vishay.com
Vishay Siliconix
S16-0754-Rev. D, 02-May-16
3
Document Number: 91077
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics, T
C
= 25 °C
Fig. 2 - Typical Output Characteristics, T
C
= 175 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
91077_01
Bottom
To p
V
GS
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
- 4.5 V
20 µs Pulse Width
T
C
= 25 °C
- 4.5 V
- V
DS
, Drain-to-Source Voltage (V)
- I
D
, Drain Current (A)
10
0
10
1
10
1
10
0
10
-1
10
1
10
0
10
0
10
1
- V
DS
,
Drain-to-Source Voltage (V)
- I
D
, Drain Current (A)
Bottom
To p
V
GS
- 15 V
- 10 V
- 8.0 V
- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
- 4.5 V
20 µs Pulse Width
T
C
= 175 °C
91077_02
- 4.5 V
10
-1
20 µs Pulse Width
V
DS
= - 50 V
10
1
10
0
- I
D
, Drain Current (A)
- V
GS
,
Gate-to-Source Voltage (V)
5678910
4
25 °C
175 °C
91077_03
I
D
= - 12 A
V
GS
= - 10 V
3.0
0.0
0.5
1.0
1.5
2.0
2.5
T
J
,
Junction Temperature (°C)
R
DS(on)
, Drain-to-Source On Resistance
(Normalized)
91077_04
- 60- 40 - 20 0 20 40 60 80 100 120 140 160 180
1800
1500
1200
900
0
300
600
10
0
10
1
Capacitance (pF)
- V
DS
,
Drain-to-Source Voltage (V)
C
iss
C
rss
C
oss
V
GS
= 0 V, f = 1 MHz
C
iss
= C
gs
+ C
gd
, C
ds
Shorted
C
rss
= C
gd
C
oss
= C
ds
+ C
gd
91077_05
Q
G
, Total Gate Charge (nC)
- V
GS
, Gate-to-Source Voltage (V)
20
16
12
8
0
4
0
10
50
40
3020
V
DS
= - 20 V
V
DS
= - 50 V
For test circuit
see figure 13
V
DS
= - 80 V
91077_06
I
D
= - 12 A