Vector ZCB User Manual

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ZCB

SINGLE

BOARD

CDMPtJI'ER

Revision

USERI S MANUAL

Revision

June

11,

1

B

1980

COP1~ight

1980

7200-0203-03-02

vector

Graphic

Inc.

Vector
contents
covered

the

right

in

the
person
exists.

The

date

page.

improved

date

and
recently
product
and

the

product.

TITLE

PAGE.

Graphic

of

byawarranty

to

content

of

such

and

The

revision

but

revision

revised.
will
manual

EAQI

this

revise

revision

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the

get

will
MANUAL

makes

manual

hereof

a new

Copyright

no

or

this

or

letter

PRODUCT

on

the

When

revision

revert

SHOULD

1980

All

rights

Disclaimer

representations

itself,

repair
publication

without

of

Title

the

whether
agreement.

obligation

changes,

Revisions

each

such

itself

to

page

as

Page

product

number,

revision

ONLYBEUSED

by

Vector

reserved.

or

and

except

herein

A

or

has

not

corresponds

itself

as

A,

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or
not

Further,

to

make

when

B

changes
been

shown
as
WITH

warranties

the

product

changes

of

Vector
an

agreement

appears

significantly

to

is

modified
on

if

it

were

THE

PRODUCT

Inc.

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MANUAL

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IDENI'IFIED

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title

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to

notify

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of

has

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brand

to

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been

most

page,

ON

the

is

any

each

The

the

new
THE

Rev.

I-B

6/11/80

vector

ZCB

Single

Poard Computer

The

ZCB

Single

faults

implied
the
ninety
Single

and

above

Poard

warranty

notwithstanding,

(90)

iIIiOrkmanship,

1.

ZCB

Single

2.

claimed
GRAPHIC,

INC.,

within

3.

to

INC.,

confirm

replacement
Repair,

which
performed
Single

GRAPHIC,

any
forth

replacement

are

by

Board

INC.,

repair,

above,

then-current
applicable
hour

of

work
replacement
after

INC.,
VECTOR
written

INC.,

INC.,
shall
Computer
proceed,
of

expiration

will

signed

to

have

the

estimated

GRAPHIC,

estimate

camnence
until

and

Board

without

days
Computer

Computer

any

warranty,

of

fitness

following

that

provided:

Such

defect

Board Computer

VECTOR
The

if

discovered

VECTOR

ten

ZCB

at

found

GRAPHIC,

(10)

Single

customer's

the

alleged

to

or

correction

after

GRAPHIC,

Computer

for

such

replacement

Buyer

rate

will

VECTOR

is

$35.00

GRAPHIC,

required

or

correction

of

the

submit

to

Buyer a

INC.,

of

charges

by

no

obligation

the

VECTOR

duly

authorized

with

written

GRAPHIC,

the

repair

VECTOR

delivery
is

in

material

left

INC.,

days

after

Poard

be

in

expiration

is

returned,

repair,

or

be

charged

for

thereafter.

of

defects

period

written

will

has

repair

to

repair,

estimate

INC.,

charges

REPAIR

AGREEMENT

sold
either

for

intended

GRAPHIC,

found

or

the

VECTOR

is

its

Computer

expense,

defect,

order.

of

any

INC.,

at

replacement

correction

in

INC.,

the

first

in

for

no-cost-to-Buyer

estimate

not

commence

been

returned

representative

work

replace

may

prior

hereunder

expressed

use

or

INC.,

to

customer,

to

contain

v;orkmanship

GRAPHIC,

given

notice

discovery;

is

promptly

for

examination

and

for

defects

of

Buyer

also

the

after

period

I s

expense,

at

Buyer's

or

correction.

expiration

in

addition

repair

hour,
material

Prior

rate.
and

to

of

or

the

repair

by

authorizing

involved.

or

correct

has

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at

its

to

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returned

option

is

or

sold

implied,

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including

merchantability.

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repair

defects

existed

INC.,

of

for

or

replace

in

at

factory;

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precise

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returned

by

VECTOR

subsequent

material

set

or

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provided

expense,

In

of

the

to

the

cost

At

the

present

$18.00

per

hour
commencing
workmanship

repairs,

VECTOR

expected

until

Buyer

such

to

VECTOR

VECTOR

VECTOR

any

GRAPHIC,

ZCB

with

also

require

is",

with
However,

a

period

any

materials

the

time

defect

to

VECTOR

GRAPHIC,

repair

workmanship

above

will

the

to

VECTOR

performing

period

of

parts

time

for

every

any

repair,

discovered

GRAPHIC,

charges,

time

as

GRAPHIC,

GRAPHIC,

INC.,

Single

Board

approval

prepayment

all

any

of

ZCB

or

the

or

be

ZCB

set

the

the

and
the

to

Repair

GRAPHIC,

Rev. 1-B

Agreement

INC.

within

6/11/80

void

ten

if

(10)

the

days

enclosed

of

end consumer

card

is

not

purchase.

returned

to

VECTOR

Vector

ZCB

Single

FOREWORD

Board computer

Audience

Scope

This

manual

distributors,
moderate

technical

computers.

It

will

describe

ZCB

Single.

Board
ofacanputer
both
systems,

in

Vector

and

is

intended

or

system,

Graphic

how

others

knowledge

what

the

Canputer

how

and

the

board

for

with

Vector

does

to

in
circuitry

canputer

at

least

of

small

Graphic

in

the

use

the

other

a

/

context

board

S-lOO

WJrks.

Organization

Each

section

of

technical

WHAT

the

moderate knowledge

"User"s
things

Guide"

and

knowledge,

jLmIpers

and

Operation"

is

written

depth.

"Perspective"

board does and

of

describes
aSSllTIleS
plus

flip

discusses

the

the

ability

switches.

WHY

and assumes a knowledge

electronics.

at

a uniform

requires

computer

HCW

same

level

to
"Theory

the

of

digital

level

describes

only

a

design.

to

make

it

of

solder

of

board works

do

Rev.

l-B

6/11/80

Vector

Section

ZCB

Single

Board

Canputer

TABLEOFCONI'ENI'S

Table
Specifications

I.

Perspective

1.1

1.2

1.3

1.4

1.5

II.

User! s Guide

2.1

of

Contents

'It1e

ZCB

as a

The

ZCBaspart

CPU

sect

ion

EPR~/R.M1

I/O

section

1.5.•1

1.5.2

1.5.3

105.4

1.5.5

II!!5.6

2.1.1

section

Serial
Serial
serial

RS-232C Theory.eeel\l ••

RS-232C

Parallel

Standard

system

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1-2
1-3
1-3

1-5

2-1

2

2.2

2.3

2.4

CPU

Sect

ion

2.2.1

2.2.2

2.2.3

Running
MW1(ITE
Auto

EPRCl1/RAM.

2.3.1

2.3.2

2.3.3

2.3.4

2.3.5

2.3.6

2.3.7

I/O

2.4.1

2.4.2

2.4.3

2.4.4

2708

Auxiliary
2716

2732
Enable
Phantom

Jumper

Section.

I/O

Address
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How

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the

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Rev. 1-B

6/11/80

Section

Vector

ZCB

Single

Board Computer

2.4.5

2.4.6

2.4.7

2.4.8

2.4.9

2.9

Spare Chip and

III.

Theory

3.1

3~2

of

System

Serial

IV. Schematics

Howtoconnect
Connecting

Using

the

Connecting
Connecting

Patch

Operation

Operation

Ports

•••••••••••••••••

most low speed

additional

Parallel

Sprint

Vector

areas

Ports

3

to

MP

to

•••••••••••••••••••••••••••••••••

Block Diagram

RS-232C

acoustic
handshaking

couplers

lines

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2-l5

2-l8
2-19

2-19

2-20

3-1

3-2

Rev. 1-B

6/11/80

vector

ZCB

Single

Board

canputer

SPECIFICATIONS-System

Compatibility:
Power Requirements

Availabili

ty:

Merrory

EPROMs

included

with

board
Memory

Memory

Standard
Systems Monitor

Speed

Types

Location

EPRa1

of

Most S-lOO

+8VOC@970
+16

VDC

-16

VDC

Shipped

systems.

rna.

(typ.)

@ 120

@

80

mao

rna.

assembled,

tested,

SPECIFICATIONS-EPRa1/RAM

65536

3

bytes

EPRCM

addressable,

sockets

on

board,

none

RAM:

RAM:

300ns.

EPRCM:

2114

EPROM:

User

selected

static

2708, 2716, 2732

EOOOH-E7FFH

(450

burned

1024

up

ns.

bytes

to

12K

typical)

in;

no

kits.

RAMonboard,
addressable

Power-on/Reset

Options

Processor
Number
Number

of
of

Data
Address

Instructions

Clock speed

Interrupts
I/O

devices

Dynamic

RAM

Jump

Bits

Bits

Auto

boot

EOOOH.

Shipped

SPECIFICATIONS-CPU

Z-80A

8

16
158,

including

2

or4MHz,

Z-80

Mode

256

I/O

Supports

on bus

line

generated

on power

enabled.

all

jumper

0 (8080 mode),

addresses

d}mamic

on

66;

board.

memory

fast

on/reset,

78

8080

instructions

selectable,

MODE1,MODE

by

sending

reset/power

jumps

enabled

on

to

memory

for4MHz.

2

Z-SO

clear

location

RFSH

signal

Rev.

I-B

6/11/80

Vector

ZCB

Single

Board Computer

Static

RAM

MWRITE

Wait

state

for

memories

than

300

Bus

Load

Buffering

Phantom:

Mirroring

generation

slower

ns.

Fully
Jumper

Standard:
3

cycle,

compatible

option

options:

generate

option

generate

instruction,
Standard:

generate

instruction.

1

standard

Fan

out:

Output

EPRCM/RAM

TTL

15

standard

buffer

Boards, which

Power-on-clear

Standard:

Standard:

enabled
enabled,

SPECIFICATIONS-I/O

to

generate
enabled.

one

one

wait

generate

load

one

on

no

wait

all

(60 low power

disable

compatible

(POe). Jumper

can

be

MWRITEonboard

wait

state
wait

state

states.

state

on each bus

after

after

inputs

shottky)

with

generate

phantom

selectable:

disabled.

each

each

Vector

Ml

Ml

Graphic

in

response

on/off.

to

Capacity

Serial

port

Port

Signal

addresses

levels

RS-232 handshaking

Asynchronous

Rates

Data

bits

Stop

bits

parity

1

serial

as

input

1,

using

Any
addresses
Control,

EIA
Typical

DSR,

RS-232 and 3
or

8251

increment

are:

05H

RS-232C

handshaking

etc.

110-9600 baud

5 -

8,

programmable

l,

1

1/2,

or

odd,

Even,

or

8-bit

output.

controller
of

four

Data,

chip.

fran

04H

(echoed on 06H);

(echoed on 07H.)

is

provided,

(switch

2,

programmable

selectable)

none, programmable

parallel

DOHtoFER.

ie.

ports

Preset

RI'S,

programmable

CTS,

DI'R,

Rev.

I-B

6/11/80

Vector

Synchronous

ZCB

Single

Board Computer

Parallel

Port

latching

Signal

Rates
Synch

Clock

Parity
Data
Sync

bits

character

Ports

Addresses

level

detect

OC-56K.
Can

be

8251

SYNDET

r-bt

now

for

synchronous

EvenI

5

odd,

-

8,

Single

2-8

bit,

an

8255

Any

increment

addresses

and

the
Output
'ITL

(input

load)

•

wired

for

line

connected

internal
is

to

operation.

or

none,
prograrmnable
or

double

2-4

parallel

are:

Control

latched,

bit

of

synch
can

I/O
four

Port

Status

input

= 1 low power TIL

or

external

not

connected.

the

external

prograrmnable

character

be

programmed

controller

from

OOHtoPFH.

A,

08H:

Port

Register

not

latched.

load:

\\GrId

can

as

chip.

B, 09Hi

at

DBH.

output

synch.

as

required

be

progrannned.

3-8

bit.

Preset

Port

drives

C,

Uses

OAH

1

TI'L

Number

Data

Cable

of

lines

transfer

8

lines

+5

VDC

Over

lOOK

Optional.
ribbon

allowing
ordered

per

channel,

and

GND

bytes/second.
Has

34-pin
cable.

user

to

separately.

are

also

No

connector

configure

programmable

provided.

female

connector
is

at

as

required.

for

input

and

the

ot..~er

or

34-line

end,

Must be

output.

Rev. 1-B

6/11/80

1.1

Vector

The

ZCB

The

ZCB

Vector

asasystem

ccrnplete

normally

contained

The

ZCB

sockets

for

ports.

S-lOO 8080

based

systems.
regulators
1 low

power

Single

Graphic

canputer

find

on

one

contains

up

to

Circuitry

signals

and

heat

TTL

Board Computer

ZCB

Single

system

on

S-lOO

a

CPU

bus

onasingle

board,

a Z-80A

12K

of

PRCM,

is

provided

are

also

On-board

load

sinks

while

power

for

I.

PERSPECrIVE

Board Computer

board.

a

PROM/RAM

canpatible

board.

microprocessor,

one

serial

to

support

generated

making

regulation

power

output

dissipation.

fanout

I/O

and

is

provides

The

board

1024

port

static

the

filtering

10 TTL

ZCB

bytes

and
or

ZCB

Input

loads.

the
contains
and

an

of

static

three
dynamic
compatible

is

provided

loading

capability

what

I/O

8-bit

you WJuld

board,

RAM

parallel

memories.

with

on

the

of

memory,

8080

using

bus

a

all

All

IC

is

1.

2 The

While

complete
sort

ZCB

is

could,
control
worth)
Sense

data

section
could

data
data
an
and
data

be

input
processing

intellegent

provide

processing

ZCBaspart

In

most

Vector

Graphic

significant

the

overall
Demands
the

canplete

the

ZCB

does

stand

needed

alone

as

however,

applications.

could

of

could

the

be

arrive

board

camnunicated

and

a summary

location

node

output

system.

ofasystem

applications,

microcanputer

cost

savings

canputer

on

the

power

system.

replace

microcanputer

well

as

additional

be

used

In

this

used

on

a

by

and

to

the
of
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spare

RS-232C

can

be used

connected

can

very

little

or

coupler,

port

must be

the

external

handshaking

2.4.5.
in

Section

change them

particular

software

writing,

serial

4

Extended

the

operator

an

RS-232C

first.

and

Vector

serial

receiver

to

connect

no

additional

to

active

often

Most

no

difficulty.

be

serial

or

converted

the

board

DB-25, which

is

required,

modifications

order

2.4

product

gives

as

I/O

any

to

operate

necessary.

addresses

controls

Extended
terminal
Systems

to

communicate

cable

Lastly,

to

operating

Graphic's

port.

and one

RS-232C

used

other

wiring

to

the

standard

to

be plugged

Monitor

the

spare

one

input

lines

components on

as

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RS-232C

printers,

kind

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of

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slightly

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other

the

specific

board

than

will

devices

I/O

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and

documents

peripheral

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Monitor

directly

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to

serial

systems

Word

option)

a

time

port

such

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RS-232C
and one

will

the

and

Data

or

by

the

the

be

port

share

which

as

1.5.6

Parallel

Parallel
34-pin

supplies

connector.

to

below.

output

possible

Microcomputer
Additional
Table

1-6

Ports

The

ZCB

Ports

connector

an

configure

parallel

Each

or,

in

12

in

Input

and

has

three

A,

B and

which

optional

The

other

it

as

desired.

port

in

the

case

Mode0,more

Systems

pins

provide

Section

2.8.

output

independent

C.

They

is

mounted on

34-line

end

of

Many

has

eight

of

Port

are
User's
+5

VDC

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accomplished

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ribbon

this

cable
of

pins

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and

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parallel

connected

the

top

cable

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the

34

which

controL

in

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for

more

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using

input

to

the

of

the

that

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connector

lines

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are

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16

different

1 and

information

pin

IN(put)

or

output
outside
card.

connects

on

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not

used,

programmed

combinations

2.

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on

assignments

and

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Rev.

ports,
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Vector

to

this

called

via

Graphic

edge
allowing
as

discussed

for

input,

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Modes

are

1 and 2.

given

machine

I-B

6/11/80

one

you

are

in

Vector

ZCB

Single

Board computer

language
Output
executed,

until
be
data.

the

written

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instructions

is

latched

the

eight

bits

computer changes

to

sense

are

in

no

interrupt

within

on

the

of

same

software

board,

data

it.

way

that

lines

so
remain
Input

data

connected

prepared

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is

for

specific

after

to
latched,
available

to

the

an

OUT

the

so

that

and

parallel

applications.

instruction

external

software

to

input

ports.

is

device

must

that

Rev.

I-B

6/11/80

1-7

2.1

vector

ZCB

Introduction

The

User's

tells

how

switches

divided
CPU

into

section,

Single

Guide

to

change

to

fit

3

sections

EPRCM/RAM

Board Computer

II.

explains

various

other

than

to

user

standard

cover

section

USER'S

how

selectable
the

and

I/O

GUIDE

the

board

options

requirements.

three

main

section.

functions

by means

areas

as

manufactured and

of

jumpers

The

User's

of

board

operation:

Guide

and

is

2.1.1

Standard

The
factory
use

the

following

The

standard

jumpering and what

Vector

to

ZCB

fit

Graphic
current

in

another

information

jumpering
2708

2716
EPRCM

lK

on-board

Serial

(Same
Parallel
addressed
Clock
Mwriteis

One

wait

On-board
Phantan

it

ZCB

single

Vector

Graphic

model

will

prove

does

EPROM's
EPRCM

base

the

are
selected
address

merrory

port

is

addressed

information

ports

speed,

A,B,C and

at

08,09,OA and

4MHz.

enabled

state

is

EPRCMisenabled

(line

67)

dces

board computer

Microcanputer

computer

or

useful.

following:

selected

for

is

is

is

for2PRCM

1

PRCM
EOOO.
addressed

at

04(control)

duplicated

Control

OB,

inserted

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to

is

enabled.

has

been prejumpered

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one

of

sockets.

socket.

at

FCOO.

at

addresses

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respectively.

each

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cycle.

boot

on

reset.

your

and
Register

If

own

design,

05(data)

06

and 07)

are

you

at

wish

the

to

the

2.2

2.2.1

CPU

SECrION

Running system

Jt.nTIper

area
Connections
Function:

operation
operation

Options:

install

Rev.

I-B

selects

but

at4Mhz.

to

a jumper

6/11/80

at2or4MHz.

A

as

manufactured:

2

some

peripheral

operate

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or4MHz.

at

2

MHZ,

pad 1 and

pad 1 jumpered

operation.
boards

cut

3~·

are

the

to

pad 2

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not.

jumper

CPUiscapable

The

board

between

pad1and

is

of4MHz.

shipped

for

2

and

2-1

Vector

ZCB

Single

Board Computer

2.2.2
Jumper
Connections

other

Options:

2.2.3
Jumper

MWRITE

enable/disable

area

Function:

(S-lOO

line

source

if

Autanatic

area

Connections

Function:

WAIT

states

are

jumpered,
jumpered, an
cycle.

every

bus

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cycle

D

as

manufactured:

when

connected,

68).

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of

MWIDTEinthe

MWRITE

WAIT

state
N

as

manufactured:

wnen

enabled,

according

no

automatic

no

pads

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want

generation

disable/enable

this

to

the

automatic

wait

are

jumpered,

jumper

the

system,

is

installed

ZCB

to

disconnect

not

board

such

wanted,

pads 1 and 2

options

following.

wait

state

states

is

inserted

one

will

this

asafront

cut

are

jumpered

permits
When

are

pads 1 and 3

enabled.

automatic

generate

jl.lITper

the

the

only

wait

the

if

panel.

jumper

(wait

automatic

of

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pads

after

state

MWRITE

there

in

area

on

Ml)

generation

jl.lITper

1 and 2

the

Ml

is

inserted

signal

is

some

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of

area

are

machine

on

N

Options:
between pads 1 and 2.
the

jumper between

2.3

EPRa1/RAM

The

Vector

unprecedented

can

choose

12K

bytes

determines

for

the

EPRCM

See appendix
current

ZCB

2-2

To

insert

SECTION

Graphic

flexibility

from

of

EPROMonthe

the

address

type

section

boards.

one

pads

2708,

you have

for

wait

To

state

disable

1 and 2 and

ZCB

Single

in

EPROM

2716

or

single

ing

scheme

chosen.

important

after

wait

install

Board

type

2732

type

board.

used.

imforrnation

state

every

generation

bus

cycle,

by

the

a jumper between pads 1 and

Computer

choice

EPRCMs,

The
See

and

EPROM

the

regarding

presents

address

giving

the

type

appropriate

PRCM

selection.
chosen

Rev.

cut

the

ZCB

board

the

user

user

from

directly

section

addressing

I-B

jumper

cut

3.

with

You

3K

to

below

on

6/11/80

Vector

ZCB

Single

Board computer

2.3.1

2708

2708

factory

jumper

at

standard

ing

EDOOH.

The

board

addresses:

The

span

System, by
a lK gap

If

you

address

block

EPROM

type

of

the

in

meIIDry

want

Addressing

EPROMs

and

the

is

are

the

board

ZCB

provides

prejumpered

PRCM
PRCM
PRCM

RAM

between

FOOOH

Flashwriter

from

E800H

to

change

EOOOHtoFFFFH,

the

easiest

is

prejumpered

for

to

1

U20
2 U2l
3

U22

U24,25

and

FBFFH

II

board and
to

EBFFHifstandard

EPROM/RAM

use

the

type

the

Vector

use

27081s

EOOOH-E3FFH
E400H-E7FFH
ECOOH-EFFFH

FCOOH-FFFFH

is

taken

the

memory

following

of

PRCMtochose

to

use

Graphic

at

up,

Disk

Controller

jumpering

addresses

procedure.

them.

4.0

the

in

•••
The

Monitor

following

the

standard

board.

is

within

they

standard

addressed

There

used.

the

are

the

memory

Vector

memory

is

1)

Subtract

2)

Consult

the

jumper

step

1.

3)

Consult

of

the

particular

4)

SOlder a jumper between

5) Cut

away

EOOOHfran

the

lK column

area

F pad number which

the

Area F

socket

any

pre-existing

Increment

Area F Pad No.

14 0000-03FF 0000-07FF

13 0400-07FF 0800-0FFF

12 0800-0BFF 1000-17FF
11
10

9 l400-17FF 2800-2FFF
8 1800-1BFF 3000-37FF

7 lCOO-lFFF 3800-3FFF

the

desired

of

EPRCM/RAM

you wish

the

Relative

lK

OCOO-OFFF
lOOO-13FF

the

Relative

Socket

two

jumpers

Address

(all

addresses

1800-lFFF

2000-27FF

PRCM

or

Address

corresponds

Pad

to

change.

pads.

as

necessary.
Chart

2K

RAM

base

Chart

to

Chart

to

4K

in

hex)

OOOD-OFFF

lOOO-lFFF

2000-2FFF
3000-3FFF
4000-4FFF
5000-5FFF
6000-6FFF

7000-7FFF

address.

(below)

the

result

determine

to

obtained

the

pad number

detennine

in

Rev.

I-B

6/11/80

2-3

Vector

ZCB

Single

Board

Canputer

Area F

Pad 1
Pad 6

Pad 2

pad 3

If

you want

standard

block

1) r:.etermine
Address

Chart

connects
connects
connects
connects

to

(EOOOH-FFFFH)

which

below.

2) Rejumper Area H

necessary.

3)

Use

the

Relative

pad

assignments

4)

Solder

5) Cut

away

within

Area F jumpers

any

pre-existing

EPRCM/RAM

use

2708's

8K

memory

as

specified

Address

Jumper Area F

SOcket Pad

EPROM0(U20)
EPRCM1(U21)
EPRCM2(U22)
RAM

(U24,25)

and

change

use

the

following

block

and

cut

Chart

(above)

as

as

required

jumpers

Chart

to
to

to

to

its

memory

you

want

away

to

described

as

necessary.

its

address.

its

address.

its

address.

address.

procedure.

any

determine

locations

to

use

pre-existing

in

the

from

the

last

outside

the

actual

section.

of

the

2708

Base

jumpers

EPRCM/RAM

as

Addresses

OOOOH-IFFFH
200OH-3FFFH
4000H-5FFFH

6000H-7FFFH
8000H-9FFFH
AOOOH-BFFFH

COOOH-DFFFH

EOOOH-FFFFH

2.3.2

Auxiliary

use

jumper

except
configured

If

an

This

Memory

you

want

auxiliary

area

F

meTIDry

that

for

Area H Jumpers

1-7,2-5,3-9
1-6,2-5,3-9
1-7,2-4,3-9

1-6,2-4,3-9
1-7,2-5,3-8
1-6,2-5,3-8

1-7,2-4,3-8
1-6,2-4,3-8*

*

Disable

to

disable

disk

controller

to

the

pad

disable

the

2716's

feature

interval

and

2708

Base Address

Standard

1

or

2

or

representing

will

disabled

4K

if

the

Chart

Area I Jumpers

No change

Std:

3-6,4-7,5-8

Area H Jumpering

1-K

increments

video

ltwDrk
board

the

board.)
absolute

with

will

has

whatever

be

2K

been

of

main

jumper

address

if

set

Area J Jumpers

No change

Std:

meTIDry

pad

4

desired.
EPRCM
up

the

for

type

board

2732's.

2-4,5-7

(perhaps

and/or

is

has

to

5

of

chosen

been

2-4

Rev.

I-B

6/11/80

Vector

ZCB

Single

Board

canputer

2.3.3

1)
addresses

Addresses
OOOOH-3FFFH

4000H-7FFFH
8000H-BFFFH

COOOH-FFFFH

2)

away

3)
the

to

2716

To

Consult

With

Subtract

relative

find

EPROM
use

the

old

the

Addressing

2716's

the

2716

allowable

AreaHJumpers

1-2,2-5,3-9
1-2,2-4,3-9
1-2,2-5,3-8

1-2,2-4,3-8

base

address

jumpers

the

base

address.

appropriate

in

the

with

as

necessary.

ZCB,

Base

Address

2716's.

2716

chosen,

address

Consult

AreaFpad

follow

Base

Jumper

fram

the

the

procedure

Chart

Address

(below).

Chart

AreaIJLnTlpers

8-4,7-3,6-2
8-4,7-3,6-2
8-4,7-3,6-2

8-4,7-3,6-2

area

H, I

the

absolute

2K

column

of

number.

outlined

andJas

address

the

Relative

belav.

This

shows

AreaJJumpers

3-4,6-7
3-4,6-7
3-4,6-7

3-4,6-7

per

chart

desired

Address

the

to

determine

and

Chart

base

cut

4)

Consult

number.

5)

SOlder

6)

Cut

For

and

want

address
will

that

there

blank

To

Chart.

H

as

follows:

and

6-7.

Now

address

6

to

8,

To

enable

the

jumper(s)

away

any

example,

to

U20

at

be

addressed

will

following

implement

Since

All

that

the

chart

2

to7and3to
the

AreaFEPROM/RAM

as

required.

previous

let

use

AOOOH,

only

an

at

jumpers

us

say

auxiliary

U21

9800H

be

lK

that

at

of

it.
this

change,

all

these

1-2,

2-5

pre-existing

base

and

make

addresses

and

address

the

3-8;
jumpers

following

11.

disk

controller,

Socket

as

we

disk

BOOOH
and

the

memory

we

\\Ould
area

has

been

(Cutting

pad4is

Pad

necessary.

wish

to

controller

and

U22

disk

beginning

first

lie

within

I :

are

cut

established,
connections
away

tied

Chart

use

3-2716'

with

at

B800H. The lK

controller

at

consult

the

8-4,

7-3

away.

previous

to

pad

to

our
will

location

the

third
and

we

in

jumper

jumpers

13.

find

s

on

system.

be

2716

block

6-2;

consult

the

our

of
at

9800H

Base

we

and

the

area

as

second

ZCB

board

We

want

on-board

8800H.

Note

with

Address

jumper

area

J:

relative

F:

1

to

necessary.)

pad

to

RAM

lK

area

3-4

10,

Rev. I-B

6/11/80

2-5

Vector

ZCB

Single

Board Computer

2'.3.4

2732

To

1)
allowable

Addresses

OOOOH-7FFFH
8000H-FFFFH

2)

chart

3)
relative
find

4)

EPRCM

use

Consult

With

and

Subtract

the

Consult

Addressing

2732's

with

the

cut

address.
appropriate

in

the

2732

2732's.

AreaHJumpers

1-2-3,3-'9

1-2-3,3-8

base

away

the

the

AreaFEPRCM/RAM

the

Base

address

the

base

Consult

AreaFpad

ZCB,

follow

Address

2732

chosen,

old

jumpers.

address

the

the

procedure

Chart.

Base

Address

AreaIJumpers

8-3,7-2,6-1
8-3,7-2,6-1

jumper

fran

the

absolute

4K

column

number.
Socket

Pad

of

Chart.

outlined

This

Chart

areasH,

address

the

Relative

shows

I

below.

the

base

AreaJJumpers

3-4,1-7
3-4,1-7

andJas

desired

Address

addresses

per

to

Chart

the

find

2732

the

to

2.3.5

5)

Solder

6)

Cut

away

Note:

lK

Jumper
Connections

Function:

on

EPROM

shipped

Options:

will

Enable

system

The lK

be

on

area

are

with

jumper(s)

any

pre-existing

of

on-board

PJPulated,

board

Optionally

start

a jump

to

EPRCM

B

as

manufactured:

up

this

disable

as

required

RAM

the

on

causes

(boot)

instruction

option

enabled.

this

in

jumpers

will

remaining

boot

jumpered

processor

or

reset.

to

the

option,

Area

as

now

occupy

3K,

Generally,

fourth

cut

F.
necessary.

blank.

to

address

the

jumper

4K

byte

of

address

the

the

on

the

between

first
first

EPRCM.

both

space.

3

bytes

3

bytes

pads.

The

The

of
board

first

EPROM

of

the

is

2-6

Rev.

I-B

6/11/80

vector

ZCB

Single

Board Computer

2.3.6

Phantom

JLnTIper
Connect
FlIDction: Allows

phantom
to

jump

Options:
both

2.3.7

These

jumpers

currently

2.4.0

2.4.1

I/O
I/O

enable/disable

area

ions

as

disables
toaparticular

to

disable

pads

of

Jumper

jumper

areas

jLnTIper

will

in

use.

SECTION
Port

Addressing

C

manufactured:

generation
other

system

EPRQvlonsystem

the

generation

area

K,

Land

areas

have

accomodate

of

C.

M

been

all

j umpered•

phantom

memory

of

included

three

on

boards.

PJwer

the

for

types

S-lOO

This
on/reset.

phantom

future

of

EPROMs

bus

is

signal

line

67.

useful

cut

expansion.

(2708,

When

when

jumper

The

2716,

enabled,

you

want

between

standard

2732)

The
However,
predefined

jumpers

chosen

standard

The

selected
The

hardwired

specified

that

is,

PJrt

addresses

Four

port

addresses

(echoed

the

information

Four
designated
designates

configured
input

or

ZCB

the

in

one

port

in

such

in

those

port
on

7H.) The

port

the

output

supports

choice

groups

or

are

addresses

a manner

jumpers

software.

addresses
called

addresses

are

on

addresses

Ports

A

control

as

three

ports.

all

of

serial

of

32

two

jumper

desired.

on

for

are

preset

second

the

first
are

(08H),

port

8-bit

256
addresses

for

as

the

For

already

in

reserved

pair

also
B (09H)

or

input

port

and

areas

the

one

to

coordinate

I/O

section

this

set

our

standard

for

data

of

pair.

used

Control

addresses

parallel

PJrt

each.

if

addresses

serial

with

of

reason,

at

the

the

software.

for

the

04H

data

for

and

the

andC(OAR)

Status

or

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2.4.9

Connecting

To

ZCB-MP

available

1)

Plug

ZCB

so

canputer.

2)

Plug

the

ZCB-MP

.

Rev.

connect

interface

the

that

I-B

the

the

from

Vector

interface

the

the

24

interface

6/11/80

Vector

Vector

board

bulk

pin

card

MP

MP

(P/N

Graphic,

card

of

DIP

connector

•

to

dot

into

the

the

ZCB

matrix

12-3400)

Inc.

top

interface

end

printer

Tb

34

of

and

install:

pin

card

the

to

an

I/O

parallel

is

I/O

the

ZCB,

I

I/O

towards

I

cable

cable

into

you

must

(P/N

connector

the

rear

the

have

16-1202)

of

the

of

the

socket

2-19

the

on

3)

panel

4)

Fasten

of

Label

the

the

the

other

canputer

connector

end

with

of

"MP

the

the

Signal

cable

hardware

Connector."

with

the

provided.

Vector

DB-25S

ZCB

Single

connector

Board Canputer

to

the

rear

·2.9

Spare

chips

Socket

connected

There

useful

3

tri-state

1

three

to

1 74S04

2 74IS04

3 two

to

are

use.

U35:
U36:
U45:

U9:

U7:

U14:

U43:

input

U17:
U17:
U42:

and

patch

U26

is

anything

a number

8097

in-pin
in-pin
in-pin

input

in-pins

inverter

in-pin

inverters

in-pin
in-pin

74ISOO
in-pins
in-pins
in-pins

large

buffers
12,
14,

2,

74ISIO

1,2,13,

3,

13,
1,

10,9,
13,12,

4,5,

areas

enough

on

the

of

out-pin
out-pin

out-pin

NAND

out-pin

out-pin

out-pin

NAND

gates
out-pin

out-pin

board

unused

are

available.
11,
13,

3,

gate

out-pin

4

12

2

out-pin

for

a

14-pin

with

gates

controlled
controlled

controlled

12

8

11

6

the

on

DIP.

exception
the

ZCB

by U28,13.
by

CDSB

by

GND

None
of

l::xJard

of

the

GND

and

which you

holes

+5V.

may

are

find

1 RS-232

1 RS-232

2-20

U15:

U16:

level

in-pin

level

in-pin

driver,

2,

out-pin

receiver,

13,

out-pin

DS1488

DS1489

3

11,

control-pin

12

Rev.

I-B

6/11/80

vector

ZCB

Single

Board Computer

3.1

System

Operation

Since

S-lOO

theory

diagram

system

boards,

of

of

operation.

breakdown.
Sheet

POC

system
also
cause
issue

When

line

When

O-System

the

has

cause

the
a

phantom.

the
Phantom
block

will

Normally,
rest

of

control
whether
this

any

seciton

the

operation
the

system

ION

already

it

processor

MEMORY

signal

cause

these

the

rronitor

block

of

Block

ZCB

its

major

Block

to

let

to

which
first

reads

the

permit

Diagram

combines

operation

a

circuit

This

Diagram

is

initially

the
been
issue

to

go

CONTROL

disables

the

first

three

program

the

on

board

the

III.

the

is

bit

easier

areas

explanation

system
in

an

on

the

POC

through

block

three

bytes

to

address

PRCM

use

of

THEORYOFOPERATION

circuitry

somewhat

to
of

turned

knON

that

condition,

signal.

a

reset.

(sheet

all

merrory

bytes

are

be

run.
lines

or

RAM

lK,

2K

follow,
the

ZCB

will

on

the
a

4)
on

of

the

a jump

During

during

is

or

4K

normally
complex.

we

are

to

get

be

followed

RESRI'

reset

is

the

On

It

the

condition

PRESEr
board,
also

given

S-lOO

on-board

to

instruction
normal
an

being

addressed.

EPRCM.

found

In
first
an

block

a

causes

a

operation,

address

on

order

idea

by

(sheet

exists.

line

reset

Memory

RESET
bus.
PRCM

cycle

three

to

including

of

the

an

area

4)

going

condition

it

issues

If

enabled,

.to

be

which

the

to

The

jumpers

different

make

a

the

block

overall

by

area

pulls

When

low

the
the

will

will

Control

the

the

addressed.
causes

the

memory

determine

to

in

The

MEMORY
controlled
interface

The

CLOCKS
required
clocking

fram

block)

by

the

signal,
microprocessor,
compatabili
clocks
divided

the
inputs
level

The

PROCESSOR

entire

block

down

microcomputer

and

outputs.

data

communication

S-100

consist

to

system

not

that

INTERFACE

of

generated

are

not

a number

signals.

block

and

cpu

ty

with

also
to

supply
block

and

is

directly

available

(sheet

memory

or

the

CLOCK

and

jumper

a

S-lOO

supplies

On

address

done

block

of

That

5)

control,

cpu.

DRIVERS
the
selectable.

phase

all

(sheet

board

via

the

and

gates

is,

fran

directly

contains

the

blocks

system.

2

clock

equipment

the

base

signals

RS-232 baud

1)

is

the

system.

all

address

buses.

S-lOO

which

many

the

the

Z-80.

interface

CONTROL

take

of

are

the

S-lOO

system

(sheet

The

clock

Even

though

signal

designed

rates.
heart

It

regulates

and

All

off

processor

the

signals

The

signals

synthesized

on-board

control

6)

generate

can

not

is

to

be

(2MCLK

or,

rrore

all

data

board

block.

SIGNAL

signals
required

PROM

supply

necessary

generated

used

with

and

properly,
processes,

signals

addressing

BUFFERS

required

by

the

and

bus

(via

the

timing

a

4MHz

with

to

the

SERCLK)

are

sent

block

and

convert

by

the

by

ZCB

RAM.

It

the

signals

or

a

the

maintain

8080.

which

the

brain

addressing,

over

and

(sheet

system

the

system

board.

is

S-lOO

2MHz

Z-80

The
are

of

MaS

data

8)

them

are
The

Rev.

1-B

6/11/80

3-1

Vector

2CB

Single

Board

canputer

reason

signals

evolved

memory. Our

dynamic

do two

provide
the
parallel
appropriate

The

RS-232

why

there
available
around

memory.

I/O

CONTROL

separate

the

baud

and

combination

a

system

However,

things.

apporpriate

rate.

serial

The SERIAL/PARALLEL

technology
handshaking
level
parallel

The

8255
different
three.

The S-lOO

and

data
on-board
data

bus

signals
drive

of

signals

signals

input

is

programmable

combinations.

)

DATA

out

tri-state

data

to

TTL

are

similar

capability.

the

to

RS-232

or

TRANSCEIVER

bus.

is

such a

are

system

block

system.

output

They

level

disparity

evident

based

is

based

the

(sheet

The
PCU<

The

I/O

portions

of

address

I/O

An

through

level

buffers

convert

signals

with

on

upon

signals

flip-flops

signals

decoding

block

8251

line

signals.
ports.
and

the

(and

block

which
used

respect

between

when you

the

the

required

6)

consist

divide

to

circuitry

of

the

line

and

(sheet

chip

provides

drivers

An

There

output

that's

(sheet

feed

the

MaS

on

to

voltage

consider

8080

faster,

of

the

board

MREQ

7)

8255

is

lines

only

2)

level

the

the

signals

that

microprocessor

more

are

easily

decoders

down

8251

the

serial

is

used

have

signals.

contains

the

RS-232

and

receivers

chip

also

in

consists

into

provides

a

control

can

the

first

ofaseries

or

are

be

signals

S-lOO

but

bus.

the

required

the

versatile

provided

and

flip

clock

I/O

chip

to

tell

been

selected

the

most

serial

which

status

configured

mode

fed

used on

The

TTL

lines

vs

the

S-lOO bus was

using

Z-80

static

using

for.

flops

frequency

to

when

which

control

the

by

the

to

ladvanced

I/O

and

convert

three

TTL

8-bit

register.

in

16

•••

from

the

MOS

there

of

on-board

data

the

and

are

in

MOS

TTL

have more

3.2

The

S-lOO

transceiver

(from
address
circui
eight

serial

address

The

the

lines

try

ports

heart
independent
accept
serial

The

eight

data

speed
selectable
U1.

The clock.

this

can

frequency
division
clock.
can

be

ratio

U7

selected

ADDRESS

block

processor

are

is

provided

bits

of

receiver

bits

with

at

which

clock

rate

be

changed

of

153.6
of

forms a

by a DIP swi

but

buffered

if

the

and

of

a wide

rate

is

KHz

13.02,
divide

BUFFER
simpler
onto

to

I/O

address

serial

transmitter.

parallel

range

data

is

derived

normally

when

is

which

by 13

since

the

S-lOO

by

74LS244

mirror

I/O

of
output

fram

sixteen

the

8251

required

stage,

tch

for

block

(sheet

they

bus)

tri-state

the

lower

mirroring

ports

is

The

data

fram

formats,

parity

in

asynchronous

the2MHz

times

is

initialized

for

9600 baud.

is

rounded

and

9600 baud. The

3)

only

have

rather

eight

has

been

the
function
the

data

system

the

to

13,

the

gated

is
than

buffers.

address

enabled.

8251

of
bus,

and

stop

mode

clock

required

This

relative

terminal

other

similar

to

be

unidirectional

bidirectional.

bits

USART
the

consisting

transmitter

and

convert

bits.

is

controlled

by

counters

baud

by

software),

gives

COITllIDn

to

In

on

rate

a

to

count

baud

the

data

addition,

the

upper

is

this

by a

U8

(though

so

frequency

the

2

at

Ul4-8

rates,

All

of

to
to

and

a

MHz

3-2

Rev.

l-B

6/11/80

Vector

ZCB

Single

Board

canputer

except
half
110 baud

desired
applied

and

ZCB

for

using

The

the

internal

is

frequency

to

8251

control

bi-directional
the

RxD

and

UO

baud,

Ul,

generated

the

TxC

which

is

and

are

is

by

selected

RxC

USARTisdesigned

TxD

signals

control

data

output

RD/, C/D,

bus.

bus,

of

obtained

by

74LS393

dividing

the

by

pins

of

to

interface

CS/,

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EIA RS-232C

the

8251

successively

binary

counters.

frequency

a DIP

the

8251.

and

the

device

line

drivers

to

the

outside

switch

easily

WR/

are

was

dividing

for

for

to

derived

intended

and

iM:)rld.

The

1200

each

an

8080

receivers

this

clock

baud

serial

easily

to

frequency

frequency

by

11.

port,

bus

structure,

from

be

used

interface

with

in

for

The

and

the

a

Rev.

I-B

6/11/80

3-3

Vector

ZCB

Single

Board Computer

APPENDIX

A

change
currently
accept
remain

has

been

being

an

8316E302

configured

made

shipped.

type

for

IV.

in

'Ihe

2K

2708's

APPENDIX

the

ZCB

third

ROM

chip

at

E800H

AND

PRCM

socket

socket

addressed

and

ECOOH

SCHEMATICS

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has

at

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respectively.

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FIELD

MANUAL

UPDATE

Please
Section

Section

Manual:

Revision:
Date
Date

make

of
of

the

2.4.8

1)

Plug

ZCB

so

the

ZCB

it

will

2.4.9

1)

Plug

ZCB

so

the

ZCB

it

will

ZCB

Rev. 1-B

Manual:

Update:

follcwing

Connecting

the

interface

that

the

board.

aim

towards

Connecting

the

interface

that

the

board.

aim

towards

6/11/80
2/27/81

additions/corrections

the

Sprint

card

into

bulk

of

the

In

the

MZ

it

the

front.

the

MP

to

card

into

bulk

of

the

In

the

MZitwill

the

front.

3

to

the

interface

will

the

ZCB

the

interface

the

34

aim

34

aim

to

ZCB

pin

card

tcwards

pin

card

tcwards

the

parallel

is

tcwards

the

parallel

is

tcwards

the

above named

I/O

connector

the

solder

rear;

rear;

:t/O

the

in

connector

solder

In

manual.

the

Vector

the

Vector

on

side

on

side

the

of

3

the

of

3

Sect

Add

Add

ion

2.3

the

following

Changing
rewiring

likely

destrCl'i'ed.

the

follcwing

Current

(EOOOH), a

at

U22
Special
Note

connected

EPIDM/RAM

paragraph

the

EPRClMs

the

socket

that

any

to

ZCB

boards
1K

(ECOOH).

Note

on

on

page

to

Sect

ion

at

from

};XJWer

chip

erronoosly

the

Appendix

are

configured

(2708-type)

Reconfiguring

5

of

the

pad

5

of

the

bottom

CAIJTICN

the

factory

lines.

(Section

PROMatU21

Socket

ZCB

schematic

the

same

of

If

these

inserted

IV.)

to

take

20.

area.

the

page:

standard

revisions

in

a

(E800H)

that

This

configuration

the

EPROM

2K

(2716-type)

anda1K

pad

7

connection

are

sockets

(27G8-type)

of

jumper

is

not

PROM

actually

involves

made,

will

area

at

it

be

U20

PROM

J

made

is

is

outside
on

the

7

on

from

5

via

jumper

the

component

this

the

an

indirect

area

jumper

side
pad

cut

to

of

the

this

area!

side

the

route.

of

board

large

trace.

To
the

5V

cut
and
To

this

I:x>ard

notice

trace

cut

connection,

and

turn

that

at

the

the

jumper

the

there

left.

locate

I:x>ard

isatrace

This

from

pad

pad7of

over.

also

7

Locate

which

leads
to

pad

area

leads

to

5

J

pad
pad

of

Schematic

Area

6.

Make
AreaJis

errata-

L

pad

the

on

page5of

6

should

same change

correct

as

be

for
it

the
labelled

area

is.

Sdlematic.

pad7and

M.

pad7should

be

labelled

pad