UTRON UT62V5128LS-70LLE, UT62V5128LS-70LL, UT62V5128LS-70LE, UT62V5128LS-70L, UT62V5128LS-100LLE Datasheet
...
UTRON
UT62V5128
Rev. 1.0
512K X 8 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80064
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
FEATURES
Access time : 70/100ns(max)
CMOS Low operating power
Operating : 30/20mA (Icc max)
Standby : 20µA (TYP.) L-version
2µA (TYP.) LL-version
Single 2.3V~2.7V power supply
Operating Temperature:
Commercial : 0℃~70℃
Extended : -20℃~80℃
All inputs and outputs TTL compatible
Fully static operation
Three state outputs
Data retention voltage : 1.5V (min)
Package : 32-pin 8mm×20mm TSOP-I
32-pin 8mm×13.4mm STSOP
FUNCTIONAL BLOCK DIAGRAM
COLUMN I/O
COLUMN DECODER
ROW
DECODER
I/O
CONTROL
LOGI C
CONTROL
A1
I/O1
VSS
VCC
WE
OE
CE
I/O8
.
.
.
.
.
.
. .
.
A2
A
3
A4 A
8
A13
A14
A15
A16
A
11
A
18
A5 A6 A
10
.
.
.
.
.
.
MEMORY ARRAY
2048 ROWS × 256 COLUMNS × 8bits
A
12
A7 A
9
A
17
A
0
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A18 Address Inputs
I/O1 - I/O8 Data Inputs/Outputs
CE
Chip Enable Input
WE
Write Enable Input
OE
Output Enable Input
Vcc Power Supply
Vss Ground
NC No Connection
GENERAL DESCRIPTION
The UT62V5128 is a 4,194,304-bit high speed
CMOS static random access memory organized as
524,288 words by 8 bits. It is fabricated using high
performance, high reliability CMOS technology.
The UT62V5128 is designed for high speed system
applications. It is particularly well suited for battery
back-up nonvolatile memory applications.
The UT62V5128 operates from a single 2.3V~2.7V
power supply and all inputs and outputs are fully
TTL compatible.
PIN CONFIGURATION
I/O4
A11
A9
A8
A13
I/O3
A10
A14
A12
A7
A6
A5
Vcc
I/O8
I/O7
I/O6
I/O5
Vss
I/O2
I/O1
A0
A1
A2
A4 A3
UT62V5128
TSOP-1 / STSOP
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
17
16
15
20
19
18
22
23
24
25
26
27
21
WE
OE
CE
A17
A18
A15
32
31
30
29
A16
UTRON
UT62V5128
Rev. 1.0
512K X 8 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80064
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
2
TRUTH TABLE
MODE
WE
CE
OE
I/O OPERATION SUPPLY CURRENT
Standby X H X High – Z ISB, I
SB1
Output Disable H L H High – Z ICC
Read H L L D
OUT
I
CC
Write L L X DIN I
CC
Note: H = VIH, L=VIL, X = Don't care.
ABSOLUTE MAXIMUM RATINGS
*
PARAMETER SYMBOL RATING UNIT
Terminal Voltage with Respect to VSS V
TERM
-0.5 to 3.6 V
Commercial TA 0 to 70
℃
Operating Temperature
Extended T
A
-20 to 80
℃
Storage Temperature T
STG
-65 to 150
℃
Power Dissipation PD 1 W
DC Output Current I
OUT
50 mA
Soldering Temperature (under 10 secs) Tsolder 260
℃
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = 2.3V~2.7V, TA =0℃ to 70℃ / -20℃ to 80℃(E))
PARAMETER
SYMBOL
TEST CONDITION MIN. TYP. MAX. UNIT
Power Voltage Vcc 2.3 2.5 2.7 V
Input High Voltage VIH 2.0 - Vcc+0.3 V
Input Low Voltage VIL - 0.2 - 0.6 V
Input Leakage Current ILI
V
SS
≦VIN ≦VCC
- 1 - 1
µ
A
Output Leakage Current ILO
V
SS
≦V
I/O
≦V
CC,
Output Disabled
- 1 - 1
µ
A
Output High Voltage VOH IOH= -0.5mA 2.0 - - V
Output Low Voltage VOL IOL= 0.5mA - - 0.4 V
70 - 20 30 mA ICC Cycle time=Min.100% duty,
CE
= V
IL
, I
I/O
=0mA ,
100 - 15 20 mA
Icc1
Cycle time = 1µs,100% duty,
CE
≦
0.2,I
I/O=
0mA,
other pins at 0.2V or Vcc-0.2V,
- 3 4 mA
Operating Power
Supply Current
Icc2 Cycle time =500ns,100% duty,
CE
≦
0.2,I
I/O=
0mA
other pins at 0.2V or Vcc-0.2V,
- 6 8 mA
Standby Current(TTL) I
SB1
CE
=V
IH
- 0.3 0.5 mA
-L - 20 80 µA Standby Current(CMOS) I
SB1
CE
≧
V
CC
-0.2V
other pins at 0.2V or Vcc-0.2V,
-LL - 2 15 µA
UTRON
UT62V5128
Rev. 1.0
512K X 8 BIT LOW POWER CMOS SRAM
UTRON TECHNOLOGY INC. P80064
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
3
CAPACITANCE
(TA=25
℃
, f=1.0MHz)
PARAMETER SYMBOL MIN. MAX UNIT
Input Capacitance C
IN
-
6 pF
Input/Output Capacitance C
I/O
-
8 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels 0V to 2.2V
Input Rise and Fall Times 5ns
Input and Output Timing Reference Levels 1.5V
Output Load CL = 30pF, IOH/IOL = -0.5mA/0.5mA
AC ELECTRICAL CHARACTERISTICS
(VCC = 2.3V~2.7V , TA =0℃ to 70℃ / -20℃ to 80℃(E))
(1) READ CYCLE
PARAMETER SYMBOL
UT62V5128-70 UT62V5128-100 UNIT
MIN. MAX. MIN. MAX.
Read Cycle Time
tRC 70 - 100 - ns
Address Access Time
tAA - 70 - 100 ns
Chip Enable Access Time
t
ACE
- 70 - 100 ns
Output Enable Access Time
tOE - 35 - 50 ns
Chip Enable to Output in Low Z
t
CLZ*
10 - 10 - ns
Output Enable to Output in Low Z
t
OLZ*
5 - 5 - ns
Chip Disable to Output in High Z
t
CHZ*
- 25 - 30 ns
Output Disable to Output in High Z
t
OHZ*
- 25 - 35 ns
Output Hold from Address Change
tOH 5 - 5 - ns
(2) WRITE CYCLE
PARAMETER SYMBOL
UT62V5128-70 UT62V5128-100 UNIT
MIN. MAX. MIN. MAX.
Write Cycle Time
tWC 70 - 100 - ns
Address Valid to End of Write
tAW 60 - 80 - ns
Chip Enable to End of Write
tCW 60 - 80 - ns
Address Set-up Time
tAS 0 - 0 - ns
Write Pulse Width
tWP 55 - 70 - ns
Write Recovery Time
tWR 0 - 0 - ns
Data to Write Time Overlap
tDW 30 - 40 - ns
Data Hold from End of Write Time
tDH 0 - 0 - ns
Output Active from End of Write
t
OW*
5 - 5 - ns
Write to Output in High Z
t
WHZ*
- 30 - 40 ns
*These parameters are guaranteed by device characterization, but not production tested.
Loading...