UNIWILL S50IAx Schematics
5
4
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http://hobi-elektronika.net
S50IAx Schematics Rev:D
PAGE
1.
D D
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
C C
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
B B
25.
26.
27.
28.
29.
30.
31.
32.
33.
34.
35. Discharger Function
A A
36.
37.
38.
39.
40.
Cover Page
System Block Diagram
POWER BLOCK DIAGRAM
GPIO & POWER CONSU
YONAH CPU HOST & CPU Thermal Sensor
CPU_POWER
CLK GEN ICS9LPR310-CLK
NB(1)_Host
NB(2)_DMI/Configuation/PM
NB(3)_VGA_TV_LVDS_PCIEx16* I/F
NB(4)_DDR2 I/F
NB(5)_POWER
NB(6)_POWER
DDR2 _SO-DIMM
SB(1)_CPU/SATA/IDE/RTC/LPC/AZALIA
SB(2)_PCI/GPIO/SMBUS/PM/DMI/USB/PCIEx1
SB(3)_Power
IEEE1394A & CARD READER IC(OZ128T)
GIGA LAN
SATA HDD/PATA ODD/Lan_Transformer
EC IT8510E
LCD PWR / INVERT CONN / LVDS CONN
FAN CTRL / SYS BIOS /SMART PWR
MINI CARD & NEW CARD
S/W&AUDIO&MDC(CONN)USB&S-VEDIO(ON MB)
Cardreader CONN
CRT CONN WITH PR8800
+5V&+3V(MAX8734A)
+CPU CORE(MAX8771)
+1.5V&+1.8V(OZ813) & +2.5V(RT9173B)
+1.05V(OZ818) & +1.2V(RT9173B) & +0.9V(RT9173B)
+1.0V_VGA & +1.8V_VGA(OZ813)
POWER ON SWITCH FUNC.
Charger func.(TL594) & DC IN CON & BATTERY CONN
GPU M52-T/M54-T(1)-GPIO&PCIEx16*&CRT&TV
GPU M52-T/M54-T(2)-LVDS & MEMORY I/F
GPU M52-T/M54-T(3)-POWER
GDDR2 FOR GPU
VBIOS & SS IC & GPU THEMAL IC
5
CONTENT
S40/S50 SWITCH BD41.
42.
43.
44.
S40/S50 TOUCH PAD BD
S40 MODEM BD
S50 MODEM WITH USB BD
45. AUDIO BD(1)(FPC CON/USB*2/LID/RF SW/MDC)
46.
47.
48.
4
AUDIO BD(2)(Codec/MIC/ERA JACK)
AUDIO BD(3)(AMP/INTERNAL MIC)
AUDIO BD(4)(LED indicator)
3
S40II M/B 37GS50000-D0
S50IA M/B(HYNIX)
S50IA M/B( SA M) 37GS50000-D0 82GS50000-??
S40 MODEM BD 35GNS4000-D0
S50 MODEM BD 80GNS5000-D0
S40 SWITCH BD
S50 SWITCH BD
S40 ODD BD
S50 ODD BD
TOUCH PAD
ISSUED BY DC2
2
S50IAx REV:D P/N LIST
PCB P/N
37GS50000-D0
35GNS5000-D0
35G5S5000-D0
35G5S5000-D0
35GPS4000-D0
35G8S5000-D0
35G2S5000-D0 80G2S5000-D0AUDIO BD
Name of Part
Project
Date:
3255
PCB ASSY P/N
82GS50000-D0
80G5S5000-D0
80GPS5000-D035GPS5000-D0
80G8S5000-D0
80GKS5000-D03G BD 35GKS5000-D0
Cover Page
S50IA Main Board
Monday, July 10, 2006
UNIWILL COMPUTER CORP.
Rev
Sheet
1
1
D
/
49
5
4
3
2
1
http://hobi-elektronika.net
INTEL CPU
Yonah/Merom
D D
Dual/Single
CLK GEN
ICS 9LPR310
CRT
FSB533/667
TV
S-OUT
ATI GPU
M52-T
PCI-Express 16x
North Bridge
INTEL
945PM
DDR2 Channel A
DDR2 Channel B
DDR2 SO-DIMM1/533/667
DDR2 SO-DIMM2/533/667
14.318 MHz
14"~15"
LCD
GDDR2 GDDR2
C C
16X16 16X16
AZALIA I/F
MIC
EAR/SPDIF
AUDIO CODEC
AZALIA
MODEM
ALC861
AMP
TPA6011A
DMI BUS
South Bridge
INTEL
ICH7M
PATA I/F
SATA I/F
PCI I/F
ODD
MASTER
SATA HDD
IEEE 1394/CardReader
OZ128TN
1XPCI-EXPRESS
B B
LAN
SPK-RSPK-L
USB
LPC BUS
8111B
EC
ITE 8510
USB
PR8800
A A
5
USB USB USB
NEW-Card BlueTooth
3G-WCDMA
Debug
PORT
4
BIOS
FAN_CPU
3
K/B
MINI CARD NEW CARD
Wireless LAN
SMART PWR
LED
VGA SENSOR
ADM1032
Touch PAD
2
CPU SENSOR
ADM1032
CHARGER
SYS Temp
Thermistor
BATTERY
DDR Temp
Thermistor
SWITCH
Name of Part
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
3255
LCD CTRL
PWR ON
CTRL
BLOCK_DIAGRAM
1
Rev
Sheet
D
/
49
2
5
4
3
2
1
http://hobi-elektronika.net
VIN
+1.8VS/6A
+1.8V
POWER BLOCK DIAGRAM
VID0
VID1
VID2
D D
VID3
MAX8771
VIN
RSS090N03
RQA200N03VID4
OZ813
CPU_CORE
VID5
VID6
VIN
RSS090N03
+5VA
AO4422 +5VS
SI4835 +5V
POWER Sequence
SPK810S
VIN
RSS090N03
+1.0VS/10A
MAX8734A
C C
RSS090N03
VIN
RSS090N03
OZ813
VIN
B B
VIN
+3.3VA
+1.8VS
AO4422
+1.05VS/4.5A
AO4422
SI4835
+3.3VS
+3.3V/ §0.9A
+1.8V/10A
RT9173B
+0.9VSRT9173B
+2.5VS
AO4422RSS090N03 +1.5V/1.8A
VIN
OZ818
A A
+3.3VS
+1.05VS/6A
AO4422SPK810S +1.05V/6A
+1.8VS
+3VA,+5VA,+12VA
.
+3.3VS_ON
+5VS,+12VS
+3.3VS
+1.5VS_ON
.
+1.5VS
.
+1.05VS_ON
.
+1.8V_DDR_ON
+1.8VS
+1.05VS
RSMRST#
.
.
PWRBTN#
.
+5V_ON
+1.8V_ON
.
+1.8V
+1.05V
+1.5V
.
Vcore_ON
Vcore
.
PWROK/VR_PWRGD
H_PWRGD
PCIRST#/PLTRST#
CPURST#
PWRSW
+5V
+3.3V
+2.5V
1ms
1ms
1ms
50ms
10ms
40ms
5.8ms
7ms
AO4422
AO4422
110ms
+1.0V/10A
1s
+2.5VRT9173B
5
4
+1.2VVSRT9173B
.
EC Control Pin
3
2
Name of Part
POWER DIAGRAM & SEQUENCE
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
3255
Sheet
3
1
Rev
D
/
49
5
4
3
2
1
ICH7-M
GPI0
GPI9
GPI11
GPI12 PNLSW0
D D
C C
B B
GPI13
GPI14
GPO16
GPO18
GPO20
GPO21
GPO23
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
GPIO29
GPIO30
GPIO31
GPIO32
GPIO33
GPIO34
GPIO
BM_BUSY#
EC_EXTSMI#
SMB_ALERT#
PNLSW1
PNLSW2
PM_DPRSLPVR
PM_STPPCI#
PM_STPCPU#
PM_CLKRUN#
ITE8510E
GPIO
RF_SW#
GPCF0
SILENT#/
GPCF1
NEW_CARD_PWR_ON#
GPCF2
GPCF3
NA
TP_CLK
GPCF4
GPCF5
TP_DATA
3G_ON
GPCF6
GPCF7
NA
GPI0
SCROLL
GPI1
CAPS
GPI2
NUM
GPI3
CHG_R_LED#
GPI4
CHG_G_LED#
PWRON_LED
GPI5
GPI6
+1.8V_VGA_ON
+1.8VS_ON
GPH0
+1.8V_ON
GPH1
+1.05VS_ON
GPH2
+3.3VS_ON
GPH3
+5V_ON
GPH4
GPH5
SET_V
GPH6
+1.5VS_ON
VCORE_ON
GPH7
BT_ON
GPG4
GPG5
+VGA_CORE_ON
AMP_MUTE#
GPG6
EXTTS#0
GPG7
GPB0
C4_OUT
CPPE#
GPB1
GPB2
PM_RSMRST#
GPB3
BAT_SMBCLK
BAT_SMBDAT
GPB4
GPB5
H_A20GATE
H_RCIN#
GPB6
GPB7
RFLED_ON
GPE0
NA
GPE1
EC_CPU_BSEL1
GPE2
NA
GPE3
NA
GPE4
EC_PWR_ON
LID#
GPE5
GPE6
NA
GPE7
PM_SLP_S3#
GPD0
ADAP_IN
LCDSW
GPD1
GPD2
PCI_RST#/PLT_RST#
GPD3
EC_EXTSMI#
PM_SLP_S4#
GPD4
PM_THROTTLING#
GPD5
AUTO_C4#
GPD6
GPD7
EC_PREST#
GPA0
BTL_BEEP
EC_VID1
GPA1
EC_VID2
GPA2
EC_VID3
GPA3
EC_VID4
GPA4
GPA5
EC_VID5
GPA6
SMP2_EN#
PWRBTN#
GPA7
GPC0
GPC1
GPC2
GPC3
GPC4
GPC5
GPC6
GPC7
ADC0
ADC1
ADC2
ADC3
DA0
DA1
DA2
DA3
ITE8510E
GPIO
PWROK
SMBCLK_EC
SMBDAT_EC
FPWRON
BROWSER#
C4_OUT#
CHG_ON
SILENT_LED
BAT_TEMP
ADAPTOR_I
DDR2_TEMP
VGA_TEMP
BRIGHTADJ
CHG_I
FAN_CTRL0
NA
CPU CORE(V)
2.0G
1.5G
1.67G
1.83G
2.0G
2.16G
2.33G
2.66G
2.8G
3.06G
VCC
+3.3V
+2.5V
+1.8V
+1.5V
+VTT
+VCC_GMCH_CORE
VCC
+5VS
+3.3VS
+3.3V
+1.5V
+1.05V
+3.3VA_RTC
CPU
ICC(A)
1.25
1.25
1.25
1.25
1.25
1.25
1.25
1.525
1.525
1.525
36
36
36
36
36
36
36
43.35
44.86
55.9
GMCH
ICC(A)
0.12
0.6
5.1
1.544
0.8 0.84
1.5
ICH7-M
ICC(A) W
0.016
0.35
1.0
4.38
1.5
0.003
W
0.396
1.500
9.18
2.316
0.75
0.08
1.155
3.3
6.57
1.575
0.00001
W
44
44
44
44
44
44
44
66.1
68.4
85.2
TEMP( )
70
TEMP( )
70
TEMP( )
ǂ
69
70
70
71
72
72
72
74
75
81
ǂ
ǂ
VCC
+3.3V
VCC
+3.3V
VCC
+3.3V(DVDD)
VCC
3.3V
VCC
+3.3V
ITE8510E
ICC(mA)
300
W
1
CLOCK GENERATOR
ICC(mA)
180
W
0.594
ALC861
ICC(mA)
W
0.234
71
TPA6011A4
ICC(mA)
30
W
0.099W
ADM1032
ICC
170uA
W
0.56mW
TEMP( )
ǂ
70
ǂ
TEMP( )
70
ǂ
TEMP( )
70
TEMP( )
ǂ
85
ǂ
TEMP( )
150
http://hobi-elektronika.net
A A
Name of Part
GPIO & POWER CONSU
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
5
4
3
2
3255
Sheet
1
Rev
D
/
49
4
5
H_A#[31:3]8
H_REQ#[4:0]8
H_RS#[2:0]8
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
D D
H_ADSTB#08
H_ADSTB#18
H_A20M#15
Z0503
H_FERR#15
H_IGNNE#15
H_STPCLK#15
H_INTR15
H_NMI15
H_SMI#15
1
U13
2
VDD
D+
ADATA
4
THERM
SCLK
3
ALERT
D-
GND
ADM1032ARM
5
C C
B B
+3.3V
R433 200R
C579
1u/10V/Y5V/0603
A A
H_THERMDA
H_THERMDC
C578
2200p
H_THERM#
5
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
CPU Thermal Sensor
7
8
6
CN15-1
J4
A{3}#
L4
A{4}#
M3
A{5}#
K5
A{6}#
M1
A{7}#
N2
A{8}#
J1
A{9}#
N3
A{10}#
P5
A{11}#
P2
A{12}#
L1
A{13}#
P4
A{14}#
P1
A{15}#
R1
A{16}#
L2
ADSTB{0}#
K3
REQ{0}#
H2
REQ{1}#
K2
REQ{2}#
J3
REQ{3}#
L5
REQ{4}#
Y2
A{17}#
U5
A{18}#
R3
A{19}#
W6
A{20}#
U4
A{21}#
Y5
A{22}#
U2
A{23}#
R4
A{24}#
T5
A{25}#
T3
A{26}#
W3
A{27}#
W5
A{28}#
Y4
A{29}#
W2
A{30}#
Y1
A{31}#
V4
ADSTB{1}#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
AA1
RSVD{01}
AA4
RSVD{02}
AB2
RSVD{03}
AA3
RSVD{04}
M4
RSVD{05}
N5
RSVD{06}
T2
RSVD{07}
V3
RSVD{08}
B2
RSVD{09}
C3
RSVD{10}
B25
RSVD{11}
I24074326
SMBDAT_EC 7,21
SMBCLK_EC 7,21
ADDR GROUP 0 ADDR GROUP 1
ADS#
BNR#
BPRI#
DEFER#
DRDY#
DBSY#
BR0#
IERR#
INIT#
CONTROL
LOCK#
RESET#
RS{0}#
RS{1}#
RS{2}#
TRDY#
HITM#
BPM{0}#
BPM{1}#
BPM{2}#
BPM{3}#
PRDY#
PREQ#
XDP/ITP SIGNALS
TRST#
DBR#
PROCHOT#
THERMDA
THERMDC
THERM
THERMTRIP#
BCLK{0}
BCLK{1}
H CLK
RSVD{12}
RSVD{13}
RSVD{14}
RSVD{15}
RSVD{16}
RSVD{17}
RESERVED
RSVD{18}
RSVD{19}
RSVD{20}
FSB533
FSB667
HIT#
TDO
TMS
4
http://hobi-elektronika.net
H1
E2
G5
H5
F21
E1
F1
H_IERR#
D20
B3
H4
H_CPURST#
B1
H_RS#0
F3
H_RS#1
F4
H_RS#2
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
H_PREQ#
AC1
H_TCK
AC5
TCK
H_TDI
AA6
TDI
H_TDO
AB3
H_
TMS
AB5
H_TRST#
AB6
C20
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
4
H_ADS# 8
H_BNR# 8
H_BPRI# 8
H_DEFER# 8
H_DRDY# 8
H_DBSY# 8
H_BREQ#0 8
H_INIT# 15
H_LOCK# 8
H_CPURST# 8
H_TRDY# 8
H_HIT# 8
H_HITM# 8
PM_THRMTRIP# 9,15
PM_THRMTRIP# space 2:1
CLK_CPU_BCLK 7
CLK_CPU_BCLK# 7
+1.05V
Close to NB
R425
1K
R498 *10K
R281 10K
R424
1K
R489 10K
R434
1K
BSEL2
0
Design guide recommend 2.2K
CPU_BSEL0 9
CLK_BSEL0 7
Design guide recommend 2.2K
CPU_BSEL1 9,21
CLK_BSEL1 7
Design guide recommend 2.2K
CPU_BSEL2 9
CLK_BSEL2 7
BSEL0 MHZ
BSEL1
10
0
11
133
166
3
H_D#[63:0]8
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13 H_D#45
H_D#14
H_DSTBN#08
H_DSTBP#08
H_DINV#08
+1.05V
R362
1K_1%
H_DSTBN#18
H_DSTBP#18
H_DINV#18
Layout note: 0.5" max length.
R359
2K_1%
9/23
review
PM_THRMTRIP#
H_THERM#
VGA_THERM#40
3
R416 *1K
R415 51R
CPU_BSEL19,21
R160 1K
R133 0R
R149 *0R
H_D#15
H_D#16
H_D#17 H_D#49
H_D#18
H_D#20
H_D#21
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_GTLREF
H_TEST1
H_TEST2
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
Z0505
C204
0.1u
R148
100K
Z0507
C197
*0.1u
2
CN15-2
E22
D{0}#
F24
D{1}#
E26
D{2}#
H22
D{3}#
F23
D{4}#
G25
D{5}#
E25
E23
K24
G24
J24
J23
H26
F26
K22
H25
H23
G22
J26
N22
K25
P26
R23
L25
L22
L23
M23
P25
P22
P23
T24
R24
L26
T25
N24
M24
N25
M26
AD26
C26
D25
B22
B23
C21
I24075270
H_DPRSTP# Layout
routing is
ICH-7 -> CPU -> IMVP-6
sequency
+CPU_CORE
R150
100K
C
Q23
B
2N3904
E
+3.3V
R151
100K
Z0506
DS
G
D{6}#
D{7}#
D{8}#
D{9}#
D{10}#
D{11}#
D{12}#
D{13}#
D{14}#
D{15}#
DSTBN{0}#
DSTBP{0}#
DINV{0}#
D{16}#
D{17}#
D{18}#
D{19}#
D{20}#
D{21}#
D{22}#
D{23}#
D{24}#
D{25}#
D{26}#
D{27}#
D{28}#
D{29}#
D{30}#
D{31}#
DSTBN{1}#
DSTBP{1}#
DINV{1}#
GTLREF
TEST1
TEST2
BSEL{0}
BSEL{1}
BSEL{2}
Q15
2N7002
2
DATA GRP 0
DATA GRP 1
MISC
B
C205
1u
G
C192
1u
DATA GRP 2
DATA GRP 3
C
Q22
2N3904
E
DS
Q16
2N7002
D{32}#
D{33}#
D{34}#
D{35}#
D{36}#
D{37}#
D{38}#
D{39}#
D{40}#
D{41}#
D{42}#
D{43}#
D{44}#
D{45}#
D{46}#
D{47}#
DSTBN{2}#
DSTBP{2}#
DINV{2}#
D{48}#
D{49}#
D{50}#
D{51}#
D{52}#
D{53}#
D{54}#
D{55}#
D{56}#
D{57}#
D{58}#
D{59}#
D{60}#
D{61}#
D{62}#
D{63}#
DSTBN{3}#
DSTBP{3}#
DINV{3}#
COMP{0}
COMP{1}
COMP{2}
COMP{3}
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PS1#
H_D#32
AA23
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
W25
H_D#37
U23
H_D#38
U25
H_D#39
U22
H_D#40
AB25
H_D#41
W22
H_D#42
Y23
H_D#43
AA26
H_D#44
Y26
Y22
H_D#46
AC26
H_D#47
AA24
W24
Y25
V23
H_D#48
AC22
AC23
H_D#50
AB22
H_D#51H_D#19
AA21
H_D#52
AB21
H_D#53
AC25
H_D#54H_D#22
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AD24
H_D#58
AE21
H_D#59
AD21
H_D#60
AE25
H_D#61
AF25
H_D#62
AF22
H_D#63
AF26
AD23
AE24
AC20
H_COMP0
R26
H_COMP1
U26
H_COMP2
U1
H_COMP3
V1
E5
B5
D24
D6
D7
AE6
AUX_OFF# 28,35
Name of Part
Project
Date:
3255
1
H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8
H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8
R70 27.4R_1%
R63 54.9R_1%
R64 27.4R_1%
R62 54.9R_1%
H_DPRSTP# 15,29
H_DPSLP# 15
H_DPWR# 8
H_PWRGD 15
H_CPUSLP# 8,15
H_PSI# 29
H_PREQ#
R51 *56R
Close
CPU
H_IERR#Z0504
H_PROCHOT#
H_TDO
H_TMS
H_TDI
H_CPURST#
H_STPCLK#
H_TRST#
H_TCK
R426 56R
R103 56R
R53 *54.9R
R59 *39.2R
R61 150R
R107 *54.9R
R102 *150R
Modify in R:D
R60 680R
R52 27.4R
CPU_HOST
S50IA Main Board
Monday, July 10, 2006
UNIWILL COMPUTER CORP.
Sheet
5
1
+1.05V
+1.05V
Rev
D
/
49
5
4
3
2
1
http://hobi-elektronika.net
+CPU_CORE
D D
C C
B B
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
A10
A12
A13
A15
A17
A18
A20
B10
B12
B14
B15
B17
B18
B20
C10
C12
C13
C15
C17
C18
D10
D12
D14
D15
D17
D18
E10
E12
E13
E15
E17
E18
E20
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AB9
CN15-3
A7
VCC001
A9
VCC002
VCC003
VCC004
VCC005
VCC006
VCC007
VCC008
VCC009
B7
VCC010
B9
VCC011
VCC012
VCC013
VCC014
VCC015
VCC016
VCC017
VCC018
C9
VCC019
VCC020
VCC021
VCC022
VCC023
VCC024
VCC025
D9
VCC026
VCC027
VCC028
VCC029
VCC030
VCC031
VCC032
E7
VCC033
E9
VCC034
VCC035
VCC036
VCC037
VCC038
VCC039
VCC040
VCC041
F7
VCC042
F9
VCC043
VCC044
VCC045
VCC046
VCC047
VCC048
VCC049
VCC050
VCC051
VCC052
VCC053
VCC054
VCC055
VCC056
VCC057
VCC058
VCC059
VCC060
VCC061
VCC062
VCC063
VCC064
VCC065
VCC066
VCC067
I24088053
QT1608GRL600 = 200mA
QT1608RL120 = 200mA
QT1608RL600 = 200 mA
QT1608RL030 = 500mA
QT1608RL060 = 500mA
VCCSENSE
VSSSENSE
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
AF5
AE5
AF4
AE3
AF2
AE2
AF7
AE7
+CPU_CORE
Z0601
+1.05V
H_VID0 23
H_VID1 23
H_VID2 23
H_VID3 23
H_VID4 23
H_VID5 23
H_VID6 23
VCORE_VCCSENSE 29
VCORE_VSSSENSE 29
+1.5V
L57
QT1608RL600
Close to Pin
C557
4.7u/10V/X5R/0805
C554
0.01u
+CPU_CORE
C133
1u/10V/Y5V/0603
+CPU_CORE
C183
1u/10V/Y5V/0603
C498
4.7u/10V/X5R/0805
C93
4.7u/10V/X5R/0805
C531
1u/10V/Y5V/0603
C132
1u/10V/Y5V/0603
1u/10V/Y5V/0603
C45
C38
1000p
1000p
C37
C44
0.1u
0.1u
C125
C142
0.1u
0.1u
C140
1u/10V/Y5V/0603
C100
4.7u/10V/X5R/0805
C85
4.7u/10V/X5R/0805
C532
1u/10V/Y5V/0603
C480
C43
1000p
C46
0.1u
C151
0.1u
C35
1u/10V/Y5V/0603
C525
4.7u/10V/X5R/0805
C538
4.7u/10V/X5R/0805
C474
1u/10V/Y5V/0603
C180
1u/10V/Y5V/0603
C153
1000p
C48
0.1u
C141
0.1u
C139
1u/10V/Y5V/0603
C58
4.7u/10V/X5R/0805
C486
4.7u/10V/X5R/0805
C481
1u/10V/Y5V/0603
C53
1u/10V/Y5V/0603
C144
1000p
C41
0.1u
C124
1000p
C99
1u/10V/Y5V/0603
C127
1000p
C39
0.1u
C126
1000p
C537
4.7u/10V/X5R/0805
C526
4.7u/10V/X5R/0805
C534
1u/10V/Y5V/0603
C116
1u/10V/Y5V/0603
C51
1000p
C50
0.1u
C143
1000p
C76
1u/10V/Y5V/0603
C487
4.7u/10V/X5R/0805
C497
4.7u/10V/X5R/0805
C482
1u/10V/Y5V/0603
C115
1u/10V/Y5V/0603
C40
C49
1000p
1000p
C52
0.1u
C154
C152
1000p
1000p
C179
1u/10V/Y5V/0603
C533
1u/10V/Y5V/0603
C475
1u/10V/Y5V/0603
C47
1000p
C479
1u/10V/Y5V/0603
C54
1u/10V/Y5V/0603
CN15-4
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
A26
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
I24089147
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
+1.05V
C505
C516
C506
C521
C493
C520
C499
0.1u
0.1u
A A
5
4
C97
0.1u
C495
0.1u
0.1u
C57
0.1u
C61
0.1u
0.1u
3
C500
0.1u
C101
0.1u
4.7u/10V/X5R/0805
4.7u/10V/X5R/0805
C515
4.7u/10V/X5R/0805
4.7u/10V/X5R/0805
2
Name of Part
CPU_POWER
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
3255
1
Sheet
Rev
D
/
49
6
5
4
3
2
1
http://hobi-elektronika.net
QT1608RL600
L40
QT1608RL600
+3.3V
R289
10K
+3.3V
MAX8771_CLKEN# 29
Close pin 28,42
CLK_VDDA
D D
Reserved FOR EMI
C624 10p
C348 10p
C627 10p
C340 10p
C347 10p
C628 10p
PCI_CLK_1394_A
PCI_CLK_LPC
PCI_CLK_SB
PCI_CLK_DEBUG
CLK_BSEL1
CLK_BSEL0
Close pin 50
Pin3,4,12,64 programming to "normal" driving. Add to check list
PCI_CLK_1394_A18
PCI_CLK_LPC21
SELDOT , 1= Pin 14/15 DOT 96MHZ , Pin 17/18 LCDCLK
0= Pin 14/15 27MHZ Fix/SS Pin 17/18 PCIEX
Bsel [0,2]
C C
Vil = 0.3
Vih = 0.7
CLK_BSEL25
CLK_BSEL15
CLK_BSEL05
CLK_BSEL2
CLK_BSEL1
R522
100R
+3.3V
Modify 1 in R:A1
XTAL_OUT
B B
Y6
14.318MHz_DIP
R275 *10M
C342
33p
XTAL_IN
C341
33p
PCI_CLK_DEBUG21
PCI_CLK_SB16
CLK_ICH1416
CLK_USB4816
NB_LVDS_SSCLK9
NB_LVDS_SSCLK#9
SATA_CLKP15
SATA_CLKN15
R283 33R
R490 33R
NEW_CARD_REQ#24
GMCH_CLK_REQ#9
MINICARD_CLK_REQ#24
check
Ce = 2*CL - ( Cs + Ci )
CL = Crystal Load Cap = 20P
Ci = IC internal Cap = 5P
Cs = 2P
Ce = Crystal external Cap = 33P
R295
2.2R/0603
VDD_A_CR
C354
1u
R483 33R
R279 33R
R278 33R
R286 @10K/10K
R486 33R
SMBDAT_EC5,21
SMBCLK_EC5,21
R298 @*22R/22R
R300 @*22R/22R
R304 22R
R305 22R
PCI_CLK4
PCI_CLK3
PCI_CLK1
Z0707
PCI_CLK2
CLK_BSEL2
CLK_BSEL1
Z0701
Z0702
SATA_CLKP_C
SATA_CLKN_C
XTAL_OUT
XTAL_IN
IREF
R297
4.3K_1%
REQ1# = PCI-E 0,6
REQ2# = PCI-E 1,8
REQ3# = PCI-E 2,4
REQ4# = PCI-E 3,5,7
C356
C359
0.1u
0.1u
PCI-E
U21
Power
42 56
VDDPCIEX VDDREF
50 45
VDDCPU VDDA
5
PCICLK3
4
PCICLK2_2X
3
PCICLK1_2X
64
PCICLK0_2X
IP
9
SELDOT/ PCICLK_F1
8
PCICLK_F0
61
FLSC/REF1
60
FLSB/REF0
12
FLSA/USB_48M_2X
55
SDATA
54
SCLK
17
LCD_SSCGT/PCIEXOT
18
LCD_SSCGC/PCIEXOC
26
SATACLKT
27
SATACLKC
33
PEREQ4#
32
PEREQ3#
34
PEREQ2#
16
PEREQ1#
57
X2_OUT
58
X1_IN
47
VREF
9LPR310-CLK
C358
0.1u
PCI
Power
1
7
VDDPCI0
VDDPCI1
GND
GND
GND
GND
GND
261321293753
C357
10u/10V/Y5V/0805
PLL
Power
PCI/PCIEX_STOP#
CPU_STOP#
CPUCLKT1
CPUCLKC1
CPUCLKT0
CPUCLKC0
DOTT_96M
DOTC_96M
VTT_PWRGD#/PD
GND
GND
GND
59
VDD48VDDPCIEX
GNDA
PCIEXT1
PCIEXC1
PCIEXT2
PCIEXC2
PCIEXT3
PCIEXC3
PCIEXT4
PCIEXC4
PCIEXT5
PCIEXC5
PCIEXT6
PCIEXC6
PCIEXT7
PCIEXC7
PCIEXT8
PCIEXC8
Close pin 56
Z0703
C352
R292
STP_PCI#
STP_CPU#
0.1u
Xtal
Power
R484 0R
R485 *0R
R500 22R
R502 22R
R492 22R
R497 22R
R299 22R
R301 22R
R501 22R
R503 22R
R504 22R
R507 22R
R509 22R
R514 22R
R510 22R
R515 22R
R505 22R
R508 22R
R293 @22R/*22R
R296 @22R/*22R
R496 @*22R/22R
R499 @*22R/22R
R600 *10K/0603
R601 10K/0603
2.2R/0603
Z0704
1128
VDD_REF_CR
CLK_VDDA
46
STP_PCI#
63
STP_CPU#
62
GMCH_HCLK
49
GMCH_HCLK#
48
CPU_HCLK
52
CPU_HCLK#
51
PCIE_CLK1
19
PCIE_CLK1#
20
PCIE_CLK2
22
PCIE_CLK2#
23
PCIE_CLK3
24
PCIE_CLK3#
25
PCIE_CLK4
30
PCIE_CLK4#
31
PCIE_CLK5
36
PCIE_CLK5#
35
PCIE_CLK6
39
PCIE_CLK6#
38
41
40
44
43
DOT_96CLK
14
DOT_96CLK#
15
10
GCLK => PCI-E & DMI (100MHZ)
DREFCLK => Dispaly PLLA ( nun- ss 96MHZ)
DRESSFCLK => Display LVDS PLLB ( ss 100MHZ)
Close pin 1,7
R291
1R/0603
C351 1u/6.3V/X7R/0603
PM_STPPCI# 16
PM_STPCPU# 16,23
CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8
CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5
GCLK 9
GCLK# 9
CLK_PCIE_NEW_CARD 24
CLK_PCIE_NEW_CARD# 24
CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16
CLK_PCIE_VGA 36
CLK_PCIE_VGA# 36
CLK_PCIE_GLAN 19
CLK_PCIE_GLAN# 19
CLK_PCIE_Mini card 24
CLK_PCIE_Mini card# 24
CLK_GEN_27MHz 40
CLK_GEN_27MHz_SS 40
NB_DOT_96CLK 9
NB_DOT_96CLK# 9
+3.3V
C350
2.2u/X5R/0603
L42
C345
1u
Modify in R:D
Modify 51 in R:B
BSEL0
FSLA
1
1
1
1
CPU
MHZ
133
166
133
166
SPREAD %
PCI-E
PCI
MHZ
MHZ
100
100
0.5% DOWN
+/- 0.25%
CENTER
Name of Part
CLK GEN
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
3
2
3255
Sheet
1
Rev
D
/
49
7
33
33
4
FS4
PSB533
PSB667
PSB533
A A
PSB667
FS3 , FS 4 SEETING BY I2C BUS ??????
5
0
0
0
1
0
1
0
FSLC
00
0
0
0
FSLB
0
1
0
1
BSEL1
BSEL2
FS3
5
4
3
2
1
U11J
http://hobi-elektronika.net
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
D D
C C
B B
AA22
BA21
AV21
AR21
AN21
AL21
AB21
AW20
AR20
AM20
AA20
AN19
AC19
AH18
AY17
AR17
AP17
AM17
AK17
AV16
AN16
AL16
AN15
AM15
AK15
BA14
AT14
AK14
AD14
AA14
AV13
AR13
AN13
AM13
AL13
AG13
AY12
AC12
AD11
AA11
VSS_187
F23
VSS_188
C23
VSS_189
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
VSS_201
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
VSS_209
VSS_210
VSS_211
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
VSS_216
VSS_217
W19
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
VSS_227
VSS_228
VSS_229
VSS_230
VSS_231
VSS_232
VSS_233
VSS_234
J16
VSS_235
F16
VSS_236
C16
VSS_237
VSS_238
VSS_239
VSS_240
N15
VSS_241
M15
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
VSS_265
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
VSS_270
VSS_271
Y11
VSS_272
CALISTOGA
VSS
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
FSB I/O slew rate compensation
+1.05V
54.9R_1%
H_XSCOMP
10mil width, 20mil space
R422
+1.05V
R76
54.9R_1%
H_YSCOMP
Reference Voltage for RCOMP
+1.05V
R439
221R_1%
H_XSWING
C584
R438
0.1u
100R_1%
+1.05V
R394
221R_1%
H_YSWING
C518
R393
0.1u
100R_1%
10mil width, 20mil space
Calibration FSB I/O Buffer
H_XRCOMP H_YRCOMP
R420
24.9R_1%
R390
24.9R_1%
H_D#[63:0]5
H_A#[31:3]5
W11
AA10
AC9
AB11
AC11
AC2
AD1
AD9
AC1
AD7
AC6
AD10
AD4
AC8
AG2
AG1
F1
J1
H1
J6
H3
K2
G1
G2
K9
K1
K7
J8
H4
J3
K11
G4
T10
T3
U7
U9
U11
T11
W9
T1
T8
T4
W7
U5
T9
W6
T5
AB7
AA9
W4
W3
Y3
Y7
W5
Y10
AB8
W2
AA4
AA7
AA2
AA6
Y8
AA1
AB4
AB3
AB5
E1
E2
E4
Y1
U1
W1
U11A
H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
H_CLKIN
H_CLKIN#
CALISTOGA
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_VREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF
HOST
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_XRCOMP
H_XSCOMP
H_XSWING
H_YRCOMP
H_YSCOMP
H_YSWING
CLK_MCH_BCLK7
CLK_MCH_BCLK#7
H_A#3
H9
H_A#4
C9
H_A#5
E11
H_A#6
G11
H_A#7
F11
H_A#8
G12
H_A#9
F9
H_A#10
H11
H_A#11
J12
H_A#12
G14
H_A#13
D9
H_A#14
J14
H_A#15
H13
H_A#16
J15
H_A#17
F14
H_A#18
D12
H_A#19
A11
H_A#20
C11
H_A#21
A12
H_A#22
A13
H_A#23
E13
H_A#24
G13
H_A#25
F12
H_A#26
B12
H_A#27
B14
H_A#28
C12
H_A#29
A14
H_A#30
C14
H_A#31
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
H_DINV#0
J7
H_DINV#1
W8
H_DINV#2
U3
H_DINV#3
AB10
H_DSTBN#0
K4
H_DSTBN#1
T7
H_DSTBN#2
Y5
H_DSTBN#3
AC4
H_DSTBP#0
K3
H_DSTBP#1
T6
H_DSTBP#2
AA5
H_DSTBP#3
AC5
D3
D4
B3
H_REQ#0
D8
H_REQ#1
G8
H_REQ#2
B8
H_REQ#3
F8
H_REQ#4
A8
H_RS#0
B4
H_RS#1
E6
H_RS#2
D6
H_CPUSLP#_GMCH
E3
E7
H_ADS# 5
H_ADSTB#0 5
H_ADSTB#1 5
H_BNR# 5
H_BPRI# 5
H_BREQ#0 5
H_CPURST# 5
H_DBSY# 5
H_DEFER# 5
H_DPWR# 5
H_DRDY# 5
H_DINV#0 5
H_DINV#1 5
H_DINV#2 5
H_DINV#3 5
H_DSTBN#0 5
H_DSTBN#1 5
H_DSTBN#2 5
H_DSTBN#3 5
H_DSTBP#0 5
H_DSTBP#1 5
H_DSTBP#2 5
H_DSTBP#3 5
H_HIT# 5
H_HITM# 5
H_LOCK# 5
H_REQ#[4:0] 5
H_RS#[2:0] 5
R419 *0R
>=10mil
H_VREF
C120
0.1u
Close to MGCH <100mil
p71 not mout ,
they mount SB
side
H_CPUSLP# 5,15
H_TRDY# 5
+1.05V
R108
100R_1%
R109
200R_1%
A A
10mil width, 20mil space
Name of Part
NB(1)_Host
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
5
4
3
2
3255
Sheet
1
Rev
D
/
49
8
5
4
3
2
1
http://hobi-elektronika.net
U11B
DMI_RXP3
DMI_RXP316
DMI_RXP216
DMI_RXP116
D D
NB_LVDS_SSCLK7
NB_LVDS_SSCLK#7
NB_DOT_96CLK7
NB_DOT_96CLK#7
+1.8VS
R375
150R_1%
M_VREF_MCH
+1.8VS
0.05A
R374
150R_1%
R329
80.6R_1%
R330
80.6R_1%
C59
0.1u
M_RCOMPN
M_RCOMPP
C471
0.1u
C C
B B
GCLK7
GCLK#7
as short as
possible
R338
R69
*40.2R_1%
*40.2R_1%
SM_CKE_2(#) connected to Dimm1 CK1(#)
SM_CKE_3(#) connected to Dimm1 CK0(#)
DMI_RXP016
DMI_RXN316
DMI_RXN216
DMI_RXN116
DMI_RXN016
DMI_TXP316
DMI_TXP216
DMI_TXP116
DMI_TXP016
DMI_TXN316
DMI_TXN216
DMI_TXN116
DMI_TXN016
M_OCDCOMP1
M_OCDCOMP0
M_VREF_MCH
M_RCOMPN
MB_ODT314
MB_ODT214
MA_ODT114
MA_ODT014
MB_CS#314
MB_CS#214
MA_CS#114
MA_CS#014
MB_CKE314
MB_CKE214
MA_CKE114
MA_CKE014
MB_CK#314
MB_CK#414
MA_CK#114
MA_CK#014
MB_CK314
MB_CK414
MA_CK114
MA_CK014
DMI_RXP2
DMI_RXP1
DMI_RXP0
DMI_RXN3
DMI_RXN2
DMI_RXN1
DMI_RXN0
DMI_TXP3
DMI_TXP2
DMI_TXP1
DMI_TXP0
DMI_TXN3
DMI_TXN2
DMI_TXN1
DMI_TXN0
AG41
AF37
AE41
AC37
AH41
AG37
AF41
AE37
AG39
AF35
AE39
AC35
AH39
AG35
AF39
AE35
AG33
AF33
AK41
AU21
AY20
BA12
BA13
AF10
AL20
AW21
AY21
AW12
AW13
AY29
BA29
AT20
AU20
AY40
AW35
AW40
AY35
AW7
D41
C40
A26
A27
AK1
AT9
AV9
AY7
AT1
AR1
DMI_TXP_3
DMI_TXP_2
DMI_TXP_1
DMI_TXP_0
DMI_TXN_3
DMI_TXN_2
DMI_TXN_1
DMI_TXN_0
DMI_RXP_3
DMI_RXP_2
DMI_RXP_1
DMI_RXP_0
DMI_RXN_3
DMI_RXN_2
DMI_RXN_1
DMI_RXN_0
D_REFSSCLKIN
D_REFSSCLKIN#
D_REFCLKIN
D_REFCLKIN#
G_CLKIN
G_CLKIN#
SM_VREF_1
SM_VREF_0
SM_RCOMP
SM_RCOMP#
SM_ODT_3
SM_ODT_2
SM_ODT_1
SM_ODT_0
SM_OCDCOMP_1
SM_OCDCOMP_0
SM_CS#_3
SM_CS#_2
SM_CS#_1
SM_CS#_0
SM_CKE_3
SM_CKE_2
SM_CKE_1
SM_CKE_0
SM_CK#_3
SM_CK#_2
SM_CK#_1
SM_CK#_0
SM_CK_3
SM_CK_2
SM_CK_1
SM_CK_0
CALISTOGA
DMI CLK
NC
SDVO_CTRLDATA
SDVO_CTRLCLK
MISC
PM_THRMTRIP#
PM_EXTTS#_1
PM_EXTTS#_0
PM
PM_BMBUSY#
DDR MUXING
CFG
RSVD
NC18
NC17
NC16
NC15
NC14
NC13
NC12
NC11
NC10
CLK_REQ#
LT_RESET#
RSTIN#
PWROK
CFG_20
CFG_19
CFG_18
CFG_17
CFG_16
CFG_15
CFG_14
CFG_13
CFG_12
CFG_11
CFG_10
CFG_9
CFG_8
CFG_7
CFG_6
CFG_5
CFG_4
CFG_3
CFG_2
CFG_1
CFG_0
RSVD_13
RSVD_12
RSVD_11
RSVD_10
RSVD_9
RSVD_8
RSVD_7
RSVD_6
RSVD_5
RSVD_4
RSVD_3
RSVD_2
RSVD_1
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0
A3
A39
A4
A40
AW1
AW41
AY1
AY41
B2
B41
BA1
BA2
BA3
BA39
BA40
BA41
C1
C41
D1
Asserted to control the raw PCI-E clock
Z0901
H32
K28
H27
H28
AH34
AH33
G6
H26
F25
G28
J26
K27
J25
H15
G18
H16
C15
K15
G15
D15
E16
G16
D16
D19
E18
F15
E15
F18
J18
K18
K16
D27
D28
A34
A35
A41
J19
H7
AF11
AG11
F7
F3
R32
T32
R155 *0R
GMCH_CLK_REQ# 7
Asserted to synchronize with ICH on fault
GMCH_RST#
DELAY_VR_PWRGOOD
GMCH_THRMTRIP#
PM_EXTTS#1
PM_EXTTS#0
R67 100R
R418 *0R
R146 *0R
R145 0R
GHCH integrated graphics busy
CFG19 13
CFG18 13
CFG16 13
Z0902M_RCOMPP
R110 *2.2K C553
Z0903
R123 *2.2K
CFG9 13
CFG5 13
CPU_BSEL2 5
CPU_BSEL1 5,21
CPU_BSEL0 5
Base on PWROK
+1.5VS
R805 *60.4R
R806 *60.4R
R807 *60.4R
R808 *60.4R
Add 213 in R:D
GCLK => PCI-E & DMI (100MHZ)
DREFCLK => Dispaly PLLA ( nun- ss 96MHZ)
DRESSFCLK => Display LVDS PLLB ( ss 100MHZ)
SDVODATA has internal pull down
0= no DVO device
1= DVO device present
SDVOCLK has internal pull
down .
Add to check list ( Bat life )
NB_SYNC# 16
GMCH PWROK
PLT_RST# 16,17,19,20,21,24,36
DELAY_VR_PWRGOOD 16
PM_THRMTRIP# 5,15
C4_OUT# 21
EXTTS#0 14,21
BM_BUSY# 16
PWROK input level
PM_THRMTRIP# space 2:1
Break event in C3 state.
PM_EXTTS#1
R804 *0R
Colse to NB
DELAY_VR_PWRGOOD
C63
0.1u
PM_THRMTRIP#
*0.1u
PM_DPRSLPVR 16,29
Add 212 in RD
Only Base on Discreted VGA
VCCA_DPLLA , VCCA_DPLLB => NC
DREF_CLKP / DREF_SSCLKP = GND
DREF_CLKN / DREF_SSCLKN = GND
VCCA_DPLLA , VCCA_DPLLB =>1.5V
DREF_CLKP / DREF_SSCLKP = 1.5V
DREF_CLKN / DREF_SSCLKN = GND
CFG1 CFG2
CFG0
For MEN bus throttling
A A
+3.3V
R141 10K
R130 10K
PM_EXTTS#0
PM_EXTTS#1
1
0
1
Check with S/W
5
4
3
0
01
Host
Clock
frequency
133
166
CFG7 ( IPU ) => 1= Mobility CPU
0 = Reverse
Name of Part
NB(2)_DMI/VGA/MICS
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
2
3255
Sheet
1
Rev
D
/
49
9
5
4
3
2
1
http://hobi-elektronika.net
EXP_A_COMPI
EXP_A_COMPO
EXP_A_RXN_0
EXP_A_RXN_1
EXP_A_RXN_2
EXP_A_RXN_3
EXP_A_RXN_4
EXP_A_RXN_5
EXP_A_RXN_6
EXP_A_RXN_7
EXP_A_RXN_8
EXP_A_RXN_9
EXP_A_RXN_10
EXP_A_RXN_11
EXP_A_RXN_12
EXP_A_RXN_13
EXP_A_RXN_14
EXP_A_RXN_15
EXP_A_RXP_0
EXP_A_RXP_1
EXP_A_RXP_2
EXP_A_RXP_3
EXP_A_RXP_4
EXP_A_RXP_5
EXP_A_RXP_6
EXP_A_RXP_7
EXP_A_RXP_8
EXP_A_RXP_9
EXP_A_RXP_10
EXP_A_RXP_11
EXP_A_RXP_12
EXP_A_RXP_13
EXP_A_RXP_14
EXP_A_RXP_15
EXP_A_TXN_0
EXP_A_TXN_1
EXP_A_TXN_2
EXP_A_TXN_3
EXP_A_TXN_4
EXP_A_TXN_5
EXP_A_TXN_6
EXP_A_TXN_7
EXP_A_TXN_8
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
NB_PEG_RXN[15..0] 36
NB_PEG_RXP[15..0] 36
ATI_PEG_RXN[15..0] 36
ATI_PEG_RXP[15..0] 36
PEG_COMP
D40
D38
NB_PEG_RXN0
F34
NB_PEG_RXN1
G38
NB_PEG_RXN2
H34
NB_PEG_RXN3
J38
NB_PEG_RXN4
L34
NB_PEG_RXN5
M38
NB_PEG_RXN6
N34
NB_PEG_RXN7
P38
NB_PEG_RXN8
R34
NB_PEG_RXN9
T38
NB_PEG_RXN10
V34
NB_PEG_RXN11
W38
NB_PEG_RXN12
Y34
NB_PEG_RXN13
AA38
NB_PEG_RXN14
AB34
NB_PEG_RXN15
AC38
NB_PEG_RXP0
D34
NB_PEG_RXP1
F38
NB_PEG_RXP2
G34
NB_PEG_RXP3
H38
NB_PEG_RXP4
J34
NB_PEG_RXP5
L38
NB_PEG_RXP6
M34
NB_PEG_RXP7
N38
NB_PEG_RXP8
P34
NB_PEG_RXP9
R38
NB_PEG_RXP10
T34
NB_PEG_RXP11
V38
NB_PEG_RXP12
W34
NB_PEG_RXP13
Y38
NB_PEG_RXP14
AA34
NB_PEG_RXP15
AB38
NB_PEG_TXN0
F36
NB_PEG_TXN1
G40
NB_PEG_TXN2
H36
NB_PEG_TXN3
J40
NB_PEG_TXN4
L36
NB_PEG_TXN5
M40
N36
NB_PEG_TXN7
P40
NB_PEG_TXN8
R36
NB_PEG_TXN9
T40
NB_PEG_TXN10
V36
NB_PEG_TXN11
W40
NB_PEG_TXN12
Y36
NB_PEG_TXN13
AA40
NB_PEG_TXN14
AB36
NB_PEG_TXN15
AC40
NB_PEG_TXP0
D36
NB_PEG_TXP1
F40
NB_PEG_TXP2
G36
NB_PEG_TXP3
H40
NB_PEG_TXP4
J36
NB_PEG_TXP5
L40
NB_PEG_TXP6
M36
NB_PEG_TXP7
N40
NB_PEG_TXP8
P36
NB_PEG_TXP9
R40
NB_PEG_TXP10
T36
NB_PEG_TXP11
V40
NB_PEG_TXP12
W36
NB_PEG_TXP13
Y40
NB_PEG_TXP14
AA36
NB_PEG_TXP15
AB40
+1.5V
R126
24.9R_1%
C147 0.1u
C555 0.1u
C138 0.1u
C547 0.1u
C123 0.1u
C542 0.1u
C111 0.1u
C540 0.1u
C96 0.1u
C530 0.1u
C92 0.1u
C524 0.1u
C84 0.1u
C514 0.1u
C73 0.1u
C503 0.1u
C150 0.1u
C558 0.1u
C145 0.1u
C549 0.1u
C131 0.1u
C545 0.1u
C117 0.1u
C541 0.1u
C107 0.1u
C539 0.1u
C95 0.1u
C529 0.1u
C86 0.1u
C517 0.1u
C79 0.1u
C510 0.1u
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
ATI_PEG_RXN0
ATI_PEG_RXN1
ATI_PEG_RXN2
ATI_PEG_RXN3
ATI_PEG_RXN4
ATI_PEG_RXN5
ATI_PEG_RXN6
ATI_PEG_RXN7
ATI_PEG_RXN8
ATI_PEG_RXN9
ATI_PEG_RXN10
ATI_PEG_RXN11
ATI_PEG_RXN12
ATI_PEG_RXN13
ATI_PEG_RXN14
ATI_PEG_RXN15
ATI_PEG_RXP0
ATI_PEG_RXP1
ATI_PEG_RXP2
ATI_PEG_RXP3
ATI_PEG_RXP4
ATI_PEG_RXP5
ATI_PEG_RXP6
ATI_PEG_RXP7
ATI_PEG_RXP8
ATI_PEG_RXP9
ATI_PEG_RXP
ATI_PEG_RXP11
ATI_PEG_RXP12
ATI_PEG_RXP13
ATI_PEG_RXP14
ATI_PEG_RXP15
10
D D
CRT FUNC. SEL
+1.05V
TV FUNC. SEL
+1.5V
C C
B B
RP9 @0Rx4_0402/*0Rx4_0402
RP8 @0Rx4_0402/*0Rx4_0402
TV_IRTNC
TV_IRTNB
TV_IRTNA
TV_IRTNB
1
8
TV_IRTNC
2
7
TV_DACC
3
6
TVIREF
4 5
1
8
TV_DACB
2
7
TV_DACA
3
6
TV_IRTNA
4 5
RP29 @*0Rx4_0402/0Rx4_0402
8
7
6
1
2
3
45
RP10 @0Rx4_0402/*0Rx4_0402
1
2
3
4 5
RP11 @0Rx4_0402/*0Rx4_0402
1
2
3
4 5
R113 @0R/*0R
R111 @0R/*0R
TV_DACB25
TV_DACC25
@*150R/150R
NB_CRT_BLUE27
NB_CRT_GREEN27
NB_CRT_RED27
NB_CRT_RED
8
NB_CRT_GREEN
7
NB_CRT_BLUE
6
NB_CRT_RED#
8
NB_CRT_GREEN#
7
NB_CRT_BLUE#
6
NB_CRT_IREF
GM_CRT_HSYNC
GM_CRT_VSYNC
TVIREF
R147
@*4.99K_1%/4.99K_1%
@*150R/150R
R448
R447
@*150R/150R
NB_CRT_BLUE#
NB_CRT_GREEN#
NB_CRT_RED#
R443
@*150R/150R
R446
RP28 @*0Rx4_0402/0Rx4_0402
8
7
6
CRT FUNC.
DISable.
ALL DAC
PORT
R445
@*150R/150R
1
2
3
45
NB_EN_BL22
NB_LDDC_CLK22
NB_LDDC_DATA22
R132 @*1.5K_1%/1.5K_1%
NB_FPVDDEN22
NB_LA_CLK-22
NB_LA_CLK+22
NB_LB_CLK-22
NB_LB_CLK+22
NB_LA_DATA0-22
NB_LA_DATA1-22
NB_LA_DATA2-22
NB_LA_DATA0+22
NB_LA_DATA1+22
NB_LA_DATA2+22
NB_LB_DATA0-22
NB_LB_DATA1-22
NB_LB_DATA2-22
NB_LB_DATA0+22
NB_LB_DATA1+22
NB_LB_DATA2+22
R449
@*150R/150R
NB_DCC_CLK27
NB_DCC_DATA27
NB_CRT_HSYNC27
NB_CRT_VSYNC27
R114 @*39R/39R
R112 @*39R/39R
GM_CRT_HSYNC
GM_CRT_VSYNC
L_IBG
TV_DACA
TV_DACB
TV_DACC
TVIREF NB_PEG_TXN6
TV_IRTNA
TV_IRTNB
TV_IRTNC
NB_CRT_BLUE
NB_CRT_BLUE#
NB_CRT_GREEN
NB_CRT_GREEN#
NB_CRT_RED
NB_CRT_RED#
NB_CRT_IREF
R444
@*255R_1%/255R_1%
D32
J30
H30
H29
G26
G25
B38
C35
F32
C33
C32
A33
A32
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
K30
J29
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
U11C
L_BKLTCTL
L_BKLTEN
L_CLKCTLA
L_CLKCTLB
L_DDC_CLK
L_DDC_DATA
L_IBG
L_VBG
L_VDDEN
L_VREFH
L_VREFL
LA_CLK#
LA_CLK
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
CALISTOGA
LVDS
TV
VGA
PCI-EXPRESS GRAPHICS
A A
Name of Part
NB(3)_VGA_TV_LVDS
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
5
4
3
2
3255
Sheet
1
10
Rev
D
/
49
5
4
3
2
1
MA_DQ[63:0]14
D D
C C
B B
A A
MA_DQ0
MA_DQ1
MA_DQ2
MA_DQ3
MA_DQ4
MA_DQ5
MA_DQ6
MA_DQ7
MA_DQ8
MA_DQ9 MB_DQ9
MA_DQ10
MA_DQ11
MA_DQ12
MA_DQ13
MA_DQ14
MA_DQ15
MA_DQ16
MA_DQ17
MA_DQ18
MA_DQ19
MA_DQ20
MA_DQ21
MA_DQ22
MA_DQ23
MA_DQ24
MA_DQ25
MA_DQ26
MA_DQ27
MA_DQ28
MA_DQ29
MA_DQ30
MA_DQ31
MA_DQ32
MA_DQ33
MA_DQ34
MA_DQ35
MA_DQ36
MA_DQ37
MA_DQ38
MA_DQ39
MA_DQ40
MA_DQ41
MA_DQ42
MA_DQ43
MA_DQ44
MA_DQ45
MA_DQ46
MA_DQ47
MA_DQ48
MA_DQ49
MA_DQ50
MA_DQ51
MA_DQ52
MA_DQ53
MA_DQ54
MA_DQ55
MA_DQ56
MA_DQ57
MA_DQ58
MA_DQ59
MA_DQ60
MA_DQ61
MA_DQ62
MA_DQ63
AJ35
AJ34
AM31
AM33
AJ36
AK35
AJ32
AH31
AN35
AP33
AR31
AP31
AN38
AM36
AM34
AN33
AK26
AL27
AM26
AN24
AK28
AL28
AM24
AP26
AP23
AL22
AP21
AN20
AL23
AP24
AP20
AT21
AR12
AR14
AP13
AP12
AT13
AT12
AL14
AL12
AW2
U11D
AU12
SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
SA_DQ7
SA_DQ8
SA_DQ9
SA_DQ10
SA_DQ11
SA_DQ12
SA_DQ13
SA_DQ14
SA_DQ15
SA_DQ16
SA_DQ17
SA_DQ18
SA_DQ19
SA_DQ20
SA_DQ21
SA_DQ22
SA_DQ23
SA_DQ24
SA_DQ25
SA_DQ26
SA_DQ27
SA_DQ28
SA_DQ29
SA_DQ30
SA_DQ31
SA_DQ32
SA_DQ33
SA_DQ34
SA_DQ35
SA_DQ36
SA_DQ37
SA_DQ38
SA_DQ39
AK9
SA_DQ40
AN7
SA_DQ41
AK8
SA_DQ42
AK7
SA_DQ43
AP9
SA_DQ44
AN9
SA_DQ45
AT5
SA_DQ46
AL5
SA_DQ47
AY2
SA_DQ48
SA_DQ49
AP1
SA_DQ50
AN2
SA_DQ51
AV2
SA_DQ52
AT3
SA_DQ53
AN1
SA_DQ54
AL2
SA_DQ55
AG7
SA_DQ56
AF9
SA_DQ57
AG4
SA_DQ58
AF6
SA_DQ59
AG9
SA_DQ60
AH6
SA_DQ61
AF4
SA_DQ62
AF8
SA_DQ63
Value
SA_BS_0
AV14
SA_BS_1
BA20
SA_BS_2
AY13
SA_CAS#
AJ33
SA_DM_0
AM35
SA_DM_1
AL26
SA_DM_2
AN22
SA_DM_3
AM14
SA_DM_4
AL9
SA_DM_5
AR3
SA_DM_6
AH4
SA_DM_7
AK33
SA_DQS_0
AT33
SA_DQS_1
AN28
SA_DQS_2
AM22
SA_DQS_3
AN12
SA_DQS_4
AN8
SA_DQS_5
AP3
SA_DQS_6
AG5
SA_DQS_7
AK32
SA_DQS#_0
AU33
SA_DQS#_1
AN27
SA_DQS#_2
AM21
SA_DQS#_3
AM12
SA_DQS#_4
AL8
SA_DQS#_5
AN3
SA_DQS#_6
AH5
SA_DQS#_7
AY16
SA_MA_0
AU14
SA_MA_1
AW16
SA_MA_2
BA16
SA_MA_3
BA17
SA_MA_4
AU16
SA_MA_5
AV17
SA_MA_6
AU17
SA_MA_7
AW17
SA_MA_8
AT16
SA_MA_9
AU13
SA_MA_10
AT17
SA_MA_11
AV20
SA_MA_12
AV12
SA_MA_13
AW14
SA_RAS#
SA_WE#
AK23
AK24
AY14
DDR SYSTEM MEMORY A
SA_RCVENIN#
SA_RCVENOUT#
MA_BA0
MA_BA1
A_BA2
M
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
MAA_A0
MAA_A1
MAA_A2
MAA_A3
MAA_A4
MAA_A5
MAA_A6
MAA_A7
MAA_A8
MAA_A9
MAA_A10
MAA_A11
MAA_A12
MAA_A13
MA_BA[2:0] 14
MA_DM[7:0] 14
MA_DQS[7:0] 14
MA_DQS#[7:0] 14
MAA_A[13:0] 14
MA_CAS# 14
MA_RAS# 14
MA_WE# 14
MB_DQ[63:0]14
AK39
AJ37
AP39
AR41
AJ38
AK38
AN41
AP41
AT40
AV41
AU38
AV38
AP38
AR40
AW38
AY38
BA38
AV36
AR36
AP36
BA36
AU36
AP35
AP34
AY33
BA33
AT31
AU29
AU31
AW31
AV29
AW29
AM19
AL19
AP14
AN14
AN17
AM16
AP15
AL15
AJ11
AH10
AN10
AK13
AH11
AK10
BA10
AW10
AW4
AY10
AW5
U11H
SB_DQ0
SB_DQ1
SB_DQ2
SB_DQ3
SB_DQ4
SB_DQ5
SB_DQ6
SB_DQ7
SB_DQ8
SB_DQ9
SB_DQ10
SB_DQ11
SB_DQ12
SB_DQ13
SB_DQ14
SB_DQ15
SB_DQ16
SB_DQ17
SB_DQ18
SB_DQ19
SB_DQ20
SB_DQ21
SB_DQ22
SB_DQ23
SB_DQ24
SB_DQ25
SB_DQ26
SB_DQ27
SB_DQ28
SB_DQ29
SB_DQ30
SB_DQ31
SB_DQ32
SB_DQ33
SB_DQ34
SB_DQ35
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ39
SB_DQ40
SB_DQ41
AJ9
SB_DQ42
SB_DQ43
SB_DQ44
SB_DQ45
SB_DQ46
AJ8
SB_DQ47
SB_DQ48
SB_DQ49
BA4
SB_DQ50
SB_DQ51
SB_DQ52
AY9
SB_DQ53
SB_DQ54
AY5
SB_DQ55
AV4
SB_DQ56
AR5
SB_DQ57
AK4
SB_DQ58
AK3
SB_DQ59
AT4
SB_DQ60
AK5
SB_DQ61
AJ5
SB_DQ62
AJ3
SB_DQ63
CALISTOGA
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
DDR SYSTEM MEMORY B
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
MB_DQ0
MB_DQ1
MB_DQ2
MB_DQ3
MB_DQ4
MB_DQ5
MB_DQ6
MB_DQ7
MB_DQ8
MB_DQ10
MB_DQ11
MB_DQ12
MB_DQ13
MB_DQ14
MB_DQ15
MB_DQ16
MB_DQ17
MB_DQ18
MB_DQ19
MB_DQ20
MB_DQ21
MB_DQ22
MB_DQ23
MB_DQ24
MB_DQ25
MB_DQ26
MB_DQ27
MB_DQ28
MB_DQ29
MB_DQ30
MB_DQ32
MB_DQ33
MB_DQ34
MB_DQ35
MB_DQ36
MB_DQ37
MB_DQ38
MB_DQ39
MB_DQ40
MB_DQ41
MB_DQ42
MB_DQ43
MB_DQ44
MB_DQ45
MB_DQ46
MB_DQ47
MB_DQ48
MB_DQ49
MB_DQ50
MB_DQ51
MB_DQ52
MB_DQ53
MB_DQ54
MB_DQ55
MB_DQ56
MB_DQ57
MB_DQ58
MB_DQ59
MB_DQ60
MB_DQ61
MB_DQ62
MB_DQ63
MB_BA[2:0] 14
MB_DM[7:0] 14
MB_DQS[7:0] 14
MB_DQS#[7:0] 14
MBA_A[13:0] 14
MB_BA0
AT24
MB_BA1
AV23
MB_BA2
AY28
AR24
MB_DM0
AK36
MB_DM1
AR38
MB_DM2
AT36
MB_DM3
BA31
MB_DM4
AL17
MB_DM5
AH8
MB_DM6
BA5
MB_DM7
AN4
MB_DQS0
AM39
MB_DQS1
AT39
MB_DQS
AU35
MB_DQS3
AR29
MB_DQS4
AR16
MB_DQS5
AR10
MB_DQS6
AR7
MB_DQS7
AN5
MB_DQS#0
AM40
MB_DQS#1
AU39
MB_DQS#2
AT35
MB_DQS#3
AP29
MB_DQS#4
AP16
MB_DQS#5
AT10
MB_DQS#6
AT7
MB_DQS#7
AP5
MBA_A0MB_DQ31
AY23
MBA_A1
AW24
MBA_A2
AY24
MBA_A3
AR28
MBA_A4
AT27
MBA_A5
AT28
MBA_A6
AU27
MBA_A7
AV28
MBA_A8
AV27
MBA_A9
AW27
MBA_A10
AV24
MBA_A11
BA27
MBA_A12
AY27
MBA_A13
AR23
AU23
AK16
AK18
AR27
U11I
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
AP40
VSS_9
AN40
VSS_10
AK40
VSS_11
MB_CAS# 14
2
MB_RAS# 14
MB_WE# 14
AJ40
AH40
AG40
AF40
AE40
AY39
AW39
AV39
AR39
AN39
AJ39
AC39
AB39
AA39
AT38
AM38
AH38
AG38
AF38
AE38
AK37
AH37
AB37
AA37
AY36
AW36
AN36
AH36
AG36
AF36
AE36
AC36
BA35
AV35
AR35
AH35
AB35
AA35
AN34
B40
Y39
W39
V39
T39
R39
P39
N39
M39
L39
J39
H39
G39
F39
D39
C38
Y37
W37
V37
T37
R37
P37
N37
M37
L37
J37
H37
G37
F37
D37
C36
B36
Y35
W35
V35
T35
R35
P35
N35
M35
L35
J35
H35
G35
F35
D35
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
CALISTOGA
VSS
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
http://hobi-elektronika.net
Name of Part
NB(3)_DDR2
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
5
4
3
2
3255
Sheet
1
11
Rev
D
/
49
5
PCIE & DMI ANA
POWER <1.5 A
Intel :10Ux2 + 220Ux1
+1.5V
L53 0R/0805
C488
4.7u/10V/X5R/0805
D D
L9 0R/0603
Ca_VCC3APLL
C492
4.7u/10V/X5R/0805
+1.5V
C C
@*4.7u/10V/X5R/0805/*4.7u/10V/X5R/0805
@*4.7u/10V/X5R/0805/*4.7u/10V/X5R/0805
B B
L95 change to 0805
+3.3V
*4.7u/10V/X5R/0805
COULD OP , SEE LAYOUT .
L23
@*QT1608RL060/QT1608RL060
@*QT1608RL060/QT1608RL060
1u
C232
L60
C199
L54
QT1608RL120
C502
*4.7u/10V/X5R/0805
L10
QT1608RL120
C62
C69
*4.7u/10V/X5R/0805
R173 @0R/*0R
A C
+1.5V
D13 @*BAT54/BAT54
L19 @*QT1608RL181/QT1608RL181
C215
C489
4.7u/10V/X5R/0805
C74
0.1u
Ca_VCCADPLLA
C222
@*0.1U/0.1u
Ca_VCCADPLLB
C188
@*0.1U/0.1u
Ca_VCCAHPLL
C501
0.1u
Ca_VCCAMEMPLL
C68
0.1u
Z1207
R172 @0R/10R
@0.1u/0.1u
@*0.1u/0.1u
@*0.1u/0.1u
Ca_VCC3G
C78
0.1u
DACA
40mA
DACB
40mA
HOSTPLL
45mA
MEMTPLL
45mA
C178
C148
C202
C469
0.1u
+3.3V_TVDACA
C155
@*0.022u/0.022u
+3.3V_TVDACB
C212
@*0.022u/0.022u
+3.3V_TVDACC
C207
@*0.022u/0.022u
2.5V PCIE ANA
Power < 2 mA
+2.5V
L58
0R/0603
JP13 <ǂ>
12
R142 @*0R/0R
+1.5V
Ca_VCCA3GBG
Ca_VSSA3GBG
C185
@*0R/1u
C550
0.1u
VCC_LVDS
C181
@0R/0.1u
4
+1.5V
+1.5V
+1.5V
For DDR DLL , DDR IO ,
FSB IO < 1.9A
Filter component only need when
GMCH core is 1.5V for extended
graphics performance .
http://hobi-elektronika.net
L14 @*QT1608RL181/QT1608RL181
+2.5V
@*0R/1u/10V
R152 @0R/*0R
+1.05V
D12 @*BAT54/BAT54
+2.5V
L13 @*QT1608RL181/QT1608RL181
+2.5V
JP2 <ǂ>
L8 @0R/0603/QT1608RL060
L11 @0R/0603/QT1608RL181
+1.5VS
C461
*4.7u/10V/X5R/0805
C362
*4.7u/10V/X5R/0805
Z1203
A C
L20 @*QT1608RL181/QT1608RL181
@*0R/1u/10V
12
JP3 <ǂ>
12
C490
0.1u
C176 0.1u
C137
0.1u
C81
*1u/10V
C70
*1u/10V
C182
R165 @0R/10R
C149
C190
@0R/0.1u
digital divider
C191 1u
C187 0.1u
C91
*0.1u
C65
*0.1u
L25 @*0R/0R/0603
+2.5V
C186
@0R/0.1u
C198
@*0R/0.1u
+3.3V_TVDACA
+3.3V_TVDACB
+3.3V_TVDACC
VCC_LVDS
+3.3V
40mA
+1.5V_QTVDAC
C66
0.1u
C67
0.1u
Add in R:C
3
C146 @0R/0.1u
Ca_VCC3G
Ca_VCC3APLL
Ca_VCCA3GBG
Ca_VSSA3GBG
VCCA_CRTDAC
VSSA_CRTDAC
Ca_VCCADPLLA
Ca_VCCADPLLB
Ca_VCCAHPLL
Z1204
Z1205
Ca_VCCAMEMPLL
+3.3V_ATVBG
VSS_ATVBG
150mA
C802
0.1u
Z1201
Z1202
Z1206
AB41
AC33
AK31
AF31
AE31
AC31
AK30
AH30
AG30
AF30
AE30
AD30
AC30
AG29
AF29
AE29
AD29
AC29
AG28
AF28
AE28
AH22
AH21
AH20
AH19
AH15
AH14
AG14
AF14
AE14
AF13
AE13
AF12
AE12
AD12
H22
C30
B30
A30
AJ41
Y41
V41
R41
N41
L41
G41
H41
F21
E21
G21
B26
C39
AF1
A38
B39
AF2
H20
G20
E19
F19
C20
D20
E20
F20
AH1
AH2
A28
B28
C28
D21
A23
B23
B25
H19
AL30
AJ30
AJ21
AJ20
P19
P16
P15
Y14
U11G
VCCSYNC
VCC_TXLVDS0
VCC_TXLVDS1
VCC_TXLVDS2
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
VCCA_3GPLL
VCCA_3GBG
VSSA_3GBG
VCCA_CRTDAC0
VCCA_CRTDAC1
VSSA_CRTDAC
VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_LVDS
VSSA_LVDS
VCCA_MPLL
VCCA_TVBG
VSSA_TVBG
VCCA_TVDACA0
VCCA_TVDACA1
VCCA_TVDACB0
VCCA_TVDACB1
VCCA_TVDACC0
VCCA_TVDACC1
VCCD_HMPLL0
VCCD_HMPLL1
VCCD_LVDS0
VCCD_LVDS1
VCCD_LVDS2
VCCD_TVDAC
VCC_HV0
VCC_HV1
VCC_HV2
VCCD_QTVDAC
VCCAUX0
VCCAUX1
VCCAUX2
VCCAUX3
VCCAUX4
VCCAUX5
VCCAUX6
VCCAUX7
VCCAUX8
VCCAUX9
VCCAUX10
VCCAUX11
VCCAUX12
VCCAUX13
VCCAUX14
VCCAUX15
VCCAUX16
VCCAUX17
VCCAUX18
VCCAUX19
VCCAUX20
VCCAUX21
VCCAUX22
VCCAUX23
VCCAUX24
VCCAUX25
VCCAUX26
VCCAUX27
VCCAUX28
VCCAUX29
VCCAUX30
VCCAUX31
VCCAUX32
VCCAUX33
VCCAUX34
VCCAUX35
VCCAUX36
VCCAUX37
VCCAUX38
VCCAUX39
VCCAUX40
CALISTOGA
POWER
2
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
+1.05V
4.7u/10V/X5R/0805
VTTLF_C3
VTTLF_C1
VTTLF_C2
0.47u/X7R
< 0.8A
C128
4.7u/10V/X5R/0805
*4.7u/10V/X5R/0805
4.7u/10V/X5R/0805
C543
C583
0.47u/X7R
C577
C511
0.22u/X7R
1
C104
C82
C544
C114
1u
0.1u
C130
0.1u
C108
0.1u
C90
0.1u
C80
0.1u
C122
1u
C121
1u
NB 1.05V layout < 2.5A
NB 1.5VS layout < 1.9A
NB 1.5V layout < 1.8A
NB 2.5V layout < 0.1A
NB 3.3V layout < 0.1A
NB 1.8VS layout < 3.2A
A A
JP4 <ǂ>
L17 @0R/0603/QT1608RL181
@0.1u/0.1u
12
Power decoupling need to modify for 945GM.
5
C203
+3.3V_ATVBG
VSS_ATVBG
Name of Part
NB(4)_POWER
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
4
3
2
3255
Sheet
1
12
Rev
D
/
49
5
CFG169
D D
CFG16
(FSB Dynamic ODT)
C C
CFG5
Low = DMI*2
High = DMI*4
Design guide use 2.5V
CFG18
(VCC Select)
CFG189 CFG199
Low = 1.05V
High = 1.5V
Low = Dynamic ODT Disabled
High = Dynamic ODT Enabled
R129
*2.2K
+3.3V
R121
*1K
CFG99CFG59
PCIe Lane
CFG[17:3] have internal pullup ressistors.
CFG19 0 = normal
(DMI lane
Reversal)
CFG[20:18] have internal pulldown resistors.
B B
+1.05V
1.05V core < 1.5A
C535
4.7u/10V/X5R/0805
C103
+1.8VS
FSB 667 , 2 CHANNEL < 3.2A
A A
C421
4.7u/10V/X5R/0805
5
C102
4.7u/10V/X5R/0805
C536
4.7u/10V/X5R/0805
C422
4.7u/10V/X5R/0805
4.7u/10V/X5R/0805
C423
4.7u/10V/X5R/0805
C87
*4.7u/10V/X5R/0805
C88
1u
C105
0.22u/X7R
C424
4.7u/10V/X5R/0805
C98
*4.7u/10V/X5R/0805
C112
0.1u
4
R122
*2.2K
Low = Reverse Lane
High = Normal
Design guide use 2.5V
+3.3V
1 = Reversed
C110
C106
0.1u
0.22u/X7R
C89
C109
0.1u
0.1u
C417
C428
0.1u
C426
0.1u
0.1u
4
C83
0.1u
C129
0.1u
R120
3
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
+1.8VS+1.05V
VCCSM_LF_C2
VCCSM_LF_C3
VCCSM_LF_C4
VCCSM_LF_C5
VCCSM_LF_C6
VCCSM_LF_C1
C470
0.47u/X7R
C427
0.47u/X7R
C429
0.47u/X7R
C483
0.47u/X7R
http://hobi-elektronika.net
R124
*2.2K
*1K
AA33
W33
AA32
W32
M32
AA31
W31
M31
AA30
W30
M30
AA29
W29
M29
AB28
AA28
M28
M27
M25
M24
AB23
AA23
M23
AC22
AB22
W22
M22
AC21
AA21
W21
M21
AC20
AB20
W20
M20
AB19
AA19
M19
M18
M17
M16
P33
N33
L33
J33
Y32
V32
P32
N32
L32
J32
V31
T31
R31
P31
N31
Y30
V30
U30
T30
R30
P30
N30
L30
Y29
V29
U29
R29
P29
L29
Y28
V28
U28
T28
R28
P28
N28
L28
P27
N27
L27
P26
N26
L26
N25
L25
P24
N24
Y23
P23
N23
L23
Y22
P22
N22
L22
N21
L21
Y20
P20
N20
L20
Y19
N19
L19
N18
L18
P17
N17
N16
L16
U11E
VCC_0
VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12
VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35
VCC_36
VCC_37
VCC_38
VCC_39
VCC_40
VCC_41
VCC_42
VCC_43
VCC_44
VCC_45
VCC_46
VCC_47
VCC_48
VCC_49
VCC_50
VCC_51
VCC_52
VCC_53
VCC_54
VCC_55
VCC_56
VCC_57
VCC_58
VCC_59
VCC_60
VCC_61
VCC_62
VCC_63
VCC_64
VCC_65
VCC_66
VCC_67
VCC_68
VCC_69
VCC_70
VCC_71
VCC_72
VCC_73
VCC_74
VCC_75
VCC_76
VCC_77
VCC_78
VCC_79
VCC_80
VCC_81
VCC_82
VCC_83
VCC_84
VCC_85
VCC_86
VCC_87
VCC_88
VCC_89
VCC_90
VCC_91
VCC_92
VCC_93
VCC_94
VCC_95
VCC_96
VCC_97
VCC_98
VCC_99
VCC_100
VCC_101
VCC_102
VCC_103
VCC_104
VCC_105
VCC_106
VCC_107
VCC_108
VCC_109
VCC_110
CALISTOGA
VCC
3
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
C458
0.47u/X7R
C431
0.47u/X7R
2
+1.05V
U11F
AD27
VCC_NCTF0
AC27
VCC_NCTF1
AB27
VCC_NCTF2
AA27
VCC_NCTF3
Y27
VCC_NCTF4
W27
VCC_NCTF5
V27
VCC_NCTF6
U27
VCC_NCTF7
T27
VCC_NCTF8
R27
VCC_NCTF9
AD26
VCC_NCTF10
AC26
VCC_NCTF11
AB26
VCC_NCTF12
AA26
VCC_NCTF13
Y26
VCC_NCTF14
W26
VCC_NCTF15
V26
VCC_NCTF16
U26
VCC_NCTF17
T26
VCC_NCTF18
R26
VCC_NCTF19
AD25
VCC_NCTF20
AC25
VCC_NCTF21
AB25
VCC_NCTF22
AA25
VCC_NCTF23
Y25
VCC_NCTF24
W25
VCC_NCTF25
V25
VCC_NCTF26
U25
VCC_NCTF27
T25
VCC_NCTF28
R25
VCC_NCTF29
AD24
VCC_NCTF30
AC24
VCC_NCTF31
AB24
VCC_NCTF32
AA24
VCC_NCTF33
Y24
VCC_NCTF34
W24
VCC_NCTF35
V24
VCC_NCTF36
U24
VCC_NCTF37
T24
VCC_NCTF38
R24
VCC_NCTF39
AD23
VCC_NCTF40
V23
VCC_NCTF41
U23
VCC_NCTF42
T23
VCC_NCTF43
R23
VCC_NCTF44
AD22
VCC_NCTF45
V22
VCC_NCTF46
U22
VCC_NCTF47
T22
VCC_NCTF48
R22
VCC_NCTF49
AD21
VCC_NCTF50
V21
VCC_NCTF51
U21
VCC_NCTF52
T21
VCC_NCTF53
R21
VCC_NCTF54
AD20
VCC_NCTF55
V20
VCC_NCTF56
U20
VCC_NCTF57
T20
VCC_NCTF58
R20
VCC_NCTF59
AD19
VCC_NCTF60
V19
VCC_NCTF61
U19
VCC_NCTF62
T19
VCC_NCTF63
AD18
VCC_NCTF64
AC18
VCC_NCTF65
AB18
VCC_NCTF66
AA18
VCC_NCTF67
Y18
VCC_NCTF68
W18
VCC_NCTF69
V18
VCC_NCTF70
U18
VCC_NCTF71
T18
VCC_NCTF72
CALISTOGA
2
NCTF
Name of Part
NB(5)_POWER
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
3255
1
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
1
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
Sheet
+1.5VS
13
Rev
D
/
49
5
+3.3V
MAA_A[13:0]11
MAA_A2
MAA_A3
MAA_A7
MAA_A6
MAA_A1
MAA_A0
MAA_A5
MAA_A8
EXTTS#09,21
D D
C C
B B
R315 0R
MA_CS#0
MA_CS#1
MA_WE#
MA_CAS#
MA_RAS#
MA_CKE0
MA_CKE1
MA_CK0
MA_CK1
MA_CK#0
MA_CK#1
MA_ODT0
MA_ODT1
DDR_VREF
DIMM0_EXTTS#0
Z1401
Z1402
MA_BA0
MA_BA1
MA_BA2
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS0
MA_DQS1
MA_DQS2
MA_DQS3
MA_DQS4
MA_DQS5
MA_DQS6
MA_DQS7
MA_DQS#0
MA_DQS#1
MA_DQS#2
MA_DQS#3
MA_DQS#4
MA_DQS#5
MA_DQS#6
MA_DQS#7
C378
0.1u
R324
R323
10K
10K
SB_SMB_DATA16,17
SB_SMB_CLK16,17
MA_BA[2:0]11
MA_CS#09
MA_CS#19
MA_DM[7:0]11
MA_WE#11 MB_WE#11
MA_CAS#11
MA_RAS#11
MA_CKE09
MA_CKE19
MA_CK09
MA_CK19
MA_CK#09
MA_CK#19
MA_DQS[7:0]11
MA_ODT09
MA_ODT19
102
101
A0A1A2
163
NC/TEST
50
NC
69
NC
83
NC
120
NC
198
SA0
200
SA1
195
SDA
197
SCL
107
BA0
106
BA1
85
BA2
110
S0#
115
NC/S1#
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
109
WE#
113
CAS#
108
RAS#
79
CKE0
80
NC/CKE1
30
CK0
164
CK1
32
CK#0
166
CK#1
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
114
ODT0
119
NC/ODT1
1
VREF
184
VSS
187
VSS
190
VSS
193
VSS
196
VSS
171
VSS
172
VSS
177
VSS
178
VSS
183
VSS
MAA_A4
99
100
98
979492
939190898684116
A8
A4
A3
A5A6A7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
389121518212427283334394041
MAA_A9
MAA_A10
105
A9
VSS
MAA_A11
A11
A10/AP
VSS
VSS
MAA_A13
MAA_A12
A12
NC/A13
VSS
VSS
NC/A14
VSS
NC/A15
VSS
C10
0.1u
VSS
VSS
VSS
42
47
VSS
VSS
48355459606566717278121
199
VDDSPD
VSS
53
4
http://hobi-elektronika.net
+1.8VS
CN2
96
103
104
111
112
117
118
9588878281
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
132
122
127277
128
MA_DQ1
6
DQ5
MA_DQ7
7
DQ1
MA_DQ6
19
DQ3
MA_DQ3
16
DQ7
MA_DQ0
4
DQ4
MA_DQ4
5
DQ0
MA_DQ5
14
DQ6
MA_DQ2
17
DQ2
MA_DQ13
20
DQ12
MA_DQ8
22
DQ13
MA_DQ10
36
DQ14
MA_DQ9
37
DQ11
MA_DQ12
25
DQ9
MA_DQ14
23
DQ8
MA_DQ15
DQ10
MA_DQ11
38
DQ15
MA_DQ16
45
DQ17
MA_DQ20
43
DQ16
MA_DQ18
55
DQ18
MA_DQ22
57
DQ19
MA_DQ21
44
DQ20
MA_DQ17
46
DQ21
MA_DQ19
56
DQ22
MA_DQ23
58
DQ23
MA_DQ24
61
DQ24
MA_DQ25
63
DQ25
MA_DQ28
62
DQ28
MA_DQ30
75
DQ27
MA_DQ26
74
DQ30
MA_DQ29
64
DQ29
MA_DQ31
73
DQ26
MA_DQ27
76
DQ31
MA_DQ37
123
DQ32
MA_DQ36
125
DQ33
MA_DQ35
135
DQ34
MA_DQ38
137
DQ35
MA_DQ33
124
DQ36
MA_DQ32
126
DQ37
MA_DQ39
134
DQ38
MA_DQ34
136
DQ39
MA_DQ42
141
DQ40
MA_DQ44
140
DQ44
MA_DQ43
151
DQ42
MA_DQ47
153
DQ43
MA_DQ45
142
DQ45
MA_DQ40
143
DQ41
MA_DQ46
152
DQ46
MA_DQ41
154
DQ47
MA_DQ53
157
DQ48
MA_DQ52
159
DQ49
MA_DQ54
173
DQ50
MA_DQ55
175
DQ51
MA_DQ48
158
DQ52
MA_DQ49
160
DQ53
MA_DQ50
174
DQ54
MA_DQ51
176
DQ55
MA_DQ60
179
DQ56
MA_DQ63
181
DQ57
MA_DQ58
189
DQ58
MA_DQ62
191
DQ59
MA_DQ57
180
DQ60
MA_DQ61
182
DQ61
MA_DQ59
192
DQ62
MA_DQ56
194
DQ63
145
VSS
149
VSS
150
VSS
155
VSS
156
VSS
161
VSS
162
VSS
165
VSS
168
VSS
VSS
VSS
VSS
VSS
DDR_CON_NORMAL
139
133
144
138
PIN NC3~4=GND POWER PIN NC3~4=GND POWER
MA_DQ[63:0] 11
Thermistor
DDR2_TEMP21
3
MBA_A[13:0]11
+3.3V
SB_SMB_DATA16,17
SB_SMB_CLK16,17
MB_BA[2:0]11
MB_CS#29
MB_CS#39
MB_DM[7:0]11
MB_DQS[7:0]11
MB_DQS#[7:0]11MA_DQS#[7:0]11
R320
10K
R312 0R
MB_CAS#11
MB_RAS#11
MB_CKE29
MB_CKE39
MB_CK39
MB_CK49
MB_CK#39
MB_CK#49
MB_ODT29
MB_ODT39
R321
DIMM1_EXTTS#0
10K
Z1403
Z1404
MB_BA0
MB_BA1
MB_BA2
MB_CS#2
MB_CS#3
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_WE#
MB_CAS#
MB_RAS#
MB_CKE2
MB_CKE3
MB_CK3
MB_CK4
MB_CK#3
MB_CK#4
MB_DQS0
MB_DQS1
MB_DQS2
MB_DQS3
MB_DQS4
MB_DQS5
MB_DQS6
MB_DQS7
MB_DQS#0
MB_DQS#1
MB_DQS#2
MB_DQS#3
MB_DQS#4
MB_DQS#5
MB_DQS#6
MB_DQS#7
MB_ODT2
MB_ODT3
DDR_VREF
C11
0.1u
+3.3V
RT1
10K_T/0805
R333
1.5K_1%
EXTTS#09,21
MBA_A[13:0]
163
50
69
83
120
198
200
195
197
107
106
85
110
115
10
26
52
67
130
147
170
185
109
113
108
79
80
30
164
32
166
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
114
119
1
184
187
190
193
196
171
172
177
178
183
2
NC/TEST
NC
NC
NC
NC
SA0
SA1
SDA
SCL
BA0
BA1
BA2
S0#
NC/S1#
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
WE#
CAS#
RAS#
CKE0
NC/CKE1
CK0
CK1
CK#0
CK#1
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
ODT0
NC/ODT1
VREF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MBA_A9
MBA_A2
MBA_A0
MBA_A4
MBA_A8
MBA_A3
MBA_A5
MBA_A1
MBA_A7
MBA_A6
99
102
101
100
98
979492
939190898684116
A8
A0A1A2
A4
A3
A5A6A7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
389121518212427283334394041
MBA_A11
MBA_A10
105
A9
A10/AP
VSS
VSS
MBA_A13
MBA_A12
A11
A12
VSS
VSS
NC/A14
NC/A13
VSS
VSS
NC/A15
VSS
VSS
C387
0.1u
VSS
+3.3V
Check SPD power comsumption
199
96
9588878281
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
42
47
48355459606566717278121
VSS
53
1
+1.8VS
CN10
103
104
111
112
117
118
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
132
122
127277
128
VSS
133
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ21
DQ17
DQ20
DQ19
DQ18
DQ16
DQ22
DQ23
DQ24
DQ25
DQ27
DQ30
DQ28
DQ29
DQ26
DQ31
DQ37
DQ36
DQ39
DQ38
DQ33
DQ32
DQ35
DQ34
DQ40
DQ41
DQ42
DQ43
DQ45
DQ44
DQ46
DQ47
DQ54
DQ55
DQ50
DQ52
DQ53
DQ49
DQ48
DQ51
DQ56
DQ57
DQ62
DQ63
DQ60
DQ61
DQ59
DQ58
138
DQ5
DQ0
DQ2
DQ3
DQ7
DQ6
DQ1
DQ4
DQ8
DQ9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
139
6
5
17
19
16
14
7
4
23
25
37
20
22
36
38
46
45
44
57
55
43
56
58
61
63
75
74
62
64
73
76
126
124
136
134
125
123
137
135
141
143
151
153
142
140
152
154
174
176
173
158
160
159
157
175
179
181
192
194
180
182
191
189
145
149
150
155
156
161
162
165
168
VSS
DDR_CON_REV
144
MB_DQ4
MB_DQ5
MB_DQ7
MB_DQ6
MB_DQ2
MB_DQ3
MB_DQ0
MB_DQ1
MB_DQ9
MB_DQ8
MB_DQ15
MB_DQ14
MB_DQ12
MB_DQ13
MB_DQ11
MB_DQ10
MB_DQ19
MB_DQ17
MB_DQ18
MB_DQ16
MB_DQ22
MB_DQ21
MB_DQ20
MB_DQ23
MB_DQ28
MB_DQ25
MB_DQ27
MB_DQ31
MB_DQ26
MB_DQ24
MB_DQ29
MB_DQ30
MB_DQ37
MB_DQ36
MB_DQ39
MB_DQ38
MB_DQ33
MB_DQ32
MB_DQ35
MB_DQ34
MB_DQ45
MB_DQ40
MB_DQ46
MB_DQ42
MB_DQ41
MB_DQ44
MB_DQ43
MB_DQ47
MB_DQ54
MB_DQ55
MB_DQ50
MB_DQ52
MB_DQ48
MB_DQ49
MB_DQ53
MB_DQ51
MB_DQ57
MB_DQ61
MB_DQ63
MB_DQ59
MB_DQ56
MB_DQ60
MB_DQ58
MB_DQ62
MB_DQ[63:0] 11
+0.9VS
C396
C366
C6
C8
C367
C365
C369
0.1u
0.1u
0.1u
C401
C399
0.1u
0.1u
0.1u
C394
C400
0.1u
0.1u
C364
C3
C395
0.1u
0.1u
0.1u
C4
C7
C9
0.1u
0.1u
0.1u
0.1u
0.1u
C398
C397
0.1u
0.1u
Layout note: Place one cap close to every 2 pullup resistors terminated to DDR_VREF
A A
+1.8VS
Modify in R:D
D
C383
C370
22u/10V/X5R/0805
22u/10V/X5R/0805
C388
2.2u/X5R/0603
C372
2.2u/X5R/0603
5
C371
2.2u/X5R/0603
C419
2.2u/X5R/0603
C389
2.2u/X5R/0603
C374
C373
C375
0.1u
0.1u
C384
0.1u
0.1u
C403
0.1u
C5
0.1u
C382
0.1u
C402
0.1u
0.1u
C393
C368
0.1u
0.1u
C385
0.1u
D
C386
0.1u
2.2u/X5R/0603
R322
150R_1%
R325
150R_1%
+1.8VS +1.8VS
Modify in R:D
C13
C12
2.2u/X5R/0603
Modify 52 in R:B
4
C392
0.1u
C390
0.1u
C376
+1.8VS
2.2u/X5R/0603
DDR_VREF
C379
1000p
C803
C804
0.1u
0.1u
Add in 71 R:B1
DDR2_Terminate (SWAP RP PIN when layout)
RP15 56Rx4_0402
MBA_A12
MBA_A9
MBA_A8
MA_CKE1
MA_ODT1
MA_CS#1
MA_CAS#
MA_WE#
MA_BA0
MAA_A1
MAA_A3
MB_ODT3
MA_ODT0
C805
C806
0.1u
0.1u
3
MAA_A13 MAA_A7
MA_CS#0
MA_RAS#
MA_BA1
MB_CAS#
MB_CS#3
1
8
2
7
3
6
45
RP2 56Rx4_0402
1
8
2
7
3
6
4 5
RP3 56Rx4_0402
1
8
2
7
3
6
4 5
RP2056Rx4_0402
1
8
2
7
3
6
45
RP1956Rx4_0402
1
8
2
7
3
6
45
2
RP4 56Rx4_0402
MAA_A5
MAA_A8
MAA_A9
MAA_A12
MAA_A0
MAA_A2
MB_BA0
MB_WE#
RP5 56Rx4_0402
MA_BA2
MA_CKE0
MAA_A11
MBA_A5
MBA_A3
MBA_A1
MAA_A6
MAA_A4
MBA_A10
1
2
3
4 5
8
7
1
2
3
4 5
8
7
8
7
RP14 56Rx4_0402
8
7
6
RP1856Rx4_0402
1
2
3456
8
7
6
RP1656Rx4_0402
1
2
3456
RP1756Rx4_0402
1
2
3456
Name of Part
Project
Date:
3255
MB_RAS#
1
MB_CS#2
2
MB_ODT2
3
MBA_A13
4 5
RP12 56Rx4_0402
MB_CKE3
1
MBA_A11
2
MBA_A7
3
MBA_A6
4 5
RP13 56Rx4_0402
MBA_A4MAA_A10
1
MBA_A2
2
MBA_A0
3
MB_BA1
4 5
MB_CKE2
R318 56R
MB_BA2
R319 56R
DDR2 _SO-DIMM
S50IA Main Board
Monday, July 10, 2006
UNIWILL COMPUTER CORP.
1
Sheet
+0.9VS
8
7
6
8
7
6
8
7
6
Rev
D
/
49
14
5
4
3
2
1
http://hobi-elektronika.net
+3.3VA
D23
Z1501
A C
BAT54
D D
Z1502
R238
1K
Z1503
12
D17
A C
BAT54
CN21
RTC_CON
R367 470R
Modify in R:D
R373 20K
12
J2
OPEN_S
R366
1M
Modify 72 in R:B1
ACZ_BITCLK25
C C
ACZ_SYNC25
ACZ_RST#25
ACZ_SDATAIN025
Add series resister 39 ohm in Audio Bd.
SATA C =
1nF ~
20nF
B B
+3.3VA_RTC
R360
*330K
INTVRMEN
R358
0R
A A
ACZ_SDATAIN125
ACZ_SDATAOUT25
SATA_LED#25
SATA_RXN020
SATA_RXP020
SATA_TXN020
SATA_TXP020
SATA_CLKN7
SATA_CLKP7
Disable VccSus1.05 VRM Mode
+3.3VA_RTC
RTC Circuitry
C455
1u/10V/Y5V/0603
Check J1 on big door side
C459
C437
1u
*0.1u
Disable VccSus1.05 VRM Mode
EE_CS has internal pull-down.
EE_DOUT has internal pull-up.
R355 0R
C452
*22p/NPO
R365 22R
R364 22R
R356 22R
C23 1000p
SATA_CLKN
SATA_CLKP
Change BOM
C24 1000p
within 500 mils
C438
12p
Y1
32.768KHz_DIP
C434
12p
C404 1000p
C409 1000p
R31 24.3R_1%
IDE_PDIOR#20
IDE_PDIOW#20
IDE_PDDACK#20
IDE_IRQ1520
IDE_PDIORDY20
IDE_PDDREQ20
R346
10M
LPC_AD[3:0] 21
LDRQ0# 21
LPC_FRAME# 21
H_A20GATE 21
H_A20M# 5
H_CPUSLP# 5,8
H_DPRSTP#
H_DPSLP#
H_FERR#
H_PWRGD 5
H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_RCIN# 17,21
H_NMI 5
H_SMI# 5
H_STPCLK# 5
R328 24.9R_1%
IDE_PDD0 20
IDE_PDD1 20
IDE_PDD2 20
IDE_PDD3 20
IDE_PDD4 20
IDE_PDD5 20
IDE_PDD6 20
IDE_PDD7 20
IDE_PDD8 20
IDE_PDD9 20
IDE_PDD10 20
IDE_PDD11 20
IDE_PDD12 20
IDE_PDD13 20
IDE_PDD14 20
IDE_PDD15 20
IDE_PDA0 20
IDE_PDA1 20
IDE_PDA2 20
IDE_PDCS1# 20
IDE_PDCS3# 20
H_DPRSTP# 5,29
H_DPSLP# 5
H_FERR# 5
+1.05V
R335
56R
Close to SB in 2".
R340 499R
Z1504
Z1506
Z1507
Z1508
Z1509
AF18
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
AH10
AG10
AF15
AH15
AF16
AH16
AG16
AE15
AB1
AB2
AA3
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
AF3
AE3
U4A
RTXC1
RTCX2
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH6-6-21_0
RTC
LDRQ1#/GPIO23
CPU LPC
GPIO49/CPUPWRGD
AC-97 /AZALIA
IDE SATA LAN
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LFRAME#
A20GATE
A20M#
CPUSLP#
TP1/DPRSTP#
TP2/DPSLP#
FERR#
IGNNE#
INIT3_3V#
INIT#
INTR
RCIN#
SMI#
STPCLK#
THERMTRIP#
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
LPC_AD0
AA6
LPC_AD1
AB5
LPC_AD2
AC4
LPC_AD3
Y6
AC3
AA5
AB3
H_A20GATE
AE22
AH28
CPUSLP#
AG27
Z1510
AF24
Z1511
AH25
SB_H_FERR
AG26
AG24
AG22
AG21
AF22
AF25
AG23
RC_IN = KBC RESET OK
AH24
NMI
AF23
AH22
H_THERMTRIP_R
AF26
AB15
DD0
AE14
DD1
AG13
DD2
AF13
DD3
AD14
DD4
AC13
DD5
AD12
DD6
AC12
DD7
AE12
DD8
AF12
DD9
AB13
AC14
AF14
AH13
AH14
AC15
AH17
DA0
AE17
DA1
AF17
DA2
AE16
AD16
R339 0R
R342 0R
R344 0R
R347 0R
RTC_X1 H_FERR#
RTC_X2
RTC_RST#
SM_INTRUDER#
INTVRMEN
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
H_DPRSTP#
H_DPSLP#
H_A20GATE
PM_THRMTRIP# 5,9
H_THERMTRIP_R
Z1512H_DPSLP#
R348 56R
R343 *56R
R345 *56R
R331 8.2K
PM_THRMTRIP# space 2:1
C411
*0.1u
+3.3VS
R357
100K
C
Q35
B
2N3904
E
C440
0.1u
+1.05V
+3.3V
AUTO_C4# 21
Name of Part
SB(1)_CPU/SATA/IDE
Project
S50IA Main Board
Monday, July 10, 2006
Date:
UNIWILL COMPUTER CORP.
5
4
3
2
3255
Sheet
1
15
Rev
D
/
49
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