Supply voltage specified in OCR register Except CMD0, 15,55,
Supply voltage differentials (V
Power up time 250 ms From 0v to V
Note. The current consumption of any card during the power-up procedure must not exceed 10 mA.
SS1
, V
) -0.3 0.3 V
SS2
DD
Min. Max. Unit Remark
2.0 3.6 V CMD0, 15,55,ACMD41
commands
ACMD41 commands
Min.
DD
•
Bus Signal Line Load
The total capacitance C
capacitance C
C
= C
L
HOST
Where N is the number of connected cards. Requiring the sum of the host and bus capacitances not to exceed 30 pF for up
to 10 cards, and 40 pF for up to 30 cards, the following values must not be exceeded:
+ C
BUS
BUS
the CLK line of the SD Memory Card bus is the sum of the bus master capacitance C
L
itself and the capacitance C
+ Ν
*C
CARD
of each card connected to this line:
CARD
HOST
, the bus
Parameter Symbol
Bus signal line capacitance CL 100 pF f
Single card capacitance C
Maximum signal line inductance 16 nH f
Pull-up resistance inside card (pin1) R
Note that the total capacitance of CMD and DAT lines will be consist of C
connected separately to the SD Memory Card host.
CARD
DAT3
Min. Max. Unit Remark
≤
20 MHz, 7 cards
PP
10 pF
≤
20 MHz
PP
10 90 KΩ May be used for card
detection
, C
HOST
and one C
BUS
only since they are
CARD
Parameter Symbol
Pull-up resistance R
Bus signal line capacitance CL 250 pF f
CMD
, R
Min. Max. Unit Remark
DAT
10 100 KΩ To prevent bus floating
≤
PP
5 MHz, 21 cards
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Bus Signal Levels
As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage.
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2GB microSD Card + Reader P3
To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the
following specified ranges for any V
Parameter Symbol Min. Max. Unit Remark
Output HIGH voltage V
Output LOW voltage V
Input HIGH voltage V
Input LOW voltage V
of the allowed voltage range:
DD
OH
OL
IH
IL
0.75* VDD V I
0.125* VDD V I
0.625* VDD V
VSS – 0.3 0.25* VDD V
+ 0.3 V
DD
= -100 µA @VDD min
OH
= 100 µA @VDD min
OL
Transcend Information Inc.
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Bus Timing
2
2
2
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G
G
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2GB microSD Card + Reader P3
Parameter Symbol Min Max. Unit Remark
Clock CLK (All values are referred to min (VIH) and max (VIL)
Clock frequency Data Transfer Mode f
Clock frequency Identification Mode
(The low freq. is required for MultiMediaCard
compatibility.)
Inputs CMD, DAT (referenced to CLK)
Input set-up time t
Input hold time t
Outputs CMD, DAT (referenced to CLK)
Output Delay time t
f
t
t
t
TLH
t
THL
ODLY
PP
OD
WL
WH
10 ns C
50 ns C
10 ns C
50 ns C
ISU
IH
0 25 MHz C
0 400 KHz C
10 ns C
50 ns C
10 ns C
50 ns C
5 ns C
5 ns C
0 14 ns C
≤
100 pF, (7 cards)
L
≤ 250 pF, (21 cards)
L
≤
100 pF, (7 cards) Clock low time
L
≤
250 pF, (21 cards)
L
≤ 100 pF, (7 cards) Clock high time
L
≤
250 pF, (21 cards)
L
≤ 100 pF, (7 cards) Clock rise time
L
≤
250 pF, (21 cards)
L
≤
100 pF, (7 cards) Clock fall time
L
≤
250 pF, (21 cards)
L
≤ 25 pF, (1 cards)
L
≤
25 pF, (1 cards)
L
≤
25 pF, (1 cards)
L
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Reliability and Durability
Temperature Operation: -25°C / 85°C (Target spec)
Moisture and corrosion Operation: 25°C / 95% rel. humidity
Durability 10000 mating cycles
Bending 10N
Torque 0.10N*m , +/- 2.5deg max
Drop test 1.5m free fall
UV light exposure UV: 254nm, 15Ws/cm² according to ISO 7816-1
Visual inspection
Shape and form
Above technical information is based on standard data and tested to be reliable. However, Transcend makes no warranty,
either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product.
Transcend reserves the right to make changes in specifications at any time without prior notice.
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Storage: 40°C / 93% rel. hum./500h
Salt Water Spray: 3% NaCl/35C; 24h acc. MIL STD Method 1009
No warppage; no mold skin; complete form; no cavities surface smoothness <= -
mm/cm² within contour; no cracks; no pollution (fat, oil dust, etc.)
2GB microSD Card + Reader P3
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Register Information
Within the card interface six registers are defined: OCR, CID, CSD, RCA, DSR and SCR. These can be accessed only
by corresponding commands (see Chapter 4.7). The OCR, CID, CSD and SCR registers carry the card/content
specific information, while the RCA and DSR registers are configuration registers storing actual configuration
parameters.
1. OCR register
The 32-bit operation conditions register stores the V
register includes a status information bit. This status bit is set if the card power up procedure has
been finished. The OCR register shall be implemented by the cards which do not support the full
operating voltage range of the SD Memory Card bus, or if the card power up extends the definition
in the timing diagram.
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2GB microSD Card + Reader P3
DD
voltage profile of the card. In addition, this
A voltage range is not supported if the corresponding bit value is set to LOW. As long as the card is busy, the
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corresponding bit (31) is set to LOW.
2. CID Register
The Card IDentification (CID) register is 128 bits wide. It contains the card identification information used during the
card identification phase. Every individual flash card shall have a unique identification number. The structure of the
CID register is defined in the following paragraphs:
•
MID
An 8 bit binary number that identifies the card manufacturer. The MID number is controlled, defined and allocated to a
SD Memory Card manufacturer by the SD Group. This procedure is established to ensure uniqueness of the CID
register.
•
OID
A 2 ASCII string characters that identifies the card OEM and/or the card contents (when used as a distribution media
either on ROM or FLASH cards). The OID number is controlled, defined and allocated to a SD Memory Card
manufacturer by the SD Group. This procedure is established to ensure uniqueness of the CID register.
•
PNM
The product name is a string, 5 ASCII characters long.
•
PRV
The product revision is composed of two Binary Coded Decimal (BCD) digits, four bits each, representing an “n.m”
revision number. The “n” is the most significant nibble and “m” is the least significant nibble.
As an example, the PRV binary value field for product revision “6.2” will be: 0110 0010
•
PSN
The Serial Number is 32 bits of binary number.
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MDT
The manufacturing date composed of two hexadecimal digits, one is 8 bit representing the year(y)
and the other is four bits representing the month(m).
The “m” field [11:8] is the month code. 1 = January.
The “y” field [19:12] is the year code. 0 = 2000.
As an example, the binary value of the Date field for production date “April 2001” will be:
00000001 0100.
•
CRC
CRC7 checksum (7 bits).
3. CSD Register
The Card-Specific Data register provides information on how to access the card contents. The CSD defines the data
format, error correction type, maximum data access time, whether the DSR register can be used etc. The
programmable part of the register (entries marked by W or E, see below) can be changed by CMD27. The type of the
entries in the table below is coded as follows: R= readable, W(1) = writable once, W = multiple writable.
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Transcend Information Inc.
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