controller and high quality SLC (Single-Level-Cell)
NAND Flash chip, Transcend SD80 series can
provide high performance ,low power consumption yet
excellent reliability.
-Manufactured with SLC NAND Flash chip
-Operating Temperature : -25 ~ 85°C
Placement
• Storage Capacity: 128M~1GB
• Operating Voltage: 2.7 ~ 3.6V
• Operating Temperature: -25 ~ 85°C
• Insertion/removal durability: 10,000 cycles
• Fully compatible with SD card spec. v1.1
• Support SD command class 0,2,4,5,7,8
• Mechanical Write Protection Switch
• Forward compatibility to MultiMediaCard Version 2.11
• Supports Copy Protection for Recorded Media(CPRM)
for music and other commercial media
•Form Factor: 24mm x 32mm x 2.1mm
Front Back
Pin Definition
Pin No.
TranscendInformationInc.
Name Type
1
CD/DAT3
2
3
4
5
6
7
8
9
CMD PP Command/Response
V
SS1
V
DD
CLK I Clock
V
SS2
DAT0 I/O/PP Data Line [Bit0]
DAT1 I/O/PP Data Line [Bit1]
DAT2
I/O/PP
I/O/PP Data Line [Bit2] RSV
SD Mode SPI Mode
Card Detect/Data Line [Bit3]
S Supply voltage ground
S Supply voltage
S Supply voltage ground
Description Name Type
CS I
DI I
VSS S
VDD S
SCLK
VSS2
DO O/PP
RSV
1
I
S
Description
Chip Select (neg true)
Data In
Supply voltage ground
Supply voltage
Clock
Supply voltage ground
Data Out
S
D
8
0
s
e
r
S
D
8
0
S
D
8
0
s
s
e
e
r
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s
s
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Rev1.2
SD80 Secure Digital Card
Architecture
Transcend Information Inc.
2
S
D
8
0
s
e
r
i
e
S
D
8
0
s
S
D
8
0
Bus Operating Conditions
• General
e
s
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Rev1.2
SD80 Secure Digital Card
Parameter Symbol
Peak voltage on all lines -0.3 VDD+0.3
All Inputs
Input Leakage Current -10 10 µA
All Outputs
Output Leakage Current -10 10 µA
• Power Supply Voltage
Parameter Symbol
Supply voltage V
Supply voltage specified in OCR register 2.7 3.6 V Except CMD0, 15,55,
Supply voltage differentials (V
Power up time 250 ms From 0v to VDD Min.
•
Bus Signal Line Load
The total capacitance CL the CLK line of the SD Memory Card bus is the sum of the bus master capacitance C
capacitance C
CL = C
HOST
Bus signal line capacitance CL 100 pF fPP ≤ 20 MHz, 7 cards
Single card capacitance C
Maximum signal line inductance 16 nH fPP ≤ 20 MHz
Pull-up resistance inside card (pin1) R
Note that the total capacitance of CMD and DAT lines will be consist of C
connected separately to the SD Memory Card host.
Pull-up resistance R
Bus signal line capacitance CL 250 pF fPP ≤ 5 MHz, 21 cards
itself and the capacitance C
BUS
+ C
+ Ν*C
BUS
Parameter Symbol
Parameter Symbol
CARD
, V
SS1
) -0.3 0.3 V
SS2
DD
of each card connected to this line:
CARD
CARD
DAT3
, R
CMD
Min. Max. Unit Remark
V
Min. Max. Unit Remark
2.0 3.6 V CMD0, 15,55,ACMD41
commands
ACMD41 commands
Min. Max. Unit Remark
10 pF
10 90 kΩMay be used for card
detection
, C
HOST
Min. Max. Unit Remark
DAT
10 100 kΩTo prevent bus floating
and one C
BUS
only since they are
CARD
HOST
, the bus
Transcend Information Inc.
3
S
D
8
0
s
e
r
S
D
8
0
S
D
8
•
Bus Signal Levels
As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage.
0
s
s
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Rev1.2
SD80 Secure Digital Card
To meet the requirements of the JEDEC specification JESD8-1A, the card input and output voltages shall be within the
following specified ranges for any VDD of the allowed voltage range:
Parameter Symbol Min. Max. Unit Remark
Output HIGH voltage V
Output LOW voltage V
Input HIGH voltage V
Input LOW voltage V
OH
OL
IH
IL
0.75* VDD V I
0.125* VDD V I
0.625* VDD V
VSS – 0.3 0.25* VDD V
+ 0.3 V
DD
= -100 µA @VDD min
OH
= -100 µA @VDD min
OL
Transcend Information Inc.
4
S
D
8
0
S
D
S
•
8
D
8
Bus Timing (Default)
0
0
s
s
s
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Rev1.2
SD80 Secure Digital Card
Parameter Symbol Min Max. Unit Remark
Clock CLK (All values are referred to min (VIH) and max (VIL)
Clock frequency Data Transfer Mode f
Clock frequency Identification Mode
(The low freq. is required for MultiMediaCard
compatibility.)
Clock rise time t
Transcend Information Inc.
f
t
t
WH
TLH
WL
PP
OD
10 ns CL ≤ 100 pF, (7 cards)
0 25 MHz CL ≤ 100 pF, (7 cards)
0 400 KHz CL ≤ 250 pF, (21 cards)
10 ns CL ≤ 100 pF, (7 cards) Clock low time
50 ns CL ≤ 250 pF, (21 cards)
10 ns CL ≤ 100 pF, (7 cards) Clock high time
50 ns CL ≤ 250 pF, (21 cards)
5
S
D
8
0
s
e
r
S
D
8
0
S
D
8
Inputs CMD, DAT (referenced to CLK)
Input set-up time t
Input hold time t
Outputs CMD, DAT (referenced to CLK)
Output Delay time during Data Transfer Mode t
Output Delay time during Identification Mode t
0
s
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s
Rev1.2
SD80 Secure Digital Card
50 ns CL ≤ 250 pF, (21 cards)
t
10 ns CL ≤ 100 pF, (7 cards) Clock fall time
THL
50 ns CL ≤ 250 pF, (21 cards)
ISU
IH
ODLY
ODLY
5 ns CL ≤ 25 pF, (1 cards)
5 ns CL ≤ 25 pF, (1 cards)
0 14 ns CL ≤ 25 pF, (1 cards)
0 50 ns CL ≤ 25 pF, (1 cards)
Transcend Information Inc.
6
S
D
8
0
s
e
r
i
e
S
D
8
0
s
S
D
8
0
•
Bus Timing (High Speed Mode)
e
s
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s
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Rev1.2
SD80 Secure Digital Card
Parameter Symbol Min Max. Unit Remark
Clock CLK (All values are referred to min (VIH) and max (VIL)
Clock frequency Data Transfer Mode f
Clock low time t
Clock high time t
Clock rise time t
Clock fall time t
Inputs CMD, DAT (referenced to CLK)
Input set-up time t
Input hold time t
Outputs CMD, DAT (referenced to CLK)
Transcend Information Inc.
PP
WL
WH
3 ns
TLH
3 ns
THL
ISU
IH
0 50 MHz
7 ns
7 ns
6 ns
2 ns
7
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