TQ-Systems TQMLS1028A Preliminary User's Manual

TQMLS1028A Preliminary User's Manual

TQMLS1028A UM 0001

06.05.2019

TABLE OF CONTENTS

ABOUT THIS MANUAL ........................................................................................................................................................................ 1

1.1 Copyright and license expenses ..................................................................................................................................................... 1

1.2 Registered trademarks ....................................................................................................................................................................... 1

1.3 Disclaimer ............................................................................................................................................................................................... 1

1.4 Imprint ..................................................................................................................................................................................................... 1

1.5 Tips on safety ........................................................................................................................................................................................ 2

1.6 Symbols and typographic conventions ........................................................................................................................................ 2

1.7 Handling and ESD tips ........................................................................................................................................................................ 2

1.8 Naming of signals ................................................................................................................................................................................ 3

1.9 Further applicable documents / presumed knowledge .......................................................................................................... 3

2. BRIEF DESCRIPTION ............................................................................................................................................................................. 3

3. OVERVIEW .............................................................................................................................................................................................. 4

3.1 Block diagram ....................................................................................................................................................................................... 4

3.2 System components ........................................................................................................................................................................... 4

4. ELECTRONICS ........................................................................................................................................................................................ 5

4.1 LS1028A CPU ......................................................................................................................................................................................... 5

4.1.1 LS1028A variants, block diagrams .................................................................................................................................................. 5

4.1.2 LS1028A variants, details ................................................................................................................................................................... 7

4.2 Reset Logic and Supervisor ............................................................................................................................................................... 7

4.2.1 Supervisor .............................................................................................................................................................................................. 7

4.2.2 Self-Reset ................................................................................................................................................................................................ 8

4.2.3 JTAG-Reset TRST# ................................................................................................................................................................................ 8

4.3 CPU Configuration ............................................................................................................................................................................... 9

4.3.1 RCW Source ........................................................................................................................................................................................... 9

4.3.2 Configuration signals.......................................................................................................................................................................... 9

4.3.3 Reset Configuration Word .............................................................................................................................................................. 10

4.3.4 Settings via Pre-Boot-Loader PBL ................................................................................................................................................ 10

4.3.5 Error handling during RCW loading. ........................................................................................................................................... 10

4.4 System Controller ............................................................................................................................................................................. 10

4.5 System Clock ...................................................................................................................................................................................... 11

4.6 Flash ...................................................................................................................................................................................................... 11

4.6.1 QSPI NOR Flash .................................................................................................................................................................................. 11

4.6.2 eMMC / SD card ................................................................................................................................................................................. 11

4.7 SDRAM.................................................................................................................................................................................................. 11

4.8 EEPROM ............................................................................................................................................................................................... 12

4.8.1 Data EEPROM 24LC256T ................................................................................................................................................................. 12

4.8.2 Configuration EEPROM SE97B ...................................................................................................................................................... 12

4.9 RTC......................................................................................................................................................................................................... 13

4.10 Temperature monitoring................................................................................................................................................................ 13

4.11 Supply................................................................................................................................................................................................... 13

4.12 Power consumption ......................................................................................................................................................................... 14

4.12.1 Power consumption CPU ............................................................................................................................................................... 14

4.12.2 Power consumption TQMLS1028A ............................................................................................................................................. 14

4.13 Voltage monitoring .......................................................................................................................................................................... 14

4.14 Interfaces to other systems and devices .................................................................................................................................... 15

4.14.1 UART ..................................................................................................................................................................................................... 15

4.14.2 I2C bus ................................................................................................................................................................................................... 15

4.14.3 JTAG ...................................................................................................................................................................................................... 15

4.15 TQMLS1028A interfaces .................................................................................................................................................................. 15

4.15.1 Pin multiplexing ................................................................................................................................................................................ 15

4.15.2 Pinout TQMLS1028A ........................................................................................................................................................................ 16

TABLE OF CONTENTS (continued)

MECHANICS ........................................................................................................................................................................................ 18

5.1 Assembly ............................................................................................................................................................................................. 18

5.2 Dimensions ......................................................................................................................................................................................... 19

5.3 Images .................................................................................................................................................................................................. 20

5.4 Connectors .......................................................................................................................................................................................... 21

5.5 Adaptation to the environment ................................................................................................................................................... 22

5.6 Protection against external effects.............................................................................................................................................. 22

5.7 Thermal management ..................................................................................................................................................................... 22

5.8 Structural requirements .................................................................................................................................................................. 22

5.9 Notes of treatment ........................................................................................................................................................................... 22

6. SOFTWARE .......................................................................................................................................................................................... 22

7. SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS.................................................................................................. 23

7.1 EMC ....................................................................................................................................................................................................... 23

7.2 ESD ........................................................................................................................................................................................................ 23

7.3 Operational safety and personal security .................................................................................................................................. 23

7.4 Climatic and operational conditions .......................................................................................................................................... 23

7.5 Reliability and service life ............................................................................................................................................................... 23

8. ENVIRONMENT PROTECTION ........................................................................................................................................................ 24

8.1 RoHS ................................................................................................................................................................................................ ...... 24

8.2 WEEE® ................................................................................................................................................................................................... 24

8.3 REACH® ................................................................................................................................................................................................ 24

8.4 EuP ......................................................................................................................................................................................................... 24

8.5 Battery .................................................................................................................................................................................................. 24

8.6 Packaging ............................................................................................................................................................................................ 24

8.7 Other entries ...................................................................................................................................................................................... 24

9. APPENDIX ............................................................................................................................................................................................ 25

9.1 Acronyms and definitions .............................................................................................................................................................. 25

9.2 References ........................................................................................................................................................................................... 27

top view through TQMLS1028A

TABLE DIRECTORY

Terms and Conventions ............................................................................................................................................................. 2

Table 1:

Table 2: LS1028A variants .......................................................................................................................................................................... 7

Table 3: Reset- and Status signals on the TQMLS1028A ................................................................................................................... 7

Table 4: RCW_SRC_SEL ............................................................................................................................................................................... 9

Table 5: Reset Configuration Signals ...................................................................................................................................................... 9

Table 6: Reset Configuration Source ...................................................................................................................................................... 9

Table 7: Power estimation CPU ............................................................................................................................................................. 14

Table 8: Power consumption TQMLS1028A ...................................................................................................................................... 14

Table 9: I2C1 device addresses .............................................................................................................................................................. 15

Table 10: Pinout connector X1 ................................................................................................................................................................. 16

Table 11: Pinout connector X2 ................................................................................................................................................................. 17

Table 12: Labels on TQMLS1028A ........................................................................................................................................................... 18

Table 13: Connector assembled on TQMLS1028A ............................................................................................................................. 21

Table 14: Carrier board mating connectors ......................................................................................................................................... 21

Table 15: Climate and operational conditions .................................................................................................................................... 23

Table 16: Acronyms ..................................................................................................................................................................................... 25

Table 17: Further applicable documents .............................................................................................................................................. 27

ILLUSTRATION DIRECTORY

Illustration 1:

Illustration 2: Block diagram LS1028A .............................................................................................................................................................. 5

Illustration 3: Block diagram LS1018A .............................................................................................................................................................. 5

Illustration 4: Block diagram LS1027A .............................................................................................................................................................. 6

Illustration 5: Block diagram LS1017A .............................................................................................................................................................. 6

Illustration 6: Feedback HRESET_REQ# ............................................................................................................................................................ 8

Illustration 7: Wiring TRST# .................................................................................................................................................................................. 8

Illustration 8: Block diagram eMMC interface ............................................................................................................................................. 11

Illustration 9: Memory Map SE97BTP EEPROM ........................................................................................................................................... 12

Illustration 10: Block diagram RTC buffering ................................................................................................................................................. 13

Illustration 11: TQMLS1028A assembly, top .................................................................................................................................................. 18

Illustration 12: TQMLS1028A assembly, bottom .......................................................................................................................................... 18

Illustration 13: TQMLS1028A dimensions, side view ................................................................................................................................... 19

Illustration 14: TQMLS1028A dimensions,

Illustration 15: TQMLS1028A, 3D, top view .................................................................................................................................................... 20

Illustration 16: TQMLS1028A, 3D, bottom view ............................................................................................................................................ 20

Block diagram TQMLS1028A (simplified) .............................................................................................................................. 4

.................................................................................... 19

REVISION HISTORY

Rev. Date Name Pos. Modification

0001 06.05.2019 Petz First issue

ABOUT THIS MANUAL

Important Notice:

D-82229 Seefeld

1.1 Copyright and license expenses

electronic, machine readable, or in any other form without the written consent of TQ-Systems GmbH. The drivers and utilities for the components used as well as the BIOS are subject to the copyrights of the respective

manufacturers. The licence conditions of the respective manufacturer are to be adhered to. Bootloader-licence expenses are paid by TQ-Systems GmbH and are included in the price. Licence expenses for the operating system and applications are not taken into consideration and must be calculated / declared

separately.

1.2 Registered trademarks

TQ-Systems GmbH aims to adhere to copyrights of all graphics and texts used in all publications, and strives to use original or license-free graphics and texts.

All brand names and trademarks mentioned in this Preliminary User's Manual, including those protected by a third party, unless specified otherwise in writing, are subjected to the specifications of the current copyright laws and the proprietary laws of the present registered proprietor without any limitation. One should conclude that brand and trademarks are rightly protected by a third party.

1.3 Disclaimer

TQ-Systems GmbH does not guarantee that the information in this Preliminary User's Manual is up-to-date, correct, complete or of good quality. Nor does TQ-Systems GmbH assume guarantee for further usage of the information. Liability claims against TQSystems GmbH, referring to material or non-material related damages caused, due to usage or non-usage of the information given in this Preliminary User's Manual, or due to usage of erroneous or incomplete information, are exempted, as long as there is no proven intentional or negligent fault of TQ-Systems GmbH.

TQ-Systems GmbH explicitly reserves the rights to change or add to the contents of this Preliminary User's Manual or parts of it without special notification.

Before using the Starterkit MBLS1028A or parts of the schematics of the MBLS1028A, you must evaluate it and determine if it is suitable for your intended application. You assume all risks and liability associated with such use. TQ-Systems GmbH makes no other warranties including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. Except where prohibited by law, TQ-Systems GmbH will not be liable for any indirect, special, incidental or consequential loss or damage arising from the usage of the Starterkit MBLS1028A or schematics used, regardless of the legal theory asserted.

1.4 Imprint

TQ-Systems GmbH Gut Delling, Mühlstraße 2

Tel: +49 8153 9308–0 Fax: +49 8153 9308–4223 E-Mail: Info@TQ-Group Web: TQ-Group

Command

1.5 Tips on safety

Improper or incorrect handling of the product can substantially reduce its life span.

1.6 Symbols and typographic conventions

Table 1: Terms and Conventions

Symbol Meaning

This symbol represents the handling of electrostatic-sensitive modules and / or components. These components are often damaged / destroyed by the transmission of a voltage higher than about 50 V. A human body usually only experiences electrostatic discharges above approximately 3,000 V.

This symbol indicates the possible use of voltages higher than 24 V. Please note the relevant statutory regulations in this regard. Non-compliance with these regulations can lead to serious damage to your health and also cause

damage / destruction of the component.

This symbol indicates a possible source of danger. Acting against the procedure described can lead to possible damage to your health and / or cause damage / destruction of the material used.

This symbol represents important details or aspects for working with TQ-products.

A font with fixed-width is used to denote commands, contents, file names, or menu items.

1.7 Handling and ESD tips

General handling of your TQ-products

The TQ-product may only be used and serviced by certified personnel who have taken note of the information, the safety regulations in this document and all related rules and regulations.

A general rule is: do not touch the TQ-product during operation. This is especially important when switching on, changing jumper settings or connecting other devices without ensuring beforehand that the power supply of the system has been switched off.

Violation of this guideline may result in damage / destruction of the TQMLS1028A and be dangerous to your health.

Improper handling of your TQ-product would render the guarantee invalid.

Proper ESD handling

The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD). Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-

product in an ESD-safe environment. Especially when you switch modules on, change jumper settings, or connect other devices.

Specifications and manual of the modules used:

Specifications of the components used:

Chip errata:

Software behaviour:

General expertise:

BRIEF DESCRIPTION

1.8 Naming of signals

A hash mark (#) at the end of the signal name indicates a low-active signal. Example: RESET# If a signal can switch between two functions and if this is noted in the name of the signal, the low-active function is marked with

a hash mark and shown at the end. Example: C / D# If a signal has multiple functions, the individual functions are separated by slashes when they are important for the wiring. The identification of the individual functions follows the above conventions. Example: WE2# / OE#

1.9 Further applicable documents / presumed knowledge

•

These documents describe the service, functionality and special characteristics of the module used (incl. BIOS).

•

The manufacturer's specifications of the components used, for example CompactFlash cards, are to be taken note of. They contain, if applicable, additional information that must be taken note of for safe and reliable operation. These documents are stored at TQ-Systems GmbH.

•

It is the user's responsibility to make sure all errata published by the manufacturer of each component are taken note of. The manufacturer’s advice should be followed.

•

No warranty can be given, nor responsibility taken for any unexpected software behaviour due to deficient components.

•

Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.

The following documents are required to fully comprehend the following contents:

• MBLS1028A circuit diagram

• MBLS1028A Preliminary User's Manual

• LS1028A Data Sheet

• U-Boot documentation: www.denx.de/wiki/U-Boot/Documentation

• PTXdist documentation: www.ptxdist.de

• TQ-Support Wiki: support.tq-group.com/doku.php?id=en:arm:tqmls1028a

This Preliminary User's Manual describes the TQMLS1028A, and refers to some software settings. A certain TQMLS1028A derivative does not necessarily provide all features described in this Preliminary User's Manual. This Preliminary User's Manual does also not replace the NXP CPU Reference Manuals. The information provided in this Preliminary User's Manual is only valid in connection with the tailored boot loader, which is preinstalled on the TQMLS1028A, and the BSP provided by TQ-Systems GmbH. See also chapter 6. The TQMLS1028A is a universal Minimodule based on the NXP Layerscape CPUs LS1028A / LS1018A / LS1027A / LS1017A.

These Layerscape CPUs are Single, or Dual Cortex

A72 with QorIQ technology. The TQMLS1028A extends the TQ-Systems GmbH product range and offers an outstanding computing performance. A suitable CPU derivative (LS1028A / LS1018A / LS1027A / LS1017A) can be selected for each requirement. All essential CPU pins are routed to the TQMLS1028A connectors. There are therefore no restrictions for customers using the TQMLS1028A with respect to an integrated customised design. Furthermore all components required for the CPU to function like DDR4 SDRAM, eMMC, power supply and power management

are integrated on the TQMLS1028A. The main TQMLS1028A characteristics are:

• CPU derivatives LS1028A / LS1018A / LS1027A / LS1017A

• DDR4 SDRAM, ECC as an assembly option

• eMMC NAND Flash

• QSPI NOR Flash

• Single supply voltage 5 V

• On-board RTC / EEPROM / temperature sensor

The MBLS1028A also serves as carrier board and reference platform for the TQMLS1028A.

OVERVIEW

3.1 Block diagram

Illustration 1: Block diagram TQMLS1028A (simplified)

3.2 System components

The TQMLS1028A provides the following key functions and characteristics:

• Layerscape CPUs LS1028A / LS1018A / LS1027A / LS1017A

• Oscillators

• Reset structure, Supervisor and Power Management

• System Controller for Reset-configuration and Power Management

• Power supply, and Power-Sequencing

• Voltage supervision

• Temperature sensors

• RTC

• EEPROM

• DDR4 SDRAM with ECC

• QSPI NOR Flash

• eMMC NAND Flash

• Two connectors (240 pins)

All essential CPU pins are routed to the TQMLS1028A connectors. There are therefore no restrictions for customers using the TQMLS1028A with respect to an integrated customised design. All TQMLS1028A versions are fully pin-compatible and therefore interchangeable. The functionality of the different TQMLS1028A is mainly determined by the features provided by the respective CPU derivative.

ELECTRONICS

4.1 LS1028A CPU

4.1.1 LS1028A variants, block diagrams

Illustration 2: Block diagram LS1028A (Source: NXP

)

Illustration 3: Block diagram LS1018A (Source: NXP

)

4.1.1 LS1028A variants, block diagrams (continued)

Illustration 4: Block diagram LS1027A (Source: NXP)

Illustration 5: Block diagram LS1017A (Source: NXP

)

4.1.2 LS1028A variants, details

The following table shows the features provided by the different variants. Fields with a red background indicate differences; fields with a green background indicate compatibility.

Table 2: LS1028A variants

Feature LS1028A LS1027A LS1018A LS1017A

ARM® core 2 × Cortex®-A72 2 × Cortex®-A72 1 × Cortex®-A72 1 × Cortex®-A72

DDR 32-bit, DDR4 + ECC 32-bit, DDR4 + ECC 32-bit, DDR4 + ECC 32-bit, DDR4 + ECC

GPU 1 × GC7000UltraLite – 1 × GC7000UltraLite –

Ethernet

PCIe

USB

4 × 2.5 G/1 G switched Eth (TSN enabled)

1 × 2.5 G/1 G Eth (TSN enabled)

1 × 1 G Eth

2 × Gen 3.0 Controllers (RC or RP)

2 × USB 3.0 with PHY (Host or Device)

4 × 2.5 G/1 G switched Eth (TSN enabled)

1 × 2.5 G/1 G Eth (TSN enabled)

1 × 1 G Eth

2 × Gen 3.0 Controllers (RC or RP)

2 × USB 3.0 with PHY (Host or Device)

4 × 2.5 G/1 G switched Eth (TSN enabled)

1 × 2.5 G/1 G Eth (TSN enabled)

1 × 1 G Eth

2 × Gen 3.0 Controllers (RC or RP)

2 × USB 3.0 with PHY (Host or Device)

4 × 2.5 G/1 G switched Eth (TSN enabled)

1 × 2.5 G/1 G Eth (TSN enabled)

1 × 1 G Eth

2 × Gen 3.0 Controllers (RC or RP)

2 × USB 3.0 with PHY (Host or Device)

4.2 Reset Logic and Supervisor

The reset logic contains the following functions:

• Monitoring the voltages on the module

• External reset input

• PGOOD output for power-up of circuits on the carrier board

• Reset LED (Function: PORESET# low: LED lights up)

Table 3: Reset- and Status signals on the TQMLS1028A

Signal Source Target Remark

PORESET#

HRESET#

Supervisor, Board, JTAG, System Controller

CPU

CPU, LED 1.8 V

RESET_REQ# CPU Board

Signal is available externally with

3.3 V level as RESET_OUT#.

Internal feedback to supervisor, signal is available externally with 3.3 V level as RESET_REQ_OUT#.

TRST# JTAG CPU 1.8 V

PGOOD Supervisor System Controller, Board 3.3 V

4.2.1 Supervisor

• System controller + serial voltage reference + external comparators

• PORESET# is connected to LED (pulse duration given by system controller)

4.2.2 Self-Reset

The LS1028A CPU can trigger or request a hardware reset via software. The output HRESET_REQ# is driven internally by the CPU and can be set by software in register RSTCR (bit 30). RESET_REQ# is returned to RESIN# within the TQMLS1028A (default). No additional feedback is necessary on the carrier board. When RESET_REQ# is triggered a self-reset is executed. Depending on how the feedback circuit is designed on the carrier board, the feedback circuit can "override" the internal

feedback and thus, if RESET_REQ# is active, it can either

• Trigger a reset

• Not trigger a reset

• Trigger further actions on the carrier board in addition to the reset

RESET_REQ# is routed to the connector for this purpose (see Illustration 6: Feedback ). "Devices" that can trigger a RESET_REQ# see (3), chapter 4.8.3.

Illustration 6: Feedback HRESET_REQ#

4.2.3 JTAG-Reset TRST#

Coupling to PORESET#, optional pull-down to TRST#.

Illustration 7: Wiring TRST#

0x50 / 1010 000b

0xxx

1000

1001

1010

1011

1100

1101

1110

1111

4.3 CPU Configuration

4.3.1 RCW Source

The RCW source selection is managed by the system controller.

Table 4: RCW_SRC_SEL

Level Reset Configuration Source Required external pull-down (Module pull-up is 10 kΩ to 3.3 V)

80 – 100 % SD card None (open)

60 – 80 % eMMC 24 kΩ

40 – 60 % SPI NOR flash 10 kΩ

20 – 40 % Hard-coded 4.3 kΩ

0 – 20 % I2C EEPROM, Addr.

0 Ω (Pulled to Ground)

4.3.2 Configuration signals

The LS1028A CPU is configured via pins as well as via registers.

Table 5: Reset Configuration Signals

Reset cfg. name Functional Signal Name Default TQMLS1028A Variable 1

cfg_rcw_src[0:3] ASLEEP, CLK_OUT, UART1_SOUT, UART2_SOUT 1111 Several Yes

cfg_svr_src[0:1] XSPI1_A_CS0_B, XSPI1_A_CS1_B 11 ? ?

cfg_dram_type EMI1_MDC 1 1 = ? No

cfg_eng_use0 XSPI1_A_SCK 1 1 = ? ?

cfg_gpinput[0:3] SDHC1_DAT[0:3], I/O voltage EVDD (1.8 or 3.3 V!) 1111 Not driven, internal Pull-Ups –

cfg_gpinput[4:7] XSPI1_B_DATA[0:3] 1111 Not driven, internal Pull-Ups –

The following table shows the coding of the field cfg_rcw_src:

Table 6: Reset Configuration Source

cfg_rcw_src value (Binary) RCW source

Hard-coded RCW (TBD)

SDHC1 (SD card)

SDHC2 (eMMC)

I2C1 extended addressing 2

Reserved

XSPI1A NAND 2 KB pages

XSPI1A NAND 4 KB pages

Reserved

XSPI1A NOR

Green Standard configuration Yellow Configuration for development and debugging

1: Yes  via shift register; No  fixed value; 3-fold pad  by assembly. 2: Device address 0x50 / 1010 000b = Configuration EEPROM.

4.3.3 Reset Configuration Word

The RCW structure (Reset Configuration Word) can be found in the TQMLS1028A Reference Manual (3). The Reset Configuration Word (RCW) is transferred to the CPU as memory structure. It has the same format as the Pre-Boot Loader (PBL). It has a start identifier and a CRC. The Reset Configuration Word has 1024 bits: 128 bytes user data (memory image) + 4 bytes preamble + 4 bytes address + 8 bytes end command incl. CRC = 144 bytes.

Note: Adaption of RCW

The RCW must be adapted to the actual application. This applies, for example, to SerDes configuration and I/O multiplexing.

To create the RCW, NXP offers a tool with a graphical user interface (QorIQ Configuration and Validation Suite 4.2), which is available free of charge for registered users.

4.3.4 Settings via Pre-Boot-Loader PBL

In addition to the Reset Configuration Word, the PBL offers a further possibility to configure the CPU without any additional software. The PBL uses the same data structure as the RCW or extends it. For details see (3), Table 27-2.

4.3.5 Error handling during RCW loading.

If an error occurs while loading the RCW or in the PBL, the CPU proceeds as follows, see (3), Table 4.6:

Halt the Reset Sequence on RCW Error Detection. If the Service Processor reports an error during its process of loading the RCW data, the following occurs:

• The device reset sequence is halted, remaining in this state.

• An error code is reported by the SP in RCW_COMPLETION[ERR_CODE].

• A request for a reset of the SoC is captured in RSTRQSR1[SP_RR], which generates a reset request if not masked by

RSTRQMR1[SP_MSK].

This state can only be exited with a PORESET_B or Hard Reset."

4.4 System Controller

The TQMLS1028A uses a system controller for housekeeping and initialization functions. This system controller also performs power sequencing and voltage monitoring.

The functions are in detail:

• Correctly timed output of the reset configuration signal cfg_rcw_src[0:3]

• - Input for selection cfg_rcw_src, analog level to encode five states:

1. SD card

2. eMMC

3. NOR Flash

4. Hard-coded

5. I

• Power Sequencing: Control of power-up sequence of all module-internal supply voltages

• Voltage monitoring: Monitoring of all supply voltages (assembly option)

LS1028A

eMMC

SDHC2_CLK

SDHC2_CMD

CLK

CMD

SDHC2_DATA[7:0]

DAT[

7:0

]

SDHC2_RESET_B

RST#

SDHC

2_STROBE

VCC

VCCQ

1.8 V

.3 V

4.5 System Clock

The system clock is fixed at 100 MHz. Spread spectrum clocking is not possible.

4.6 Flash

Assembled on TQMLS1028A:

• QSPI NOR Flash

• eMMC NAND Flash, Configuration as SLC is possible (higher reliability, half capacity)

External removable storage device:

• SD card (on MBLS1028A)

All above mentioned options, except NAND flash, are supported (external SD card on carrier board).

4.6.1 QSPI NOR Flash

• QSPI flash with 1.8 V I/O voltage, 4 or 8 bidirectional data lines, separate read strobe.

• Software support for STR and DTR.

• 64 to 512 MByte

4.6.2 eMMC / SD card

The LS1028A CPU provides two SDHC interfaces. One is for SD cards (with switchable I/O voltage), the other for eMMC (with fixed I/O voltage).

Illustration 8: Block diagram eMMC interface

The eMMC is connected to SDHC2. The maximum transfer rate corresponds to the HS400 mode (eMMC from 5.0).

4.7 SDRAM

DDR4 SDRAM is used on the TQMLS1028A. Expansion stages with 1, 2, 4 or 8 GB are possible.

4.8 EEPROM

4.8.1 Data EEPROM 24LC256T

The EEPROM is empty on delivery.

• 256 Kbit or not assembled

• 3 decoded address lines

• Connected to I

C controller 1 of the CPU

• Device address is 0x57 / 1010 111b

4.8.2 Configuration EEPROM SE97B

The temperature sensor SE97BTP also contains a 2 Kbit (256 × 8 Bit) EEPROM. The EEPROM is divided into two parts. The lower 128 bytes (00h to 7Fh) can be set to Permanent Write Protected (PWP) mode or Reversible Write Protected (RWP)

mode by software. The upper 128 bytes (80h to FFh) cannot be write-protected and can be used for general data storage.

Illustration 9: Memory Map SE97BTP EEPROM

The EEPROM can be accessed with the following two I

C addresses.

• EEPROM (Normal Mode): 0x50 / 1010 000b

• EEPROM (Protected Mode): 0x30 / 0110 000b

The configuration EEPROM contains a standard reset configuration at delivery. The configuration EEPROM is only one of several options for storing the reset configuration.

By means of the standard reset configuration in the EEPROM, a correctly configured system can always be achieved by simply changing the Reset Configuration Source.

If the Reset Configuration Source is selected accordingly, 4 + 4 + 64 + 8 bytes = 80 bytes are required for the reset configuration. It can also be used for the Pre-Boot Loader PBL.

4.9 RTC

The RTC PCF85063ATL is supported by U-Boot and Linux kernel. The RTC is powered via V

, battery buffering is possible (battery on carrier board, see Illustration 10).

The alarm output INTA# is routed to the module connectors. A wake-up is possible via the system controller.

The RTC is connected to the I The accuracy of the RTC is primarily determined by the characteristics of the quartz used. The type FC-135 used on the

TQMLS1028A has a standard frequency tolerance of ±20 ppm at +25 °C. (Parabolic coefficient: max. –0.04 × 10

C controller 1, device address is 0x51 / 1010 001b.

–6

/ °C2)

This results in an accuracy of approximately 2.6 seconds / day = 16 minutes / year.

Illustration 10: Block diagram RTC buffering

4.10 Temperature monitoring

Due to the high power dissipation, temperature monitoring is absolutely necessary in order to comply with the specified operating conditions and thus ensure reliable operation of the TQMLS1028A. The temperature critical components are:

• CPU

• DDR4 SDRAM

The following measuring points exist:

• CPU temperature: Measurement via diode integrated in CPU, read out via external channel of SA56004

• DDR4 SDRAM: Measurement by combined temperature sensor / EEPROM SE97B

• VDD switching regulator: SA56004 (internal channel) for measuring the VDD switching regulator

The open-drain Alarm Outputs (open drain) are connected together and have a pull-up to signal TEMP_OS#. Control via I2C controller 1 of the CPU, device addresses see Table 9. Further details can be found in the SA56004EDP data sheet (5). An additional temperature sensor is integrated in the configuration EEPROM, see 4.8.2.

4.11 Supply

The TQMLS1028A requires a 5 V supply with a maximum tolerance ±5 %.

4.12 Power consumption

4.12.1 Power consumption CPU

Since no values are yet available for the TQMLS1028A, these must be estimated:

Table 7: Power estimation CPU

CPU VDD [V] Clock Core / Platform [MHz] Power consumption [W]

LS1026A (measured) 1.0 1400 / 600 11.8

LS1026A (measured) 0.9 1200 / 400 8.1

LS1028A (estimated) 1.0 1300 / 400 11.0

These maximum values (Worst Case) occur at 100 % load on all cores and DMA at 115% activity factor.

4.12.2 Power consumption TQMLS1028A

The given current consumptions have to be seen as typical values. The power consumption of the TQMLS1028A strongly depends on the application, the mode of operation and the operating system.

The following table shows details of the TQMLS1028A supply and power consumption.

Table 8: Power consumption TQMLS1028A

Module Power dissipation max. Power dissipation typ. (Thermal Design Power)

TQMLS1028A 16 W 12.5 W

TQMLS1018A, TQMLS1027A, TQMLS1017A (lower) (lower)

4.13 Voltage monitoring

The permitted voltage ranges are given by the data sheets of the components and, if applicable, the tolerance range of the voltage monitoring. Voltage monitoring is an assembly option.

0x57 / 1010 111b

0x11 / 0010 001b

0x51 / 1010 001b

0x4C / 1001 101b

0x18 / 0011 000b

0x50 / 1010 000b

0x30 / 0110 000b

4.14 Interfaces to other systems and devices

4.14.1 UART

The UART interfaces are directly connected to the TQMLS1028A connectors.

4.14.2 I

C bus

Table 9: I2C1 device addresses

Function Device Address (7 bit) / (8 bit) Remark

Data EEPROM 24LC256

System Controller MKL04Z16

RTC PCF85063A

Temperature Sensor SA560004EDP 3

–

Temperature

Temperature Sensor / EEPROM SE97BTP

EEPROM, unprotected

EEPROM, protected

All six I

C buses of the LS1028A CPU (I2C1 to I2C6) are not terminated and routed to the TQMLS1028A connectors. The I2C1 bus is level shifted to 3.3 V and terminated with 4.7 kΩ pull-ups to 3.3 V on the TQMLS1028A. The I2C devices on the TQMLS1028A are connected to the level-shifted I2C1 bus. More devices can be connected to the bus, but

additional external pull-ups may be necessary on account of the relatively high capacitive load.

4.14.3 JTAG

On the MBLS1082A is a 20-pin pin header with 100 mil pitch where various debuggers can be connected. Alternatively the LS1028A CPU can be addressed via OpenSDA.

4.15 TQMLS1028A interfaces

4.15.1 Pin multiplexing

When using the processor signals the multiple pin configurations by different processor-internal function units must be taken note of. The pins assignment listed in

Table 10, and Table 11 refer to the corresponding standard BSP of TQ-Systems GmbH in combination with the Starterkit MBLS1028A.

Attention: Destruction or malfunction

3: Address is compatible to ADT7461, LM86, MAX6657/8 und ADM1032.

Depending on the configuration many CPU pins can provide several different functions. Please take note of the information concerning the configuration of these pins in (1), before

integration or start-up of your carrier board / Starterkit.

5 V

Power

VIN 3 4

VIN

Power

5 V

Power

VIN 5 6

VIN

Power

5 V

Power

VIN 7 8

VIN

Power

5 V

Power

VIN 9 10

VIN

Power

5 V

Power

VIN

Power

5 V

3.0 V

Power

VBAT

PGOOD

System

3.3 V

0 V

Power

DGND

Power

0 V

3.3 V

System

RESIN#

PROG_MTR

Factory Test

–

3.3 V

System

RCW_SRC_SEL

FA_VL

Factory Test

–

3.3 V

I2C

IIC1_SCL_3V3

TA_PROG_SFP

Factory Test

–

3.3 V

I2C

IIC1_SDA_3V3

TA_BB_VDD

Power

(VDD)

5 V (OC)

System

RTC_INT_OUT#

EVDD

Power

1.8 / 3.3 V

VBAT

System

RTC_CLKOUT

DGND

Power

0 V

Power

DGND

USB1_D_P

USB

–

0 V

Power

DGND

USB1_D_M

USB

–

USB

USB2_RX_P

DGND

Power

0 V – USB

USB2_RX_M

DGND

Power

0 V

Power

DGND

USB1_RX_P

USB

–

0 V

Power

DGND

USB1_RX_M

USB

–

USB

USB2_TX_P

DGND

Power

0 V

–

USB

USB2_TX_M

DGND

Power

0 V

Power

DGND

USB1_TX_P

USB

–

0 V

Power

DGND

USB1_TX_M

USB

–

USB

USB2_D_P

DGND

Power

0 V

–

USB

USB2_D_M

DGND

Power

0 V

Power

DGND

USB1_VBUS

USB

–

USB

USB2_VBUS

USB1_ID

USB

–

USB

USB2_ID

USB_PWRFAULT

USB

1.8 V

USB

USB_DRVVBUS

VCC1V8

Factory Test

1.8 V

2.5 V

Factory Test

VCC2V5

DGND

Power

0 V

Power

DGND

XSPI1_A_DATA1

XSPI

1.8 V

XSPI

XSPI1_A_DATA0

XSPI1_A_DATA3

XSPI

1.8 V

XSPI

XSPI1_A_DATA2

XSPI1_A_DATA5

XSPI

1.8 V

XSPI

XSPI1_A_DATA4

XSPI1_A_DATA7

XSPI

1.8 V

XSPI

XSPI1_A_DATA6

XSPI1_A_CS0#

XSPI

1.8 V

XSPI

XSPI1_A_CS1#

XSPI1_A_DQS

XSPI

1.8 V

XSPI

XSPI1_A_SCK

DGND

Power

0 V

Power

DGND

SDHC2_CLK

SDHC

1.8 V

SDHC

SDHC2_CMD

DGND

Power

0 V

1.8 V

SDHC

SDHC2_DS

SDHC2_DAT0

SDHC

1.8 V

SDHC

SDHC2_DAT4

SDHC2_DAT1

SDHC

1.8 V

0 V

Power

DGND

SDHC2_DAT2

SDHC

1.8 V

SDHC

SDHC2_DAT5

SDHC2_DAT3

SDHC

1.8 V

SDHC

SDHC2_DAT6

DGND

Power

0 V

1.8 V

SDHC

SDHC2_DAT7

VCC1V2

Factory Test

1.8 V

0 V

Power

DGND

DP_HPD

1.8 V

(DP_SVDD)

DP_REFCLK_P

DGND

Power

0 V

(DP_SVDD)

DP_REFCLK_N

DGND

Power

0 V

Power

DGND

100

DP_LANE0_P

(DP_SVDD)

0 V

Power

DGND

101

102

DP_LANE0_N

(DP_SVDD)

DP_LANE1_P

103

104

DGND

Power

0 V

(DP_SVDD)

DP_LANE1_N

105

106

DGND

Power

0 V

Power

DGND

107

108

DP_LANE2_P

(DP_SVDD)

0 V

Power

DGND

109

110

DP_LANE2_N

(DP_SVDD)

DP_LANE3_P

111

112

DGND

Power

0 V

(DP_SVDD)

DP_LANE3_N

113

114

DGND

Power

0 V

Power

DGND

115

116

DP_AUX_P

(DP_SVDD)

0 V

Power

DGND

117

118

DP_AUX_N

(DP_SVDD)

0.6 V

Factory Test

VCC2V5

119

120

DGND

Power

0 V

4.15.2 Pinout TQMLS1028A

Table 10: Pinout connector X1

Ball Level Group Signal Pin Signal Group Level Ball

5 V Power VIN 1 2 VIN Power 5 V

3.3 V

System

SWD_CLK/PWM_VREF

3 4 TEMP_CRIT_MOD#

System

3.3 V

0 V

Power

DGND 5 6

VCC3V3S

Factory Test

3.3 V

1.8 V

SDHC

SDHC1_VSEL

7 8 DGND

Power

0 V

1.8 / 3.3 V

SDHC

SDHC1_CLK

CLK_OUT

Debug

1.8 V

1.8 / 3.3 V

SDHC

SDHC1_CMD

ASLEEP

Debug

1.8 V

0 V

Power

DGND

TA_TMP_DETECT#

Trust

1.8 V

1.8 / 3.3 V

SDHC

SDHC1_DAT0

TA_BB_TMP_DETECT#

Trust

(TA_BB_VDD)

1.8 / 3.3 V

SDHC

SDHC1_DAT1

DGND

Power

0 V

1.8 / 3.3 V

SDHC

SDHC1_DAT2

IIC1_SCL

I2C

1.8 V

1.8 / 3.3 V

SDHC

SDHC1_DAT3

IIC1_SDA

I2C

1.8 V

0 V

Power

DGND

IIC2_SCL

I2C

1.8 V

UART

UART1_SIN

IIC2_SDA

I2C

1.8 V

UART

UART1_SOUT

IIC3_SCL

I2C

1.8 V

UART

UART2_SIN

IIC3_SDA

I2C

1.8 V

UART

UART2_SOUT

IIC4_SCL

I2C

1.8 V

0 V

Power

DGND

IIC4_SDA

I2C

1.8 V

(VDD_1)

Factory Test

VDD_1

IIC5_SCL

I2C

1.8 V

(VDD)

Factory Test

VDD

IIC5_SDA

I2C

1.8 V

1.35 V

Factory Test

VCC1V35

IIC6_SCL

I2C

1.8 V

0 V

Power

DGND

IIC6_SDA

I2C

1.8 V

(SVDD)

SerDes

SD1_REF_CLK1_P

DGND

Power

0 V

(SVDD)

SerDes

SD1_REF_CLK1_N

DGND

Power

0 V

Power

DGND

SD1_RX0_P

SerDes

(SVDD)

0 V

Power

DGND

SD1_RX0_N

SerDes

(SVDD)

(XVDD)

SerDes

SD1_TX0_P

DGND

Power

0 V

(XVDD)

SerDes

SD1_TX0_N

DGND

Power

0 V

Power

DGND

SD1_RX1_P

SerDes

(SVDD)

0 V

Power

DGND

SD1_RX1_N

SerDes

(SVDD)

(XVDD)

SerDes

SD1_TX1_P

DGND

Power

0 V

(XVDD)

SerDes

SD1_TX1_N

DGND

Power

0 V

Power

DGND

SD1_RX2_P

SerDes

(SVDD)

0 V

Power

DGND

SD1_RX2_N

SerDes

(SVDD)

(XVDD)

SerDes

SD1_TX2_P

DGND

Power

0 V

(XVDD)

SerDes

SD1_TX2_N

DGND

Power

0 V

Power

DGND

SD1_RX3_P

SerDes

(SVDD)

0 V

Power

DGND

SD1_RX3_N

SerDes

(SVDD)

(XVDD)

SerDes

SD1_TX3_P

DGND

Power

0 V

(XVDD)

SerDes

SD1_TX3_N

DGND

Power

0 V

Power

DGND

SD1_REF_CLK2_P

SerDes

(SVDD)

0 V

Power

DGND

SD1_REF_CLK2_N

SerDes

(SVDD)

1.8 V

SPI

SPI3_SCK

DGND

Power

0 V

1.8 V

SPI

SPI3_PCS0

SCAN_MODE#

Factory Test

1.8 V

SPI

SPI3_SIN

TEST_SEL#

Factory Test

1.8 V

SPI

SPI3_SOUT

TBSCAN_EN#

JTAG

1.8 V

0 V

Power

DGND

TDI

JTAG

1.8 V

Reset

PORESET#

TDO

JTAG

1.8 V

Reset

HRESET#

TCK

JTAG

1.8 V

Reset

RESET_REQ#

TMS

JTAG

1.8 V

0 V

Power

DGND

100

TRST#

JTAG

1.8 V

Ethernet

EC1_RX_DV

101

102

DGND

Power

0 V

1.8 V

Ethernet

EC1_RXD0

103

104

EC1_TXD0

Ethernet

1.8 V

Ethernet

EC1_RXD1

105

106

EC1_TXD1

Ethernet

1.8 V

Ethernet

EC1_RXD2

107

108

EC1_TXD2

Ethernet

1.8 V

Ethernet

EC1_RXD3

109

110

EC1_TXD3

Ethernet

1.8 V

Ethernet

EC1_RX_CLK

111

112

EC1_TX_EN

Ethernet

1.8 V

0 V

Power

DGND

113

114

DGND

Power

0 V

1.8 V

Ethernet

EC1_GTX_CLK

115

116

EMI1_MDC

Ethernet

1.8V (OVDD)

1.8 V

Ethernet

EC1_GTX_CLK125

117

118

EMI1_MDIO

Ethernet

1.8V (OVDD)

0 V

Power

DGND

119

120

DGND

Power

0 V

4.15.2 Pinout TQMLS1028A (continued)

Table 11: Pinout connector X2

Ball Level Group Signal Pin Signal Group Level Ball

3.3 V System SWD_IO 1 2 TEMP_ALERT# System 3.3 V (OC)

MECHANICS

AK1

AK2

AK3

AK4

5.1 Assembly

Illustration 11: TQMLS1028A assembly, top

Illustration 12: TQMLS1028A assembly, bottom

The labels on the TQMLS1028A show the following information:

Table 12: Labels on TQMLS1028A

Label Text

AK1 2D serial number

AK2 2D MAC address

AK2 TQMLS1028A version and revision

AK4 Tests performed

top view through TQMLS1028A

5.2 Dimensions

Illustration 13: TQMLS1028A dimensions, side view

Illustration 14: TQMLS1028A dimensions,

5.3 Images

Illustration 15: TQMLS1028A, 3D, top view

Illustration 16: TQMLS1028A, 3D, bottom view

A 3D model is available in SolidWorks, STEP and 3D PDF formats. Please contact Support@tq-group.com.

5.4 Connectors

The TQMLS1028A is connected to the carrier board with 240 pins on two connectors.

The following table shows details of the connector assembled on the TQMLS1028A.

Table 13: Connector assembled on TQMLS1028A

Manufacturer Part number Remark

• 0.8 mm pitch

TE connectivity 120-pin: 5177985-5

• Plating: Gold 0.2 µm

• –40 °C to +125 °C

The TQMLS1028A is held in the mating connectors with a retention force of approximately 24 N. To avoid damaging the TQMLS1028A connectors as well as the carrier board connectors while removing the TQMLS1028A

the use of the extraction tool MOZI8XX is strongly recommended. See chapter 5.9 for further information.

Attention: Component placement on the carrier board

2.5 mm should be kept free on the carrier board, on both long sides of the TQMLS1028A for the extraction tool MOZI8XX.

The following table shows some suitable mating connectors for the carrier board.

Table 14: Carrier board mating connectors

Manufacturer Pin count / part number Remark Stack height (X)

120-pin: 5177986-5 On MBLS1028A 5 mm

120-pin: 1-5177986-5 – 6 mm

TE connectivity

120-pin: 2-5177986-5 – 7 mm

120-pin: 3-5177986-5 – 8 mm

SOFTWARE

5.5 Adaptation to the environment

The TQMLS1028A overall dimensions (length × width) are 80 × 60 mm

. The CPU on the TQMLS1028A has a maximum height of approximately 8.6 mm above the MBLS1028A. The TQMLS1028A weighs approximately 33 grams.

5.6 Protection against external effects

As an embedded module, the TQMLS1028A is not protected against dust, external impact and contact (IP00). Adequate protection has to be guaranteed by the surrounding system.

5.7 Thermal management

To cool the TQMLS1028A, a theoretical maximum of approximately 18 W have to be dissipated. The power dissipation originates primarily in the CPU and the DDR4 SDRAM. The power dissipation also depends on the software used and can vary according to the application.

Attention: Destruction or malfunction

The TQMLS1028A belongs to a performance category in which a cooling system is essential in most applications. It is the user’s sole responsibility to define a suitable heat sink (weight and mounting position) depending on the specific mode of operation (e.g., dependence on clock frequency, stack height, airflow, and software). Particularly the tolerance chain (PCB thickness, board warpage, BGA balls, BGA package, thermal pad, heatsink) as well as the maximum pressure on the LS1028A must be taken into consideration when connecting the heat sink, see (2).

The LS1028A is not necessarily the highest component. Inadequate cooling connections can lead to overheating of the TQMLS1028A and thus malfunction, deterioration or destruction.

5.8 Structural requirements

The TQMLS1028A is held in the mating connectors by the retention force of the pins (240). If high requirements are set for vibration and shock resistance, additional fastening may be necessary.

5.9 Notes of treatment

To avoid damage caused by mechanical stress, the TQMLS1028A may only be extracted from the carrier board by using the extraction tool MOZI8XX that can also be obtained separately.

Attention: Component placement on the carrier board

2.5 mm should be kept free on the carrier board, on both long sides of the TQMLS1028A for the extraction tool MOZI8XX.

The TQMLS1028A is delivered with a preinstalled boot loader and a BSP, which is configured for the Starterkit MBLS1028A. The boot loader provides TQMLS1028A-specific as well as board-specific settings, e.g.:

• CPU configuration

• PMIC configuration

• DDR4 SDRAM configuration and timing

• eMMC configuration

• Multiplexing

• Clocks

• Pin configuration

• Driver strengths

More information can be found in the Support Wiki for the TQMLS1028A

SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS

7.1 EMC

The TQMLS1028A was developed according to the requirements of electromagnetic compatibility (EMC). Depending on the target system, anti-interference measures may still be necessary to guarantee the adherence to the limits for the overall system.

The following measures are recommended:

• Robust ground planes (adequate ground planes) on the printed circuit board.

• A sufficient number of blocking capacitors in all supply voltages.

• Fast or permanently clocked lines (e.g., clock) should be kept short;

avoid interference of other signals by distance and / or shielding besides, take note of not only the frequency, but also the signal rise times.

• Filtering of all signals, which can be connected externally (also "slow signals" and DC can radiate RF indirectly).

Since the TQMLS1028A is plugged on an application-specific carrier board, EMC or ESD tests only make sense for the whole device.

7.2 ESD

In order to avoid interspersion on the signal path from the input to the protection circuit in the system, the protection against electrostatic discharge should be arranged directly at the inputs of a system. As these measures always have to be implemented on the carrier board, no special preventive measures were planned on the TQMLS1028A.

The following measures are recommended for a carrier board:

• Generally applicable: Shielding of inputs (shielding connected well to ground / housing on both ends)

• Supply voltages: Protection by suppressor diode(s)

• Slow signals: RC filtering / Zener diode(s)

• Fast signals: Integrated protective devices (e.g., suppressor diode arrays)

7.3 Operational safety and personal security

Due to the occurring voltages (≤5 V DC), tests with respect to the operational and personal safety have not been carried out.

7.4 Climatic and operational conditions

The possible temperature range strongly depends on the installation situation (heat dissipation by heat conduction and convection); hence, no fixed value can be given for the whole assembly.

In general, a reliable operation is given when following conditions are met:

Table 15: Climate and operational conditions

Parameter Range Remark

Permitted Environment temperature –40 °C to +85 °C –

Permitted storage temperature –40 °C to +100 °C –

Relative humidity (operating / storage) 10 % to 90 % Not condensing

Detailed information concerning the CPUs’ thermal characteristics is to be taken from the NXP Reference Manuals (1).

7.5 Reliability and service life

The calculated theoretical MTBF of the TQMLS1028A is (TBD) h @ +40 °C environmental temperature, ground benign. The TQMLS1028A is designed to be insensitive to vibration and impact. High quality industrial grade connectors are assembled on the TQMLS1028A.

ENVIRONMENT PROTECTION

8.1 RoHS

The TQMLS1028A is manufactured RoHS compliant.

• All components and assemblies are RoHS compliant

• The soldering processes are RoHS compliant

8.2 WEEE

The final distributor is responsible for compliance with the WEEE

regulation.

Within the scope of the technical possibilities, the TQMLS1028A was designed to be recyclable and easy to repair.

8.3 REACH

The EU-chemical regulation 1907/2006 (REACH

regulation) stands for registration, evaluation, certification and restriction of substances SVHC (Substances of very high concern, e.g., carcinogen, mutagen and/or persistent, bio accumulative and toxic). Within the scope of this juridical liability, TQ-Systems GmbH meets the information duty within the supply chain with regard to the SVHC substances, insofar as suppliers inform TQ-Systems GmbH accordingly.

8.4 EuP

The Ecodesign Directive, also Energy using Products (EuP), is applicable to products for the end user with an annual quantity >200,000. The TQMLS1028A must therefore always be seen in conjunction with the complete device.

The available standby and sleep modes of the components on the TQMLS1028A enable compliance with EuP requirements for the TQMLS1028A.

8.5 Battery

No batteries are assembled on the TQMLS1028A.

8.6 Packaging

By environmentally friendly processes, production equipment and products, we contribute to the protection of our environment. To be able to reuse the TQMLS1028A, it is produced in such a way (a modular construction) that it can be easily repaired and disassembled. The energy consumption of this subassembly is minimised by suitable measures. The TQMLS1028A is delivered in reusable packaging.

8.7 Other entries

The energy consumption of this subassembly is minimised by suitable measures. Due to the fact that at the moment there is still no technical equivalent alternative for printed circuit boards with bromine-

containing flame protection (FR-4 material), such printed circuit boards are still used. No use of PCB containing capacitors and transformers (polychlorinated biphenyls). These points are an essential part of the following laws:

• The law to encourage the circular flow economy and assurance of environmentally acceptable removal of waste as at 27.9.94 (Source of information: BGBl I 1994, 2705)

• Regulation with respect to the utilization and proof of removal as at 1.9.96 (Source of information: BGBl I 1996, 1382, (1997, 2860))

• Regulation with respect to the avoidance and utilization of packaging waste as at 21.8.98 (Source of information: BGBl I 1998, 2379)

• Regulation with respect to the European Waste Directory as at 1.12.01 (Source of information: BGBl I 2001, 3379)

This information is to be seen as notes. Tests or certifications were not carried out in this respect.

APPENDIX

9.1 Acronyms and definitions

The following acronyms and abbreviations are used in this document:

Table 16: Acronyms

Acronym Meaning

ARM® Advanced RISC Machine

BGA Ball Grid Array

BIOS Basic Input/Output System

BSP Board Support Package

CPU Central Processing Unit

CRC Cyclic Redundancy Check

DC Direct Current

DDR Double Data Rate

DMA Direct Memory Access

DP Display Port

EC European Community

ECC Error Checking and Correction

EEPROM Electrically Erasable Programmable Read-only Memory

EMC Electromagnetic Compatibility

eMMC embedded Multi-Media Card

ESD Electrostatic Discharge

EuP Energy using Products

FR-4 Flame Retardant 4

GPU Graphics Processing Unit

I Input

I2C Inter-Integrated Circuit

IIC Inter-Integrated Circuit

IP00 Ingress Protection 00

JTAG® Joint Test Action Group

LED Light Emitting Diode

MAC Media Access Control

MOZI Module extractor (Modulzieher)

MTBF Mean operating Time Between Failures

NAND Not-And

NOR Not-Or

O Output

OC Open-Collector

9.1 Acronyms and definitions (continued)

Table 16: Acronyms (continued)

Acronym Meaning

PBL Pre-Boot Loader

PCB Printed Circuit Board

PCI Peripheral Component Interconnect

PCIe Peripheral Component Interconnect express

PCMCIA People Can't Memorize Computer Industry Acronyms

PD Pull-Down

PHY Physical (device)

PMIC Power Management Integrated Circuit

PU Pull-Up

PWP Permanent Write Protected

QSPI Quad Serial Peripheral Interface

RCW Reset Configuration Word

REACH® Registration, Evaluation, Authorisation (and restriction of) Chemicals

RoHS Restriction of (the use of certain) Hazardous Substances

RTC Real-Time Clock

RWP Reversible Write Protected

SD card Secure Digital Card

SDHC Secure Digital High Capacity

SDRAM Synchronous Dynamic Random Access Memory

SLC Single Level Cell (memory technology)

SoC System on Chip

SPI Serial Peripheral Interface

STEP Standard for the Exchange of Product (model data)

STR Single Transfer Rate

SVHC Substances of Very High Concern

TBD To Be Determined

TSN Time-Sensitive Networking

UART Universal Asynchronous Receiver / Transmitter

UM User's Manual

USB Universal Serial Bus

WEEE® Waste Electrical and Electronic Equipment

9.2 References

Table 17: Further applicable documents

No.: Name Rev., Date Company

(1) LS1028A / LS1018A Data Sheet Rev. C, 06/2018 NXP

(2) LS1027A / LS1017A Data Sheet Rev. C, 06/2018 NXP

(3) LS1028A Reference Manual Rev. B, 12/2018 NXP

(4) QORIQPMWP QorIQ Power Management Rev. 0, 12/2014 NXP

(5) Data Sheet SA56004X Rev. 7, 25 February 2013 NXP

(6) MBLS1028A User’s Manual – current – TQ-Systems

(7) TQMLS1028A Support-Wiki – current – TQ-Systems

TQ-Systems GmbH

Mühlstraße 2 l Gut Delling l 82229 Seefeld

Info@TQ-Group | TQ-Group

TQ-Systems TQMLS1028A Preliminary User's Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

ABOUT THIS MANUAL

1.1 Copyright and license expenses

1.2 Registered trademarks

1.3 Disclaimer

1.4 Imprint

1.5 Tips on safety

1.6 Symbols and typographic conventions

1.7 Handling and ESD tips

BRIEF DESCRIPTION

1.8 Naming of signals

1.9 Further applicable documents / presumed knowledge

OVERVIEW

3.1 Block diagram

3.2 System components

ELECTRONICS

4.1 LS1028A CPU

4.1.1 LS1028A variants, block diagrams

4.1.2 LS1028A variants, details

4.2 Reset Logic and Supervisor

4.2.1 Supervisor

4.2.2 Self-Reset

4.2.3 JTAG-Reset TRST#

4.3 CPU Configuration

4.3.1 RCW Source

4.3.2 Configuration signals

4.3.3 Reset Configuration Word

4.3.4 Settings via Pre-Boot-Loader PBL

4.3.5 Error handling during RCW loading.

4.4 System Controller

4.5 System Clock

4.6 Flash

4.6.1 QSPI NOR Flash

4.6.2 eMMC / SD card

4.7 SDRAM

4.8 EEPROM

4.8.1 Data EEPROM 24LC256T

4.8.2 Configuration EEPROM SE97B

4.9 RTC

4.10 Temperature monitoring

4.11 Supply

4.12 Power consumption

4.12.1 Power consumption CPU

4.12.2 Power consumption TQMLS1028A

4.13 Voltage monitoring

4.14 Interfaces to other systems and devices

4.14.1 UART

4.14.3 JTAG

4.15 TQMLS1028A interfaces

4.15.1 Pin multiplexing

4.15.2 Pinout TQMLS1028A

MECHANICS

5.1 Assembly

5.2 Dimensions

5.3 Images

5.4 Connectors

SOFTWARE

5.5 Adaptation to the environment

5.6 Protection against external effects

5.7 Thermal management

5.8 Structural requirements

5.9 Notes of treatment

SAFETY REQUIREMENTS AND PROTECTIVE REGULATIONS

7.1 EMC

7.2 ESD

7.3 Operational safety and personal security

7.4 Climatic and operational conditions

7.5 Reliability and service life

ENVIRONMENT PROTECTION

8.1 RoHS

8.4 EuP

8.5 Battery

8.6 Packaging

8.7 Other entries

APPENDIX

9.1 Acronyms and definitions

9.2 References