ABOUT THIS MANUAL ................................................................................................................................................................................ 1
1.
1.1 Copyright and licence expenses ............................................................................................................................................................. 1
3. TECHNICAL DATA ........................................................................................................................................................................................ 4
3.1 System architecture and functionality .................................................................................................................................................. 4
4.1 System components ................................................................................................................................................................................... 6
4.1.2 Power supply ................................................................................................................................................................................................ 6
4.1.4 Voltage regulators ...................................................................................................................................................................................... 8
4.2 Communication interfaces ....................................................................................................................................................................... 9
4.2.8 Mini PCIe ..................................................................................................................................................................................................... 15
4.2.10 SATA ............................................................................................................................................................................................................. 17
4.2.13 USB ................................................................................................................................................................................................................ 19
4.5 Diagnostic and user interfaces ............................................................................................................................................................. 23
4.5.8 Temperature sensor ................................................................................................................................................................................ 30
7.3 Operational safety and personal security ......................................................................................................................................... 33
8. CLIMATIC AND OPERATIONAL CONDITIONS ................................................................................................................................... 33
8.1 Protection against external effects ..................................................................................................................................................... 33
8.2 Reliability and service life....................................................................................................................................................................... 33
9.6.1 General notes ............................................................................................................................................................................................ 34
9.7 Other entries .............................................................................................................................................................................................. 34
10.1 Acronyms and definitions...................................................................................................................................................................... 35
Terms and Conventions ..................................................................................................................................................................... 2
Table 3: Overview Diagnostic and User Interfaces .................................................................................................................................... 5
Table 5: Electrical parameters of voltage regulators ................................................................................................................................. 8
Table 6: Electrical parameters of PCIe and WLAN voltages..................................................................................................................... 8
Table 7: DIP switch setting for UART source ................................................................................................................................................ 9
Table 8: Pinout RJ-45 connector X23 for “Link“ ....................................................................................................................................... 10
Table 11: Ethernet Switch, Port-Link Status information ........................................................................................................................ 11
Table 16: Pinout Mini PCIe X4 .......................................................................................................................................................................... 16
Table 17: Maximum permitted currents Mini PCIe X4 ............................................................................................................................. 16
Table 20: SATA transfer rates ........................................................................................................................................................................... 17
Table 22: Unused CPU USB pins ...................................................................................................................................................................... 19
Table 25: Maximum permitted current consumption WLAN ................................................................................................................ 20
Table 29: Electrical characteristics of 1.8 V GPIOs ...................................................................................................................................... 24
Table 31: Function of Port Expanders ........................................................................................................................................................... 25
Table 33: X22, type of header .......................................................................................................................................................................... 27
Table 34: Status LEDs ......................................................................................................................................................................................... 28
Illustration 6: Position of eMMC ................................................................................................................................................................................. 9
Illustration 7: Block diagram Ethernet Link ......................................................................................................................................................... 10
Illustration 8: Position of Gigabit Ethernet X23 (Link) ...................................................................................................................................... 10
Illustration 9: Position of Gigabit Ethernet X12, X13 (Switch) ....................................................................................................................... 11
Illustration 10: Block diagram I2C bus ...................................................................................................................................................................... 12
Illustration 12: Position of JTAG header X18 ......................................................................................................................................................... 14
Illustration 13: Block diagram Mini PCIe ................................................................................................................................................................. 15
Illustration 14: Position of Mini PCIe socket X4 .................................................................................................................................................... 16
Illustration 15: Position of backup battery X7 ....................................................................................................................................................... 17
Illustration 16: Position of SATA (M.2) connector X10 ........................................................................................................................................ 17
Illustration 18: Position of microSD card socket X9 ............................................................................................................................................ 18
Illustration 19: Block diagram USB 3.0 ..................................................................................................................................................................... 19
Illustration 20: Position of USB 3.0 stacked socket X6 ........................................................................................................................................ 19
Illustration 21: Position of WLAN X3 ........................................................................................................................................................................ 20
Illustration 23: Position of Reset LED ....................................................................................................................................................................... 22
Illustration 24: Position of DIP switch S1 ................................................................................................................................................................ 23
Illustration 25: Position of Port-Expander .............................................................................................................................................................. 25
Illustration 26: Position of header X22 .................................................................................................................................................................... 27
Illustration 27: Position of Status-LEDs ................................................................................................................................................................... 28
Illustration 29: Position of push buttons ................................................................................................................................................................ 29
Illustration 30: Position of temperature sensor LM75A ..................................................................................................................................... 30
electronic, machine readable, or in any other form without the written consent of TQ-Systems GmbH.
The drivers and utilities for the components used as well as the BIOS are subject to the copyrights of the respective
manufacturers. The licence conditions of the respective manufacturer are to be adhered to.
Bootloader-licence expenses are paid by TQ-Systems GmbH and are included in the price.
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or license-free graphics and texts.
All brand names and trademarks mentioned in this Preliminary User's Manual, including those protected by a third party, unless
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present registered proprietor without any limitation. One should conclude that brand and trademarks are rightly protected by a
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TQ-Systems GmbH does not guarantee that the information in this Preliminary User's Manual is up-to-date, correct, complete or
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is no proven intentional or negligent fault of TQ-Systems GmbH.
TQ-Systems GmbH explicitly reserves the rights to change or add to the contents of this Preliminary User's Manual or parts of it
without special notification.
Before using the Starterkit MBLS1012AL or parts of the MBLS1012AL schematics, you must evaluate it and determine if it is
suitable for your intended application. You assume all risks and liability associated with such use. TQ-Systems GmbH makes no
other warranties including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. Except
where prohibited by law, TQ-Systems GmbH will not be liable for any indirect, special, incidental or consequential loss or damage
arising from the usage of the Starterkit MBLS1012AL or schematics used, regardless of the legal theory asserted.
Improper or incorrect handling of the product can substantially reduce its life span.
Table 1: Terms and Conventions
Symbol Meaning
This symbol represents the handling of electrostatic-sensitive modules and / or components. These
components are often damaged / destroyed by the transmission of a voltage higher than about 50 V.
A human body usually only experiences electrostatic discharges above approximately 3,000 V.
This symbol indicates the possible use of voltages higher than 24 V.
Please note the relevant statutory regulations in this regard.
Non-compliance with these regulations can lead to serious damage to your health and also cause
damage / destruction of the component.
This symbol indicates a possible source of danger. Acting against the procedure described can lead to
possible damage to your health and / or cause damage / destruction of the material used.
This symbol represents important details or aspects for working with TQ-products.
A font with fixed-width is used to denote commands, file names, or menu items.
General handling of your TQ-products
The TQ-product may only be used and serviced by certified personnel who have taken note of the
information, the safety regulations in this document and all related rules and regulations.
A general rule is: do not touch the TQ-product during operation. This is especially important when
switching on, changing jumper settings or connecting other devices without ensuring beforehand
that the power supply of the system has been switched off.
Violation of this guideline may result in damage / destruction of the MBLS1012AL and be dangerous
to your health.
Improper handling of your TQ-product would render the guarantee invalid.
Proper ESD handling
The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD).
Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-
product in an ESD-safe environment. Especially when you switch modules on, change jumper settings,
or connect other devices.
A hash mark (#) at the end of the signal name indicates a low-active signal.
Example: RESET#
If a signal can switch between two functions and if this is noted in the name of the signal, the low-active function is marked with
a hash mark and shown at the end.
Example: C / D#
If a signal has multiple functions, the individual functions are separated by slashes when they are important for the wiring.
The identification of the individual functions follows the above conventions.
Example: WE2# / OE#
•
These documents describe the service, functionality and special characteristics of the module used (incl. BIOS).
•
The manufacturer's specifications of the components used, for example CompactFlash cards, are to be taken note of.
They contain, if applicable, additional information that must be taken note of for safe and reliable operation.
These documents are stored at TQ-Systems GmbH.
•
It is the user's responsibility to make sure all errata published by the manufacturer of each component are taken note of.
The manufacturer’s advice should be followed.
•
No warranty can be given, nor responsibility taken for any unexpected software behaviour due to deficient components.
•
Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.
The following documents are required to fully comprehend the following contents:
This User's Manual describes the hardware of the MBLS1012AL from revision 0200.
The MBLS1012AL is designed as a carrier board for the TQMLS1012AL.
All TQMLS1012AL interfaces, which can be used, are available on the MBLS1012AL. Thus the features of the NXP CPU LS1012A
can be evaluated and software development for a TQMLS1012AL-based project can be started directly.
The MBLS1012AL supports all LS1012A-based TQ-Modules with the NXP CPUs i.MX6UL (G1, G2, G3) and i.MX6ULL (Y0, Y1, Y2).
Core of the system is the soldered processor module TQMLS1012AL with an ARM Cortex A53 based NXP Layerscape series CPU
LS1012A. In addition to the standard communication interfaces such as USB, Ethernet, etc., more TQMLS1012AL signals are
routed to a 100 mil pin header on the MBLS1012AL.
The MBLS1012AL provides the following interfaces and functions:
The TQ-Minimodule TQMLS1012AL with its LS1012A CPU is the central system component. It provides DDR3L SDRAM, eMMC,
NOR flash and EEPROM memory. All voltages required by the TQMLS1012AL are derived from the supply voltage of 3.3 V.
The available signals are routed to two connectors on the MBLS1012AL. More detailed information is to be taken from the
TQMLS1012AL User’s Manual. The boot behaviour of the TQMLS1012AL can be customised.
The required boot-mode configuration can be set with DIP switches, see section 4.4.
4.1.1 TQMLS1012AL
The TQ-Minimodule TQMLS1012AL with the LS1012A CPU is the central system component. It provides DDR3L SDRAM, NOR
flash and an EEPROM. All TQMLS1012AL internal voltages are derived from the 3.3 V supply voltage. Further information can be
found in the TQMLS1012AL User's Manual. The boot behaviour of the TQMLS1012AL can be modified. The configuration is
defined by DIP switches on the MBLS1012AL, see chapter 4.4. The available signals of the TQMLS1012AL are routed to the
MBLS1012AL. The signal assignment can be found in the TQMLS1012AL User's Manual.
Illustration 2: Block diagram TQMLS1012AL
4.1.2 Power supply
The MBLS1012AL has to be supplied with 16 V to 28 V at X21. The typical supply voltage is 24 V.
The MBLS1012AL has a maximum power consumption of approx. 51 W at the 24 V supply. This corresponds to a typical
maximum current consumption of 2.1 A. The power supply used must be dimensioned accordingly. In most applications,
however, the power consumption will be significantly lower. The largest part of the possible power consumption results from
the standard-compliant supply of the USB, PCIe and SATA (M.2) interfaces, as well as from the power available at the pin header.
3.3 V (1.5 A), 5 V (0.75 A) and 24 V (maximum current not defined) are available on pin header X22. The current drawn must be
added to the input current. It has to be ensured that the permissible limit values of the input circuit are not exceeded.
The input supply of the MBLS1012AL supplies the 3.3 V / 5 V regulators.
The protection circuit (see Illustration 3) features the following characteristics:
• Overcurrent protection by fuse 4 A, slow blow
• Overvoltage protection diode
• PI filter
• Reverse polarity protection by MOSFET
• Capacitors for voltage smoothing
Illustration 3: Block diagram protective circuit
The protective circuit has the following electrical characteristics:
Table 4: Parameter protective circuit
Parameter Min. Typ. Max. Unit
Overcurrent limitation by fuse (slow blow) – 4 – A
A circuit for a DAPLink/OpenSDA programmer is prepared on the MBLS1012AL. Currently this circuit is not supported.
4.2.2 Debug UART
Illustration 5: Block diagram Debug UART1
A debug interface is available via UART1. This UART is provided as a virtual COM port via USB. Parallel to this, the UART can also
be accessed at a 6-pin pin header.
2
UART1 is optionally available on the DAPLink / OpenSDA interface
(see 4.2.1).
The input signal for the TQMLS1012AL can be switched between OpenSDA and USB/pin header with a DIP switch. The output
level is adapted to 3.3 V using a level converter.
Table 7: DIP switch setting for UART source
DIP switch OFF ON
S1, Slot 3 Debug-UART on OpenSDA Debug-UART on USB / header
4.2.3 eMMC
An eMMC can be used instead of the SD card. The use of an eMMC is currently not supported.
Illustration 6: Position of eMMC
2: The DAPLink / O penSDA interface is currently not supported.
When using the MBLS1012AL e.g. as router or switch, the single port can be used as LINK interface e.g. to a modem.
The single Ethernet port is provided via the PHY DP83867 at the SGMII interface (SerDes-Lane A).
The PHY has boot straps to start with configurable default values. Some boot straps can be customized with assembly options.
Further information is available in the latest circuit diagram of the MBLS1012AL.
The following table shows the pin assignment of the Ethernet connector.
9 TD4– TD_M_D –
10 GND GND –
11 GREEN_ANODE V_2V5 82 Ω in series
13 YELLOW_ANODE V_2V5 82 Ω in series
14 YELLOW_KATODE LED_2 (DP83867) Switched with transistor
The possible data throughput is influenced by the system load and the software platform used.
With the MBLS1012AL and the standard BSP, the following transfer rates can be achieved.
Up to four Ethernet interfaces (1000Base-T) are available via Microchip's KSZ9897 gigabit switch. Connection is via RGMII.
The switch is managed via I
2
C. In contrast to MIIM (EMI), this enables full control of the device. The connection of the EMI1 bus is
possible via assembly option. The switch has boot straps to start with configurable default values. Some boot straps can be
configured with assembly options. Further information is available in the latest circuit diagram of the MBLS1012AL.
The following table shows the pin assignment of the Ethernet connectors:
Table 10: Pinout RJ-45 connector X12, X13 for “Switch“
Table 11: Ethernet Switch, Port-Link Status information
LED1 LED2 Status
The possible data throughput is influenced by the system load and the software platform used.
With the MBLS1012AL and the standard BSP, the following transfer rates can be achieved.
Table 12: Characteristics Gigabit Ethernet (Link)
Parameter Min. Typ. Max. Unit
Illustration 9: Position of Gigabit Ethernet X12, X13 (Switch)
The JTAG signals of the TQMLS1012AL are available on a standard ARM 10-pin JTAG connector. The JTAG interface of the
microcontroller for the OpenSDA interface is also equipped with a 10-pin JTAG connector with standard ARM assignment.
For the OpenSDA circuit see section 4.2.1.
A Lauterbach debugger can be used to program the TQMLS1012AL. NXP recommends the "Code Warrior Development Studio
for QorIQ LS series" and the "CodeWarrior TAP" programmer for development and programming of the LS1012A processor.
The following table shows possible adapters.
Table 14: JTAG adapters
Debugger Details
Lauterbach JTAG-ARMV8-A/R, LA-3743
Lauterbach CONV-ARM20/MIPI34, LA-3770
NXP, CWH-CTP-BASE-HE, 935328292598
NXP, CWH-CTP-CTX10-YE, 935327448598
− TRACE32 Debugger for LS1012A
− Debugger for Cortex-A/R (ARMv8 32/64-bit)
− ARM Converter ARM-20 to MIPI-10/20/34
− Converter to connect a Debug Cable to 10/20/34 pin connectors specified by MIPI
− Converts to CombiProbe connector
− CodeWarrior TAP
− Code Warrior TAP removable probe tip for LS1 &L S2 Processors
The JTAG test reset pin (TP18, JTAG_TRST#) must be grounded simultaneously with PORESET# during normal operation. This is
achieved by using a 0 Ω bridge on the MBLS1012AL. If a boundary-scan is to be performed, this bridge must be removed and
both signals must be controlled accordingly. The JTAG interface is not ESD protected.
The following table shows the pin assignment of the JTAG connector.
The processor provides a PCIe Gen2 interface with one lane (x1) via the SerDes interface. In standard muxing, this Lane occupies
Lane B of the SerDes interface. It is compatible to the PCI Express Base Specification, Revision 3.0 and supports transfer rates of
2.5 GT/s as well as 5 GT/s.
2
In addition to the PCIe-Lane, a USB host (from the USB hub) and an I
C interface are connected to the Mini PCIe interface. The
power supply is implemented with 3.3 V and 1.5 V and must be activated separately on the port expander via VCC_PCIE_EN_1V5
and VCC_PCIE_EN_3V3.
2
When using the I
C functionality, check in advance whether the I2C address used by the plug-in card is not yet being used by a
peripheral on the MBLS1012AL. See also Table 13.
The reference clock is provided by a special PCIe clock generator 9FGV0241. The clock generator can optionally be connected to
2
C bus with 0 Ω resistors. Individual outputs can be switched off and the slew rate and amplitude can be changed via the I2C
the I
bus. The I2C address can be taken from Table 13.
The control lines PCIE_WAKE# and PCIE_DIS# can be switched via the port expander.
There is only one LED, which can be connected to one of the pins 42, 44 or 46 via the pre-resistor. By default LED_WWAN# is
assembled.
The layout has been designed to allow both full-size and half-size Mini PCI Express cards to be used. The full-size form factor is
available as standard.
2
The interface is wired with all signals provided by the standard (e.g. USB, I
3
Any standard compliant Mini PCIe card can be used
.
C, and PCIe).
A micro SIM card holder is also provided for the use of a GSM card. SIM cards that require 5 V supply/signal level are not
supported.
The voltages provided for the Mini PCIe card must not exceed the currents specified in Table 17.
For mass storage, a connection for an SSD in M.2 form factor is provided. The processor provides a SATA 3.0 AHCI interface via
the SerDes interface. Transfer rates of 1.5 Gb/s (Gen I), 3 Gb/s (Gen II) and 6Gb/s (Gen III) are possible. The M.2 standard defines
different codings for the connector; an M.2 slot with B coding is used on the motherboard. M.2 modules are available in different
form factors. The MBLS1012AL supports the common form factors 2242, 2260 and 2280 for SSDs. The mounting for the 2280
form factor is installed as standard. The SATA interface (SerDes-Lane D) of the LS1012A and a 3.3 V power supply are connected.
As required by the M.2 specification, the power budget of the MBLS1012AL is 2.5 A for a SATA SSD. The Device Activity Signal
(DAS/DSS#; Pin10 on X10) and the Device Sleep Signal (SATA_DEVSLP#; Pin 38 on X10) from the M.2 specification are
implemented. SATA_DEVSLP# is connected to pin 27 on pin header X22 and must be wired accordingly if functionality is
required. DAS/DSS# is directly connected to LED V17.
Table 20: SATA transfer rates
Value Min. Typ. Max. Unit
Net transmission rate, SATA Rev 1 – TBD 1.2 Gbit/s
Net transmission rate, SATA Rev 2 – TBD 2.4 Gbit/s
Net transmission rate, SATA Rev 3 – TBD 4.8 Gbit/s
Illustration 16: Position of SATA (M.2) connector X10
A microSD card is used as non-volatile program memory. Alternatively, an eMMC memory can be used instead.
In the reset phase, the CPU requires a high signal (1.8 V) at signal SDHC1_CD#. For this reason, the signal is separated by a tristate
buffer during reset (see also (3), Table 5 and Figure 15). The pull-up is located on the TQMLS1012AL. All data lines provide ESD
protection.
Standard, high and extended capacity Card types are supported. For the transfer rates, the SD UHS-1 speed mode SDR104 with
theoretical max. 104 MB/s is supported in addition to Default Speed and High Speed Mode. The support of the UHS-1 speed
modes SDR12, SDR25, SDR50 and DDR50 is theoretically given but not verified.
The signals of the SDHC1 interface on the TQMLS1012AL are supplied via a separate PMIC controller, whose voltage value can be
set by the CPU to a 1.8 V or 3.3 V level (depending on the transmission mode). The conversion is usually done by the
corresponding driver and does not have to be done explicitly.
The signal SDHC1_WP is not used and is terminated accordingly.
Table 21: Pinout microSD card X9
Pin Pin name Target pin / Net Remark
1 DAT2 SDHC1_DAT2 (TP43) 34 kΩ Pull-Up
2 DAT3 SDHC1_DAT3 (TP44) 34 kΩ Pull-Up
3 CMD SDHC1_CMD (TP40) 34 kΩ Pull-Up
4 VDD V_3V3 –
5 CLK SDHC1_CLK (TP39) –
6 GND GND –
7 DAT0 SDHC1_DAT0 (TP41) 34 kΩ Pull-Up
8 DAT1 SDHC1_DAT1 (TP42) 34 kΩ Pull-Up
M1…4 SHIELD GND –
Illustration 18: Position of microSD card socket X9
4.2.12 SPI
The SPI interface is available at X18 if the Reset Configuration Word (RCW) of the TQMLS1012AL is set accordingly.
The TI USB 3.0 hub TUSB8041 is used for the USB 3.0 OTG port of the TQMLS1012A to provide various USB hosts. The OTG port is
configured as host. The output ports are USB 3.0 ports, but can also be used as USB 2.0 ports.
Of the four available ports, two are USB 3.0 ports and are connected to the stacked connector (X6). The remaining two ports are
connected as USB 2.0 to the two Mini PCIe slots. 0 Ω bridges for the I
hub registers. The I
2
C address can be taken from Table 13.
2
C interface are provided for optional access to the internal
A power distribution switch provides the 5 V supply for the USB connectors. The components used have current monitoring and
can switch off the bus voltage in the event of overload and/or overheating.
Table 22 shows the wiring of the unused USB pins of the CPU.
Table 22: Unused CPU USB pins
Pin Name Target pin / Net Remark
TP62 USB_VBUS VCC5V5 0 Ω series resistor
TP54 USB1_PWRFAULT GND 1 kΩ Pull-Down
The USB host port of the TQMLS1012AL provides a theoretical data rate of 5 Gbit/s (gross). This is divided among the connected
ports. Depending on the software and hardware used, the effective read and write rates of the ports may vary.
Table 23: Characteristics USB-Host
Parameter Min. Typ. Max. Unit Remark
Voltage 4.75 5 5.25 V Preliminary values, not qualified
Current 0.89 1.02 1.143 A Per channel. Preliminary values, not qualified
Drop during load jump – TBD – mV Switching on a 900 mA load
Read rate – TBD 4,000 Mbit/s USB-HDD at Port 2; 2 GB file; 10 MB block size
Write rate – TBD 4,000 Mbit/s USB-HDD at Port 2; 2 GB file; 10 MB block size
Illustration 20: Position of USB 3.0 stacked socket X6
C are provided for access to WLAN networks via an additional Mini PCIe slot (full-size). Half-size and full-size
cards are supported. Half-size cards can be mounted using solder nuts and corresponding screws/sleeves, whereby the space for
full-size cards is not blocked. Alternatively, half-size cards can be enlarged to full-size using adapters. The power supply is
implemented with 3.3 V and 1.5 V and must be activated separately on the port expander via VCC_WLAN_EN_1V5 and
VCC_WLAN_EN_3V3. The voltages provided for the WLAN card may be loaded with the maximum currents specified in Table 25.
The Mini PCIe slot has no connection to the PCIe bus of the TQMLS1012A. Communication with the host must be carried out via
2
USB or I
C. When using the I2C functionality, check in advance whether the I2C address used by the plug-in card is not yet used by
a peripheral on the MBLS1012AL or on the PCIe slot. See also Table 13. The wiring of pins 42, 44 and 46 is the same as for the Mini
PCIe interface. LED_WLAN_WL# is wired by default.
Table 24: Pinout WLAN module /Mini PCIe (USB) X3
Target pin / Net Pin name Pin Pin name Target pin / Net
Table 25: Maximum permitted current consumption WLAN
The RESET# signal of the TQMLS1012AL is available via signals RESET_1V8# and RESET_3V3# on the MBLS1012AL. Signal
RESET_3V3# on the MBLS1012AL is generated from RESET_1V8#.
Attention: Signal RESET_3V3#
Signal RESET_3V3# is designed as reset triggering signal. The RESET_1V8# signal must be used to
send a reset signal to the system.
The global reset is also used by the voltage monitoring. The Supervisor TPS3808G01DBV is used for this purpose. It monitors the
5 V input voltage and includes the manual reset button. The undervoltage threshold is set to 4.455 V, the delay until the reset
signal is enabled again is set to 300 ms. On the MBLS1012AL a red LED indicates a reset, see Table 34.
In addition to the signals described above, the MBLS1012AL offers further options for a complete or partial reset of the
TQMLS1012AL. All important interfaces are connected to the reset signal via AND gates in such a way that, in addition to the
global reset, they can be reset individually via a GPIO signal of the IO expander. In addition, the power supplies of the WLAN and
PCIe cards can be switched separately. The following table shows the used signals.
Table 26: Reset signals
Signal Source Default Remark
Activated by the TQMLS1012AL during power sequencing.
RESET_1V8# TQMLS1012AL High
Is activated by means of a delay buffer approx. 140 to 460 ms
after switching on the TQMLS1012AL supply.
RESET_3V3# MBLS1012AL High Is generated on the MBLS1012AL from signal RESET_1V8#.
PCIE_RST# I/O-Expander Low –
WLAN_RST# I/O-Expander Low –
VCC_WLAN_EN_1V5 I/O-Expander Low Switches the 1.5 V power supply of the WLAN card.
VCC_WLAN_EN_3V3 I/O-Expander Low Switches the 3.3 V power supply of the WLAN card.
VCC_PCIE_EN_1V5 I/O-Expander Low Switches the 1.5 V power supply of the PCIe card
VCC_PCIE_EN_3V3 I/O-Expander Low Switches the 1.5 V power supply of the PCIe card
The RESET_REQ# signal enables the CPU to trigger a reset itself via software or in the event of an error (watchdog, security
violation, etc.).
The signals RESET_REQ# and RESET_1V8# are connected via DIP switch S1, slot 2. This enables to separate the connection
between the two signals. Thus an endless boot loop can be prevented in case of a missing RCW. This is necessary to install a new
RCW. See also section 4.4.
A diode is connected between RESET_REQ# and DIP switch. This prevents RCW_SRC from being pulled low during the reset
phase, thus loading the hard-coded RCW (see section 4.4).
Illustration 23: Position of Reset LED
The boot behaviour of the LS1012A is determined by a 512-bit Reset Configuration Word (RCW). This is loaded during normal
operation from the connected QSPI flash memory on the TQMLS1012AL. The processor only supports this one boot source.
In case the RCW on the QSPI flash is missing or damaged, a fallback mode exists to store a suitable boot configuration in the
memory. For this purpose a fixed standard configuration of the RCW (Hard-Coded RCW) is loaded, which provides the minimum
necessary values for the CPU to operate. This is activated via a boot strap resistor at RESET_REQ#.
By connecting the RESET_REQ# / RCW_SRC signal to DIP switch (S1) (see also section 4.5.1), the value assigned to cfg_rcw_src
determines one of the two possible RCW sources. The value is read in during Power-On-Reset and can be read out in CPU register
PORSR1[RCW_SRC]. For this purpose there is a pull-down resistor at the RESET_REQ# signal to select the Hard-Coded RCW during
the boot process (see following table).
Table 27: Boot-Mode-Select values for cfg_rcw_src
cfg_rcw_src value Selection on MBLS1012AL RCW source
0 Slot 1 at DIP switch (S1) to ON Hard-coded in CPU
1 (Default) Slot 1 at DIP switch (S1) to OFF QuadSPI (QSPI)
Attention: Missing RCW in QSPI flash
If no RCW is detected in the QSPI flash, the CPU automatically triggers a reset. See section 4.3.
A 4-fold DIP switch is used to set boot configurations and select hardware settings.
The functions of the individual switches are described in the following table:
Table 28: DIP switch S1, functions
Slot ON OFF Remark
1 Hard-Coded RCW switched on Hard-Coded RCW switched off In case the RCW cannot be read in the flash.
2 RESET_REQ# und RESET# connected RESET_REQ# und RESET# separated To prevent a boot loop in case of a boot error.
3 Debug—UART on USB/header Debug-UART on OpenSDA TX is not switched and can be received at both ends.
4 JTAG der CPU switched off JTAG der CPU switched on –
GPIO pins from different sources are available on the MBLS1012AL.
The TQMLS1012AL provides six GPIO signals on the configuration selected for the MBLS1012AL. All GPIO signals configured as
input are interrupt capable.
Table 29: Electrical characteristics of 1.8 V GPIOs
Switchable load high –0.5 – – mA See (1), table 33
Switchable load Low 0.5 – – mA See (1), table 33
Attention: GPIO1_29
GPIO1_29 can only be configured as an output.
This pin must not be pulled low during the reset cycle!
See also (1), table 1 (GPIO1_29) note 5, and (2), chapter 20.1.
Two GPIO port expanders are used (see also section 4.5.3), of which three pins are available on the header.
GPIO pins which are implemented via a port expander are usually not suitable for time-critical I/O operations due to their indirect
connection to the CPU. In addition, it should be noted that these pins are only available with a delay at boot time, since the I2C
driver must first be loaded for the configuration.
The nominal signal level of the GPIO signals GPIO_3V3_[3:1] is 3.3 V. The GPIO signals GPIO_3V3_[3:1] have a nominal signal level
of 3.3 V. However, the pins are 5 Volt tolerant and can be operated with an external signal level up to a maximum of 5.5 V. The
GPIO signals can be used with a maximum of 5.5 V.
At the pins GPIO_3V3_[3:1], a current of max. 25 mA can be switched). For more detailed information, refer to the data sheet of
the port expander.
Table 30: GPIO assignment
Pin on header (X22) Target pin / Net Location Signal level Remark
25 GPIO1_29 X22 1.8 V See above attention note
23 GPIO1_28 X22 1.8 V –
– GPIO1_27 – 1.8 V Interrupt input, 8-Pin GPIO-Expander
21 GPIO1_26 X22 1.8 V –
19 GPIO1_25 X22 1.8 V –
– GPIO1_24 – 1.8 V Interrupt input, 16-Pin GPIO-Expander
Due to the low number of native GPIOs provided by the LS1012AL CPU, two GPIO expanders with 16 and 8 IOs are available
on the MBLS1012AL. The respective interrupt pin of the GPIO expander is connected to a GPIO pin of the LS1012AL CPU:
C. The address of the port expanders can be changed by resistor assembly. When
changing the address, care must be taken to avoid address conflicts with existing I2C devices. The assembly options are
documented in the circuit diagram.
In the initial state, after power-up, all ports are set as input and the connected component is thus deactivated.
For the properties of the externally available GPIOs see section 4.5.2.
The following table shows the functions of the pins of the port expander.
Table 31: Function of Port Expanders
Port Signal Typ. Default Remark
16-Pin Expander, NXP, PCA9555PW
IO0_0 WLAN_DISABLE# O High Pin 20 at X3 (WLAN)
IO0_1 VCC_PCIE_EN_3V3 O Low Enable-Signal for 3.3 V voltage PCIe
IO0_3 VCC_WLAN_EN_3V3 O Low Enable-Signal for 3.3 V voltage WLAN
IO0_4 IOXP_PCIE_RST# O Low Selective Reset PCIe
IO0_5 IOXP_WLAN_RST# O Low Selective Reset WLAN
IO0_6 IOXP_USB_RST# O Low Selective Reset USB
IO0_7 IOXP_ETH_SW_RST# O Low Selective Reset Ethernet Switch
IO1_0 IOXP_ETH_LNK_RST# O Low Selective Reset Ethernet Link
IO1_1 GPIO_3V3_1 I/O – GPIO on header (Pin 24, X22)
IO1_2 GPIO_3V3_2 I/O – GPIO on header (Pin 26, X22)
IO1_4 PCIE_WAKE# I High Pin 1 at X4 (Mini PCIe)
IO1_5 – I High Input for push button S2 on front panel
IO1_6 – O High LED V15 green with light guide at front panel
IO1_7 – O High LED V16 green
8-Pin Expander, NXP, PCA9538ABS
IO_0 PCIE_CLK_PD# O High Disable for PCIe Clock
IO_1 PMIC_INT# I High Input for PMIC Interrupt. Also on X22
IO_2 ETH_SW_INT# I High Input for Ethernet Switch Interrupt
IO_4 – I High Input for push button X15
IO_5 – I High Input for push button X16
IO_6 VCC_WLAN_EN_1V5 O Low Enable-Signal for 1.5 V voltage WLAN
IO_7 VCC_PCIE_EN_1V5 O Low Enable-Signal for 1.5 V voltage PCIe
The MBLS1012AL provides a 34-pin header. On this header all unused signals and those which should be easy to reach are made
available. In addition to the signals, 24 V, 5 V, 3.3 V and 1.8 V are available on the header.
The current drawn from V_24V (pin 2) is added to the current consumption of the rest of the
Attention: Power drawn from V_24V, and V_1V8_PMIC_OUT
TQMLS1012AL. The user must provide any additional power required at the voltage input of the
TQMLS1012AL and observe the load capacity of the fuse.
The power taken from V_1V8_PMIC_OUT (pin 8) is added to the power consumption at V_3V3_IN
(balls G14, H4, J14) of the TQMLS1012AL.
If power is taken from V_1V8_PMIC_OUT and there are doubts about the existing utilization of the
V_3V3 power budget, the external current consumption at V_3V3 (e.g. at pins 2 and 11 of header
X22) must be restricted accordingly.
V_1V8_PMIC_OUT supplies critical components on the TQMLS1012AL. If this voltage is used
to supply external components, make sure that the function of the TQMLS1012AL is not impaired.
This can be achieved by filtering V_1V8_PMIC_OUT on the carrier board using a suitable circuit.
Illustration 26: Position of header X22
Table 33: X22, type of header
Manufacturer / part number Description
Fischer Elektronik / SL 22 124 60 G Header, 100 mil pitch, 2 × 17 pins
The MBLS1012AL provides 13 diagnosis- and Status LEDs (plus the LEDs at the Ethernet ports) to indicate the system condition.
The following table shows the function of all LEDs.
Table 34: Status LEDs
Interface LED Colour Function
Mini PCIe V28 green Mini PCIe WWAN, can be changed to WLAN or WPAN by re-assembling.
WLAN V18 green Mini PCIe WLAN, can be changed to WWAN or WPAN by re-assembling.
GPIO V15 green LED on 16 Port-Expander Port IO1_0 (lit when pin is “low”). Per light guide on front panel
– V16 green LED on Port-Expander Port IO1_1 (lit when pin is “low”)
Power V27 green Status 24 V (lights up when supply 24 V active)
– V26 green Status 5 V (lights up when supply 5 V active)
– V25 green Status 3.3 V (lights up when supply 3.3 V active)
– V22 green Status 2.5 V (lights up when supply 2.5 V active)
– V24 green Status 3.3 V Mini PCIe (lights up when supply 3.3 V for Mini PCIe active)
– V23 green Status 3.3 V WLAN (lights up when power supply 3.3 V for Mini PCIe active)
OpenSDA V21 green Indicator LED for OpenSDA Interface
Reset V38 red Reset LED (lights up when TQMLS1012AL in reset). Via light guide on front panel
For development purposes, the MBLS1012AL has three push buttons connected to the port expanders. By using the interrupt
signals at GPIO1_24 and GPIO1_27 interrupts can be triggered with the push buttons. The signal lines between the push button
and the port expander are equipped with 10 kΩ pull-up resistors.
Illustration 28: Block diagram push buttons
4.5.7 Reset Push button
For information on reset and reset button, see section 4.3.
The MBLS1012AL provides a temperature sensor LM75A, which monitors the environmental temperature.
Illustration 30: Position of temperature sensor LM75A
Table 36: Electrical characteristics LM75A
Manufacturer Resolution Accuracy Range Error
NXP 0.125 °C 11 bit
–25 °C to +100 °C
–55 °C to +125 °C
The temperature sensor on the MBLS1012AL has I
2
C address 0x48 / 100 1000b.
No software is required for the MBLS1012AL.
Suitable software is only required on the TQMLS1012AL and is not a part of this specification.
More information can be found in the Support Wiki for the TQMLS1012AL
The MBLS1012AL has overall dimensions (length × width) of 160 × 100 mm2.
The MBLS1012AL has a maximum height of approximately 29 mm.
The MBLS1012AL has four mounting holes with a diameter of 2.7 mm and three 2.2 mm heat sink mounting holes.
The MBLS1012AL weighs approximately 137 grams including TQMLS1012AL.
No special precautions were taken concerning the thermal management of the TQMLS1012AL.
The power dissipation also depends on the software used and can vary according to the application.
The power dissipation originates primarily in the CPU, the DDR3L SDRAM and the PMIC.
More information is to be taken from the TQMLS1012AL Preliminary User's Manual.
Attention: Destruction or malfunction
The MBLS1012AL belongs to a performance category in which a cooling system is essential in most
applications. It is the user’s sole responsibility to define a suitable heat sink (weight and mounting
position) depending on the specific mode of operation (e.g., dependence on clock frequency, stack
height, airflow, and software). Particularly the tolerance chain (PCB thickness, board warpage, BGA
balls, BGA package, thermal pad, heatsink) as well as the maximum pressure on the TQMLS1012AL
must be taken into consideration when connecting the heat sink.
The TQMLS1012AL is not the highest component. Inadequate cooling connections can lead to
overheating of the MBLS1012AL and thus malfunction, deterioration or destruction.
Illustration 33: MBLS1012AL component placement top
Since the MBLS1012AL is a development platform, no EMC tests have been performed.
Protection against electrostatic discharge is provided on most interfaces of the MBLS1012AL.
The circuit diagram shows which interfaces have ESD protection.
Tests for operational safety and personal protection were not carried out due to the voltages ≤30 V DC.
In general reliable operation is given when the following conditions are met:
Table 38: Climatic and operational conditions MBLS1012AL
Parameter Range Remark
Permitted environmental temperature 0 °C to +60 °C With Lithium battery
Permitted environmental temperature 0 °C to +70 °C Without Lithium battery
Permitted storage temperature –10 °C to +60 °C With Lithium battery
Relative air humidity (operation / storing) 10 % to 90 % Not condensing
Attention: Cooling
The LS1012A CPU belongs to a performance category in which a cooling system is essential in most
applications. It is the user’s sole responsibility to define a suitable heat sink (weight and mounting
position) depending on the specific mode of operation (e.g., dependence on clock frequency, stack
height, airflow, and software).
Particularly the tolerance chain (PCB thickness, board warpage, BGA balls, BGA package, thermal pad,
heatsink) as well as the maximum pressure on the i.MX6UL must be taken into consideration when
connecting the heat sink. The i.MX6UL is not necessarily the highest component.
Inadequate cooling connections can lead to overheating of the TQMLS1012AL and thus malfunction,
deterioration or destruction.
Protection class IP00 was defined for the MBLS1012AL.
There is no protection against foreign objects, touch or humidity.
No detailed MTBF calculation has been done for the MBLS1012AL.
The MBLS1012AL is designed to be insensitive to vibration and impact.
• All components and assemblies are RoHS compliant
• The soldering processes are RoHS compliant
The final distributor is responsible for compliance with the WEEE® regulation.
Within the scope of the technical possibilities, the MBLS1012AL was designed to be recyclable and easy to repair.
The EU-chemical regulation 1907/2006 (REACH® regulation) stands for registration, evaluation, certification and restriction of substances SVHC
(Substances of very high concern, e.g., carcinogen, mutagen and/or persistent, bio accumulative and toxic). Within the scope of this juridical
liability, TQ-Systems GmbH meets the information duty within the supply chain with regard to the SVHC substances, insofar as suppliers inform
TQ-Systems GmbH accordingly.
The Ecodesign Directive, also Energy using Products (EuP), is applicable to products for the end user with an annual quantity >200,000. The
MBLS1012AL must therefore always be seen in conjunction with the complete device.
The available standby and sleep modes of the components on the MBLS1012AL enable compliance with EuP requirements for the MBLS1012AL.
By environmentally friendly processes, production equipment and products, we contribute to the protection of our environment. To be able to
reuse the MBLS1012AL, it is produced in such a way (a modular construction) that it can be easily repaired and disassembled. The energy
consumption of this subassembly is minimised by suitable measures. The MBLS1012AL is delivered in reusable packaging.
9.6.1 General notes
Due to technical reasons a battery is necessary for the MBLS1012AL. Batteries containing mercury (Hg), cadmium (Cd) or lead (Pb) are not used. If
this is for technical reasons unavoidable, the device is marked with the corresponding hazard note.
To allow a separate disposal, batteries are generally only mounted in sockets.
9.6.2 Lithium batteries
The requirements concerning special provision 188 of the ADR (section 3.3) are complied with for Lithium batteries.
There is therefore no classification as dangerous goods:
• Basic lithium content per cell not more than 1 grams (except for lithium ion and lithium polymer cells for which a lithium content of not
more than 1.5 g per cell applies (equals 5 Ah)).
• Basic lithium content per battery not more than 2grams
(except for lithium ion batteries for which a lithium content of not more than 8 grams per cell applies (equals 26 Ah)).
• Lithium cells and batteries are examined according to UN document ST/SG/AC.10-1.
During transport a short circuit or discharging of the socketed lithium battery is prevented by extricable insulating foils or by other suitable
insulating measures.
By environmentally friendly processes, production equipment and products, we contribute to the protection of our environment. To be able to
reuse the MBLS1012AL, it is produced in such a way, that it can be easily repaired and disassembled. The energy consumption of this
subassembly is minimised by suitable measures. Due to the fact that at the moment there is still no technical equivalent alternative for printed
circuit boards with bromine-containing flame protection (FR-4 material), such printed circuit boards are still used. No use of PCB containing
capacitors and transformers (polychlorinated biphenyls). These points are an essential part of the following laws:
• The law to encourage the circular flow economy and assurance of the environmentally
acceptable removal of waste as at 27.9.94
(Source of information: BGBl I 1994, 2705)
• Regulation with respect to the utilization and proof of removal as at 1.9.96
(Source of information: BGBl I 1996, 1382, (1997, 2860))
• Regulation with respect to the avoidance and utilization of packaging waste as at 21.8.98
(Source of information: BGBl I 1998, 2379)
• Regulation with respect to the European Waste Directory as at 1.12.01
This information is to be seen as notes. Tests or certifications were not carried out in this respect.