Toshiba TB 6560 FG Service Manual

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TOSHIBA BiCD Integrated Circuit Silicon Monolithic

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Preliminar

TB6560HQ,TB6560FG

PWM Chopper-Type bipolar

Stepping Motor Driver IC

The TB6560HQ/FG is a PWM chopper-type sinusoidal micro-step bipolar stepping motor driver IC. It supports both 2-phase/1-2-phase/W1-2-phase/2W1-2-phase excitation mode and forward/reverse mode and is capable of low-vibration, high-performance drive of 2-phase bipolar type stepping motors using only a clock signal.

Features

• Single-chip bipolar sinusoidal micro-step stepping motor driver

• Uses high withstand voltage BiCD process: Ron (upper  lower) = 0.6 Ω (typ.)

• Forward and reverse rotation control available

• Selectable phase drive (2, 1-2, W1-2, and 2W1-2)

• High output withstand voltage: V

• High output current: I

FG: 2.5 A (peak)

• Packages: HZIP25-P-1.27/HQFP64-P-1010-0.50

• Built-in input pull-down resistor: 100 kΩ (typ.)

• Output monitor pin equipped: MO current (I

• Equipped with reset and enable pins

• Built-in overheat protection circuit

= HQ: 3.5 A (peak)

OUT

CEO

= 40 V

(max) = 1 mA)

MO

TB6560HQ

TB6560FG

Weight: HZIP25-P-1.27: 9.86 g (typ.) HQFP64-P-1010-0.50: 0.26 g (typ.)

TB6560HQ/FG

The TB6560HQ/FG is a Pb-free product. The following conditions apply to solderability: *Solderability

1. Use of Sn-63Pb solder bath

*solder bath temperature = 230°C *dipping time = 5 seconds *number of times = once *use of R-type flux

2. Use of Sn-3.0Ag-0.5Cu solder bath

*solder bath temperature = 245°C *dipping time = 5 seconds *the number of times = once *use of R-type flux

*: Since this product has a MOS structure, it is sensitive to electrostatic discharge. These ICs are highly sensitive to

electrostatic discharge. When handling them, please be careful of electrostatic discharge, temperature and humidity conditions.

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Block Diagram

+

r

TB6560HQ/FG

M1

M2

CW/CCW

CLK



RESET

ENABLE

DCY1

DCY2

OSC

23/36

22/35

21/33

3/45

5/48

4/47

25/39

24/38

7/53

Input

circuit

OSC

VDD

Protect MO

Overheat protection

circuit

Current selector

circuit A

Decode

VMA

18/25, 26 17/2319/2820/30, 31

Bridge

driver A

Bridge

driver B B

OUT_AP

16/19, 20

13/10, 11

OUT_AM

14/13, 14, 15

8/55, 56

12/6, 7

9/61, 62

OUT_BM

NFA

V

MB

OUT_BP

NFB

Maximum current

setting circuit

TQ1 TQ2

Current selector

circuit B

+

15/166/50, 51

SGND PGNDA PGNDB

TB6560HQ/TB6560FG

11/2, 3, 4

10/1 1/42 2/43

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Pin Functions

TB6560HQ/FG

Pin No.

HQ FG

1 42 Input TQ2 Torque setting input (current setting) (built-in pull-down resistor)

2 43 Input TQ1

3 45 Input CLK Step transition, clock input (built-in pull-down resistor)

4 47 Input ENABLE H: Enable; L: All output OFF (built-in pull-down resistor)

5 48 Input

6 50/51 ⎯ SGND Signal ground (control side) (Note 1)

7 53 ⎯ OSC Connects to and oscillates CR. Output chopping.

8 55/56 Input VMB Motor side power pin (B phase side) (Note 1)

9 61/62 Output OUT_BM OUT_B output (Note 1)

10 1 ⎯ PGNDB

11 2/3/4 ⎯ N

12 6/7 Output OUT_BP

13 10/11 Output OUT_AM

14 13/14/15 ⎯ N

15 16 ⎯ PGNDA

16 19/20 Output OUT_AP OUT_A output (Note 1)

17 23 Output MO Initial state detection output. ON when in initial state (open drain).

18 25/26 Input VMA Motor side power pin (A phase side) (Note 1)

19 28 Output Protect When TSD, ON (open drain). Normal Z.

20 30/31 Input VDD Control side power pin. (Note 1)

21 33 Input CW/CCW

22 35 Input M2 Excitation mode setting input (built-in pull-down resistor)

23 36 Input M1 Excitation mode setting input (built-in pull-down resistor)

24 38 Input DCY2 Current Decay mode setting input (built-in pull-down resistor)

25 39 Input DCY1 Current Decay mode setting input (built-in pull-down resistor)

I/O Symbol Functional Description

Torque setting input (current setting) (built-in pull-down resistor)

L: Reset (output is reset to its initial state) (built-in pull-down resistor)

Power ground

B channel output current detection pin (resistor connection). Short the two pins for FG. (Note 1)

OUT_B output (Note 1)

OUT_A output (Note 1)

A channel output current detection pin (resistor connection). Short the two pins for FG. (Note 1)

Power ground

Forward/Reverse toggle pin. L: Forward; H: Reverse (built-in pull-down resistor)

RESET

FB

FA

HQ: No Non-connection (NC)

FG: Other than the above pins, all are NC

(Since NC pins are not connected to the internal circuit, a potential can be applied to those pins.)

All control input pins: Pull-down resistor 100 kΩ (typ.)

Note 1: If the FG pin number column indicates more than one pin, the indicated pins should be tied to each other at

a position as close to the pins as possible. (The electrical characteristics of the relevant pins in this document refer to those when they are handled in that way.)

Input pins (M1, M2, CLK, CW/CCW, ENABLE and RESET)

VDD

100 Ω

100 kΩ

Output ins (MO, PROTECT)

100 Ω

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TB6560HQ/FG

>

Absolute Maximum Ratings

(Ta = 25°C)

Characteristic Symbol Rating Unit

V

Power supply voltage

Output current Peak

HQ 3.5

FG

MO drain current I

Input voltage V

DD

V

MA/B

I

O (PEAK)

(MO)

IN

HQ

Power dissipation

P

D

FG

Operating temperature T

Storage temperature T

opr

stg

Note 1: Ta = 25°C, No heat sink.

Note 2: Ta = 25°C, with infinite heat sink (HZIP25).

Note 3: Ta = 25°C, with soldered leads.

6

V

40

A/phase

2.5

1 mA

5.5

V

5 (Note 1)

43 (Note 2)

W

1.7 (Note 3)

4.2 (Note 4)

−30 to 85 °C

−55 to 150 °C

Note 4: Ta = 25°C, when mounted on the board (4-layer board).

Susceptible to the board layout and the mounting conditions.

Operating Range

(Ta = −20 to 85°C)

Characteristic Symbol Test Condition Min Typ. Max Unit

Power supply voltage

Output current

HQ ⎯ ⎯ ⎯ 3

FG

Input voltage V

Clock frequency f

OSC frequency f

V

I

DD

MA/B

OUT

IN

CLK

OSC

V

MA/B

⎯ 4.5 5.0 5.5 V

VDD 4.5 ⎯ 26.4 V

A

⎯ ⎯ 1.5

⎯ 0 ⎯ 5.5

V

⎯ ⎯ ⎯ 15 kHz

⎯ ⎯ ⎯ 600 kHz

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TB6560HQ/FG

Electrical Characteristics

Characteristic Symbol

Input voltage

Input hysteresis voltage V

High V

Low V

(Ta = 25°C, VDD = 5 V, VM = 24 V)

IN (H)

IN (L)

1

H

Test

Circuit

1

M1, M2, CW/CCW, CLK, ENABLE, DECAY, TQ1, TQ2, ISD

Test Condition Min Typ. Max Unit

RESET

2.0 ⎯ V

,

−0.2 ⎯ 0.8

⎯ 400 ⎯ mV

DD

M1, M2, CW/CCW, CLK, RESET ,

Input current

I

IN (H)

I

IN (L)

ENABLE, DECAY, TQ1, TQ2, ISD V

= 5.0 V

IN

1

Built-in pull-down resistor

= 0 V ⎯ ⎯ 1

V

IN

30 55 80

Output open,

I

DD1

Consumption current VDD pin

Consumption current VM pin

I

DD2

I

DD3

I

DD4

IM1 RESET : H/L, ENABLE: L ⎯ 0.5 1

I

Output channel margin of error ∆V

V

NFHH

V

VNF level Level differential

Minimum clock pulse width t

NFHL

V

NFLH

V

NFLL

W (CLK)

M2

O

 TQ1 = L, TQ2 = H 47 50 55  TQ1 = H, TQ2 = L 70 75 80 

RESET : H, ENABLE: H

⎯ 3 5

(2, 1-2 phase excitation)

Output open,

1

RESET : H, ENABLE: H

⎯ 3 5

(W1−2, 2W1-2 phase excitation)

RESET : L, ENABLE: L ⎯ 2 5

RESET : H, ENABLE: L ⎯ 2 5

1

RESET : H/L, ENABLE: H ⎯ 0.7 2

⎯ B/A, C

= 0.0033 µF −5 ⎯ 5 %

OSC

TQ1 = H, TQ2 = H 10 20 30

⎯

= L, TQ2 = L 100

TQ1

⎯ ⎯ ⎯ 100 ⎯ ns

MO output residual voltage VOL MO ⎯ IOL = 1 mA ⎯ ⎯ 0.5 V

TSD TSD ⎯ (Design target value) ⎯ 170 ⎯ °C

TSD hysteresis TSDhys ⎯ (Design target value) ⎯ 20 ⎯ °C

Oscillating frequency f

C = 330 pF 60 130 200 kHz

OSC

V

µA

mA

%

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TB6560HQ/FG

Electrical Characteristics

Output Block

Characteristic Symbol

HQ

Output ON resistor

FG

2W1-2phase excitation

2W1-2phase

A-B chopping current (Note)

excitation

2W1-2phase excitation

2-phase excitation

Reference voltage V

Output transistor switching characteristics

Delay time

Output leakage current

W1-2phase excitation

1-2phase excitation

⎯ ⎯ θ = 1/8 93 98 100

W1-2phase

⎯ θ = 2/8 87 92 97

excitation

⎯ ⎯ θ = 3/8 78 83 88

W1-2phase excitation

1-2phase excitation

⎯ ⎯ θ = 5/8 51 56 61

W1-2phase

⎯ θ = 6/8 33 38 43

excitation

⎯ ⎯ θ = 7/8 15 20 25

Upper side I

Lower side I

(Ta = 25°C, VDD = 5 V, VM = 24 V)

Circuit

Ron

U1H

L1H

U1F

L1F

Vector ⎯

NF

t

r

t

f

t

pLH

t

pLH

t

pHL

LH

LL

Test

4

⎯

7

6 VM = 40 V

Test Condition Min Typ. Max Unit

I

= 1.5 A

OUT

I

= 1.5 A

OUT

θ = 0 ⎯ 100 ⎯

= L, TQ2 = L

TQ1

θ = 4/8 66 71 76

⎯

TQ1, TQ2 OSC

= L (100%)

= 100 kHz

RL = 2 Ω, VNF = 0 V, C

= 15 pF

L

RESET to output ⎯ 0.1 ⎯

ENABLE to output

⎯ 0.3 0.4

⎯ 0.35 0.5

⎯ 100 ⎯

450 500 550 mV

⎯ 0.1 ⎯

⎯ 0.3 ⎯

⎯ 0.2 ⎯ ⎯ ― 1 ⎯ ― 1

Ω

%

µs

µA

Note: Maximum current (θ = 0): 100%

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Description of Functions

1. Excitation Settings

You can use the M1 and M2 pin settings to configure four different excitation settings. (The default is 2-phase excitation using the internal pull-down.)

Input

M2 M1

L L 2-phase

L H 1-2-phase

H L W1-2-phase

H H 2W1-2-phase

2. Function

When the ENABLE signal goes Low level, it sets an OFF on the output. The output changes to the Initial mode shown in the table below when the CLK and CW/CCW pins are irrelevant.

Input

CLK CW/CCW RESET ENABLE

L H H CW

H H H CCW

X X L H Initial mode

X X X L Z

TB6560HQ/FG

Mode

(Excitation)

RESET signal goes Low level. In this mode, the status of the

Output Mode

X: Don’t care

3. Initial Mode

When RESET is used, the phase currents are as follows. In this instance, the MO pin is L (connected to open drain).

Excitation Mode A Phase Current B Phase Current

2-phase 100% −100%

1-2-phase 100% 0%

W1-2-phase 100% 0%

2W1-2-phase 100% 0%

4. Current Decay Settings

Output is generated by four PWM blasts; 25% decay is created by inducing decay during the last blast in Fast mode; 50% decay is created by inducing decay during the last two blasts in Fast mode; and 100% decay is created by inducing all four blasts in Fast mode. If there is no input with the pull-down resistor connection then the setting is Normal.

Dcy2 Dcy1 Current Decay Setting

L L Normal 0%

L H 25% Decay

H L 50% Decay

H H 100% Decay

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5. Torque Settings (Current Value)

The current ratio used in actual operations is determined in regard to the current setting due to resistance. Configure this for extremely low torque scenarios such as when Weak Excitation mode is stopped. If there is no input with the pull-down resistor connection then the setting is 100% tor qu e.

TQ2 TQ1 Current Ratio

L L 100%

L H 75%

H L 50%

H H

6. Protect and MO (Output Pins)

You can configure settings from the receiving side by using an open-drain connection for the output pins and making the pull-up voltage variable. When a given pin is in its designated state it will go ON and output at Low level.

Pin State Protect MO

TB6560HQ/FG

20%

(weak excitation)

Low Overheat protection operation Initial state

Z Normal operation Other than initial state

7. OSC

Output chopping waves are generated by connecting the condenser and having the CR oscillate. The values are as shown below (roughly: ± 30% margin of error).

Condenser Oscillating Frequency

1000 pF 44 kHz

330 pF 130 kHz

100 pF 400 kHz

Open-drain connection

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Relationship between Enable, RESET and Output (OUT and MO)

Ex-1: ENABLE 1-2-Phase Excitation (M1: H, M2: L)

CLK

ENABLE

RESET

MO

(%) 100

71

TB6560HQ/FG

CW

−71

−100

0

t

0

t1 t2 t

3

t

7

t

8t9t10

t11 t12 OFF

IA

The ENABLE signal at Low level disables only the output signals. Internal logic functions proceed in accordance with input clock signals and without regard to the ENABLE signal. Therefore output current is initiated by the timing of the internal logic circuit after release of disable mode.

Ex-2:

RESET

1-2-Phase Excitation (M1: H, M2: L)

CLK

ENABLE

RESET

MO

(%)

100

71

CW

−71

−100

0

t

0t1

t2 t

When the

IA

RESET signal goes Low level, output goes Initial state and the MO output goes Low level (Initial

state: A Channel output current is 100%).

Once the

RESET signal returns to High level, output continues from the next state after Initial from the

next raise in the Clock signal.

3

t

2t3

t

4

5

t7 t8 t

t

6

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2-Phase Excitation (M1: L, M2: L, CW Mode)

CW

CLK

MO

(%) 100

TB6560HQ/FG

IA

I

B

0

−100

(%) 100

0

−100

t1 t2 t3 t

t

0

t4 t5t

6

1-2-Phase Excitation (M1: H, M2: L, CW Mode)

CW

CLK

MO

(%) 100

71

7

−71

−100

(%) 100

71

−71

−100

0

t1 t2 t3 t

t

0

t4 t5t

7t8

6

IA

IB

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