Toshiba SATELLITE L300, SATELLITE L305 Schematic

Sacramento 10S

Phoenix 10S

MP BUILD

2008 0123

DATE

CHANGE NO.

REV

DRAWER
DESIGN
CHECK
RESPONSIBLE

SIZE =
FILE NAME :

P/N

XXXXXXXXXXXX

EE DATE

3 DOC. NUMBER

XXXX-XXXXXX-XX

DATE

POWER

VER :

INVENTEC

TITLE

PS10S

CODESIZE

A3

CS

SHEET

REV

X01Model_No

OF

163

TABLE OF CONTENTS

PAGE

1.COVER PAGE

2.INDEX

3.BLOCK DIAGRAM

4.POWER SEQUENCE BLOCK
5-12.SYSTEM POWER

13.CLOCK GENERATOR

14.CPU Merom1

15.CPU Merom2

16.CPU Merom3

17.CPU Merom4

18.FAN & THERMAL CONTROLLER

19.N/B Crestline 1

20.N/B Crestline 2

21.N/B Crestline 3

22.N/B Crestline 4

23.N/B Crescline 5

24.N/B Crestline 6

25.N/B Crestline 7

26.DDR2 DIMM0

27.DDR2 DIMM1

28.DDR DAMPING

29.N/A

30.CRT CONN

31.N/A

32.LCM CONN

PAGE

33. HDMI TRANSMITTER

34.S/B ICH8 1

35.S/B ICH8 2

36.S/B ICH8 3

37.S/B ICH8 4

38.S/B ICH8 5

40.3 IN 1 CARD SLOT

41.CARDBUS CONTROLLER

42.PCMCIA CONN

43.EXPRESS CARD CONN

44.LAN CONTROLLER

45.RJ45 & TRANSFORMER

46.ROBSON & WLAN

47.SATA HDD1 CONN

48.CAMERA CONN

49.ODD CONN

50.USB CONN

51. N/A

52.HD_DVD

53.KBC

54.K/B & TP/B CONN

55.HDMI CONN

56.AZALIA CODEC

57.AUDIO AMP & MIC & HP

PAGE

58.MDC 1.5 CONN

59.LED(M/B) & HOTKEY/B CONN

60.PICK BUTTON BOARD

61.KILL SWITCH& HALL SENSOR

62.DRILL HOLE

63.EMI

INVENTEC

TITLE

PS10S

CODE

CHANGE by

IEC951098

28-Aug-2007

SIZE

A3

CS

SHEET

DOC. NUMBER

Model_No

REV

X01

OF

632

HDMI CONN

SIL1392

HDMI Transmitter

Merom

(uFCPGA)

ICS9LPRS365

Clock generator

CONN

USB0

CONN

USB1

USB2

BATTERY

CONN

USB3

Card reader

CONN

LCM
CRT

HDD

ODD

USB4

Express Card

USB5

Wireless

MDC / Modem

Module 56K

USB6

SATA_0

Primary_IDE

USB7

CAMERA

USB8

3.3V, AZALIA

Realtek

ALC 268

USB9

RTS5158E

FSB, 667/800 MHz

Crestline

1299 PCBGA

DMI x4

ICH8-M

676 BGA

3.3V, LPC_Interface,33MHz

1.8V, DDR2 Interface, 533/667 MHz

1.8V, DDR2 Interface, 533/667 MHz

PCI_EXPRESS

Realtek

RTL8102E

10/100

RJ45

MINI CARD

Wireless LAN

ANT

DDR2_SODIMM0

3.3V, PCI_Interface,33MHz

NEWCARD

ANT

DDR2_SODIMM1

MINI CARD

ROBSON

MINI CARD

HD_DVD

CARD BUS

RICOH R5C804

System Charger &

DC/DC System power

(IMVP-6

VR)

RJ11

MIC

JACK

HP

JACK

SPEAKER

WINBOND

W775L

BIOS

SPI EEROM

CHANGE by

IEC951098

3-Oct-2007

Cardbus

SLOT A

INVENTEC

TITLE

PS10S

SIZE

A3

CODE

CS

SHEET

Model_No

DOC. NUMBER

363

REV

X01

OF

Adapter

(90W)

AM4825P

0.01

AM4825P

ADP_PRES

KBC_PW_ON

5/3.3V

(TPS51125)

+V3LA

+V5A

+V3S

PC6014

+V5S

PC6014

BATT_CLK

BATT_DATA

CHARGER

SCL

SDA

ACOK

0.01

ACIN#

+VPACK

SLP_S4#_3R

SLP_S3#_5R

VCCDRE_EN

H_VID [ 0 : 6 ]

IMVP_CKEN#

PM_DPRSLPVR

SLP_S3F_3R

EN_PSV

TPS51117

EN_PSV

TPS51117

VO

VO

EN_PSV

TPS51117

VR_ON

VID [ 0 : 6 ]

CLK_EN#

DPRSLPVR

+V1.8A

VO

TPS51620RHAR

VOUT

G2997

APL5913

+VCCP

CHANGE by

+1.5S

+VCC_CORE

+V0.9S

+V1.5S

29-Nov-2007IEC951098

INVENTEC

TITLE

PS10S

CODE

CS

SHEET

Model_No

DOC. NUMBER

463

SIZE

A3

REV

X01

OF

CN3

1

1

2

2

3

G1

G

3

4

G

G2

4

ACES_91302_0047L_1_4P

FUSE501

12

8A_125V

C502

1
2

10pF_50v

+VADPTR

5-

1
2

C503

0.1uF_50v

+VADPTR

5-

12343

NFM60R30T222

ROHM_RLZ24 2

L500

D502

R522

1K_5%

R521

10K_5%

1

2

1

1

MMBT3904

2

D500

1
2

PDS1040S

1

B

Q505

R523

432K_1%

3

C

E

2

C505

47uF_35v

1

2

1

R524

33K_1%

2

1

2

1
2

ACPRES

CHG_EN

C504

0.01uF_50v

12

R504

12

4.7K_5%

R503

12

4.7K_5%

BAT54S_30V_0.2A

C520

OPEN

53-

53-

R502

10_5%

1
2

D506

Q502

AM4825P_AP

1

S

2
3

G

2

3

1

1

R534

47K_5%

2

C536

1uF_10v

1

R536

100K_5%

2

8

D

7
6
54

1

2

+V5LA

5-,6-,7-,12-,18-,55-

C518

0.1uF_25v

+V5LA

1

1
2

5-,6-,7-,12-,18-,55-

1

R537

8.06K_1%

2
1

R538

39.2K_1%

2

53-

1

R533

22.6K_1%

2

R540

100K_5%

R525

12

0.01_1%_1W

C521

12

0.1uF_25v

NEAR IC

BATT_IN

2

R541

200K_5%

+VBAT

6-,7-,8-,9-,11-,63-

Q500

1

S

2
3
4

C3

0.01uF_50v

1
2

C525

1

10uF_25v_K_X5R

2

ACDRV#

BATDRV#

PVCC

HIDRV

BTST

REGN

LODRV

PGND
SYNP
SYNN

ISYNSET

C500

1
2

0.1uF_25v

2

23

SYS

24

32

30

29

PH

R5028

1

31

4.7_5%

28

27
26
22
21
20

SRP

19

SRN

18

BAT

7

EAO

8

EAI

9

FBO

16
33

TML

C524

1
2

10uF_25v_K_X5R

C523

1

4.7uF_25v

2

NEAR IC

R5027

12

OPEN

2

D507

12

3

BAT54AW

1

1

R539

100K_5%

2

2

C541

R520

200K_5%

12

1

R535

18K_5%

2

C515

1
2

100pF_50v

0.1uF_25v

C540

1

1uF_10v

2

G

4

G

41S23

1
2

8D765

12

3

8765

C517

56pF_50v

Q507

FDS8884

S

Q506

FDS8884

D

1
2

SSM34_3A40V_OPEN

1

R519

10K_5%

2

C516

1
2

1500pF_50v

PLC0755P_10uH_3.9A

L504

12

1

R542

OPEN

D508

2

C542

OPEN12

C506

1
2

C519

1
2

0.1uF_25v

10uF_25v_K_X5R

U502

12

VCC

3

ACN

4

ACP

6

BYPASS#

5

ACDET

11

VREF5

10

AGND

15

TS

6-

THRM1

1

CHGEN#

14

SCL

13

SDA

25

ALARM#

17

TP887

IOUT

TI_BQ24721C_QFN_32P

C940

1

OPEN12

AM4825P_AP

12

0.01_1%_1W

C538

0.1uF_25v

NEAR IC

C539

1
2

0.1uF_25v

R526

1

G

2

D

8
7
6
5

C537

1

0.22uF_25v

2

+VPACK

6-

C507

1

10uF_25v_K_X5R

2

2

EC_CLK

EC_DATA

18-,53-

18-,53-

TP888

TP889

IEC951098

31-Jul-2007

INVENTEC

TITLE

PS10S

DC &BATTERY CHANGER

SIZE DOC. NUMBER

Model_No

A3

CS

SHEET

OF

563

REVCODE

X01

+VBAT

5-,7-,8-,9-,11-,63-

1
R203

1M_5%

2

1
R202

56.2K_1%

2

1
R201

180K_1%

2

+V3LA

7-,12-,18-,34-,50-,53-,55-,59-,61-,63-

1

R500

47K_5%

53-

BAT_ID

BATT_DATA

BATT_CLK

C192

1

OPEN

2

2

R2

5-

THRM1

53-

R5024
R5025

53-

U9

3

LTH

RESET#

2

GND
HTH

VCC

1

GMT_G680LT1_SOT23_5P

12

12
12

4
5

+VPACK

5-

CHENMKO_BAT54_3P_OPEN

D503

3

1

1K_5%
33_5%
33_5%

C501

1
2

1000pF_50v

+V5LA

7-,53-

+V5AUXON

LITTLEFUSE_R451015_15A_65V

12

1

D5007

2

EZJZ0V500AA

5-,7-,12-,18-,55-

C191

1
2

0.1uF_10v

FUSE500

1

D5006

2

EZJZ0V500AA

CN500

1

BATT+

2

BATT+

3

ID

4

B-I

5

TS

6
7
8
9

ALLTOP_C144P3_109A_L_9P

G1

SMD

G

G2

SMC

G

G3

GND

G

G4

G

GND

CHANGE by

IEC951098

31-Jul-2007

INVENTEC

TITLE

PS10S

BATTERY CONN

SIZE

CODE

DOC. NUMBER

A3

Model_No X01

CS

SHEET

REV

OF

636

THRM_SHUTDWN#

EC_PW_ON

18-,53-

CHENMKO_BAT54_3P

R648

53-

12

10K_5%

D518
13

SSM3K7002FU

Q14

G

1

SSM3K7002FU

+V3A

35-,36-,37-,43-,44-,46-,48-,53-,59-,61-

1
2
5
6

1

R204

200_5%

2

D516

13

R645

12

100K_5%

+V3LA

C742

1
2

0.1uF_10v

4

3

S

G

TPC6104

Q15

D

+V5LA

5-,6-,7-,12-,18-,55-

1

R646

10K_5%

2

CHENMKO_BAT54_3P

Q523

3

D

1

G

S

2

3

D

S

2

6-,7-,12-,18-,34-,50-,53-,55-,59-,61-,63-

+V3LA

6-,7-,12-,18-,34-,50-,53-,55-,59-,61-,63-

PAD7

2

1

POWERPAD_2_0610

C190

OPEN12

R199

6.8K_1%

1

2

1

R200

10K_1%

2

C189

1uF_6.3v

MPLC0730_3R3_5.7A

1

1

C188

2

2

330uF_6.3v

Q10

1

SSM3K7002FU

D517
13

CHENMKO_BAT54_3P

R621

12

0_5%

R622

12

OPEN

C687

12

0.1uF_25v

TI_TPS51125_QFN_24P

C686

1
2

1uF_6.3v

12

1
2

4.7uF_25v

4

C163

6-,53-

10uF_25v_K_X5R

C162

1

1

2

2

+V5AUXON

8

765

D

Q9

FDS8884

L9

12

G

S

123

8765

D

Q8

23

G

4S1

FDS6690AS

+V3LDO

D

G

S

R176

0_5%

C689

4.7uF_6.3v

3

2

1

R647

150K_1%

2

7
8

10
11

U510

R624

820K_5%

1

R623

150K_1%

2

25

TML

VREG3
VBST2
DRVH2

DRVL2

6

VFB2

ENTRIP2

EN0

SKIPSEL

13

1

2

5

TONSEL

GND

14

1
2

4

15

3

2

VFB1

VREF

ENTRIP1

PGOOD

VBST1

DRVH1

DRVL1

VREG5

VCLK

VIN

17

16

C164

2.2uF_25v

+VBAT

5-,6-,8-,9-,11-,63-

PAD5

POWERPAD_2_0610

10uF_25v_K_X5R

G

41S23

G

4

10uF_25v_K_X5R

8765

D

Q5

FDS8884

8D765

Q4

FDS6690AS

1S23

C145

1
2

12

330uF_6.3v

C146

1
2

MPLC0730_3R3_5.7A

L5

1

C134

2

1
2

C135

1uF_6.3v

1

R143

15.4K_1%

2

1

R144

10K_1%

2

C148

1

OPEN

2

+V5A

8-,9-,11-,12-,37-,48-,50-,56-,57-,59-

PAD4

POWERPAD_2_0610

C685

12

1uF_6.3v

1

0.1uF_25v

24

VO1VO2

LL1LL2

18

23
229
21
20
1912

+V5LA

5-,6-,7-,12-,18-,55-

C688

1

10uF_6.3v

2

C665
12

INVENTEC

TITLE

PS10S

SYSTEM POWER(3V/5V)

CODE

CS

SHEET

DOC. NUMBER

OFCHANGE by

763

REV

X01Model_No

SIZE

31-Jul-2007IEC951098

A3

9

7-,8-,9-,11-,12-,37-,48-,50-,56-,57-,59-

+V5A

+VBAT

5-,6-,7-,8-,9-,11-,63-

PAD1

POWERPAD_2_0610

SLP_S5#_3R

8-,12-,35-,53-

R135

12

0_5%

C137

OPEN

1

R113

10_5%

2

1
2

C112

1uF_6.3v

C139

1
2

OPEN

1
2

R136

2

1

274K_1%

U4

1
2
3
4
5
6
7

EN_PSV
TON
VOUT
V5FILT
VFB
PGOOD
GND

VBST
DRVH

V5DRV

DRVL

PGND

LL

TRIP

TML

TI_TPS51117_QFN_14P

2.2_5%

15K_1%

C109

0.1uF_25v

12

C251

1
2

1uF_6.3v

R134

12

12

R110

14
13
12
11
10
9
8
15

8765

D

G

S

41

23

8765

D

G

41S23

Q2

FDS6690AS

Q1

FDS8884

1
2

SLP_S5#_3R
SLP_S3#_3R

M_VREF

C62

1
2

10uF_25v_K_X5R

MPLC0730_2R2_7.3A

8-,12-,35-,53-

8-,9-,11-,12-,35-,53-

19-,26-,27-

C61

4.7uF_25v

L3

12

14.3K_1%

10K_1%

1

R111

2

1

R112

220uF_2v_15mR_Panasonic

2

+V5A

7-,8-,9-,11-,12-,37-,48-,50-,56-,57-,59-

1

OPEN

C110

2

11 1
10 2

1

C111

2

U3

TML
VIN

9

S5
GND8PGND

7

S3

6

VTTREF

VDDQSNS

VLDOIN

VTTSNS

VTT

1

10uF_6.3v

2

3
4
5

C113

8-,12-,19-,23-,24-,26-,27-,63-

PAD3

POWERPAD_2_0610

+V1.8

8-,12-,19-,23-,24-,26-,27-,63-

+V1.8

PAD2

POWERPAD_2_0610

+V0.9S

28-,63-

GMT_G2997F6U_MSOP10_10P

C106

C70

1

1

2

1uF_10v

0.1uF_10v

1

OPEN

C250

2

C235

1

2

220uF_2v_15mR_Panasonic

1

10uF_6.3v

2

C233

PAD8

POWERPAD_2_0610

R296

10.2K_1%

R291

10K_1%

2

1

2

1

2

-,11-,12-,18-,30-,32-,35-,37-,40-,41-,47-,48-,49-,53-,54-,56-,59-,63-

+V5S

0.1uF_16v

C249

1uF_6.3v

+V5A

1

2

R290

10_5%

1
2

C248

OPEN

U13

1

EN_PSV

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

7

GND

1

TI_TPS51117_QFN_14P

2

R305

2

274K_1%

DRVH

V5DRV

DRVL
PGND

VBST

1

2.2_5%

15K_1%

C234

0.1uF_25v

12

C252

1

1uF_6.3v

2

R265

12

12

R306

14
13
12

LL

11

TRIP

10
9
8
15

TML

G

FDS8884

S

123

8D7654

G

S

123

FDS6690AS

Q17

8D7654

OPEN

1

2

1

2

7-,8-,9-,11-,12-,37-,48-,50-,56-,57-,59-

C232

1
2

R263

R264

10K_5%

SLP_S3#_3R

8-,9-,11-,12-,35-,53-

Q19

+VBAT

5-,6-,7-,8-,9-,11-,63-

PAD9

POWERPAD_2_0610

C254

1
2

10uF_25v_K_X5R

MPLC0730_2R2_7.3A

C253

1
2

4.7uF_25v

L10

12

CHANGE by

C107

1

22uF_6.3v

2

+V1.5S

9-,16-,24-,34-,35-,37-,43-,46-,52-,63-

31-Jul-2007IEC951098

C76

1

22uF_6.3v

2

INVENTEC

TITLE

PS10S

SYSTEM POWER (+V2.5S / +VCCP)

SIZE

CODE DOC. NUMBER

A3

CS

SHEET OF

863

REV

X01Model_No

+V3S

7-,8-,11-,12-,37-,48-,50-,56-,57-,59-

+V5A

11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

+VBAT

5-,6-,7-,8-,11-,63-

PAD501

POWERPAD_2_0610

SLP_S3#_5R

12-

100K_5%

R547

12

VCCP_PG

8-,11-,12-,18-,30-,32-,35-,37-,40-,41-,47-,48-,49-,53-,54-,56-,59-,63-

R228

SLP_S3#_3R

8-,11-,12-,35-,53-

12

0_5%_OPEN

C208

OPEN12

R227

10K_5%

C551

1
2

0.1uF_16v

11-

+V5S

8-,16-,24-,34-,35-,37-,43-,46-,52-,63-

C207

1

1uF_6.3v

2

6

U7

VCNTL

7

POK

VIN

VOUT
VOUT

82

EN

FB

VIN

GND

9

1

ANPEC_APL5913_KAC_TRL_SOP_8P

1

2

5

3
4

C553

1uF_6.3v

1

2

R4

10_5%

1
2

+V1.5S

1
2

C206

22uF_6.3v

1
2

C544

OPEN

C181

39pF_50v

U505

1

EN_PSV

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

7

GND

1

TI_TPS51117_QFN_14P

2

12

R185

5.9K_1%

1

R186

10K_1%

2

R545

2

274K_1%

C179

1
2

22uF_6.3v

1

VBST
DRVH

V5DRV

DRVL
PGND

TRIP

TML

14
13
12

LL

11
10
9
8
15

1
2

1

11.5K_1%

C545

1

1uF_6.3v

2

PAD6

POWERPAD_2_0610

C180

1uF_6.3v

R544

2.2_5%

2

12

R546

+V1.25S

19-,24-,37-

1

R184

200_5%

2

C543

0.1uF_25v

1

2

8D765

G

1
2

S

4

123

Q511

FDS8878

8D765

G

S

4

1

23

Q513

FDS8672S

C547

1

C546

2

4.7uF_25v

10uF_25v_K_X5R

L506

12

MPLC0730_1R0_10.6A

R551

4.12K_1%

1

1

OPEN

C552

2

2

1

2

R548

10K_1%

C564

330uF_2v_15mR_Panasonic

+VCCP

13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

PAD503

POWERPAD_2_0610

1

2

1

10uF_6.3v

2

C563

SLP_S3_5R

Q11

3

12-

SSM3K7002FU

D

1

G

S

2

INVENTEC

TITLE

PS10S

SYSTEM POWER(+V1.5S / +V1.8)

CODE

SIZE REVDOC. NUMBER

CHANGE by SHEET

IEC951098

12-Sep-2007

A3

Model_No X01

CS

OF

639

BLANK

CHANGE by

INVENTEC

TITLE

PS10S

CPU POWER(VCC_CORE)

CODE REV

CS

SHEET

DOC. NUMBER

OF

10 63

X01Model_No

SIZE

30-Nov-2007IEC951098

A3

SLP_S3#_3R

8-,9-,12-,35-,53-

VR_PWRGD

VR_PWRGD

IMVP_CKEN#

C298

1

2

1000pF_50v

VCOREGND

R552

9-

12

120K_1%

1

3

D509

BAT54C

2

R553

2

1

11-,18-,35-

+V3S

120K_1%

H_VID6
H_VID5
H_VID4
H_VID3
H_VID2
H_VID1
H_VID0

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

PSI#

H_DPRSTP#

PM_DPRSLPVR

1

2

11-,18-,35-

12

C290

330pF_50v

12

R1

1.65K_1%

R74

432K_1%

+V5A

7-,8-,9-,12-,37-,48-,50-,56-,57-,59-

R579

0_5%

R578

0_5%

R333

12

OPEN

1

R79

10K_5%

2

VCORE_EN

C255

220pF_25v

2

1

2

VCOREGND

12

12

1

1

61.9K_1%

1

C289

2

0.012uF_16v

16-

16-

11-,53-

VCCSENSE

VSSSENSE

R72

10K_5%

R70

1
2

C566

1uF_10v

2

CSREF

16­16­16­16­16-

16­16­15-

15-,19-,34-

19-,35-

VCOREGND

1

C287

18pF_50v

2

C2921

680pF_50v

2

2

12

100K_5%

12

C575

0.1uF_16v

5

U507

4

PHP_74LVC1G17_SOT753_5P

3

R5005

12

OPEN

R568

12

499_1%

1
2

1

2

C291

4700pF_25v

3
4
5
6
7
8

9
10
11
12

R341

TP6

TP7

11-

C295

1000pF_50v

VCOREGND

+V3S

5

2

3

C565

1
2

1uF_10v

19-,35-

49

45

44

46

48

47

PSI

TML

VID0
EN
PWRGD
PGDELAY
CLKEN
FBRTN
FB
COMP
SS
ST
VARFREQ
VRTT
TTSEN

115K_1%

1
2

VID1

DPRSLP

DPRSTP

U508

ADI_ADP3208_LFCSP_48P

PMON

PMONFS

CLIM

CSCOMP

LLINE

14

15

17

16

13

1

R336

2

VCOREGND

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

U506

4

PHP_74LVC1G17_SOT753_5P

11-,53-

VCORE_ENVCCP_PG

PM_PWROK

+V5A

7-,8-,9-,12-,37-,48-,50-,56-,57-,59-

R345

12

10_5%

C288

1
2

2.2uF_6.3v

R307

R82

+VBAT_CPU

R81

12

115K_1%

D29

3

1

BAT54A_30V_0.2A

C77

12

0.1uF_25v

C33

12

0.1uF_25v

2

R340

76.8K_1%

1

2

1

C299

2

2.2uF_6.3v

1

R71

220K_5%

2

41

42

VID243VID3

CSFEF19CSSUM

18

2

274K_1%

1

VCOREGND

1

C296

1000pF_50v

2

40

39

VID4

VID5

VID6

RAMP20RPM22RT

VRPM

21

2

R337

80.6K_1%

1

R335

1
2

VCOREGND

37

SP

VCC

BST1

DRVH1

SW1
PVCC1
DRVL1

PGND1
PGND2

DRVL2
PVCC2

SW2

DRVH2

BST2

GND

23 38

24

R334

237K_1%

12

12

C294

1000pF_50v

R69

12

10K_5%

C293

1000pF_50v

1
2

R1050

12

0_5%

36
35
34
33
32
31
30
29
28
27
26
25

VCOREGND

R338

12

105K_1%

R177

12

105K_1%

C297

1000pF_50v

12

2.2_5%

12

2.2_5%

FINE_TUNE

+VBAT

5-,6-,7-,8-,9-,11-,63-

1

L507

4

NFM60R30T222

3

2

1
2

10uF_25v_K_X5R

10uF_25v_K_X5R

C683

1
2

10uF_25v_K_X5R

C586

1
2

OPEN

12

R10

C684

10uF_25v_K_X5R

1
2

OPEN

2

R28

1

+VBAT_CPU

C619

C587

1
2

0.01uF_50v

C682

1
2

0.01uF_50v

CHANGE by

56789

G

Q518

SI7686DP_T1_E3

43

21

765

8

D

G

1S23

4

Q517

FDMS8660S

56789

Q519

SI7686DP_T1_E3

1

4G32

8765

D

G

41S23

R27

9

OPEN

C32

OPEN

9

Q520

FDMS8660S

1

OPEN

2

1
2

R117

C122

OPEN

1

2

1
2

ETQP4LR36WFC_PANASONIC

1

D11

2

SSM34_3A40V_OPEN

1

D24

SSM34_3A40V_OPEN

2

26-Nov-2007IEC951098

L510

1

2

2

R7

10_1%

1

11-

CSREF

2

R339

10_1%

1

L513

1

ETQP4LR36WFC_PANASONIC

2

INVENTEC

TITLE

PS10S

+V0.9S / POWER GOOD

DOC. NUMBER

CODE

SIZE REV

A3

CS

SHEET

11 63

+VCC_CORE

16-

OF

X01Model_No

8-,9-,11-,12-,18-,30-,32-,35-,37-,40-,41-,47-,48-,49-,53-,54-,56-,59-,63-

CHENMKO_BAT54_3P

6011A0014601

SLP_S3#_5R

9-,12-

R626

200_5%

D514

+V5S

1

2

+V3S

+V3

58-,59-

Q7

1

S

D

2
5
6

1

2

1

3

5-,6-,7-,12-,18-,55-

74ACT14MTC

+V5LA

14

12

7

G

TPC6104

1
2

3

1

CHENMKO_BAT54_3P

+V5LA

U6-B

1

C158

47uF_6.3v

2

R625

200_5%

CHENMKO_BAT54_3P

D513

SLP_S5#_5R

1

3

5-,6-,7-,12-,18-,55-

U6-A

74ACT14MTC

4

3

C157

680pF_50v

D512

14

34

7

+V3LA

6-,7-,18-,34-,50-,53-,55-,59-,61-,63-

1

R627

220K_5%

2

5-,6-,7-,12-,18-,55-

8-,9-,11-,35-,53-

SLP_S3#_3R

4

S

TPC6104

Q12

1

D

2
5
63

G

C161

1
2

680pF_50v

+V5LA

14

U6-D

9

7

74ACT14MTC

9-,11-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

8-,19-,23-,24-,26-,27-,63-

2

R196

1

R174

200_5%

2

200_5%

1

3

D

S

2

SSM3K7002FU

D26

2

3

1

BAT54A_30V_0.2A

SLP_S3#_5R

G

1

Q13

R175

220K_5%

8

R198

220K_5%

1

C186

2

47uF_6.3v

2

1

2

1

+V1.8

9-,12-

Q529

1

8

S

D

2

7

3

6
5

4

G

AO4406

R705

12

220K_5%

+V5A

7-,8-,9-,11-,37-,48-,50-,56-,57-,59-

4

S

TPC6104

4

S

TPC6104

C136

12

680pF_50v

+V1.8S

33-

C816

12

680pF_50v

SSM3K7002FU

Q530
1

1

R730

200_5%

2

3

D

G

S

2

+V5S

8-,9-,11-,12-,18-,30-,32-,35-,37-,40-,41-,47-,48-,49-,53-,54-,56-,59-,63-

Q3

1

D

2
5
63

G

Q6

1

D

2
5
63

G

U6-F

74ACT14MTC

14

7

5-,6-,7-,12-,18-,55-

1312

U6-E

74ACT14MTC

+V5LA

SLP_S5_3R

5-,6-,7-,12-,18-,55-

14

1110

7

+V5LA

C159

12

0.1uF_10v

U6-C
6

74ACT14MTC

14

5

8-,35-,53-

SLP_S5#_3R

7

9-

SLP_S3_5R

INVENTEC

TITLE

PS10S

CHANGE by

POWER(SLEEP)

CODE

CS

SHEET

DOC. NUMBER

12 63

SIZE

31-Jul-2007IEC951098

A3

REV

X01Model_No

OF

9

-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

CPU_BSEL1
CPU_BSEL2

CLK_R_SB14

FSA

FSB

1

1
0

*CLKREQ# pin controls SRC Table.

CR#_A

CR#_C

+VCCP

L7

BLM11A121S

1

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

15-,19­15-,19-

35-

1K_5%

R241

Layout note: All decoupling 0.1uF disperse closed to pin

2

C182

1

10uF_10v

2

1

R242

1K_5%_OPEN

2

12

10K_5%

12

R236

2

1

CLK_PWRGD

FSC

0

0
1

0
0

1

Byte5: bit6 =0(PWD)

SRC0

FSB CLOCK
FREQUENCY

533
667
800

HOST CLOCK
FREQUENCY

Byte5: bit6 =1

SRC2

Byte5: bit7=0, disable CR#_A; 1,enable CR#_A

Byte5: bit2 =0(PWD)

SRC0

Byte5: bit2 =1

SRC2

Byte5: bit3=0, disable CR#_C; 1,enable CR#_C

133
166
200

R237

1
2

33_5%

C183

10uF_10v

+VCCP

2

1

35-

1
2

1K_5%

R235

CLK_R_KBPCI
CLK_R_CBPCI

CR#_B

CR#_D

C153

0.1uF_16v

R156

1K_5%

15-,19-

RTS5158_48

CLK_R_SB48

53­41-

R173

12

10K_5%_OPEN

C216

33pF_50v

C213

1

0.1uF_16v

2

+VCCP

1

2

35­19-

33_5%

ICH_3S_SMDATA

X502

14.31818MHZ

12

1

30PPM

2

40-

35-

ICH_3S_SMCLK

C155

1

0.1uF_16v

2

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

CPU_BSEL0

CLKREQ_R_SATA#

CLKREQ_R_MCH#

Please place close to CLKGEN within 500mils

Byte5: bit4 =0(PWD)

SRC1

Byte5: bit5=0, disable CR#_B; 1,enable CR#_B

Byte5: bit0 =0(PWD)

SRC1

Byte5: bit1=0, disable CR#_D; 1,enable CR#_D

+VDD_VCCP_CLK

C212

1

0.1uF_16v

2

R158

12

2.2K_5%

R159&R161

RTS5158E

Not USE

USE

R161

12

12.1_1%

R159

12

R172

R170
R167
R165

1

C215

2

33pF_50v

C152

1

0.1uF_16v

2

33_1%

12.1_1%

12.1_1%

475_1%

12

475_1%

2

1

12

33_5%

12

26-,27-,35­26-,27-,35-

Byte5: bit4 =1

SRC4

Byte5: bit0 =1

SRC4

+V3S

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

Layout note: All decoupling 0.1uF disperse closed to pin

C210

1

0.1uF_16v

2

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

+V3S

2

2

1

R171

10K_5%

1

R169

OPEN

2

R168

10K_5%

2

1

CLK_SB48

CLK_SB14

CLKREQ_SATA#
CLKREQ_MCH#

CLK_KBPCI
CLK_CBPCI

R187

10K_5%

1

CR#_E

CR#_F

CR#_G

CR#_H

L8

BLM11A121S

1

2

C185

1
2

10uF_10v

+VDD_V3S_CLK

U8

26

VDDSRC_IO

45

VDDSRC_IO

36

VDDSRC_IO

12

VDD_IO

39

VDD_SRC

61

VDDREF

20

VDDPLL3_IO

49

VDDCPU_IO

9

VDD48

2

VDDPCI

55

VDDCPU

16

VDD_PLL3

10

USB_48MHZ_FSLA

57

FSLB_TEST_MODE

62

REF0_FSLC_TEST_SEL

1

PCI0_CR#_A

3

PCI1_CR#_B

4

PCI2_TME

5

SRC5_EN_PCI3

56

CK_PWRGD_PD#

64

SCLK

63

SDTAT

60

X1

59

X2

8

GNDPCI

11

GND48

15

GND_IO

19

GND_PLL3

23

GNDSRC

29

27MHz_NonSS_SRCT1_SE1

GNDSRC

42

GNDSRC

58

GNDREF

52

GNDCPU

REA_RTM875T_606_TSSOP_64P

Byte6: bit7=0, disable CR#_E; 1,enable CR#_E

SRC6

Byte6: bit6=0, disable CR#_F; 1,enable CR#_F

SRC8

Byte6: bit5=0, disable CR#_G; 1,enable CR#_G

SRC9

Byte6: bit4=0, disable CR#_H; 1,enable CR#_H

SRC10

RESET#

PCI_STOP#_SRCT5

CPU_STOP#_SRCC5

CPUT1_F
CPUC1_F

CPUT0
CPUC0

CPUT2_ITP_SRCT8
CPUC2_ITP_SRCC8

SRCT11_CR#_H
SRCC11_CR#_G

SRCT10
SRCC10

SRCT9
SRCC9

SRCT7_CR#_F

SRCC7_CR#_E

SRCT6
SRCC6

PCI4_27M_Select

PCI_F5_ITP_EN

SRCT4
SRCC4

SRCT3_CR#_C

SRCC3_CR#_D

SRCT2_SATAT
SRCC2_SATAC

27MHz_SS_SRCC1_SE2

SRCT0_DOTT_96

SRCC0_DOTC_96

C211

1
2

0.1uF_16v

48

38
37

CLK_R_MCHBCLK

51

CLK_R_MCHBCLK#

50

CLK_R_CPUBCLK

54

CLK_R_CPUBCLK#

53

47
46

33
32

34
35

CLK_R_PCIE_MINI2

30

CLK_R_PCIE_MINI2#

31

44
43

CLK_R_PCIE_ICH

41

CLK_R_PCIE_ICH#

40

6
7

CLK_R_PEG_MCH

27

CLK_R_PEG_MCH#

28

CLK_R_PCIE_LAN

24

CLK_R_PCIE_LAN#

25

21
22

CLKSS1_R_DREF

17

CLKSS1_R_DREF#

18

CLK_R_DREF

13

CLK_R_DREF#

14

C214

1
2

0.1uF_16v

CLKREQ_ROBSON#

CLKREQ_MINI2#
CLK_R_PCIE_MINI1

CLK_R_PCIE_MINI1#

CLK_MINICARD2
CLK_ICHPCI

CLK_SATA1

CLK_SATA1#

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

C154

C184

1

1

2

2

0.1uF_16v

0.1uF_16v

R160

2

10K_5%

CHANGE by

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

+V3S

1

1

R232

R231

OPEN

OPEN

2

2

475_1%

12

475_1%

12

12

33_5%

12

33_5%

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

1

+V3S

R163

2

1

OPEN

R166

2

1

10K_5%

27_Selet =0

LCD_SST 100MHZ

27_Selet =1

27MHZ non-spread clock

17-Jan-2008IEC951098

+V3S

1

1

R229

10K_5%

2

2

R230
R154

R164
R162

INVENTEC

TITLE

CODE

SIZE

A3

R155

10K_5%

35-

PCISTOP#_3

35-

CPUSTOP#_3

21-

CLK_R_MCHBCLK

21-

CLK_R_MCHBCLK#

14-

CLK_R_CPUBCLK

14-

CLK_R_CPUBCLK#

43-

CLK_R_PCIE_CARD

43-

CLK_R_PCIE_CARD#

46-

CLKREQ_R_ROBSON#

46-

CLKREQ_R_MINI2#

46-

CLK_R_PCIE_MINI1

46-

CLK_R_PCIE_MINI1#

46-

CLK_R_PCIE_MINI2

46-

CLK_R_PCIE_MINI2#

52-

CLK_R_PCIE_MINI3

52-

CLK_R_PCIE_MINI3#

35-

CLK_R_PCIE_ICH

35-

CLK_R_PCIE_ICH#

46-

CLK_R_MINICARD2

36-

CLK_R_ICHPCI

19-

CLK_R_PEG_MCH

19-

CLK_R_PEG_MCH#

44-

CLK_R_PCIE_LAN

44-

CLK_R_PCIE_LAN#

34-

CLK_SATA1

34-

CLK_SATA1#

19-

CLKSS1_R_DREF

19-

CLKSS1_R_DREF#

19-

CLK_R_DREF

19-

CLK_R_DREF#

PS10S

CLOCK_GENERATOR

DOC. NUMBER

CS

SHEET

OF

13 63

REV

X01Model_No

ROBSON

WLAN

HD_DVD

H_A#(35:3)

H_ADSTB#1

H_STPCLK#

H_A20M#
H_FERR#

H_IGNNE#

H_INTR

H_NMI

H_SMI#

21-

H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)

H_REQ#(4:0) H_RS#(0:2)

H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
H_A#(32)
H_A#(33)
H_A#(34)
H_A#(35)

21-

34­34­34-

34­34­34­34-

21-

H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)

H_ADSTB#0

21-

CN505-1

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD01

N5

RSVD02

T2

RSVD03

V3

RSVD04

B2

RSVD05

C3

RSVD06

D2

RSVD07

D22

RSVD08

D3

RSVD09

F6

RSVD010

ADS#
BNR#
BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

ADDR GROUP 0

INIT#

CONTROL

LOCK#

RESET#

RS0#
RS1#
RS2#

TRDY#

HIT#

HITM#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TCK

ADDR GROUP 1

TDO
TMS

XDP/ITP SIGNALS

TRST#

DBR#

THERMAL

PROCHOT#

THERMDA
THERMDC

THERMTRIP#

ICH

H CLK

BCLK0
BCLK1

RESERVED

FOX_PZ4782K_274M_41_478P

CPU

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

R73

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

2

56_5%

D21
A24
B25

C7

A22
A21

ICH8GMCH

1

+VCCP

+VCCP

10mils/10mils

21-

H_ADS#

21-

H_BNR#

21-

H_BPRI#

21-

H_DEFER#

21-

H_DRDY#

21-

H_DBSY#

21-

H_BREQ#0

34-

H_INIT#

21-

H_LOCK#

21-

H_CPURST#

21-

H_TRDY#

21-

H_HIT#

21-

H_HITM#

14-

H_BPM5_PREQ#

14-

H_TCK

14-

TDI_FLEX

14-

H_TMS

35-

XDP_DBRESET#

18-

H_THERMDA

18-

H_THERMDC

18-,19-,34-

PM_THRMTRIP#

13-

CLK_R_CPUBCLK

13-

CLK_R_CPUBCLK#

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

H_RS#(0)
H_RS#(1)
H_RS#(2)

R146

12

54.9_1%

R148

12

150_5%

R147

12

39_5%

R145

12

27_5%

TP36

21-

14-

14-

14-

14-

+VCCP

CLOSED TO CPU

H_BPM5_PREQ#

TDI_FLEX

H_TMS

H_TCK

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

1

R83

56_5%

2

H_TRST#

1

R140

619_1%

2

PM_THRMTRIP# should be T at CPU

CHANGE by

IEC951098

27-Aug-2007

INVENTEC

TITLE

PS10S

Merom-1

SIZE

A3

DOC. NUMBERCODE

Model_No X01

CS

SHEET

REV

OF

6314

H_D#(63:0)

H_DSTBN#0
H_DSTBP#0

H_DINV#0

H_D#(63:0)

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

1

R581

1K_1%

2

1

2

R582

2K_1%

GTLREF

Layout note: Zo=55 ohm,

0.5" max for GTLREF.

15-,21-

21­21­21-

15-,21-

H_DSTBN#1
H_DSTBP#1

H_DINV#1

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

CN505-2

H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)

H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)

21­21­21-

13-,19­13-,19­13-,19-

1

2

R593

OPEN

1

2

R575

OPEN

C615

1

OPEN

2

Place C615 close to the TEST4 pin.
Make sure TEST4 routing is reference
to GND and away from other noisy signals.

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

DATA GRP 0

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

DATA GRP 1

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

MISC

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

FOX_PZ4782K_274M_41_478P

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#

DATA GRP 2DATA GRP 3

D41#
D42#
D43#
D44#
D45#
D46#

D47#
DSTBN2#
DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63#
DSTBN3#
DSTBP3#

DINV3#

COMP0
COMP1
COMP2
COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

1

2

R612

OPEN

1

R613

OPEN

2

H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)

H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)

12

R576 27.4_1%

12

R577 54.9_1%

12

27.4_1%R141

12

R142 54.9_1%

11-,19-,34-

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

21­21­21-

CLOSED TO CPU

34-

H_DPSLP#

21-

H_DPWR#

34-

H_PWRGD

21-

H_CPUSLP#

11-

PSI#

H_DSTBN#3
H_DSTBP#3
H_DINV#3

H_DPRSTP#

15-,21-

H_D#(63:0)

21-

H_DSTBN#2

21-

H_DSTBP#2

21-

H_DINV#2

15-,21-

H_D#(63:0)

COMP[0,2] , Z0=27.4ohm
COMP[1,3] , Z0=54.9ohm

Trace length less than 0.5 inch

CHANGE by

IEC951098 30-Nov-2007

INVENTEC

TITLE

PS10S

Merom-2

DOC. NUMBER

CODE

SIZE

A3

Model_No X01

CS

SHEET

REV

OF

6315

+VCC_CORE

11-,16-

C79

12

3

900uF_2.5v

CN505-3

A7

VCC001

A9

VCC002

A10

VCC003

A12

VCC004

A13

VCC005

A15

VCC006

A17

VCC007

A18

VCC008

A20

VCC009

B7

VCC010

B9

VCC011

B10

VCC012

B12

VCC013

B14

VCC014

B15

VCC015

B17

VCC016

B18

VCC017

B20

VCC018

C9

VCC019

C10

VCC020

C12

VCC021

C13

VCC022

C15

VCC023

C17

VCC024

C18

VCC025

D9

VCC026

D10

VCC027

D12

VCC028

D14

VCC029

D15

VCC030

D17

VCC031

D18

VCC032

E7

VCC033

E9

VCC034

E10

VCC035

E12

VCC036

E13

VCC037

E15

VCC038

E17

VCC039

E18

VCC040

E20

VCC041

F7

VCC042

F9

VCC043

F10

VCC044

F12

VCC045

F14

VCC046

F15

VCC047

F17

VCC048

F18

VCC049

F20

VCC050

AA7

VCC051

AA9

VCC052

AA10

VCC053

AA12

VCC054

AA13

VCC055

AA15

VCC056

AA17

VCC057

AA18

VCC058

AA20

VCC059

AB9

VCC060

AC10

VCC061

AB10

VCC062

AB12

VCC063

AB14

VCC064

AB15

VCC065

AB17

VCC066

AB18

VCC067

FOX_PZ4782K_274M_41_478P

VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099

VCC0100

VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16

VCCA01
VCCA02

VCCSENSE

VSSSENSE

+VCC_CORE

11-,16-

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6

VID0

AF5

VID1

AE5

VID2

AF4

VID3

AE3

VID4

AF3

VID5

AE2

VID6

AF7

AE7

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

1

220uF_2v_15mR_Panasonic

2

11-

H_VID0

11-

H_VID1

11-

H_VID2

11-

H_VID3

11-

H_VID4

11-

H_VID5

11-

H_VID6

C641

+VCC_CORE

11-,16-

1

R615

100_1%

2

1

R614

100_1%

2

11-

11-

+VCCP

9-,13-,14-,15-,16-,21-,23-,24-,34-,37-,63-

C662

1
2

0.1uF_16v

VCCSENSE

VSSSENSE

C664

1
2

0.1uF_16v

LAYOUT NOTE:
PLACE C2461 NEAR PIN B26

PLACE THESE INSIDE SOCKET
CAVITY ON L8 (NORTH SIDE
SECONDARY)

C628

C626

1

1

2

2

0.1uF_16v

0.1uF_16v

8-,9-,24-,34-,35-,37-,43-,46-,52-,63-

C609

0.01uF_16v

1
2

+V1.5S

C663

0.1uF_16v

1
2

C627

1
2

0.1uF_16v

1

10uF_6.3v

2

C610

LAYOUT NOTE:
ROUTE VCCSENSE AND VSSSENSE TRACE AT

24.7 OHM WITH 50 MIL SPACEING
PLACE PU AND PD WITHIN I INCH OF CPU

CHANGE by

IEC951098 1-Nov-2007

INVENTEC

TITLE

PS10S

Merom-3

SIZE

A3

DOC. NUMBER REV

CODE

Model_No X01

CS

SHEET

OF

6316

CN505-4

A4

VSS001

A8

VSS002

A11

VSS003

A14

VSS004

A16

VSS005

A19

VSS006

A23

VSS007

AF2

VSS008

B6

VSS009

B8

VSS010

B11

VSS011

B13

VSS012

B16

VSS013

B19

VSS014

B21

VSS015

B24

VSS016

C5

VSS017

C8

VSS018

C11

VSS019

C14

VSS020

C16

VSS021

C19

VSS022

C2

VSS023

C22

VSS024

C25

VSS025

D1

VSS026

D4

VSS027

D8

VSS028

D11

VSS029

D13

VSS030

D16

VSS031

D19

VSS032

D23

VSS033

D26

VSS034

E3

VSS035

E6

VSS036

E8

VSS037

E11

VSS038

E14

VSS039

E16

VSS040

E19

VSS041

E21

VSS042

E24

VSS043

F5

VSS044

F8

VSS045

F11

VSS046

F13

VSS047

F16

VSS048

F19

VSS049

F2

VSS050

F22

VSS051

F25

VSS052

G4

VSS053

G1

VSS054

G23

VSS055

G26

VSS056

H3

VSS057

H6

VSS058

H21

VSS059

H24

VSS060

J2

VSS061

J5

VSS062

J22

VSS063

J25

VSS064

K1

VSS065

K4

VSS066

K23

VSS067

K26

VSS068

L3

VSS069

L6

VSS070

L21

VSS071

L24

VSS072

M2

VSS073

M5

VSS074

M22

VSS075

M25

VSS076

N1

VSS077

N4

VSS078

N23

VSS079

N26

VSS080

P3

VSS081

FOX_PZ4782K_274M_41_478P

VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

CHANGE by

INVENTEC

TITLE

PS10S

Merom-4

CODE

CS

SHEET

DOC. NUMBER

OF

17 63

REV

X01Model_No

SIZE

31-Jul-2007IEC951098

A3

+V5S

8-,9-,11-,12-,30-,32-,35-,37-,40-,41-,47-,48-,49-,53-,54-,56-,59-,63-

FAN1_DAC0_3

U501

1

FON

2

1

C548

2.2uF_10v

53-

2

VIN

3

VO

4

VSET

8

GND

7

GND

6

GND

5

GND

GMT_G995P1U_SOP8_8P

9-,11-,12-,13-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

1
2

C535

2.2uF_10v

1
2
3

CN501

1
2
3

G

G1
G2

G

+V3S

ACES_85205_0300N_3P

7-,18-,53-

1
2

+V5LA

5-,6-,7-,12-,55-

12

150_5%

0.1uF_10v

R629

C701

FAN CN

U511

R630

12

1

5

SETVCC

23.2K_1%

2

GND

43

HYST

1
2

GMT_G708T1U_SOT23_5P

OT

Thermal shoutdown at 89C +/-3C from 60C to 100C
RSET=0.0012*T - 0.9308*T+96.147
Hysteresis is 30C

2

H_THERMDA
H_THERMDC

THRM_SHUTDWN#

14­14­7-,18-,53-

1

R532

10K_5%

2

53-

C534

0.01uF_50v

THRM_SHUTDWN#

12

R901

12

R902

FAN_TACH1

0_5%
0_5%

PM_THRMTRIP#

C19

12

2200pF_50v

1

2

R11

OPEN

VR_PWRGD

R631

12

14-,19-,34-

330_5%

+V3LA

6-,7-,12-,34-,50-,53-,55-,59-,61-,63-

1

C20

2

0.1uF_16v

U1

1

VCC

2

DXP

3

DXN

4

THERM#

GMT_G784_MSOP_8P

11-,35-

Q522

2

2SC2411K

SMBCLK

SMBDATA

ALERT#

1

R619

2M_5%

2

SSM3K7002FU

3

C

B

E

1

8
7
6
5

GND

5-,53­5-,53-

C680

1
2

OPEN

EC_CLK
EC_DATA

Q521
1

7-,18-,53-

THRM_SHUTDWN#

3

D

G

S

2

Thermal Sensor For CPU

CHANGE by

IEC951098

29-Sep-2007

INVENTEC

TITLE

PS10S

THERMAL&FAN CONTROLLER

SIZE

A3

DOC. NUMBER

CODE REV

Model_No X01

CS

SHEET

OF

6318

MCH_CFG(5)

MCH_CFG(13:12)

XOR/ALLZ

NOTE: CFG[2:0] STRP : 001b : 533 MT/S

+V1.8

8-,12-,19-,23-,24-,26-,27-,63-

LOW=DMIx2
HIGH=DMIx4

00=PARTIAL CLOCK GATING DISABLE
01=XOR MODE ENABLE
10=ALL-Z MODE ENABLE
11=NORMAL OPERATION

011b : 667 MT/S

1

R587

20_1%

2

1

R588

20_1%

2

19-

19-

MCH_CFG(7)

(CPU Strap)

SM_RCOMP

SM_RCOMP#

LOW=RSVD
HIGH=Mobile CPU

MCH_CFG(16)
(FSB Dynamic
ODT)

+V3S

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20)

MCH_CFG(8)

MCH_CFG(18)

VCC SELECT

MCH_CFG(20)

(PCIE BACKWARD

INTERPOERABILITY

MODE

12

R129 10K_5%

12

+V3S

9-,11-,12-,13-,18-,19-,20-,24-,26-,27-,30-,32-,33-,34-,35-,36-,37-,40-,41-,43-,44-,46-,49-,52-,53-,54-,55-,56-,57-,59-,63-

19-

19-

19-

19-

LOW=1.05V
HIGH=1.5V

LOW=ONLY SDVO OR PCIE X1 IS

OPERATIONAL

HIGH=SDVO AND PCIE X1 ARE
OPERATING SIMULTANEOUSLY

VIA THE PEG PORT

1

2

10K_5%R124

R97

OPEN

19-,26-

19-,27-

1

R130

OPEN

2

MCH_CFG(19)
(DMI LANE
REVERSAL)

PM_EXTTS#0
PM_EXTTS#1

1

R125

OPEN

2

LOW=NORMAL
HIGH=LANES REVERSED

1

2

R84

OPEN

MCH_CFG(9)
PCIE Graphics
Lane

LOW=Dynamic ODT

HIGH=Dynamic ODT

MCH_CFG(17:3)

MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20)

BM_BUSY#

H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1

PM_PWROK

PLT_RST#

PM_THRMTRIP#

PM_DPRSLPVR

Disable

Enable

LOW=Reverse Lane
HIGH=Normal operation

MCH_CFG(11)

PSB 4X CLK

ENABLE

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

19-

19­19­19-

35­11-,15-,34­19-,26­19-,27­11-,19-,35­36-,53­14-,18-,34­11-,35-

MA_A(14)
MB_A(14)

13-,15­13-,15­13-,15-

R105

LOW=CALISTOGA
HIGH=RESERVED

26-,28­27-,28-

1

1

2

2

R103

R592

1K_5%

1K_5%

MCH_CFG(3)
MCH_CFG(4)
MCH_CFG(5)
MCH_CFG(6)
MCH_CFG(7)
MCH_CFG(8)
MCH_CFG(9)
MCH_CFG(10)
MCH_CFG(11)
MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(14)
MCH_CFG(15)
MCH_CFG(16)
MCH_CFG(17)

12

1

2

R591

1K_5%

100_5%

U509-2

P36

RSVD1

P37

RSVD2

R35

RSVD3

N35

RSVD4

AR12

RSVD5

AR13

RSVD6

AM12

RSVD7

AN13

RSVD8

J12

RSVD9

AR37

RSVD10

AM36

RSVD11

AL36

RSVD12

AM37

RSVD13

D20

RSVD14

H10

RSVD20

B51

RSVD21

BJ20

RSVD22

BK22

RSVD23

BF19

RSVD24

BH20

RSVD25

BK18

RSVD26

BJ18

RSVD

RSVD27

BF23

RSVD28

BG23

RSVD29

BC23

RSVD30

BD24

RSVD31

BJ29

RSVD32

BE24

RSVD33

BH39

RSVD34

AW20

RSVD35

BK20

RSVD36

C48

RSVD37

D47

RSVD38

B44

RSVD39

C44

RSVD40

A35

RSVD41

B37

RSVD42

B36

RSVD43

B34

RSVD44

C34

RSVD45

P27

CFG_0

N27

CFG_1

N24

CFG_2

C21

CFG_3

C23

CFG_4

F23

CFG_5

N23

CFG_6

G23

CFG_7

J20

CFG_8

C20

CFG_9

R24

CFG_10

L23

CFG_11

J23

CFG_12

E23

CFG_13

E20

CFG_14

K23

CFG_15

M20

CFG_16

M24

CFG_17

L32

CFG_18

N33

CFG_19

L35

CFG_20

G41

PM_BM_BUSY#

L39

PM_DPRSTP#

L36

PM_EXT_TS#_0

J36

PM_EXT_TS#_1

AW49

PWROK

AV20

RSTIN#

N20

THRMTRIP#

G36

DPRSLPVR

BJ51

NC1

BK51

NC2

BK50

NC3

BL50

NC4

BL49

NC5

BL3

NC6

BL2

NC7

BK1

NC8

BJ1

NC9

E1

NC10

A5

NC11

C51

NC12

B50

NC13

A50

NC14

A49

NC15

BK2

NC16

ITL_CRESTLINE_FCBGA_TSB_1299P

CFG

NC

PM

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

DMI

ME

SDVO_CTRL_CLK

SDVO_CTRL_DATA

MISC

MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(16)

MCH_CFG(9)
MCH_CFG(7)
MCH_CFG(5)

MCH_CFG(11)

MCH_CFG(6)

AV29

SM_CK_0

BB23

SM_CK_1

BA25

SM_CK_3

AV23

SM_CK_4

AW30

SM_CK#_0

BA23

SM_CK#_1

AW25

SM_CK#_3

AW23

SM_CK#_4

BE29

SM_CKE_0

AY32

SM_CKE_1

BD39

SM_CKE_3

BG37

SM_CKE_4

BG20

SM_CS#_0

BK16

SM_CS#_1

DDR MUXING

BG16

SM_CS#_2

BE13

SM_CS#_3

BH18

SM_ODT_0

BJ15

SM_ODT_1

BJ14

SM_ODT_2

BE16

SM_ODT_3

BL15

SM_RCOMP

BK14

SM_RCOMP#

SM_VREF_0
SM_VREF_1

DPLL_REF_CLK
DPLLREF_CLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3

DFGT_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

CLK_REQ#

ICH_SYNC#

TEST_1
TEST_2

BK31
BL31

AR49
AW4

B42
C42
H48
H47

K44
K45

AN47
AJ38
AN42
AN46

AM47
AJ39
AN41
AN45

AJ46
AJ41
AM40
AM44

AJ47
AJ42
AM39
AM43

E35
A39
C38
B39
E36

AM49
AK50
AT43
AN49
AM50

H35
K36
G39
G40

A37
R32

SM_RCOMP_VOH
SM_RCOMP_VOL

GRAPHICS VID

19­19­19­19­19­19­19-

19-

12

0_5%

R133

R131

12

20K_5%

DMI_TXN(0)
DMI_TXN(1)
DMI_TXN(2)
DMI_TXN(3)

DMI_TXP(0)
DMI_TXP(1)
DMI_TXP(2)
DMI_TXP(3)

DMI_RXN(0)
DMI_RXN(1)
DMI_RXN(2)
DMI_RXN(3)

DMI_RXP(0)
DMI_RXP(1)
DMI_RXP(2)
DMI_RXP(3)

11-,19-,35-

1

2

R610

0_5%

1

35­35-

35-

33­33­13­35-

CHANGE by

2

R99

OPEN

26­26­27­27-

26­26­27­27-

26-,28­26-,28­27-,28­27-,28-

26-,28­26-,28­27-,28­27-,28-

26-,28­26-,28­27-,28­27-,28-

19­19-

19­19-

8-,26-,27-

13-

CLK_R_PEG_MCH

13-

CLK_R_PEG_MCH#

35-

DMI_TXN(3:0)

8-,12-,19-,23-,24-,26-,27-,63-

35-

DMI_TXP(3:0)

35-

DMI_RXN(3:0)

35-

DMI_RXP(3:0)

CL_CLK0

CL_DATA0
PM_PWROK
CL_RST#0

SDVO_CLK
SDVO_DATA
CLKREQ_R_MCH#
MCH_ICH_SYNC#

1

R98

OPEN

2

MA_CLK_DDR1
MA_CLK_DDR2
MB_CLK_DDR1
MB_CLK_DDR2

MA_CLK_DDR1#
MA_CLK_DDR2#
MB_CLK_DDR1#
MB_CLK_DDR2#

MA_CKE0
MA_CKE1
MB_CKE0
MB_CKE1

MA_CS0#
MA_CS1#
MB_CS0#
MB_CS1#

MA_ODT0
MA_ODT1
MB_ODT0
MB_ODT1

SM_RCOMP

SM_RCOMP#
SM_RCOMP_VOH

SM_RCOMP_VOL

M_VREF

+V1.8

1

R609

1K_0.5%

2

1

R607

3K_1%

2

1

R608

1K_0.5%

2

IEC951098

1

2

1
2

R89

OPEN

C666

C655

1
2

0.01uF_16v

C654

1
2

0.01uF_16v

+V1.25S

0.1uF_16v

1

R91

OPEN

2

9-,24-,37-

1

R618

1K_1%

2

1

R617

392_1%

2

30-Nov-2007

1
2

1
2

1

1

R96

R87

OPEN

OPEN

2

2

19-

C652

SM_RCOMP_VOH

2.2uF_10v

19-

C633

SM_RCOMP_VOL

2.2uF_10v

INVENTEC

TITLE

PS10S

Crestline-1

CODE

SIZE

A3

CS

SHEET

13-

CLK_R_DREF

13-

CLK_R_DREF#

13-

CLKSS1_R_DREF

13-

CLKSS1_R_DREF#

DOC. NUMBER

19 63

1

2

R86

OPEN

1

R94

OPEN

2

REV

X01Model_No

OF