Toshiba MK6017MAP User Manual

TOSHIBA

Storage Device Division

MK6017MAP

(HDD2155)

HARD DISK DRIVE

PRODUCT SPECIFICA TION

Rev 00

October 2000

DOCUMENT NUMBER

14603

360014937



No.5T03670‑2D 

ＴＯＳＨＩＢＡ



ＴＩＴＬＥ：

REV No.

00 

      

  

                        

2.5 inch Disk Drives MK6017MAP Product Specification



APP’D



保管日

STGE.PER.



日 付



DATE

2000‑10‑06

       



  

Initialissue

   

記事

CONTENTS



部 門



DEP.

D‑SETSU2

   



担 当

REVISED

A.Iwata



承 認

M.Hattori









No.



ＴＯＳＨＩＢＡ ＣＯＲＰＯＲＡＴＩＯＮ

- 502 -

３６００１４９３７

３６００１４９３７３６００１４９３７

CONT.ON503

PAGENo.502





360014937

ＳＡＦＥＴＹ

ＳＡＦＥＴＹＳＡＦＥＴＹ

The hard disk drive and product specificat ions contain essential infor mation for the protection of users and others from possible injury and property damage and t o ensure correct handling. Please check that you fully understand the def inition of the f ollowing messages (s igns and graphical symbols) before going on to read the text, and always follow the instructions. Please describe requirements in the instr uction manual of t he product in which the drive is mounted and ensure that users are made thoroug hly aware of them.

IMPORTANT MESSAGES

Read this manual and follow its instructions. Sig nal words such as CAUTION and NOTE, will be followed by important safet y information t hat must be caref ully reviewed.

NOTE

LIMITATION OF LIABILITY



・Toshiba Corporation shall not be liable for any damage due to the fault or negligence

of users, fire, ear thquake, or ot her accident beyond the control of T oshiba Corporation.

・Toshiba Corporation shall not be liable for any incidental or consequential damages

including but not limited to change or loss of stored data, loss of profit, or interruption of business, which are caused by use or non-usability of t he product.

・Toshiba Corporation shall not be liable for any damage result fr om failure to com ply

Indicates a potentially hazardous situation which if not avoided, may result in minor injury or property damage.

Gives you helpful information.

with the contents in the product specification.

・Toshiba Corporation shall not be liable for any damage based on use of the product

in combination with connection devices, software, or other devices provided by Toshiba Corporation with the product.



-

503 -

360014937

 

USAGE RESTRICTIONS



● Since the drive is not designed or manufactured t o be used for a system including equipment (*1) directly link ed with human life, etc., T oshiba Corporation shall not

be liable for this type of use.

*1: Equipment directly linked with human life, etc. corresponds to t he following.

−Medical equipment such as life support systems, equipm ent used in operations，etc.

● When the drive is to be used f or a system including equipment (*2) linked with

human safety or having a serious influence on the saf e maintenance of public function, etc., special considerat ion (*3) must be given with regard to oper ation,

maintenance, and management of the system. *2: A system including equipment linked with human safety or having a ser ious influence on the safe maint enance of public function, et c. corresponds to the following.

−A main equipment control system used in atomic power plants, a safety protection based system used in atomic facilities, other important

safety lines and systems.

−An operation control system for mass t ransport, an air-tr affic control system.

*3: Special consideration means that a saf ety system (fool proof design, f ail saf e design, redundancy design, etc. ) is established as a result of

adequate consultation with Toshiba engineers.

- 504 -

360014937

SAFETY





■ Do not disassemble, remodel or r epair .  Disassembly, remodeling or repair may cause injury, failure, or data loss.

■■■■ Do not drop.  Dropping may cause injury.



■ Do not touch sharp edges or pins of the drive.  Sharp protrusions etc. may cause injury.

 Hold the drive by both sides when carrying it.

-

505 -

360014937

S

AFETY



Observe the following to prevent failure, malfunction or dat a loss.

 

●

Follow the specifications for 6. PO WER SUPPLY (page516), 8. ENVIRONMENT (page 522,

523), etc. when using.

NOTE



Failure to do so may cause damage to the drive.

●

Observe cautions in 7.4 MOUNTING INSTRUCT ION (page517) and 9.6 LOAD / UNLOAD



(page525 ) when handling, setting up, or using the drive.

●

Take anti-static measur es in order to avoid damage to the drive when handling it.



The drive uses parts susceptible to damage due to ESD (electrostatic discharge).



Wear ESD proof wrist strap in accordance with the usage specified when handling a drive that is not in an

anti-static protection bag.

●

There is a certain probability of the drive causing failure including data error or data loss.



Take preventive steps such as backing up data etc. without exception in order to prevent loss etc. in cases

where data loss may result in loss or damage.



Please include this in the instruction manual etc. of the system in which this device is used and ensure that users

are made thoroughly aware of it.

●

Inserting or pulling out t he dr ive when the power is turned on may cause damag e t o the

drive.



Exchange the drive etc. after the power of HDD is turned off.

●

Extreme shock to the drive may cause damage to it, data corruption, etc..



Do not subject the drive to extreme shock such as dropping, upsetting or crashing against other objects.

●

Do not touch the top cover since application of force to it may cause damage to the drive.

●

Do not stack the drive on another drive or on other par t s et c. or stack them on top of it during

storage or transportation.



Shock or weight may cause parts distortion etc..

●

Labels and the like attached to the drive are also used as a seal for maintenance of its

performance.



Do not remove them from the drive.

●

Attachment of dielectric m aterials such as metal powder, liquid, etc. to live parts such as

printed circuit board patterns or pins et c. may cause damage to the drive.



Avoid attachment of these materials.

●

Do not place objects which generate magnetic fields such as magnets, speakers, etc. near

the drive.

Magnetism may cause damage to the drive or data loss.

- 506 -

360014937

TABLE OF CONTENTS

1. SCOPE ......................................................................................................................................................................... 511

2. GENERAL DESCRIPTION....................................................................................................................................... 511

3. KEY FEATURES........................................................................................................................................................ 513

4. BASIC SPECIFICATION.......................................................................................................................................... 514

5. PERFORMANCE ....................................................................................................................................................... 515

6. POWER REQUIREMENTS...................................................................................................................................... 516

6.1 S

UPPLY VOLTAGE

.................................................................................................................................................. 516

6.1.1 Supply for Logic............................................................................................................................................516

6.1.2 Supply for Motor ........................................................................................................................................... 516

6.2 P

6.3 E

6.4 P

OWER CONSUMPTION NERGY CONSUMPTION EFFICIENCY OWER SEQUENCE

........................................................................................................................................... 516

...................................................................................................................... 516

................................................................................................................................................. 516

7. MECHANICAL SPECIFICATIONS........................................................................................................................ 517

7.1 D

7.2 W

7.3 D

7.4 M

IMENSION

EIGHT

RIVE ORIENTATION

OUNTING INSTRUCTIONS

............................................................................................................................................................. 517

.................................................................................................................................................................. 517

.............................................................................................................................................. 517

..................................................................................................................................... 517

7.4.1 Screwing........................................................................................................................................................ 518

7.4.2 Installation .................................................................................................................................................... 518

8. ENVIRONMENTAL LIMITS ................................................................................................................................... 522

8.1 T

EMPERATURE AND HUMIDITY

.............................................................................................................................. 522

8.1.1 Temperature .................................................................................................................................................. 522

8.1.2 Humidity........................................................................................................................................................ 522

8.2 V

8.3 S

8.4 A

8.5 A

8.6 S

IBRATION

HOCK

LTITUDE COUSTICS

AFETY STANDARDS

8.7 EMC A

............................................................................................................................................................. 522

.................................................................................................................................................................... 522

............................................................................................................................................................... 523

（

S

OUND POWER

）

............................................................................................................................. 523

.............................................................................................................................................. 523

DAPTABILITY

.............................................................................................................................................. 523

9. RELIABILITY............................................................................................................................................................524

9.1 E

RROR RATE

.......................................................................................................................................................... 524

9.1.1 Non- Recoverable Error Rate........................................................................................................................ 524

9.1.2 Seek Error Rate............................................................................................................................................. 524

9.2 M

9.3 P

9.4 R

9.5 P

9.6 L

EAN TIME TO FAILURE

RODUCT LIFE

EPAIR REVENTIVE MAINTENANCE OAD/UNLOAD

........................................................................................................................................................ 524

................................................................................................................................................................... 524

....................................................................................................................................................... 525

(MTTF).......................................................................................................................... 524

(PM)......................................................................................................................... 524

10. HOST INTERFACE ............................................................................................................................................... 526

10.1 C

ABLING

............................................................................................................................................................ 526

10.1.1 Interface Connector................................................................................................................................... 526

10.1.2 Cable ......................................................................................................................................................... 526

10.2 E

LECTRICAL SPECIFICATION

............................................................................................................................... 527

10.2.1 Cable length and capacitance................................................................................................................... 527

10.2.2 DC input/output Characteristics................................................................................................................527

10.3 I

NTERFACE CONNECTOR

..................................................................................................................................... 528

10.3.1 ATA interface connector............................................................................................................................ 528

10.3.2 Pin Assignment.......................................................................................................................................... 529

10.3.3 Signal Treatment ....................................................................................................................................... 530

10.3.4 Series resistance........................................................................................................................................ 531

507 -

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360014937

10.3.5 Signal Description .....................................................................................................................................531

10.4 H

OST INTERFACE TIMING

...................................................................................................................................533

10.4.1 Program I/O Write Timing.........................................................................................................................533

10.4.2 Program I/O Read Timing .........................................................................................................................534

10.4.3 Single Word DMA Write Timing................................................................................................................535

10.4.4 Single Word DMA Read Timing.................................................................................................................536

10.4.5 Multiword DMA Write Timing...................................................................................................................537

10.4.6 Multiword DMA Read Timing....................................................................................................................538

10.4.7 Ultra DMA Timing.....................................................................................................................................539

10.4.8 Reset Timing...............................................................................................................................................548

10.5 G

10.6 A

10.7 R

ROUNDING DDRESS DECODING

EGISTER DESCRIPTION

........................................................................................................................................................548

..........................................................................................................................................549

......................................................................................................................................550

10.7.1 Data Register.............................................................................................................................................550

10.7.2 Error Register............................................................................................................................................551

10.7.3 Features Register (Write Precompensation Register)................................................................................552

10.7.4 Sector Count Register................................................................................................................................552

10.7.5 Sector Number Register.............................................................................................................................553

10.7.6 Cylinder Low Registers.............................................................................................................................. 553

10.7.7 Cylinder High Registers.............................................................................................................................553

10.7.8 Device/Head Register................................................................................................................................554

10.7.9 Status Register...........................................................................................................................................555

10.7.10 Command Register.....................................................................................................................................556

10.7.11 Alternate Status Register............................................................................................................................558

10.7.12 Device Control Register.............................................................................................................................558

10.7.13 Device Address register.............................................................................................................................558

10.8 C

OMMAND DESCRIPTIONS

..................................................................................................................................559

10.8.1 Nop (00h)................................................................................................................................................560

10.8.2 Recalibrate (1xh)..................................................................................................................................... 560

10.8.3 Flush Cache (E7h) ..................................................................................................................................560

10.8.4 Read Sector (20h/21h)............................................................................................................................561

10.8.5 Read Long (22h/23h)..............................................................................................................................561

10.8.6 Write Sector (30h/31h)............................................................................................................................561

10.8.7 Write Long (32h/33h)..............................................................................................................................562

10.8.8 Read Verify (40h)....................................................................................................................................562

10.8.9 Write Verify (3Ch)...................................................................................................................................562

10.8.10 Format Track (50h)...............................................................................................................................563

10.8.11 Seek (7xh)................................................................................................................................................564

10.8.12 Toshiba Specific.........................................................................................................................................564

10.8.13 Execute Diagnostics (90h)......................................................................................................................564

10.8.14 Initialize Device Parameters (91h) .........................................................................................................565

10.8.15 Read Multiple (C4h)................................................................................................................................566

10.8.16 Write Multiple (C5h)...............................................................................................................................567

10.8.17 Set Multiple Mode (C6h).........................................................................................................................568

10.8.18 Read DMA (C8h/C9h).............................................................................................................................568

10.8.19 Write DMA (CAh/CBh) ...........................................................................................................................569

10.8.20 Power Control (Exh)...............................................................................................................................570

10.8.21 Read Buffer (E4h)...................................................................................................................................572

10.8.22 Write Buffer (E8h)...................................................................................................................................572

10.8.23 Identify Device (ECh)..............................................................................................................................573

10.8.24 Set Max Address (F9h)............................................................................................................................586

10.8.25 Read Native Max Address (F8h)...........................................................................................................586

10.8.26 Set Features (EFh)..................................................................................................................................587

10.8.27 SECURITY SET PASSWORD (F1h) .......................................................................................................588

10.8.28 SECURITY UNLOCK (F2h)....................................................................................................................589

10.8.29 SECURITY ERASE PREPARE (F3h)......................................................................................................589

10.8.30 SECURITY ERASE UNIT (F4h)..............................................................................................................590

10.8.31 SECURITY FREEZE LOCK (F5h)..........................................................................................................590

10.8.32 SECURITY DISABLE PASSWORD (F6h) ..............................................................................................591

10.8.33 SMART Function Set..................................................................................................................................592

10.9 S

ECURITY MODE FEATURE SET

..............................................................................................................................609

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360014937

10.9.1 Security mode default setting..................................................................................................................... 609

10.9.2 Initial setting of the user password............................................................................................................ 609

10.9.3 Security mode operation from power-on................................................................................................... 610

10.9.4 Password lost............................................................................................................................................. 611

10.9.5 Command Table ........................................................................................................................................ 612

10.10 S

ELF-MONITORING

, A

NALYSIS AND REPORTING TECHNOLOGY

......................................................................... 613

10.10.1 Attributes...................................................................................................................................................613

10.10.2 Attributes values........................................................................................................................................ 613

10.10.3 SMART function default setting................................................................................................................. 613

10.11 A

DAPTIVE POWER MODE CONTROL

................................................................................................................... 614

10.11.1 Performance Idle....................................................................................................................................... 614

10.11.2 Active Idle.................................................................................................................................................. 614

10.11.3 Low Power Idle.......................................................................................................................................... 614

10.11.4 Transition time........................................................................................................................................... 614

10.12 R

10.13 M

10.14 C

................................................................................................................................................................. 615

ESET

ASTER/SLAVE CONFIGURATION

ACHE MEMORY

................................................................................................................................................ 617

....................................................................................................................... 616

10.14.1 Cache Operations...................................................................................................................................... 617

10.14.2 Notes for write cache................................................................................................................................. 617

10.15 A

UTOMATIC WRITE REALLOCATION

.................................................................................................................. 617

11. PROTOCOL............................................................................................................................................................ 618

11.1 PIO

11.2 PIO

11.3 N

11.4 DMA

11.5 U

11.6 O

DATA IN COMMANDS DATA OUT COMMANDS

ON-DATA COMMANDS

DATA TRANSFER COMMANDS

DMA...................................................................................................................................................... 623

LTRA THER TIMINGS

................................................................................................................................... 619

................................................................................................................................ 620

...................................................................................................................................... 621

................................................................................................................... 622

.................................................................................................................................................. 626

-

509 -

360014937

Table of Figures

F

IGURE

F

IGURE

F

IGURE

F

IGURE

F

IGURE

F

IGURE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

T

ABLE

1 MK6017MAP D

OUNTING RECOMMENDATION

2 M 3 ATA 4 P 5 U 6 O

7.4-1 D

10.3-1 S

10.3-2 S

10.6-1 R

10.6-2 D

10.7-1 D

10.7-2 C

10.8-1 I

10.8-2 I

10.8-3 I

10.8-4 I

10.9-1 S

10.12-1 I

11.6-1 O

INTERFACE CONNECTOR

ASSWORD SET SECURITY MODE POWER-ON FLOW SER PASSWORD LOST

PTIONAL JUMPER FOR MASTER/SLAVE

IMENSIONS

IGNAL PIN ASSIGNMENT IGNAL TREATMENT

EGISTER MAP ECODE LOGIC

IAGNOSTIC MODE ERROR REGISTER

OMMAND CODE DENTIFY INFORMATION DENTIFY INFORMATION (CONTINUED DENTIFY INFORMATION (CONTINUED DENTIFY INFORMATION (CONTINUED

ECURITY MODE COMMAND ACTIONS

NITIALIZATION OF TASK FILE REGISTERS

THER TIMINGS

IMENSIONS

.............................................................................................................................519

......................................................................................................................521

..............................................................................................................................528

.....................................................................................................................................611

......................................................................................................................................................520

...............................................................................................................................529

......................................................................................................................................530

..............................................................................................................................................549

.............................................................................................................................................549

..........................................................................................................................................557

...................................................................................................................................574

. ..............................................................................................................................................626

.......................................................................................610

..............................................................................................................616

...............................................................................................................552

)............................................................................................................575

)............................................................................................................576

)............................................................................................................577

.............................................................................................................612

.......................................................................................................615

- 510 -

1. SCOPE

This document describes the specifications of the following model, MK6017MAP of 2.5- inch type Winchester disk drives.

.

360014937

Factory Number

Sales Number

HDD2155 MK6017MAP

2. GENERAL DESCRIPTION

MK6017MAP

The a series of intelligent disk drives .

The drive features an ATA-2 / 3 / 4 /5 interface embedded controller that requires a simplified adapter board for interfacing to an AT or AT compatible bus. The drives employ Winchester technology and a closed loop

servo control system which have made high recording density of 34.6 M bit/mm2 (22.35G bit/in2)and average access time of 13 msec with highest reliability of 300,000 hours for MTTF (Mean Time to Failure) possible.

The drive is distinctive for its small and light body with 9.5mm height and 92 grams of weight.

MK6017MAP

The sealed module which contains a disk spindle assembly, a head actuator assembly and an air filtration system. This HDA adopts Winchester technology which enhances high reliability. The actuator is a rotary voice coil motor which enables high-speed access.

The disk is driven directly by a DC spindle motor. Air filtration is provided by a high performance air filtration system using both breather and circulation filters.

which is noted hereinafter as 

consists of an HDA (Head Disk Assembly) and a printed circuit board. The HDA has a

MK6017MAP

 or as  the drive  comprises

The drive provides a carriage lock mechanism which is activated automatically upon power down in order to prevent head/media from being damaged when it is not operating or under shipment.

The printed circuit board which is set externally to the HDA and equipped with all the electric circuitry necessary to operate the drive except the head drivers . The power supply and interface signal connectors are mounted on the board. Only the head control IC’s are located within the HDA. The circuitry perform the following functions:

Read/Write, Task File Control, Spindle Motor Control, Seek and Head Positioning Servo Control, Abnormal Condition Detection and Shock Sensor Control.

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511 -

360014937



SAFETY

●There is a certain probability of the drive causing failure including data error or data

 Take preventive steps such as backing up data etc. without exception in order t o

loss.

Do not disassemble, remodel or repair.

■■■■

Disassembly, remodeling or repair may cause injur y,



failure, or data loss.

NOTE

 prevent loss etc. in cases where data loss may result in loss or damage.

●Do not touch the top cover since application of force to it may cause damage to the

drive.

●Do not stack the drive on another drive or on other par t s et c. or stack them on top of it during storage or transportation.

 Shock or weight may cause parts distortion etc. .

●Labels and the like attached to the drive are also used as herm et ic sealing for

maintenance of its performance.

 Do not remove them from t he dr ive.

- 512 -

3. KEY FEATURES

High capacity in smallest size

•

. 2.5inch-type 1platters accommodating formatted capacity of 6.007GB,

.

Slim ( 9.5 mm in height ) and light (92 gram in weight) design.

Fast access and fast transfer rate

•

. Quick spin up of Spindle Motor 4 sec.

. Average access time 13 msec enabled by optimized balance of a head actuator assembly and an efficiently

designed magnet of rotary VCM.

. Bus transfer rate up to 66.7 megabytes per second and disk transfer 253 megabits maximum per second.

. Read ahead cache and write cache enhancing system throughput.

Intelligent Interface

•

360014937

.

ATA-2/ATA-3/ATA-4/ATA-5 interface supported.

.

Ultra66 supported.

.

Quick address conversion in translation mode.

.

Translation mode which enables any drive configuration.

.

LBA (Logical Block Address) mode.

. Single/Multi word DMA,Ultra-DMAmodesand Advanced PIO mode supported.

Data integrity

•

. Automatic retries and corrections for read errors.

. 368 bit computer generated ECC polynomial with 17 bit five burst and 113 bit single burst on-the-fly error

correction capability or 17 bit seven burst and 161 bit single burst error correction capability at retry. High reliability

•

. Powerful self- diagnostic capability.

. Shock detection with shock sensor circuit for high immunity against operating shock up to 1470 m/s2

( 150 G ).

. Automatic carriage lock secures heads on the ramp with high immunity against non operating shock up to

6,860 m/s2 (700G). Low power consumption

•

. Low power consumption by Adaptive Power Mode Control .

513 -

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360014937

4. BASIC SPECIFICATION

MODEL MK6017MAP Formatted Capacity( gigabytes ) 6.007 Servo design method Sector Servo

Recording method 32/34 TC-MEEPR4+PP Recording density Track / mm (TPI ) 1667 (42.3k) Bit / mm ( BPI ) 20.8k (528k ) max. Flux change / mm ( FRPI ) 22.1k(561k ) max. Number of disks 1 Number of data heads 1 Number of user data cylinders 24,800 Bytes per sector 512

- 514 -

5. PERFORMANCE

Access time ( msec ) <*1> Track to track seek <*2> 3 Average seek <*3> 13



Rotation speed ( RPM ) 4,200 + 0.1% Average Latency Time ( msec ) 7.14 Internal Transfer rate ( Mbits / sec )

Host Transfer rate ( Mbytes / sec ) Ultra DMA mode 66.7 PIO mode 16.6 Sector Interleave 1:1 Track skew Yes Buffer size ( Kbytes ) 256 Cache Read Ahead Cache

Start time <*5> Recovery time from Stand- by <*5> 4 sec ( Typical ) Command Overhead ( msec ) 1

<*1> Under the condition of normal voltage, 25oC normal temperature and bottom side down.

Max. seek <*4> 24

133.0〜253.5

Write Cache

4 sec ( Typical )

( Up to Drive Ready)

20 sec ( Maximum ) 20 sec ( Maximum )

360014937

<*2> Average time to seek all possible adjacent track without head switching. <*3> Weighted average time to travel between all possible combination of track calculated as below. Weighted average access time = [ Sum of P(n)*t(n) ] / [ Sum of P(n) ], n = 1 to N.

Where, N ; Total number of tracks. P(n); Total number of seek for stroke n [ = 2*(N - n) ].

t(n); Average seek time for stroke n. Average seek time to seek to stroke n is the average time to 1,000 seeks for stroke n, with random head switch.

<*4> Average time for 1,000 full stroke seeks with random head switches.

<*5> Typical values are for the condition of normal voltage, 25oC normal temperature and placing bottom side down. Maximum values are for all conditions specified in this document.

515 -

-

360014937

6. POWER REQUIREMENTS

6.1 Supply Voltage

6.1.1 Supply for Logic

Allowable voltage 5V + 5% Allowable noise/ripple 100 mV p-p or less

6.1.2 Supply for Motor

Allowable voltage 5V + 5% Allowable noise/ripple 100 mV p-p or less

6.2 Power Consumption

Average (note 3) Maximum (note 4) Start 2.7 W Typical 5.6 W (note5) Seek (note 7) 2.3 W Typical 3.8 W (note6) Read / Write(note 8) 1.9 W Typical 3.0 W Active idle (note 1) 0.78 W Typical 0.9 W Low power idle (note 9) 0.58 W Typical 0.8 W Stand- by (note 2) 0.25 W Typical 0.3 W Sleep 0.1 W Typical 0.15 W

(note 1) Motor is rotating at normal speed but none of Read, Write or Seek is executed. (note 2) Motor is not rotating and heads are unloaded on the ramp.

(note 3) Under normal condition ( 25oC, 101.3 kPa ( 1,013 mb ) ) and 5V + (note 4) Under all the specified conditions. (note 5) Only when motor start retry, it may last for 2 seconds. (note 6) Peak value during seek operation (note 7) The seek average current is specified based on three operations per 100 ms. (note 8) The read/write current is specified based on three operations of 63 sector read/write per 100 ms. (note 9) Motor is rotating at normal speed but heads are unloaded on the ramp.

6.3 Energy Consumption Efficiency

Energy consumption efficiency Average(W/GB) Max.(W/GB) Classification

Power consumption at Low power idle / Capacity

Energy consumption efficiency is calculated in accordance with the law regarding efficiency of energy consumption :Energy saving law,1979 law number 49. Calculation of Energy consumption is dividi ng consumed energy by the capacit y. The consumed energy and capacity shall be measured and specified by the Energy saving low.

6.4 Power Sequence

If the 5V Logic is separated from 5V Motor, both lines should be turned on and off at the same time within the time period of one second .

0%.

0.097 0.116 D

- 516 -

7. MECHANICAL SPECIFICATIONS

7.1 Dimension

Width 69.85mm ( 2.75” )

Height 9.5 mm ( 0.37”)

Depth 100.0 mm ( 3.94” )

Figure 1 and Table 7.4-1 show an outline of the drive.

7.2 Weight

92gram(Typ.) 94gram(max.)

7.3 Drive Orientation

The drive can be installed in all axes (6 directions).

7.4 Mounting Instructions

360014937



SAFETY

●

Take anti-static measur es in order to avoid damage to the drive when handling it.

The drive uses parts susceptible to damage due to ESD ( electrostatic discharge).

Wear ESD proof wrist strap in accordance with the usage specified when

handling a drive that is not in an anti-static pr otection bag.

●

Extreme shock to the drive may cause damage to it, data corruption, etc..



Do not subject the drive to extreme shock such as dropping, upsetting or crashing

against other objects.

●

Do not place objects which generate magnetic fields such as magnets, speakers,

etc. near the drive.

Magnetism may cause damage to the drive or data loss.

NOTE



-

517 -

360014937

7.4.1 Screwing

Four screws should be tightened equally with 0.3 N.m ( 3 kgf.cm ) torque. The depth should be 3.0 mm min. and 3.5 mm maximum.

7.4.2 Installation

①

The drive should be mounted carefully on the surface of 0.1mm or less flatness to avoid excessive

distortion.

②

In order to prevent short-circuit under any circumstances, the space of 0.5mm or more should be kept under

the PCB and the design have to be checked carefully (See fig. 2).

③

Enough space should be kept around the drive especially around the convex portion of HDA (See fig. 2) to

avoid any contact with other parts, which may be caused by receiving shock or vibration.

④

The temperature of the top cover and the base must always be kept under 60℃ to maintain the required

reliability. ( If the drive runs continuously or spins-up frequently, the temperature of the top cover may rise to 15℃ maximum. If the drive is used in ambient temperature of 45℃ or more, it should be kept where

adequate ventilation is available to keep the temperature of top cover under 60℃)

⑤

M3 mounting screw holes are tapped directly on the base for electrical grounding between the drive and the

base. In order to prevent the drive performance from being affected by the system noise, appropriate evaluation should be conducted before deciding loading method.

⑥

Be sure not to cover the breathing hole ( See fig. 1) to keep the pressure inside the drive at a certain level.

⑦

Don’t apply any force to the top cover except to the screw areas ( See fig. 2) on top cover. The maximum

force to the specified area is 2N.

⑧ The drive contains several parts which may be easily damaged by ESD(Electric Static Discharge). Avoid

touching the interface connector pins and the surface of PCB. Be sure to use ESD proof wrist strap when handling the drive.

⑨ A rattle heard when the drive is moved is not a sign of failure.

- 518 -

360014937

Figure 1

MK6017MAP Dimensions

UNIT: mm

-

519 -

360014937

SFF-8200 Rev1.1(*)

SFF-8201 Rev1.2 SFF-8212 Rev1.2

Dimension Millimeters Inches Millimeters Inches

A1 A2 A3 A4 69.85 2.750

A5 0.25 0.010 A6 101.85 max 4.010 max

A9 3.99 0.157 A10 10.14 0.399 A11 2.00 0.079 A12 2.00 0.079 A13 0.50 0.020 A14 0.05 0.002 A17 0.50 0.020 A18 0.05 0.002 A21 3.86 0.152 A22 0.20 0.008 A23 3.00 0.118 A26 M3 N/A A28 4.07 0.160 A29 61.72 2.430 A32 M3 N/A A34 1.00 min 0.039 min A35 8.00 max 0.315 max A36 60.20 min 2.370 min A37 8.00 0.315 5.00 0.197 A38 3.00 min 0.118 min 3.50 min 0.137 min A41 2.50 min 0.980 min 3.50 min 0.137 min A50 14.00min 0.551min A51 90.60min 3.567min A52 14.00min 0.551min A53 90.60min 3.567min A54 10.24min 0.403min

(*)SFF-8200,8201,8212:Small Form Factor Standard

− − − − − −

MK6017MAP (Differences only)

9.5 0.374

0.20 0.008

100.00 ±0.41 3.973 ±0.016

3.99 ±0.43 0.157 ±0.017

10.14 ±0.51 0.399 ±0.020

61.72 ±0.30 2.430 ±0.012

14.00 ±0.30 0.551 ±0.012

90.60 ±0.30 3.567 ±0.012

14.00 ±0.30 0.551 ±0.012

90.60 ±0.30 3.567 ±0.012

10.24 ±0.51 0.403 ±0.020

- 520 -

Table 7.4-1 Dimensions

360014937

Figure 2

Mounting Recommendation

-

521 -

360014937

8. ENVIRONMENTAL LIMITS

8.1 Temperature and Humidity

8.1.1 Temperature

Operating

Non- operating

Under shipment

The temperature of top cover and base must be kept under 60℃ at any moment to maintain the desire reliability.

5oC- 55oC Gradient 15oC / Hour maximum

- 20oC- 60oC Gradient 15oC / Hour maximum

- 40oC- 70oC Gradient 30oC / Hour maximum

( Packed in Toshiba’s original shipping package. )

8.1.2 Humidity

Operating 8%- 90% R.H. ( No condensation. ) Non- operating 8%- 90% R.H. ( No condensation. ) Under shipment 5%- 90% R.H. ( Packed in Toshiba’s original shipping package. ) Max. wet bulb 29o

C (Operating)

40oC (Non- operating)

8.2 Vibration

Operating

Non operating 25.4 mm p-p displacement.

9.8 m/s2 ( 1.0G ) 5- 500 Hz Sine wave sweeping 1 oct./ minute No unrecoverable error.

5-10 Hz No unrecoverable error.

49 m/s2 ( 5.0G ) 10- 500 Hz Sine wave sweeping 1 oct./ minute No unrecoverable error.

8.3 Shock

Operating

Non- operating

Under shipment 70 cm free drop

- 522 -

1,470 m/s2 ( 150G ) 2 msec half sine wave Repeated twice maximum / second No unrecoverable error.

6,860 m/s2 ( 700G ) 1 msec half sine wave 1,960 m/s2 ( 200G ) 11 msec half sine wave

Repeated twice maximum / second No unrecoverable error.

No unrecoverable error. Apply shocks in each direction of the drive’s three mutually perpendicular axes, one axis at a time. ( Packed in Toshiba’s original shipping package. )

8.4 Altitude

Operating - 300 m to 3,000 m Non operating - 400 m to 15,000 m

360014937

8.5 Acoustics

36 dBA MAX. For idle mode ( Spindle in rotating ). 39 dBA MAX. For repetition of random seek with full cylinder read operation.

Measurements are to be taken in accordance with ISO 7779.

（（（（

Sound Power

））））

8.6 Safety Standards

The drive satisfies the following standards .

Underwriters Laboratories ( UL ) 1950 Canadian Standard Association ( CSA ) C22.2 No.950 TUV Rheinland EN 60 950

8.7 EMC Adaptability

The drive satisfies the following standards .

EN50081-1 EN55022 : 1994 Class B EN61000-3-2 : 1995 EN61000-3-3 : 1995 EN50082-1 EN61000-4-2 : 1995 EN61000-4-3 : 1998 ENV50204 : 1995 EN61000-4-4 : 1995 EN61000-4-5 : 1995 EN61000-4-6 : 1996 EN61000-4-11 : 1994

-

523 -

360014937

9. RELIABILITY

A failure is defined as an inability of the drive to perform its specified function described in the requirements of this document when being operated under the normal conditions or conditions specified in this document. However , damages caused by operation mistake, mishandling, accidents, system errors and other damages that can be induced by the customers are not defined as failure.

.

9.1 Error Rate

9.1.1 Non- Recoverable Error Rate

1 error per 1013 bits read

The defective sectors allocated to the spare locations in the factory are not counted in the error rate.

9.1.2 Seek Error Rate

1 error per 106 seeks

A seek error is a positioning error recoverable by a retry including recalibration.

9.2 Mean Time to Failure (MTTF)

A failure means that the drive can not execute the function defined in this document under the nominal temperature, humidity and the other conditions specified in this document . Damages caused by operation mistake, mishandling, system failure and other damages occurred under the conditions which are not described in this document are not considered as the failure.

MTTF 300,000 hours Conditions Power on hours 2,800 hours ( 200 days x 14 hours ) / year) Operating hours 600 hours ( 200 days x 3 hours ) / year) Seek hours

Number of load / unload 70 times / hour ( 60,000 times / year ) Environment

1.30 x 106 seeks / month

Normal ( 25oC, 101.3 kPa ( 1,013 mb ) )

9.3 Product Life

5 years or 20,000 power on hours whichever comes earlier

9.4 Repair

A defective drive should be replaced. Parts and subassemblies should not be repaired individually .

9.5 Preventive Maintenance (PM)

No preventive maintenance is required.

- 524 -

9.6 Load/Unload

Be sure to issue and complete the following commands for unloading before cutting off the power supply. 300,000 times of normal Load / Unload can be performed by a command. Unload is executed by the following commands :

Soft Reset

・

Standby

・

Standby Immediate

・

Sleep

・

If the power supply is cut when the head is on a media, Emergency Unload is performed by routing the back-EMF of SPM to the voice coil. In this case, Emergency Unload is performed 20,000 times maximum. Emergency Unload should be used only when the host-system cannot perform normal operation.

360014937

-

525 -

360014937

10. HOST INTERFACE

Related Standards

Information technology - AT Attachment Interface with Extensions (ATA-2)

X3T10.279-199x

Information technology - AT Attachment-3 Interface (ATA-3)

X3T10/2008D Revision 6 October 26, 1995

Information technology - AT Attachment with Packet Interface Extension (ATA -4) T13/1153D Revision 17 October 30, 1997

Information technology - AT Attachment with Packet Interface-5 Interface-5 (ATA-5)

T13/1321D Revision 2 December 13, 1999

10.1 Cabling

10.1.1 Interface Connector

Drive side connector Recommended host side connector for cable Berg 89361-044 or equivalent

for board straight type : Berg 86455-044 86456-044

Yamaichi GAP050K11617 or equivalent

or equivalent

10.1.2 Cable

The following table shows preferable twisted pair type of cable .

Standard diameter 0.32 mm ( 28 AWG ) Characteristics impedance

100- 132 Ω

- 526 -

10.2 Electrical specification

10.2.1 Cable length and capacitance

0.46m MAX. 35pF MAX.

10.2.2 DC input/output Characteristics

10.2.2.1 Input

item unit value voltage high (note 1) V 2.0 to (supply voltage +0.5 ) low V -0.3 to 0.8 leak current

As non-connected logic voltage, input voltage level is from -0.3V to 0.5V.

(note 1) The max. input range of signal is from -0.3V to (supply voltage +0.5V ) (note 2) Except for signal lines pulled up as shown in Table 10.3.3-1

µA

+ 10 (note 2)

360014937

10.2.2.2 Output

item unit value note voltage high V 2.4 min. I low V 0.4 max.

0.4 max.

I I

OH OL OL

= - 1mA = 4mA = 8mA

-

527 -

360014937

10.3 Interface connector

10.3.1 ATA interface connector

43

44

2.00

2.00 × 24 = 48.00

Polarity key

1

2

- 528 -

Figure 3 ATA interface connector

10.3.2 Pin Assignment

The following table describes all of the pins on the Task File Interface.

Table 10.3-1 Signal pin assignment

PIN No. SIGNALS PIN No. SIGNALS

1 - RESET 2 GROUND 3 DD 7 4 DD 8 5 DD 6 6 DD 9 7 DD 5 8 DD 10

9 DD 4 10 DD 11 11 DD 3 12 DD 12 13 DD 2 14 DD 13 15 DD 1 16 DD 14 17 DD 0 18 DD 15 19 GROUND 20 KEY 21 DMARQ 22 GROUND 23 - DIOW 24 GROUND

STOP

25 -DIOR 26 GROUND

-DMARDY HSTROBE

27 IORDY 28 CSEL

-DMARDY

-DSTROBE 29 -DMACK 30 GROUND 31 INTRQ 32 - IOCS16 33 DA 1 34 - PDIAG／-CBLID 35 DA 0 36 DA 2 37 - CS0 38 - CS1 39 - DASP 40 GROUND 41 + 5V (LOGIC) 42 + 5V (MOTOR) 43 GROUND 44 RESERVED

360014937

Note) Symbol (-) in front of signal name shows negative logic.

-

529 -

360014937

10.3.3 Signal Treatment

Driver types and requirements for the signal pull- up and down are as follows. Resistor requirement is minimum for the host.

- IO16 is pulled up in the drive with certain value so that the Vol is obtained to run with a host that has large value of pull up resistor. - CS0 and - CS1 are also pulled up for better noise immunity.

Table 10.3-2 Signal treatment

SIGNAL Driven by TYPE By host By drive

- RESET host TP 10kΩPU DD 0:15 bi-direction TS

DMARQ drive TS 5.6 k Ω PD

- DIOR host TS

-DMARDY HSTROBE

- DIOW host TS STOP

IORDY drive TS 1.0 k Ω PU

-DDMARDY DSTROBE CSEL host GND 10 k Ω PU

- DMACK host TP INTRQ drive TS 10 k Ω PD

- IOCS16 drive OD 1.0 k Ω PU 1.2 k Ω PU DA 0:2 host TP

- PDIAG／-CBLID drive TS 10 k Ω PU

- CS0 - CS1 host TP

- DASP drive OD 10 k Ω PU

TP = Totem Pole, TS = Tri-State, PD = Pull Down, PU = Pull-Up, OD = Open Drain

- 530 -

10.3.4 Series resistance

Each signal has its own series resistance.

SIGNAL SERIAL RESISTANCE VALUE

-DIOR 82Ω

-HDMARDY HSTROBE

-DIOW 82Ω STOP

-CS0, -CS1 82Ω DA0,DA1,DA2 82Ω

-DMACK 82Ω DMARQ 22Ω INTRQ 22Ω IORDY

-DDMARDY DSTROBE

DD０〜DD15 33Ω

22Ω

360014937

10.3.5 Signal Description

SIGNAL DIR. PIN DESCRIPTION

- RESET O (*1) 1 Reset signal from the host system; It shall be active low when system is powered-up or when voltage fault is detected.

DD 15- 0 I/O 18- 3 16 bit bi- directional data bus between the host system and the drive. All 16 bits

are used for data transfer in the data register. The lower 8 bits, HD0- HD7, are used for the other register and ECC access.

KEY N/C 20 Pin position 20 has no connection pin, clipped on the drive and plugged on the

cable in order to ensure correct orientation of the cable and to avoid wrong insertion.

DMARQ I 21 DMA request signal is set by the drive to indicate that the DMA data transfer is

ready. The direction of the data transfer is controlled by write/read strobe signal (HOST IOW or HOST IOR). This signal is used on a hand shake manner with DMACK.

- DIOW

STOP

- DIOR

-HDMARDY

HSTROBE

IORDY

-DDMARDY

DSTROBE

O 23 Write strobe. The rising clocks data from the host data bus, HD0 through HD15 to

a register or data register of the drive. Stop signal used by the host after the completion of Ultra DMA Burst.

O 25 Read strobe. When active low, this signal enables data from a register or the data

of the drive onto the host data bus, HD0 through HD15. The rising edge of

-HOST IOR latches on the data on the bus from the drive. This signal is for reporting the drive that the host system is ready to accept Ultra DMA data. Strobe. HSTROBE indicates that the host transfers ULTRA DMA data. The rising edge and the falling edge of HSTROBE enable the drive to latch the data.

I 27 IORDY reports host that the BUS is available.

-DDMARDY is asserted to indicate that the drive is ready to receive the Ultra DMA data. Strobe. DSTROBE is asserted to indicate that the drive transfers Ultra DMA data. The rising edge and falling edge of DSTROBE enable the host to latch the data.

-

531 -

360014937

CSEL O 28 This pin and J2 (see 10.7) are used to determine the drive address, Master or

Slave. When J2 is ground, the drive works as a Master and when J2 is open, the drive works as a Slave. If CSEL is negated then the drive runs as master drive If CSEL is asserted then the drive runs as slave drive.

- DMACK O 29 Responding to DMARQ, this signal indicates that the host is ready to receive or send the data.

INTRQ I 31 Interrupt to the host system, enabled only when the drive is selected and the host

activates the - IEN bit in the Device Control register. When the - IEN bit is inactive or the drive is not selected, this output is in a high impedance state, whether an interrupt is set or not. The interrupt is set when the IRQ bit is set by the drive CPU. IRQ is reset to zero when host reads the Status register or a write to the command register or when DRQ is negated.

- IOCS16 I 32 Indication to the host system that the 16 bit data register has been addressed and that the drive is ready to send or receive a 16 bit data word (open drain).

DA 1 O 33 Address line from the host system to select the registers of the drive.

- PDIAG

／

CBLID

DA 0 O 35 Address line from the host system to select the registers of the drive. DA 2 O 36 Address line from the host system to select the registers of the drive.

- CS0 O 37 Chip select signal generated from the host address bus. This signal is used to

- CS1 O 38 Chip select signal generated from the host address bus. This signal is used to

- DASP I 39 This is a signal from the drive used either to drive an external LED whenever the

RESERVED 27,44 Reserved for future use. No connection. + 5V (LOGIC) 41 Power line for logic and analog circuit. + 5V (MOTOR) GROUND 2,19

I/O 34 In Master/Slave mode, this signal reports the presence of slave drive to master

drive and enables transmitting of diagnostic result between master drive and slave drive

select one of the two groups of host accessible registers.

drive is being accessed, or to report presence of the slave drive to the master when the drive is in master/slave mode.

42 Power line for driving motor.

Ground between the drive and the host system.

22,24 26,30 40,43

(*1) ‘I’ is from the drive to the host system, ‘O’ is from the host system to the drive, and ‘

is bi-directional.

I/O’

- 532 -

10.4 Host Interface Timing

10.4.1 Program I/O Write Timing

DA2, DA1, DA0

-CS0, -CS1

360014937

t

ASW

t

AHW

t

AICSI

-DIOW

t

WE

t

WCY

t

WER

DD15∼DD0

DS

t

DH

t

CICSV

t

-IOCS16

t

AICSV

t

A

t

B

IORDY

Transfer mode

Symbol Meaning 0 1 2 3 4

t

Address Setup to -DOW Low (min.) 70 50 30 30 25

ASW

tDS Data Setup to -DOW High (min.) 60 45 30 30 20 t

-DOW Pulse Width (min.) 165 125 100 80 70

WE

t

Data Hold from -DOW High (min.) 30 20 15 10 10

DH

t

ADDR Hold from -DOW High (min.) 20 15 10 10 10

AHW

t

-DOW Inactive (min.) - - - 70 25

WER

t

Write Cycle Time (min.) 600 383 240 180 120

WCY

t

-IOCS16 valid from -CS (max.) 90 50 40 n/a* n/a*

CICSV

t

-IOCS16 valid from address (max.) 90 50 40 n/a* n/a*

AICSV

t

-IOCS16 inactive from address (max.) 60 45 30 n/a* n/a*

AICSI

t

IORDY Setup time (max.) 35 35 35 35 35

A

t

IORDY Pulse Width (max.) 1250 1250 1250 1250 1250

B

(

) -IOCS16 shall be specified in ATA-2 specifications. For other modes, this signal is invalid. The Drive

*

releases -IOCS16 within the time of t

, but how much time it takes to turn to inactive condition is

AICSI

determined by pull up resistance, output impedance and line capacitance.

-

533 -

360014937

10.4.2 Program I/O Read Timing

DA2, DA1, DA0

-CS0, -CS1

t

ASE

t

AHE

-DIOR

t

RE

t

RDCY

t

RDR

DD15∼DD0

t

CICSV

t

DAC

t

RDSE

t

DOH

t

HDTS

-IOCS16

t

AICSV

t

A

t

RD

t

B

IORDY

Transfer mode

Symbol Meaning 0 1 2 3 4

t

Address Setup to -DIOR Low (min.) 70 50 30 30 25

ASE

t

Data Valid from -DIOR Low (max.)

DAC

t

-DIOR Pulse Width (min.) 165 125 100 80 70

RE

t

-DIOR data setup (min.) 50 35 20 20 20

RDSE

t

Data Hold from -DIOR High (min.) 5 5 5 5 5

DOH

t

Data Tri-state from -DIOR High (max.) 30 30 30 30 30

HDTS

t

ADDR Hold from -DIOR High (min.) 20 15 10 10 10

AHE

t

-DIOR Inactive (min.) - - - 70 25

RDR

t

Read Cycle Time (min.) 600 383 240 180 120

RDCY

t

-IOCS16 valid from -CS (max.) 90 50 40 n/a* n/a*

CICSV

t

-IOCS16 valid from address (max.) 90 50 40 n/a* n/a*

AICSV

t

-IOCS16 inactive from address (max.) 60 45 30 n/a* n/a*

AICSI

t

Read Data Valid to IORDY (min.) 0 0 0 0 0

RD

t

IORDY Setup time (max.) 35 35 35 35 35

A

t

IORDY Pulse Width (max.) 1250 1250 1250 1250 1250

B

t

AICSI

(

) -IOCS16 is specified in ATA-2 specifications. For other modes, this signal is invalid. Drive releases

*

-IOCS16 within the time of t

, but how long it takes to turn to inactive condition is defined by pull up

AICSI

resistance, output impedance and line capacitance.

- 534 -

10.4.3 Single Word DMA Write Timing

DMARQ

t

C

-DMACK

360014937

t

O

t

I

t

J

-DIOW

t

D

DD15∼DD0

t

G

t

H

ATA-2 SPECIFICAT IONS

Transfer mode MODE 0 MODE 1 MODE 2

Symbol Meaning Min. Max. Min. Max. Min. Max. t0 Cycle time 960 480 240 tC DMACK to DMARQ delay 200 100 80 t

-DOW 16-bit 480 240 120

D

t

-DOW data setup 250 100 35

G

t

-DOW data hold 50 30 20

H

t

DMACK to -DOW setup 0 0 0

I

t

-DOW to DMACK hold 0 0 0

J

-

535 -

360014937

10.4.4 Single Word DMA Read Timing

DMARQ

-DMACK

t

O

t

C

t

I

t

J

-DIOR

t

D

DD15∼DD0

t

E

t

S

t

F

ATA-2 SPECIFICAT ION

Transfer mode MODE 0 MODE 1 MODE 2

Symbol Meaning Min. Max. Min. Max. Min. Max. t0 Cycle time 960 480 240 tC DMACK to DMARQ delay 200 100 80 t

-DIOR 16-bit 480 240 120

D

t

-DIOR data access 250 150 60

E

t

-DIOR data hold 5 5 5

F

t

DMACK to -DIOR setup 0 0 0

I

t

-DIOR to DMACK hold 0 0 0

J

t

-DIOR setup tD-tE tD-tE t

S

D-tE

- 536 -

10.4.5 Multiword DMA Write Timing

DMARQ

360014937

-DMACK

-DIOW

DD15∼DD0

ATA/ATAPI-5 SPECIFICATIONS

t

O

t

I

t

D

t

G

t

K

H

t

L

t

J

Transfer mode MODE 0 MODE 1 MODE 2

Symbol Meaning Min. Max. Min. Max. Min. Max. t0 Cycle time 480 150 120 tC DMACK to DMARQ delay --- --- -- t

-DIOW 16-bit 215 80 70

D

t

-DIOW data setup 100 30 20

G

t

-DIOW data hold 20 15 10

H

t

DMACK to -DIOW setup 0 0 0

I

t

-DIOW to DMACK hold 20 5 5

J

t

-DIOW negated pulse width 215 50 25

K

t

-DIOW to DMARQ delay 40 40 35

L

-

537 -

360014937

10.4.6 Multiword DMA Read Timing

DMARQ

-DMACK

-DIOR

DD15∼DD0

ATA/ATAPI-5 SPECIFICATIONS

t

O

t

I

t

D

t

E

t

K

F

t

L

t

J

t

Z

Transfer mode MODE 0 MODE 1 MODE 2

Symbol Meaning Min. Max. Min. Max. Min. Max. t0 Cycle time 480 150 120 tC DMACK to DMARQ delay --- --- -- t

-DIOR 16-bit 215 80 70

D

t

-DIOR data access 150 60 50

E

t

-DIOR data hold 5 5 5

F

t

-DIOR to tristate 20 25 25

Z

t

DMACK to -DIOR setup 0 0 0

I

t

-DIOR to DMACK hold 20 5 5

J

t

-DIOR negated pulse width 50 50 25

K

t

-DIOR to DMARQ delay 120 40 35

L

- 538 -

10.4.7 Ultra DMA Timing

Initiating an Ultra DMA da ta in burst

DMARQ (device)

t

UI

DMACK-

(host)

t

ACK

STOP

(host)

t

HDMARDY-

(host)

ACK

t

ENV

360014937

t

FS

t

ZAD

t

FS

t

ZAD

DSTROBE

(device)

DD(15:0)

DA0, DA1, DA2,

CS0-, CS1-

t

ACK

t

ZIORDY

t

AZ

t

VDS

t

DVH

-

539 -

360014937

Sustained Ultra DMA data in burst

DSTROBE

at device

t

CYC

t

2CYC

t

CYC

t

2CYC

t

DVH

DD(15:0) at device

DSTROBE

at host

t

DH

DD(15:0)

at host

Host pausing an Ultra DMA data in burst

t

DVS

t

DS

DVH

t

DVS

t

DH

t

DS

t

DVH

t

DH

DMARQ (device)

DMACK-

(host)

STOP

(host)

HDMARDY-

(host)

DSTROBE

(device)

DD(15:0)

(device)

t

RP

t

SR

t

RFS

- 540 -

Device terminating an Ultra DMA data in burst

DMARQ

(device)

DMACK-

(host)

t

LI

STOP

(host)

360014937

t

MLI

t

LI

ACK

HDMARDY-

(host)

DSTROBE

(device)

DD(15:0)

DA0, DA1, DA2,

CS0-, CS1-

t

LI

t

SS

t

ZAH

t

AZ

t

DVS

t

ACK

t

DVH

IORDYZ

CRC

t

ACK

-

541 -

360014937

Host terminating an Ultra DMA data in burst

DMARQ

(device)

t

LI

t

MLI

DMACK-

(host)

STOP

(host)

HDMARDY-

(host)

DSTROBE

(device)

DD(15:0)

DA0, DA1, DA2,

CS0-, CS1-

t

RFS

t

ZAH

t

RP

AZ

t

DVS

MLI

t

LI

t

ACK

t

ACK

t

IORDYZ

t

DVH

CRC

t

ACK

- 542 -

Initiating an Ultra DMA data out burst

DMARQ

(device)

t

UI

DMACK-

(host)

360014937

STOP

(host)

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

DA0, DA1, DA2,

CS0-, CS1-

t

ACK

t

ZIORDY

t

ENV

t

LI

t

DVS

t

UI

t

DVH

-

543 -

360014937

Sustained Ultra DMA data out burst

t

CYC

HSTROBE

at host

t

2CYC

t

CYC

t

2CYC

t

DVH

t

DVS

DD(15:0)

at host

HSTROBE

at device

t

DH

t

DS

DD(15:0)

at device

Device pausing an Ultra DMA data out burst

t

DVH

t

DVS

t

DH

t

DS

DVH

t

DH

DMARQ

(device)

DMACK-

(host)

STOP

(host)

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

t

RP

t

SR

t

RFS

- 544 -

Host terminating an Ultra DMA data out burst

t

LI

DMARQ

(device)

DMACK-

(host)

t

SS

STOP (host)

360014937

t

MLI

t

LI

t

ACK

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

DA0, DA1, DA2,

CS0-, CS1-

t

LI

t

DVS

t

ACK

IORDYZ

t

DVH

CRC

t

ACK

-

545 -

360014937

Device terminating an Ultra DMA data out burst

DMARQ (device)

DMACK-

(host)

STOP

(host)

DDMARDY-

(device)

HSTROBE

(host)

DD(15:0)

(host)

DA0, DA1, DA2,

CS0-, CS1-

t

RFS

RP

t

LI

t

LI

t

MLI

t

DVS

t

ACK

t

IORDYZ

t

ACK

t

DVH

CRC

t

ACK

- 546 -

360014937

ATA/ATAPI specifications

Transfer mode MODE 0 MODE 1 MODE 2 MODE 3 MODE 4

Symbol Meaning Min. Max. Min. Max. Min. Max. Min. Max. Min. Max.

t

CYC

t2

CYC

tDS tDH t

DVS

t

DVH

tFS tLI t

MLI

tUI tAZ t

ZAH

t

ZAD

t

ENV

tSR t

RFS

tRP t

IORDYZ

t

ZIORDY

t

ACK

t

Strobe to DREQ/Stop

SS

Cycle time Two cycle time Data setup time Data hold time Data valid hold time Data valid hold time First STROBE time Limit interlock time Interlock time min. Unlimited interlock Allowed to release Delay time Delay time Envelope time Strobe to DMARDY Ready to final Strobe Ready to pause Pullup before IORDY Wait before IORDY Setup hold for DACK

112 73 54 39 25 230 154 115 86 57

15 10 7 7 5

5 5 5 5 5

70 48 30 20 6

6 6 6 6 6 0 230 0 200 0 170 0 130 0 120 0 150 0 150 0 150 0 100 0 100

20 20 20 20 20

0 0 0 0 0

10 10 10 10 10

20 20 20 20 20

0 0 0 0 0

20 70 20 70 20 70 20 55 20 55

50 30 20 NA NA 75 70 60 60 60

160 125 100 100 100

20 20 20 20 20

0 0 0 0 0 20 20 20 20 20 50 50 50 50

-

547 -

360014937

10.4.8 Reset Timing

BUSY

- RESET

t

N

t

M

Symbol Meaning Minimum Maximum Unit Condition

tM tN

RESET pulse width (Low) 25 RESET inactive to BSY active 400 ns

µs

10.5 Grounding

HDA (Head Disk Assembly) and DC ground(ground pins on interface) are connected electrically each other.

- 548 -

10.6 Address Decoding

The host addresses the drive using programmed I/O. In this method, the required register address should be placed on the three host address lines, DA2 - DA0. An appropriate chip is selected and a read or write strode (-DIOR / -DIOW) shall be given to the chip.

The following I/O map shows definitions of all the register addresses and functions for these I/O locations. The descriptions of each register are shown in the next paragraph.

Table 10.6-1 Register map

Address

- CS0 - CS1 HA2 HA1 HA0 READ REGISTER WRITE REGISTER 0 0 X X X Invalid address Invalid address 0 1 0 0 0 Data register Data register 0 1 0 0 1 Error register Features (Write precompensation)

register 0 1 0 1 0 Sector count Sector count 0 1 0 1 1 Sector number / LBA bit 0- 7 Sector number / LBA bit0-7 0 1 1 0 0 Cylinder low / LBA bit 8- 15 Cylinder low / LBA bit8-15 0 1 1 0 1 Cylinder high / LBA bit16- 23 Cylinder high / LBA bit16-23 0 1 1 1 0 Device head register

/ LBA bit 24- 27 0 1 1 1 1 Status register Command register 1 0 0 X X High impedance Not used 1 0 1 0 X High impedance Not used 1 0 1 1 0 Alt. status register Device control register 1 0 1 1 1 Device address register1 Not used 1 1 X X X High impedance Not used

“X” means “don't care”.

Device head register / LBA bit 24-27

360014937

The host generates selection of two independent chips on the interface. The selected high order chip ,-HOST CS1, is valid only when the host is accessing the address of alternate status register, digital output register , and digital input register respectively. The low order chip, HOST CS0, is used to address all other registers.

The following table shows the standard decode logic to connect with ISA (Industry Standard Architecture) bus .

Table 10.6-2 Decode Logic

Register Address Map Decode 1F0-1F7 - CS0 = - ((- A9) (-A3)*(- AEN)) 3F6,3F7 - CS1= -

(A9*A8*A7*A6*A5*A*A8*A7*A6*A5*A4*4)*(-A3)*(-

AEN) 170-177 - CS0= - ((- A9)*A8*(- A7)*A6*A5*A4*(- A3)*(- AEN) 376,377 - CS1= - (A9*A8*(- A7)*A6*A5*A4)*(- A3)*(- AEN)

The host data buses 15-8 are valid only when - IOCS16 is active.

•

- IOCS16 is asserted when interface address lines match to data register address. It does not turn active during ECC bytes transfer for read or write long command (8 bit transfer).

1

ATA-2 Notes: This register is obsolete. A device is not supposed to respond to a read of this address. If a device does respond, it shall be sure not to drive the DD7 signal to prevent possible conflict with floppy disk implementations. The drive supports this register to maintain compatibility for ATA-1.

-

549 -

360014937

10.7 Register Description

In the following register descriptions, unused write bit should be treated as “don't care”, and unused read bits should be read as zeros.

10.7.1 Data Register

- CS0 DA2-DA0 : 0 Read / Write

There are seven commands which execute data transfer from/to this register of the sector buffer for Read and Write operations. The sector table during Format command and the data associated with the Identify Device command shall also be transferred to this register.

10.7.1.1 Read/Write command

The register provides a high speed 16 bit path into the sector buffer with PIO and DMA.

10.7.1.2 Read/Write Long command

When a Read/Write Long is issued, the ECC bytes are transferred by 8 bit operation.

10.7.1.3 Read/Write Buffer command

This command provides 16 bit path between host and data buffer in the drive.

10.7.1.4 Format command

This command provides a path for the parameter including interleave table in a sector length.

10.7.1.5 Identify Device command

Drive information is transferred during the execution of this command.

- 550 -

10.7.1.6 Security commands

Password information is transferred during the execution of following four commands.

1) Disable password

2) Erase Unit

3) Set Password

4) Unlock

Data in the register and on the media correspond to each other as follows:

A15 - A8 A7 - A0 transfer 1 D2 D1 transfer 2 D4 D3 : : : : : : transfer 256 D512 D511 D1 D2 --- D512 E1 --- E4 transfer 257 E1 : E2 : : transfer 260 E4

DATA REGISTER DATA FLOW ON THE MEDIA

360014937

10.7.2 Error Register

- CS0 DA2-DA0 : 1 Read ONLY

10.7.2.1 Operational Mode

The following descriptions are bit definitions for the operational mode including the error information from the last command. This command is valid only when the ERROR BIT (bit 0) is set.

ICRC UNC MC IDNF MCR ABRT TK0NF AMNF

Bit 7 Interface CRC error was found during the transfer of Ultra DMA. 2 Bit 6

Bit 5 Bit 4

Bit 3 Bit 2

Bit 1 Bit 0

UNC (Uncorrectable Data Error) -- This bit indicates that an uncorrectable error has been encountered in the data field during a read command. MC (Media Changed) -- This bit is reserved for use by removable media devices and indicates that new media is available to the operating system.

IDNF

(ID Not Found) --The requested sector could not be found.

MCR

(Media Change Requested) is reserved for use by removable media devices and indicates that a request for media removal has been detected by the device. ABRT (Aborted Command) -- This bit Indicates that the requested command has been aborted due to the reason reported in the drive status register (Write Fault, Not Seek Complete, Drive Not Ready, or an invalid command). The status registers and the error registers may be decoded to identify the cause.

TK0NF

(Track 0 Not Found) -- This bit is set to indicate that the track 000 has not been found during a Recalibrate command. AMNF (AM Not Found) -- This bit is set to indicate that the required Data AM pattern on read operation has not been found.

2

ATA-2 Notes: Prior to the development of ATA-2 standard, this bit was defined as BBK (Bad Block Detected) -- This bit was used to

indicate that th e block mark was detected in the target’s ID field. The mark does n ot exist when shipping from the factory.The Mark will be written by FORMAT command. Read or Write commands will not be executed in any data fields marked bad. The drive does not support this bit.

-

551 -

360014937

10.7.2.2 Diagnostic Mode

The drive enters diagnostic mode immediately after the power -on or after an Execute Diagnostics command. Error bit in Status Register shall not be set in these cases. The following table shows bit values for the diagnostic mode.

Table 10.7-1 Diagnostic mode error register

01 No errors 02 Controller register error 03 Buffer RAM error 04 ECC device error 05 CPU ROM/RAM error 06-7F reserved 8x Slave drive error (see below)

When two drives are daisy-chained on the interface, the MASTER drive has valid error information for diagnostic mode. When the SLAVE drive detects an error, 80H and OR value (01〜04) diagnosed by the

MASTER are set to the code above mentioned.

10.7.3 Features Register (Write Precompensation Register)

- CS0 DA2-DA0 : 1 Write only

Write precompensation is automatically optimized by the drive internally. This register is used with Set Features command.

10.7.3.1 Smart command

This command is used with the Smart commands to select subcommands.

10.7.4 Sector Count Register

- CS0 DA2-DA0 : 2 Read / Write

10.7.4.1 Disk Access command

The sector count register determines the number of sectors to be read or written for Read, Write, and Verify commands. A 0 in the sector count register specifies a 256 sector transfer. After normal completion of a command, the content shall be 0.

During a multi-sector operation, the sector count is decremented and the sector number is incremented. If an error should occur during multi-sector operation, this command shows the number of remaining sectors in order to avoid duplicated transfer.

10.7.4.2 Initialize Device Parameters command

This register determines number of sectors per track.

10.7.4.3 Power Control command

This register returns a value in accordance with the operation mode (idle mode or stand-by mode).

10.7.4.4 Set Features Command

If features register for this command is 03h, this register sets the data transfer mode.

- 552 -

10.7.5 Sector Number Register

- CS0 DA2-DA0 : 3 Read / Write

The target logical sector number (starting from 1) for Read, Write, and Verify commands is set in this register. After completion of a command, it shows the sector number of the last sector transferred to the host.

The starting sector number is set in this register for multi-sector operations. But when error occurs during multi-sector transfer, it shows the number of the sector in which the error has been detected. During multi-sector transfer, the number of the next sector to be transferred will not necessarily be shown.

In LBA mode, this register contains Bits 0 - 7 logical block address. After completion of a command, the register is updated to reflect the current LBA Bits.

10.7.6 Cylinder Low Registers

- CS0 DA2-DA0 : 4 Read / Write

360014937

10.7.6.1 Disk Access command

Lower 8 bits of the starting cylinder number(starting from 0) for Read, Write, Seek, and Verify commands are contained in these registers. After completion of the command or sector transfer, the current cylinder is shown in this register.

In LBA mode, Bits 8 - 15 of the target address in logical block address are set in this register. After completion of a command, the register is updated to reflect the current LBA Bits 0 - 7.

10.7.6.2 SMART commands

This register should be set to 4Fh for SMART commands

10.7.7 Cylinder High Registers

- CS0 DA2-DA0 : 5 Read / Write

10.7.7.1 Disk Access command

The high order 2 bits of the starting cylinder number (starting from 0) for Read, Write, Seek, and Verify commands are set in this register. Together with Cylinder Low Register, it defines 0 to 1,023 cylinders. After completion of the command or sector transfer, this register shows the current cylinder.

In LBA mode, Bits 16 - 23 of the target address in logical block address are contained in this register. After completion of the command, it shows the Bits 0 - 7 of the last logical block address.

Cylinder High Cylinder Low Register Bits 7 6 5 4 3

2 1 0

Cylinder Bits 15 14 13 12 11 10 9

8

7 6 5 4 3 2 1 0

553 -

-

360014937

10.7.7.2 SMART commands

This register should be set to C2h for SMART commands

10.7.8 Device/Head Register

- CS0 DA2-DA0 : 6 Read / Write

The value of this register is used to select the drive, Master or Slave, and head. On multiple sector read/write operation that requires to cross track boundaries, the head select bit will be updated to reflect the currently selected head number.

1 L 1 DEV HS3 HS2 HS1 HS0

Bit 7 Reserved (recommended to set 1) Bit 6 Bit 5 Reserved (recommended to set 1) Bit 4

Bit 3 Bit 0

L

(Select LBA mode) L=0: CHS mode. L=1: LBA mode.

DEV

(Device Select):

- (Master/Slave mode) This bit is used to select the drive. DEV= 0 indicates the first fixed disk drive (Master), and DEV= 1 indicates the second (Slave).

- (Single mode) should be 0. If this is 1, a drive is not selected but 00h shall be returned to status register.

HS3-HS0 (Head Select Bits) -- Bits 3 through 0 determine the required read/write head. Bit 0 is the least-significant bit. If the L bit is equal to one (LBA Mode), the HS3 through HS0 bits contain bits 27 through 24 of the LBA.

- 554 -

360014937

10.7.9 Status Register

-CS0 DA2-DA0:7 Read only

This register contains the command status. The contents of the register are updated at the completion of each command and whenever the error occurs. The host system reads this register in order to acknowledge the status and the result of each operation.

When the BSY bit (bit 7) is set, no other bits in the register are valid. And read/write operations of any other register are negated in order to avoid the returning of the contents of this register instead of the other resisters’ contents .

If the host reads this register when an interrupt is pending, interrupt request (INTRQ) is cleared in order to work as Interrupt Acknowledge.

The bits of the status register are defined as below :

3

BSY DRDY DF DSC

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3 Bit 2

Bit 1 Bit 0

BSY

(Busy) -- This bit is set when Host Reset (HRST) line is activated or Software Reset (SRST) bit in Device Control register is set or when the COMMAND register is written and until a command is completed but when Data Request is set to 1, this bit shall be reset. The host shouldn’t write or read any registers when BSY = 1. DRDY (Drive ready) -- DRDY=1 when seek complete bit (bit 4) = 1, indicates that the drive is ready to respond read, write, or seek command. DRDY=0 indicates that read , write and seek are negated. A command execution shall be interrupted if Not-Ready condition occurs during a command execution and will be reset until the next command whether the drive condition is Ready or Not Ready. Error bit is set on this occasion and will be reset just after power on and set again after the drive begins revolving at normal speed and gets ready to receive a command.

DF

(Device Fault) -- DF=1 indicates that the drive has detected a fault condition during the execution of a Read Write commands; read, write, and seek commands are negated and Error bit is set. DF is set to 1 until the next command, whether the device is in fault condition or not.

3

DSC

(Drive Seek Complete) -- DSC³= 1 indicates that a seek operation has been completed. DSC³ is set to 0 when a command accompanied by a seek operation begins. If a seek is not complete, a command is terminated and this bit is not changed until the Status Register is read by the host . This bit remains reset immediately after power on until the drive starts revolving at a nominal speed and gets ready to receive command. DRQ (Data Request) -- DRQ=1 indicates that the sector buffer requires 1 sector of data during a Read or Write command. CORR (Corrected Data) -- CORR=1 indicates that the data read from the disk had an error but was successfully corrected by the read retry. This bit is always set to 0 and does not interrupt multi-sector operations. IDX (Index) -- This bit is a pulse signal set to 1 per revolution of the disk. Intervals of the signal may vary during read / write operation. Therefore, the host shouldn’t use IDX for timing purposes.

ERR

(Error) -- ERR = 1 indicates that an error occurred during execution of the previous command . The cause of the error is reported on the other bit or in the error register. The error bit can be reset by the next command from the controller. When this bit is set , a multi-sector operation is negated.

DRQ CORR IDX ERR

3

ATA-2 Notes: Prior to ATA-2 standard, this bit indicated that the device was on track. This bit may be used for other purposes in

future standards. For compatibility the drive supports this bit as ATA-1 specifies. User is recommended not to use this bit.

555 -

-

360014937

10.7.10 Command Register

- CS0 DA2-DA0 : 7 Write only

The command register accepts commands for the drive to perform fixed disk operations. Commands are executed when the TASK FILE is loaded and the command register is written and only when:

The status is not busy (BSY is inactive). and DRDY (drive ready) is active.

Any code NOT defined in the following list causes an Aborted Command error. Interrupt request (INTRQ) is reset when a command is written. The following are acceptable commands to the command register.

- 556 -

Table 10.7-2 Command Code

360014937

Command Code

Command Name Hex Value PARAMETERS USED SC SN CY DRV HD FT Nop 00H X X X O X X Recalibrate 1xH X X X O X X Read Sector(s) 20/21H O O O O O X Read Long 22/23H O O O O O X Write Sector(s) 30/31H O O O O O X Write Long 32/33H O O O O O X Write Verify 3CH O O O O O X Read Verify Sector(s) 40/41H O O O O O X Format Track 50H X X O O O X Seek 7xH X X O O O X Execute Diagnostics 90H X X X O X X Initialize Device Parameters 91H O X X O O X SMART B0H X X O O X O Read Multiple C4H O O O O O X Write Multiple C5H O O O O O X Set Multiple Mode C6H O X X O X X Read DMA C8/C9H O O O O O X Write DMA CA/CBH O O O O O X Power Control Stand-by Immediate E0 / 94H O X X O X X Idle Immediate E1 / 95H O X X O X X Stand-by E2 / 96H O X X O X X Idle E3 / 97H O X X O X X Check Power Mode E5 / 98H O X X O X X Sleep E6 / 99H O X X O X X Read Buffer E4H X X X O X X Flush Cache E7H X X X O X X Write Buffer E8H X X X O X X Identify Device ECH X X X O X X Set Features EFH X X X O X O Security Set Password F1H X X X O X X Unlock F2H X X X O X X Erase Prepare F3H X X X O X X Erase Unit F4H X X X O X X Freeze F5H X X X O X X Disable Password F6H X X X O X X Read Native Max Address F8H X X X O X X Set Max Address F9H O O O O O X

Note: O and X are defined as follows. O = Must contain valid information for this command. X = Don't care for this command.

L = “0” indicates normal read/ write. “1” indicates Long command ( ECC Byte transfer ).

Parameters are defined as follows. SC = SECTOR COUNT register.

SN = SECTOR NUMBER register. CY = CYLINDER LOW and CYLINDER HIGH register. DRV = DRIVE SELECT bit (bit 4 in DRIVE/HEAD register) HD = HEAD SELECT bits (bit 3-0 in DRIVE/HEAD register) FT = FEATURES register (WRITE PRECOMPENSATION register)

557 -

-

360014937

10.7.11 Alternate Status Register

- CS1 DA2-DA0 : 6 Read only

This register contains the same information as the status register in the Task File. The only difference is that this register being read does not imply interrupt acknowledge or doesn’t reset a pending interrupt.

See the description of  status resister for definitions of the bit in this register.

10.7.12 Device Control Register

- CS1 DA2-DA0 : 6 Write only

This register contains the following two control bits.

---- ---- ---- ---- 1 SRST - IEN ----

Bit 7-4 not used Bit 3 Reserved (recommended to set 1) Bit 2

Bit 1

Bit 0 not used

SRST (Soft Reset) -- SRST= 1 indicates that the drive is held reset and sets BSY bit in Status register. All internal registers are reset as shown in on the interface, this bit will reset both drives simultaneously , regardless of the selection by Device

address bit in DEVICE/HEAD register.

- IEN (Interrupt Enable) -- When -IEN = 0, and the drive is selected by Drive select bit in DEVICE/HEAD register, the drive interrupt to the host is enabled. When this bit is set, the - INTRQ pin will be in a high impedance state, whether a pending interrupt is found or not.

Table 10.12-1

. If two drives are daisy chained

10.7.13 Device Address register4

- CS1 DA2-DA0 : 7 read only

The device address register is a read-only register used for diagnostic purposes. The followings are definitions of bits for this register:

RSVD - WTG - HS3 - HS2 - HS1 - HS0 - DS1 - DS0

Bit 7 Reserved -- high impedance Bit 6 Bit 5 - Bit 2

Bit 1 Bit 0

Note) The following facts should be taken into consideration when this resister is in use.

-WG reflects actual write gate in the drive, however, because of address transition or cache operation, there is no direct connection with the data transferred between host and drive.

-HEAD SELECT represents one’s complement of the binary coded address of currently selected head, but does not show actual selection of the head.

- WTG (Write Gate) -- This bit is active when a Write to the disk is in progress.

- HS3 to - HS0 (Head Select bits) -- Bit 5 through 2 are one's complement of the binary coded address of

currently selected head which is shown by Head Select bit in SDH register.

- DS1 (Drive Select 1) -- -DS1=0, when SLAVE drive is selected and active.

- DS0 (Drive Select 0) -- -DS0=0, when single mode or MASTER drive in Master/Slave mode is selected

and active.

4

ATA-2 Notes: This register is obsolete. A device is not supposed to respond to a read of this address. If a device does respond, it shall be sure not to drive the DD7 signal to prevent possible conflict with floppy disk implementations. The drive supports this register to maintain compatibility for ATA-1.

- 558 -

10.8 Command Descriptions

The drive interprets the commands written in the command register by the host system and executes them. This table shows the drive’s response to the valid commands written in command-register.

360014937

Command

CHECK POWER MODE EXECUTE DEVICE DIAGNOSTIC

FLUSH CACHE FORMAT TRACK IDENTIFY DEVICE IDLE IDLE IMMEDIATE INITIALIZE DEVICE PARAMETERS READ BUFFER READ DMA READ LONG READ MULTIPLE READ NATIVE MAX ADDRESS READ SECTOR(S) READ VERIFY SECTOR(S) RECALIBRATE SECURITY DISABLE PASSWORD SECURITY ERASE PREPARE SECURITY ERASE UNIT SECURITY FREEZE LOCK SECURITY SET PASSWORD SECURITY UNLOCK SEEK SET FEATURES SET MAX ADDRESS SET MULTIPLE MODE SLEEP SMART Enable/Disable Attribute

autosave SMART DISABLE OPERATIONS

SMART ENABLE OPERATIONS SMART RETURN STATUS SMART Read Attribute Values SMART Read Attribute Thresholds SMART Save Attribute Values SMART Execute OFF-LINE Immediate STANDBY STANDBY IMMEDIATE WRITE BUFFER WRITE DMA WRITE LONG WRITE MULTIPLE WRITE SECTOR(S) WRITE VERIFY Invalid command code

√ = valid on this command

Status register Error register

DRDY DF CORR ERR ICRC UNC IDNF ABRT TK0NF AMNF

√

√ √

√

√ √

√

√ √

√ √ √ √ √

√ √ √ √ √ √ √ √ √ √

√ √ √ √ √ √ √ √ √ √ √ √ √ √

√ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √ √

√

See

Table 10.7-1

√ √ √ √ √

√ √ √

√ √ √ √ √ √

√ √ √

√ √

√ √ √

√

√ √

√ √ √ √ √ √ √ √ √ √ √ √ √ √

√ √

√ √ √ √ √

√ √ √

√ √

√

√ √ √ √ √ √ √ √ √

√

√ √ √

√

√ √ √

√ √

-

559 -

360014937

10.8.1 Nop (00h)

COMMAND CODE

0 0 0 0 0 0 0 0

REGISTER

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY no change HD no change SN no change

SC no change FT no change

LBA no change

The Nop command reports the status. The drive terminates the command with aborted error after receiving this command.

10.8.2 Recalibrate5 (1xh)

COMMAND CODE

0 0 0 1 X X X X

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY 00H HD no change SN no change

SC no change FT no change

LBA 00H

This command will set BSY bit and move the R/W heads on the disk to cylinder 0. At the completion of a seek , it revises the status, resets BSY and generates an interrupt.

REGISTER

10.8.3 Flush Cache (E7h)

COMMAND CODE 1 1 1 0 0 1 1 1

RESISTER SETT ING DR drive no .

This command reports the completion of a Write cache to the host. At the completion of a Write cache,

the drive revises the status, resets BSY and generates an interrupt.

5

ATA/ATAPI-4 defines this command as Vendor specific. The drive supports this command to maintain ATA-3, and the previous

models compatibility. User is recommended not to use this command.

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10.8.4 Read Sector (20h/21h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY starting cylinder last possible HD starting head last possible

SN starting secto r last possible SC no. of sector to read 00H FT no change

LBA staring address last address

Setting BSY bit, the drive will seek to the target cylinder if the head is not on target track ( implied seek ), select the head and begin to read the number of sector defined in SC register ( 1-256 ) starting from the target sector. After finding ID of target sector and having 1 sector of data read into the buffer RAM, the drive sets DRQ in status register and generates interrupt to report to the host that the drive is ready to transfer the next data. In case of multi-sector transfer, DRQ bit is reset and BSY is set after 1 sector transfer to prepare for the next sector transfer. An uncorrectable data can also be transferred but the subsequent operation will terminate at the cylinder, head, and sector (or LBA) position in the TASK FILE register. When a sector is ready to be read by the host, an interrupt is issued. After the last sector is read by the host, no interrupt is issued at the end of a command.

0 0 1 0 0 0 L X

REGISTER

10.8.5 Read Long6 (22h/23h)

If L bit =1, this command returns the requested data and associated ECC information . The data field transfer is 16 bits wide, but the ECC information is accepted in only one byte (8 bits) at a time. Long command is valid only for single sector transfer (SC=01).

10.8.6 Write Sector (30h/31h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY starting cylinder last possible HD starting head last possible

SN starting sector start sector SC no. of sector to write 00H FT no change

LBA starting addr ess last possible

The drive seeks to the target cylinder and selects the head and begins to write to the number of sectors defined in SC register (1-256) starting from the target sector. DRQ in status register is set as soon as the command register is written and the buffer RAM receives the data transferred from the host . After 1 sector is transferred to the buffer RAM, the drive resets DRQ, sets BSY and begins write operation. In case of multi-sector transfer, it sets DRQ bit, resets BSY and generates Interrupt to inform host that it is ready to transfer the next 1 sector of data. The drive will seek to the target cylinder if the head is not on the target track (implied seek). After transferring the last data in the buffer, it resets BSY and issues an interrupt.

0 0 1 1 0 0 L X

REGISTER

6

ATA/ATAPI-4 defines this command as Vendor specific. The drive supports this command to maintain ATA-3, and the previous

models compatibility. User is recommended not to use this command.

561 -

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If an error occurs during multi-sector transfer, it will terminate the transfer by setting error information in status register and error register, without shifting into data transfer mode from the host. CY, HD, SN ( LBA) registers show the address where error has occurred.

10.8.7 Write Long7 (32h/33h)

If Long bit is “1”, this command write the data and the associated ECC data information supplied by the host. The data field transfer is 16 bit wide, but the ECC information is accepted in only 8 bits.

10.8.8 Read Verify (40h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY starting cylinder last possible HD starting head last possible SN starting sector start sector

SC no. of sector to be read 00H

LBA starting address last address

This command is identical to a Read command except that DRQ bit is not set and no data is sent to the host. This allows the system to verify the integrity of the drive. A single interrupt is generated upon completion of a command or when an error occurs.

0 1 0 0 0 0 0 0

REGISTER

10.8.9 Write Verify8 (3Ch)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY starting cylinder last possible HD starting head last possible SN starting sector start sector

SC no. of sector to be written 00H

LBA starting address last address

This command is identical to a Write sector command except that verification is not performed. A Write verify command transfers the number of sectors (1-256) defined in SC register from the host to the drive, then the data is written on the media. The starting sector is defined in CY, HD, SN (LBA) registers.

Upon receipt of the command, the drive sets DRQ until one sector of data is transferred from the host, then resets DRQ, sets BSY. In case of multi- sector transfer, it sets DRQ, resets BSY and generate an interrupt to report the host that the host is ready to receive 1 sector of data. The drive will seek to the target track if the R/W head is not on the target track (implied seek). Reaching the target sector, the command transfers the

0 0 1 1 1 1 0 0

REGISTER

7

ATA/ATAPI-4 defines this command as Vendor specific. The drive supports this command to maintain ATA-3, and the previous

models compatibility. User is recommended not to use this command.

8

ATA/ATAPI-4 defines this command as Vendor specific. The drive supports this command to maintain ATA-3 compatibility. User is

recommended not to use this command.

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sector data from the host to the media. After transferring the last data in the buffer, it sets BSY and issues an Interrupt.

10.8.10 Format Track 9 (50h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY cylinder to format no change HD head to format no change

SN 01H SC 00H FT no change

The track specified by the task file is formatted with ID and data fields according to the table transferred to the buffer. This command is rejected in LBA mode with an Aborted command error reported.

DRQ in status register is set as soon as the command register is written, and the buffer RAM receives the data transferred from the host. After 512 bytes are transferred into the buffer RAM, the drive resets DRQ, sets BSY and begins format operation. The drive seeks to the target cylinder if the head is not on the target track ( implied seek ). After completion of the command, it resets BSY and generates an interrupt.

0 1 0 1 0 0 0 0

REGISTER

Format table consists of the number of sectors ( 16 bits ) per track . Upper byte represents sector number, and lower byte represents format type.

The drive supports only 00H format type. Intending to maintain compatibility with previous models, the drive accepts any format type, but the function will not change.

Sector interleave is always set to one regardless of sector sequence in the format table. Data subsequent

format table are handled as “Don't care”.

to

FORMAT TABLE ( FIRST 86 BYTES )

(Ex. 43 logical sector mode) 0001, 0002, 0003, 0004, 0005, 0006, 0007, 0008, 0009, 0013, 0015, 0016, 0017, 0018,.0019,

001A,.......0029, 002A, 002B

DON’T CARE ( 426 BYTES ATTACHED )

0000, 0000, 0000, 0000, 0000, 0000, 0000, 0000, 0000, 0000, 0000, 0000, 0000, ........... 0000, 0000, 0000.

9

ATA/ATAPI-4 defines this command as Vendor specific. The drive supports this command to maintain ATA-3, and the previous

models compatibility. User is recommended not to use this command.

563 -

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10.8.11 Seek (7xh)

COMMAND CODE

0 1 1 1 X X X X

REGISTER

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY cylinder to seek no change HD head to seek no change SN no change

SC no change FT no change

LBA address to seek no change

This command moves the R/W heads to the cylinder specified in the task files. The drive sets BSY and starts seek operation. After the completion of a seek operation, the drive asserts DSC

10

, negates BSY ,

and return the interrupt. If CY, HD and SN registers show invalid address, “ID Not Found” error is reported and no seek operation

shall be executed. All commands related to data access possess Implied Seek function and don't need this command.

10.8.12 Toshiba Specific

COMMAND CODE

These commands are only for factory use. Host must not issue them.

1 0 0 0 X X X X 1 0 0 1 1 0 1 0 1 1 1 1 0 0 0 0 1 1 1 1 0 1 1 1 1 1 1 1 1 0 1 X 1 1 1 1 1 1 X X

10.8.13 Execute Diagnostics (90h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR OOH CY OOH HD OOH SN O1H

SC O1H FT

This command enables the drive to execute following self-test and reports the results to the error register described in Table 10.7.2-1.

(1) ROM checksum test (2) RAM test (3) Controller LSI register test

An interrupt is generated at the completion of this command. When two drives are daisy-chained on the interface, both drives execute the self test and the MASTER drive

reports valid error information of the two drives.

10

ATA-2 Notes: Prior to ATA-2 standard, this bit indicated that the device was on track. This bit may be used for other purposes in

future standards. For compatibility the drive supports this bit as ATA-1 specifies. User is recommended not to use this bit.

1 0 0 1 0 0 0 0

REGISTER

- 564 -

10.8.14 Initialize Device Parameters (91h)

360014937

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive number no change CY no change HD total number o f heads-1 no change

SN number of sector per track no change SC no change FT no change

This command specifies the number of sectors per track and the number of heads per cylinder to set head switching point and cylinder increment point. Specified values affect Number of the current logical heads, Number of logical sectors per track, which can be read by Identify Device Command.

On issuing this command, the content of CY register shall not be checked. This command will be terminated with ABORT error when it is issued on a invalid HD or SC register setting ( SC register=0 or the combination of HD and SC register exceeds the drive parameter.

Any drive access command should accompany correct HD, SN register with heads and sectors within the number specified for this command. Otherwise, it results in “ID not found” error. If the number of heads and drives is within the specified number, command gives parameter to convert an address to access into

Logical Block Address (LBA).  ID Not Founderror also occur when this LBA exceeds the total number of user addressable sectors. The command does not affect LBA address mode.

1 0 0 1 0 0 0 1

REGISTER

565 -

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10.8.15 Read Multiple (C4h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive number no change CY starting cylinder last possible HD starting head last possible SN starting secto r last possible

SC number of sector to read 00H FT no change

LBA starting addr ess last possible

The read multiple command performs similarly to the Read Sectors command except for the following features. Interrupts are not issued on each sector, but on the transfer of each block which contains the number of sectors defined by a Set Multiple Mode command or the default , if no intervening Set Multiple command has been issued.

Command execution is identical to the Read Sectors operation except that the number of sectors defined by a Set Multiple Mode command are transferred without interrupts. DRQ qualification of the transfer is required only at the start of a data block transfer, not required for the transfer of each sector.

The block count of sectors to be transferred without intervening interrupts is programmed by the Set Multiple Mode command, which shall be executed prior to the Read Multiple command.

When the Read Multiple command is issued, the Sector Count Register contains the number of required sectors ( not the number of blocks or the block count ) . If the number of required sectors is not evenly divisible by the block count, The redundant sectors are transferred during the final partial block transfer. The partial block transfer shall be for N sectors, where

1 1 0 0 0 1 0 0

REGISTER

N = The redundant sector count ( block count ) If the Read Multiple command is attempted when Read Multiple command are disabled, the Read Multiple

operation shall be rejected with an Aborted Command error. Disk errors occurred during Read Multiple command are posted at the beginning of the block or partial block

transfer, but DRQ is still set and the data, including corrupted data, shall be transferred as they normally would .

The contents of the Command Block Registers following the transfer of a data block which has a sector in error are undefined. The host should retry the transfer as individual requests to obtain valid error information.

Subsequent blocks or defective blocks are transferred only when the error is a correctable data error. All other errors after the transfer of the block containing the error terminates the command . Interrupts are generated when DRQ is set at the beginning of each block or partial block.

- 566 -

10.8.16 Write Multiple (C5h)

360014937

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive number no change CY starting cylinder last possible HD starting head last possible

SN starting sector start sector SC number of sector to write 00H FT no change

LBA starting addr ess last possible

This command performs similarly to the Write Sectors command except for the following features. The Drive sets BSY immediately upon receipt of the command, and interrupts are not issued on each sector but on the transfer of each block which contains the number of sectors defined by Set Multiple Mode command or the default if no intervening Set Multiple command has been issued.

Command execution is identical to the Write Sectors operation except that no interrupt is generated during the transfer of number of sectors defined by the Set Multiple Mode command but generated for each block. DRQ qualification of the transfer is required only for each data block, not for each sector.

The block count of sectors to be transferred without programming of intervening interrupts by the Set Multiple Mode command, which shall be executed prior to the Write Multiple command.

When the Write Multiple command is issued, the host sets the number of sectors ( not the number of blocks or the block count ) it requests in the Sector Count Register. If the number of required sectors is not evenly divisible by the block count, the redundant sectors are transferred during the final partial block transfer. The partial block transfer shall be for N sectors, where

1 1 0 0 0 1 0 1

REGISTER

N = The redundant sector count ( block count ) If the Write Multiple command is attempted when Write Multiple command are disabled, the Write Multiple

operation shall be rejected with an Aborted Command error. Disk errors occurred during Write Multiple command are posted after the attempted disk write of the block or

partial block which are transferred. The Write Multiple command is terminated at the sector in error , even if it was in the middle of a block. Subsequent blocks are not transferred after an error. Interrupts are generated for each block or each sector, when DRQ is set .

After the transfer of a data block which contains a sector with error, the contents of the Command Block Registers are undefined. The host should retry the transfer as individual requests to obtain valid error information.

567 -

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10.8.17 Set Multiple Mode (C6h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY no change HD no change SN no change

SC The number of sectors / block no change FT no change

This command enables the drive to perform Read and Write Multiple operations and sets the block count for these commands.

The Sector Count Register is loaded with the number of sectors per block. The drive supports 1,2,4,8 or16 sectors per block.

Upon receipt of the command, the drive sets BSY=1 and checks the content of Sector Count Register. If the Sector Count Register contains a valid value and the block count is supported, the value is loaded for

all subsequent Read Multiple and Write Multiple commands. And these commands are enabled to be executed. If a block count is not supported , this command shall be terminated with the report of an Aborted Command error , and Read Multiple and Write Multiple commands are disabled.

If the Sector Count Register contains 0 when the command is issued, Read Multiple and Write Multiple commands are disabled.

In case of software reset, the result depends on the setting of Set Feature command. If FT=66h, the mode is not changed. If FT = CCh, the mode reverts to power on default (16 sectors).

1 1 0 0 0 1 1 0

REGISTER

10.8.18 Read DMA (C8h/C9h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY starting cylinder last possible HD starting head last possible SN starting secto r last possible

SC no. of sector to read 00H FT no change

LBA staring address last address

This command is basically identical to Sector command except following features.

Host initialize slave-DMA channel before issuing command.

•

- Data transfer is initiated by DMARQ and handled by slave-DMA channel in the host.

- Drive issues only one interrupt at the completion of each command to show the status is valid after data transfer.

During DMA transfer phase, either BSY or DRQ is set to 1.

When a command is completed, CY, HD, SN register (LBA register) shows the sector transferred the latest. If the drive detects unrecoverable error, the drive terminate the command and CY, HD, SN register (LBA

register) shows the sector where error occurred.

1 1 0 0 1 0 0 X

REGISTER

- 568 -

10.8.19 Write DMA (CAh/CBh)

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COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY starting cylinder last possible HD starting head last possible

SN starting secto r last possible SC no. of sector to write 00H FT no change

LBA staring address last address

This command is basically identical to Sector command except following differences.

Host initialize slave-DMA channel before issuing command.

•

- Data transfer is initiated by DMARQ and handled by slave-DMA channel in the host.

- Drive issue only one interrupt at the completion of each command to show the status is valid after data transfer.

During DMA transfer phase, either BSY or DRQ is set to 1.

When a command is completed, CY, HD, SN register (LBA register) shows the sector transferred the latest. If the drive detects unrecoverable error, the drive terminates the command and CY, HD, SN register (LBA register) shows the sector where error has occurred.

1 1 0 0 1 0 1 X

REGISTER

569 -

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10.8.20 Power Control (Exh)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY no change HD no change SN no change

SC shown below 00/FFH (for E5/98 command)

FT no change

Power Control is a group of commands which controls low power mode in the drive. The drive has three types of power mode:

Idle, Stand-by and Sleep mode At the completion of disk access, the drive automatically enters the idle mode. There are two ways to shift to the stand-by mode ( to stop rotation of spindle motor ). By a command from the host

By internal timer The internal timer is set by Stand-by or Idle command. The period is equivalent to SC x 5 seconds. If

Stand-by or Idle command is executed when SC=0 and the drive receives no access from host for 45 minutes, the drive automatically enters the stand-by mode.

1 1 1 0 X X X X

REGISTER

no change (for other command)

If the drive receives disk access command from the host when it is in stand-by mode , the spindle starts rotating and the drive executes read/write operation.

After power on, the spindle starts rotating and enters the idle mode. During idle or stand-by, READY bit is set and the drive is ready to receive a command.

To be specific , there are four different sub-commands defined by lower 4 bits of command as follows. The drive is in the idle mode and the auto stand-by ( timer setting:45 min.) when it is in default condition after power- on.

10.8.20.1 Stand-by Immediate (E0/94)

SC=X (Don't care) The drive enters the stand-by mode immediately by this command. If the drive is already in the stand-by

mode, it does no-operation and the stand-by timer doesn’t start .The drive issues an interrupt and reports the host that the command has been completed before it virtually enters the stand-by mode .

10.8.20.2 Idle Immediate (E1/95)

SC=X The drive enters the idle mode immediately by this command. If the drive is already in the idle mode, it does

no-operation. If stand-by timer is enabled, timer will start. After the drive enters the idle mode, the drive issues interrupt to report the host that the command has been completed.

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10.8.20.3 Stand-by (E2/96)

When SC = 0, the drive goes into Stand-by mode and then into Idle mode. If the drive receives no access during specified time period ( see the table below ), the drive enters stand-by mode.

When SC≠0, the drive enters stand-by mode and enables auto stand-by function. The value in SC register will be converted to auto stand-by timer according to the following table.

Value in SC register Setting 0 45 min. 1-255 (SC x 5) sec.

When the specified time period has passed, the drive enters stand-by mode. If a disk access command is received during stand-by mode, the spindle starts rotating and the drive executes read/write operation. After completing the command, the drive reset stand-by timer and the timer starts counting down.

10.8.20.4 Idle (E3/97)

When SC = 0, the drive enters Idle mode. If the drive receives no access during specified time period ( see the table below ), the drive enters stand-by mode.

When SC≠0, the drive goes into idle mode and enables auto stand-by function. The value in SC register is converted to the value of auto stand-by timer according to the following table.

Value in SC register Setting 0 45 min. 1-255 (SC x 5) sec.

When the specified time period has expired, the drive enters the stand-by mode. If disk access command is received during the stand-by mode, the spindle starts rotating and executes read/write operation. After completing the command, The drive resets stand-by timer and the timer starts counting down.

Power on default setting is auto stand-by (timer setting:45 min.).

10.8.20.5 Check Power Mode (E5/98)

SC result value=00 indicates that the drive is in stand-by mode or going into stand-by mode or is shifting from stand-by mode into idle mode.

SC result value=FFH indicates that the drive is in idle mode.

10.8.20.6 Sleep (E6/99)

When SC=X, the drive enters sleep mode immediately. After entering the sleep mode, the drive issues an interrupt to report the host that the command has been completed. The drive recovers from sleep mode and enters stand-by mode by receiving a reset.

-

571 -

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10.8.21 Read Buffer (E4h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY no change HD no change SN no change

SC 00H FT no change

This command transfers a specified sector of data ( 512 bytes) from the 128kB buffer in the drive to the host. When this command is issued, the drive sets BSY, sets up the buffer for read operation, sets DRQ, resets BSY, and generates an interrupt. The host reads up to 512 bytes of data from the buffer.

1 1 1 0 0 1 0 0

REGISTER

10.8.22 Write Buffer (E8h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY no change HD no change SN no change

SC 00H FT no change

This command transfers a sector of data from the host to the specified 512 bytes of 128kB buffer of the drive . When this command is issued, the drive will set up the buffer for write operation, and set DRQ. The host may then write up to 512 bytes of data to the buffer.

1 1 1 0 1 0 0 0

REGISTER

- 572 -

10.8.23 Identify Device (ECh)

360014937

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR drive no. no change CY no change HD no change

SN no change SC 00H FT no change

The identify device command requests the drive to transfer parameter information to the host. When the command is issued, the drive sets BSY, stores the required parameter information in the sector buffer, sets the DRQ bit, and issues an interrupt. The host may read the parameter information of the sector buffer. The

parameter words in the buffer are arranged as shown in Table10.8.23-1〜3.

1 1 1 0 1 1 0 0

REGISTER

573 -

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Table 10.8-1 Identify Information

WORD DESCRIPTION Hex.

0 General configuration

1 Number of default logical cylinders [1*] 2 Specific configuration C837 3 Number of default logical heads [2*] 4 Reserved 0000 5 Reserved 0000 6 Number of default logical sectors h logical track [3*] 7-9 Reserved 10-19 S eri al Number (20 ASCII characters) 20 Reserved 0000 21 Reserved 0000 22 Number of vendor specif i c ECC bytes transferred on READ/WRITE LONG

23-26 Firmware Revision (8 ASCII characters) 27-46 Cont rol l er model # (40 ASCII characters) 47 15-8 80h

48 Reserved 0000 49 Capabilities

50 Capabilities

51 15-8 PI O dat a transfer cycle timing mode 52 Reserved 0000

53 15-3 Reserved

15 0=ATA device 14-8 Reserved 7 1=Removable cartridge device 6 1=Fixed device 5-3 Reserved 2 Response incomplete 1-0 Reserved

commands

00H = READ/WRITE MULTIP LE command not implem ent ed

7-0

- FFH = Maximum number of sect ors that can be transferred per

01

H

interrupt on READ/WRITE MULTIPLE commands

15-14 Reserved 13 1=Standby timer values as specified in ATA/ATAPI-5 specification are supported 0=Standby timer values are vendor specific 12 Reserved 11 1=IOCHRDY supported 10 1=IOCHRDY can be disabled 9 1 8 1 7-0 Reserved

15 0 (Fixed) 14 1 (Fixed) 13-1 Reserved 0 1= a device specific Standby timer value minimum.

7-0 Reserved

2 1=the fields reported word 88 are valid 0=the fields reported word 88 are not valid 1 1=the fields reported words 64-70 are valid 0=the fields reported words 64-70 are not valid 0 1=the fields reported words 54-58 are valid

0=the fields reported words 54-58 are not valid

0040

002E

8010

0F00

4001

0200

0007

54 Number of current cyl i nders XXXX 55 Number of current heads XXXX 56 Number of cur rent s ectors per track XXXX

- 574 -

Table 10.8-2 Identify Information (Continued)

WORD DESCRIPTION Hex.

57-58 Current capacity in sectors

59 15-9 Reserved

60-61 Tot al number of user addressable sectors (LBA mode only) [5*] 62 15-8 Single word DMA transfer mode active 11

63 15-8 Multiword DMA transfer mode active 64 15-8 reserved

65 Minimum Multiword DMA Transfer Cycle Time Per Word (ns) 0078 66 Manufacturer’s Recom mended Multiword DMA Transfer Cycle Time 0078 67 Minimum PIO Trans fer Cycle Time Without Fl ow Control (ns) 0078 68 Minimum PIO Trans fer Cycle Time With I OCHRDY Fl ow Control 0078 69-79 Res erved (for future command overlap and queuing) 0000 80 Major version number

81 Minor version number 82 Command set supported.

(Number of current cylinders * Number of current heads * Number of current sectors per track)

8 1=Multiple sector setting is valid 7-0 XXh=Current setting for num ber of sectors that can be transferred per interrupt on R/W Multiple command

14

7-0 Single word DMA transfer mode supported 7-0 Multiword DMA transfer mode supported 7-0 Advanced PIO Transfer Modes Supported

bit 7-2 Reserved bit 1 = 1 PIO MODE 4 supported bit 0 = 1 PIO MODE 3 supported

0000h or FFFFh = device does not report version 15-4 Reserved for ATA-6~14

5 1=supports ATA/ATAPI-5

4 1=supports ATA/ATAPI-4 3 1=supports ATA-3 2 1=supports ATA-2 1 1=supports ATA-1 0 Reserved

0000h or FFFFh = device does not report version 0000h or FFFFh = command set notif ic ation not supported

15 Reserved 14 1=NOP command supported 13 1=READ BUFFER command supported 12 1=WRITE BUFFER command supported 11 1=WRITE VERIFY command supported 10 1=Host Protected Area feature set supported 9 1=DEVICE RESET command supported 8 1=SERVICE interrupt supported 7 1=release interrupt supported 6 1=look-ahead supported 5 1=write cache supported 4 1=supports PACKET Command feature set 3 1=supports power management feature set 2 1=supports removable feature set 1 1=supports security feature set 0 1=supports SMART feature set

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XXXX

01XX

XX07 XX07 0003

003E

0000 7C6B

11

ATA-3 defines this field as “Vendor specific (obsolete)” To maintain compatibility between ATA-2, the drive supports this field as

specified in ATA-2. This field may be used for other purposes in future models.

575 -

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Table 10.8-3 Identify Information (Continued)

WORD DESCRIPTION Hex.

83 Command set supported.

0000h or FFFFh = command set notif ic ation not supported 15 0 (Fixed) 14 1 (Fixed) 13-9 Reserved

8 1=Set MAX security extension supported 7 Reserved 6 1=SET FEATURES subcommand required to spin up after power-up 5 1=Power-Up in Standby feature set supported

4 1=Removable Media Status Notification feature set supported 3 1=Advanced Power Management feature set supported 2 1=CFA feature set supported 1 1=READ / WRITE DMA QUEUED supported 0 1=DOWNLOAD MICROCODE command supported

84 Command set/feature supported extension

15 0 (Fixed) 14 1 (Fixed) 13-0 Reserved

85 Command set/feature enabled

15 Reserved 14 1=NOP command supported 13 1=READ BUFFER command supported 12 1=WRITE BUFFER command supported 11 1=WRITE VERIFY command supported 10 1=Host Protected Area feature set supported 9 1=DEVICE RESET command supported 8 1=SERVICE interrupt enabled 7 1=release interrupt enabled 6 1=look -ahead enabled 5 1=write cache enabled 4 1=supports PACKET Command feature set 3 1=supports power management feature set 2 1=supports removable feature set 1 1=Security feature set enabled 0 1=SMART feature enabled

86 Command set/feature enabled

15-9 Reserved

8 1=SET MAX security extension enabled by SET MAX SET PASSWORD 7 Reserved 6 1=SET FEATURES subcommand required to spin-up after power-up 5 1=Power-Up In Standby feature set enabled 4 1=Removable Media Status Notification feature set enabled 3 1=Advanced Power Management feature set enabled 2 1=CFA feature set supported 1 1=READ / WRITE DMA QUEUED supported 0 1=DOWNLOAD MICROCODE command supported

87 Command set/feature default

15 0 (Fixed) 14 1 (Fixed) 13-0 Reserved

88 15-8 Ultra DMA transfer mode selected

7-0 Ultra DMA transfer modes supported

89 Time required for securi t y erase unit completion 00XX 90 Reserved 0000 91 Current Advanced Power Management set ting

15-8 Reserved

7-0 Current Advanced Power Management setti ng set by Set Features Command

4108

4000

XXXX

0X0X

4000

XX1F

00XX

- 576 -

Table 10.8-4 Identify Information (Continued)

WORD DESCRIPTION Hex.

92 Master Password Revision Code XXXX 93 Hardware reset result. The conetnts of bits 12-0 of this word shall change only

94-126 Reserved 0000 127 Removable Media Status Notification feature set supported

128 Security status

129-254 Reserved 0000 255 Integrity word

during the execution of a hardware reset.

15 0 (Fixed) 14 1 (Fixed)

13 1=device detected CBLID- above V

0=device detected CBLID- below V 12-8 Device 1 hardware reset result. Device 0 shall cl ear these bits to

zero. Device 1 shall set thes e bi ts as follows :

12 Reserved. 11 0=Device 1 did not assert PDIA G-.

1=Device 1 asserted PDIAG-.

10-9 These bits indicate how Device 1 determined t he devi ce

number: 00=Reserved. 01=a jumper was used. 10=the CSEL signal was used. 11=some other method was used or the method is unknown.

8 1 (Fixed)

7-0 Device 0 hardware reset result. Device 1 shall clear these bit to

zero. Device 0 shall set these bills as follows:

7 Reserved. 6 0=Devic e 0 does not respond when Device 1 is selected.

1=Device 0 responds when Device 1 is sele cted.

5 0=Device 0 did not detect the assertion of DASP-.

1=Device 0 detected the ass ert ion of DASP-.

4 0=Devic e 0 di d not detect the assertion of PDIA G-.

1=Device 0 detected the assertion of PDIAG-.

3 0=Devic e 0 failed diagnostics.

1=Device 0 passed diagnostic s.

2-1 These bits i ndi cate how Device 0 determined the device

number: 00=Reserved. 01=a jumper was used. 10=the CSEL signa was used. 11=some other method was used or the method is unknown.

0 1 (Fixed)

15-2 Reserved 1-0 00=Removable Media Status Notification feat ure set not supported 01=Removable Media Status Notification feature set supported 10=Reserved 11=Reserved

15-9 Reserved 8 Security level 0=High, 1=Maximum 7-6 Reserved 5 1=Enhanced security erase supported 4 1=Security count expired 3 1=Security frozen 2 1=Security locked 1 1=Security enabled 0 1=Security supported

15-8 Checksum 7-0 Signature

IH

IL

360014937

XXXX

0000

0XXX

XXA5

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360014937

Word descriptions: WORD 0: General configuration

bit 15 0=ATA bit 14-8 Reserved bit 7 1=Removable cartridge bit 6 1=Fixed disk drive bit 5-3 Reserved bit 2 Response incomplete bit 1-0 Reserved

The value for this WORD is 0040h.

WORD 1: Logical cylinder number that user can access (in default mode) [*1] WORD 2: Specific configuration

“37C8” : Device requires SET FEATURES subcommand to spin-up after power-up and IDENTIFY DEVICE response is incomplete. “738C” : Device requires SET FEATURES subcommand to spin-up after power-up and IDENTIFY DEVICE response is complete. “8C73” : Device does not requires SET FEATURES subcommand to spin-up after power-up and IDENTIFY DEVICE response is incomplete. “C837” : Device does not requires SET FEATURES subcommand to spin-up after power-up and IDENTIFY DEVICE response is complete. “All other valies” : Reserved

Power-up in Standby feature set is not supported. The value for this WORD is C837h.

WORD 3: Logical head number that user can access (in default mode) [*2] WORD 4-5: Reserved WORD 6: The number of logical sector per track (in default mode) [*3]

Default Values : [*1],[*2],[*3]

Drive Type [*1] : Word 1 [*2] : Word 3 [*3] : Word 6

MK6017MAP

WORD 7-9: Reserved WORD 10-19: Serial number WORD 20-21: Reserved WORD 22: Number of vendor specific ECC Bytes transferred to READ/WRITE LONG operation.

It is vendor specific ECC transfer length for READ/WRITE LONG commands, specified by SET FEATURE command with FEATURES RESISTERS = 44H.

The value for this WORD is 002Eh.

− − − −

12416 15 63

- 578 -

360014937

WORD 23-26: Firmware revision ( 8 ASCII characters ) WORD 27-46: Model name (40 ASCII characters)

Drive Type MK6017MAP

− −

“_” indicates ASCII space code.

WORD 47:

bit 15 - 8 shall be set to 80h bit 7 - 0 Maximum number of sectors that can be transferred per interrupt on READ/WRITE MULTIPLE commands. The default value for this WORD is 8010h.

WORD 48: Reserved WORD 49: Capabilities

bit 15-14 0=Reserved bit 13 1=Standby timer value shall be as specified in ATA-/ ATAPI-5 specification 0=Standby timer value are vendor specific bit 12 Reserved (For advanced PIO mode support) bit 11 1=IORDY is supported. bit 10 1=IORDY function can be disabled. bit 9 shall be set to 1. bit 8 shall be set to 1. bit 7- 0 Reserved

The value for this WORD is 0F00h.

TOSHIBA MK6017MAP_..._

WORD 50: Capabilities

bit 15 0 (Fixed) bit 14 1 (Fixed) bit 13-1 Reserved bit 0 1=device has a minimum Standby timer value that is device specific. Standby timer value is set to 5 minutes or more. The value for this WORD is 4001h.

WORD 51: PIO data transfer cycle timing mode

bit 15- 8 PIO data transfer cycle timing mode bit 7- 0 Reserved

The value returned in Bits 15-8 should fall into one of the mode 0 through mode. Note: For backwards compatibility with BIOS written before Word 64 was defined for advanced modes, a device reports in Word 51 the highest original PIO mode (i.e. PIO mode 0, 1, or 2) it can support.

The value for this WORD is 0200h.

WORD 52: Reserved WORD 53:

bit15- 3 Reserved bit 2 1= the fields reported in word 88 is valid bit 1 1= the fields reported in words 64〜70 are valid bit 0 1= the fields reported in words 54〜58 are valid

If the number of heads and sectors exceed the drive parameter, bit 0 and related WORD 54-58 shall be cleared to 0. The default value for this WORD is 0007h.

-

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WORD 54: Number of current cylinders defined by INITIALIZE DEVICE PARAMETERS command WORD 55: Number of current heads defined by INITIALIZE DEVICE PARAMETERS command WORD 56: Number of current sectors/track defined by INITIALIZE DEVICE PARAMETERS command WORD 57-58: Total number of sectors calculated by word 54 - 56

bit31-24 by word 58 bit 7- 0 bit23-16 by word 58 bit 15- 8 bit15- 8 by word 57 bit 7- 0 bit 7- 0 by word 57 bit 15- 8

The power on values for each models are.

Drive Type [*4] : Word 57 - 58 MK6017MAP

11,733,120(B30880H)

− −

WORD 59: bit15- 9 Reserved

bit 8 1=bit 7- 0 shows number of sectors for multiple sector operation (multiple sector operation is

enabled by SET MULTIPLE command).

bit 7〜0 The number of sectors transferred for XX

=Write / Read multiple command with 1 Interrupt

H

( Current value shall be set by SET MULTIPLE command. The default value is 16 ).

The default value for this WORD is 0110h.

WORD 60-61: Maximum number of sectors that user can access in LBA mode

bit31-24 by word 61 bit 7- 0 bit23-16 by word 61 bit 15- 8 bit15- 8 by word 60 bit 7- 0 bit 7- 0 by word 60 bit 15- 8

The power on values for each models are.

Drive Type [*5] : Word 60 – 61 MK6017MAP

11,733,120(B30880H)

− −

- 580 -

WORD 62: Mode information for single word DMA

bit15- 8 Active mode bit10 1=Mode 2 is active bit 9 1=Mode 1 is active bit 8 1=Mode 0 is active bit 7- 0 Supported mode bit 2 1=mode 2 is supported bit 1 1=mode 1 is supported bit 0 1=mode 0 is supported

Support bit reflects setting by SET FEATURE command. The default value for this WORD is 0007h.

WORD 63: Mode information for multiword DMA

bit15- 8 Active mode bit 10 1=Mode 2 is active bit 9 1=Mode 1 is active bit 8 1=Mode 0 is active bit 7- 0 Supported mode bit 2 1=mode 2 is supported bit 1 1=mode 1 is supported bit 0 1=mode 0 is supported

Support bit reflects setting by SET FEATURE command. The default value for this WORD is 0407h and the default figure is mode 2

360014937

WORD 64: Mode information for Advanced PIO transfer

bit 7- 0 Supported mode bit 1 1=mode 4 is supported bit 0 1=mode 3 is supported

The value for this WORD is 0003h.

WORD 65: Minimum multiword DMA transfer mode cycle time per word (ns)

If this bit is supported, word 53 bit 1 shall be set. The value for this WORD is 0078h (120ns).

WORD 66: Manufacturer recommended multiword DMA transfer cycle time

If the data transfer is requested in a shorter cycle time than this definition, the data transfer may be kept pending with DMARQ low because data is not ready. The value for this WORD is 0078h (120ns).

WORD 67: Minimum PIO transfer cycle time without flow control (ns)

The Drive can guarantee correct data transfer without flow control in this cycle time or longer. If this bit is supported, word 53 bit 1 is to be set. The drives which support PIO mode 3 or higher shall support this field too. This figure shall not be less than 120. The value for this WORD is 0078h (120ns).

WORD 68: Minimum PIO transfer cycle time with IORDY flow control (ns)

If this bit is supported, word 53 bit 1 is to be set. The drive that support PIO mode 3 or higher shall support this field too. This figure shall not be less than 120. The value for this WORD is 0078h (120ns).

-

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360014937

WORD 69-79: Reserved WORD 80: Major version number

If not 0000h or FFFFh, the device claims compliance with the major version(s) as indicated by bits 1 - 5 being equal to one. Values other than 0000h and FFFFh are bit significant. Since the ATA standards maintain downward compatibility, a device may set more than one bit .

WORD 81: Minor version number

If an implementor claims that the revision of the standard they used to guide their implementation does not need to be reported or if the implementation was based upon a standard prior to this revision of the standard, Word 81 shall be 0000h or FFFFh.

WORD 82: Command sets supported

bit 15 Reserved bit 14 NOP command supported bit 13 READ BUFFER command supported bit 12 WRITE BUFFER command supported bit 11 WRITE VERIFY command supported bit 10 Host Protected Area feature set supported bit 9 DEVICE RESET command supported bit 8 SERVICE interrupt supported bit 7 Release Interrupt supported bit 6 Look Ahead supported bit 5 Write Cache supported bit 4 PACKET feature set supported bit 3 The Power Management feature set is supported bit 2 The Removable feature set is supported bit 1 The security feature set is supported

bit 0 The SMART feature set is supported The value for this WORD is 7C6Bh. WORD 83: Features/Command sets supported bit 15 0 (Fixed)

bit 14 1 (Fixed) bit 13-9 Reserved bit 8 1=Set MAX security extension supported bit 7 Reserved bit 6 1=SET FEATURES subcommand required to spin up after power-up bit 5 1=Power-Up in Standby feature set supported bit 4 1=Removable Media Status Notification feature set supported bit 3 Advanced Power Management feature set supported bit 2 1=CFA feature set supported bit 1 1=READ / WRITE DMA QUEUED supported bit 0 1=DOWNLOAD MICROCODE command supported

The value for this WORD is 4108h.

WORD 84: Features / Command sets supported

bit 15 0 (Fixed) bit 14 1 (Fixed) bit 13-0 Reserved

The value for this WORD is 4000h.

- 582 -

WORD 85: Features / Command sets enable

bit 15 Reserved bit 14 NOP command supported bit 13 READ BUFFER command supported bit 12 WRITE BUFFER command supported bit 11 WRITE VERIFY command supported

bit 10 Host Protected Area feature set supported bit 9 DEVICE RESET command supported bit 8 SERVICE interrupt enabled bit 7 Release Interrupt enabled bit 6 Look Ahead enabled bit 5 Write Cache enabled bit 4 PACKET feature set supported bit 3 The Power Management feature set is enabled bit 2 The Removable feature set is supported bit 1 The security feature set is enabled bit 0 The SMART feature set is enabled

The default value for this WORD is 7C68h

WORD 86: Features / Command sets enabled

bit 15-9 Reserved bit 8 1=SET MAX security extension enabled by SET MAX SET PASSWORD bit 7 Reserved bit 6 1=SET FEATURES subcommand required to spin-up after power-up bit 5 1=Power-Up In Standby feature set enabled bit 4 Removable Media Status Notification feature set enabled bit 3 Advanced power Management feature set enabled bit 2 CFA feature set supported bit 1 WRITE / READ DMA QUEUED command supported bit 0 DOWNLOAD MICROCODE supported

360014937

The default value for this WORD is 0008h.

WORD 87: Features / Command sets enabled

bit 15 0 (Fixed) bit 14 1 (Fixed) bit 13-0 Reserved

The value for this WORD is 4000h.

WORD 88: Mode information for Ultra DMA

The active mode reflects the command change. . bit 15-8 Active transfer mode

bit 12 1=Mode 4 is active bit 11 1=Mode 3 is active bit 10 1=Mode 2 is active bit 9 1=Mode 1 is active bit 8 1=Mode 0 is active bit 7-0 Supported mode bit 4 1=Mode 4 is supported bit 3 1=Mode 3 is supported bit 2 1=Mode 2 is supported bit 1 1=Mode 1 is supported bit 0 1=Mode 0 is supported

The default value for this WORD is 001Fh

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583 -

360014937

(

WORD 89: The time period for Security Erase Unit command completion shall be set.

TIMER ACTUAL VALUE

0 Not specified

1-254

Timer ×2 ) minuites

255 > 508 minuites

WORD 90: Reserved

WORD 91: Current Advanced Power Management setting

bit 15-8 Reserved

bit 7-0 Current Advanced Power Management setting set by Set Features Command. The default value for this WORD is0080h. WORD 92: Master Password Revision Code

the value of the Master Password Revision Code set when the Master Password was last change. Valid

values are 0001h through FFFEh. A value of 0000h or FFFFh indicates that the Master Password Revision

is not supported. WORD 93: Hardware configuration test results

bit 15 0 (Fixed)

bit 14 1 (Fixed)

bit 13 1=device detected CBLID- above V

0=device detected CBLID- below V

IH

IL

bit12-8 Device 1 hardware reset result. Device 0 shall clear these bits to zero.

Device 1 shall set these bits as follows :

12 Reserved. 11 0=Device 1 did not assert PDIAG-.

1=Device 1 asserted PDIAG-.

10-9 These bits indicate how Device 1 determined the device number:

00=Reserved. 01=a jumper was used. 10=the CSEL signal was used. 11=some other method was used or the method is unknown.

8 1 (Fixed)

bit 7-0 Device 0 hardware reset result. Device 1 shall clear these bit to zero.

Device 0 shall set these bills as follows:

7 Reserved. 6 0=Device 0 does not respond when Device 1 is selected.

1=Device 0 responds when Device 1 is selected.

5 0=Device 0 did not detect the assertion of DASP-.

1=Device 0 detected the assertion of DASP-.

4 0=Device 0 did not detect the assertion of PDIAG-.

1=Device 0 detected the assertion of PDIAG-.

3 0=Device 0 failed diagnostics.

1=Device 0 passed diagnostics.

2-1 These bits indicate how Device 0 determined the device number:

00=Reserved. 01=a jumper was used. 10=the CSEL signa was used. 11=some other method was used or the method is unknown.

0 1 (Fixed)

- 584 -

WORD 94-126: Reserved

WORD 127: Removable Media Status Notification feature set supported. This function is not supported. The value for this WORD is 0000h.

WORD 128: Security status

bit 15-9 Reserved bit 8 the security level. 1=the security level is maximum 0=the security level is high bit 5 1=the Enhanced security erase unit feature supported bit 4 the security count has expired.

1=the security count is expired and SECURITY UNLOCK and SECURITY ERASE UNIT are aborted until receiving a power-on reset or hard reset.

bit 3 security frozen.

1=the drive is in security frozen mode.

bit 2 security locked.

1=the drive is in security locked mode.

bit 1 security enabled.

1=the security is enabled.

bit 0 security supported.

1=security is supported.

360014937

WORD 129-254: Reserved WORD 255: Integrity word

The data structure checksum is the two s complement of the sum of all bytes in words 0 through 254 and the byte consisting of bits 7:0 in word 255. Each byte shall be added with unsigned arismetic, and overflow shall be ignored. The sum of all 512 bytes is zero when the checksum is correct.

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360014937

10.8.24 Set Max Address (F9h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY Max. cylinder number no change HD Max. head number no change SN Max. sector number no change

SC 00H / 01

LBA Max. LBA no change

This command specifies the the maximum address in a range of actual drive capacity. The values set in CY,

HD, SN registers indicate the maximum address that can be accessed. In CHS mode, the value of Read Native Max Address command should be set in HD, SN register. Otherwise, the value shall be ignored and the value of Read Max Address command will be used. If an LBA bit (DRV / HD register bit 6) is set, the value in LBA mode shall be set. If the address exceeding the set value is accessed , “ ABORT ERROR “ error will be reported. This set value affects the values of WORD 1, 54, 57, 58, 60, 61 of IDENTIFY DEVICE command.

This command shall be immediately preceded by Read Native Max Address command. Otherwise, it will be terminated with “ ABORT ERROR ” .

If this command is issued twice with a volatile bit set to 1 after power-up or hardware reset, “ID Not Found error” will be reported.

Volatile bit ( SC register bit 0 ) : If this command is issued with a volatile bit set to 1, the set value of this command is valid after power-up or hardware reset. If this command is issued with a volatile bit cleared to 0, the set value of this command shall be cleared after hard reset or power-on and the maximam value shall be the last value with a volatile bit set to 1.

1 1 1 1 1 0 0 1

(BITO: reserved bit) no change

H

REGISTER

10.8.25 Read Native Max Address (F8h)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY maximum cylinder number HD maximum head number SN max imum sector number

LBA maximum LBA

This command sets the maximum address in CY, HD, SN register. If LBA ( DRV / HD register bit6 ) is set to 1, the maximum address shall be LBA value.

1 1 1 1 1 0 0 0

REGISTER

- 586 -

10.8.26 Set Features (EFh)

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change

SN no change SC Mode Selection for Data Transfer(*2) no change FT Features(*1) no change

(*1) Features: FT register defines following selections.

02H Enable write cache feature 03H Select data transfer mode 05H Enable advanced power management 44H ECC length is 4 6 bytes during Read/Write Long command 55H Disable read look-ahead feature 66H Disable reverting to power on defaults by soft reset 82H Disable write cache feature 85H Disable advanced power management AAH Enable read look-ahead feature BBH ECC length is 4 bytes during Read/Write Long command CCH Enable reverting to power on defaults by soft reset others Invalid (reporting with Aborted Command Error)

(*2)Mode selection for data transfer is specified in sector count register. Upper 5 bits show transfer mode and lower 3 bits show mode figure.

1 1 1 0 1 1 1 1

REGISTER

360014937

PIO default transfer mode 00000 000 PIO default transfer mode, disable IORDY 00000 001 PIO flow control transfer mode nnn 00001 nnn Single word DMA mode nnn 00010 nnn Multiword DMA mode nnn 00100 nnn Ultra DMA mode nnn 01000 nnn Reserved 10000 nnn

PIO default mode is mode 4 flow control. DMA default mode is Multiword word DMA mode 2. The level of Advanced Power Management function is set in Sector count register.

C0h-FEh …… Mode0 (Power save up to Performance Idle) 80h-BFh …… Mode1 (Power save up to Low Power Idle) 01h-7Fh …… Mode2 (Power save up to Standby) 00h,FFh …… Aborted

Transition time of power save is changed dynamically in Mode1 and Mode2 due to Adaptive power control function. The function level is set to Mode1 when Advanced Power Management function is disabled.

If FT register has any other value, the drive rejects the command with Abort Command error. Default settings after power on or hard reset are: Data transfer mode of Multiword DMA mode 2, PIO mode 4 flow control,

4 bytes ECC, look-ahead read enabled, write cache enabled, advanced power management enabled, READ/WRITE Multiple command enabled (16 sectors) and reverting to power on defaults by soft reset disabled.

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360014937

10.8.27 SECURITY SET PASSWORD (F1h)

COMMAND CODE

1 1 1 1 0 0 0 1

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change SN no change

SC no change FT no change

This command requests a transfer of a sector of data from the host including the information specified in the table below. The function of this command is decided by the transferred data.

Security Set Password information

Word Content

0 Control word

Bits 15-9 Reserved Bits 8 Security level 0=High 1=Maximum Bits 7-1 Reserved Bit 0 Identifier 0=set user password 1=set master password

1-16 Password ( 32 bytes )

17-255 Reserved

REGISTER

The settings of the identifier and security level bits interact as shown in the table below.

Identifier and security level

Identifier Level Command result

User High The password supplied with the command will be saved as the new user password. The

lock function will be enabled by the next power-on. The drive can then be unlocked by either the user password or the previously set master password.

Master High This combination will set a master password but will not enable the lock function.

User Maximum The password supplied with the command will be saved as the new user password. The

lock function will be enabled by the next power-on. The drive can only be unlocked by the user password. The master password previously set is still stored in the drive but will not be used to unlock the drive.

Master Maximum This combination will set a master password but will not enable the lock function

- 588 -

360014937

10.8.28 SECURITY UNLOCK (F2h)

COMMAND CODE

1 1 1 1 0 0 1 0

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change

SN no change SC no change FT no change

This command requests the host to transfer a sector of data including ones described in the table below .

Security Unlock Information

Word Content

0 Control word

Bit 15-1 Reserved Bit 0 Identifier 0=compare user password

1=compare master password

1-16 Password (32 bytes)

17-255 Reserved

If the Identifier bit is set to master and the drive is in high security level, then the supplied password will be compared with the stored master password. If the drive is in maximum security level, then the SECURITY UNLOCK command will be rejected.

If the Identifier bit is set to user, the drive compares the supplied password with the stored user password. If the drive fails in comparing passwords, then the drive returns an abort error to the host and decrements the unlock counter. This counter is initially set to five and will be decremented for each mismatched passwords when SECURITY UNLOCK is issued and the drive is locked. When this counter is zero, SECURITY UNLOCK and SECURITY ERASE UNIT commands are aborted until the next power-on reset or hard reset. SECURITY UNLOCK commands issued when the drive is unlocked have no effect on the unlock counter.

REGISTER

10.8.29 SECURITY ERASE PREPARE (F3h)

COMMAND CODE

1 1 1 1 0 0 1 1

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change

SN no change SC no change FT no change

The SECURITY ERASE PREPARE command must be issued immediately before the SECURITY ERASE UNIT command to enable the drive erase and unlock. This command can prevent accidental erasure of the drive.

REGISTER

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589 -

360014937

10.8.30 SECURITY ERASE UNIT (F4h)

COMMAND CODE

1 1 1 1 0 1 0 0

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change SN no change

SC no change FT no change

This command must be issued immediately after the SECURITY ERASE PREPARE command. This command requests to transfer a sector of data from the host including the data specified in the following

table. If the password does not match, the drive rejects the command with an Aborted command error.

Security Erase Unit Information

Word Content

0 Control word

Bit 15-1 Reserved Bit 0 Identifier 0=compare user password

1=compare master password

1-16 Password (32 bytes)

17-255 Reserved

The SECURITY ERASE UNIT command erases all user data. The SECURITY ERASE PREPARE command must be completed immediately prior to the SECURITY ERASE UNIT command, otherwise, the SECURITY ERASE UNIT command shall be aborted..

This command disables the drive lock function, however, the master password is still stored internally within the drive and may be reactivated later when a new user password is set.

REGISTER

10.8.31 SECURITY FREEZE LOCK (F5h)

COMMAND CODE

1 1 1 1 0 1 0 1

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change SN no change

SC no change FT no change

The SECURITY FREEZE LOCK allows the drive to enter frozen mode. After the completion of this command, any other commands that update the drive lock functions are rejected. The drive recovers from the frozen mode by power-on reset or hard reset. If SECURITY FREEZE LOCK is issued when the drive is in frozen mode, the drive executes the command and remains in frozen mode.

Following commands are rejected when the drive is in SECURITY FREEZE LOCK mode.

• SECURITY SET PASSWORD

• SECURITY UNLOCK

• SECURITY DISABLE PASSWORD

• SECURITY ERASE UNIT

REGISTER

- 590 -

360014937

10.8.32 SECURITY DISABLE PASSWORD (F6h)

COMMAND CODE

1 1 1 1 0 1 1 0

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY no change HD no change

SN no change SC no change FT no change

This command can be executed only when the drive is in unlocked mode. When the drive is in locked mode, the drive rejects the command with an Aborted command error. The SECURITY DISABLE PASSWORD command requests a transfer of a single sector of data from the host including the information specified in the following table. Then the drive checks the transferred password. If the user password or the Master password match the given password, the drive disables the lock function. This command does not change the Master password which may be reactivated later by setting a user password.

Security Disable Information

REGISTER

Word Content

0 Control word

Bit 15-1 Reserved Bit 0 Identifier 0=compare user password

1-16 Password (32 bytes)

17-255 Reserved

1=compare master password

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360014937

10.8.33 SMART Function Set

This command has a number of separate functions which can be selected via the Feature Register when the command is issued. The subcommands and their respective codes are listed below.

Subcommand Code

SMART READ ATTRIBUTE VALUES D0h SMART READ ATTRIBUTE THRESHOLDS D1h SMART ENABLE/DISABLE AUTOSAVE D2h SMART SAVE ATTRIBUTE VALUES D3h SMART EXECUTE OFF-LINE IMMIDIATE D4h SMART READ LOG SECTOR D5h SMART WRITE LOG SECTOR D6h

SMART ENABLE OPERATIONS D8h SMART DISABLE OPERATIONS D9h SMART RETURN STATUS DAh SMART ENABLE/DISABLE AUTOMATIC OFF-LINE DBh

- 592 -

y

10.8.33.1 SMART Read Attribute values

360014937

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY C24Fh no change HD no change

SN no change SC 01h 00h FT D0h no change

This command transfers SMART data as 512 byte data. Upon receipt of this command, the drive sets BSY,

sets the SMART data on the buffer. Then, it sets DRQ, resets BSY, issue an interrupt to report that the drive is ready to transfer data.

te Description

B

0-1 Data structure revision number

2-361 1st-30th Individual attribute data

362 Off-line data collection status 363 Self-test execution status

364-365 Total time in seconds to complete off-line data collection activity

366 Reserved 367 Total time in seconds to complete off-line data collection activity

368-369 SMART capability

370

371 Reserved 372 Short self-test routine recommended polling time (in minutes) 373 Extended self-test routine recommended polling time (in

374-510 Reserved

511 Data structure Checksum

BYTE 0-1: Data structure revision number 0 0 0 6 h is set

Error logging capability 7=1 Reserved 0 1= Device error logging supported

1 0 1 1 0 0 0 0

REGISTER

BYTE 2-361: Individual attribute data The following table defines 12BYTE data for each Attribue data.

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Byte Description

0 Attribute ID number 01 - FFh

1-2 Status flag

bit 0 (pre-failure/advisory bit) bit 0 = 0: If attribute value is less than the threshold, the drive is in advisory

condition. Product life period may expired. bit 0 = 1: If attribute value is less than the threshold, the drive is in pre-failure

condition. The drive may have failure. bit 1 (on-line data collection bit) bit 1= 0: Attribute value shall be changed during off-line data collection

operation. bit 1= 1: Attribute value shall be changed during normal operation. bit 2 (Performance Attribute bit) bit 3 (Error rate attribute bit) bit 4 (Event Count Attribute bit) bit 5 (Self-Preserving Attribute bit) bit 6-15 Reserved

3 Attribute value 01h-FDh

00h, FEh, FFh = Not in use 01h = Minimum value 64h = Initial value Fdh = Maximum value

4 Worst Ever normalized Attribute Value

( valid values from 01h-FEh )

5-10 Raw Attribute Value

Attribute specific raw data ( FFFFFFh - reserved as saturated value )

11 Reserved ( 00h )

ID Attribute Name 0 Indicates that entry in the data structure is not used 1 Read Error Rate 2 Throughput Performance 3 Spin Up Time 4 Start/Stop Count 5 Reallocated Sector Count 8 Seek Time performance 9 Power-On hours Count 10 Spin Retry Count

12 Drive Power Cycle Count 199 CRC Error Count 220 Disk Shift 222 Loaded Hours 223 Load Retry Count 224 Load Friction 225 Load Cycle Count 226 Load in Time 228 Power-off Retract Count 240 Write Head

- 594 -

BYTE 362: Off-line data collection status



Value Definition

00h or 80h Off-line data collection activity was never started.

01h Reserved

02h or 82h Off-line data collection activity was completed without error.

03h Reserved 04h or 84h Off-line data collection activity was suspended by an interrupting command from host. 05h or 85h Off-line data collection activity was aborted by an interrupting command from host. 06h or 86h Off-line data collection activity was aborted by the device with a fatal error.

07h-FFh Reserved

BYTE 363: Self-test execution status The self-test execution status byte reports the execution status of the self-test routine.

Bits 0-3 (Percent Self-Test Remaining) The value in these bits indicates an approximation of the percent of the self-test routine remaining until completion in ten percent increments. Valid values are 0 through 9. A value of 0 indicates the self-test routine is complete. A value of 9 indicates 90% of total test time remaining.

Bits 4-7 (Self-test Execution Status) The value in these bits indicates the current Self-test Execution Status .

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Self-test execution status values

Value Description

0 The previous self-test routine completed without error or no self-test has ever been run 1 The self-test routine was aborted by the host 2 The self-test routine was interrupted by the host with a hard or soft reset 3 A fatal error or unknown test error occurred while the device was executing its self-test

routineand the device was unable to complete the self-test routine.

4 The previous self-test completed having a test element that failed and the test element

that failed is not known. 5 The previous self-test completed having the electrical element of the test failed. 6 The previous self-test completed having the servo (and/or seek) test element of the test

failed. 7 The previous self-test completed having the read element of the test failed.

8-14 Reserved.

15 Self-test routine in progress.

BYTE 364-365: Total time The time for off-line data collection operation ( sec.) BYTE 366: Reserve BYTE 367: Off-line data collection capability  bit 0 (Execute off-line immediate implemented bit)

 bit0 = 1 SMART EXECUTE OFF-LINE IMMEDIATE command supported. bit0 = 0  SMART EXECUTE OFF-LINE IMMEDIATE command NOT supported This bit is set to 1  bit 1 Reserved

bit 2 (abort/restart off-line by host) bit2 = 1 If another command is issued, off-line data collection operation is aborted. bit2 = 0 If another command is issued, off-line data collection operation is interrupted and then

the operation will be continued.

bit 3 (off-line read scanning implemented bit) If this bit is cleared to zero, the device does not support off-line read scanning. If this bit is set to one, the device supports off-line read scanning. This bit is set to 1.

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bit 4 (self-test implemented bit) If this bit is cleared to zero, the device does not implement the Short and Extended self-test routines. If this bit is set to one, the device implements the Short and Extended self-test routines. This bit is set to 1. bits 5-7 (reserved).  This bit is set to 1 

BYTE 368-369: SMART capability

 bit 0 (power mode SMART data saving capabilities bit) bit0 = 1 SMART data is saved before Power save mode changes. bit0 = 0 SMART data is NOT saved before Power save mode changes. This bit shall be set to 1

 bit 1 (SMART data autosave after event capability bit)  This bit is fixed to 1  bit 2-15 Reserved

BYTE 370 Reserved BYTE 372-373: Self-test routine recommended polling time

The self-test routine recommended polling time shall be equal to the number of minutes that is the minimum recommended time before which the host should first poll for test completion status. Actual test time could be several times this value. Polling before this time could extend the self-test execution time or abort the test depending on the state of bit 2 of the off-line data capability bits.

BYTE 374-510: Reserved BYTE 511: Data structure checksum Checksum of the first 511 byte

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10.8.33.2 SMART Read Attribute thresholds

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COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY C24Fh no change HD no change

SN no change SC 01h 00h FT D1h no change

This command transfers attribute thresholds of the drive as 512 byte data. Upon receipt of the command, the drive sets BSY, sets SMART data on the buffer, then, sets DRQ, resets BSY and issues an interrupt to report to the host that data transfer is ready.

Byte Descriptions

0-1 Data structure revision number

2-361 1st-30th Individual attribute threshold data

362-510 Reserved

511 Data structure checksum

BYTE 0-1: Data structure revision number   The value for this byte is 0005h.

BYTE 2-361: Individual attribute threshold data

 Individual attribute threshold data consists of 12 byte data. ( See the following fig.)



Byte Description

0 Attribute ID number 01h - FFh 1 Attribute Threshold

00h= Always passed 01h= Minimum value FDh= Maximum value  FEh, FFh= Not in use

2-11 Reserved

BYTE 362-510: Reserved BYTE 511: Data structure checksum The checksum of the first 511 byte.

1 0 1 1 0 0 0 0

REGISTER

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10.8.33.3 SMART Enable Disable Attribute Autosave

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY C24Fh no change HD no change SN no change

SC 00h/F1h no change FT D2h no change

This command enables and disables the attribute autosave function within the drive. This command allow the drive to automatically save its updated attribute values to the attribute data sector at mode transition or cause the autosave feature to be disabled. The state of the attribute autosave feature (either enabled or disabled) will be preserved by the drive across power cycles.

A value of zero written by the host into the drive’s Sector Count register before issuing this command may disable this function. Disabling this feature does not preclude the drive from saving attribute values to the attribute data sector during other normal save operations.

A value of F1h written by the host into the drive’s Sector Count register before issuing this command will cause this function to be enabled. Any other non-zero value written by the host into this register before issuing this command will not change the state of the attribute autosave feature.

Upon receipt of the command from the host, the drive sets BSY, enables or disables the autosave function , clears BSY and asserts INTRQ.

1 0 1 1 0 0 0 0

REGISTER

10.8.33.4 SMART Save Attribute Values

COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY C24Fh no change HD no change SN no change

SC no change FT D3h no change

This command immediately saves changed attribute values. Upon receipt of the command, the drive sets BSY,

saves the attribute values, clears BSY and issues an interrupt.

1 0 1 1 0 0 0 0

REGISTER

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10.8.33.5 SMART Execute Off-line Immediate

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COMMAND CODE

REGISTER SETTING NORMAL COMPLETION DR DRIVE No. no change CY C24Fh no change HD no change

SN Subcommand specific no change SC no change FT D4h no change

This command causes the device to immediately initiate the activities that collect SMART data in an off-line mode and then save this data to the device's non-volatile memory, or execute a self-diagnostic test routine in either captive or off-line mode. The sector Number register shall be set to specify the operation to be executed.

SMART EXECUTE OFF-LINE IMMEDIATE Sector Number register values

Value Description of subcommand to be executed

0 Execute SMART off-line routine immediately in off-line mode 1 Execute SMART Short self-test routine immediately in off-line mode 2 Execute SMART Extended self-test routine immediately in off-line mode

3-126 Reserved

127 Abort off-line mode self-test routine 128 Reserved 129 Execute SMART Short self-test routine immediately in captive mode 130 Execute SMART Extended self-test routine immediately in captive mode

131-255 Reserved

1 0 1 1 0 0 0 0

REGISTER

10.8.33.5.1 Off-line mode

The following describes the protocol for executing a SMART EXECUTE OFF-LINE IMMEDIATE subcommand routine (including a self-test routine) in the off-line mode.

a) The device executes command completion before executing the subcommand routine. b) After clearing BSY to zero and setting DRDY to one after receiving the command, the device shall not set

BSY nor clear DRDY during execution of the subcommand routine.

c) If the device is in the process of performing the subcommand routine and is interrupted by any new

command from the host except a SLEEP, SMART DISABLE OPERATIONS, SMART EXECUTE OFF-LINE IMMEDIATE, or STANDBY IMMEDIATE command, the device suspends or aborts the subcommand routine and service the host within two seconds after receipt of the new command. After servicing the interrupting command from the host the device may immediately re-initiate or resume the subcommand routine without any additional commands from the host.

d) If the device is in the process of performing a subcommand routine and is interrupted by a SLEEP

command from the host, the device may abort the subcommand routine and execute the SLEEP command. If the device is in the process of performing any self-test routine and is interrupted by a SLEEP command from the host, the device shall abort the subcommand routine and execute the SLEEP command.

e) If the device is in the process of performing the subcommand routine and is interrupted by a SMART

DISABLE OPERATIONS command from the host, the device shall suspend or abort the subcommand routine and service the host within two seconds after receipt of the command. Upon receipt of the next SMART ENABLE OPERATIONS command the device may, either re-initiate the subcommand routine or resume the subcommand routine from where it had been previously suspended.

f) If the device is in the process of performing the subcommand routine and is interrupted by a SMART

EXECUTE OFF-LINE IMMEDIATE command from the host, the device shall abort the subcommand routine and service the host within two seconds after receipt of the command. The device shall then service the new SMART EXECUTE OFF-LINE IMMEDIATE subcommand.

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g) If the device is in the process of performing the subcommand routine and is interrupted by a STANDBY

IMMEDIATE or IDLE IMMEDIATE command from the host, the device shall suspend or abort the subcommand routine, and service the host within two seconds after receipt of the command. After receiving a new command that causes the device to exit a power saving mode, the device shall initiate or resume the subcommand routine without any additional commands from the host unless these activities were aborted by the host.

h) While the device is performing the subcommand routine it shall not automatically change power states (e.g.,

as a result of its Standby timer expiring).

If an error occurs while a device is performing a self-test routine the device may discontinue the testing and place the test results in the Self-test execution status byte.

10.8.33.5.2 Captive mode

When executing a self-test in captive mode, the device sets BSY to one and executes the self-test routine after receipt of the command. At the end of the routine the device places the results of this routine in the Self-test execution status byte and executes command completion. If an error occurs while a device is performing the routine the device may discontinue its testing, place the results of this routine in the Self-test execution status byte, and complete the command.

10.8.33.5.3 SMART off-line routine

This routine shall only be performed in the off-line mode. The results of this routine are placed in the Off-line data collection status byte.

10.8.33.5.4 SMART Short self-test routine

Depending on the value in the Sector Number register, this self-test routine may be performed in either the captive or the off-line or mode. This self-test routine should take on the order of ones of minutes to complete.

10.8.33.5.5 SMART Extended self-test routine

Depending on the value in the Sector Number register, this self-test routine may be performed in either the captive or the off-line or mode. This self-test routine should take on the order of tens of minutes to complete.

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Toshiba MK6017MAP User Manual

Specifications and Main Features

Frequently Asked Questions

User Manual