Toshiba M305, M305D, U400D, U405, U405D Schematics

1
2
3
4
5
6
7
8
3&%67$&.83
BU2 SYSTEM DIAGRAM
01
LAYER 1 : TOP LAYER 2 : SGND
A A
LAYER 3 : IN1 LAYER 4 : SVCC LAYER 5 : IN2
DDRII-SODIMM1
PAGE 8
DDRII-SODIMM2
PAGE 8
LAYER 6 : IN3 LAYER 7 : SGND1 LAYER 8 : BOT
DDRII 667/800 MHz
DDRII 667/800 MHz
PCI-E
AMD Griffin
S1G2 Processor
638P (uPGA)/35W
HT LINK
PAGE 4,5,6,7
Lion Sabie
CPU THERMAL SENSOR
PAGE 6
CPU_CLK NBGFX_CLK NBGPP_CLK SBLINK_CLK
HDMI/CEC
14.318MHz
CLOCK GEN
ICS9LPRS480AKLFT SLG8SP628VTR RTM880N-795
PAGE 3
PAGE 18
;
LAN
Marvell
B B
PCIE-LAN
8040T/8072 (10/100/GagaLAN)
PAGE 24
RJ45/RJ11 Board
PAGE 24
;
Express Card
(NEW CARD)
PAGE 24
NAND FLA SH CARD
;
Mini PCI-E Card
HD-DVD (ROBSON/TV)
PAGE 23
;
Mini PCI-E Card
(Wireless LAN)
PAGE 23
IDE/133
PAGE 23
SYSTEM CHARGER(ISL88731)
PAGE 30
SYSTEM POWER ISL6237IRZA-T
C C
CPU CORE ISL6265A
PAGE 31
SATA - HDD
PAGE 20
SATA - CD-ROM
PAGE 20
E-SATA
PAGE 20
SATA0 150MB
SATA1 150MB
SATA2 150MB
PAGE 32
G-Sensor
VCCP +1.1V AND + 1.2V(MAX871 7)
PAGE 33
LIS3L02AQ3
Keyboard
CIR
DDR II SMDDR_VTERM
1.8V/1.8VSUS(TPS51116REGR)
PAGE 34
DISCHARGE 1.5/1.25/ 1. 2/ 1.1V
D D
PAGE 35
Touch Pad Kill SW
VR (AUDIO CONN)
PAGE 19
PAGE 29 PAGE 28
PAGE 25 PAGE 29
PAGE 27
SMBUS
WINBOND KBC
NORTH BRIDGE
21mm X 21mm, 528pin BGA
PCIE X4
SOUTH BRIDGE
21mm X 21mm, 528pin BGA
PAGE 12,13,14,15,16
LPC
WPC8763LDG
PAGE 28
RS780M
PAGE 9,10,11
SB700
4.5W(Ext)
4.3W(Int)
MDC/FM TUNER CONNECTOR
PAGE 27
MDC/FM TUNER
Module
PAGE 27
CRT
PAGE 19
LVDS
PAGE 17
LED Driver
PAGE 17
LED Panel
PAGE 17
USB2.0
0,10,11 2 5
PAGE 20,23 PAGE 25
X4
1
FeliceUSB2.0 Ports
PAGE 25
Webcam
X1
PAGE 17
Fingerprint
PCI BUS / 33MHz
Azalia
PCMCIA
Controller CB1410
CONEXANT CX20561
PAGE21
PAGE 26
PCMCIA
PAGE 21
HP Amplifier G1412
PAGE 27
Audio Amplifier G1441
PAGE 26
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SBSRC_CLK
O2 OZ129T
IEEE1394 CONN
Mini PCI-E Card x1 HD DVD DECODER x1
6
Bluetooth
PAGE 25
PAGE 19
PAGE22
Memory CardReader
PAGE 22PAGE 22
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4,8
7
NEW CARD
PAGE 24
FAN
PAGE 6
1
2
3
FLASH
SPI
PAGE 28
http://hobi-elektronika.net
4
AUDIO CONNDigital MIC (HP/ MIC)
PAGE 27PAGE 16,26
5
SPEAKER
Conn
PAGE 26
6
352-(&7%8
352-(&7%8
352-(&7%8
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Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Date: Sheet
Date: Sheet of
Date: Sheet of
7
1A
1A
1A
of
135Wednesday, January 30, 2008
135Wednesday, January 30, 2008
135Wednesday, January 30, 2008
8
5
4
3
2
1
,1'(; 3RZHU6HTXHQFH
1
02
of
235Thursday, November 08, 2007
235Thursday, November 08, 2007
235Thursday, November 08, 2007
1A
1A
1A
DESCRIPTION
NOTEPAGE#
AC IN
1
SCHEMATIC BLOCK DIAG RAM
2
D D
C C
B B
A A
SYSTEM INFORMATION
3
CLOCK GENERATOR_SLG 8 SP628
4
S1G2 HT I/F 1/4
5
S1G2 DDRII MEM O RY I/F 2/4
6
S1G2 CTRL & DEBUG 3/4
7
S1G2 PWR & GND 4/4
8
DDR2 SODIMMS: A/B CHA NNEL
9
RS740/RS780-HT LINK/PCIE I/F 1/ 4
10
RS740/RS780-SYSTEM I/F 3/5
11
RS740/RS780-POWER5/5
12
SB700-PCIE/PCI/CPU/ LPC 1/4
13
SB700-ACPI/GPIO/USB 2/4
14
SB700-ACPI/GPIO/USB 2/4
15
SB700-PWR/DECOUPLING 4/4
16
SB700-STRAPS & PWRGD
17
LCD/LED PANEL/LID/CAMERA
18
HDMI/HDMI-CEC(R5F211A)
19
CRT & G-SENSOR(LIS3L02A)
20
SATA HDD/ODD & ESATA/USB
21
PCMCIA(CB1410) -OPTION
22
OZ129T(5IN1/1394)
23
MINI CARD & NAND FLASH CARD
24
NEW CARD & RJ45 BOARD/BEEP
25
TP/FP/BT/PB/FELICA/MMB CONN
26
CONEXANT(CX205601)/SPK/AMP
27
JACK/VR/FM/MIC/MDC/AMPLIFIER
28
EC(KBC)-WPCPC8763/WPC8769
29
KEYBOARD/LED/KILL SW/HOLE
30
CHARGER (ISL6251A)
31
SYSTEM 5V/3V (ISL6237)
32
AMD GRIFFIN (ISL6265)
33
+NB_CORE (RT8202)
34
DDR 1.8V(TPS51116)
35
DISCHARG E ( 1 .25V/1.5V)
5
4
3V/5VPCU
NBSWON#
DNBSWON#
S5_ON/S5
RSMRST#
PCIE_WAKE#
SUSC
SUSB
SUSON
MAINON
VR_ON
CPU_CORE
VRM_PWRGD
1.2_ON
NB_CORE
HWPG
ECPWROK
NB_PWRGD_IN
SB_PWRGD_IN
CPU CLK IN
CPU RESET
CPU POWER OK
CPU_LDTSTOP#
http://hobi-elektronika.net
3
6%60%86
SB700 SMBUS
SMBCLK0 SMBDAT0 SMBCLK1 SMBDAT1 SMBCLK2 SMBDAT2
SMBUS Function Define
DDR / DDR THER / CLOCK GEN (+3V)
Mini Card/New Card (+3VS5)
HDMI CEC (+3VS5)
.%&(&60%86
KBC SMBUS
MBCLK
MBDAT 2ND_MBCLK 2ND_MBDATA 3ND_MBCLK 3ND_MBDATA
2
SMBUS Function Define
BATTERY (+3VPCU)
CPU THER / SENSOR/EC (+3V/PCU)
HDMI CEC / TOUCH SEN(+3 VS5 )
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
SYSTEM INFORMATION
SYSTEM INFORMATION
SYSTEM INFORMATION
Date: Sheet
Date: Sheet of
Date: Sheet of
5
4
3
2
1
CLK_GEN_SLG8SP628
+3V +3V_CLK_VDD +1.2V +1.2V_CLK_VDDIO
L45
L45
BK1608HS600
BK1608HS600
D D
L49
L49
BK1608HS600
BK1608HS600
C C
C460
C460
33p/50V_4
33p/50V_4
C462
C462
33p/50V_4
33p/50V_4
21
CG_XIN
Y6
Y6
14.318MHZ
14.318MHZ
CG_XOUT
C448
C448 22u/10V_8
22u/10V_8
+3V_CLK_48
C238
C238
0.1u/10V_4
0.1u/10V_4
C461
C461
2.2u/6.3V_6
2.2u/6.3V_6
Rev:2A 12/07 Cahnge C460/C462 Load Capacitance For Matching Crystal..
PCLK_SMB(8,13)
PDAT_SMB(8,13)
New Card CLKREQ#
B B
+3V_CLK_VDD
R368 8.2K_4R368 8.2K_4 R371 8.2K_4R371 8.2K_4
NEW_CLKREQ#(13,24)
NEW_CLKREQ# CLK_PD#
NEW_CLKREQ#
C227
C227
0.1u/10V_4
0.1u/10V_4
C453
C453
0.1u/10V_4
0.1u/10V_4
+3V_CLK_VDD+3V
+1.2V_CLK_VDDIO
T43T43 T41T41
T38T38 T39T39
C232
C232
0.1u/10V_4
0.1u/10V_4
CG_XIN CG_XOUT
CLK_PD#
C233
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C474
C474
C472
C472
C233
,&6/356 31
6/*63
5701
U31
U31
4
VDDDOT
16
VDDSRC
26
VDDATIG
35
VDDSB_SRC
40
VDDSATA
48
VDDCPU
55
VDDHTT
56
VDDREF
63
VDD48
11
VDDSRC_IO0
17
VDDSRC_IO1
25
VDDATIG_IO
34
VDDSB_SRC_IO
47
VDDCPU_IO
1
GND48
7
GNDDOT
10
GNDSRC0
18
GNDSRC1
24
GNDATIG
33
GNDSB_SRC
43
GNDSATA
46
GNDCPU
52
GNDHTT
60
GNDREF
61
X1
62
X2
2
SMBCLK
3
SMBDAT
51
PD#
23
CLKREQ0#
45
CLKREQ1#
44
CLKREQ2#
39
CLKREQ3#
38
CLKREQ4#
SLG8SP628
SLG8SP628
C241
C241
0.1u/10V_4
0.1u/10V_4
31$/63
31$/
QFN64
QFN64
SRC6T/SATAT
SRC6C/SATAC SRC7T/27M_SS SRC7C/27M_NS
HTT0C/66M
REF0/SEL_HTT66
REF1/SEL_SATA
REF2/SEL_27
TGND065TGND166TGND267TGND368TGND469TGND570TGND671TGND772TGND873TGND9
CPUK8_0T
CPUK8_0C
ATIG0T ATIG0C ATIG1T ATIG1C
SB_SRC0T SB_SRC0C SB_SRC1T SB_SRC1C
SRC0T SRC0C SRC1T SRC1C SRC2T SRC2C SRC3T SRC3C SRC4T SRC4C
HTT0T/66M
48MHz_0
74
50 49
30 29 28 27
37 36 32 31
22 21 20 19 15 14 13 12 9 8
42 41 6 5
54 53
64
59 58 57
CPUCLKP_R CPUCLKN_R
NBGFX_CLKP_R NBGFX_CLKN_R
SBLINK_CLKP_R SBLINK_CLKN_R SBSRC_CLKP_R SBSRC_CLKN_R
NBGPP_CLKP_R NBGPP_CLKN_R CLK_PCIE_NEW_R CLK_PCIE_NEW#_R CLK_PCIE_MINI_R CLK_PCIE_MINI#_R CLK_PCIE_MINI2_R CLK_PCIE_MINI2#_R CLK_PCIE_LAN_R CLK_PCIE_LAN#_R
T40T40 T42T42 T45T45 T44T44
NBHT_REFCLKP_R NBHT_REFCLKN_R
CLK_48M_USB_R
SEL_HTT66 SEL_SATA SEL_27
R4004/R4005 (value may change)
Clock chip has internal se rial terminations for differencial pairs, external resistors are reserved for debug purpose.
Place within 0.5" of CLKGEN
RP63 0_4P2R_4RP63 0_4P2R_4
1 3
RP66 0_4P2R_4RP66 0_4P2R_4
1 3
RP62 0_4P2R_4RP62 0_4P2R_4
1 3
RP64 0_4P2R_4RP64 0_4P2R_4
1 3
RP67 0_4P2R_4RP67 0_4P2R_4
1 3
RP68 NEW@0_4P2R_4RP68 NEW@0_4P2R_4
1 3
RP72 0_4P2R_4RP72 0_4P2R_4
1 3
RP71 0_4P2R_4RP71 0_4P2R_4
1 3
RP73 0_4P2R_4RP73 0_4P2R_4
1 3
RP65 0_4P2R_4RP65 0_4P2R_4
1 3
R385 33_4R385 33_4
R178 158/F_4R178 158/F_4 R374 90.9/F_4R374 90.9/F_4
NB_OSC
1.8V 82.5R/130RRX780
RS780 1.1V 158R/90.9R
L46
L46
BK1608HS600
BK1608HS600
2 4
2 4
2 4 2 4
2 4 2 4 2 4 2 4 2 4
2 4
C454
C454 22u/10V_8
22u/10V_8
R369
R369
*261/F_4
*261/F_4
NBGPP_CLKP NBGPP_CLKN
CLK_PCIE_MINI CLK_PCIE_MINI#
CLK_PCIE_LAN CLK_PCIE_LAN#
RES CHIP 82.5 1/16W +-1%(0402) --> CS08252FB11 RES CHIP 130 1/16W +-1%(0402)L-F --> CS11302FB15
RES CHIP 158 1/16W +-1%(0402) --> CS11582FB00 RES CHIP 90.9 1/16W +-1%(0402) --> CS09092FB15
C473
C473
0.1u/10V_4
0.1u/10V_4
T101T101 T102T102
CLK_48M_USB (13)
EXT_NB_OSC (10)
C463
C463
C455
C455
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
CPU_CLKP (6,12) CPU_CLKN (6,12)
NBGFX_CLKP (10) NBGFX_CLKN (10)
SB_REFCLKP (10) SB_REFCLKN (10) SBSRC_CLKP (12) SBSRC_CLKN (1 2)
CLK_PCIE_NEW (12,24) CLK_PCIE_NEW# (12,24)
CLK_PCIE_MINI2 (12,23) CLK_PCIE_MINI2# (12,23)
HT_REFCLKP (10) HT_REFCLKN (10)
C458
C458
0.1u/10V_4
0.1u/10V_4
To CPU
To NB
To NB To SB
To New Card To Mini PCIE Slot To Mini PCIE Slot To LAN Controller
To NB
To SB
To NB
C452
C452
0.1u/10V_4
0.1u/10V_4
NB CLOCK INPUT TABLE
NB CLOCKS HT_REFCLKP HT_REFCLKN REFCLK_P REFCLK_N GFX_REFCLK GPP_REFCLK GPPSB_REFCLK
RX780 RS780 100M DIFF 100M DIFF 14M SE (1.8V) NC vref 100M DIFF 100M DIFF 100M DIFF
03
100M DIFF 100M DIFF 14M SE (1.1V)
100M DIFF(IN/OUT)*
NC or 100M DIFF OUTPUT
100M DIFF
+3V_CLK_VDD
R377
R377
8.2K_4
8.2K_4
R181
R181 *8.2K_4
A A
5
*8.2K_4
4
R380
R380
8.2K_4
8.2K_4
SEL_SATA SEL_HTT66 SEL_27
R373
R373
8.2K_4
8.2K_4
SEL_HTT66
SEL_SATA
SEL_27
http://hobi-elektronika.net
66 MHz 3.3V single ended HTT clock
1
*0
100 MHz differential HTT clock
1*
100 MHz non-spreading differential SRC clock 100 MHz spreading differential SRC clock
0 1
27MHz and 27M SS outputs
0*
100 MHz SRC clock
* default
3
FOR EXTERMAL/INTERNAL CLOCK
CLK_PCIE_MINI CLK_PCIE_MINI#
CLK_PCIE_LAN CLK_PCIE_LAN#
4 2
2 4
3 1
1 3
RP70
RP70 0_4P2R_4
0_4P2R_4
RP45
RP45 0_4P2R_4
0_4P2R_4
Place Close to Drivers Side
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
1%
1%
1%
Date: Sheet
Date: Sheet
2
Date: Sheet
PCIE_CLK_MINI (12,23) PCIE_CLK_MINI# (12,23)
PCIE_CLK_LAN (12,24) PCIE_CLK_LAN# (12,24)
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
CLOCK GENERATOR_SLG8SP 628
CLOCK GENERATOR_SLG8SP 628
CLOCK GENERATOR_SLG8SP 628
1
of
of
of
335Thursday, July 24, 2008
335Thursday, July 24, 2008
335Thursday, July 24, 2008
1A
1A
1A
5
4
3
2
1
04
U26A
D D
HT_NB_CPU_CAD_H0(9) HT_NB_CPU_CAD_L0(9) HT_NB_CPU_CAD_H1(9) HT_NB_CPU_CAD_L1(9) HT_NB_CPU_CAD_H2(9) HT_NB_CPU_CAD_L2(9) HT_NB_CPU_CAD_H3(9) HT_NB_CPU_CAD_L3(9) HT_NB_CPU_CAD_H4(9) HT_NB_CPU_CAD_L4(9) HT_NB_CPU_CAD_H5(9) HT_NB_CPU_CAD_L5(9) HT_NB_CPU_CAD_H6(9) HT_NB_CPU_CAD_L6(9) HT_NB_CPU_CAD_H7(9) HT_NB_CPU_CAD_L7(9)
C C
B B
HT_NB_CPU_CAD_H8(9) HT_NB_CPU_CAD_L8(9) HT_NB_CPU_CAD_H9(9) HT_NB_CPU_CAD_L9(9) HT_NB_CPU_CAD_H10(9) HT_NB_CPU_CAD_L10(9) HT_NB_CPU_CAD_H11(9) HT_NB_CPU_CAD_L11(9) HT_NB_CPU_CAD_H12(9) HT_NB_CPU_CAD_L12(9) HT_NB_CPU_CAD_H13(9) HT_NB_CPU_CAD_L13(9) HT_NB_CPU_CAD_H14(9) HT_NB_CPU_CAD_L14(9) HT_NB_CPU_CAD_H15(9) HT_NB_CPU_CAD_L15(9)
HT_NB_CPU_CLK_H0(9) HT_NB_CPU_CLK_L0(9) HT_NB_CPU_CLK_H1(9) HT_NB_CPU_CLK_L1(9)
HT_NB_CPU_CTL_H0(9) HT_NB_CPU_CTL_L0(9) HT_NB_CPU_CTL_H1(9) HT_NB_CPU_CTL_L1(9)
U26A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
SOCKET_638_PIN
SOCKET_638_PIN
HT LINK
HT LINK
VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0 L0_CLKOUT_L0 L0_CLKOUT_H1 L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
AE2 AE3 AE4 AE5
AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3
Y1 W1 Y4 Y3
R2 R3 T5 R5
+1.2V_VLDT+1.2V_VLDT
HT_CPU_NB_CAD_H0 (9) HT_CPU_NB_CAD_L0 (9) HT_CPU_NB_CAD_H1 (9) HT_CPU_NB_CAD_L1 (9) HT_CPU_NB_CAD_H2 (9) HT_CPU_NB_CAD_L2 (9) HT_CPU_NB_CAD_H3 (9) HT_CPU_NB_CAD_L3 (9) HT_CPU_NB_CAD_H4 (9) HT_CPU_NB_CAD_L4 (9) HT_CPU_NB_CAD_H5 (9) HT_CPU_NB_CAD_L5 (9) HT_CPU_NB_CAD_H6 (9) HT_CPU_NB_CAD_L6 (9) HT_CPU_NB_CAD_H7 (9) HT_CPU_NB_CAD_L7 (9) HT_CPU_NB_CAD_H8 (9) HT_CPU_NB_CAD_L8 (9) HT_CPU_NB_CAD_H9 (9) HT_CPU_NB_CAD_L9 (9) HT_CPU_NB_CAD_H10 (9) HT_CPU_NB_CAD_L10 (9) HT_CPU_NB_CAD_H11 (9) HT_CPU_NB_CAD_L11 (9) HT_CPU_NB_CAD_H12 (9) HT_CPU_NB_CAD_L12 (9) HT_CPU_NB_CAD_H13 (9) HT_CPU_NB_CAD_L13 (9) HT_CPU_NB_CAD_H14 (9) HT_CPU_NB_CAD_L14 (9) HT_CPU_NB_CAD_H15 (9) HT_CPU_NB_CAD_L15 (9)
HT_CPU_NB_CLK_H0 (9) HT_CPU_NB_CLK_L0 (9) HT_CPU_NB_CLK_H1 (9) HT_CPU_NB_CLK_L1 (9)
HT_CPU_NB_CTL_H0 (9) HT_CPU_NB_CTL_L0 (9) HT_CPU_NB_CTL_H1 (9) HT_CPU_NB_CTL_L1 (9)
+1.2V +1.2V_VLDT
R82 0_8R82 0_8
R81 0_8R81 0_8
C221
C221
4.7u/6.3V_6
4.7u/6.3V_6
Place close to socket
C220
C220
4.7u/6.3V_6
4.7u/6.3V_6
* If VLDT is connected only on one side, one 4.7uF cap should be added to the island side
C219
C219
0.22u/6.3V_4
0.22u/6.3V_4
C71
C71
0.22u/6.3V_4
0.22u/6.3V_4
C218
C218 180P_4
180P_4
C80
C80 180P_4
180P_4
C72
C72
4.7u/6.3V_6
4.7u/6.3V_6
N26
V26
M26C26
D26
F26
J26
G26
H26
E26
D25
B25
H25
E25
F25
G25
C25
J25
C24
H24
E24
F24
G24
A24
B24
D24
J24
E23
J23
H23
A23
C23
F23
G23
B23
D23
J22
C22
A22
F22
E22
H22
G22
B22
D22
C21
F21
A21
E21
H21
J21
D21
G21
B21
J20
E20
C20
F20
A20
H20
B20
D20
D19
C19
E19
H19
F19
A19
B19
E18
H18
J18
D18
F18
G18
A18
C18
B18
B17
D17
C17
G17
E17
F17
A17
H17
J17
D16
C16
G16
E16
B16B3H16
F16
A16
J16
D15
C15
A15
E15
G15
B15
F15
E14
H14
A14
F14
D14
G14
J14
B14
C14
E13
H13
D13
J13
B13
A13
F13
G13
C13
J12
H12
E12
D12
A12
G12
F12
C12
A A
CPU
B12
J11
D11
C11
E11
F11
H11
G11 AD11
A11
B11 AB11
H10
D10
F10
C10
J10
G10
B10
A10
E10
J9
D9
C9
H9
F9
A9
E9
G9
B9
J8
D8
H8
A8
C8
F8
B8
E8
F7
C7
D7
H7
A7
B7
E7
J7
B6
C6
G6
H6
D6
A6
J6
F6
E6
C5
H5
D5
G5
A5
B5
J5
E5
F5
C4
A4
D4
H4
B4
J4
F4
E4
G3
C3
H3
F3
A3
E3
J3 W3
C2
E2
H2
J2
G2
D2
F2
H1
J1
C1
G1
D1
E1
F1
A1
BGA638_50_26SQ_S1G2_OEM
5
R26
L26
Y26
U26
K26
T26
P26
W26
N25
V25
K25
Y25
U25
L25
R25
P25
T25
M25
W25
U24
R24
V24
K24
Y24
N24
P24
W24
L24
M24
T24
Y23
U23
L23
T23
K23
R23
V23P23
N23
W23
M23
R22
Y22
T22
K22
V22
N22
W22
L22
P22
U22
M22
R21
Y21
K21
P21
L21
T21
N21
W21
V21
U21
M21
U20
Y20
P20
V20
K20
M20
N20
R20
L20
T20
M19
Y19
K19
V19J19 P19
R19
U19N19
L19
R18
N18
L18
Y18
K18
W18
P18
V18
U18
T18
M18
Y17
R17
K17
L17
P17
U17
W17
N17
T17
V17
M17
V16
U16
M16
K16
W16
R16
N16
L16
T16
Y16
P16
U15
V15
T15
Y15
W15
K15
L15
V14
Y14
W14
L14
K14
T14
U14
W13
Y13
K13
V13
L13
U13
T13
L12
K12
W12
U12
V12
Y12
T12
N11
V11
K11
U11
M11
P11
T11
L11 AE11
R11
W11
Y11
K10
Y10
P10 AA10
M10
W10
N10
U10
L10
R10
V10
T10 AE10
U9W8W9
N9 P9
V9
K9
L9
Y9
T9
M9
R9
U8N8
M8
L8
T8
V8
P8
K8
R8
P7
K7
M7
L7
U7
N7
V7R6AA7
R7
T7
W7
V6
M6
K6
U6
P6
W6
N6
Y6
L6
T6
Y5
M5
V5
U5
R5
P5
W5
K5
N5
L5
T5
L4
P4G4
U4
M4
R4
V4
W4
N4
Y4
K4
T4
T3
U3
M3
Y3
P3
R3
V3D3
L3
N3
K3
W2
M2
Y2
K2
T2
P2
U2
R2 V2
N2
L2
N1
L1
K1
W1
M1
T1
V1
P1
Y1
U1
R1
4
AA26
AD26
AC26
AB26
AC25
AD25
AA25
AB25
AE25
AE24
AC24
AF24
AD24
AB24
AA24
AE23
AC23
AB23
AA23
AD23
AF23
AE22
AC22
AF22
AA22
AD22
AB22
AE21
AF21
AC21
AD21
AA21
AB21
AD20
AB20
AC20
AA20
AE20
AF20
AE19
AD19
AA19
AF19T19
AC19
AB19
AD18
AF18
AA18
AC18
AE18
AB18
AD17
AA17
AC17
AF17
AE17
AB17
AD16
AE16
AC16
AA16
AF16
AB16
AD15
AE15H15
AC15
AB15J15
AA15
AF15
AC14
AE14
AA14
AD14
AB14
AF14
AE13
AC13
AD13
AA13
AF13
AB13
AF12
AE12
AA12
AD12
AC12
AB12
AA11
AC11
AF11
AF10
AC10
AD10
AB10
AA9
AC9
AD9
AF9
AE9
AB9
AD8
AF8
AB8
AE8
AC8
AA8
AF7
AC7
AE7
AD7
AB7
AA6
AC6
AF6
AE6
AD6
AB6
AD5
AE5
AC5
AA5
AF5
AB5
AC4
AE4
AD4
AA4
AF4
AB4
AE3
AD3
AC3
AA3
AB3
AB2
AE2
AA2
AD2
AC2
AB1
AC1
AA1
AD1
1%
1%
1%
3
2
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev B
B
B
S1G2 HT I/F 1/4
S1G2 HT I/F 1/4
S1G2 HT I/F 1/4
Date: Sheet
Date: Sheet
Date: Sheet
435Thursday, July 24, 2008
435Thursday, July 24, 2008
435Thursday, July 24, 2008
of
of
1
of
1A
1A
1A
http://hobi-elektronika.net
A
CPU
B
+1.8VSUS
R327
R327 1K/F_4
1K/F_4
C
D
E
05
Processor Memory Interface
U26C
AA24 AA23
AD24
AE24 AA26 AA25
AD26
AE25 AC22 AD22
AE20
AF20
AF24
AF23 AC20 AD20 AD18
AE18 AC14 AD14
AF19 AC18
AF16
AF15
AF13 AC12
AB11
AE14
AF14
AF11 AD11
AB26
AE22 AC16 AD12
AC25 AC26
AF21
AF22
AE16 AD16
AF12
AE12
C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24
Y11
A12 B16 A22 E25
C12 B12 D16 C16 A24 A23
F26
E26
U26C
MB_DATA0 MB_DATA1 MB_DATA2 MB_DATA3 MB_DATA4 MB_DATA5 MB_DATA6 MB_DATA7 MB_DATA8 MB_DATA9 MB_DATA10 MB_DATA11 MB_DATA12 MB_DATA13 MB_DATA14 MB_DATA15 MB_DATA16 MB_DATA17 MB_DATA18 MB_DATA19 MB_DATA20 MB_DATA21 MB_DATA22 MB_DATA23 MB_DATA24 MB_DATA25 MB_DATA26 MB_DATA27 MB_DATA28 MB_DATA29 MB_DATA30 MB_DATA31 MB_DATA32 MB_DATA33 MB_DATA34 MB_DATA35 MB_DATA36 MB_DATA37 MB_DATA38 MB_DATA39 MB_DATA40 MB_DATA41 MB_DATA42 MB_DATA43 MB_DATA44 MB_DATA45 MB_DATA46 MB_DATA47 MB_DATA48 MB_DATA49 MB_DATA50 MB_DATA51 MB_DATA52 MB_DATA53 MB_DATA54 MB_DATA55 MB_DATA56 MB_DATA57 MB_DATA58 MB_DATA59 MB_DATA60 MB_DATA61 MB_DATA62 MB_DATA63
MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7
MB_DQS_H0 MB_DQS_L0 MB_DQS_H1 MB_DQS_L1 MB_DQS_H2 MB_DQS_L2 MB_DQS_H3 MB_DQS_L3 MB_DQS_H4 MB_DQS_L4 MB_DQS_H5 MB_DQS_L5 MB_DQS_H6 MB_DQS_L6 MB_DQS_H7 MB_DQS_L7
SOCKET_638_PIN
SOCKET_638_PIN
MEM:DATA
MEM:DATA
MA_DATA0 MA_DATA1 MA_DATA2 MA_DATA3 MA_DATA4 MA_DATA5 MA_DATA6 MA_DATA7 MA_DATA8
MA_DATA9 MA_DATA10 MA_DATA11 MA_DATA12 MA_DATA13 MA_DATA14 MA_DATA15 MA_DATA16 MA_DATA17 MA_DATA18 MA_DATA19 MA_DATA20 MA_DATA21 MA_DATA22 MA_DATA23 MA_DATA24 MA_DATA25 MA_DATA26 MA_DATA27 MA_DATA28 MA_DATA29 MA_DATA30 MA_DATA31 MA_DATA32 MA_DATA33 MA_DATA34 MA_DATA35 MA_DATA36 MA_DATA37 MA_DATA38 MA_DATA39 MA_DATA40 MA_DATA41 MA_DATA42 MA_DATA43 MA_DATA44 MA_DATA45 MA_DATA46 MA_DATA47 MA_DATA48 MA_DATA49 MA_DATA50 MA_DATA51 MA_DATA52 MA_DATA53 MA_DATA54 MA_DATA55 MA_DATA56 MA_DATA57 MA_DATA58 MA_DATA59 MA_DATA60 MA_DATA61 MA_DATA62 MA_DATA63
MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7
MA_DQS_H0 MA_DQS_L0 MA_DQS_H1 MA_DQS_L1 MA_DQS_H2 MA_DQS_L2 MA_DQS_H3 MA_DQS_L3 MA_DQS_H4 MA_DQS_L4 MA_DQS_H5 MA_DQS_L5 MA_DQS_H6 MA_DQS_L6 MA_DQS_H7 MA_DQS_L7
G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24 J19 E21 E22 H20 H22 Y24 AB24 AB22 AA21 W22 W21 Y22 AA22 Y20 AA20 AA18 AB18 AB21 AD21 AD19 Y18 AD17 W16 W14 Y14 Y17 AB17 AB15 AD15 AB13 AD13 Y12 W11 AB14 AA14 AB12 AA12
E12 C15 E19 F24 AC24 Y19 AB16 Y13
G13 H13 G16 G15 C22 C21 G22 G21 AD23 AC23 AB19 AB20 Y15 W15 W12 W13
MEM_MA_DATA0 MEM_MA_DATA1 MEM_MA_DATA2 MEM_MA_DATA3 MEM_MA_DATA4 MEM_MA_DATA5 MEM_MA_DATA6 MEM_MA_DATA7 MEM_MA_DATA8 MEM_MA_DATA9 MEM_MA_DATA10 MEM_MA_DATA11 MEM_MA_DATA12 MEM_MA_DATA13 MEM_MA_DATA14 MEM_MA_DATA15 MEM_MA_DATA16 MEM_MA_DATA17 MEM_MA_DATA18 MEM_MA_DATA19 MEM_MA_DATA20 MEM_MA_DATA21 MEM_MA_DATA22 MEM_MA_DATA23 MEM_MA_DATA24 MEM_MA_DATA25 MEM_MA_DATA26 MEM_MA_DATA27 MEM_MA_DATA28 MEM_MA_DATA29 MEM_MA_DATA30 MEM_MA_DATA31 MEM_MA_DATA32 MEM_MA_DATA33 MEM_MA_DATA34 MEM_MA_DATA35 MEM_MA_DATA36 MEM_MA_DATA37 MEM_MA_DATA38 MEM_MA_DATA39 MEM_MA_DATA40 MEM_MA_DATA41 MEM_MA_DATA42 MEM_MA_DATA43 MEM_MA_DATA44 MEM_MA_DATA45 MEM_MA_DATA46 MEM_MA_DATA47 MEM_MA_DATA48 MEM_MA_DATA49 MEM_MA_DATA50 MEM_MA_DATA51 MEM_MA_DATA52 MEM_MA_DATA53 MEM_MA_DATA54 MEM_MA_DATA55 MEM_MA_DATA56 MEM_MA_DATA57 MEM_MA_DATA58 MEM_MA_DATA59 MEM_MA_DATA60 MEM_MA_DATA61 MEM_MA_DATA62 MEM_MA_DATA63
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
MEM_MA_DATA[0..63] (8)
MEM_MA_DM[0..7] (8)
MEM_MA_DQS0_P (8) MEM_MA_DQS0_N (8) MEM_MA_DQS1_P (8) MEM_MA_DQS1_N (8) MEM_MA_DQS2_P (8) MEM_MA_DQS2_N (8) MEM_MA_DQS3_P (8) MEM_MA_DQS3_N (8) MEM_MA_DQS4_P (8) MEM_MA_DQS4_N (8) MEM_MA_DQS5_P (8) MEM_MA_DQS5_N (8) MEM_MA_DQS6_P (8) MEM_MA_DQS6_N (8) MEM_MA_DQS7_P (8) MEM_MA_DQS7_N (8)
To SODIMM socket A (near)
4 4
3 3
2 2
PLACE THEM CLOSE TO CPU WITHIN 1"
R324 39.2F_4R324 39.2F_4
MEM_MA0_ODT0(8) MEM_MA0_ODT1(8)
MEM_MA0_CS#0(8) MEM_MA0_CS#1(8)
MEM_MA_CKE0(8) MEM_MA_CKE1(8)
MEM_MA_BANK0(8) MEM_MA_BANK1(8) MEM_MA_BANK2(8)
MEM_MA_RAS#(8) MEM_MA_CAS#(8) MEM_MA_WE#(8)
R325 39.2F_4R325 39.2F_4
+1.8VSUS
MEM_MA_CLK1_P(8) MEM_MA_CLK1_N(8) MEM_MA_CLK7_P(8) MEM_MA_CLK7_N(8)
MEM_MA_ADD[0..15](8) MEM_MB_ADD[0..15] (8)
+SMDDR_VTERM +SMDDR_VTERM
M_ZP M_ZN
MEM_MA_RESET#
T32T32
MEM_MA1_ODT0
T15T15
MEM_MA1_ODT1
T14T14
CPU_MA1_CS_L0
T11T11
CPU_MA1_CS_L1
T10T10
CPU_MA_CLK_H5
T26T26
CPU_MA_CLK_L5
T24T24
MEM_MA_CLK1_P MEM_MA_CLK1_N MEM_MA_CLK7_P MEM_MA_CLK7_N
CPU_MA_CLK_H4
T23T23
CPU_MA_CLK_L4
T17T17
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
MEM_MA_CLK1_P
MEM_MA_CLK1_N
MEM_MA_CLK7_P
MEM_MA_CLK7_N
C389
C390
C390
4.7u/6.3V_6
4.7u/6.3V_6
C389
4.7u/6.3V_6
4.7u/6.3V_6
U26B
U26B
D10
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
C10
VTT2
B10
VTT3
AD10
VTT4
AF10
MEMZP
AE10
MEMZN
H16
RSVD_M1
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS_L0
U19
MA0_CS_L1
U20
MA1_CS_L0
V20
MA1_CS_L1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS_L
T22
MA_CAS_L
T24
MA_WE_L
SOCKET_638_PIN
SOCKET_638_PIN
C439
C439
1.5P_4
1.5P_4
C64
C64
1.5P_4
1.5P_4
Place close to CPU within 1500 mi ls
C224
C225
C225
4.7u/6.3V_6
4.7u/6.3V_6
C224
4.7u/6.3V_6
4.7u/6.3V_6
VTT5 VTT6 VTT7 VTT8 VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0 MB0_ODT1 MB1_ODT0
MB0_CS_L0 MB0_CS_L1 MB1_CS_L0
MB_CKE0 MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8
MB_ADD9 MB_ADD10 MB_ADD11 MB_ADD12 MB_ADD13 MB_ADD14 MB_ADD15
MB_BANK0 MB_BANK1 MB_BANK2
MB_RAS_L MB_CAS_L
MB_WE_L
+SMDDR_VTERM
C397
C397
0.22u/6.3V_4
0.22u/6.3V_4
W10 AC10 AB10 AA10 A10
Y10 W17 B18 W26
W23 Y26
V26 W25 U22
J25 H26
P22 R22 A17 A18 AF18 AF17 R26 R25
P24 N24 P26 N23 N26 L23 N25 L24 M26 K26 T26 L26 L25 W24 J23 J24
R24 U26 J26
U25 U24 U23
CPU_VTT_SENSE MEMVREF_CPU MEM_MB_RESET#
MEM_MB1_ODT0
CPU_MB1_CS_L0
CPU_MB_CLK_H5 CPU_MB_CLK_L5
MEM_MB_CLK1_P MEM_MB_CLK1_N MEM_MB_CLK7_P MEM_MB_CLK7_N
CPU_MB_CLK_H4 CPU_MB_CLK_L4
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
C394
C394
0.22u/6.3V_4
0.22u/6.3V_4
T97T97
T83T83
T18T18
T22T22 T19T19
T85T85 T87T87
MEM_MB_CLK1_P
C435
C435
1.5P_4
1.5P_4
MEM_MB_CLK1_N
MEM_MB_CLK7_P
C399
C399
1.5P_4
1.5P_4
MEM_MB_CLK7_N
C392
C392
0.22u/6.3V_4
0.22u/6.3V_4
R323
R323 1K/F_4
1K/F_4
CPU_VTT_SENSE (34)
MEM_MB0_ODT0 (8) MEM_MB0_ODT1 (8)
MEM_MB0_CS#0 (8) MEM_MB0_CS#1 (8)
MEM_MB_CKE0 (8) MEM_MB_CKE1 (8)
MEM_MB_CLK1_P (8) MEM_MB_CLK1_N (8) MEM_MB_CLK7_P (8) MEM_MB_CLK7_N (8)
MEM_MB_BANK0 (8) MEM_MB_BANK1 (8) MEM_MB_BANK2 (8)
MEM_MB_RAS# (8) MEM_MB_CAS# (8) MEM_MB_WE# (8)
C396
C396
0.22u/6.3V_4
0.22u/6.3V_4
C398
C398
1000P_4
1000P_4
C388
C388
0.1u/10V_4
0.1u/10V_4
MEM_MB_DATA[0..63](8)
To SODIMM socket B (Far)
MEM_MB_DM[0..7](8)
MEM_MB_DQS0_P(8) MEM_MB_DQS0_N(8) MEM_MB_DQS1_P(8) MEM_MB_DQS1_N(8) MEM_MB_DQS2_P(8) MEM_MB_DQS2_N(8) MEM_MB_DQS3_P(8) MEM_MB_DQS3_N(8) MEM_MB_DQS4_P(8) MEM_MB_DQS4_N(8) MEM_MB_DQS5_P(8) MEM_MB_DQS5_N(8) MEM_MB_DQS6_P(8) MEM_MB_DQS6_N(8) MEM_MB_DQS7_P(8) MEM_MB_DQS7_N(8)
MEM_MB_DATA0 MEM_MB_DATA1 MEM_MB_DATA2 MEM_MB_DATA3 MEM_MB_DATA4 MEM_MB_DATA5 MEM_MB_DATA6 MEM_MB_DATA7 MEM_MB_DATA8 MEM_MB_DATA9 MEM_MB_DATA10 MEM_MB_DATA11 MEM_MB_DATA12 MEM_MB_DATA13 MEM_MB_DATA14 MEM_MB_DATA15 MEM_MB_DATA16 MEM_MB_DATA17 MEM_MB_DATA18 MEM_MB_DATA19 MEM_MB_DATA20 MEM_MB_DATA21 MEM_MB_DATA22 MEM_MB_DATA23 MEM_MB_DATA24 MEM_MB_DATA25 MEM_MB_DATA26 MEM_MB_DATA27 MEM_MB_DATA28 MEM_MB_DATA29 MEM_MB_DATA30 MEM_MB_DATA31 MEM_MB_DATA32 MEM_MB_DATA33 MEM_MB_DATA34 MEM_MB_DATA35 MEM_MB_DATA36 MEM_MB_DATA37 MEM_MB_DATA38 MEM_MB_DATA39 MEM_MB_DATA40 MEM_MB_DATA41 MEM_MB_DATA42 MEM_MB_DATA43 MEM_MB_DATA44 MEM_MB_DATA45 MEM_MB_DATA46 MEM_MB_DATA47 MEM_MB_DATA48 MEM_MB_DATA49 MEM_MB_DATA50 MEM_MB_DATA51 MEM_MB_DATA52 MEM_MB_DATA53 MEM_MB_DATA54 MEM_MB_DATA55 MEM_MB_DATA56 MEM_MB_DATA57 MEM_MB_DATA58 MEM_MB_DATA59 MEM_MB_DATA60 MEM_MB_DATA61 MEM_MB_DATA62 MEM_MB_DATA63
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
1 1
C400
C395
C391
C391 1000P_4
1000P_4
A
C395 1000P_4
1000P_4
C400 1000P_4
1000P_4
+SMDDR_VTERM
C198
C393
C393 1000P_4
1000P_4
C198 180P_4
180P_4
Place close to socket
C94
C94 180P_4
180P_4
B
C222
C222 180P_4
180P_4
C223
C223 180P_4
180P_4
http://hobi-elektronika.net
C
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
S1G2 DDRII MEMORY I/F 2/4
S1G2 DDRII MEMORY I/F 2/4
1%
1%
D
1%
S1G2 DDRII MEMORY I/F 2/4
Date: Sheet
Date: Sheet
Date: Sheet
E
535Thursday, July 24, 2008
535Thursday, July 24, 2008
535Thursday, July 24, 2008
1A
1A
1A
of
of
of
5
CPU
+2.5V
12
C226
C226
*100u/6.3V_3528
*100u/6.3V_3528
C444
C444 10u/6.3V_8
10u/6.3V_8
L44
L44
0805CS_820EGTS_8
0805CS_820EGTS_8
82NH 2% 400MA
C437
C437
4.7u/6.3V_6
4.7u/6.3V_6
C438
C438
0.22u/6.3V_4
0.22u/6.3V_4
W/S= 15 mil/20mil
D D
CPU POWER-UP
C577 0.1U/10V_4C577 0.1U/10V_4
Rev:2A 12/06 Add 0.1u For AMD CPU issue.
+3V
R75 20K/F_04R75 20K/F_04
C C
2
CPU_LDT_REQ#_CPU
1
R65 0_4R65 0_4
CPU FAN
B B
VFAN(28)
Rev:3A 01/29 Change to S0 domain save power during S3 since SB .
CPU_LDT_RST# CPU_LDT_STOP# CPU_PWRGD CPU_LDT_REQ#_CPU
CNTR_VREF
C68 0.1U/10V_4C68 0.1U/10V_4
R76 34.8K/F_4R76 34.8K/F_4
Q14
Q14
3
*FDV301N
*FDV301N
+5V
C32
C32
2.2u/16V_6
2.2u/16V_6
G5 *SHORT_ PAD1G5 *SHORT_ PAD1
R77 0_4R77 0_4
R25 0_4R25 0_4
G995/Pin1- internal pull high (+5V)
R354 300_4R354 300_4 R353 300_4R353 300_4 R355 300_4R355 300_4 R356 300_4R356 300_4
CNTR_VREF
2
1
1 2
FANPWR = 1.6*VSET
+1.8V
Rev:3A 01/29 Change to 4.7K
+3V
R63
R63
4.7K_4
4.7K_4
Q11
Q11
3
FDV301N
FDV301N
CPU_LDT_RST#
U3
VIN2VO
GND
1
/FON
GND GND
4
VSET
GND
G995U3G995
3 5 6 7 8
CPU_LDT_RST_HTPA#
4
C436
C436 3300P_4
3300P_4
For Debug Only
CPU_LDT_RST# (10,12)
CPU_LDT_REQ# (10)
FANSIG(28)
TH_FAN_POWER
C377
C377 10u/16V_8
10u/16V_8
250mA
CPU_CLKP(3,12)
CPU CLK
CPU_CLKN(3,12)
+1.2V_VLDT
+1.8VSUS +1.8VSUS
+1.8VSUS
C440 3900P_4C440 3900P_4
C441 3900P_4C441 3900P_4
CPU_PWRGD(12)
CPU_LDT_STOP#(10,12)
SideBand Temp sense I2C
place them to CPU within 1.5"
R106 44.2/F_4R106 44.2/F_4 R110 44.2/F_4R110 44.2/F_4
CPU_VDD0_RUN_FB_H(32) CPU_VDD0_RUN_FB_L(32)
CPU_VDD1_RUN_FB_H(32) CPU_VDD1_RUN_FB_L(32)
R577 *300_4R577 *300_4 R357 *300_4R357 *300_4 R358 *300_4R358 *300_4 R578 *300_4R578 *300_4
R326 *300_4R326 *300_4
R347 0_4R347 0_4
R352
R352 169/F_6
169/F_6
T77T77 T25T25
T31T31
T78T78 T76T76 T75T75 T74T74 T79T79
+2.5V_CPU_VDDA_RUN
CPU_CLKIN_P CPU_CLKIN_N
CPU_LDT_RST# CPU_PWRGD CPU_LDT_STOP# CPU_LDT_REQ#_CPU
CPU_SIC CPU_SID CPU_ALERT
CPU_HTREF0 CPU_HTREF1
CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST#
CPU_TDI CPU_TEST23_TSTUPD CPU_TEST18_PLLTEST0
CPU_TEST19_PLLTEST1
CPU_TEST25_BYPASSCLK_H CPU_TEST25_BYPASSCLK_L
CPU_TEST21_SCANEN CPU_TEST20_SCANCLK2 CPU_TEST24_SCANCLK1 CPU_TEST22_SCANSHIFTEN CPU_TEST12_SCANSHIFTEN CPU_TEST27_SINGLECHAIN
CPU_TEST9_ANALOGIN
Rev:3C 05/09 Follow AMD Design Guide add termination resistor.
+3V
R307
R307 10K_4
10K_4
C378
C378 *.01u/16V_4
*.01u/16V_4
C376
C376 .01u/16V_4
.01u/16V_4
CN18
CN18
1 2 3
FAN_CON
FAN_CON
3
2
1
CPU THERM
06
SYS_SHDN# (31)
CPU_THERMTRIP# (13)
AMD_PROCHOT# (28)
CPU_PROCHOT# (12)
CPU_MEMHOT# (8,13)
+1.8VSUS
SB_SCLK3(13)
SB_SDATA3(13)
F8 F9
A9 A8
B7 A7
F10
C6
AF4 AF5
AE6
R6 P6
F6 E6
Y6
AB6
G10 AA9 AC9 AD9
AF9 AD7
H10
G9 E9
E8
AB8
AF7 AE7 AE8 AC8
AF8
C2
AA6
A3 A5 B3 B5 C1
SOCKET_638_PIN
SOCKET_638_PIN
U26D
U26D
VDDA1 VDDA2
CLKIN_H CLKIN_L
RESET_L PWROK LDTSTOP_L LDTREQ_L
SIC SID ALERT_L
HT_REF0 HT_REF1
VDD0_FB_H VDD0_FB_L
VDD1_FB_H VDD1_FB_L
DBRDY TMS TCK TRST_L TDI
TEST23 TEST18
TEST19 TEST25_H
TEST25_L TEST21
TEST20 TEST24 TEST22 TEST12 TEST27
TEST9 TEST6
RSVD1 RSVD2 RSVD3 RSVD4 RSVD5
SMBALERT#
KEY1 KEY2
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC THERMDA
VDDIO_FB_H VDDIO_FB_L
VDDNB_FB_H VDDNB_FB_L
DBREQ_L
TEST28_H TEST28_L
TEST17 TEST16 TEST15 TEST14
TEST7
TEST10
TEST8
TEST29_H TEST29_L
RSVD10
RSVD9 RSVD8 RSVD7 RSVD6
3
M11 W18
CPU_SVC_R
A6
SVC
CPU_SVD_R
A4
SVD
CPU_THERMTRIP_L#
AF6
CPU_PROCHOT_L#
AC7
CPU_MEMHOT_L#
AA8
W7 W8
W9 Y9
H6 G6
E10 AE9
TDO
J7 H8
D7 E7 F7 C7
C3 K8
C4
C9 C8
H18 H19 AA7 D5 C5
CPU_THERMDC
CPU_DBREQ# CPU_TDO
CPU_TEST28_H_PLLCHRZ CPU_TEST28_L_PLLCHRZ
CPU_TEST17_BP3 CPU_TEST16_BP2
CPU_TEST15_BP1 CPU_TEST14_BP0
CPU_TEST29_H_FBCLKOUT CPU_TEST29_L_FBCLKOUT
R97 0_4R97 0_4 R100 0_4R100 0_4
Rev:3A 01/29 Change pull-up Resistors to 2.2K
+1.8VSUSCNTR_VREF
R69
R69
2.2K_4
R70 *0_4R70 *0_4
R71 *0_4R71 *0_4
2
Q18
Q18
1
*BSS138_NL/SOT23
*BSS138_NL/SOT23
2.2K_4
H_THRMDC H_THRMDACPU_THERMDA
VDDIO_FB_H (34)
VDDIO_FB_L (34)
CPU_VDDNB_RUN_FB_H (32) CPU_VDDNB_RUN_FB_L (32)
route as differential as short as possible testpoint under package
T28T28 T29T29
T95T95 T35T35 T98T98 T96T96
T36T36 T37T37
R72
R72
R88
R88
2.2K_4
2.2K_4
*1K_4
*1K_4
CPU_SIC
CPU_SID
CPU_ALERT
+1.8VSUS
3
Q13
Q13
R74
1
2
FDV301N
FDV301N
R62
R62 1K_4
1K_4
R74 *0_4
*0_4
R73
R73 100K_4
100K_4
R61 *0_4R61 *0_4
VRM_PW RGD(16,28,32)
CPU_THERMTRIP_L#
+1.8VSUS
R68
R68 300_4
300_4
2
1 3
Q12
Q12 MMBT3904
MMBT3904
Rev:3A 02/05 Sy st em will Leakage when system into G3 mode.
CPU_PROCHOT_L#
CPU_MEMHOT_L#
+1.8VSUS +1.8VSUS
R55
R55 300_4
300_4
MMBT3904
MMBT3904
+1.8VSUS +1.8VSUS
R80
R80 300_4
300_4
2
1 3
Q15
Q15
R84 0_4R84 0_4
R78
R78 10K_4
10K_4
2
R79
R79 10K_4
10K_4
Q16
Q16 MMBT3904
MMBT3904
13
+3V
R86
R86 *10K_4
*10K_4
Reserve Test Port
CPU_DBREQ# CPU_TEST20_SCANCLK2 CPU_TEST21_SCANEN CPU_TEST23_TSTUPD CPU_TEST24_SCANCLK1
R591 300_4R591 300_4 R594 300_4R594 300_4 R592 300_4R592 300_4 R595 300_4R595 300_4 R593 300_4R593 300_4
Rev:3A/3C 05/09 AMD CPU noise sensitivity be added termination resistor.
CPU H/W MONITOR
+3V
2
Q21
Q21
2ND_MBCLK(19,28)
2ND_MBDATA(19,28)
A A
PM_THERM#(14)
3
3
1
RHU002N06
RHU002N06
+3V
2
Q22
Q22
RHU002N06
RHU002N06
1
LM86_SMC LM86_SMD
R108 *0_4R108 *0_4
OVERT# Check EC Setting Degree
5
+3V
R105
R103
R103 10K_4
10K_4
R105 10K_4
10K_4
8 7 6 4
R95
R95 10K_4
10K_4
SMBALERT# THERM_SHD#
MAX6657,G781P8,W83L771G
ADDRESS: 98H
U12
U12
SCLK SDA ALERT# OVERT#
ADM103 2
ADM103 2
MSOP
VCC DXP DXN GND
Rev:3A 02/29 GMT G781 Reverse R133 0 Ohm For Thermal Sensor issue.
R109
R109 200_4
200_4
+3V_THERM
C114 0.1u/10V_4C114 0.1u/10V_4
1 2 3 5
4
H_THRMDA
C96
C96 2200P_4
2200P_4
H_THRMDC
R133 *0_4R133 *0_4
R92
R92 10K_4
10K_4
+3V
2
1 3
R89
R89 330_4
330_4
Q17
Q17 MMBT3904
MMBT3904
C82 *1u/16V_6C82 *1u/16V_6
SYS_SHDN#
3
CPU_PWRGD
+1.8VSUS
CPU_SVC_R
+1.8VSUS
CPU_SVD_R
+1.8VSUS
Serial VID
R156 0_4R156 0_4 R161 *2.2K_4R161 *2.2K_4 R164 *220_4R164 *220_4
R154 0_4R154 0_4 R159 1K_4R159 1K_4 R163 *220_4R163 *220_4
R153 0_4R153 0_4 R155 1K_4R155 1K_4 R160 *220_4R160 *220_4
VFIX MODE SVC SVD
00 001 1 11
CPU_PWRGD_SVID_REG (32)
CPU_SVC (32)
Serial VID Clock
CPU_SVD (32)
Serial VID Data
VID Override Circuit
Voltage Output(CPU Power)
1.4V
1.2V
1.0V
0.8V
2
HDT Connector
+1.8VSUS
C387
C387
*0.1u/10_4
*0.1u/10_4
CPU_DBREQ# CPU_DBRDY CPU_TCK CPU_TMS CPU_TDI CPU_TRST# CPU_TDO
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
1%
1%
1%
Date: Sheet
Date: Sheet of
Date: Sheet of
CN22
CN22
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
KEY
KEY
*HDT CONN
*HDT CONN
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
S1G2 CTRL & DEBUG 3/4
S1G2 CTRL & DEBUG 3/4
S1G2 CTRL & DEBUG 3/4
1
25
CPU_LDT_RST_HTPA#
635Thursday, July 24, 2008
635Thursday, July 24, 2008
635Thursday, July 24, 2008
1A
1A
1A
of
http://hobi-elektronika.net
5
4
3
2
1
CPU
07
U26F
U26F
D D
U26E
U26E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
C C
CPU VDDNB_CORE
+1.8VSUS
B B
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
SOCKET_638_PIN
VDD1_1 VDD1_2 VDD1_3 VDD1_4 VDD1_5 VDD1_6 VDD1_7 VDD1_8
VDD1_9 VDD1_10 VDD1_11 VDD1_12 VDD1_13 VDD1_14 VDD1_15 VDD1_16 VDD1_17 VDD1_18 VDD1_19 VDD1_20 VDD1_21 VDD1_22 VDD1_23 VDD1_24 VDD1_25 VDD1_26
VDDIO27 VDDIO26 VDDIO25 VDDIO24 VDDIO23 VDDIO22 VDDIO21 VDDIO20 VDDIO19 VDDIO18 VDDIO17 VDDIO16 VDDIO15 VDDIO14 VDDIO13
P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2
Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18
CPU_CORE1CPU_CORE0
+1.8VSUS
AA4 AA11 AA13 AA15 AA17 AA19
AB2
AB7
AB9 AB23 AB25 AC11 AC13 AC15 AC17 AC19 AC21
AD6
AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23
B4 B6 B8
B9 B11 B13 B15 B17 B19 B21 B23 B25
D6
D8
D9 D11 D13 D15 D17 D19 D21 D23 D25
E4
F2
F11 F13 F15 F17 F19 F21 F23 F25
H7
H9 H21 H23
J4
SOCKET_638_PIN
SOCKET_638_PIN
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
CPU_CORE0
C151
C151 22u/6.3V_8
22u/6.3V_8
CPU_CORE1
C86
C86 22u/6.3V_8
22u/6.3V_8
CPU VDDNB_CORE
C92
C92 22u/6.3V_8
22u/6.3V_8
BOTTOM SIDE DECOUPLING
C192
+1.8VSUS
C192 22u/6.3V_8
22u/6.3V_8
C89
C89 22u/6.3V_8
22u/6.3V_8
C172
C172 22u/6.3V_8
22u/6.3V_8
C191
C191
0.22u/6.3V_4
0.22u/6.3V_4
C136
C136
0.22u/6.3V_4
0.22u/6.3V_4
C133
C133 22u/6.3V_8
22u/6.3V_8
C170
C170
0.01u/16V_4
0.01u/16V_4
C106
C106
0.01u/16V_4
0.01u/16V_4
C101
C101
0.22u/6.3V_4
0.22u/6.3V_4
C176
C176 22u/6.3V_8
22u/6.3V_8
C85
C85 22u/6.3V_8
22u/6.3V_8
C105
C105 22u/6.3V_8
22u/6.3V_8
C171
C171 22u/6.3V_8
22u/6.3V_8
C116
C116 22u/6.3V_8
22u/6.3V_8
C117
C117 22u/6.3V_8
22u/6.3V_8
C157
C157 180P_4
180P_4
C132
C132
0.01u/16V_4
0.01u/16V_4
C141
C141
0.22u/6.3V_4
0.22u/6.3V_4
DECOUPLING BETWEEN PROCESSOR AND DIMMs PLACE CLOSE TO PROCESSOR AS POSSIBLE
+1.8VSUS
C97
+1.8VSUS
C97
4.7u/6.3V_6
4.7u/6.3V_6
C165
C165
0.22u/6.3V_4
0.22u/6.3V_4
C95
C95
4.7u/6.3V_6
4.7u/6.3V_6
C100
C100
0.22u/6.3V_4
0.22u/6.3V_4
C174
C174
4.7u/6.3V_6
4.7u/6.3V_6
C177
C177
0.01u/16V_4
0.01u/16V_4
C138
C138
4.7u/6.3V_6
4.7u/6.3V_6
C178
C178
0.01u/16V_4
0.01u/16V_4
C99
C99
0.22u/6.3V_4
0.22u/6.3V_4
C119
C119 180P_4
180P_4
C142
C142
0.22u/6.3V_4
0.22u/6.3V_4
C139
C139 180P_4
180P_4
C183
C183 180P_4
180P_4
C110
C110 180P_4
180P_4
PROCESSOR POWER AND GROUND
A A
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Nu mber Rev
Size Document Nu mber Rev
Size Document Nu mber Rev Custom
Custom
Custom
S1G2 PWR & GND 4/4
S1G2 PWR & GND 4/4
1%
1%
5
4
http://hobi-elektronika.net
3
2
1%
S1G2 PWR & GND 4/4
Date: Sheet
Date: Sheet
Date: Sheet
1
735Wednesday, December 19, 2007
735Wednesday, December 19, 2007
735Wednesday, December 19, 2007
1A
1A
1A
of
of
of
5
+SMDDR_VTERM
C115
C115
C195
C195
0.1u/10V_4
0.1u/10V_4
D D
+1.8VSUS
C145
C145
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C126
C126
0.1u/10V_4
0.1u/10V_4
C163
C163
0.1u/10V_4
0.1u/10V_4
C216
C216
0.1u/10V_4
0.1u/10V_4
TERMINATOR DECOUPLING CAPACITOR DDR2 TERMINATOR
C111
C111
C414
C414
C212
C212
0.1u/10V_4
0.1u/10V_4
C186
C186
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C410
C410
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C412
C412
0.1u/10V_4
0.1u/10V_4
C415
C415
0.1u/10V_4
0.1u/10V_4
C426
C426
0.1u/10V_4
0.1u/10V_4
C175
C175
0.1u/10V_4
0.1u/10V_4
C125
C125
0.1u/10V_4
0.1u/10V_4
C193
C193
0.1u/10V_4
0.1u/10V_4
C213
C213
0.1u/10V_4
0.1u/10V_4
4
C152
C152
0.1u/10V_4
0.1u/10V_4
C143
C143
0.1u/10V_4
0.1u/10V_4
C144
C144
0.1u/10V_4
0.1u/10V_4
C112
C112
0.1u/10V_4
0.1u/10V_4
C208
C208
0.1u/10V_4
0.1u/10V_4
C214
C214
0.1u/10V_4
0.1u/10V_4
C196
C196
0.1u/10V_4
0.1u/10V_4
C201
C201
0.1u/10V_4
0.1u/10V_4
C430
C430
0.1u/10V_4
0.1u/10V_4
+SMDDR_VTERM
C124
C124
0.1u/10V_4
0.1u/10V_4
C179
C179
0.1u/10V_4
0.1u/10V_4
C419
C419
0.1u/10V_4
0.1u/10V_4
C207
C207
0.1u/10V_4
0.1u/10V_4
3
MEM_MA0_C S#0 MEM_MA_RAS#
MEM_MA_CAS# MEM_MA_ADD8 MEM_MA_W E#
MEM_MA0_O DT1 MEM_MA0_C S#1
MEM_MB0_C S#0 MEM_MB_RAS#
MEM_MB_W E# MEM_MB_CAS#
MEM_MB0_C S#1 MEM_MB0_O DT1
RP24 47_4P2R_4RP24 47_4P2R_4
4 2
RP56 47_4P2R_4RP56 47_4P2R_4
4 2
RP55 47_4P2R_4RP55 47_4P2R_4
4 2
RP23 47_4P2R_4RP23 47_4P2R_4
4 2
RP22 47_4P2R_4RP22 47_4P2R_4
4 2
RP19 47_4P2R_4RP19 47_4P2R_4
4 2
3 1
3 1
3 1
3 1
3 1
3 1
+SMDDR_VTERM
2
MEM_MA_BANK2 MEM_MA_CKE0 MEM_MA_ADD9 MEM_MA_ADD12 MEM_MA_ADD5
MEM_MA_ADD1 MEM_MA_ADD3 MEM_MA_BANK0 MEM_MA_ADD10 MEM_MA_ADD7 MEM_MA_ADD14 MEM_MA_ADD15 MEM_MA_CKE1
MEM_MA_ADD6 MEM_MA_ADD11 MEM_MA_ADD2 MEM_MA_ADD4 MEM_MA_BANK1 MEM_MA_ADD0 MEM_MA_ADD13 MEM_MA0_O DT0
RP61 47_4P2R_4RP61 47_4P2R_4
4 2
RP60 47_4P2R_4RP60 47_4P2R_4
4 2
RP59 47_4P2R_4RP59 47_4P2R_4
4 2
RP58 47_4P2R_4RP58 47_4P2R_4
4 2
RP57 47_4P2R_4RP57 47_4P2R_4
4 2
RP36 47_4P2R_4RP36 47_4P2R_4
4 2
RP38 47_4P2R_4RP38 47_4P2R_4
4 2
RP32 47_4P2R_4RP32 47_4P2R_4
4 2
RP30 47_4P2R_4RP30 47_4P2R_4
4 2
RP26 47_4P2R_4RP26 47_4P2R_4
4 2
RP20 47_4P2R_4RP20 47_4P2R_4
4 2
3 1 3 1 3 1 3 1 3 1 3 1 3 1
3 1 3 1 3 1 3 1
+SMDDR_VTERM
MEM_MB_CKE0 MEM_MB_BANK2 MEM_MB_ADD12 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD5 MEM_MB_ADD3 MEM_MB_ADD1 MEM_MB_ADD10 MEM_MB_BANK0 MEM_MB_ADD7 MEM_MB_ADD14 MEM_MB_CKE1 MEM_MB_ADD15
MEM_MB_ADD6 MEM_MB_ADD11 MEM_MB_ADD2 MEM_MB_ADD4 MEM_MB_BANK1 MEM_MB_ADD0 MEM_MB0_O DT0 MEM_MB_ADD13
1
RP39 47_4P2R_4RP39 47_4P2R_4
4 2
RP34 47_4P2R_4RP34 47_4P2R_4
4 2
RP31 47_4P2R_4RP31 47_4P2R_4
4 2
RP28 47_4P2R_4RP28 47_4P2R_4
4 2
RP25 47_4P2R_4RP25 47_4P2R_4
4 2
RP37 47_4P2R_4RP37 47_4P2R_4
4 2
RP40 47_4P2R_4RP40 47_4P2R_4
4 2
RP33 47_4P2R_4RP33 47_4P2R_4
4 2
RP29 47_4P2R_4RP29 47_4P2R_4
4 2
RP27 47_4P2R_4RP27 47_4P2R_4
4 2
RP21 47_4P2R_4RP21 47_4P2R_4
4 2
3 1 3 1 3 1 3 1 3 1 3 1 3 1
3 1 3 1 3 1 3 1
+SMDDR_VTERM
+1.8VSUS
103
111
104
112
117
118
CN25
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15
C C
B B
A A
+1.8VSUS
MEM_MA_BANK0(5) MEM_MA_BANK1(5) MEM_MA_BANK2(5)
MEM_MA_DM[ 0..7](5) MEM_MA_DQ S0_P(5)
MEM_MA_DQ S1_P(5) MEM_MA_DQ S2_P(5) MEM_MA_DQ S3_P(5) MEM_MA_DQ S6_P(5) MEM_MA_DQ S4_P(5) MEM_MA_DQ S5_P(5) MEM_MA_DQ S7_P(5)
MEM_MA_DQ S0_N(5) MEM_MA_DQ S1_N(5) MEM_MA_DQ S2_N(5) MEM_MA_DQ S3_N(5) MEM_MA_DQ S6_N(5) MEM_MA_DQ S4_N(5)
MEM_MA_DQ S7_N(5)
MEM_MA_CL K1_P(5) MEM_MA_CL K1_N(5) MEM_MA_CL K7_P(5) MEM_MA_CL K7_N(5)
MEM_MA_CKE0(5) MEM_MA_CKE1(5)
MEM_MA_RAS#(5) MEM_MA_CAS#(5) MEM_MA_W E#(5) MEM_MA0_C S#0(5) MEM_MA0_C S#1(5)
MEM_MA0_O DT0(5) MEM_MA0_O DT1(5)
PDAT_SMB(3,13)
PCLK_SMB(3,13)
C237 0.1u/10V_4C237 0.1u/10V_4
R58 10K_4R58 10K_4 R56 10K_4R56 10K_4
MEM_MA_BANK0 MEM_MA_BANK1 MEM_MA_BANK2
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM6 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM7
MEM_MA_CKE0 MEM_MA_CKE1
MEM_MA_RAS# MEM_MA_CAS# MEM_MA_W E# MEM_MA0_C S#0 MEM_MA0_C S#1
MEM_MA0_O DT0 MEM_MA0_O DT1
DIM1_SA0 DIM1_SA1
PDAT_SMB PCLK_SMB
C63 0.1u/10V_4C63 0.1u/10V_4
SMVREF_DIM
SMVREF_DIM
C230
C230
C235
C235
1000P_4
1000P_4
2.2u/6.3V_6
2.2u/6.3V_6
DDRII
5
102 101 100
105
116
107 106
130 147 170 185
131 148 169 188
129 146 167 186
164 166
108 113 109 110 115
114 119
198 200
195 197
199
99 98 97 94 92 93 91
90 89
86 84
85 10
26 52 67
13 31 51 70
11 29 49 68
30 32
79 80
1 2
3 8
9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
BA0 BA1 BA2
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd VREF VSS0
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
SO-DIMM
SO-DIMM
(H=5.6)
(H=5.6)
59
CN25
DQ0 DQ1
VDD8
VDD7
VDD9
VDD10
VDD11
DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS56
(REVERSE)
(REVERSE)
VSS55 VSS54 VSS53 VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
DDR SO-DIMM SOCKET 1.8V
DDR SO-DIMM SOCKET 1.8V
MEM_MA_DATA1
5
MEM_MA_DATA0
7
MEM_MA_DATA6
17
MEM_MA_DATA7
19
MEM_MA_DATA5
4
MEM_MA_DATA4
6
MEM_MA_DATA2
14
MEM_MA_DATA3
16
MEM_MA_DATA8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA14
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22 36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA19
55
MEM_MA_DATA18
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA25
61
MEM_MA_DATA24
63
MEM_MA_DATA30
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA31
74
MEM_MA_DATA26
76
MEM_MA_DATA55
123
MEM_MA_DATA50
125
MEM_MA_DATA49
135
MEM_MA_DATA52
137
MEM_MA_DATA54
124
MEM_MA_DATA51
126
MEM_MA_DATA53
134
MEM_MA_DATA48
136
MEM_MA_DATA32
141
MEM_MA_DATA36
143
MEM_MA_DATA39
151
MEM_MA_DATA37
153
MEM_MA_DATA38
140
MEM_MA_DATA33
142
MEM_MA_DATA34 MEM_MB_DATA35
152
MEM_MA_DATA35
154
MEM_MA_DATA45
157
MEM_MA_DATA44
159
MEM_MA_DATA42
173
MEM_MA_DATA43
175 158
MEM_MA_DATA41
160 174
MEM_MA_DATA46
176
MEM_MA_DATA61
179
MEM_MA_DATA60
181
MEM_MA_DATA63
189
MEM_MA_DATA62
191
MEM_MA_DATA56
180
MEM_MA_DATA57
182
MEM_MA_DATA58
192
MEM_MA_DATA59
194
MEMHOT _DIMM#_1
50
MEM_MA_RESET#1
69 83 120 163
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
4
R157 0_4R157 0_4
T90T90
MEM_MA_DATA[0 ..63] (5)
+SMDDR_VREF
R175
R175 *0_4
*0_4
SMVREF_DIM
C234
C234
0.1u/10V_4
0.1u/10V_4
+1.8VSUS
+1.8VSUS
R173
R173 1K/F_4
1K/F_4
R176
R176 1K/F_4
1K/F_4
MEM_MB_ADD[0.. 15](5)
MEM_MB_BANK0(5) MEM_MB_BANK1(5) MEM_MB_BANK2(5)
MEM_MB_DM[ 0..7](5) MEM_MB_DQ S0_P(5)
MEM_MB_DQ S1_P(5) MEM_MB_DQ S2_P(5) MEM_MB_DQ S3_P(5) MEM_MB_DQ S6_P(5) MEM_MB_DQ S4_P(5) MEM_MB_DQ S5_P(5) MEM_MB_DQ S7_P(5)
MEM_MB_DQ S0_N(5) MEM_MB_DQ S1_N(5) MEM_MB_DQ S2_N(5) MEM_MB_DQ S3_N(5) MEM_MB_DQ S6_N(5) MEM_MB_DQ S4_N(5) MEM_MB_DQ S5_N(5)MEM_MA_DQ S5_N(5) MEM_MB_DQ S7_N(5)
MEM_MB_CLK1_P(5) MEM_MB_CLK1_N(5) MEM_MB_CLK7_P(5) MEM_MB_CLK7_N(5)
MEM_MB_CKE0(5) MEM_MB_CKE1(5)
MEM_MB_RAS#(5) MEM_MB_CAS#(5)
MEM_MB_W E#(5) MEM_MB0_C S#0(5) MEM_MB0_C S#1(5)
MEM_MB0_O DT0(5) MEM_MB0_O DT1(5)
+3V
+3V+3V
R57 10K_4R57 10K_4 R60 10K_4R60 10K_4
C231 0.1u/10V_4C231 0.1u/10V_4
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1 MEM_MB_BANK2
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM6 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM7
MEM_MB_CKE0 MEM_MB_CKE1
MEM_MB_RAS# MEM_MB_CAS# MEM_MB_W E# MEM_MB0_C S#0 MEM_MB0_C S#1
MEM_MB0_O DT0 MEM_MB0_O DT1
DIM2_SA0 DIM2_SA1
PDAT_SMB PCLK_SMB
C62 0.1U/10V_4C62 0.1U/10V_4
SMVREF_DIM
C228
C228
C229
C229
2.2u/6.3V_6
2.2u/6.3V_6
1000P_4
1000P_4
SMbus Address A2SMbus Address A0
http://hobi-elektronika.net
3
102 101 100
99 98 97 94 92 93 91
105
90 89
116
86 84
107 106
85 10
26 52
67 130 147 170 185
13
31
51
70 131 148 169 188
11
29
49
68 129 146 167 186
30
32 164 166
79
80 108
113 109 110 115
114 119
198 200
195 197
199
1 2
3 8
9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54
A0 A1
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15
BA0 BA1 BA2
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7
CK0 CK0 CK1 CK1
CKE0 CKE1
RAS CAS WE S0 S1
ODT0 ODT1
SA0 SA1
SDA SCL
VDDspd VREF VSS0
VSS1 VSS2
o
VSS3 VSS4 VSS5
(H=10.1)
(H=10.1)
VSS6 VSS7 VSS8 VSS9 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20
59
+1.8VSUS
103
SO-DIMM
SO-DIMM
111
104
112
117
118
CN24
CN24
DQ0 DQ1
VDD8
VDD7
VDD9
VDD10
VDD11
DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
NC1
NC2
NC3
NC4
NC/TEST
VSS56 VSS55 VSS54 VSS53
(REVERSE)
(REVERSE)
VSS52 VSS51 VSS50 VSS49 VSS48 VSS47 VSS46 VSS45 VSS44 VSS43 VSS42 VSS41 VSS40 VSS39 VSS38 VSS37 VSS36 VSS35 VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
DDR SO-DIMM SOCKET 1.8V
DDR SO-DIMM SOCKET 1.8V
MEM_MB_DATA4
5
MEM_MB_DATA5
7
MEM_MB_DATA3
17
MEM_MB_DATA2
19
MEM_MB_DATA0
4
MEM_MB_DATA1
6
MEM_MB_DATA7
14
MEM_MB_DATA6
16
MEM_MB_DATA8
23
MEM_MB_DATA9
25
MEM_MB_DATA10
35
MEM_MB_DATA14
37
MEM_MB_DATA12
20
MEM_MB_DATA13
22
MEM_MB_DATA15MEM_MA_DATA11
36
MEM_MB_DATA11
38
MEM_MB_DATA16
43
MEM_MB_DATA21
45
MEM_MB_DATA18
55
MEM_MB_DATA19
57
MEM_MB_DATA20
44
MEM_MB_DATA17
46
MEM_MB_DATA22
56
MEM_MB_DATA23
58
MEM_MB_DATA25
61
MEM_MB_DATA29
63
MEM_MB_DATA27
73
MEM_MB_DATA31
75
MEM_MB_DATA28
62
MEM_MB_DATA24
64
MEM_MB_DATA30
74
MEM_MB_DATA26
76
MEM_MB_DATA50
123
MEM_MB_DATA51
125
MEM_MB_DATA49
135
MEM_MB_DATA48
137
MEM_MB_DATA54
124
MEM_MB_DATA55
126
MEM_MB_DATA53
134
MEM_MB_DATA52
136
MEM_MB_DATA36
141
MEM_MB_DATA37
143
MEM_MB_DATA38
151
MEM_MB_DATA34
153
MEM_MB_DATA32
140
MEM_MB_DATA33
142 152
MEM_MB_DATA39
154
MEM_MB_DATA45
157
MEM_MB_DATA40
159
MEM_MB_DATA43
173
MEM_MB_DATA47
175
MEM_MB_DATA44MEM_MA_DATA40
158
MEM_MB_DATA41
160
MEM_MB_DATA42MEM_MA_DATA47
174
MEM_MB_DATA46
176
MEM_MB_DATA57
179
MEM_MB_DATA60
181
MEM_MB_DATA58
189
MEM_MB_DATA59
191
MEM_MB_DATA56
180
MEM_MB_DATA61
182
MEM_MB_DATA62
192
MEM_MB_DATA63
194
MEMHOT _DIMM#_2
50
MEM_MB_RESET#2
69 83 120 163
196 193 190 187 184 183 178 177 172 171 168 165 162 161 156 155 150 149 145 144 139 138 133
2
R158 0_4R158 0_4
T91T91
+3V
PDAT_SMB PCLK_SMB
ADDRESS: 92H
MEM_MB_DATA[0 ..63] (5)MEM_MA_ADD[0.. 15](5)
+1.8VSUS
C128
C128 10U/10V_8
10U/10V_8
+1.8VSUS
C189
C189 10U/10V_8
10U/10V_8
MEMHOT _DIMM#MEMHOT _DIMM#
C449 *0.1u/10V_4C449 *0.1u/10V_4
U30
U30
A07+VS
6
A1
5
A2
1
SDA
2
SCL
*DS75U+T&R
*DS75U+T&R
Close DDR2 socket
PLACE CLOSE TO SOCKET( PER EMI/EMC)
C158
C158
C200
O.S
GND
C200
0.1u/10V_4
0.1u/10V_4
C180
C180
0.1u/10V_4
0.1u/10V_4
8
3
4
C162
C162
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
C190
C190
C148
C148
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
0.1u/10V_4
Rev:2A 12/13 No-Sutff DDRII H/W Montor Circuit.
+3V
R376
R376 *10K_4
*10K_4
MEMHOT _DIMM#
1%
1%
1%
R375 *0_4R375 *0_4
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
DDR2 SODIMMS: A/B CHANNEL
DDR2 SODIMMS: A/B CHANNEL
DDR2 SODIMMS: A/B CHANNEL
Date: Sheet
Date: Sheet
Date: Sheet
C169
C169
0.1u/10V_4
0.1u/10V_4
C194
C194
0.1u/10V_4
0.1u/10V_4
1
C184
C184
0.1u/10V_4
0.1u/10V_4
C166
C166
0.1u/10V_4
0.1u/10V_4
CPU_MEMHOT# (6,13)
08
C173
C173
0.1u/10V_4
0.1u/10V_4
C202
C202
0.1U/10V/04
0.1U/10V/04
835Thursday, July 24, 2008
835Thursday, July 24, 2008
835Thursday, July 24, 2008
of
of
of
1A
1A
1A
5
4
3
2
1
RS780
D D
U25B
AE3 AD4 AE2 AD3 AD1 AD2
AA8 AA7 AA5
AA6
D4 C4 A3 B3 C2 C1 E5 F5 G5 G6 H5 H6 J6 J5 J7 J8 L5 L6
M8
L8 P7
M7
P5 M5 R8
P8 R6 R5
P4
P3
T4
T3
V5
W6
U5 U6 U8 U7
Y8
Y7
W5
Y5
U25B
GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N
GPP_RX0P GPP_RX0N GPP_RX1P GPP_RX1N GPP_RX2P GPP_RX2N GPP_RX3P GPP_RX3N GPP_RX4P GPP_RX4N GPP_RX5P GPP_RX5N
SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N
RS780M
RS780M
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N
PCIE I/F GFX
PCIE I/F GFX
GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P GPP_TX2N GPP_TX3P GPP_TX3N GPP_TX4P GPP_TX4N GPP_TX5P GPP_TX5N
2
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
A5 B5 A4 B4 C3 B2 D1 D2 E2 E1 F4 F3 F1 F2 H4 H3 H1 H2 J2 J1 K4 K3 K1 K2 M4 M3 M1 M2 N2 N1 P1 P2
AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2
AD7 AE7 AE6 AD6 AB6 AC6 AD5 AE5
AC8 AB8
U25A
U25A
HT_CPU_NB_CAD_H0(4) HT_CPU_NB_CAD_L0(4) HT_CPU_NB_CAD_H1(4) HT_CPU_NB_CAD_L1(4) HT_CPU_NB_CAD_H2(4) HT_CPU_NB_CAD_L2(4) HT_CPU_NB_CAD_H3(4) HT_CPU_NB_CAD_L3(4) HT_CPU_NB_CAD_H4(4) HT_CPU_NB_CAD_L4(4) HT_CPU_NB_CAD_H5(4) HT_CPU_NB_CAD_L5(4) HT_CPU_NB_CAD_H6(4) HT_CPU_NB_CAD_L6(4) HT_CPU_NB_CAD_H7(4) HT_CPU_NB_CAD_L7(4)
HT_CPU_NB_CAD_H8(4) HT_CPU_NB_CAD_L8(4) HT_CPU_NB_CAD_H9(4) HT_CPU_NB_CAD_L9(4) HT_CPU_NB_CAD_H10(4) HT_CPU_NB_CAD_L10(4)
C C
HT_CPU_NB_CAD_H11(4) HT_CPU_NB_CAD_L11(4) HT_CPU_NB_CAD_H12(4) HT_CPU_NB_CAD_L12(4) HT_CPU_NB_CAD_H13(4) HT_CPU_NB_CAD_L13(4) HT_CPU_NB_CAD_H14(4) HT_CPU_NB_CAD_L14(4) HT_CPU_NB_CAD_H15(4) HT_CPU_NB_CAD_L15(4)
HT_CPU_NB_CLK_H0(4) HT_CPU_NB_CLK_L0(4) HT_CPU_NB_CLK_H1(4) HT_CPU_NB_CLK_L1(4)
HT_CPU_NB_CTL_H0(4) HT_CPU_NB_CTL_L0(4) HT_CPU_NB_CTL_H1(4) HT_CPU_NB_CTL_L1(4)
R134 300/F_4R134 300/F_4
HT_RXCALP HT_TXCALP HT_RXCALN
Close to NB withi n 1" Close to NB within 1"
B B
A A
5
Y25 Y24 V22 V23 V25 V24 U24 U25
P22 P23 P25 P24 N24 N25
AC24 AC25 AB25 AB24 AA24 AA25
Y22
Y23 W21 W20
V21
V20
U20
U21
U19
U18
AB23 AA22
M22
M23
R21
R20
C23
A24
AB12 AE16
V11
AE15 AA12 AB16 AB14 AD14 AD13 AD15 AC16 AE13 AC14
Y14
AD16 AE17 AD17
W12
Y12
AD18 AB13 AB18
V14
V15 W14
AE12 AD12
T25 T24
T22 T23
HT_RXCAD0P HT_RXCAD0N HT_RXCAD1P HT_RXCAD1N HT_RXCAD2P HT_RXCAD2N HT_RXCAD3P HT_RXCAD3N HT_RXCAD4P HT_RXCAD4N HT_RXCAD5P HT_RXCAD5N HT_RXCAD6P HT_RXCAD6N HT_RXCAD7P HT_RXCAD7N
HT_RXCAD8P HT_RXCAD8N HT_RXCAD9P HT_RXCAD9N HT_RXCAD10P HT_RXCAD10N HT_RXCAD11P HT_RXCAD11N HT_RXCAD12P HT_RXCAD12N HT_RXCAD13P HT_RXCAD13N HT_RXCAD14P HT_RXCAD14N HT_RXCAD15P HT_RXCAD15N
HT_RXCLK0P HT_RXCLK0N HT_RXCLK1P HT_RXCLK1N
HT_RXCTL0P HT_RXCTL0N HT_RXCTL1P HT_RXCTL1N
HT_RXCALP HT_RXCALN
RS780M
RS780M
U25D
U25D
MEM_A0(NC) MEM_A1(NC) MEM_A2(NC) MEM_A3(NC) MEM_A4(NC) MEM_A5(NC) MEM_A6(NC) MEM_A7(NC) MEM_A8(NC) MEM_A9(NC) MEM_A10(NC) MEM_A11(NC) MEM_A12(NC) MEM_A13(NC)
MEM_BA0(NC) MEM_BA1(NC) MEM_BA2(NC)
MEM_RASb(NC) MEM_CASb(NC) MEM_WEb(NC) MEM_CSb(NC) MEM_CKE(NC) MEM_ODT(NC)
MEM_CKP(NC) MEM_CKN(NC)
MEM_COMPP(NC) MEM_COMPN(NC)
RS780M
RS780M
PART 1 OF 6
PART 1 OF 6
PAR 4 OF 6
PAR 4 OF 6
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
HT_TXCAD0P HT_TXCAD0N HT_TXCAD1P HT_TXCAD1N HT_TXCAD2P HT_TXCAD2N HT_TXCAD3P HT_TXCAD3N HT_TXCAD4P HT_TXCAD4N HT_TXCAD5P HT_TXCAD5N HT_TXCAD6P HT_TXCAD6N HT_TXCAD7P HT_TXCAD7N
HT_TXCAD8P HT_TXCAD8N HT_TXCAD9P
HT_TXCAD9N HT_TXCAD10P HT_TXCAD10N HT_TXCAD11P HT_TXCAD11N HT_TXCAD12P HT_TXCAD12N HT_TXCAD13P HT_TXCAD13N HT_TXCAD14P HT_TXCAD14N HT_TXCAD15P HT_TXCAD15N
HT_TXCLK0P HT_TXCLK0N HT_TXCLK1P HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P HT_TXCTL0N HT_TXCTL1P HT_TXCTL1N
MEM_DQ0/DVO_VSYNC(NC) MEM_DQ1/DVO_HSYNC(NC)
MEM_DQ2/DVO_DE(NC) MEM_DQ3/DVO_D0(NC)
MEM_DQ5/DVO_D1(NC) MEM_DQ6/DVO_D2(NC) MEM_DQ7/DVO_D4(NC) MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC) MEM_DQ10/DVO_D6(NC) MEM_DQ11/DVO_D7(NC)
MEM_DQ12(NC)
MEM_DQ13/DVO_D9(NC)
MEM_DQ14/DVO_D10(NC) MEM_DQ15/DVO_D11(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_DQS1P(NC) MEM_DQS1N(NC)
MEM_DM1/DVO_D8(NC)
IOPLLVDD18(NC)
MEM_VREF(NC)
HT_TXCALP HT_TXCALN
MEM_DQ4(NC)
MEM_DM0(NC)
IOPLLVDD(NC) IOPLLVSS(NC)
D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22
F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18
H24 H25 L21 L20
M24 M25 P19 R18
B24 B25
AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21
Y17 W18 AD20 AE21
W17 AE19
AE23 AE24
AD23 AE18
4
HT_TXCALN
HT_NB_CPU_CAD_H0 (4) HT_NB_CPU_CAD_L0 (4) HT_NB_CPU_CAD_H1 (4) HT_NB_CPU_CAD_L1 (4) HT_NB_CPU_CAD_H2 (4) HT_NB_CPU_CAD_L2 (4) HT_NB_CPU_CAD_H3 (4) HT_NB_CPU_CAD_L3 (4) HT_NB_CPU_CAD_H4 (4) HT_NB_CPU_CAD_L4 (4) HT_NB_CPU_CAD_H5 (4) HT_NB_CPU_CAD_L5 (4) HT_NB_CPU_CAD_H6 (4) HT_NB_CPU_CAD_L6 (4) HT_NB_CPU_CAD_H7 (4) HT_NB_CPU_CAD_L7 (4)
HT_NB_CPU_CAD_H8 (4) HT_NB_CPU_CAD_L8 (4) HT_NB_CPU_CAD_H9 (4) HT_NB_CPU_CAD_L9 (4) HT_NB_CPU_CAD_H10 (4) HT_NB_CPU_CAD_L10 (4) HT_NB_CPU_CAD_H11 (4) HT_NB_CPU_CAD_L11 (4) HT_NB_CPU_CAD_H12 (4) HT_NB_CPU_CAD_L12 (4) HT_NB_CPU_CAD_H13 (4) HT_NB_CPU_CAD_L13 (4) HT_NB_CPU_CAD_H14 (4) HT_NB_CPU_CAD_L14 (4) HT_NB_CPU_CAD_H15 (4) HT_NB_CPU_CAD_L15 (4)
HT_NB_CPU_CLK_H0 (4) HT_NB_CPU_CLK_L0 (4) HT_NB_CPU_CLK_H1 (4) HT_NB_CPU_CLK_L1 (4)
HT_NB_CPU_CTL_H0 (4) HT_NB_CPU_CTL_L0 (4) HT_NB_CPU_CTL_H1 (4) HT_NB_CPU_CTL_L1 (4)
R131 300/F_4R131 300/F_4
+1.8_IOPLLVDD18_NB
+1.1V_IOPLLVDD
SPM_VREF1
R91 *1K/F_4R91 *1K/F_4
T80T80
T9T9
PCIE_RXP1(24) PCIE_RXN1(24) PCIE_RXP2(23) PCIE_RXN2(23) PCIE_RXP3(24) PCIE_RXN3(24)
T21T21
T20T20
PCIE_RXP5(23) PCIE_RXN5(23)
PCIE_SB_NB_RX0P(12) PCIE_SB_NB_RX0N(12) PCIE_SB_NB_RX1P(12) PCIE_SB_NB_RX1N(12) PCIE_SB_NB_RX2P(12) PCIE_SB_NB_RX2N(12) PCIE_SB_NB_RX3P(12) PCIE_SB_NB_RX3N(12)
40mils wdith or mo re
R328 0_6R328 0_6
R329 0_6R329 0_6
R87 *1K/F_4R87 *1K/F_4
http://hobi-elektronika.net
+1.8V
+1.1V
+1.8V
3
RS780 Display Port Support (muxed on GFX)
GFX_TX0,TX1,TX2 and TX3 AUX0 and HPD0
GFX_TX4,TX5,TX6 and TX7 AUX1 and HPD1
C422 0.1u/10V_4C422 0.1u/10V_4 C423 0.1u/10V_4C423 0.1u/10V_4 C424 0.1u/10V_4C424 0.1u/10V_4 C425 0.1u/10V_4C425 0.1u/10V_4 C420 0.1u/10V_4C420 0.1u/10V_4 C418 0.1u/10V_4C418 0.1u/10V_4 C417 0.1u/10V_4C417 0.1u/10V_4 C416 0.1u/10V_4C416 0.1u/10V_4
R539 80.6/F_4R539 80.6/F_4 R536 80.6/F_4R536 80.6/F_4 R537 80.6/F_4R537 80.6/F_4 R538 80.6/F_4R538 80.6/F_4
C401 0.1u/10V_4C401 0.1u/10V_4 C402 0.1u/10V_4C402 0.1u/10V_4 C403 0.1u/10V_4C403 0.1u/10V_4 C405 0.1u/10V_4C405 0.1u/10V_4 C407 0.1u/10V_4C407 0.1u/10V_4 C406 0.1u/10V_4C406 0.1u/10V_4
C409 0.1u/10V_4C409 0.1u/10V_4 C408 0.1u/10V_4C408 0.1u/10V_4
C78 0.1u/10V_4C78 0.1u/10V_4 C77 0.1u/10V_4C77 0.1u/10V_4 C76 0.1u/10V_4C76 0.1u/10V_4 C75 0.1u/10V_4C75 0.1u/10V_4 C73 0.1u/10V_4C73 0.1u/10V_4 C74 0.1u/10V_4C74 0.1u/10V_4 C83 0.1u/10V_4C83 0.1u/10V_4 C84 0.1u/10V_4C84 0.1u/10V_4
R93 1.27K/F_4R93 1.27K/F_4 R98 2K/F_4R98 2K/F_4
X PCIE LAN(Marvell) Wireless Lan EXPRESS CARD (NEW CARD)
X Robson/HD Decoder
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
1%
1%
1%
Date: Sheet
Date: Sheet
Date: Sheet
GFX_TX0P_C GFX_TX0N_C GFX_TX1P_C GFX_TX1N_C GFX_TX2P_C GFX_TX2N_C GFX_TX3P_C GFX_TX3N_C
T88T88 T89T89
HDMI_CLKP HDMI_DATA0P HDMI_DATA1P HDMI_DATA2P
PCIE_TXP0_C PCIE_TXN0_C PCIE_TXP1_C PCIE_TXN1_C PCIE_TXP2_C PCIE_TXN2_C PCIE_TXP3_C PCIE_TXN3_C PCIE_TXP4_C PCIE_TXN4_C PCIE_TXP5_C PCIE_TXN5_C
SB_TX0P_C SB_TX0N_C SB_TX1P_C SB_TX1N_C SB_TX2P_C SB_TX2N_C SB_TX3P_C SB_TX3N_C
NB_PCIECALRP NB_PCIECALRN
GPP0 GPP1 GPP2 GPP3
GPP4 GPP5
DP0
DP1
Close to North Bridge
HDMI_DATA2P HDMI_DATA2N HDMI_DATA1P HDMI_DATA1N HDMI_DATA0P HDMI_DATA0N HDMI_CLKP HDMI_CLKN
HDMI_DATA2P (18) HDMI_DATA2N (18) HDMI_DATA1P (18) HDMI_DATA1N (18) HDMI_DATA0P (18) HDMI_DATA0N (18) HDMI_CLKP (18) HDMI_CLKN (18)
To HDMI CONN
HDMI_CLKN HDMI_DATA0N HDMI_DATA1N HDMI_DATA2N
Rev:3A 02/05 Added the EMI S olution.
T12T12 T8T8
PCIE_TXP1 (24) PCIE_TXN1 (24) PCIE_TXP2 (23) PCIE_TXN2 (23) PCIE_TXP3 (24)
PCIE_TXN3 (24)
T16T16 T13T13
PCIE_TXP5 (23)
PCIE_TXN5 (23)
PCIE_NB_SB_TX0P (12)
PCIE_NB_SB_TX0N (12)
PCIE_NB_SB_TX1P (12)
PCIE_NB_SB_TX1N (12)
PCIE_NB_SB_TX2P (12)
PCIE_NB_SB_TX2N (12)
PCIE_NB_SB_TX3P (12)
PCIE_NB_SB_TX3N (12)
+1.1V_VDD_PCIE
Don't support in RS740M
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
RS740/RS780-HT LINK/PCIE I/F 1/4
RS740/RS780-HT LINK/PCIE I/F 1/4
RS740/RS780-HT LINK/PCIE I/F 1/4
1
935Thursday, July 24, 2008
935Thursday, July 24, 2008
935Thursday, July 24, 2008
Red Green Blue
1A
1A
1A
of
of
of
09
5
RS780
D D
Rev:3A 02/13 Follow A13 silicon Change R120 From 150 To 140ohm For Unbalanced power bus IR drop. .
150R Termination < 1000 mils trace
CRT_R(19) CRT_G(19) CRT_B(19)
+1.8V
C C
BLM18PG221SN1D_6
BLM18PG221SN1D_6
BLM18PG221SN1D_6
BLM18PG221SN1D_6
C149
C149 10u/6.3V_8
10u/6.3V_8
L18
L18
L14
L14
CLOSE TO NB
R125
R125
R120
R120
150/F_4
150/F_4
140/F_4
140/F_4
20mils width
+1.8V_VDDA18HTPLL
C429
C429
2.2u/6.3V_6
2.2u/6.3V_6
20mils width
+1.8V_VDDA18PCIEPLL
C131
C131
2.2u/6.3V_6
2.2u/6.3V_6
R126
R126 150/F_4
150/F_4
+1.1V
+1.8V
+1.1V
4
L39
L39
BLM18PG221SN1D_6
BLM18PG221SN1D_6
L41
L41
BLM18PG221SN1D_6
BLM18PG221SN1D_6
EXT_NB_OSC(3)
R141 EXT@4.7K_4R141 EXT@4.7K_4
C428
C428
2.2u/6.3V_6
2.2u/6.3V_6
C209
C209
2.2u/6.3V_6
2.2u/6.3V_6
R140 EXT@4.7K_4R140 EXT@4.7K_4
External CLK
+3V
+1.8V
R343 0_6R343 0_6
R139 EXT@0_4R139 EXT@0_4 R142 EXT@0_4R142 EXT@0_4
INT_LVDS_EDIDCLK(17) INT_LVDS_EDIDDATA(17)
HDMI_DDC_DATA(18) HDMI_DDC_CLK(18)
L19
L19
BLM18PG221SN1D_6
BLM18PG221SN1D_6
L40
L40
BLM18PG221SN1D_6
BLM18PG221SN1D_6
HSYNC(19) VSYNC(19) DDCCLK(19) DDCDAT(19)
NB_PWRGD_IN(16)
+NB_CORE_ON(33)
0.135A
C215
C215
2.2u/6.3V_6
2.2u/6.3V_6
C210
C210
2.2U/6.3V_6
2.2U/6.3V_6
C211
C211
2.2U/6.3V_6
2.2U/6.3V_6
Without T V -Out feature
R132 0_4R132 0_4 R130 0_4R130 0_4
R123 715/F_6R123 715/F_6
NBGFX_CLKP(3) NBGFX_CLKN(3)
T86T86 T84T84
T92T92 T93T93
T94T94
+3V_AVDD_NB
+1.8V_AVDDDI_NB
+1.8V_AVDDQ_NB
TV_C/R_SYS
HSYNC VSYNC
+1.1V_PLLVDD +1.8V_PLLVDD18
+1.8V_VDDA18HTPLL +1.8V_VDDA18PCIEPLL
NB_RST#_IN NB_PWRGD_IN NB_LDT_STOP# NB_ALLOW_LDTSTOP
HT_REFCLKP HT_REFCLKN
NB_REFCLK_P NB_REFCLK_N
GPP_REFCLKP GPP_REFCLKN
SB_REFCLKP SB_REFCLKN
HDMI_DDC_DATA HDMI_DDC_CLK RS740_DFT_GPIO1
+NB_CORE_ON
RS780_AUX_CAL
3
C578
C578
0.1u/10V_4
0.1u/10V_4
Rev:2A 12/06 Add 0.1u F or CRT Screen Flicker .
U25C
U25C
F12
AVDD1(NC)
E12
AVDD2(NC)
F14
AVDDDI(NC)
G15
AVSSDI(NC)
H15
AVDDQ(NC)
H14
AVSSQ(NC)
E17
C_Pr(DFT_GPIO5)
F17
Y(DFT_GPIO2)
F15
COMP_Pb(DFT_GPIO4)
G18
RED(DFT_GPIO0)
G17
REDb(NC)
E18
GREEN(DFT_GPIO1)
F18
GREENb(NC)
E19
BLUE(DFT_GPIO3)
F19
BLUEb(NC)
A11
DAC_HSYNC(PWM_GPIO4)
B11
DDCCLK_INT DDCDAT_INT
DAC_RSET_NB
DAC_VSYNC(PWM_GPIO6)
F8
DAC_SCL(PCE_RCALRN)
E8
DAC_SDA(PCE_TCALRN)
G14
DAC_RSET(PWM_GPIO1)
A12
PLLVDD(NC)
D14
PLLVDD18(NC)
B12
PLLVSS(NC)
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESETb
A10
POWERGOOD
C10
LDTSTOPb
C12
ALLOW_LDT STOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN(OSCIN)
F11
REFCLK_N(PWM_GPIO3)
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP(SB_REFCLKP)
V3
GPPSB_REFCLKN(SB_REFCLKN)
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N
A8
DDC_CLK0/AUX0P
B7
AUX1P(NC)
A7
AUX1N(NC)
B10
STRP_DATA
G11
RSVD
C8
AUX_CAL(NC)
RS780M
RS780M
I
I/O
I/O
PART 3 OF 6
PART 3 OF 6
TXOUT_U1P(PCIE_RESET_GPIO3) TXOUT_U1N(PCIE_RESET_GPIO2)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
TXCLK_UP(PCIE_RESET_GPIO4) TXCLK_UN(PCIE_RESET _GPIO1)
LVTM
LVTM
PM
PM
I
LVDS_DIGON(PCE_TCALRP) LVDS_ENA_BL(PWM_GPIO2)
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
2
TXOUT_L0P(NC) TXOUT_L0N(NC) TXOUT_L1P(NC) TXOUT_L1N(NC) TXOUT_L2P(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_U2P(NC) TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1) TXCLK_LN(DBG_GPIO3)
VDDLTP18(NC)
VSSLTP18(NC)
VDDLT18_1(NC) VDDLT18_2(NC) VDDLT33_1(NC) VDDLT33_2(NC)
VSSLT1(VSS) VSSLT2(VSS) VSSLT3(VSS) VSSLT4(VSS) VSSLT5(VSS) VSSLT6(VSS) VSSLT7(VSS)
LVDS_BLON(PCE_RCALRP)
TMDS_HPD(NC)
HPD(NC)
TVCLKIN(PWM_GPIO5)
THERMALDIODE_P
THERMALDIODE_N
TESTMODE
A22 B22 A21 B21 B20 A20
TXLOUT3+
A19
TXLOUT3-
B19 B18
A18 A17 B17 D20 D21 D18 D19
B16 A16 D16 D17
+1.8V_VDDLTP18_NB
A13 B13
+1.8V_VDDLT_18_NB
A15 B15
+3V_VDLT33_NB
A14 B14
C14 D15 C16 C18 C20 E20 C22
INT_LVDS_ON
E9
LVDS_ENA_BL
F7
LVDS_BKL_EN
G12
TMDS_HPD0
D9
TMDS_HPD1
D10
SUS_STAT#_NB
D12
R_NB_THRMDA
AE8
R_NB_THRMDC
AD8
TEST_EN
D13
INT_TXLOUT0+ (17) INT_TXLOUT0- (17) INT_TXLOUT1+ (17) INT_TXLOUT1- (17) INT_TXLOUT2+ (17)
INT_TXLOUT2- (17)
T33T33 T30T30
INT_TXLCLKOUT+ (17) INT_TXLCLKOUT- (17)
C187
C187
0.1u/10V_4
0.1u/10V_4
R341 0_4R341 0_4
R129 0_4R129 0_4
R121 0_4R121 0_4
R128 1.8K_4R128 1.8K_4
C197
C197
2.2u/6.3V_6
2.2u/6.3V_6
C199
C199
4.7u/6.3V_6
4.7u/6.3V_6
C427
C427 *2.2u/6.3V/06
*2.2u/6.3V/06
INT_LVDS_DIGON (17)
TMDS_HPD (18)
T27T27
SUS_STAT# (13)
T81T81 T82T82
1
L15
L15
BLM18PG221SN1D_6
BLM18PG221SN1D_6
L16
L16
BLM21PG221SN1D_8
BLM21PG221SN1D_8
L42
L42
*BLM21PG221SN1D_8
*BLM21PG221SN1D_8
RS740M Only
10
+1.8V
+1.8V
+3V
B B
RP35
RP35
2
SB_DISP_CLKP(12) SB_DISP_CLKN(12)
HT_REFCLKP(3) HT_REFCLKN(3)
SB_NBHT_REFCLKP(12)
SB_NBHT_REFCLKN(12)
SB_REFCLKP(3) SB_REFCLKN(3)
SB_PCIE_NB_CLKP(12) SB_PCIE_NB_CLKN(12)
A A
Reserve Pin
+3V
R337 *4.7K_4R337 *4.7K_4 R336 *4.7K_4R336 *4.7K_4
1
*INT@0_4P2R_4
*INT@0_4P2R_4
4
3
RP44
RP44
4
3
*INT@0_4P2R_4
*INT@0_4P2R_4
2
1
RP41
RP41
4
3
*INT@0_4P2R_4
*INT@0_4P2R_4
2
1
HDMI_DDC_DATA HDMI_DDC_CLK
NB_REFCLK_P NB_REFCLK_N
HT_REFCLKP HT_REFCLKN
HT NB
SB_REFCLKP SB_REFCLKN
North Bridge A-Link
North Bridge RESETFOR SB INTERNAL CLOCK
A_RST#(12,14)
CPU_LDT_RST#(6,12)
CPU_LDT_STOP#(6,12)
CPU_LDT_REQ#(6)
ALLOW_LDTSTOP(12)
Rev:3A 01/29 Modified the Lev el Shift Ci r c uit For System l eak age issue.
RS780;RS740
1
R119 0_4R119 0_4
+3V
R135 0_4R135 0_4
R137 *0_4R137 *0_4
+1.8V
2
Q24
Q24
3
*BSS138/SOT23
*BSS138/SOT23
R542 0_4R542 0_4
+1.8V
1
R543 0_4R543 0_4
R151 *0_6R151 *0_6
+VDDG_NB
2
Q25
Q25
*BSS138/SOT23
*BSS138/SOT23
R136
R136 *4.7K_4
*4.7K_4
+VDDG_NB
3
R115
R115 *4.7K_4
*4.7K_4
+VDDG_NB
R116
R116 *4.7K_4
*4.7K_4
NB_ALLOW_LDTSTOP
+VDDG_NB
NB_RST#_IN
NB_LDT_STOP#
LVDS BLON
NB_PWRGD_IN
INT_LVDS_ON
LVDS_BKL_EN
3
LVDS_ENA_BL
3
+3V
12
R351
R351 10K_4
10K_4
3
2
BSS138_NL/SOT23
BSS138_NL/SOT23
1
NB_LCD_CONTROL
2
Q56
Q56
FDV301N
FDV301N
Rev:2A 12/07 Change Q56 P/N For VGS 0.65V<Vt<1.5V
NB_LCD_CONTROL
2
Q26
Q26
*FDV301N
*FDV301N
2
Q54
Q54
R340 2.7K_4R340 2.7K_4
1
R350 2.7K_4R350 2.7K_4
1
R149 *2.7K_4R149 *2.7K_4
+15V
12
R345
R345 10K_4
10K_4
3
1
VGS-TH<1.7V
NB_LCD_CONTROL
Q55
Q55
2N7002E-G
2N7002E-G
INT_LVDS_BLON (17)
INT_LVDS_PWM (17)
http://hobi-elektronika.net
5
4
3
2
STRAP DEBUG BUS GPIO
DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEB
1
HSYNC
VSYNC
+NB_CORE_ON
TV_C/R_SYS
RS740_DFT_GPIO1
RS780_AUX_CAL
1A
1A
1A
of
of
of
10 35Thursday, July 24, 2008
10 35Thursday, July 24, 2008
10 35Thursday, July 24, 2008
R145 3K_4R145 3K_4
+3V
R144 *3K_4R144 *3K_4
For Side Port Enables/Disable 0 : Enable(Default) 1 : Disable
R146 3K_4R146 3K_4
+3V
R147 *3K_4R147 *3K_4
Enables the Test Debug Bus using GPIO.(RS780 -->VSYNC#) 1 : Enable(Defult) 0 : Disable
AUX CAL Value need up date
R338 *10K_4R338 *10K_4
+3V
R339 2.2K_4R339 2.2K_4
Rev:3A 02/13 Support a Two-Step Voltage Control of North Bridge Core voltage.
R150 *1K_4R150 *1K_4
R127 *1K_4R127 *1K_4
R342 150/F_4R342 150/F_4
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
RS740/RS780-SYSTEM I/F 3/5
RS740/RS780-SYSTEM I/F 3/5
1%
1%
1%
RS740/RS780-SYSTEM I/F 3/5
Date: Sheet
Date: Sheet
Date: Sheet
5
4
3
2
1
RS740/RX780/RS780 POWER DIFFERENCE TABLE
D11
E14
E15
J12
K14
A2
B1
D3
D5
E4
G1
G2
G4
H7
D D
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
PART 6/6
PART 6/6
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
J22
A25
D23
C C
+1.2V
A11 Chip Bug Errata use A12 Chip Can Remove
B B
Rev:2A 12/09 Change VDDHTTX Voltage From 1.35V to 1.2 Rails For A12 Chip.
+1.8V
L13
L13
BLM21PG221SN1D_8
BLM21PG221SN1D_8
A A
L17
E22
H19
G22
G24
G25
+1.1V
L12
L12
BLM21PG221SN1D_8
BLM21PG221SN1D_8
VSSAPCIE9
VSSAPCIE10J4VSSAPCIE11R7VSSAPCIE12L1VSSAPCIE13L2VSSAPCIE14L4VSSAPCIE15
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
L22
L24
L25
M20
BLM21PG221SN1D_8
BLM21PG221SN1D_8
BLM21PG221SN1D_8
BLM21PG221SN1D_8
C127
C127
4.7u/6.3V_6
4.7u/6.3V_6
L7
VSSAPCIE16M6VSSAPCIE17N4VSSAPCIE18P6VSSAPCIE19R1VSSAPCIE20R2VSSAPCIE21R4VSSAPCIE22V7VSSAPCIE23U4VSSAPCIE24V8VSSAPCIE25V6VSSAPCIE26W1VSSAPCIE27W2VSSAPCIE28W4VSSAPCIE29W7VSSAPCIE30W8VSSAPCIE31Y6VSSAPCIE32
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT20
P20
N22
R19
V19
R22
R24
R25
H20
Y21
U22
W22
W24
W25
1.1(2A)
L10
L10
C156
C156
4.7u/6.3V_6
4.7u/6.3V_6
L17
L17
C188
C188
4.7u/6.3V_6
4.7u/6.3V_6
C81
C81
4.7u/6.3V_6
4.7u/6.3V_6
C140
C140
4.7u/6.3V_6
4.7u/6.3V_6
+1.8V
+1.8V
C91
C91
0.1u/10V_4
0.1u/10V_4
C153
C153
0.1u/10V_4
0.1u/10V_4
R112 0_6R112 0_6
R83 0_6R83 0_6
VSSAHT27
VSS11
L12
AD25
AA4
AB5
AB1
AB7
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
GROUND
GROUND
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
P12
P15
N13
R11
R14
M14
+1.1V_VDDHT
C147
C147
0.1u/10V_4
0.1u/10V_4
+1.1V_VDDHTRX
C168
C168
0.1u/10V_4
0.1u/10V_4
+1.2V_VDDHTTX
C134
C134
0.1u/10V_4
0.1u/10V_4
+1.8V_VDDA18PCIE
C118
C118
0.1u/10V_4
0.1u/10V_4
1.8V(0.005A)
C113
C113 1u/10V_4
1u/10V_4
1.8V(0.005A)
AC3
VSSAPCIE36
VSS18
T12
AC4
AE1
AE4
AB2
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS19
VSS20
VSS21
VSS22
V12
U14
U11
U15
C123
C123
0.1u/10V_4
0.1u/10V_4
C181
C181
0.1u/10V_4
0.1u/10V_4
C102
C102
0.1u/10V_4
0.1u/10V_4
C93
C93
0.1u/10V_4
0.1u/10V_4
+1.8V_VDDG18_NB
+1.8V_VDD18_MEM
AE14
VSS2
VSS1
VSS23
VSS24
VSS25
VSS26
W11
W15
AA14
AC12
1.2V(0.5A)
1.8V(0.6A)
Y18
J15
VSS3G8VSS4
VSS5
VSS27
VSS28
VSS29
AB11
AB15
AB17
0.6A
C137
C137
0.1u/10V_4
0.1u/10V_4
0.45A
C161
C161
0.1u/10V_4
0.1u/10V_4
C98
C98
0.1u/10V_4
0.1u/10V_4
C88
C88
0.1u/10V_4
0.1u/10V_4
VSS6
VSS30
AB19
VSS7
VSS31
AE20
M11
VSS8
VSS32
AB21
L15
VSS9
VSS33
K11
VSS10
VSS34
U25F
U25F
RS780M
RS780M
AE25 AD24 AC23 AB22 AA21
AE11 AD11
K16 L16
M16
P16
R16
T16
H18 G19
F20 E21
D22
B23 A23
Y20
W19
V18
U17
T17
R17
P17
M17
P10 K10
M10
L10
T10
R10 AA9
AB9 AD9 AE9 U10
J17
J10
W9
U25E
U25E
VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7
VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7
VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13
VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6
H9
VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9
Y9
VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15
F9
VDDG18_1(VDD18_1)
G9
VDDG18_2(VDD18_2) VDD18_MEM1(NC) VDD18_MEM2(NC)
RS780M
RS780M
PIN NAME VDDHT VDDHTRX VDDHTTX VDDA18PCIE
VDD18_MEM VDDPCIE VDDC VDD_MEM VDDG33 IOPLLVDD18
PART 5/6
PART 5/6
POWER
POWER
RS740
NC
+1.2V NC +1.8V NC NC +1.2V +1.1V +1.1V +1.2V
+1.8V/1.5V
+3.3V +1.8V +1.8VNC
VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8
VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17
VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8
VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22
VDD_MEM1(NC) VDD_MEM2(NC) VDD_MEM3(NC) VDD_MEM4(NC) VDD_MEM5(NC) VDD_MEM6(NC)
VDDG33_1(NC) VDDG33_2(NC)
A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9
K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16
AE10 AA11 Y11 AD10 AB10 AC10
H11 H12
RX780
+1.1V +1.1V +1.2V +1.8V +1.8VVDDG18 NC
+1.1V NC NC
0.7A
C160
C160
0.1u/10V_4
0.1u/10V_4
1.1V(7A)
C135
C135
0.1u/10V_4
0.1u/10V_4
C104
C104
0.1u/10V_4
0.1u/10V_4
1.8V(0.3A)
R90 0_6R90 0_6
3.3V(0.03A)
C205
C205
0.1u/10_4
0.1u/10_4
RS780
+1.1V +1.1V +1.2V +1.8V +1.8V +1.8V
+1.1V
+1.8V/1.5V
+3.3V
PIN NAME IOPLLVDD
AVDDDI AVDDQ PLLVDD PLLVDD18
VDDA18HTPLL VDDLTP18 VDDLT18 VDDLT33
C164
C164
0.1u/10V_4
0.1u/10V_4
RS740 RX780 RS780
+1.2V +3.3V NC
+1.2V +1.8V +1.2VVDDA18PCIEPLL +1.8V +1.8V +1.8V +3.3V
C167
C109
C109 1u/10V_4
1u/10V_4
C167 1u/10V_4
1u/10V_4
NC
NC+1.8V +1.8V NC+1.8V +1.8V
NC +1.8V +1.8V NC NC NC
C182
C182
4.7u/6.3V_6
4.7u/6.3V_6
+1.1V +3.3VAVDDNC
+1.1V +1.8V +1.8V +1.8V +1.8V +1.8V NC
R117 0_8R117 0_8
Rev:2A 12/09 Change and Fix the NB Core Voltage to 1.1V For A12 Chip.
+NB_CORE
C150
C159
C159
0.1u/10V_4
0.1u/10V_4
C121
C121
0.1u/10V_4
0.1u/10V_4
+1.8V_VDD_MEM
C150
0.1u/10V_4
0.1u/10V_4
C120
C120
0.1u/10V_4
0.1u/10V_4
C103
C103
0.1u/10V_4
0.1u/10V_4
C65
C65 10u/6.3V_8
10u/6.3V_8
R85 *0_6R85 *0_6
+1.8V
C67
C67 10u/6.3V_8
10u/6.3V_8
C90
C90 *10u/6.3V_8
*10u/6.3V_8
Rev:2A Change Footprint to 0603 size
+3V
+3V_VDDG33V
C204
C204
0.1u/10_4
0.1u/10_4
R148 0_6R148 0_6
11
+1.1V+1.1V_VDD_PCIE
+NB_CORE
RS780
5
352-(&7%8
352-(&7%8
352-(&7%8
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
4XDQWD&RPSXWHU,QF
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
RS740/RS780-POWER5/5
RS740/RS780-POWER5/5
1%
1%
4
http://hobi-elektronika.net
3
2
1%
RS740/RS780-POWER5/5
Date: Sheet
Date: Sheet
Date: Sheet
1
11 35Thursday, April 10, 2008
11 35Thursday, April 10, 2008
11 35Thursday, April 10, 2008
1A
1A
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