Toshiba satellite C660, Compal LA-6847P Schematic

A
1 1
B
C
D
E
PWWAA
2 2
Delhi
LA-6847P SchematicREV 1.0
3 3
4 4
Intel Processor(ARD) /PCH(HM55)
2010-10-07 Rev 1.0
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
A
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
C
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
D
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
152Tuesday, December 28, 2010
152Tuesday, December 28, 2010
152Tuesday, December 28, 2010
E
B
B
B
of
of
of
A
B
C
D
E
Compal Confidential
Model Name : PWWAA
1 1
File Name : LA-6847P
PCIE-Express 16X 2.5GHz
Intel Arrandale
rPGA-988
page 5,6,7,8,9,10
Fan Control
APL5607
page 6
Memory BUS(DDRIII)
Dual Channel
1.5V DDRIII 800/1066 MT/s
200pin DDRIII-SO-DIMM X2
BANK 0, 1, 2, 3
Clock Generator
RTM890N-631-GRT
page 11,12
page 21
VGA (DDR3)
ATI PARK XT S3 64bit with 512MB
page 13,14,15,16,17,18,19,20
2 2
LCD Conn. CRT
page 22page 21
DMI X4
2.5GHz
USB
5V 480MHz
USB
5V 480MHz
PCIe 1x
1.5V 2.5GHz(250MB/s)
PCIeMini Card WiMax
PCIeMini Card WLAN
Intel Ibex Peak
SATA port 1
5V 3GHz(300MB/s)
SATA HDD0
USB
USB port 0,1
page 32
2IN1
USB port 13
page 33
PCIe port 1
page 33
page 32
RTS5137
USB port 10
page 35
Int. Camera
USB port 11
page 21
RJ45
RTL8105E-GR 10/100M
PCIe port 0
page 34page 34
PCIe 1x
1.5V 2.5GHz(250MB/s)
BGA-951
SATA port 4
5V 3GHz(300MB/s)
SATA ODD
page 32
PCI
3 3
page 23~31
3.3V/1.5V 24MHz
HDA Codec
ALC259-GR
page 36
Power/B conn.
page 40
RTC CKT.
page 23
SPI ROM
page 23
Debug Port
page 39
3.3V 33 MHz
LPC BUS
ENE KB926 E0
page 38
HD Audio
DC/DC Interface CKT.
page 41
Touch Pad
Power Circuit DC/DC
4 4
A
page 42~50
B
page 40
Int.KBD
page 39
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
EC ROM
page 39
Compal Secret Data
Compal Secret Data
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Int.
MIC CONN HP CONN
(LVDS CONN)
page 21
D
Ext.
MIC CONN
page 37
page 37
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SPK CONN
page 37
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
252Tuesday, December 28, 2010
252Tuesday, December 28, 2010
252Tuesday, December 28, 2010
E
B
B
B
of
of
of
5
4
B+
3
Ipeak=5A, Imax=3.5A, Iocp min=7.9
2
DESIGN CURRENT 0.1A
DESIGN CURRENT 5A
1
+3VL
+5VALW
N-CHANNEL
D D
UP6182CQAG
SI4800
Ipeak=5A, Imax=3.5A, Iocp min=7.7
SUSP#
APL5930
SUSP
SUSP
P-CHANNEL
AO3413
VR_ON
N-CHANNEL
SI4800
ISL62883HRZ
C C
SUSP#
TPS51218DSCR
VTTP_EN
APW7138NITRL
SUSP#
RT8209BGQW
SUSP#
RT8209BGQW
B B
Ipeak=18A, Imax=12.6A, Iocp min=19.8
Ipeak=7A, Imax=4.9A, Iocp min=7.7
Ipeak=15A, Imax=10.5A, Iocp min=16.5
SUSP
N-CHANNEL FDS6676AS
SUSP
N-CHANNEL FDS6676AS
LCD_ENVDD
DESIGN CURRENT 4A
DESIGN CURRENT 5A
DESIGN CURRENT 2A
DESIGN CURRENT 4A
DESIGN CURRENT 1.5A
DESIGN CURRENT 48A
DESIGN CURRENT 15A
DESIGN CURRENT 18A
DESIGN CURRENT 7A
DESIGN CURRENT 15A
DESIGN CURRENT 2A
DESIGN CURRENT 2A
+5VS
+3VALW
+1.8VS
+3VS
+LCD_VDD
+CPU_CORE
+VGA_CORE
+VTT
+1.05VS
+1.5V
+1.5V_CPU
+1.5VS
0.75VR_EN#
G2992F1U
DESIGN CURRENT 1.5A
+0.75VS
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
3
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
352Tuesday, December 28, 2010
352Tuesday, December 28, 2010
352Tuesday, December 28, 2010
1
B
B
B
of
of
of
A
B
C
D
E
Voltage Rails
State
power plane
1 1
( O MEANS ON X MEANS OFF )
+RTCVCC
+B
+5VL +3VL
+5VALW +3VALW +VSB
+1.5V
+5VS +3VS +1.5VS +VGA_CORE +CPU_CORE +VTT +1.05VS +1.8VS +1.1VS +0.75VS
BTO Option Table
Function
description
explain
MINI PCI-E SLOT
SLOT1
WLAN/BT
LAN
LAN
10/100M
BTO
Function
description
S0
S1
2 2
S3
S5 S4/AC
S5 S4/ Battery only
S5 S4/AC & Battery don't exist
O O O O O O
O O O O O
X
O O O O O
X
O O O O
X X
O
XX X XX
OO OO
X
X
explain
BTO
Function
description
explain
BTO
S3 Power Saving
S3 Power Saving
Power Saving
Camera & Mic
Camera & Mic
Camera & Mic
CAM@
PCH SM Bus Address
HEX
A0 H
D2 H
0001 0110 bSmart Battery
Address
1010 0000 b 1010 0100 bA4 H 1101 0010 b
PowerPower
+3VS
EC SM Bus2 Address
Device
96 H
1001 0110 bPCH
Security Classification
Security Classification
Security Classification
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date
Issued Date
Issued Date
STATE
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
G3 LOW LOWLOW
Compal Secret Data
Compal Secret Data
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
C
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
SIGNAL
SLP_S3#
HIGH HIGHHIGH
LOW
LOW LOW
D
SLP_S4# SLP_S5#
HIGH HIGHHIGH
HIGH
HIGH
HIGH
LOW LOWLOW
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
E
B
B
B
of
of
of
452Tuesday, December 28, 2010
452Tuesday, December 28, 2010
452Tuesday, December 28, 2010
Power
+3VS
3 3
+3VS +3VS +3VS +3VS +3VS Clock Generator
Device
DDR SO-DIMM 0 DDR SO-DIMM 1 Clock Generator New Card WLAN/WIMAX
EC SM Bus1 Address
Device Address Address
+3VL
4 4
A
HEX HEX
16 H
HEXDevice AddressPower
5
1 2
R1 20_0402_1%R1 20_0402_1%
1 2
R2 20_0402_1%R2 20_0402_1%
1 2
R4 49.9_0402_1%R4 49.9_0402_1%
1 2
R3 49.9_0402_1%R3 49.9_0402_1%
D D
+VTT
1 2
R18 49.9_0402_1%R18 49.9_0402_1%
PECI28
Power has removed VR_TT#
+VTT
H_THERMTRIP#28
PMSYNCH25
+1.5V_CPU
C C
R28
@R28
@
1.1K_0402_1%
1.1K_0402_1%
1 2
DRAMPWROK
12
750_0402_1%
750_0402_1% R29
R29
R28 unmount for NPS@ R29 always mount for PS@
H_PWRGOOD28
DRAMPWROK25
VTTPWROK_CPU46
BUF_PLT_RST#27
1 2
R9 68_0402_5%R9 68_0402_5%
R301.5K_0402_1% R301.5K_0402_1%
750_0402_1%
750_0402_1%
T41PAD T41PAD
H_PROCHOT#_D
H_PWRGOOD1_R
12
R250_0402_5% R250_0402_5%
VTTPWROK_CPU
BUF_PLT_RST#_R
R31
R31
4
H_COMP3 H_COMP2 H_COMP1 H_COMP0
TP_SKTOCC#
CATERR#
DRAMPWROK
JCPUB
JCPUB
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
3
MISC THERMAL
MISC THERMAL
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
SM_DRAMRST#
SM_RCOMP[0] SM_RCOMP[1] SM_RCOMP[2]
PM_EXT_TS#[0] PM_EXT_TS#[1]
PRDY# PREQ#
TMS
TRST#
TDO
TDI_M
TDO_M
DBR#
BPM#[0] BPM#[1] BPM#[2] BPM#[3] BPM#[4] BPM#[5] BPM#[6] BPM#[7]
TCK
TDI
A16 B16
AR30 AT30
E16 D16
A18 A17
SM_DRAMRST#_CPU
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1
PM_EXTTS#0
AN15
PM_EXTTS#_R
AP15
AT28 AP27
AN28 AP28 AT27
AT29
XDP_TDO
AR27
XDP_TDI_M
AR29
XDP_TDO_M
AP29 AN25
AJ22 AK22 AK24 AJ24 AJ25 AH22 AK23 AH23
2
CLK_CPU_BCLK 28 CLK_CPU_BCLK# 28
CLK_PEG 24 CLK_PEG# 24
Unused by Clarksfield rPGA989
R6 100_0402_1%R6 100_0402_1%
1 2
R7 24.9_0402_1%R7 24.9_0402_1%
1 2
R8 130_0402_1%R8 130_0402_1%
1 2
12
R12 0_0402_5%R12 0_0402_5%
T45 PADT45 PAD T44 PADT44 PAD T43 PADT43 PAD
T42 PADT42 PAD
R312 1K_0402_5%R312 1K_0402_5%
XDP_TDO
DDR3 Compensation Signals Layout Note:Please these resistors near Processor
PM_EXTTS# 11,12
12
+3VS
XDP_DBRESET# 25
1 2 R23 0_0402_5%R23 0_0402_5%
1 2 R22 51_0402_5%R22 51_0402_5%
1
+VTT
SM_DRAMRST#_CPU
100K_0402_5%
100K_0402_5%
PM_EXTTS#0 PM_EXTTS#_R
R127
R127
R15 10K_0402_5%R15 10K_0402_5% R13 10K_0402_5%R13 10K_0402_5%
D
S
D
S
12
13
Q41
Q41
G
G
BSS138_NL_SOT23-3
BSS138_NL_SOT23-3
2
C301
C301
0.047U_0402_16V7K
0.047U_0402_16V7K
1 2
12 12
SM_DRAMRST# 11,12
RST_GATE 28
C301, Q41, R127 from PS@ to mount
Add on 10/28
XDP_TDI_MXDP_TDO_M
+VTT
B B
For S3 CPU Power Saving
place near JCPU
DRAMPWROK
C4871000P_0402_50V7K C4871000P_0402_50V7K
12
VTTPWROK_CPU
C4881000P_0402_50V7K C4881000P_0402_50V7K
12
VTTPWROK41,46
VTTPWROK
0715 --> change BOM structure to mount
A A
5
+3VALW
1 2
C163 0.1U_0402_16V4ZC163 0.1U_0402_16V4Z
5
U16
U16
1
P
IN1
4
O
2
IN2
G
3
4
R33 1.5K_0402_1%R33 1.5K_0402_1%
SN74AHC1G08DCKR_SC70-5
SN74AHC1G08DCKR_SC70-5
DRAMPWROK
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc. SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847 4019AP
4019AP
4019AP
1
552Tuesday, December 28, 2010
552Tuesday, December 28, 2010
552Tuesday, December 28, 2010
of
of
of
B
B
B
5
4
3
+5VS
2
1A
FAN Control Circuit
Remove Cap, for EMI
1
2
C3
C3
10U_0805_10V4Z
10U_0805_10V4Z
U1
D D
EN_DFAN138
JCPUA
JCPUA
DMI_PTX_CRX_N025 DMI_PTX_CRX_N125 DMI_PTX_CRX_N225 DMI_PTX_CRX_N325
DMI_PTX_CRX_P025 DMI_PTX_CRX_P125 DMI_PTX_CRX_P225 DMI_PTX_CRX_P325
DMI_CTX_PRX_N025 DMI_CTX_PRX_N125
C C
B B
A A
DMI_CTX_PRX_N225 DMI_CTX_PRX_N325
DMI_CTX_PRX_P025 DMI_CTX_PRX_P125 DMI_CTX_PRX_P225 DMI_CTX_PRX_P325
12
R686 1K_0402_5%R686 1K_0402_5%
12
R688 1K_0402_5%R688 1K_0402_5%
5
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS PEG_RX#[0]
PEG_RX#[1] PEG_RX#[2] PEG_RX#[3] PEG_RX#[4] PEG_RX#[5] PEG_RX#[6] PEG_RX#[7] PEG_RX#[8]
PEG_RX#[9] PEG_RX#[10] PEG_RX#[11] PEG_RX#[12] PEG_RX#[13] PEG_RX#[14] PEG_RX#[15]
PEG_RX[0] PEG_RX[1] PEG_RX[2] PEG_RX[3] PEG_RX[4] PEG_RX[5] PEG_RX[6] PEG_RX[7] PEG_RX[8]
PEG_RX[9] PEG_RX[10] PEG_RX[11] PEG_RX[12] PEG_RX[13] PEG_RX[14] PEG_RX[15]
PEG_TX#[0] PEG_TX#[1] PEG_TX#[2] PEG_TX#[3] PEG_TX#[4] PEG_TX#[5] PEG_TX#[6] PEG_TX#[7] PEG_TX#[8] PEG_TX#[9]
PEG_TX#[10] PEG_TX#[11] PEG_TX#[12] PEG_TX#[13] PEG_TX#[14]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9] PEG_TX[10] PEG_TX[11] PEG_TX[12] PEG_TX[13] PEG_TX[14] PEG_TX[15]
4
B26 A26 B27 A25
K35 J34 J33 G35 G32 F34 F31 D35 E33 C33 D32 B32 C31 B28 B30 A31
J35 H34 H33 F35 G33 E34 F32 D34 F33 B33 D31 A32 C30 A28 B29 A30
L33 M35 M33 M30 L31 K32 M29 J31 K29 H30 H29 F29 E28 D29 D27 C26
L34 M34 M32 L30 M31 K31 M28 H31 K28 G30 G29 F28 E27 D28 C27 C25
PEG_COMP
1 2
R38 49.9_0402_1%R38 49.9_0402_1%
PEG_RBIAS
1 2
R39 750_0402_1%R39 750_0402_1% PCIE_GTX_C_CRX_N0 PCIE_GTX_C_CRX_N1 PCIE_GTX_C_CRX_N2 PCIE_GTX_C_CRX_N3 PCIE_GTX_C_CRX_N4 PCIE_GTX_C_CRX_N5 PCIE_GTX_C_CRX_N6 PCIE_GTX_C_CRX_N7 PCIE_GTX_C_CRX_N8 PCIE_GTX_C_CRX_N9 PCIE_GTX_C_CRX_N10 PCIE_GTX_C_CRX_N11 PCIE_GTX_C_CRX_N12 PCIE_GTX_C_CRX_N13 PCIE_GTX_C_CRX_N14 PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_P4 PCIE_GTX_C_CRX_P5 PCIE_GTX_C_CRX_P6 PCIE_GTX_C_CRX_P7 PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_P15
PCIE_CTX_GRX_N0 PCIE_CTX_GRX_N1 PCIE_CTX_GRX_N2 PCIE_CTX_GRX_N3 PCIE_CTX_GRX_N4 PCIE_CTX_GRX_N5 PCIE_CTX_GRX_N6 PCIE_CTX_GRX_N7 PCIE_CTX_GRX_N8 PCIE_CTX_GRX_N9 PCIE_CTX_GRX_N10 PCIE_CTX_GRX_N11 PCIE_CTX_GRX_N12 PCIE_CTX_GRX_N13 PCIE_CTX_GRX_N14 PCIE_CTX_GRX_N15
PCIE_CTX_GRX_P0 PCIE_CTX_GRX_P1 PCIE_CTX_GRX_P2 PCIE_CTX_GRX_P3 PCIE_CTX_GRX_P4 PCIE_CTX_GRX_P5 PCIE_CTX_GRX_P6 PCIE_CTX_GRX_P7 PCIE_CTX_GRX_P8 PCIE_CTX_GRX_P9 PCIE_CTX_GRX_P10 PCIE_CTX_GRX_P11 PCIE_CTX_GRX_P12 PCIE_CTX_GRX_P13 PCIE_CTX_GRX_P14 PCIE_CTX_GRX_P15
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C39 0.1U_0402_16V7KC39 0.1U_0402_16V7K
1 2
C40 0.1U_0402_16V7KC40 0.1U_0402_16V7K
1 2
C41 0.1U_0402_16V7KC41 0.1U_0402_16V7K
1 2
C42 0.1U_0402_16V7KC42 0.1U_0402_16V7K
1 2
C43 0.1U_0402_16V7KC43 0.1U_0402_16V7K
1 2
C44 0.1U_0402_16V7KC44 0.1U_0402_16V7K
1 2
C45 0.1U_0402_16V7KC45 0.1U_0402_16V7K
1 2
C46 0.1U_0402_16V7KC46 0.1U_0402_16V7K
1 2
C47 0.1U_0402_16V7KC47 0.1U_0402_16V7K
1 2
C48 0.1U_0402_16V7KC48 0.1U_0402_16V7K
1 2
C49 0.1U_0402_16V7KC49 0.1U_0402_16V7K
1 2
C50 0.1U_0402_16V7KC50 0.1U_0402_16V7K
1 2
C51 0.1U_0402_16V7KC51 0.1U_0402_16V7K
1 2
C52 0.1U_0402_16V7KC52 0.1U_0402_16V7K
1 2
C53 0.1U_0402_16V7KC53 0.1U_0402_16V7K
1 2
C54 0.1U_0402_16V7KC54 0.1U_0402_16V7K
1 2
C55 0.1U_0402_16V7KC55 0.1U_0402_16V7K
1 2
C56 0.1U_0402_16V7KC56 0.1U_0402_16V7K
1 2
C57 0.1U_0402_16V7KC57 0.1U_0402_16V7K
1 2
C58 0.1U_0402_16V7KC58 0.1U_0402_16V7K
1 2
C59 0.1U_0402_16V7KC59 0.1U_0402_16V7K
1 2
C60 0.1U_0402_16V7KC60 0.1U_0402_16V7K
1 2
C61 0.1U_0402_16V7KC61 0.1U_0402_16V7K
1 2
C62 0.1U_0402_16V7KC62 0.1U_0402_16V7K
1 2
C63 0.1U_0402_16V7KC63 0.1U_0402_16V7K
1 2
C64 0.1U_0402_16V7KC64 0.1U_0402_16V7K
1 2
C65 0.1U_0402_16V7KC65 0.1U_0402_16V7K
1 2
C66 0.1U_0402_16V7KC66 0.1U_0402_16V7K
1 2
C67 0.1U_0402_16V7KC67 0.1U_0402_16V7K
1 2
C68 0.1U_0402_16V7KC68 0.1U_0402_16V7K
1 2
C69 0.1U_0402_16V7KC69 0.1U_0402_16V7K
1 2
C70 0.1U_0402_16V7KC70 0.1U_0402_16V7K
1 2
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
3
PCIE_GTX_C_CRX_N[0..15] 13
PCIE_GTX_C_CRX_P[0..15] 13
PCIE_CTX_C_GRX_N0 PCIE_CTX_C_GRX_N1 PCIE_CTX_C_GRX_N2 PCIE_CTX_C_GRX_N3 PCIE_CTX_C_GRX_N4 PCIE_CTX_C_GRX_N5 PCIE_CTX_C_GRX_N6 PCIE_CTX_C_GRX_N7 PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_N9 PCIE_CTX_C_GRX_N10 PCIE_CTX_C_GRX_N11 PCIE_CTX_C_GRX_N12 PCIE_CTX_C_GRX_N13 PCIE_CTX_C_GRX_N14 PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P0
PCIE_CTX_C_GRX_P1
PCIE_CTX_C_GRX_P2
PCIE_CTX_C_GRX_P3
PCIE_CTX_C_GRX_P4
PCIE_CTX_C_GRX_P5
PCIE_CTX_C_GRX_P6
PCIE_CTX_C_GRX_P7
PCIE_CTX_C_GRX_P8
PCIE_CTX_C_GRX_P9
PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_P15
Deciphered Date
Deciphered Date
Deciphered Date
+FAN1
10mil
1
2
U1
1
EN
GND
2
VIN
GND
3
VOUT
GND
4
VSET
GND
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
C5
C5 10U_0805_10V4Z
10U_0805_10V4Z
PCIE_CTX_C_GRX_N[0..15] 13
PCIE_CTX_C_GRX_P[0..15] 13
2
8 7 6 5
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
+FAN1
1
2
C4 1000P_0402_25V8J@C41000P_0402_25V8J@
1
C6
0.01U_0402_25V7K
0.01U_0402_25V7K
C6
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
JFAN
JFAN
1
1
2
2
3
3
4
GND
5
GND
ACES_85204-0300N
ACES_85204-0300N
R34 10K_0402_5%R34 10K_0402_5%
1
@
@
12
+3VS
FAN_SPEED1 38
652Tuesday, December 28, 2010
652Tuesday, December 28, 2010
652Tuesday, December 28, 2010
of
of
of
B
B
B
5
JCPUC
JCPUC
DDR_A_D[0..63]11
4
3
JCPUD
JCPUD
DDR_B_D[0..63]12
2
1
AA6
SA_CK[0]
AA7
SA_CK#[0]
P7
DDR_A_D0 DDR_A_D1
D D
C C
B B
DDR_A_BS011 DDR_A_BS111 DDR_A_BS211
DDR_A_CAS#11 DDR_A_RAS#11
DDR_A_WE#11
DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
A10
C10
B10
D10
E10
F10
H10
G10
AH5 AF5 AK6 AK7 AF6 AG5
AJ7 AJ6
AJ10
AJ9
AL10
AK12
AK8
AL7
AK11
AL8
AN8 AM10 AR11
AL11
AM9
AN9
AT11
AP12 AM12 AN12 AM13
AT14
AT12
AL13 AR14
AP14
AC3 AB2
AE1 AB3 AE9
C7 A7
A8 D8
E6 F7 E9 B7 E7 C6
G8
K7
G7
J10
M6 M8
K8 N8 P9
U7
J8
J7
L7
L9 L6
SA_DQ[0] SA_DQ[1] SA_DQ[2] SA_DQ[3] SA_DQ[4] SA_DQ[5] SA_DQ[6] SA_DQ[7] SA_DQ[8] SA_DQ[9] SA_DQ[10] SA_DQ[11] SA_DQ[12] SA_DQ[13] SA_DQ[14] SA_DQ[15] SA_DQ[16] SA_DQ[17] SA_DQ[18] SA_DQ[19] SA_DQ[20] SA_DQ[21] SA_DQ[22] SA_DQ[23] SA_DQ[24] SA_DQ[25] SA_DQ[26] SA_DQ[27] SA_DQ[28] SA_DQ[29] SA_DQ[30] SA_DQ[31] SA_DQ[32] SA_DQ[33] SA_DQ[34] SA_DQ[35] SA_DQ[36] SA_DQ[37] SA_DQ[38] SA_DQ[39] SA_DQ[40] SA_DQ[41] SA_DQ[42] SA_DQ[43] SA_DQ[44] SA_DQ[45] SA_DQ[46] SA_DQ[47] SA_DQ[48] SA_DQ[49] SA_DQ[50] SA_DQ[51] SA_DQ[52] SA_DQ[53] SA_DQ[54] SA_DQ[55] SA_DQ[56] SA_DQ[57] SA_DQ[58] SA_DQ[59] SA_DQ[60] SA_DQ[61] SA_DQ[62] SA_DQ[63]
SA_BS[0] SA_BS[1] SA_BS[2]
SA_CAS# SA_RAS# SA_WE#
SA_CKE[0]
Y6
SA_CK[1]
Y5
SA_CK#[1]
P6
SA_CKE[1]
AE2
SA_CS#[0]
AE8
SA_CS#[1]
AD8
SA_ODT[0]
AF9
SA_ODT[1]
DDR_A_DM0
B9
SA_DM[0] SA_DM[1] SA_DM[2] SA_DM[3] SA_DM[4] SA_DM[5] SA_DM[6] SA_DM[7]
SA_DQS#[0] SA_DQS#[1] SA_DQS#[2] SA_DQS#[3] SA_DQS#[4] SA_DQS#[5] SA_DQS#[6] SA_DQS#[7]
SA_DQS[0] SA_DQS[1] SA_DQS[2] SA_DQS[3] SA_DQS[4] SA_DQS[5] SA_DQS[6] SA_DQS[7]
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_MA[0] SA_MA[1] SA_MA[2] SA_MA[3] SA_MA[4] SA_MA[5] SA_MA[6] SA_MA[7] SA_MA[8]
SA_MA[9] SA_MA[10] SA_MA[11] SA_MA[12] SA_MA[13] SA_MA[14] SA_MA[15]
D7 H7 M7 AG6 AM7 AN10 AN13
DDR_A_DQS#0
C9
DDR_A_DQS#1
F8
DDR_A_DQS#2
J9
DDR_A_DQS#3
N9
DDR_A_DQS#4
AH7
DDR_A_DQS#5
AK9
DDR_A_DQS#6
AP11
DDR_A_DQS#7
AT13
C8 F9 H9 M9 AH8 AK10 AN11 AR13
Y3 W1 AA8 AA3 V1 AA9 V8 T1 Y9 U6 AD4 T2 U3 AG8 T3 V9
DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7
DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8
DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14 DDR_A_MA15
DDRA_CLK0 11 DDRB_CLK0 12 DDRA_CLK0# 11 DDRA_CKE0 11 DDRB_CKE0 12
DDRA_CLK1 11 DDRA_CLK1# 11 DDRA_CKE1 11
DDRA_SCS0# 11 DDRA_SCS1# 11 DDRB_SCS1# 12
DDRA_ODT0 11 DDRB_ODT0 12 DDRA_ODT1 11 DDRB_ODT1 12
DDR_A_DM[0..7] 11
DDR_A_DQS#[0..7] 11
DDR_A_DQS[0..7] 11
DDR_A_MA[0..15] 11
DDR_B_BS012 DDR_B_BS112 DDR_B_BS212
DDR_B_CAS#12 DDR_B_RAS#12
DDR_B_WE#12
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
AF3
AG1
AK1 AG4 AG3
AH4
AK3
AK4 AM6
AN2
AK5
AK2 AM4 AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10 AT10
AB1
AC5
AC6
AJ3
AJ4
W5
B5 A5 C3 B3 E4 A6 A4 C4 D1 D2 F2 F1 C2 F5 F3 G4 H6 G2
J6
J3 G1 G5
J2
J1
J5 K2
L3 M1 K5 K4 M4 N5
R7
Y7
SB_DQ[0] SB_DQ[1] SB_DQ[2] SB_DQ[3] SB_DQ[4] SB_DQ[5] SB_DQ[6] SB_DQ[7] SB_DQ[8] SB_DQ[9] SB_DQ[10] SB_DQ[11] SB_DQ[12] SB_DQ[13] SB_DQ[14] SB_DQ[15] SB_DQ[16] SB_DQ[17] SB_DQ[18] SB_DQ[19] SB_DQ[20] SB_DQ[21] SB_DQ[22] SB_DQ[23] SB_DQ[24] SB_DQ[25] SB_DQ[26] SB_DQ[27] SB_DQ[28] SB_DQ[29] SB_DQ[30] SB_DQ[31] SB_DQ[32] SB_DQ[33] SB_DQ[34] SB_DQ[35] SB_DQ[36] SB_DQ[37] SB_DQ[38] SB_DQ[39] SB_DQ[40] SB_DQ[41] SB_DQ[42] SB_DQ[43] SB_DQ[44] SB_DQ[45] SB_DQ[46] SB_DQ[47] SB_DQ[48] SB_DQ[49] SB_DQ[50] SB_DQ[51] SB_DQ[52] SB_DQ[53] SB_DQ[54] SB_DQ[55] SB_DQ[56] SB_DQ[57] SB_DQ[58] SB_DQ[59] SB_DQ[60] SB_DQ[61] SB_DQ[62] SB_DQ[63]
SB_BS[0] SB_BS[1] SB_BS[2]
SB_CAS# SB_RAS# SB_WE#
SB_DQS#[0] SB_DQS#[1] SB_DQS#[2] SB_DQS#[3] SB_DQS#[4] SB_DQS#[5] SB_DQS#[6] SB_DQS#[7]
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK[0] SB_CK#[0] SB_CKE[0]
SB_CK[1] SB_CK#[1] SB_CKE[1]
SB_CS#[0] SB_CS#[1]
SB_ODT[0] SB_ODT[1]
SB_DM[0] SB_DM[1] SB_DM[2] SB_DM[3] SB_DM[4] SB_DM[5] SB_DM[6] SB_DM[7]
SB_DQS[0] SB_DQS[1] SB_DQS[2] SB_DQS[3] SB_DQS[4] SB_DQS[5] SB_DQS[6] SB_DQS[7]
SB_MA[0] SB_MA[1] SB_MA[2] SB_MA[3] SB_MA[4] SB_MA[5] SB_MA[6] SB_MA[7] SB_MA[8]
SB_MA[9] SB_MA[10] SB_MA[11] SB_MA[12] SB_MA[13] SB_MA[14] SB_MA[15]
W8 W9 M3
V7 V6 M2
AB8 AD6
AC7 AD1
D4 E1 H3 K1 AH1 AL2 AR4 AT8
D5 F4 J4 L4 AH2 AL4 AR5 AR8
C5 E3 H4 M5 AG2 AL5 AP5 AR7
U5 V2 T5 V3 R1 T8 R2 R6 R4 R5 AB5 P3 R3 AF7 P5 N1
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8
DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14 DDR_B_MA15
DDRB_CLK0# 12
DDRB_CLK1 12 DDRB_CLK1# 12 DDRB_CKE1 12
DDRB_SCS0# 12
DDR_B_DM[0..7] 12
DDR_B_DQS#[0..7] 12
DDR_B_DQS[0..7] 12
DDR_B_MA[0..15] 12
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
A A
Security Classification
Security Classification
Security Classification
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/05 2011/09/05
3
Deciphered Date
Deciphered Date
Deciphered Date
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
752Tuesday, December 28, 2010
752Tuesday, December 28, 2010
752Tuesday, December 28, 2010
1
B
B
B
of
of
of
5
4
3
2
1
Material Note (+VTT):
JCPUF
JCPUF
+CPU_CORE
D D
C C
B B
A A
Clarksfield: 65A Clarksfield: 21A Auburndale:48A
AG35
VCC1
AG34
VCC2
AG33
VCC3
AG32
VCC4
AG31
VCC5
AG30
VCC6
AG29
VCC7
AG28
VCC8
AG27
VCC9
AG26
VCC10
AF35
VCC11
AF34
VCC12
AF33
VCC13
AF32
VCC14
AF31
VCC15
AF30
VCC16
AF29
VCC17
AF28
VCC18
AF27
VCC19
AF26
VCC20
AD35
VCC21
AD34
VCC22
AD33
VCC23
AD32
VCC24
AD31
VCC25
AD30
VCC26
AD29
VCC27
AD28
VCC28
AD27
VCC29
AD26
VCC30
AC35
VCC31
AC34
VCC32
AC33
VCC33
AC32
VCC34
AC31
VCC35
AC30
VCC36
AC29
VCC37
AC28 AC27 AC26 AA35 AA34 AA33 AA32 AA31 AA30 AA29 AA28 AA27 AA26
VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
SENSE LINES
SENSE LINES
Auburndale:18A
VTT0_1 VTT0_2 VTT0_3 VTT0_4 VTT0_5 VTT0_6 VTT0_7 VTT0_8
VTT0_9 VTT0_10 VTT0_11 VTT0_12 VTT0_13 VTT0_14 VTT0_15 VTT0_16 VTT0_17 VTT0_18 VTT0_19 VTT0_20 VTT0_21 VTT0_22 VTT0_23 VTT0_24 VTT0_25 VTT0_26 VTT0_27 VTT0_28 VTT0_29 VTT0_30 VTT0_31
1.1V RAIL POWER
1.1V RAIL POWER
VTT0_32
VTT0_33 VTT0_34 VTT0_35 VTT0_36 VTT0_37 VTT0_38 VTT0_39 VTT0_40 VTT0_41 VTT0_42 VTT0_43 VTT0_44
PSI#
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
ISENSE
VCC_SENSE VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
AH14 AH12 AH11 AH10 J14 J13 H14 H12 G14 G13 G12 G11 F14 F13 F12 F11 E14 E12 D14 D13 D12 D11 C14 C13 C12 C11 B14 B12 A14 A13 A12 A11
AF10 AE10 AC10 AB10 Y10 W10 U10 T10 J12 J11 J16 J15
AN33
AK35 AK33 AK34 AL35 AL33 AM33 AM35 AM34
G15
AN35
AJ34 AJ35
B15 A15
390uF/ 10mohm, number are 3, power x1, HW x2
(Place these capacitors under CPU socket Edge, top layer) (Place these capacitors between inductor and socket on Bottom)
+
+
C144 390U_2.5V_M_R10
C144 390U_2.5V_M_R10
1 2
+
+
C267 390U_2.5V_M_R10
C267 390U_2.5V_M_R10
1 2
C89 22U_0805_6.3V6MC89 22U_0805_6.3V6M
1 2
C91 22U_0805_6.3V6MC91 22U_0805_6.3V6M
1 2
SF000002O00 ESR 10m-ohm H6.3
H_PSI# 49
CPU_VID0 49 CPU_VID1 49 CPU_VID2 49 CPU_VID3 49 CPU_VID4 49 CPU_VID5 49
H_DPRSLPVR_R
VCCSENSE_R
1 2
R62 0_0402_5%R62 0_0402_5%
R65 0_0402_5%R65 0_0402_5%
1 2
R66 0_0402_5%R66 0_0402_5%
1 2
VTT_SENSE 46 VSS_SENSE_VTT 46
CPU_VID6 49 H_DPRSLPVR 49
IMVP_IMON 49
+VTT
C81 10U_0805_10V4KC81 10U_0805_10V4K
1 2
C83 10U_0805_10V4KC83 10U_0805_10V4K
1 2
C85 10U_0805_10V4KC85 10U_0805_10V4K
1 2
C87 10U_0805_10V4KC87 10U_0805_10V4K
1 2
C88 10U_0805_10V4KC88 10U_0805_10V4K
1 2
C90 10U_0805_10V4KC90 10U_0805_10V4K
1 2
C92 10U_0805_10V4KC92 10U_0805_10V4K
1 2
C94 10U_0805_10V4K@C94 10U_0805_10V4K@
1 2
Power team request for F-Din
+CPU_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C179
C179
C131
C114
C114
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C131
2
22U_0805_6.3V6M
22U_0805_6.3V6M
CRB default setting: VID[6:0]=[0100111]
VTT Rail
Auburndale +1.1VS_VTT=1.05V Clarksfield +1.1VS_VTT=1.1V
1 2
R64 100_0402_1%R64 100_0402_1%
VCCSENSE VSSSENSEVSSSENSE_R
1 2
R67 100_0402_1%R67 100_0402_1%
near CPU
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C116
C116
2
2
+CPU_CORE
VCCSENSE 49 VSSSENSE 49
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C132
C132
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C129
C129
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C149
C149
+CPU_CORE
10U_0805_10V4K
10U_0805_10V4K
1
C71
C71
2
10U_0805_10V4K
10U_0805_10V4K
1
C72
C72
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C73
C73
2
1
2
1
C75
C75
C74
C74
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C76
C76
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C77
C77
2
1
C78
C78
2
10U_0805_10V4K
10U_0805_10V4K
1
C79
C79
2
(Place these capacitors under CPU socket, top layer)
+CPU_CORE
10U_0805_10V4K
10U_0805_10V4K
1
C98
C98
2
10U_0805_10V4K
10U_0805_10V4K
1
C99
C99
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C100
C100
2
1
C101
C101
2
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
10U_0805_10V4K
1
C102
C102
2
1
1
C103
C103
C104
C104
2
2
10U_0805_10V4K
10U_0805_10V4K
(Place these capacitors on CPU cavity, Bottom Layer)
+CPU_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C106
C106
C105
1
2
C105
2
22U_0805_6.3V6M
22U_0805_6.3V6M
+CPU_CORE
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C112
C112
C111
C111
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C107
C107
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C113
C113
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C108
C108
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
1
C130
C130
2
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C109
C109
2
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C115
C115
2
22U_0805_6.3V6M
22U_0805_6.3V6M
C110
C110
C148
C148
1
2
1
2
TOP side (under inductor)
+CPU_CORE
330U_D2_2.5VM_R9M
1
+
+
C121
C121
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
2
330U_D2_2.5VM_R9M
1
+
+
C122
C122
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
2
C123
C123
330U_D2_2.5VM_R9M
330U_D2_2.5VM_R9M
1
+
+
C124
C124
2
1
+
+
2
Check list:
+CPU_CORE: 6x 470uF, 12x 22uF, 17x 10uF +VTT: 4x 330uF, 7x 22uF, 8x 10uF
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
5
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
1
852Tuesday, December 28, 2010
852Tuesday, December 28, 2010
852Tuesday, December 28, 2010
B
B
B
of
of
of
5
D D
R258
R258
0_0402_5%
0_0402_5%
C C
+VTT
1
C141
B B
C141
22U_0805_6.3V6M
22U_0805_6.3V6M
C146
C146
22U_0805_6.3V6M
22U_0805_6.3V6M
2
+VTT
1
2
(Place these capacitors under CPU socket, top layer)
A A
4
1 2
1
C142
C142 22U_0805_6.3V6M
22U_0805_6.3V6M
2
1
C147
C147 22U_0805_6.3V6M
22U_0805_6.3V6M
2
JCPUG
JCPUG
AT21
VAXG1
AT19
VAXG2
AT18
VAXG3
AT16
VAXG4
AR21
VAXG5
AR19
VAXG6
AR18
VAXG7
AR16
VAXG8
AP21
VAXG9
AP19
VAXG10
AP18
VAXG11
AP16
VAXG12
AN21
VAXG13
AN19
VAXG14
AN18
VAXG15
AN16
VAXG16
AM21
VAXG17
AM19
VAXG18
AM18
VAXG19
AM16
VAXG20
AL21
VAXG21
AL19
VAXG22
AL18
VAXG23
AL16
VAXG24
AK21
VAXG25
AK19
VAXG26
AK18
VAXG27
AK16
VAXG28
AJ21
VAXG29
AJ19
VAXG30
AJ18
VAXG31
AJ16
VAXG32
AH21
VAXG33
AH19
VAXG34
AH18
VAXG35
AH16
VAXG36
Auburndale:22A
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
7/22 modified for cost down.
GRAPHICS
GRAPHICS
Clarksfield: 5A Auburndale:3A
FDI PEG & DMI
FDI PEG & DMI
POWER
POWER
Clarksfield: 21A Auburndale:18A
Clarksfield: 0.6A Auburndale:1.35A
3
+1.5V_CPU +1.5VS
PJ32
@PJ32
@
2
112
JUMP_43X79
JUMP_43X79
GFX_VID[0] GFX_VID[1] GFX_VID[2] GFX_VID[3] GFX_VID[4] GFX_VID[5] GFX_VID[6]
GFX_IMON
VDDQ1 VDDQ2 VDDQ3 VDDQ4 VDDQ5 VDDQ6 VDDQ7 VDDQ8
VDDQ9 VDDQ10 VDDQ11 VDDQ12 VDDQ13 VDDQ14 VDDQ15 VDDQ16 VDDQ17 VDDQ18
VTT0_59 VTT0_60 VTT0_61 VTT0_62
VTT1_63 VTT1_64 VTT1_65 VTT1_66 VTT1_67 VTT1_68
VCCPLL1 VCCPLL2 VCCPLL3
AR22 AT22
AM22 AP22 AN22 AP23 AM23 AP24 AN24
AR25 AT25 AM24
AJ1 AF1 AE7 AE4 AC1 AB7 AB4 Y1 W7 W4 U1 T7 T4 P1 N7 N4 L1 H1
P10 N10 L10 K10
J22 J20 J18 H21 H20 H19
L26 L27 M26
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_VR_EN
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V1.8V
1.1V1.8V
GFXVR_IMON
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS_H_PLL
C151
C151
1U_0402_6.3V4Z
1U_0402_6.3V4Z
470_0805_5%
470_0805_5%
Q46B
Q46B
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
R687 1K_0402_5%R687 1K_0402_5%
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C133
C133
+VTT
1
C135
C135
C134
C134
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
(Place these capacitors under CPU socket Edge, top layer)
1
C143
C143 10U_0805_10V4K
10U_0805_10V4K
2
1
C145
C145 22U_0805_6.3V6M
22U_0805_6.3V6M
2
(Place these capacitors under CPU socket, top layer)
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1
C152
C152
2
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
R424
R424
1 2 3
5
4
12
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
C136
C136
2
+VTT
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
C153
C153
2
2
1
C273
C273 10U_0805_10V4K
10U_0805_10V4K
2
1
1
C137
C137
2
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
C154
C154
3A
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C138
C138
C139
C139
2
22U_0805_6.3V6M
22U_0805_6.3V6M
R71 0_0805_5%R71 0_0805_5%
1
C155
C155
2
22U_0805_6.3V6M
22U_0805_6.3V6M
1
C472
C472
2
1
2
Q33
Q33
1
S
D
2
S
D
3
S
D
4
G
D
FDS6676AS_SO8
FDS6676AS_SO8
12
R417
R417 820K_0402_5%
820K_0402_5%
0.1U_0402_25V6
0.1U_0402_25V6
+1.5V_CPU
1
+
+
C216
C216 390U_2.5V_M_R10
390U_2.5V_M_R10
2
+1.8VS
12
+1.5V+1.5V_CPU
8 7 6 5
R418
R418
1 2
220K_0402_5%
220K_0402_5%
61
Q46A
Q46A
SUSPSUSP
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
C230 0.1U_0402_16V4ZC230 0.1U_0402_16V4Z
1 2
C314 0.1U_0402_16V4ZC314 0.1U_0402_16V4Z
1 2
C205 0.1U_0402_16V4ZC205 0.1U_0402_16V4Z
1 2
C186 0.1U_0402_16V4ZC186 0.1U_0402_16V4Z
1 2
remove PJ30
PJ31
2
JUMP_43X79
JUMP_43X79
PJ31 need to open for S3 CPU Power Saving
1
form PS@ to mount
+VSB
SUSP 41,48
@PJ31
@
112
+1.5V
Security Classification
Security Classification
Security Classification
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/05 2011/09/05
3
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
952Tuesday, December 28, 2010
952Tuesday, December 28, 2010
952Tuesday, December 28, 2010
1
B
B
B
of
of
of
5
JCPUI
JCPUI
K27
VSS161
K9
VSS162
K6
VSS163
D D
C C
B B
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
VSS
VSS
NCTF
NCTF
VSS_NCTF1 VSS_NCTF2 VSS_NCTF3 VSS_NCTF4 VSS_NCTF5 VSS_NCTF6 VSS_NCTF7
AT35 AT1 AR34 B34 B2 B1 A35
4
JCPUH
JCPUH
AT20
VSS1
AT17
VSS2
AR31
VSS3
AR28
VSS4
AR26
VSS5
AR24
VSS6
AR23
VSS7
AR20
VSS8
AR17
VSS9
AR15
VSS10
AR12
VSS11
AR9
VSS12
AR6
VSS13
AR3
VSS14
AP20
VSS15
AP17
VSS16
AP13
VSS17
AP10
VSS18
AP7
VSS19
AP4
VSS20
AP2
VSS21
AN34
VSS22
AN31
VSS23
AN23
VSS24
AN20
VSS25
AN17
VSS26
AM29
VSS27
AM27
VSS28
AM25
VSS29
AM20
VSS30
AM17
VSS31
AM14
VSS32
AM11
VSS33
AM8
VSS34
AM5
VSS35
AM2
VSS36
AL34
VSS37
AL31
VSS38
AL23
VSS39
AL20
VSS40
AL17
VSS41
AL12
VSS42
AL9
VSS43
AL6
VSS44
AL3
VSS45
AK29
VSS46
AK27
VSS47
AK25
VSS48
AK20
VSS49
AK17
VSS50
AJ31
VSS51
AJ23
VSS52
AJ20
VSS53
AJ17
VSS54
AJ14
VSS55
AJ11
VSS56
AJ8
VSS57
AJ5
VSS58
AJ2
VSS59
AH35
VSS60
AH34
VSS61
AH33
VSS62
AH32
VSS63
AH31
VSS64
AH30
VSS65
AH29
VSS66
AH28
VSS67
AH27
VSS68
AH26
VSS69
AH20
VSS70
AH17
VSS71
AH13
VSS72
AH9
VSS73
AH6
VSS74
AH3
VSS75
AG10
VSS76
AF8
VSS77
AF4
VSS78
AF2
VSS79
AE35
VSS80
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
VSS
VSS
VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160
3
AE34 AE33 AE32 AE31 AE30 AE29 AE28 AE27 AE26 AE6 AD10 AC8 AC4 AC2 AB35 AB34 AB33 AB32 AB31 AB30 AB29 AB28 AB27 AB26 AB6 AA10 Y8 Y4 Y2 W35 W34 W33 W32 W31 W30 W29 W28 W27 W26 W6 V10 U8 U4 U2 T35 T34 T33 T32 T31 T30 T29 T28 T27 T26 T6 R10 P8 P4 P2 N35 N34 N33 N32 N31 N30 N29 N28 N27 N26 N6 M10 L35 L32 L29 L8 L5 L2 K34 K33 K30
2
WW41 Recommend not pull down PCIE2.0 Jitter is over on ES1
R743.01K_0402_1% @R743.01K_0402_1% @
1 2
R753.01K_0402_1% @R753.01K_0402_1% @
1 2
R763.01K_0402_1% @R763.01K_0402_1% @
1 2
CFG0 - PCI-Express Configuration Select
*1:Single PEG 0:Bifurcation enabled
CFG3 - PCI-Express Static Lane Reversal
*1 :Normal Operation 0 :Lane Numbers Reversed 15 -> 0, 14 -> 1, ...
CFG4 - Display Port Presence
*1:Disabled; No Physical Display Port attached to Embedded Display Port 0:Enabled; An external Display Port device is connected to the Embedded Display Port
JCPUE
JCPUE
AP25
RSVD1
AL25
RSVD2
AL24
RSVD3
AL22
RSVD4
AJ33
RSVD5
AG9
RSVD6
M27
RSVD7
L28
RSVD8
J17
RSVD9
H17
RSVD10
G25
RSVD11
G17
RSVD12
E31
RSVD13
E30
RSVD14
AM30
CFG[0]
AM28
CFG[1]
AP31
CFG[2]
AL32
CFG[3]
AL30
CFG[4]
AM31
CFG[5]
AN29
CFG[6]
AM32
CFG[7]
AK32
CFG[8]
AK31
CFG[9]
AK28
CFG[10]
AJ28
CFG[11]
AN30
CFG[12]
AN32
CFG[13]
AJ32
CFG[14]
AJ29
CFG[15]
AJ30
CFG[16]
AK30
CFG[17]
H16
RSVD_TP_86
B19
RSVD15
A19
RSVD16
A20
RSVD17
B20
RSVD18
U9
RSVD19
T9
RSVD20
AC9
RSVD21
AB9
RSVD22
C1
RSVD_NCTF_23
A3
RSVD_NCTF_24
J29
RSVD26
J28
RSVD27
A34
RSVD_NCTF_28
A33
RSVD_NCTF_29
C35
RSVD_NCTF_30
B35
RSVD_NCTF_31
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9 @
@
(SA_DIMM_VREF) (SB_DIMM_VREF)
RSVD32 RSVD33
RSVD34 RSVD35
RSVD36
RSVD_NCTF_37
RSVD38 RSVD39
RSVD_NCTF_40 RSVD_NCTF_41
RSVD_NCTF_42 RSVD_NCTF_43
RSVD45 RSVD46 RSVD47 RSVD48 RSVD49 RSVD50 RSVD51 RSVD52
RSVD53 RSVD_NCTF_54 RSVD_NCTF_55 RSVD_NCTF_56 RSVD_NCTF_57
RSVD58
RSVD_TP_59 RSVD_TP_60
RESERVED
RESERVED
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66 RSVD_TP_67 RSVD_TP_68 RSVD_TP_69 RSVD_TP_70 RSVD_TP_71 RSVD_TP_72 RSVD_TP_73 RSVD_TP_74 RSVD_TP_75
RSVD_TP_76 RSVD_TP_77 RSVD_TP_78 RSVD_TP_79 RSVD_TP_80 RSVD_TP_81 RSVD_TP_82 RSVD_TP_83 RSVD_TP_84 RSVD_TP_85
KEY
VSS
1
AJ13 AJ12
AH25 AK26
AL26 AR2
AJ26 AJ27
AP1 AT2
AT3 AR1
AL28 AL29 AP30 AP32 AL27 AT31 AT32 AP33 AR33 AT33 AT34 AP35 AR35 AR32
E15 F15 A2 D15 C15 AJ15 AH15
AA5 AA4 R8 AD3 AD2 AA2 AA1 R9 AG7 AE3
V4 V5 N2 AD5 AD7 W3 W2 N3 AE5 AD9
AP34
*:Default
A A
Security Classification
Security Classification
Security Classification
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/05 2011/09/05
3
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
10 52Tuesday, December 28, 2010
10 52Tuesday, December 28, 2010
10 52Tuesday, December 28, 2010
1
B
B
B
of
of
of
5
+VREF_DQA
1
C157
C157
C156
C156
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
D D
close to JDDRL.1
C C
B B
A A
+3VS
C181
C181
DDR_A_BS27
DDRA_CLK07 DDRA_CLK0#7
DDR_A_BS07
DDR_A_WE#7
DDR_A_CAS#7
DDRA_SCS1#7
1
C182
C182
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
2
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
R90
R90 10K_0402_5%
10K_0402_5%
1
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
5
DDR_A_D0 DDR_A_D1
DDR_A_DM0 DDR_A_D2
DDR_A_D3 DDR_A_D8
DDR_A_D9 DDR_A_DQS#1
DDR_A_DQS1 DDR_A_D10
DDR_A_D11 DDR_A_D16
DDR_A_D17 DDR_A_DQS#2
DDR_A_DQS2 DDR_A_D18
DDR_A_D19 DDR_A_D24
DDR_A_D25 DDR_A_DM3 DDR_A_D26
DDR_A_D27
DDR_A_MA12 DDR_A_MA9
DDR_A_MA8 DDR_A_MA5
DDR_A_MA3 DDR_A_MA1
DDR_A_MA10
DDR_A_MA13
DDR_A_D32 DDR_A_D33
DDR_A_DQS#4 DDR_A_DQS4
DDR_A_D34 DDR_A_D35
DDR_A_D40 DDR_A_D41
DDR_A_DM5 DDR_A_D42
DDR_A_D43 DDR_A_D48
DDR_A_D49 DDR_A_DQS#6
DDR_A_DQS6 DDR_A_D50
DDR_A_D51 DDR_A_D56
DDR_A_D57 DDR_A_DM7 DDR_A_D58
DDR_A_D59
1 2
R91
R91
10K_0402_5%
10K_0402_5%
+1.5V
+0.75VS
12
JDDRL
JDDRL
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT
GND1 GND2
VREF_CA
127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203
205 207
FOX_AS0A626-U2SN-7F_204P
FOX_AS0A626-U2SN-7F_204P @
@
VSS DQ4 DQ5 VSS
DQS0#
DQS0
VSS DQ6 DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD ODT0
VDD ODT1
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
BOSS1 BOSS2
A15 A14
A11
S0#
A7 A6
A4 A2
A0
NC
4
+1.5V
2
DDR_A_D4
4
DDR_A_D5
6 8
DDR_A_DQS#0
10
DDR_A_DQS0
12 14
DDR_A_D6
16
DDR_A_D7
18 20
DDR_A_D12
22
DDR_A_D13
24 26
DDR_A_DM1
28 30 32
DDR_A_D14
34
DDR_A_D15
36 38
DDR_A_D20
40
DDR_A_D21
42 44
DDR_A_DM2
46 48
DDR_A_D22
50
DDR_A_D23
52 54
DDR_A_D28
56
DDR_A_D29
58 60
DDR_A_DQS#3
62
DDR_A_DQS3
64 66
DDR_A_D30
68
DDR_A_D31
70 72
74 76
DDR_A_MA15
78
DDR_A_MA14
80 82
DDR_A_MA11
84
DDR_A_MA7
86 88
DDR_A_MA6
90
DDR_A_MA4
92 94
DDR_A_MA2
96
DDR_A_MA0
98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
+DDR_VREF_CA_DIMMA
DDR_A_D36 DDR_A_D37
DDR_A_DM4 DDR_A_D38
DDR_A_D39 DDR_A_D44
DDR_A_D45 DDR_A_DQS#5
DDR_A_DQS5 DDR_A_D46
DDR_A_D47 DDR_A_D52
DDR_A_D53 DDR_A_DM6 DDR_A_D54
DDR_A_D55 DDR_A_D60
DDR_A_D61 DDR_A_DQS#7
DDR_A_DQS7 DDR_A_D62
DDR_A_D63
+0.75VS
4
DDR3 SO-DIMM A Standard Type
+1.5V
12
R83
R83
1K_0402_1%
1K_0402_1%
R83 from PS@ to mount
DDRA_CKE1 7DDRA_CKE07
DDRA_CLK1 7 DDRA_CLK1# 7
DDR_A_BS1 7 DDR_A_RAS# 7
DDRA_SCS0# 7 DDRA_ODT0 7
DDRA_ODT1 7
C161
C161
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
close to JDDRL.126
PM_EXTTS# 5,12
PM_SMBDATA 12,21,24,33 PM_SMBCLK 12,21,24,33
+V_DDR3_DIMM_REF
R89
R89
1 2
0_0402_5%
0_0402_5%
1
1
C162
C162
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
SM_DRAMRST# 5,12
3
DDR_A_DQS[0..7]7
DDR_A_DQS#[0..7]7
DDR_A_D[0..63]7
DDR_A_DM[0..7]7
DDR_A_MA[0..15]7
Layout Note: Place near JDDRL
+1.5V
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
3
+
+
C218 390U_2.5V_M_R10
C218 390U_2.5V_M_R10
1 2
C166 10U_0805_6.3V6MC166 10U_0805_6.3V6M
1 2
C168 10U_0805_6.3V6MC168 10U_0805_6.3V6M
1 2
C171 10U_0805_6.3V6MC171 10U_0805_6.3V6M
1 2
C174 10U_0805_6.3V6MC174 10U_0805_6.3V6M
1 2
C176 10U_0805_6.3V6MC176 10U_0805_6.3V6M
1 2
C178 10U_0805_6.3V6MC178 10U_0805_6.3V6M
1 2
Deciphered Date
Deciphered Date
Deciphered Date
M1 Circuit
+1.5V
R79
R79
1K_0402_1%
1K_0402_1%
R81
R81
1K_0402_1%
1K_0402_1%
Layout Note: Place these 4 Caps near Command and Control signals of DIMMA
+1.5V +0.75VS
C164 0.1U_0402_16V4ZC164 0.1U_0402_16V4Z C167 0.1U_0402_16V4ZC167 0.1U_0402_16V4Z C170 0.1U_0402_16V4ZC170 0.1U_0402_16V4Z C173 0.1U_0402_16V4ZC173 0.1U_0402_16V4Z
2
12
+V_DDR3_DIMM_REF
12
1 2 1 2 1 2 1 2
2
1
12
R78 0_0402_5%R78 0_0402_5%
12
R80 0_0402_5%R80 0_0402_5%
Layout Note: Place near JDDRL1.203 and 204
C165 10U_0805_6.3V6MC165 10U_0805_6.3V6M
C169 1U_0402_6.3V4ZC169 1U_0402_6.3V4Z C172 1U_0402_6.3V4ZC172 1U_0402_6.3V4Z C175 1U_0402_6.3V4ZC175 1U_0402_6.3V4Z C177 1U_0402_6.3V4ZC177 1U_0402_6.3V4Z
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
1 2
+VREF_DQB
+VREF_DQA
12 12 12 12
1
11 52Tuesday, December 28, 2010
11 52Tuesday, December 28, 2010
11 52Tuesday, December 28, 2010
of
of
of
B
B
B
A
+VREF_DQB
1
2
C183
C183
2.2U_0603_6.3V4Z
1 1
2.2U_0603_6.3V4Z
close to JDDRH.1
2 2
3 3
4 4
DDRB_CKE07
DDR_B_BS27
DDRB_CLK07 DDRB_CLK0#7
DDR_B_WE#7 DDR_B_CAS#7
DDRB_SCS1#7
+3VS
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
1
C207
C207
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
C208
C208
2
1
2
C184
C184
0.1U_0402_16V4Z
0.1U_0402_16V4Z
R98
R98 10K_0402_5%
10K_0402_5%
R99
R99
1 2
10K_0402_5%
10K_0402_5%
DDR_B_D0 DDR_B_D1
DDR_B_DM0 DDR_B_D2
DDR_B_D3 DDR_B_D8
DDR_B_D9 DDR_B_DQS#1
DDR_B_DQS1 DDR_B_D10
DDR_B_D11 DDR_B_D16
DDR_B_D17 DDR_B_DQS#2
DDR_B_DQS2 DDR_B_D18
DDR_B_D19 DDR_B_D24
DDR_B_D25 DDR_B_DM3 DDR_B_D26
DDR_B_D27
DDR_B_MA12 DDR_B_MA9
DDR_B_MA8 DDR_B_MA5
DDR_B_MA3 DDR_B_MA1
DDR_B_MA10
DDR_B_MA13
DDR_B_D32 DDR_B_D33
DDR_B_DQS#4 DDR_B_DQS4
DDR_B_D34 DDR_B_D35
DDR_B_D40 DDR_B_D41
DDR_B_DM5 DDR_B_D42
DDR_B_D43 DDR_B_D48
DDR_B_D49 DDR_B_DQS#6
DDR_B_DQS6 DDR_B_D50
DDR_B_D51 DDR_B_D56
DDR_B_D57 DDR_B_DM7 DDR_B_D58
DDR_B_D59
1 2
A
+0.75VS
+1.5V
JDDRH
JDDRH
1
VREF_DQ
3
VSS
5
DQ0
7
DQ1
9
VSS
11
DM0
13
VSS
15
DQ2
17
DQ3
19
VSS
21
DQ8
23
DQ9
25
VSS
27
DQS1#
29
DQS1
31
VSS
33
DQ10
35
DQ11
37
VSS
39
DQ16
41
DQ17
43
VSS
45
DQS2#
47
DQS2
49
VSS
51
DQ18
53
DQ19
55
VSS
57
DQ24
59
DQ25
61
VSS
63
DM3
65
VSS
67
DQ26
69
DQ27
71
VSS
73
CKE0
75
VDD
77
NC
79
BA2
81
VDD
83
A12/BC#
85
A9
87
VDD
89
A8
91
A5
93
VDD
95
A3
97
A1
99
VDD
101
CK0
103
CK0#
105
VDD
107
A10/AP
109
BA0
111
VDD
113
WE#
115
CAS#
117
VDD
119
A13
121
S1#
123
VDD
125
TEST VSS DQ32 DQ33 VSS DQS4# DQS4 VSS DQ34 DQ35 VSS DQ40 DQ41 VSS DM5 VSS DQ42 DQ43 VSS DQ48 DQ49 VSS DQS6# DQS6 VSS DQ50 DQ51 VSS DQ56 DQ57 VSS DM7 VSS DQ58 DQ59 VSS SA0 VDDSPD SA1 VTT
GND1 GND2
VREF_CA
127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199 201 203
205 207
FOX_AS0A626-UASN-7F_204P
FOX_AS0A626-UASN-7F_204P @
@
VSS
DQ4
DQ5
VSS
DQS0#
DQS0
VSS
DQ6
DQ7
VSS DQ12 DQ13
VSS
DM1
RESET#
VSS DQ14 DQ15
VSS DQ20 DQ21
VSS
DM2
VSS DQ22 DQ23
VSS DQ28 DQ29
VSS
DQS3#
DQS3
VSS DQ30 DQ31
VSS
CKE1
VDD
VDD
VDD
VDD
VDD
CK1
CK1#
VDD
BA1 RAS#
VDD ODT0
VDD ODT1
VDD
VSS DQ36 DQ37
VSS
DM4
VSS DQ38 DQ39
VSS DQ44 DQ45
VSS
DQS5#
DQS5
VSS DQ46 DQ47
VSS DQ52 DQ53
VSS
DM6
VSS DQ54 DQ55
VSS DQ60 DQ61
VSS
DQS7#
DQS7
VSS DQ62 DQ63
VSS
EVENT#
SDA
SCL
VTT
BOSS1 BOSS2
A15 A14
A11
S0#
A7 A6
A4 A2
A0
NC
+1.5V
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72
74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124 126 128 130 132 134 136 138 140 142 144 146 148 150 152 154 156 158 160 162 164 166 168 170 172 174 176 178 180 182 184 186 188 190 192 194 196 198 200 202 204
206 208
B
DDR_B_D4 DDR_B_D5
DDR_B_DQS#0 DDR_B_DQS0
DDR_B_D6 DDR_B_D7
DDR_B_D12 DDR_B_D13
DDR_B_DM1
DDR_B_D14 DDR_B_D15
DDR_B_D20 DDR_B_D21
DDR_B_DM2 DDR_B_D22
DDR_B_D23 DDR_B_D28
DDR_B_D29 DDR_B_DQS#3
DDR_B_DQS3 DDR_B_D30
DDR_B_D31
DDR_B_MA15 DDR_B_MA14
DDR_B_MA11 DDR_B_MA7
DDR_B_MA6 DDR_B_MA4
DDR_B_MA2 DDR_B_MA0
+DDR_VREF_CA_DIMMB DDR_B_D36
DDR_B_D37 DDR_B_DM4 DDR_B_D38
DDR_B_D39 DDR_B_D44
DDR_B_D45 DDR_B_DQS#5
DDR_B_DQS5 DDR_B_D46
DDR_B_D47 DDR_B_D52
DDR_B_D53 DDR_B_DM6 DDR_B_D54
DDR_B_D55 DDR_B_D60
DDR_B_D61 DDR_B_DQS#7
DDR_B_DQS7 DDR_B_D62
DDR_B_D63
+0.75VS
B
Standard Type DDR3 SO-DIMM B
SM_DRAMRST# 5,11
DDRB_CKE1 7
DDRB_CLK1 7 DDRB_CLK1# 7
DDR_B_BS1 7 DDR_B_RAS# 7DDR_B_BS07
DDRB_SCS0# 7 DDRB_ODT0 7
DDRB_ODT1 7
R97
R97
1 2
1
2
C188
C188
C187
C187
close to JDDRH.126
PM_EXTTS# 5,11
PM_SMBDATA 11,21,24,33 PM_SMBCLK 11,21,24,33
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+V_DDR3_DIMM_REF
0_0402_5%
0_0402_5%
1
2
C
DDR_B_DQS#[0..7]7
DDR_B_DQS[0..7]7
DDR_B_D[0..63]7
DDR_B_DM[0..7]7
DDR_B_MA[0..15]7
Layout Note: Place near JDDRH
+1.5V
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
C
@
@
+
+
C189 330U_B2_2.5VM_R15M
C189 330U_B2_2.5VM_R15M
1 2
C192 10U_0805_6.3V6MC192 10U_0805_6.3V6M
1 2
C194 10U_0805_6.3V6MC194 10U_0805_6.3V6M
1 2
C197 10U_0805_6.3V6MC197 10U_0805_6.3V6M
1 2
C200 10U_0805_6.3V6MC200 10U_0805_6.3V6M
1 2
C202 10U_0805_6.3V6MC202 10U_0805_6.3V6M
1 2
C204 10U_0805_6.3V6MC204 10U_0805_6.3V6M
1 2
Deciphered Date
Deciphered Date
Deciphered Date
Layout Note: Place these 4 Caps near Command and Control signals of DIMMB
D
C190 0.1U_0402_16V4ZC190 0.1U_0402_16V4Z
1 2
C193 0.1U_0402_16V4ZC193 0.1U_0402_16V4Z
1 2
C196 0.1U_0402_16V4ZC196 0.1U_0402_16V4Z
1 2
C199 0.1U_0402_16V4ZC199 0.1U_0402_16V4Z
1 2
D
E
Layout Note: Place near JDDRH.203 and 204
+0.75VS+1.5V
C191 10U_0805_6.3V6MC191 10U_0805_6.3V6M
1 2
C195 1U_0402_6.3V4ZC195 1U_0402_6.3V4Z
12
C198 1U_0402_6.3V4ZC198 1U_0402_6.3V4Z
12
C201 1U_0402_6.3V4ZC201 1U_0402_6.3V4Z
12
C203 1U_0402_6.3V4ZC203 1U_0402_6.3V4Z
12
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
12 52Tuesday, December 28, 2010
12 52Tuesday, December 28, 2010
12 52Tuesday, December 28, 2010
E
of
of
of
B
B
B
5
4
3
2
1
PCIE_GTX_C_CRX_P[0..15]6
PCIE_GTX_C_CRX_N[0..15]6
D D
C C
B B
PCIE_CTX_C_GRX_P[0..15]6
PCIE_CTX_C_GRX_N[0..15]6
PCIE_GTX_C_CRX_P[0..15]
PCIE_GTX_C_CRX_N[0..15]
PCIE_CTX_C_GRX_P[0..15]
PCIE_CTX_C_GRX_N[0..15]
CLK_PCIE_VGA24 CLK_PCIE_VGA#24
RV133 10K_0402_5%RV133 10K_0402_5%
PLT_RST#27,33,34,38,39
LANE Reversal
PCIE_CTX_C_GRX_P15 PCIE_CTX_C_GRX_N15
PCIE_CTX_C_GRX_P14 PCIE_CTX_C_GRX_N14
PCIE_CTX_C_GRX_P13 PCIE_CTX_C_GRX_N13
PCIE_CTX_C_GRX_P12 PCIE_CTX_C_GRX_N12
PCIE_CTX_C_GRX_P11 PCIE_CTX_C_GRX_N11
PCIE_CTX_C_GRX_P10 PCIE_CTX_C_GRX_N10
PCIE_CTX_C_GRX_P9 PCIE_CTX_C_GRX_N9
PCIE_CTX_C_GRX_P8 PCIE_CTX_C_GRX_N8
PCIE_CTX_C_GRX_P7 PCIE_CTX_C_GRX_N7
PCIE_CTX_C_GRX_P6 PCIE_CTX_C_GRX_N6
PCIE_CTX_C_GRX_P5 PCIE_CTX_C_GRX_N5
PCIE_CTX_C_GRX_P4 PCIE_CTX_C_GRX_N4
PCIE_CTX_C_GRX_P3 PCIE_CTX_C_GRX_N3
PCIE_CTX_C_GRX_P2 PCIE_CTX_C_GRX_N2
PCIE_CTX_C_GRX_P1 PCIE_CTX_C_GRX_N1
PCIE_CTX_C_GRX_P0 PCIE_CTX_C_GRX_N0
1 2
UV1A
UV1A
AF30
PCIE_RX0P
AE31
PCIE_RX0N
AE29
PCIE_RX1P
AD28
PCIE_RX1N
AD30
PCIE_RX2P
AC31
PCIE_RX2N
AC29
PCIE_RX3P
AB28
PCIE_RX3N
AB30
PCIE_RX4P
AA31
PCIE_RX4N
AA29
PCIE_RX5P
Y28
PCIE_RX5N
Y30
PCIE_RX6P
W31
PCIE_RX6N
W29
PCIE_RX7P
V28
PCIE_RX7N
V30
PCIE_RX8P
U31
PCIE_RX8N
U29
PCIE_RX9P
T28
PCIE_RX9N
T30
PCIE_RX10P
R31
PCIE_RX10N
R29
PCIE_RX11P
P28
PCIE_RX11N
P30
PCIE_RX12P
N31
PCIE_RX12N
N29
PCIE_RX13P
M28
PCIE_RX13N
M30
PCIE_RX14P
L31
PCIE_RX14N
L29
PCIE_RX15P
K30
PCIE_RX15N
CLOCK
CLOCK
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
N10
PWRGOOD
AL27
PERSTB
216-0774009-A11PARK_FCBGA631
216-0774009-A11PARK_FCBGA631 PARKR1@
PARKR1@
LANE Reversal
PCIE_GTX_CRX_P15
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
PCIE_TX8P PCIE_TX8N
PCIE_TX9P PCIE_TX9N
PCIE_TX10P PCIE_TX10N
PCIE_TX11P PCIE_TX11N
PCIE_TX12P PCIE_TX12N
PCIE_TX13P PCIE_TX13N
PCIE_TX14P PCIE_TX14N
PCIE_TX15P PCIE_TX15N
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
AH30
PCIE_GTX_CRX_N15
AG31
PCIE_GTX_CRX_P14
AG29
PCIE_GTX_CRX_N14
AF28
PCIE_GTX_CRX_P13
AF27
PCIE_GTX_CRX_N13
AF26
PCIE_GTX_CRX_P12
AD27
PCIE_GTX_CRX_N12
AD26
PCIE_GTX_CRX_P11
AC25
PCIE_GTX_CRX_N11
AB25
PCIE_GTX_CRX_P10
Y23
PCIE_GTX_CRX_N10
Y24
PCIE_GTX_CRX_P9
AB27
PCIE_GTX_CRX_N9
AB26
PCIE_GTX_CRX_P8
Y27
PCIE_GTX_CRX_N8
Y26
PCIE_GTX_CRX_P7
W24
PCIE_GTX_CRX_N7
W23
PCIE_GTX_CRX_P6
V27
PCIE_GTX_CRX_N6
U26
PCIE_GTX_CRX_P5
U24
PCIE_GTX_CRX_N5
U23
PCIE_GTX_CRX_P4
T26
PCIE_GTX_CRX_N4
T27
PCIE_GTX_CRX_P3
T24
PCIE_GTX_CRX_N3
T23
PCIE_GTX_CRX_P2
P27
PCIE_GTX_CRX_N2
P26
PCIE_GTX_CRX_P1
P24
PCIE_GTX_CRX_N1
P23
PCIE_GTX_CRX_P0
M27
PCIE_GTX_CRX_N0
N26
Y22 AA22
RV1 1.27K_0402_1%RV1 1.27K_0402_1%
1 2
RV2 2K_0402_1%RV2 2K_0402_1%
1 2
Close to UV1
CV1 0.1U_0402_16V7KCV1 0.1U_0402_16V7K
1 2
CV2 0.1U_0402_16V7KCV2 0.1U_0402_16V7K
1 2
CV3 0.1U_0402_16V7KCV3 0.1U_0402_16V7K
1 2
CV4 0.1U_0402_16V7KCV4 0.1U_0402_16V7K
1 2
CV5 0.1U_0402_16V7KCV5 0.1U_0402_16V7K
1 2
CV6 0.1U_0402_16V7KCV6 0.1U_0402_16V7K
1 2
CV7 0.1U_0402_16V7KCV7 0.1U_0402_16V7K
1 2
CV8 0.1U_0402_16V7KCV8 0.1U_0402_16V7K
1 2
CV9 0.1U_0402_16V7KCV9 0.1U_0402_16V7K
1 2
CV10 0.1U_0402_16V7KCV10 0.1U_0402_16V7K
1 2
CV11 0.1U_0402_16V7KCV11 0.1U_0402_16V7K
1 2
CV12 0.1U_0402_16V7KCV12 0.1U_0402_16V7K
1 2
CV13 0.1U_0402_16V7KCV13 0.1U_0402_16V7K
1 2
CV14 0.1U_0402_16V7KCV14 0.1U_0402_16V7K
1 2
CV15 0.1U_0402_16V7KCV15 0.1U_0402_16V7K
1 2
CV16 0.1U_0402_16V7KCV16 0.1U_0402_16V7K
1 2
CV17 0.1U_0402_16V7KCV17 0.1U_0402_16V7K
1 2
CV18 0.1U_0402_16V7KCV18 0.1U_0402_16V7K
1 2
CV19 0.1U_0402_16V7KCV19 0.1U_0402_16V7K
1 2
CV20 0.1U_0402_16V7KCV20 0.1U_0402_16V7K
1 2
CV21 0.1U_0402_16V7KCV21 0.1U_0402_16V7K
1 2
CV22 0.1U_0402_16V7KCV22 0.1U_0402_16V7K
1 2
CV23 0.1U_0402_16V7KCV23 0.1U_0402_16V7K
1 2
CV24 0.1U_0402_16V7KCV24 0.1U_0402_16V7K
1 2
CV25 0.1U_0402_16V7KCV25 0.1U_0402_16V7K
1 2
CV26 0.1U_0402_16V7KCV26 0.1U_0402_16V7K
1 2
CV27 0.1U_0402_16V7KCV27 0.1U_0402_16V7K
1 2
CV28 0.1U_0402_16V7KCV28 0.1U_0402_16V7K
1 2
CV29 0.1U_0402_16V7KCV29 0.1U_0402_16V7K
1 2
CV30 0.1U_0402_16V7KCV30 0.1U_0402_16V7K
1 2
CV31 0.1U_0402_16V7KCV31 0.1U_0402_16V7K
1 2
CV32 0.1U_0402_16V7KCV32 0.1U_0402_16V7K
1 2
+1.0VS
PCIE_GTX_C_CRX_P15 PCIE_GTX_C_CRX_N15
PCIE_GTX_C_CRX_P14 PCIE_GTX_C_CRX_N14
PCIE_GTX_C_CRX_P13 PCIE_GTX_C_CRX_N13
PCIE_GTX_C_CRX_P12 PCIE_GTX_C_CRX_N12
PCIE_GTX_C_CRX_P11 PCIE_GTX_C_CRX_N11
PCIE_GTX_C_CRX_P10 PCIE_GTX_C_CRX_N10
PCIE_GTX_C_CRX_P9 PCIE_GTX_C_CRX_N9
PCIE_GTX_C_CRX_P8 PCIE_GTX_C_CRX_N8
PCIE_GTX_C_CRX_P7 PCIE_GTX_C_CRX_N7
PCIE_GTX_C_CRX_P6 PCIE_GTX_C_CRX_N6
PCIE_GTX_C_CRX_P5 PCIE_GTX_C_CRX_N5
PCIE_GTX_C_CRX_P4 PCIE_GTX_C_CRX_N4
PCIE_GTX_C_CRX_P3 PCIE_GTX_C_CRX_N3
PCIE_GTX_C_CRX_P2 PCIE_GTX_C_CRX_N2
PCIE_GTX_C_CRX_P1 PCIE_GTX_C_CRX_N1
PCIE_GTX_C_CRX_P0 PCIE_GTX_C_CRX_N0
A A
Security Classification
Security Classification
Security Classification
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2010/09/05 2011/09/05
3
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
1
of
13 52Tuesday, December 28, 2010
of
13 52Tuesday, December 28, 2010
of
13 52Tuesday, December 28, 2010
B
B
B
5
D D
+1.8VS
LV8
LV8
10U_0603_6.3V6M
10U_0603_6.3V6M
12
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.0VS
+3VS
VGA_EDID_CLK
12
RV139 4.7K_0402_5%RV139 4.7K_0402_5% RV140 4.7K_0402_5%RV140 4.7K_0402_5%
+3VS
C C
1 2
CLKREQ_PEG#24
B B
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
+1.0VS
A A
12
LV3
LV3
10U_0603_6.3V6M
10U_0603_6.3V6M
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
LV5
LV5
10U_0603_6.3V6M
10U_0603_6.3V6M
12
12 12 12 12
12 12 12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV40
CV40
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 CV43
CV43
2
RV3010K_0402_5%@ RV3010K_0402_5%@ RV13110K_0402_5%@ RV13110K_0402_5%@ RV3210K_0402_5% RV3210K_0402_5% RV3310K_0402_5%@ RV3310K_0402_5%@
RV3510K_0402_5%@ RV3510K_0402_5%@ RV3110K_0402_5%@ RV3110K_0402_5%@ RV14210K_0402_5%@ RV14210K_0402_5%@
RV1710K_0402_5% RV1710K_0402_5%
1
CV41
CV41
2
1
CV44
CV44
2
5
VGA_EDID_DATA
VGA_PWRSEL0 VGA_PWRSEL1 THERM#_VGA CLKREQ_PEG#_R
GENERIC_C GPU_SMB_DA2 GPU_SMB_CK2
VGA_ENBKL
1
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV54
CV54
2
LV10
LV10
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
@
@
1 2 RV27 0_0402_5%
RV27 0_0402_5%
+DPLL_PVDD
1
CV42
CV42 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+DPLL_VDDC
CV45
CV45
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.8VS
LV7
LV7
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
VGA_EDID_CLK21 VGA_EDID_DATA21
ROMSE_GPIO2220
27M_CLK21
VRAM_ID220 VRAM_ID120 VRAM_ID020
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV55
CV55
CV53
CV53
2
2
0.1U_0402_16V4Z
CV6110U_0603_6.3V6M CV6110U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV60
CV60
2
0.1U_0402_16V4Z
1
2
LCD
GPU_GPIO020 GPU_GPIO120
GPU_GPIO220 GPU_SMB_DA220 GPU_SMB_CK220
VGA_ENBKL38
SOUT_GPIO820
SIN_GPIO920
GPU_GPIO1120
GPU_GPIO1220
GPU_GPIO1320 VGA_PWRSEL050
27M_SSC21
THERM#_VGA20
VGA_PWRSEL150
+1.8VS
RV20
RV20
499_0402_1%
499_0402_1%
RV21
RV21
249_0402_1%
249_0402_1%
47.5_0402_1%
47.5_0402_1% RV28
RV28
Check voltage level
GPU_THERMAL_D+20 GPU_THERMAL_D-20
0.1U_0402_16V4Z
0.1U_0402_16V4Z
12
1
1
CV51
CV51
CV50
CV50
2
2
1
CV59
CV59
2
VGA_EDID_CLK VGA_EDID_DATA
GPU_SMB_DA2 GPU_SMB_CK2
VGA_ENBKL
VGA_PWRSEL0 THERM#_VGA
VGA_PWRSEL1
CLKREQ_PEG#_R
12
12
12
RV29
RV29
100_0402_1%
100_0402_1%
1
CV52
CV52 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
+DPC_VDD18
+DPC_VDD18
+DPC_VDD10
+VGA_VREF
1
CV49
CV49
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
XTALIN
12
+TSVDD
4
TV15TV15
TV11TV11
TV14TV14 TV9TV9 TV12TV12 TV13TV13 TV10TV10 TV16TV16
GENERIC_C
TV17TV17
+DPLL_PVDD
+DPLL_VDDC
4
UV1B
UV1B
M93-S3/M92-S2
M93-S3/M92-S2
AE9
DVCNTL_0/ DVPDATA_18
L9
DVCNTL_1 / NC
N9
DVCNTL_2 / TESTEN#2
AE8
DVDATA_12 / DVPDATA_16
AD9
DVDATA_11 / DVPDATA_20
AC10
DVDATA_10 / DVPDATA_22
AD7
DVDATA_9 / DVPDATA_12
AC8
DVDATA_8 / DVPDATA_14
AC7
DVDATA_7 / DVPCNTL_0
AB9
DVDATA_6 / DVPDATA_8
AB8
DVDATA_5 / DVPDATA_6
AB7
DVDATA_4 DVPDATA_4
AB4
DVDATA_3 / DVPDATA_19
AB2
DVDATA_2 / DVPDATA_21
Y8
DVDATA_1 / DVPDATA_2
Y7
DVDATA_0 / DVPDATA_0
DVO
DVO
M93-S3/M92-S2
M93-S3/M92-S2
W6
DPC_PVDD / DVPDATA_11
V6
DPC_PVSS / GND
AC6
DPC_VDD18#1/DVPDAT10
AC5
DPC_VDD18#2/DVPDAT23
AA5
DPC_VDD10#1/DVPDAT15
AA6
DPC_VDD10#2/DVPDAT17
U1
DPC_VSSR#1 / DVPCLK
W1
DPC_VSSR#2 / DVPDAT5
U3
DPC_VSSR#3 / GND
Y6
DPC_VSSR#4 / GND
AA1
DPC_VSSR#5/ DVPCNTL_MV0
R1
SCL
R3
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
U6
GPIO_0
U10
GPIO_1
T10
GPIO_2
U8
GPIO_3_SMBDATA
U7
GPIO_4_SMBCLK
T9
GPIO_5_AC_BATT
T8
GPIO_6
T7
GPIO_7_BLON
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
GPIO_11
N5
GPIO_12
N3
GPIO_13
Y9
GPIO_14_HPD2
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16_SSIN
R6
GPIO_17_THERMAL_INT
W10
GPIO_18_HPD3
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21_BB_EN
N8
GPIO_22_ROMCSB
N7
GPIO_23_CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
AF24
TESTEN
AB13
GENERICA
W8
GENERICB
W9
GENERICC
W7
GENERICD
AD10
GENERICE_HPD4
AC14
HPD1
AC16
VREFG
PLL/CLOCK
PLL/CLOCK
AF14
DPLL_PVDD
AE14
DPLL_PVSS
AD14
DPLL_VDDC
AM28
XTALIN
AK28
XTALOUT
AC22
NC#2/XO_IN
AB22
NC#1/XO_IN2
T4
DPLUS
T2
DMINUS
R5
TS_FDO
AD17
TSVDD
AC17
TSVSS
PARKR1@
PARKR1@
I2C
I2C
75mA
125mA
THERMAL
THERMAL
20mA
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
DPA
DPA
TX0M_DPA2N TX1P_DPA1P
TX1M_DPA1N TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P TX3M_DPB2N
DPB
DPB
TX4P_DPB1P TX4M_DPB1N
TX5P_DPB0P TX5M_DPB0N
M92-S2/M93-S3
M92-S2/M93-S3
DVPDATA_3/TXCCP_DPC3P DVPCNTL_2/TXCCM_DPC3N
DVPDATA_7 / TX0P_DPC2P
DVPDATA_1 / TX0M_DPC2N
DVPCNTL_MV1 / TX1P_DPC1P
DVPDATA_9 / TX1M_DPC1N
DVPDATA_13 / TX2P_DPC0P
DVPCNTL_1 / TX2M_DPC0N
VDDR4 / DPCD_CALR
DPC
DPC
DAC1
DAC1
HSYNC VSYNC
RSET
AVDD
AVSSQ VDD1DI
VSS1DI
M92-S2/M93-S3
M92-S2/M93-S3
R2 / NC
R2B / NC
G2 / NC
G2B / NC
B2 / NC
B2B / NC
C / NC
DAC2
DAC2
Y / NC
COMP / NC
H2SYNC V2SYNC
VDD2DI / NC
VSS2DI / NC
A2VDD / NC
A2VDDQ / NC
A2VSSQ
R2SET / NC
M92-S2/M93-S3M92-S2/M93-S3
M92-S2/M93-S3M92-S2/M93-S3
DDC1CLK
DDC1DATA
AUX1P
DDC/AUX
DDC/AUX
216-0774009-A11PARK_FCBGA631
216-0774009-A11PARK_FCBGA631
AUX1N
DDC2CLK
DDC2DATA
AUX2P AUX2N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
NC/DDCCLK_AUX3P
NC/DDCDATA_AUX3N
3
AF2 AF4
AG3 AG5
AH3 AH1
AK3 AK1
AK5 AM3
AK6 AM5
AJ7 AH6
AK8 AL7
V4 U5
W3 V2
Y4 W5
AA3 Y2
RV16
RV16
AA12
1 2
150_0402_1%
150_0402_1%
RB/GB/BB: Grounded right away. MUST not be connected to AVSSQ.
AM26
R
AK26
RB
AL25
G
AJ25
GB
AH24
B
AG25
BB
AH26 AJ27
AD22 AG24
AE22 AE23
AD23
AM12 AK12
AL11 AJ11
AK10 AL9
AH12 AM10 AJ9
AL13 AJ13
AD19 AC19
AE20 AE17 AE19
AG13
AE6 AE5
AD2 AD4
AC11 AC13
AD13 AD11
AE16 AD16
AC1 AC3
AD20 AC20
VGA_CRT_R
VGA_CRT_G
VGA_CRT_B
RESET +AVDD_VGA
1 2
RV18 499_0402_1%RV18 499_0402_1%
+AVDD_VGA
+VDD1DI
R2SET
1 2
RV22 715_0402_1%RV22 715_0402_1%
VGA_CRT_CLK VGA_CRT_DATA
VGA_CRT_R 22
VGA_CRT_G 22
VGA_CRT_B 22
VGA_CRT_HSYNC 20,22 VGA_CRT_VSYNC 20,22
HSYNC_DAC2 20 VSYNC_DAC2 20
+VDD1DI
+A2VDD +A2VDDQ
VGA_CRT_CLK 22 VGA_CRT_DATA 22
1 2
LV12 0_0603_5%LV12 0_0603_5%
CRT
+3VS
CRT
Follow HB uses DDC1 for CRT
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Compal Secret Data
Compal Secret Data
Compal Secret Data
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
Deciphered Date
Deciphered Date
Deciphered Date
2
VGA_CRT_R VGA_CRT_G VGA_CRT_B
CV33
CV33
+VDD1DI
CV36
CV36
+A2VDDQ
VGA_CRT_CLK VGA_CRT_DATA
1 2
RV11 150_0402_1%RV11 150_0402_1%
1 2
RV12 150_0402_1%RV12 150_0402_1%
1 2
RV13 150_0402_1%RV13 150_0402_1%
70mA
1
1
CV35
CV35
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
45mA
1
1
CV37
CV37
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
CV47
CV47
2
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
RV134 4.7K_0402_5%RV134 4.7K_0402_5% RV135 4.7K_0402_5%RV135 4.7K_0402_5%
2mA
1
2
1
CV4610U_0603_6.3V6M CV4610U_0603_6.3V6M
2
1
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
+1.8VS
LV1
LV1
1
CV34
CV34
10U_0603_6.3V6M
10U_0603_6.3V6M 2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
+1.8VS
LV2
LV2
CV38
CV38 10U_0603_6.3V6M
10U_0603_6.3V6M
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
+1.8VS
LV6
LV6
CV48
CV48 1U_0402_6.3V4Z
1U_0402_6.3V4Z
12 12
+3VS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
4019AP
4019AP
4019AP
1
B
B
B
of
14 52Tuesday, December 28, 2010
of
14 52Tuesday, December 28, 2010
of
14 52Tuesday, December 28, 2010
5
UV1F
UV1F
LVDS CONTROL
LVDS CONTROL
D D
TXCLK_UP_DPF3P TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P TXOUT_U3N
LVTMDP
LVTMDP
TXCLK_LP_DPE3P TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N
C C
216-0774009-A11PARK_FCBGA631
216-0774009-A11PARK_FCBGA631 PARKR1@
PARKR1@
TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N
TXOUT_L3P TXOUT_L3N
VARY_BL
DIGON
AB11 AB12
AH20 AJ19
AL21 AK20
AH22 AJ21
AL23 AK22
AK24 AJ23
AL15 AK14
AH16 AJ15
AL17 AK16
AH18 AJ17
AL19 AK18
VGA_PWM 21 VGA_ENVDD 21
VGA_TXCLK+ 21 VGA_TXCLK- 21
VGA_TXOUT0+ 21 VGA_TXOUT0- 21
VGA_TXOUT1+ 21 VGA_TXOUT1- 21
VGA_TXOUT2+ 21 VGA_TXOUT2- 21
Single channel
4
+1.8VS
LV15
LV15
10U_0603_6.3V6M
10U_0603_6.3V6M
LV32
LV32
12
1
CV89
CV89
2
10U_0603_6.3V6M
10U_0603_6.3V6M
12
1
CV165
CV165
2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.0VS
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
3
1
CV99
CV99
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV166
CV166
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+1.8VS_DPEF
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
+1.0VS_DPEF
CV73
CV73
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
CV164
CV164
2
+1.8VS_DPEF
+1.0VS_DPEF
AG15 AG16
AG20 AG21
AG14 AH14 AM14 AM16 AM18
AF16 AG17
AF22 AG22
AF23 AG23 AM20 AM22 AM24
UV1G
UV1G
220mA
DPE_VDD18#1 DPE_VDD18#2
120mA
DPE_VDD10#1 DPE_VDD10#2
DPE_VSSR#1 DPE_VSSR#2 DPE_VSSR#3 DPE_VSSR#4 DPE_VSSR#5
200mA
DPF_VDD18#1 DPF_VDD18#2
120mA
DPF_VDD10#1 DPF_VDD10#2
DPF_VSSR#1 DPF_VSSR#2 DPF_VSSR#3 DPF_VSSR#4 DPF_VSSR#5
2
DP A/B POWERDP E/F POWER
DP A/B POWERDP E/F POWER
DPA_VDD18#1 DPA_VDD18#2
DPA_VDD10#1 DPA_VDD10#2
DPA_VSSR#1 DPA_VSSR#2 DPA_VSSR#3 DPA_VSSR#4 DPA_VSSR#5
DPB_VDD18#1 DPB_VDD18#2
DPB_VDD10#1 DPB_VDD10#2
DPB_VSSR#1 DPB_VSSR#2 DPB_VSSR#3 DPB_VSSR#4 DPB_VSSR#5
130mA
110mA
130mA
110mA
AE11 AF11
AF6 AF7
AE1 AE3 AG1 AG6 AH5
AE13 AF13
AF8 AF9
AF10 AG9 AH8 AM6 AM8
+1.8VS_DPAB
+1.0VS_DPAB
+1.8VS_DPAB
+1.0VS_DPAB
LV18
LV18
1 2
0_0603_5%
0_0603_5%
LV19
LV19
1 2
0_0603_5%
0_0603_5%
1
+1.8VS
+1.0VS
RV15
RV14
RV14
1 2
150_0402_1%
150_0402_1%
+1.8VS_DPEF
B B
A A
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
5
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.8VS_DPEF
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
3
AF17
DPEF_CALR
20mA
AG18
DPE_PVDD
AF19
DPE_PVSS
20mA
AG19
DPF_PVDD
AF20
DPF_PVSS
216-0774009-A11PARK_FCBGA631
216-0774009-A11PARK_FCBGA631 PARKR1@
PARKR1@
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
DP PLL POWER
DP PLL POWER
DPAB_CALR
20mA
DPA_PVDD DPA_PVSS
20mA
DPB_PVDD DPB_PVSS
2
RV15
AE10
1 2
150_0402_1%
150_0402_1%
AG8 AG7
AG10 AG11
+1.8VS_DPAB
+1.8VS_DPAB
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
1
B
B
B
of
15 52Tuesday, December 28, 2010
of
15 52Tuesday, December 28, 2010
of
15 52Tuesday, December 28, 2010
5
+1.5VS
10U_0603_6.3V6M
10U_0603_6.3V6M
1
2
+
+
CV78
CV78
390U_2.5V_M_R10
390U_2.5V_M_R10
D D
C C
LV30
LV30
+1.8VS
B B
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
2
1
10U_0603_6.3V6M
10U_0603_6.3V6M
+1.8VS
+1.0VS
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV276
CV276
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
CV91
CV91
1
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
2
CV83
CV83
CV87
CV87
1
1
10U_0603_6.3V6M
10U_0603_6.3V6M
LV22
LV22
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+3VS
+1.8VS
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
CV309
CV309
CV303
CV303
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
2
12
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
LV28
LV28
1
2
1
CV274
CV274
CV275
CV275
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
2
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV162
CV162
1
LV24
LV24
12
1
CV308
CV308
CV302
CV302 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K 1
2
CV119
CV119
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
12
+MPV18
4
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV102
CV102
CV273
CV273
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
CV123
CV123
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV158
CV158
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
CV172
CV172
2
10U_0603_6.3V6M
10U_0603_6.3V6M
2
CV98
CV98
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV131
CV131
CV127
CV127
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV152
CV152
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1
CV173
CV173 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z 1
CV189
CV189
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV97
CV97
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
1
CV148
CV148
1 CV190
CV190
2
2
2
CV96
CV96
CV95
CV95
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
+VDD_CT
CV135
CV135
+VDDR4
+PCIE_VDDR
+MPV18
+SPV18 +SPV10
2
CV191
CV191
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z +VGA_CORE
1.2A
17mA
75mA 75mA
120mA
3
UV1D
UV1D
MEM I/O
MEM I/O
H13
VDDR1#1
H16
VDDR1#2
H19
VDDR1#3
J10
VDDR1#4
J23
VDDR1#5
J24
VDDR1#6
J9
VDDR1#7
K10
VDDR1#8
K23
VDDR1#9
K24
VDDR1#10
K9
VDDR1#11
L11
VDDR1#12
L12
VDDR1#13
L13
VDDR1#14
L20
VDDR1#15
L21
VDDR1#16
L22
VDDR1#17
LEVEL
LEVEL TRANSLATION
TRANSLATION
AA20
VDD_CT#1
AA21
VDD_CT#2
AB20
VDD_CT#3
AB21
VDD_CT#4
M93-S3/M92-S2
M93-S3/M92-S2
AA17
VDDR3#1
AA18 AB17 AB18
AA11
AM30
M11 M12
V12 Y12 U12
Y11 V11
U11
L17 L16
L8
H7 H8
J7
I/O
I/O
VDDR3#2 VDDR3#3 VDDR3#4
VDDR4#1 / VDDR5 VDDR4#2 VDDR4#3 / VDDR5
NC#1 / VDDR4 DVCLK / VDDR4
NC#3 / VDDR5 TESTEN#2 / VDDR5
MEM CLK
MEM CLK
VDDRHA VSSRHA
PLL
PLL
PCIE_PVDD
MPV18
SPV18 SPV10 SPVSS
BACK BIAS
BACK BIAS
BBP#1 BBP#2
216-0774009-A11PARK_FCBGA631
216-0774009-A11PARK_FCBGA631
PARKR1@
PARKR1@
PCIE
PCIE
PCIE_VDDR#1 PCIE_VDDR#2 PCIE_VDDR#3 PCIE_VDDR#4 PCIE_VDDR#5 PCIE_VDDR#6 PCIE_VDDR#7 PCIE_VDDR#8
PCIE_VDDC#1 PCIE_VDDC#2 PCIE_VDDC#3 PCIE_VDDC#4 PCIE_VDDC#5 PCIE_VDDC#6 PCIE_VDDC#7 PCIE_VDDC#8
PCIE_VDDC#9 PCIE_VDDC#10 PCIE_VDDC#11 PCIE_VDDC#12
VDDC#1
CORE
CORE
VDDC#2 VDDC#3
POWER
POWER
VDDC#4 VDDC#5 VDDC#6 VDDC#7 VDDC#8
VDDC#9 VDDC#10 VDDC#11 VDDC#12 VDDC#13 VDDC#14 VDDC#15 VDDC#16 VDDC#17 VDDC#18 VDDC#20 VDDC#21 VDDC#22
VDDC#23 /BIF_VDDC
VDDC#19/BIF_VDDC
ISOLATED
ISOLATED CORE I/O
CORE I/O
VDDCI#1 VDDCI#2 VDDCI#3 VDDCI#4 VDDCI#5 VDDCI#6 VDDCI#7 VDDCI#8
500mA
AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26
L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22
AA15 N15 N17 R13 R16 R18 Y21 T12 T15 T17 T20 U13 U16 U18 V21 V15 V17 V20 Y13 Y16 Y18 R21 U21
M13 M15 M16 M17 M18 M20 M21 N20
2A
13A
+PCIE_VDDR
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV104
CV104
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
CV153
CV153
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
CV140
CV140
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z 2
CV272
CV272
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
CV101
CV101
CV105
CV105
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV108
CV108
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV122
CV122
CV121
CV121
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV143
CV143
CV141
CV141
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CV201
CV201
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV82
CV82
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
CV111
CV111
1
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV125
CV125
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV144
CV144
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
+
+
CV114
CV114 390U_2.5V_M_R10
390U_2.5V_M_R10
2
2
CV197
CV197
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV86
CV86
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV112
CV112
1
2
CV126
CV126
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV145
CV145
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV198
CV198
2
2
CV90
CV90
1
10U_0603_6.3V6M
10U_0603_6.3V6M
2
CV113
CV113
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV129
CV129
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV167
CV167
1
1
+
+
CV116
CV116 390U_2.5V_M_R10
390U_2.5V_M_R10
2
1
CV199
CV199
2
10U_0603_6.3V6M
10U_0603_6.3V6M
1 2
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
2
CV77
CV77
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV118
CV118
CV115
CV115
1
2
CV130
CV130
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV163
CV163
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
10U_0603_6.3V6M
10U_0603_6.3V6M
+VGA_CORE
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
CV200
CV200
2
2
LV21
LV21
+1.0VS
2
CV100
CV100
1
10U_0603_6.3V6M
10U_0603_6.3V6M
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
2
CV133
CV133
1
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
1
1
CV281
CV281
2
2
10U_0603_6.3V6M
10U_0603_6.3V6M
2
2
CV132
CV132
1
1
CV271
CV271
1
+1.8VS
2
CV134
CV134
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
CV279
CV279
2
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
CV136
CV136
1
10U_0603_6.3V6M
10U_0603_6.3V6M
+VGA_CORE
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
CV138
CV138
CV137
CV137
1
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K 1
CV280
CV280
CV278
CV278
2
10U_0603_6.3V6M
10U_0603_6.3V6M
2
CV139
CV139
CV142
CV142
1
LV31
+1.8VS
A A
LV31
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
10U_0603_6.3V6M
10U_0603_6.3V6M
5
0.1U_0402_16V4Z
0.1U_0402_16V4Z 1
1
CV277
CV277
2
2
CV305
CV305
+SPV18
1
CV306
CV306 1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
Security Classification
Security Classification
Security Classification
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
3
2010/09/05 2011/09/05
2010/09/05 2011/09/05
2010/09/05 2011/09/05
Compal Secret Data
Compal Secret Data
Compal Secret Data
Deciphered Date
Deciphered Date
Deciphered Date
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
Compal Electronics, Inc.
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
SCHEMATICS,MB A6847
4019AP
4019AP
4019AP
16 52Tuesday, December 28, 2010
16 52Tuesday, December 28, 2010
16 52Tuesday, December 28, 2010
1
B
B
B
of
of
of
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