Page 1

0.1
0.1
0.1
1 45Wednesday, February 25, 2009
1 45Wednesday, February 25, 2009
1 45Wednesday, February 25, 2009
E
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
D
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
E
LA-4971P
LA-4971P
LA-4971P
Cover Sheet
Cover Sheet
Cover Sheet
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
C
Security Classification
Security Classification
Security Classification
B
Liverpool 10AR/10ARG
Mobile AMD S1G2 S1G3/
RS780MN & RS780MC & RX781 & RS880 /
SB700 & SB710
2009-02-09 Rev. 0.3
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
KSWAE LA-4971P Schematics Document
Compal confidential
A
1 1
2 2
3 3
4 4
A
Page 2

0.1
0.1
0.1
2 45Wednesday, February 25, 2009
2 45Wednesday, February 25, 2009
2 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
Block Diagram
Block Diagram
Block Diagram
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
V o l u m e C o n t r o l
V o l u m e C o n t r o l
V o l u m e C o n t r o lV o l u m e C o n t r o l
page 31
page 29
3IN1
E
3IN1
page 32
page 4
F a n C o n t r o lF a n C o n t r o l
F a n C o n t r o l
1 6 X 1 6
1 6 X 1 6
1 6 X 1 61 6 X 1 6
2 0 0 p i n D D R I I - S O - D I M M X 2
2 0 0 p i n D D R I I - S O - D I M M X 22 0 0 p i n D D R I I - S O - D I M M X 2
2 0 0 p i n D D R I I - S O - D I M M X 2
A T I
A T IA T I
A T I
page 8,9
1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z
D u a l C h a n n e l
M e m o r y B U S ( D D R I I )
D u a l C h a n n e lD u a l C h a n n e l
M e m o r y B U S ( D D R I I )M e m o r y B U S ( D D R I I )
1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z
M e m o r y B U S ( D D R I I )
D u a l C h a n n e l
1 . 8 V D D R I I 6 6 7 / 8 0 0 M H Z
BANK 0, 1, 2, 3
RS780MN
RS780MC
RX781
RS880
APL5607KI-TRG
page 6
D
T h e r m a l S e n s o r
T h e r m a l S e n s o r F a n C o n t r o l
T h e r m a l S e n s o rT h e r m a l S e n s o r
ADM1032ARMZ
page 4,5,6,7
A M D S 1 G 2 C P U
A M D S 1 G 2 C P U
A M D S 1 G 2 C P UA M D S 1 G 2 C P U
C
uFCPGA-638 Package
B l u e t o o t h
B l u e t o o t hB l u e t o o t h
B l u e t o o t h
USBPort 6
page 32
I n t . C a m e r a
I n t . C a m e r aI n t . C a m e r a
I n t . C a m e r a
USBPort 9
page 32
R i g h t U S B C o n n
R i g h t U S B C o n n
R i g h t U S B C o n nR i g h t U S B C o n n
USB Port 0,1
A T I
A T IA T I
A T I
page 10,11,12,13,14
USB 5x
SB700
SB710
R T S 5 1 5 9 E
R T S 5 1 5 9 E
R T S 5 1 5 9 ER T S 5 1 5 9 E
F i n g e r P r i n t e r
F i n g e r P r i n t e rF i n g e r P r i n t e r
F i n g e r P r i n t e r
W L A N
W L A N
W L A NW L A N
5V 480MHz
page 29
USBPort 4
page 27
USBPort 7
S A T A H D D 1
S A T A H D D 1S A T A H D D 1
S A T A H D D 1
page 27
USBPort 8
page 25
page 25
S A T A O D D
S A T A O D DS A T A O D D
S A T A O D D
SATA port 3
SATA port 0
SATA
SATA
5V 1.5GHz(150MB/s)
page 20,21,22,23,24
H D A C o d e c
H D A C o d e cH D A C o d e c
H D A C o d e c
5V 1.5GHz(150MB/s)
3.3V 24.576MHz/48Mhz
M D C 1 . 5
M D C 1 . 5 M D C 1 . 5
M D C 1 . 5
HD Audio
page 30
ALC272
page 33
S P I R O M
S P I R O M
S P I R O MS P I R O M
page 31
H P C O N N
H P C O N NH P C O N N
H P C O N N
page 31
I n t . M I C
I n t . M I C
I n t . M I C I n t . M I C
page 31
M I C C O N N
M I C C O N N
M I C C O N NM I C C O N N
A M P L I F I E R
A M P L I F I E R
A M P L I F I E RA M P L I F I E R
TPA6017
R J 1 1
R J 1 1R J 1 1
R J 1 1
page 33
page 33
page 31
S P K C O N N
S P K C O N NS P K C O N N
S P K C O N N
page 31
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Secret Data
Compal Secret Data
Compal Secret Data
A - L i n k E x p r e s s I I
4 X P C I - E
A - L i n k E x p r e s s I IA - L i n k E x p r e s s I I
4 X P C I - E
A - L i n k E x p r e s s I I
4 X P C I - E4 X P C I - E
I n t . K B D
I n t . K B DI n t . K B D
I n t . K B D
T o u c h P a d
T o u c h P a d
T o u c h P a dT o u c h P a d
G s e n s o r
G s e n s o r
G s e n s o rG s e n s o r
page 35
page 35
page 33
page 35
page 35
page 36
C a r d B u s C o n t r o l l e r
C a r d B u s C o n t r o l l e rC a r d B u s C o n t r o l l e r
C a r d B u s C o n t r o l l e r
3.3V 33 MHz
LPC BUS
page 28
OZ601
U S B / B
U S B / BU S B / B
U S B / B
page 32
page 15
P o w e r / B
P o w e r / BP o w e r / B
P o w e r / B
page 34
E N E K B 9 2 6 D 2
E N E K B 9 2 6 D 2E N E K B 9 2 6 D 2
E N E K B 9 2 6 D 2
page 33
D e b u g P o r t
D e b u g P o r tD e b u g P o r t
D e b u g P o r t
S W / B
S W / B
S W / BS W / B
page 35
page 37
5V 480MHzUSB
H y p e r T r a n s p o r t L i n k 2 . 6 G H z
H y p e r T r a n s p o r t L i n k 2 . 6 G H zH y p e r T r a n s p o r t L i n k 2 . 6 G H z
H y p e r T r a n s p o r t L i n k 2 . 6 G H z
N E W C a r d
N E W C a r dN E W C a r d
N E W C a r d
P C I e M i n i C a r d W L A N
P C I e M i n i C a r d W L A N
P C I e M i n i C a r d W L A NP C I e M i n i C a r d W L A N
page 27
USB port 11
PCIe port 0
page 27
PCIe Port 2
page 26
Page 19
A T I M 9 2 / 9 6
A T I M 9 2 / 9 6A T I M 9 2 / 9 6
A T I M 9 2 / 9 6
with VRAM
V G A M X M C o n n
V G A M X M C o n n
B
A
V G A M X M C o n nV G A M X M C o n n
C R T
C R T
C R T C R T
page 16
L C D C o n n .
L C D C o n n .
L C D C o n n .L C D C o n n .
page 17
H D M I C o n n .
H D M I C o n n .H D M I C o n n .
H D M I C o n n .
H D M I C E C C o n t r o l l e r
H D M I C E C C o n t r o l l e rH D M I C E C C o n t r o l l e r
H D M I C E C C o n t r o l l e r
1.5V 2.5GHz(250MB/s)
page 18
PCIe 4x
page 18
R5F211A4SP
5V 480MHzUSB
3.3V 33 MHz
page 25
USB port 2
SATA port 2
page 26
PCI BUS
SATA 5V 1.5GHz(150MB/s)
e S A T A
e S A T A
e S A T Ae S A T A
R J 4 5
R J 4 5R J 4 5
R J 4 5
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
M o d e l N a m e : K S W A E
F i l e N a m e : L A - 4 9 7 1 P
G r i f f i n P l a t f o r m
M o d e l N a m e : K S W A E
M o d e l N a m e : K S W A EM o d e l N a m e : K S W A E
F i l e N a m e : L A - 4 9 7 1 PF i l e N a m e : L A - 4 9 7 1 P
F i l e N a m e : L A - 4 9 7 1 P
G r i f f i n P l a t f o r m
Compal Confidential
G r i f f i n P l a t f o r mG r i f f i n P l a t f o r m
1 1
EC SMBUS
R T L 8 1 0 3 E L L A N 1 0 / 1 0 0 M
R T L 8 1 0 3 E L L A N 1 0 / 1 0 0 MR T L 8 1 0 3 E L L A N 1 0 / 1 0 0 M
R T L 8 1 0 3 E L L A N 1 0 / 1 0 0 M
PCIe port 3
2 2
3 3
C l o c k G e n e r a t o r
C l o c k G e n e r a t o rC l o c k G e n e r a t o r
C l o c k G e n e r a t o r
SLG8SP626VTR
P o w e r O n / O f f C K T .
R T C C K T .
R T C C K T .
R T C C K T .R T C C K T .
P o w e r O n / O f f C K T .P o w e r O n / O f f C K T .
P o w e r O n / O f f C K T .
D C / D C I n t e r f a c e C K T .
D C / D C I n t e r f a c e C K T .D C / D C I n t e r f a c e C K T .
D C / D C I n t e r f a c e C K T .
page 37,38,39,40
41,42,43,44
P o w e r C i r c u i t D C / D C
P o w e r C i r c u i t D C / D CP o w e r C i r c u i t D C / D C
P o w e r C i r c u i t D C / D C
4 4
Page 3

0.1
0.1
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3 45Wednesday, February 25, 2009
3 45Wednesday, February 25, 2009
Notes List
Notes List
Notes List
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
LA-4971P
LA-4971P
LA-4971P
3 45Wednesday, February 25, 2009
E
Date: Sheet of
Date: Sheet of
Date: Sheet of
CARD@
RTS5159
First Second
G@ + G_1st@ G@ + G_2nd@
CHIPSET
PUMA@ TIGRIS@
MXM
Thermal
NEW
HDMI
DDC
LCD
DDC
WLAN
CLK
Sensor
CARD
ROM
ROM
GEN
V
V
V
Compal Electronics, Inc.
Compal Electronics, Inc.
V
Compal Electronics, Inc.
V
VV
MXM
RX781
S1G2
Comment
SB710
SB710
VGA
NA
NB
RS880M
RS880MC NA
S1G3
S1G3
SB710
MXM
MXMRS880M
RX881
S1G3
S1G3
3 in 1 card reader
G- sensor
CommentItem CPU SB
E
VGA
NB
SB700
SB700
NA
RS780MN
RS780MC NA
S1G2
S1G2
SB700
MXMRS780MN
S1G2
D
Platform
C
: Digital Ground
Symbol Note :
B
GM@
PM@+GPM@
GM@
PUMA@
: Analog Ground
Item CPU SB
GM@
PM@+PM1@ SB700
@ : just reserve , no build
GM@
Platform
PM@+GPM@
TIGRIS@
Layout Notes
L
DEBUG@ : reserve for debug.
DC-IN
WiFi
PM@+PM1@ SB710
UMA@: means for RS780M.
( H )
Half - size
WLAN@ WIMAX@
LVDS wireset
17inch@
SATA ODD
16" 17"
16inch@
SSD
RJ11
BLUE TOOTH
Express card / PCMCIA
Function
BTO (Build-To-Order) Option Table
SSD@
( S )
( R )
MDC@
( B )
BT@
( E / A )
EXPCARD@ / PCMCIA@
Description
BTO
Explain
HDMI
CAMERA & MIC
FingerPrinter
Function
Cost down
COMMON
(Y)
ATI VGA/B
AMD(UMA)
(X)
CAMERA MIC
( F )
Explain
Description
16inch_45@ 17inch_45@
LVDSSET@
H@
HDMI@
IHDMI@
CAM@ MIC@
FP@
BTO
I / II
SODIMM
V
SENSOR
CPU
THERMAL
CEC
EC_SMB_CK1
V
V
KB926
KB926
EC_SMB_DA2
EC_SMB_CK2
EC_SMB_DA1
RS780M
I2C_DATA
I2C_CLK
HDMI
BATTINVERTER
SOURCE
SMBUS Control Table
RS780M
RS780M
DDC_DATA0
DDC_CLK0
DDC_CLK1
SB700
SDA0
SCL0
DDC_DATA1
SCL1
SB700
SDA1
SB700
SCL2
SDA2
SB700
SCL3
SDA3
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
Voltage Rails
O : ON
X : OFF
+5VS
+3VS
1 1
+2.5VS+B+1.5VS
+1.8VS
power
plane
+VGA_CORE
+1.1VS
+1.8V+5VALW
+0.9V
+3VALW
+3VL
+1.2V_HT
+CPU_CORE_NB
+CPU_CORE_0
+0.9V
+3V_LAN
+1.2VALW
+5VL
+RTCVCC
State
+CPU_CORE_1
OO
O
O
O
O
O
O
O
S3
S1
S0
2 2
X
X X
X
X
O
O
S5 S4/AC
X X X
O
X
S5 S4/ Battery only
S5 S4/AC & Battery
don't exist
1 1 0 1 0 0 1 0
1 0 1 0 0 1 0 0A4
1 0 1 0 0 0 0 0
ADDRESS
HEX
I2C / SMBUS ADDRESSING
DEVICE
D2
A0
CLOCK GENERATOR (EXT.)
DDR SO-DIMM 1
DDR SO-DIMM 0
3 3
HEX
EC SM Bus1 address
Device Address
0001 011X b
0011 010X b
16H
Smart Battery
HDMI-CEC 34H
EC KB926D2
1001 100X b
1001 101X b
HEX Address
98H
9AH
EC SM Bus2 address
Device
ADI1032-1 CPU
ADI1032-2 VGA
4 4
Ext. VGA/B
CS/B
EC KB926D2
A
X
OO
Page 4

0.1
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4 45Wednesday, February 25, 2009
4 45Wednesday, February 25, 2009
4 45Wednesday, February 25, 2009
E
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
E
LA-4971P
LA-4971P
LA-4971P
AMD CPU S1G2 HT I/F
AMD CPU S1G2 HT I/F
AMD CPU S1G2 HT I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
< To EC >
D
FAN_SPEED1 34
C8
0.01U_0402_25V7K
C8
10K_0402_5%
10K_0402_5%
2
ACES_85204-0300N
ACES_85204-0300N
5
0.01U_0402_25V7K
1
@
@
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
12
+3VS
112233GND4GND
JFAN
JFAN
R12
R12
Deciphered Date
Deciphered Date
Deciphered Date
D
< VLDT_A & VLDT_B : HyperTransport I/O ring power >
C
C6
180P_0402_50V8J
C6
180P_0402_50V8J
1
2
+FAN1
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
C7
4.7U_0805_10V4Z
PUMA@C74.7U_0805_10V4Z
PUMA@
C7
10U_0805_10V6K
TIGRIS@ C7
10U_0805_10V6K
C5
180P_0402_50V8J
C5
180P_0402_50V8J
1
2
C4
0.22U_0603_16V4Z
C4
0.22U_0603_16V4Z
1
2
C3
0.22U_0603_16V4Z
C3
0.22U_0603_16V4Z
1
B
2
H_CADON[0..15] 10H_CADIN[0..15]10
H_CADOP[0..15] 10
H_CADOP[0..15]
H_CADON[0..15]
Near CPU SocketVLDT CAP.
C2
10U_0805_10V6K
TIGRIS@ C2
10U_0805_10V6K
TIGRIS@
C2
4.7U_0805_10V4Z
PUMA@C24.7U_0805_10V4Z
PUMA@
1
2
C1
10U_0805_10V6K
TIGRIS@ C1
10U_0805_10V6K
A
TIGRIS@
H_CADIN[0..15]
H_CADIP[0..15]
H_CADIP[0..15]10
1 2
+VLDT_B
AE4
AE3
AE2
VLDT_B1
VLDT_B0
HT LINK
HT LINK
VLDT_A1
VLDT_A0
JCPUA
JCPUA
D3
D2
D1
+1.2V_HT
VLDT=500mA
TIGRIS@
AE5
VLDT_B3
VLDT_B2
VLDT_A3
VLDT_A2
D4
H_CADON0
H_CADOP1
H_CADOP2
H_CADON1
H_CADOP0
AB1
AC2
AC3
AD1
AC1
L0_CADOUT_L1
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_H0
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
F1
E1
E3
E2
G3
H_CADIN1
H_CADIN0
H_CADIP2
H_CADIP1
H_CADIP0
H_CADON2
H_CADON3
H_CADOP4
H_CADON4
H_CADOP3
W2
W3
AA2
AA3
AA1
L0_CADOUT_L4
L0_CADOUT_L3
L0_CADOUT_L2
L0_CADOUT_H4
L0_CADOUT_H3
L0_CADOUT_H2
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
J1
K1
H1
G1
G2
H_CADIP3
H_CADIN2
H_CADIN3
H_CADIP4
H_CADIN4
H_CADON6
H_CADOP6
H_CADOP5
H_CADON5
H_CADOP7
T1
U2
U3
V1
U1
L0_CADOUT_L6
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_H5
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L1
L3
L2
N3
M1
H_CADIN5
H_CADIP5
H_CADIN6
H_CADIP6
H_CADIP7
< To NB >< From NB >
H_CADON9
H_CADOP8
H_CADON7
H_CADON8
H_CADOP9
AD5
AC5
AD4
AD3
R1
L0_CADOUT_L9
L0_CADOUT_L8
L0_CADOUT_L7
L0_CADOUT_H9
L0_CADOUT_H8
L0_CADOUT_H7
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
F3
F4
F5
E5
N2
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP9
H_CADOP11
H_CADON12
H_CADON10
H_CADOP12
H_CADOP10
H_CADON11
Y5
AB5
AA5
AB4
AB3
L0_CADOUT_L11
L0_CADOUT_L10
L0_CADOUT_H12
L0_CADOUT_H11
L0_CADOUT_H10
L0_CADIN_H12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
K3
H3
H4
H5
G5
H_CADIN10
H_CADIP10
H_CADIN11
H_CADIP11
H_CADIN12
H_CADIP12
H_CADOP13
H_CADON13
H_CADOP15
H_CADOP14
H_CADON14
V5
U5
V4
V3
W5
L0_CADOUT_L14
L0_CADOUT_L13
L0_CADOUT_L12
L0_CADOUT_H14
L0_CADOUT_H13
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_L12
L5
K4
M3
M4
M5
H_CADIN13
H_CADIP14
H_CADIN14
H_CADIP15
H_CADIP13
H_CLKOP0 10
H_CLKON0 10
H_CLKOP1 10
H_CADON15
T4
T3
Y4
Y1
W1
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_H0
L0_CADOUT_L15
L0_CADOUT_H15
L0_CADIN_H15
L0_CADIN_L15
L0_CLKIN_H1
L0_CLKIN_H0
L0_CLKIN_L0J2L0_CTLIN_H1
J5
J3
P5
N5
H_CADIN15
H_CLKIN010
H_CLKIP110
H_CLKIP010
H_CLKON1 10
H_CTLOP0 10
H_CTLON0 10
H_CTLOP1 10
Y3
T5
R2
R3
L0_CTLOUT_L0
L0_CLKOUT_L1
L0_CTLOUT_H1
L0_CTLOUT_H0
L0_CLKIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
K5
P3
P1
N1
H_CLKIN110
H_CTLIP110
H_CTLIN010
H_CTLIP010
H_CTLON1 10
R5
L0_CTLOUT_L1
L0_CTLIN_L1
6090022100G_B@
6090022100G_B@
P4
H_CTLIN110
C9
1000P_0402_25V8J
C9
1000P_0402_25V8J
1
2
@
@
D1
1SS355_SOD323-2
D1
1SS355_SOD323-2
D2
BAS16_SOT23-3
D2
12
@
@
2
C183
C183
1A
< FAN Control Circuit : Vout = 1.6 x Vset >
+5VS
+FAN1
12
@
@
1
10U_0805_10V4Z
10U_0805_10V4Z
U6
U6
C192
10U_0805_10V4Z
C192
10U_0805_10V4Z
1
2
BAS16_SOT23-3
5
GND8GND7GND6GND
EN1VIN2VOUT3VSET
4
EN_DFAN134
Security Classification
APL5607KI-TRG_SO8
APL5607KI-TRG_SO8
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
250 mil
C1
4.7U_0805_10V4Z
PUMA@C14.7U_0805_10V4Z
PUMA@
1
+1.2V_HT
2
< C1, C2 and C7 must be replaced to 10-uF for Caspian compatibility >
1 1
2 2
< From EC >
3 3
4 4
Page 5

0.1
0.1
0.1
DDR_A_D[63..0] 9
< From/To SO_DIMMA >
E
DDR_A_D12
DDR_A_D11
DDR_A_D4
DDR_A_D5
DDR_A_D6
C13
H12
H11
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
E11
D12
G11
DDR_B_D5
DDR_B_D4
DDR_B_D6
DDR_A_D9
DDR_A_D8
DDR_A_D7
E15
H15
E13
MA_DATA9
MA_DATA8
MA_DATA7
MB_DATA9
MB_DATA8
MB_DATA7
A16
A15
A13
DDR_B_D9
DDR_B_D8
DDR_B_D7
DDR_A_D10
E14
H17
E17
MA_DATA11
MA_DATA10
MB_DATA11
MB_DATA10
A20
A19
C14
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_A_D3
DDR_A_D0
DDR_A_D1
DDR_A_D2
G14
H14
F12
G12
MA_DATA2
MA_DATA1
MA_DATA0
MEM:DATA
MEM:DATA
MB_DATA2
MB_DATA1
MB_DATA0
JCPUC
JCPUC
B14
A14
A11
< Processor DDR2 Memory Interface >
D
C11
DDR_B_D0
DDR_B_D3
DDR_B_D1
DDR_B_D2
DDR_B_D[63..0]8
< From/To SO_DIMMB >
DDR_A_D13
DDR_A_D15
DDR_A_D14
DDR_A_D16
G17
C17
F14
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
D18
C18
D14
DDR_B_D16
DDR_B_D14
DDR_B_D15
DDR_B_D13
DDR_A_D19
DDR_A_D17
DDR_A_D18
E20
D22
C19
G18
MA_DATA18
MA_DATA17
MA_DATA16
MB_DATA18
MB_DATA17
MB_DATA16
A21
C25
D24
D20
DDR_B_D19
DDR_B_D17
DDR_B_D18
DDR_A_D20
DDR_A_D23
DDR_A_D22
DDR_A_D21
C23
B22
F18
E18
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
B24
B20
C24
C20
DDR_B_D22
DDR_B_D20
DDR_B_D21
DDR_B_D23
DDR_A_D24
DDR_A_D26
DDR_A_D25
DDR_A_D27
H24
F22
F20
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
E24
E23
G25
DDR_B_D26
DDR_B_D27
DDR_B_D24
DDR_B_D25
DDR_A_D29
DDR_A_D28
DDR_A_D30
H20
E22
E21
J19
MA_DATA29
MA_DATA28
MA_DATA27
MB_DATA29
MB_DATA28
MB_DATA27
D26
C26
G23
G26
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_A_D34
DDR_A_D33
DDR_A_D31
DDR_A_D32
AB24
Y24
H22
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
G24
AA23
AA24
DDR_B_D32
DDR_B_D33
DDR_B_D31
DDR_B_D34
DDR_A_D36
DDR_A_D37
DDR_A_D35
W21
W22
AA21
AB22
MA_DATA36
MA_DATA35
MA_DATA34
MB_DATA36
MB_DATA35
MB_DATA34
AA25
AA26
AE24
AD24
DDR_B_D35
DDR_B_D37
DDR_B_D36
DDR_A_D40
DDR_A_D39
DDR_A_D38
DDR_A_D41
AA20
Y20
AA22
Y22
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
AE25
AD22
AC22
AD26
DDR_B_D41
DDR_B_D38
DDR_B_D40
DDR_B_D39
DDR_A_D43
DDR_A_D42
DDR_A_D44
DDR_A_D45
AB21
AB18
AA18
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
AF24
AF20
AE20
DDR_B_D44
DDR_B_D45
DDR_B_D42
DDR_B_D43
DDR_A_D47
DDR_A_D46
DDR_A_D48
Y18
AD19
AD21
MA_DATA47
MA_DATA46
MA_DATA45
MB_DATA47
MB_DATA46
MB_DATA45
AF23
AD20
AC20
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_A_D51
DDR_A_D50
DDR_A_D49
Y14
W14
W16
AD17
MA_DATA50
MA_DATA49
MA_DATA48
MB_DATA50
MB_DATA49
MB_DATA48
AE18
AD14
AC14
AD18
DDR_B_D50
DDR_B_D51
DDR_B_D49
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D52
AB15
AB17
Y17
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
AF16
AF19
AC18
DDR_B_D52
DDR_B_D53
DDR_B_D55
DDR_B_D54
DDR_A_D56
DDR_A_D57
DDR_A_D58
Y12
AD13
AB13
AD15
MA_DATA57
MA_DATA56
MA_DATA55
MB_DATA57
MB_DATA56
MB_DATA55
AF13
AF15
AB11
AC12
DDR_B_D56
DDR_B_D58
DDR_B_D57
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
AA14
AB14
W11
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
Y11
AF14
AE14
DDR_B_D59
DDR_B_D62
DDR_B_D60
DDR_B_D61
DDR_A_D63
DDR_A_DM0
AA12
AB12
E12
MA_DATA63
MA_DATA62
MB_DATA63
MB_DATA62
A12
AF11
AD11
DDR_B_D63
DDR_B_DM0
DDR_B_DM[7..0]8 DDR_A_DM[7..0] 9
MA_DM0
MB_DM0
DDR_A_DM6
DDR_A_DM5
DDR_A_DM4
DDR_A_DM3
DDR_A_DM2
DDR_A_DM1
DDR_A_DM7
Y13
AB16
Y19
AC24
F24
E19
C15
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
E25
A22
B16
AE22
AB26
AD12
AC16
DDR_B_DM6
DDR_B_DM4
DDR_B_DM2
DDR_B_DM5
DDR_B_DM3
DDR_B_DM1
DDR_B_DM7
< To SO_DIMMB > < To SO_DIMMA >
DDR_A_DQS0 9
DDR_A_DQS#0 9
DDR_A_DQS1 9
DDR_A_DQS#1 9
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DQS2
DDR_A_DQS1
DDR_A_DQS#1
C22
G16
G15
G13
H13
MA_DQS_L1
MA_DQS_L0
MA_DQS_H1
MA_DQS_H0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
A24
B12
D16
C16
C12
DDR_B_DQS2
DDR_B_DQS1
DDR_B_DQS0
DDR_B_DQS#1
DDR_B_DQS#0
DDR_B_DQS18
DDR_B_DQS08
DDR_B_DQS#18
DDR_B_DQS#08
DDR_A_DQS2 9
DDR_A_DQS#2 9
DDR_A_DQS3 9
DDR_A_DQS#3 9
DDR_A_DQS4 9
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DQS#2
DDR_A_DQS4
AD23
G22
G21
C21
MA_DQS_L3
MA_DQS_L2
MA_DQS_H4
MA_DQS_H3
MA_DQS_H2
MB_DQS_H4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
F26
E26
A23
AC25
DDR_B_DQS4
DDR_B_DQS3
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS48
DDR_B_DQS38
DDR_B_DQS28
DDR_B_DQS#38
DDR_B_DQS#28
DDR_A_DQS#4 9
DDR_A_DQS5 9
DDR_A_DQS#5 9
DDR_A_DQS6 9
DDR_A_DQS#6 9
DDR_A_DQS#4
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DQS6
DDR_A_DQS#6
Y15
W15
AB19
AB20
AC23
MA_DQS_L6
MA_DQS_L5
MA_DQS_L4
MA_DQS_H6
MA_DQS_H5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_L4
AF21
AF22
AE16
AD16
AC26
DDR_B_DQS6
DDR_B_DQS5
DDR_B_DQS#6
DDR_B_DQS#5
DDR_B_DQS#4
DDR_B_DQS68
DDR_B_DQS58
DDR_B_DQS#68
DDR_B_DQS#58
DDR_B_DQS#48
DDR_A_DQS7 9
DDR_A_DQS#7 9
DDR_A_DQS#7
DDR_A_DQS7
W12
W13
MA_DQS_L7
MA_DQS_H7
MB_DQS_H7
MB_DQS_L7
6090022100G_B@
6090022100G_B@
AF12
AE12
DDR_B_DQS7
DDR_B_DQS#7
DDR_B_DQS78
DDR_B_DQS#78
< From/To SO_DIMMB > < From/To SO_DIMMA >
5 45Wednesday, February 25, 2009
5 45Wednesday, February 25, 2009
5 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
AMD CPU S1G2 DDRII I/F
AMD CPU S1G2 DDRII I/F
AMD CPU S1G2 DDRII I/F
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
C14
1.5P_0402_50V9C
C14
1.5P_0402_50V9C
1
B
DDR_B_CLK0
C10
1.5P_0402_50V9C
C10
1.5P_0402_50V9C
1
DDR_A_CLK0
< PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH >
2
DDR_B_CLK#0
2
DDR_A_CLK#0
C15
1.5P_0402_50V9C
C15
1.5P_0402_50V9C
1
DDR_B_CLK1
C11
1.5P_0402_50V9C
C11
1.5P_0402_50V9C
1
DDR_A_CLK1
2
DDR_B_CLK#1
2
DDR_A_CLK#1
< VTT regulator voltage >
+0.9V+0.9V
W10
AC10
AB10
AA10
VTT5
VTT6
VTT7
VTT8
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT1
VTT2
VTT3
VTT4
JCPUB
JCPUB
B10
D10
C10
AD10
A10
Y10
VTT9
MEMZP
AF10
AE10
MEM_P
MEM_N VTT_SENSE
T1PAD T1PAD
+MCH_REF
W17
MEMVREF
VTT_SENSE
MEMZN
RSVD_M1
H16
< To SO_DIMMB >
T3PAD T3PAD
DDR_B_ODT0 8
DDR_B_ODT1 8
DDR_B_ODT0
DDR_B_ODT1
Y26
W23
W26
B18
RSVD_M2
MB0_ODT1
MB0_ODT0
MA1_ODT1
MA1_ODT0
MA0_ODT1
MA0_ODT0
T19
V19
V22
U21
DDR_A_ODT1
DDR_A_ODT0
< To SO_DIMMB >
DDR_CS1_DIMMB# 8
DDR_CKE0_DIMMB 8
DDR_CKE0_DIMMB
DDR_CS1_DIMMB#
U22
W25
V26
J25
MB_CKE0
MB1_ODT0
MB1_CS_L0
MB0_CS_L1
MB0_CS_L0
MA0_CS_L1
MA1_CS_L1
MA1_CS_L0
MA0_CS_L0
MA_CKE0
J22
T20
V20
U19
U20
DDR_CKE0_DIMMA
DDR_CS1_DIMMA# DDR_CS0_DIMMB#
DDR_CS0_DIMMA#
< To SO_DIMMB >
< To SO_DIMMB >
DDR_CKE1_DIMMB 8
DDR_B_CLK0 8
DDR_B_CLK#0 8
DDR_B_CLK1 8
DDR_CKE1_DIMMB
DDR_B_CLK#0
DDR_B_CLK0
DDR_B_CLK1
DDR_B_CLK#1DDR_A_CLK#1
AF18
AF17
A17
A18
P22
R22
H26
MB_CKE1
MB_CLK_L1
MB_CLK_L0
MB_CLK_H2
MB_CLK_H1
MB_CLK_H0
MA_CLK_H2
MA_CLK_H1
MA_CLK_L1
MA_CLK_H0
MA_CLK_L0
MA_CKE1
J20
Y16
F16
E16
N19
N20
AA16
DDR_A_CLK#0
DDR_A_CLK0
DDR_A_CLK1
DDR_CKE1_DIMMA
< To SO_DIMMB >
DDR_B_CLK#1 8
DDR_B_MA[15..0] 8
DDR_B_MA1
DDR_B_MA0
R26
R25
N24
P24
MB_ADD0
MB_CLK_L3
MB_CLK_L2
MB_CLK_H3
MA_ADD0
MA_CLK_H3
MA_CLK_L3
MA_CLK_L2
P19
P20
N21
M20
DDR_A_MA1
DDR_A_MA0
DDR_B_MA3
DDR_B_MA2
DDR_B_MA4
N26
N23
P26
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
N22
M22
M19
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_B_MA7
DDR_B_MA6
DDR_B_MA5
DDR_B_MA8
M26
L24
N25
L23
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
L19
L21
L20
M24
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA5
DDR_B_MA10
DDR_B_MA12
DDR_B_MA11
DDR_B_MA9
L25
L26
T26
K26
MB_ADD9
MB_ADD12
MB_ADD11
MB_ADD10
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
L22
K20
K22
R21
DDR_A_MA12
DDR_A_MA11
DDR_A_MA10
DDR_A_MA9
DDR_B_MA15
DDR_B_MA13
DDR_B_BS#0
DDR_B_MA14
J24
J23
W24
MB_ADD15
MB_ADD14
MB_ADD13
MA_ADD15
MA_ADD14
MA_ADD13
K19
K24
V24
DDR_A_BS#0
DDR_A_MA15
DDR_A_MA14
DDR_A_MA13
< To SO_DIMMB >
< To SO_DIMMB >
DDR_B_BS#0 8
DDR_B_BS#1 8
DDR_B_BS#2 8
DDR_B_RAS# 8
DDR_B_CAS# 8
DDR_B_WE# 8
DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#
DDR_B_BS#1
DDR_B_BS#2
J26
U26
R24
U25
U24
U23
MB_WE_L
MB_RAS_L
MB_CAS_L
MB_BANK2
MB_BANK1
MB_BANK0
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS_L
MA_CAS_L
MA_WE_L
J21
T22
T24
R23
R20
R19
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS#2
DDR_A_BS#1
@ 6090022100G_B
@ 6090022100G_B
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
< DDR2 VREF is 0.5 ratio >
R1
R1
+1.8V
+MCH_REF
1K_0402_1%
1K_0402_1%
1 2
C13
1000P_0402_25V8J
C13
1000P_0402_25V8J
1
2
C12
0.1U_0402_16V7K
C12
0.1U_0402_16V7K
1
2
R2
1K_0402_1%
R2
1K_0402_1%
1 1
T2 PADT2 PAD
1 2
1 2
R4 39.2_0402_1%R4 39.2_0402_1%
R3 39.2_0402_1%R3 39.2_0402_1%
Place them close to CPU within 1"
+1.8V
1 2
2 2
DDR_CS0_DIMMA#9
DDR_CS1_DIMMA#9 DDR_CS0_DIMMB# 8
DDR_A_ODT09
DDR_A_ODT19
< To SO_DIMMA >
< To SO_DIMMA >
DDR_CKE0_DIMMA9
DDR_CKE1_DIMMA9
DDR_A_CLK09
DDR_A_CLK#09
DDR_A_CLK19
< To SO_DIMMA >
< To SO_DIMMA >
DDR_A_MA[15..0]9
DDR_A_CLK#19
< To SO_DIMMA >
DDR_A_RAS#9
DDR_A_CAS#9
DDR_A_WE#9
DDR_A_BS#09
DDR_A_BS#19
DDR_A_BS#29
< To SO_DIMMA >
< To SO_DIMMA >
3 3
4 4
A
Page 6

E
W18
M11
D
KEY2
KEY1
JCPUD
JCPUD
VDDA1F8VDDA2F9RESET_LB7PWROKA7LDTSTOP_L
< Serial VID Interface clock & data >
< Thermal Sensor Trip output >
< HTC-active state indication or command >
CPU_SVD 43
CPU_SVC 43
CPU_SVC
SVCA6SVD
CLKIN_HA9CLKIN_L
CPU_SVD
A4
A8
+1.8V
R42
300_0402_5%
R42
300_0402_5%
12
CPU_THERMTRIP#_R
THERMDC_CPU
CPU_PROCHOT#_1.8
AF6
AC7
W7
AA8
THERMDC
MEMHOT_L
PROCHOT_L
THERMTRIP_L
SIC
SID
LDTREQ_L
ALERT_L
C6
F10
AF4
AF5
AE6
< Thermal diode cathode & anode >
< Debug request >
< Differential feedback for VDDIO >
< VDDIO : DDR SDRAM I/O ring power supply>
< Differential feedback for VDDNB >
< Northbridge power supply >
T21PAD T21PAD
T22PAD T22PAD
CPU_VDDNB_RUN_FB_H 43
CPU_VDDNB_RUN_FB_L 43
+1.8V sense no support
THERMDA_CPU
W9
W8
THERMDA
HT_REF1
HT_REF0R6VDD0_FB_HF6VDD0_FB_L
P6
CPU_DBREQ#
CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L
Y9
E10
H6
G6
VDDIO_FB_L
VDDIO_FB_H
VDDNB_FB_L
VDDNB_FB_H
DBRDY
VDD1_FB_HY6VDD1_FB_L
E6
G10
AA9
AB6
DBREQ_L
TMS
route as differential
as short as possible
testpoint under package
T6PAD T6PAD
T5PAD T5PAD
T20PAD T20PAD
CPU_TEST17_BP3
CPU_TEST28_L_PLLCHRZ_N
CPU_TEST28_H_PLLCHRZ_P
AE9
J7
H8
TDO
TEST28_L
TEST28_H
TCK
TRST_L
TDI
TEST23
AF9
H10
AC9
AD9
AD7
+1.2V_HT
T7PAD T7PAD
T8PAD T8PAD
R32
300_0402_5%
300_0402_5%
@R32
@
12
CPU_TEST16_BP2
CPU_TEST10_ANALOGOUT
C7
C3
K8
TEST7
TEST17D7TEST16E7TEST15F7TEST14
TEST25_HE9TEST25_L
TEST19G9TEST18
TEST21
E8
AF7
AB8
T14PAD T14PAD
T13PAD T13PAD
Add R32 at PVT
CPU_TEST29_L_FBCLKOUT_N
CPU_TEST29_H_FBCLKOUT_P
C9
C8
C4
TEST8
TEST10
TEST29_L
TEST29_H
TEST9
TEST12
TEST6
TEST24
TEST22
TEST20
TEST27
C2
AF8
AA6
AE7
AE8
AC8
H18
H19
RSVD10
RSVD1
A5
A3
AA7
D5
RSVD8
RSVD7
RSVD9
RSVD2
RSVD4
RSVD3B3RSVD5
B5
C5
RSVD6
C1
0.1
0.1
0.1
LDT_RST#
EC_SMB_DA2 19,34,35
246
8
10121416182022
JP3
JP3
< HDT Connector >
R494
0_0402_5%@
R494
0_0402_5%@
1 2
2423
26
21191715131197531
+1.8V
EC_SMB_CK2 19,34,35
< From EC >
SAMTEC_ASP-68200-07
@ SAMTEC_ASP-68200-07
@
EC_SMB_CK2
EC_SMB_DA2
6
5
8
7
GND
Compal Electronics, Inc.
Compal Electronics, Inc.
SCLK
SDATA
ALERT#
VDD
D+2D-
< Thermal Sensor >
U2
U2
1
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
3
Compal Electronics, Inc.
THERM#
ADM1032ARM-1 ZREEL_MSOP8
ADM1032ARM-1 ZREEL_MSOP8
4
6 45Wednesday, February 25, 2009
6 45Wednesday, February 25, 2009
6 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
AMD CPU S1G2 CTRL
AMD CPU S1G2 CTRL
AMD CPU S1G2 CTRL
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
< R494 Close to CPU >
THERMDA_CPU
+3VS
THERMDC_CPU
C27
C27
1 2
1
C26
C26
0.1U_0402_16V7K
0.1U_0402_16V7K
2200P_0402_50V7K
2200P_0402_50V7K
< noise filter cap >
2
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
1 2
1 2
1 2
1 2
R40 220_0402_5%@ R40 220_0402_5%@
R39 220_0402_5%@ R39 220_0402_5%@
R37 220_0402_5%@ R37 220_0402_5%@
R38 220_0402_5%@ R38 220_0402_5%@
1 2
R41 300_0402_5%R41 300_0402_5%
CPU_DBREQ#
< R41 Close to CPU >
+1.8V
+1.8V
T23 PADT23 PAD
T24 PADT24 PAD
6090022100G_B@
6090022100G_B@
+1.8V
LDT_STOP#
CPU_LDT_REQ_R#
H_PWRGD
LDT_RST#
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
+2.5VDDA
C
CPU_VDDNB_RUN_FB_H
CPU_VDDNB_RUN_FB_L
Close to CPU
R485
10_0402_5%
R485
10_0402_5%
R484
10_0402_5%
R484
10_0402_5%
12
12
B
< Differential feedback for VDDNB >
+VDDNB
CPU_VDD0_RUN_FB_L
CPU_VDD0_RUN_FB_H
R487
10_0402_5%
R487
10_0402_5%
R486
10_0402_5%
R486
10_0402_5%
A
< Close to CPU >
1 2
1 2
+CPU_CORE_0
CPU_HTREF0
CPU_HTREF1
CPU_VDD0_RUN_FB_H
CPU_VDD0_RUN_FB_L
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
T10 PADT10 PAD
T9 PADT9 PAD
T11 PADT11 PAD
CPU_VDD0_RUN_FB_H43
CPU_VDD0_RUN_FB_L43
CPU_VDD1_RUN_FB_H43
CPU_VDD1_RUN_FB_L43
< JTAG debug port >
1 2
1 2
R13 44.2_0402_1%R13 44.2_0402_1%
R14 44.2_0402_1%R14 44.2_0402_1%
+1.2V_HT
< Sideband-Temperature Sensor Interface Clock & Data>
< Sideband-Temperature Sensor Interface interrupt >
< Compensation Resistor to VLDT >
< Compensation Resistor to VSS >
CPU_VDD1_RUN_FB_H
CPU_VDD1_RUN_FB_L
Un-Mount R489 For Caspian
R488
10_0402_5%PUMA@
R488
10_0402_5%PUMA@
R489
10_0402_5%PUMA@
R489
10_0402_5%PUMA@
1 2
1 2
+CPU_CORE_1
1 1
< Debug ready >
CPU_CLKIN_SC_P
Change R488 to 10K For Caspian
C20
3900P_0402_50V7K
C20
3900P_0402_50V7K
1 2
< 200-MHz PLL Reference Clock >
CPU_TEST23_TSTUPD
T12 PADT12 PAD
T19 PADT19 PAD
R8
169_0402_1%
R8
169_0402_1%
12
CLK_CPU_BCLK15
R25
0_0402_5%
R25
0_0402_5%
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1
CPU_TEST20_SCANCLK2
1 2
+2.5VDDA
C19
0.22U_0603_16V4Z
C19
+2.5VDDA+2.5VS
VDDA=300mA
0.22U_0603_16V4Z
1
2
C18
3300P_0402_50V7K
C18
3300P_0402_50V7K
1
2
C17
4.7U_0805_10V4Z
C17
4.7U_0805_10V4Z
1
2
CPU_CLKIN_SC_N
C21
3900P_0402_50V7K
C21
3900P_0402_50V7K
1 2
Address:100_1100 Place close to CPU wihtin 1.5"
1 2
CLK_CPU_BCLK#15
L1 FBM_L11_201209_300L_0805L1 FBM_L11_201209_300L_0805
C16
100U_D2_10VM
C16
100U_D2_10VM
+
+
1
< Filtered PLL Supply Voltage >
2 2
2
@
@
R500
510_0402_5%TIGRIS@
R500
510_0402_5%TIGRIS@
R498
510_0402_5%@
R498
510_0402_5%@
1 2
1 2
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST25_H_BYPASSCLK_H
R499
510_0402_5%@
R499
510_0402_5%@
R497
510_0402_5%TIGRIS@
R497
510_0402_5%TIGRIS@
1 2
1 2
Add R497 and R498 at PVT
CPU_SVC
CPU_SVD
0718 AMD --> 1K ohm
R23
1K_0402_5%
R23
1K_0402_5%
R22
1K_0402_5%
R22
1K_0402_5%
12
12
+1.8VS
< Serial VID Interface clock & data >
ENTRIP2 38,40
< To power circuitry>
D12
CH751H-40PT_SOD323-2
D12
CH751H-40PT_SOD323-2
21
R10
10K_0402_5%
R10
10K_0402_5%
1 2
+1.8V
R15
R15
+1.8VS
3 3
H_THERMTRIP# 21
< To SB700 ACPI block>
D16
CH751H-40PT_SOD323-2
D16
CH751H-40PT_SOD323-2
21
C
C
Q3
Q3
2
B
B
E
E
3 1
R5
300_0402_5%
R5
300_0402_5%
1 2
CPU_THERMTRIP#_R
LDT_RST#
C22
C22
300_0402_5%
300_0402_5%
1
1 2
LDT_RST#20
< To SB700 CPU block>
R11
@ R11
@
MMBT3904_NL_SOT23-3
MMBT3904_NL_SOT23-3
R9
300_0402_5%
R9
300_0402_5%
1 2
+1.8V
0.01U_0402_25V7K
0.01U_0402_25V7K
2
+1.8VS +1.8VS
@
@
H_PROCHOT# 20
0_0402_5%
0_0402_5%
1 2
CPU_PROCHOT#_1.8
C25
C25
R36
300_0402_5%
R36
300_0402_5%
1
1 2
LDT_STOP#11,20
H_PWRGD LDT_STOP#
C23
C23
R21
300_0402_5%
R21
300_0402_5%
1
1 2
H_PWRGD20,43
CPU_TEST21_SCANEN
CPU_TEST23_TSTUPD
CPU_TEST20_SCANCLK2
R31
300_0402_5%
TIGRIS@
R31
300_0402_5%
TIGRIS@
R29
300_0402_5%
TIGRIS@
R29
300_0402_5%
TIGRIS@
R26
300_0402_5%
R26
4 4
1 2
PUMA@
PUMA@
R30
R30
300_0402_5%
300_0402_5%
300_0402_5%
12
CPU_LDT_REQ_R#
R27
0_0402_5%
R27
0_0402_5%
1 2
1
1 2
CPU_LDT_REQ#
CPU_LDT_REQ#11,20
12
Add R29 and R31 at PVT
0.01U_0402_25V7K
0.01U_0402_25V7K
2
@
@
+1.8VS
0.1U_0402_16V7K
0.1U_0402_16V7K
2
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
CPU_TEST24_SCANCLK1
R28
300_0402_5%
R28
300_0402_5%
B
1 2
Un-Mount R27 For Caspian
@
@
2
C24
C24
A
0.01U_0402_25V7K
0.01U_0402_25V7K
Page 7

0.1
0.1
0.1
7 45Wednesday, February 25, 2009
7 45Wednesday, February 25, 2009
7 45Wednesday, February 25, 2009
E
+CPU_CORE_1
JCPUE
JCPUE
D
+CPU_CORE_0
C
P10
R11
VDD1_1P8VDD1_2
VDD1_3R4VDD1_4R7VDD1_5R9VDD1_6
VDD0_1G4VDD0_2H2VDD0_3J9VDD0_4
VDD0_5
J11
J13
J15
T8
VDD1_7T2VDD1_8T6VDD1_9
VDD0_7K6VDD0_8
VDD0_6
K10
K12
C42
180P_0402_50V8J
C42
180P_0402_50V8J
1
T10
T12
T14
VDD1_10
VDD1_11
VDD0_9
VDD0_10
VDD0_11L4VDD0_12L7VDD0_13L9VDD0_14
K14
2
U11
VDD1_12
VDD1_13U7VDD1_14U9VDD1_15
VDD0_15
L11
L13
U13
U15
VDD1_16
VDD1_18V6VDD1_19V8VDD1_20
VDD1_17
VDD0_17M2VDD0_18M6VDD0_19M8VDD0_20
VDD0_16
L15
1
V10
V12
V14
VDD1_21
VDD1_22
VDD1_23W4VDD1_24
VDD0_21N7VDD0_22N9VDD0_23
N11
M10
+VDDNB
C45
180P_0402_50V8J
C45
180P_0402_50V8J
2
AC4
Y2
K16
+1.8V
AD2
VDD1_25
VDD1_26
VDDNB_1
VDDNB_2
VDDNB_3
P16
M16
V25
Y25
VDDIO26
VDDIO27
VDDNB_4
VDDNB_5
T16
V16
+1.8V
V21
V23
VDDIO24
VDDIO25
VDDIO1
H25
U17
V18
VDDIO22
VDDIO23
VDDIO2
VDDIO3
J17
K18
T23
T25
VDDIO20
VDDIO21
VDDIO4
VDDIO5
K21
K23
T18
T21
VDDIO18
VDDIO19
VDDIO6
VDDIO7
L17
K25
P25
R17
VDDIO16
VDDIO17
VDDIO8
VDDIO9
M18
M21
P18
P21
P23
VSS66J6VSS67J8VSS68
Athlon 64 S1 Processor Socket
VDDIO13
VDDIO14
VDDIO15
VDDIO10
VDDIO11
VDDIO12
N17
M23
M25
VSS1
6090022100G_B@
6090022100G_B@
JCPUF
JCPUF
AA4
AA11
VSS2
J10
VSS3
AA13
J12
VSS69
VSS4
AA15
J14
VSS70
VSS5
AA17
J16
VSS71
VSS6
AA19
J18
VSS72
VSS7
AB2
K11
VSS73K2VSS74K7VSS75K9VSS76
VSS8
VSS9
VSS10
VSS11
AB7
AB9
AB23
AB25
K13
VSS77
VSS12
AC11
K15
VSS78
VSS13
AC13
K17
VSS79
VSS80L6VSS81L8VSS82
VSS14
VSS15
AC15
AC17
VSS16
AC19
L10
VSS17
AC21
L12
VSS83
VSS18
AD6
L14
VSS84
VSS19
AD8
L16
VSS85
VSS20
AD25
L18
VSS86
VSS87M7VSS88M9VSS89
VSS21
VSS22
AE11
AE13
VSS23
AE15
AC6
VSS24
AE17
M17
VSS90
VSS25
AE19
AE21
VSS91N4VSS92N8VSS93
VSS26
N10
N16
N18
VSS94
VSS95
VSS27
VSS28B4VSS29B6VSS30B8VSS31B9VSS32
AE23
P11
P17
VSS96P2VSS97P7VSS98P9VSS99
VSS100
VSS33
VSS34
VSS35
B11
B13
B15
B17
R10
R16
VSS101R8VSS102
VSS103
VSS36
VSS37
VSS38
B19
B21
B23
R18
VSS104
VSS105T7VSS106T9VSS107
VSS39
VSS40D6VSS41D8VSS42D9VSS43
B25
T11
T13
T15
VSS108
D11
D13
T17
VSS109
VSS110
VSS44
VSS45
D15
D17
U10
U12
U14
U16
VSS111U4VSS112U6VSS113U8VSS114
VSS115
VSS116
VSS117
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51E4VSS52F2VSS53
D19
D21
D23
D25
1. Near Power Supply
2. Change to B2 size
C59
C59
+
+
1
+0.9V
U18
V11
V13
V15
V17
VSS118
VSS119V2VSS120V7VSS121V9VSS122
VSS123
VSS124
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
F11
F13
F15
F17
F19
F21
F23
F25
220U_B2_4VM_R45M
220U_B2_4VM_R45M
2
Y21
VSS125
VSS126W6VSS127
VSS60
VSS61H7VSS62H9VSS63
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
AMD CPU S1G2 PWR & GND
AMD CPU S1G2 PWR & GND
AMD CPU S1G2 PWR & GND
Y23
VSS128
H21
N6
H23
Title
Title
Title
VSS129
Athlon 64 S1 Processor Socket
VSS64
VSS65
6090022100G_B@
6090022100G_B@
J4
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
LA-4971P
LA-4971P
LA-4971P
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
E
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
C
C41
0.01U_0402_25V7K
C41
0.01U_0402_25V7K
1
2
C40
0.22U_0603_16V4Z
C40
0.22U_0603_16V4Z
1
2
C35
22U_0805_6.3V6M
C35
22U_0805_6.3V6M
1
2
B
C34
22U_0805_6.3V6M
C34
22U_0805_6.3V6M
1
2
C33
22U_0805_6.3V6M
C33
22U_0805_6.3V6M
1
2
C32
22U_0805_6.3V6M
C32
22U_0805_6.3V6M
1
2
Under CPU Socket Under CPU Socket
+CPU_CORE_0 +CPU_CORE_0
330U_X_2VM_R6M
330U_X_2VM_R6M
C28
A
C28
+
+
1
2
C44
0.01U_0402_25V7K
C44
0.01U_0402_25V7K
1
2
C43
0.22U_0603_16V4Z
C43
0.22U_0603_16V4Z
1
2
C39
22U_0805_6.3V6M
C39
22U_0805_6.3V6M
1
2
C38
22U_0805_6.3V6M
C38
22U_0805_6.3V6M
1
2
C37
22U_0805_6.3V6M
C37
22U_0805_6.3V6M
1
2
C36
22U_0805_6.3V6M
C36
22U_0805_6.3V6M
1
2
C29
C29
+
+
1
Under CPU Socket Under CPU Socket
330U_X_2VM_R6M
330U_X_2VM_R6M
2
C51
180P_0402_50V8J
C51
180P_0402_50V8J
1
2
C50
180P_0402_50V8J
C50
180P_0402_50V8J
1
2
C49
0.22U_0603_16V4Z
C49
0.22U_0603_16V4Z
1
2
C48
0.22U_0603_16V4Z
C48
0.22U_0603_16V4Z
1
2
C47
22U_0805_6.3V6M
C47
22U_0805_6.3V6M
1
2
C58
0.22U_0603_16V4Z
C58
0.22U_0603_16V4Z
1
2
C57
0.22U_0603_16V4Z
C57
0.22U_0603_16V4Z
1
2
C56
0.22U_0603_16V4Z
C56
0.22U_0603_16V4Z
1
2
C61
0.01U_0402_25V7K
C61
0.01U_0402_25V7K
1
2
C65
180P_0402_50V8J
C65
180P_0402_50V8J
1
C64
180P_0402_50V8J
C64
180P_0402_50V8J
1
C63
180P_0402_50V8J
C63
180P_0402_50V8J
1
2
2
2
C78
220U_B2_4VM_R45M
C78
220U_B2_4VM_R45M
+
+
1
2
@
@
Change to B2 size
C77
4.7U_0805_10V4Z
C77
4.7U_0805_10V4Z
1
2
C76
4.7U_0805_10V4Z
C76
4.7U_0805_10V4Z
1
2
C75
4.7U_0805_10V4Z
C75
4.7U_0805_10V4Z
1
2
C73
180P_0402_50V8J
C73
180P_0402_50V8J
1
2
C72
180P_0402_50V8J
C72
180P_0402_50V8J
1
2
C71
1000P_0402_25V8J
C71
1000P_0402_25V8J
1
2
C70
1000P_0402_25V8J
C70
1000P_0402_25V8J
1
2
C69
0.22U_0603_16V4Z
C69
0.22U_0603_16V4Z
1
2
C68
0.22U_0603_16V4Z
C68
0.22U_0603_16V4Z
1
2
C67
4.7U_0805_10V4Z
C67
4.7U_0805_10V4Z
1
2
C86
180P_0402_50V8J
C86
180P_0402_50V8J
1
2
C85
180P_0402_50V8J
C85
180P_0402_50V8J
1
2
C84
1000P_0402_25V8J
C84
1000P_0402_25V8J
1
2
C83
1000P_0402_25V8J
C83
1000P_0402_25V8J
1
2
C82
0.22U_0603_16V4Z
C82
0.22U_0603_16V4Z
1
2
C81
0.22U_0603_16V4Z
C81
0.22U_0603_16V4Z
1
2
C80
4.7U_0805_10V4Z
C80
4.7U_0805_10V4Z
1
2
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
TIGRIS@
TIGRIS@
1
1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
C54
22U_0805_6.3V6M
C54
22U_0805_6.3V6M
2
A
C53
22U_0805_6.3V6M
C53
22U_0805_6.3V6M
2
330U_X_2VM_R6M
330U_X_2VM_R6M
C30
C30
+
+
1
2
VDD decoupling : +CPU_CORE
+CPU_CORE_0
Near CPU Socket
1 1
1
+CPU_CORE_1 +CPU_CORE_1 +CPU_CORE_1
C31
C31
+
+
330U_X_2VM_R6M
330U_X_2VM_R6M
2
Near CPU Socket
C46
22U_0805_6.3V6M
C46
22U_0805_6.3V6M
1
+1.8V
2
Under CPU Socket
VDDIO decoupling : DDR SDRAM I/O ring power
+1.8V
C55
0.22U_0603_16V4Z
C55
0.22U_0603_16V4Z
1
2
Between CPU Socket and DIMM
2 2
+1.8V
C60
0.01U_0402_25V7K
C60
0.01U_0402_25V7K
1
2
Between CPU Socket and DIMM
180PF Qt'y follow the distance between CPU socket and DIMM0. <2.5inch>
C62
180P_0402_50V8J
C62
+1.8V
180P_0402_50V8J
1
2
Between CPU Socket and DIMM
+1.8V
3 3
C74
4.7U_0805_10V4Z
C74
4.7U_0805_10V4Z
1
2
VTT decoupling.
Between CPU Socket and DIMM
+0.9V
C66
4.7U_0805_10V4Z
C66
4.7U_0805_10V4Z
1
2
Near CPU Socket Right side
+0.9V
C79
4.7U_0805_10V4Z
C79
4.7U_0805_10V4Z
1
2
Near CPU Socket Left side
C52
22U_0805_6.3V6M
C52
22U_0805_6.3V6M
+VDDNB
1
2
+VDDNB decoupling : Northbridge power
4 4
Page 8

0.1
0.1
0.1
8 45Wednesday, February 25, 2009
8 45Wednesday, February 25, 2009
8 45Wednesday, February 25, 2009
E
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
DDR_B_DQS#[0..7] 5
DDR_B_MA[0..15] 5
DDR_B_DQS[0..7] 5
DDR_B_D[0..63] 5
DDR_B_DM[0..7] 5
+1.8V
12
12
12
C105 0.1U_0402_16V7KC105 0.1U_0402_16V7K
C106 0.1U_0402_16V7KC106 0.1U_0402_16V7K
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_B_MA0
DDR_B_RAS#
C108 0.1U_0402_16V7KC108 0.1U_0402_16V7K
RP9
RP9
1 8
2 7
DDR_B_MA14
DDR_B_MA11
D
+0.9V
RP8
RP8
DDR_B_MA4
1 8
2 7
DDR_B_MA2
12
C107 0.1U_0402_16V7KC107 0.1U_0402_16V7K
RP10
RP10
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_B_MA7
DDR_B_MA6
12
12
C109 0.1U_0402_16V7KC109 0.1U_0402_16V7K
C110 0.1U_0402_16V7KC110 0.1U_0402_16V7K
182736
45
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_CKE0_DIMMB
DDR_CKE1_DIMMB
DDR_B_MA15
DDR_B_BS#2
12
12
C111 0.1U_0402_16V7KC111 0.1U_0402_16V7K
C112 0.1U_0402_16V7KC112 0.1U_0402_16V7K
182736
45
RP11
RP11
DDR_B_MA8
DDR_B_MA9
DDR_B_MA12
DDR_B_MA3
12
12
C113 0.1U_0402_16V7KC113 0.1U_0402_16V7K
C114 0.1U_0402_16V7KC114 0.1U_0402_16V7K
182736
45
RP12
RP12
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_B_MA10
DDR_B_BS#0
DDR_B_MA5
DDR_B_MA1
12
12
C116 0.1U_0402_16V7KC116 0.1U_0402_16V7K
C115 0.1U_0402_16V7KC115 0.1U_0402_16V7K
182736
45
RP13
RP13
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_B_WE#
DDR_B_CAS#
DDR_B_ODT1
DDR_CS1_DIMMB#
12
12
C117 0.1U_0402_16V7KC117 0.1U_0402_16V7K
C118 0.1U_0402_16V7KC118 0.1U_0402_16V7K
RP14
RP14
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_B_BS#1
DDR_CS0_DIMMB#
DDR_B_MA13
DDR_B_ODT0
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_B_D[0..63]
DDR_B_DM[0..7]
DDR_B_DQS[0..7]
DDR_B_MA[0..15]
DDR_B_DQS#[0..7]
Title
Title
Title
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
E
LA-4971P
LA-4971P
LA-4971P
DDRII SO-DIMM 0
DDRII SO-DIMM 0
DDRII SO-DIMM 0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
C
Security Classification
Security Classification
198
197
+3VS
200
SAO
SCL
199
202
SA1
VDDSPD
201
Security Classification
VSS
VSS
P-TWO_A5692B-A0G16-P@
P-TWO_A5692B-A0G16-P@
DDR_B_CLK1 5
154
153
156
DQ47
DQ43
155
VSS
VSS
DDR_B_D52
158
160
162
164
VSS
DQ52
DQ53
DQ48
DQ49
VSS
157
159
161
163
DDR_B_CLK#1 5
166
168
CK1
VSS
CK1#
NC,TEST
VSS
DQS6#
165
167
DDR_B_D54
DDR_B_DM6
170
172
174
176
VSS
DM6
DQ54
DQ55
DQS6
VSS
DQ50
DQ51
169
171
173
175
DDR_B_D61
DDR_B_D60
178
180
182
VSS
DQ60
DQ61
VSS
DQ56
DQ57
177
179
181
DDR_B_DQS7
DDR_B_DQS#7
184
186
188
190
VSS
VSS
DQS7
DQS7#
VSS
DM7
VSS
DQ58
183
185
187
189
DDR_B_D63
DDR_B_D62
192
194
196
VSS
DQ62
DQ63
DQ59
VSS
SDA
191
193
195
DDR_B_ODT0 5
DDR_B_RAS# 5
DDR_B_D30
DDR_B_DQS3
68
70
72
VSS
DQS3
DQS3#
DDR_CKE1_DIMMB 5
DDR_B_D31
DDR_CKE1_DIMMB
76
78
80
82
VSS
VDD
DQ3074DQ31
NC/CKE1
DDR_B_MA11
DDR_B_MA7
DDR_B_MA15
DDR_B_MA14
86
88
90A792A694
A11
VDD
NC/A1584NC/A14
DDR_B_CLK0 5
DDR_B_CLK#0 5
12
< EMI require >< EMI require >
C155 0.1U_0402_16V7KC155 0.1U_0402_16V7K
+1.8V+1.8V
B
JDDRH
JDDRH
DDR_B_D6
DDR_B_D7
DDR_B_D5
DDR_B_D4
2
6
8
VSS
DQ44DQ5
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1
DDR_B_DM0
10
12
VSS
VSS
DQ614DQ7
DM0
16
18
VSS
DDR_B_D13
DDR_B_D12
22
DQ1220DQ13
DDR_B_DM1
24
26
28
30
VSS
VSS
DM1
32
CK0
CK0#
DDR_B_D14
DDR_B_D15
34
38
VSS
DQ1436DQ15
42
VSS40VSS
DDR_B_D20
DDR_B_D21
46
48NC50
VSS
DQ2044DQ21
DDR_B_D23
DDR_B_DM2
52
54
58
VSS
DM2
DQ2256DQ23
DDR_B_D29
DDR_B_D28
60
64
VSS
DQ2862DQ29
DDR_B_DQS#3
66
VSS
DDR_B_MA4
DDR_B_MA6DDR_B_MA8
DDR_B_MA2
96A498A2100A0102
VDD
DDR_B_BS#1 5
DDR_B_BS#1
DDR_B_MA0
DDR_B_RAS#
104
106
108
BA1
VDD
VDD
A10/AP
101
103
105
107
DDR_CS0_DIMMB# 5
DDR_B_MA13
DDR_CS0_DIMMB#
110
112
114
116
118NC120
S0#
VDD
VDD
RAS#
ODT0
NC/A13
BA0
WE#
VDD
CAS#
NC/S1#
VDD
NC/ODT1
109
111
113
115
117
119
DDR_B_D36
DDR_B_D37
122
124
126
VSS
DQ36
DQ37
VSS
DQ32
DQ33
121
123
125
DDR_B_D38
DDR_B_DM4
128
130
132
VSS
VSS
DM4
VSS
DQS4#
DQS4
127
129
131
DDR_B_D39
134
136
138
VSS
DQ38
DQ39
VSS
DQ34
DQ35
133
135
137
DDR_B_D44
DDR_B_D45
DDR_B_DQS#5
140
142
144
146
VSS
DQ44
DQ45
VSS
DQ40
DQ41
139
141
143
145
DDR_B_D46
DDR_B_DQS5
148
150
152
VSS
DQ46
DQS5
DQS5#
VSS
DM5
VSS
DQ42
147
149
151
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
DIMM0 STD H:9.2mm (Bot)
C1600.1U_0402_16V7K C1600.1U_0402_16V7K
C119
0.1U_0402_16V7K
C119
0.1U_0402_16V7K
1
1 2
DDR_B_D0
DDR_B_D1
DDR_B_D3
DDR_B_D2
DDR_B_DQS#0
DDR_B_DQS0
DDR_B_D8
DDR_B_D9
DDR_B_D11
DDR_B_D10
DDR_B_DQS#1
DDR_B_DQS1
DDR_B_D16
DDR_B_D17
DDR_B_DQS#2
DDR_B_D18 DDR_B_D22
DDR_B_D19
DDR_B_DQS2
DDR_B_D24
DDR_B_D25
DDR_B_DM3
DDR_B_D26
DDR_B_D27
DDR_CKE0_DIMMB
DDR_B_BS#2
DDR_B_MA12
DDR_B_MA9
DDR_B_MA5
DDR_B_MA3
DDR_B_MA1
DDR_B_BS#0
DDR_B_MA10
DDR_B_WE#
DDR_B_CAS# DDR_B_ODT0
DDR_B_D33
DDR_B_D32
DDR_B_ODT1
DDR_CS1_DIMMB#
DDR_B_D34
DDR_B_D35
DDR_B_DQS4
DDR_B_DQS#4
DDR_B_D41
DDR_B_D40
DDR_B_DM5
DDR_B_D42
DDR_B_D43 DDR_B_D47
DDR_B_D48
DDR_B_D49 DDR_B_D53
DDR_B_D51 DDR_B_D55
DDR_B_D50
DDR_B_DQS6
DDR_B_DQS#6
DDR_B_D56
DDR_B_D57
DDR_B_DM7
DDR_B_D59
DDR_B_D58
2
+3VS
SMB_CK_DAT09,15,21,27
C104
1000P_0402_25V8J
C104
1000P_0402_25V8J
1
2
A
+V_DDR_MCH_REF9
1 1
2 2
DDR_CKE0_DIMMB5
DDR_B_BS#25
DDR_B_BS#05
DDR_B_WE#5
DDR_B_CAS#5
DDR_CS1_DIMMB#5
DDR_B_ODT15
3 3
SMB_CK_CLK09,15,21,27
A
4 4
Page 9

0.1
0.1
0.1
9 45Wednesday, February 25, 2009
9 45Wednesday, February 25, 2009
9 45Wednesday, February 25, 2009
E
+1.8V
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1 2
1 2
C88 0.1U_0402_16V7KC88 0.1U_0402_16V7K
C87 0.1U_0402_16V7KC87 0.1U_0402_16V7K
+0.9V
RP1
DDR_A_DQS[0..7] 5
DDR_A_D[0..63] 5
DDR_A_DM[0..7] 5
DDR_A_DQS#[0..7] 5
DDR_A_MA[0..15] 5
D
DDR_A_D[0..63]
DDR_A_MA[0..15]
DDR_A_DM[0..7]
DDR_A_DQS[0..7]
DDR_A_DQS#[0..7]
RP1
1 8
2 7
DDR_A_MA6
DDR_A_MA14
3 6
DDR_A_MA7
C90 0.1U_0402_16V7KC90 0.1U_0402_16V7K
RP2
RP2
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_A_MA11
DDR_CKE0_DIMMA
1 2
1 2
C89 0.1U_0402_16V7KC89 0.1U_0402_16V7K
182736
DDR_A_BS#2
DDR_CKE1_DIMMA
1 2
C91 0.1U_0402_16V7KC91 0.1U_0402_16V7K
45
RP3
RP3
1 8
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_A_MA15
DDR_A_BS#1
1 2
C92 0.1U_0402_16V7KC92 0.1U_0402_16V7K
2 7
3 6
DDR_A_MA0
DDR_A_MA2
1 2
C93 0.1U_0402_16V7KC93 0.1U_0402_16V7K
182736
RP4
RP4
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_A_MA5
DDR_A_MA4
1 2
C94 0.1U_0402_16V7KC94 0.1U_0402_16V7K
45
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_A_MA8
DDR_A_MA9
DDR_A_MA12
1 2
1 2
C97 0.1U_0402_16V7KC97 0.1U_0402_16V7K
C98 0.1U_0402_16V7KC98 0.1U_0402_16V7K
182736
45
RP5
RP5
DDR_A_BS#0
DDR_A_MA10
DDR_A_MA3
DDR_A_MA1
1 2
1 2
C99 0.1U_0402_16V7KC99 0.1U_0402_16V7K
C100 0.1U_0402_16V7KC100 0.1U_0402_16V7K
182736
45
RP6
RP6
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_A_CAS#
DDR_CS1_DIMMA#
DDR_A_ODT1
DDR_A_WE#
1 2
1 2
C102 0.1U_0402_16V7KC102 0.1U_0402_16V7K
C101 0.1U_0402_16V7KC101 0.1U_0402_16V7K
RP7
RP7
1 8
2 7
3 6
4 5
47_0804_8P4R_5%
47_0804_8P4R_5%
DDR_CS0_DIMMA#
DDR_A_RAS#
DDR_A_MA13
DDR_A_ODT0
47_0804_8P4R_5%
47_0804_8P4R_5%
Title
Title
Title
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
E
LA-4971P
LA-4971P
LA-4971P
DDRII SO-DIMM 1
DDRII SO-DIMM 1
DDRII SO-DIMM 1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
C
12
DDR_A_CLK0 5
DDR_A_CLK#0 5
DDR_CKE1_DIMMA 5
DDR_CS0_DIMMA# 5
DDR_A_ODT0 5
DDR_A_RAS# 5
DDR_A_BS#1 5
< EMI require >< EMI require >
DDR_A_D4
DDR_A_D6
DDR_A_D7
DDR_A_D5
C161 0.1U_0402_16V7KC161 0.1U_0402_16V7K
+1.8V+1.8V
2
6
VSS
DQ44DQ5
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1
JDDRL
JDDRL
B
C1930.1U_0402_16V7K C1930.1U_0402_16V7K
1 2
DDR_A_D0
+V_DDR_MCH_REF
C95
1000P_0402_25V8J
C95
1000P_0402_25V8J
1
2
C96
0.1U_0402_16V7K
C96
0.1U_0402_16V7K
1
2
DDR_A_DM0
8
10
12
VSS
VSS
DM0
DDR_A_D1
DDR_A_DQS#0
DDR_A_D12
DDR_A_D13
16
18
VSS
DQ614DQ7
DQ1220DQ13
DDR_A_D3
DDR_A_D2
DDR_A_DQS0
22
DDR_A_DM1
24
26
28
VSS
VSS
DM1
DDR_A_D9
DDR_A_D8
DDR_A_DQS#1
DDR_A_D14
30
32
34
CK0
VSS
CK0#
DDR_A_D10
DDR_A_DQS1
DDR_A_D15
38
VSS40VSS
DQ1436DQ15
DDR_A_D11
DDR_A_D21
42
46
DQ2044DQ21
DDR_A_D16 DDR_A_D20
DDR_A_D17
48NC50
VSS
DDR_A_DQS#2
DDR_A_D23
DDR_A_D22
DDR_A_DM2
52
54
58
VSS
DM2
DQ2256DQ23
DDR_A_D19
DDR_A_D18
DDR_A_DQS2
DDR_A_D29
DDR_A_D28
60
64
VSS
DQ2862DQ29
DDR_A_D24
DDR_A_D25
66
DDR_A_D30
DDR_A_DQS3
DDR_A_DQS#3
68
70
72
VSS
VSS
DQ3074DQ31
DQS3
DQS3#
DDR_A_D26
DDR_A_DM3
DDR_CKE1_DIMMA
DDR_A_D31
DDR_A_MA15
76
78
80
82
VSS
VDD
NC/CKE1
DDR_CKE0_DIMMA
DDR_A_D27
DDR_CKE0_DIMMA5
DDR_A_MA11
DDR_A_MA14
DDR_A_MA7
86
88
90A792A694
A11
VDD
NC/A1584NC/A14
DDR_A_BS#2
DDR_A_MA12
DDR_A_MA9
DDR_A_BS#25
DDR_A_MA6
DDR_A_MA8
DDR_A_MA4
DDR_A_MA2
96A498A2100A0102
VDD
DDR_A_MA1 DDR_A_MA0
DDR_A_MA3
DDR_A_MA5
DDR_A_BS#1
104
106
BA1
VDD
VDD
A10/AP
101
103
105
DDR_A_MA10
DDR_A_RAS#
DDR_CS0_DIMMA#
DDR_A_MA13
108
110
112
114
116
118NC120
S0#
VDD
RAS#
ODT0
NC/A13
BA0
WE#
VDD
CAS#
NC/S1#
107
109
111
113
115
117
DDR_CS1_DIMMA#
DDR_A_WE#
DDR_A_CAS# DDR_A_ODT0
DDR_A_BS#0
DDR_A_BS#05
DDR_A_WE#5
DDR_A_CAS#5
DDR_CS1_DIMMA#5
DDR_A_D36
DDR_A_D37
122
124
126
VSS
VDD
DQ36
VDD
NC/ODT1
VSS
DQ32
119
121
123
125
DDR_A_ODT1
DDR_A_D33
DDR_A_D32
DDR_A_ODT15
DDR_A_DM4
128
130
132
VSS
VSS
DM4
DQ37
DQ33
VSS
DQS4#
DQS4
127
129
131
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_D38
DDR_A_D44
DDR_A_D39
134
136
138
140
VSS
DQ38
DQ39
VSS
DQ34
DQ35
133
135
137
139
DDR_A_D35
DDR_A_D34
DDR_A_D45
DDR_A_DQS#5
142
144
146
VSS
DQ44
DQ45
VSS
DQ40
DQ41
141
143
145
DDR_A_D41
DDR_A_D40
DDR_A_DQS5
148
150
VSS
DQS5
DQS5#
VSS
DM5
VSS
147
149
DDR_A_DM5
DDR_A_D46
DDR_A_D47
DDR_A_D52
152
154
156
158
VSS
DQ46
DQ47
DQ42
DQ43
VSS
151
153
155
157
DDR_A_D43
DDR_A_D48
DDR_A_D42
DDR_A_D53
160
162
164
VSS
DQ52
DQ53
DQ48
DQ49
VSS
159
161
163
DDR_A_D49
DDR_A_CLK1 5
DDR_A_CLK#1 5
DDR_A_DM6
166
168
170
CK1
VSS
DM6
CK1#
NC,TEST
VSS
DQS6#
DQS6
165
167
169
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_D55
DDR_A_D54
172
174
176
VSS
DQ54
VSS
DQ50
171
173
175
DDR_A_D50
DDR_A_D51
DDR_A_D60
178
180
VSS
DQ55
DQ60
DQ51
VSS
DQ56
177
179
DDR_A_D56
DDR_A_D61
DDR_A_DQS7
DDR_A_DQS#7
182
184
186
188
VSS
DQ61
DQS7#
DQ57
VSS
DM7
181
183
185
187
DDR_A_D57
DDR_A_DM7
DDR_A_D63
DDR_A_D62
190
192
194
VSS
DQ62
DQ63
DQS7
VSS
DQ58
DQ59
VSS
189
191
193
DDR_A_D59
DDR_A_D58
196
195
Security Classification
Security Classification
Security Classification
198
200
204
SA1
VSS
SAO
SDA
SCL
VDDSPD
197
199
203
+3VS
SMB_CK_DAT08,15,21,27
SMB_CK_CLK08,15,21,27
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VSS
PTI_A5652D-A0G16-P@
PTI_A5652D-A0G16-P@
VSS
DIMM0 STD H:5.2mm (Bot)
B
C103
0.1U_0402_16V7K
C103
0.1U_0402_16V7K
1
2
R43
1K_0402_1%
R43
1K_0402_1%
R44
1K_0402_1%
R44
A
+1.8V
1K_0402_1%
1 2
1 2
+V_DDR_MCH_REF8
1 1
2 2
3 3
4 4
A
Page 10

PCIE_MTX_C_GRX_P[0..15] 19
E
PCIE_MTX_C_GRX_P[0..15]
Polarity inversion
PCIE_MTX_C_GRX_N[0..15] 19
PCIE_MTX_C_GRX_N[0..15]
Polarity inversion
Polarity inversion
< To MXM VGA board >< From MXM VGA board >
Polarity inversion
Polarity inversion
< To LAN >
< To WLAN >
< To New Card >
PCIE_ITX_C_PRX_P2 27
PCIE_ITX_C_PRX_N2 27
PCIE_ITX_C_PRX_P3 26
PCIE_ITX_C_PRX_P0 27
PCIE_ITX_C_PRX_N3 26
PCIE_ITX_C_PRX_N0 27
AUX0 and HPD0
< To SB700 : x4 PCEI A-link>< From SB700 : x4 PCIE A-link >
< TX Impedance Calibration. Connect to GND >
< RX Impedance Calibration. Connect to VDDPCIE >
DP0 GFX_TX0,TX1,TX2 and TX3
RS780M Display Port Support (muxed on GFX)
SB_TX0P 20
SB_TX1N 20
SB_TX0N 20
SB_TX1P 20
+1.1VS
SB_TX2P 20
SB_TX2N 20
SB_TX3N 20
SB_TX3P 20
HDMI_TXD2+ 18,19
HDMI_TXD2- 18,19
AUX1 and HPD1
1 2
1 2
1 2
R76 0_0402_5%IHDMI@ R76 0_0402_5%IHDMI@
R74 0_0402_5%IHDMI@ R74 0_0402_5%IHDMI@
R75 0_0402_5%IHDMI@ R75 0_0402_5%IHDMI@
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P0
DP1 GFX_TX4,TX5,TX6 and TX7
PCIE_MTX_GRX_P1
< If integrated GFX is used, some PCIE pairs are used as HDMI signal pairs >
HDMI_CLK0+ 18,19
HDMI_CLK0- 18,19
HDMI_TXD1+ 18,19
HDMI_TXD1- 18,19
HDMI_TXD0+ 18,19
HDMI_TXD0- 18,19
1 2
1 2
1 2
1 2
1 2
R82 0_0402_5%IHDMI@ R82 0_0402_5%IHDMI@
R84 0_0402_5%IHDMI@ R84 0_0402_5%IHDMI@
R81 0_0402_5%IHDMI@ R81 0_0402_5%IHDMI@
R85 0_0402_5%IHDMI@ R85 0_0402_5%IHDMI@
R83 0_0402_5%IHDMI@ R83 0_0402_5%IHDMI@
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
PCIE_MTX_GRX_N3
0.1Custom
0.1Custom
0.1Custom
10 45Wednesday, February 25, 2009
10 45Wednesday, February 25, 2009
10 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
RS780M&RX781-HT/PCIE
RS780M&RX781-HT/PCIE
RS780M&RX781-HT/PCIE
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N0
C
PCIE_MTX_GRX_P0
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3PCIE_MTX_GRX_N3
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_N1
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C125 0.1U_0402_16V7KPM@ C125 0.1U_0402_16V7KPM@
C121 0.1U_0402_16V7KPM@ C121 0.1U_0402_16V7KPM@
C123 0.1U_0402_16V7KPM@ C123 0.1U_0402_16V7KPM@
C120 0.1U_0402_16V7KPM@ C120 0.1U_0402_16V7KPM@
C122 0.1U_0402_16V7KPM@ C122 0.1U_0402_16V7KPM@
C126 0.1U_0402_16V7KPM@ C126 0.1U_0402_16V7KPM@
C127 0.1U_0402_16V7KPM@ C127 0.1U_0402_16V7KPM@
C124 0.1U_0402_16V7KPM@ C124 0.1U_0402_16V7KPM@
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_P3
A5
B5
A4
B4
C3
B2
D1
GFX_TX0P
GFX_TX1P
GFX_TX2P
GFX_TX3P
GFX_TX0N
GFX_TX1N
GFX_TX2N
PART 2 OF 6
PART 2 OF 6
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P7
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C133 0.1U_0402_16V7KPM@ C133 0.1U_0402_16V7KPM@
C134 0.1U_0402_16V7KPM@ C134 0.1U_0402_16V7KPM@
C128 0.1U_0402_16V7KPM@ C128 0.1U_0402_16V7KPM@
C131 0.1U_0402_16V7KPM@ C131 0.1U_0402_16V7KPM@
C129 0.1U_0402_16V7KPM@ C129 0.1U_0402_16V7KPM@
C130 0.1U_0402_16V7KPM@ C130 0.1U_0402_16V7KPM@
C132 0.1U_0402_16V7KPM@ C132 0.1U_0402_16V7KPM@
PCIE_MTX_GRX_P4
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_P5
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P7
D2
E2
E1
F4
F3
F1
F2
GFX_TX4P
GFX_TX5P
GFX_TX6P
GFX_TX3N
GFX_TX4N
GFX_TX5N
GFX_TX6N
PCIE_MTX_C_GRX_N7
1 2
1 2
1 2
1 2
1 2
C138 0.1U_0402_16V7KPM@ C138 0.1U_0402_16V7KPM@
C136 0.1U_0402_16V7KPM@ C136 0.1U_0402_16V7KPM@
C137 0.1U_0402_16V7KPM@ C137 0.1U_0402_16V7KPM@
C135 0.1U_0402_16V7KPM@ C135 0.1U_0402_16V7KPM@
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P9
PCIE_MTX_GRX_N7
H4
H3
H1
H2
J2
GFX_TX7P
GFX_TX8P
GFX_TX7N
GFX_TX8N
PCIE_MTX_C_GRX_P12
1 2
1 2
1 2
1 2
1 2
1 2
C139 0.1U_0402_16V7KPM@ C139 0.1U_0402_16V7KPM@
C145 0.1U_0402_16V7KPM@ C145 0.1U_0402_16V7KPM@
C140 0.1U_0402_16V7KPM@ C140 0.1U_0402_16V7KPM@
C141 0.1U_0402_16V7KPM@ C141 0.1U_0402_16V7KPM@
C142 0.1U_0402_16V7KPM@ C142 0.1U_0402_16V7KPM@
C144 0.1U_0402_16V7KPM@ C144 0.1U_0402_16V7KPM@
C143 0.1U_0402_16V7KPM@ C143 0.1U_0402_16V7KPM@
PCIE_MTX_GRX_N9
PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N11
PCIE_MTX_GRX_P11
PCIE_MTX_GRX_P12
PCIE_MTX_GRX_N12
J1
K4
K3
K1
K2
M4
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX11P
GFX_TX12P
GFX_TX10N
GFX_TX11N
1 2
M3
GFX_TX12N
GM : RS780MN & RS780MC, PM : RX781
GFX_RX0PD4GFX_RX0NC4GFX_RX1PA3GFX_RX1NB3GFX_RX2PC2GFX_RX2NC1GFX_RX3PE5GFX_RX3NF5GFX_RX4PG5GFX_RX4NG6GFX_RX5PH5GFX_RX5NH6GFX_RX6PJ6GFX_RX6NJ5GFX_RX7PJ7GFX_RX7NJ8GFX_RX8PL5GFX_RX8NL6GFX_RX9PM8GFX_RX9NL8GFX_RX10PP7GFX_RX10NM7GFX_RX11PP5GFX_RX11NM5GFX_RX12PR8GFX_RX12NP8GFX_RX13PR6GFX_RX13NR5GFX_RX14PP4GFX_RX14NP3GFX_RX15PT4GFX_RX15N
U3B
U3B
B
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12
PCIE_GTX_C_MRX_P12
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N14
1 2
1 2
1 2
C146 0.1U_0402_16V7KPM@ C146 0.1U_0402_16V7KPM@
PCIE_MTX_GRX_P13
M1
PCIE_GTX_C_MRX_N13
1 2
1 2
1 2
1 2
1 2
C148 0.1U_0402_16V7KPM@ C148 0.1U_0402_16V7KPM@
C150 0.1U_0402_16V7KPM@ C150 0.1U_0402_16V7KPM@
C152 0.1U_0402_16V7KC152 0.1U_0402_16V7K
C147 0.1U_0402_16V7KPM@ C147 0.1U_0402_16V7KPM@
C149 0.1U_0402_16V7KPM@ C149 0.1U_0402_16V7KPM@
C151 0.1U_0402_16V7KPM@ C151 0.1U_0402_16V7KPM@
C153 0.1U_0402_16V7KC153 0.1U_0402_16V7K
PCIE_ITX_PRX_P0
PCIE_ITX_PRX_N0
PCIE_MTX_GRX_N14
PCIE_MTX_GRX_P14
PCIE_MTX_GRX_P15
AC1
M2
GFX_TX13P
GFX_TX13N
PCIE_GTX_C_MRX_P13
AC2
N2
N1
P1
P2
GPP_TX0P
GFX_TX14P
GFX_TX15P
GFX_TX14N
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
GPP_RX0P
T3
AE3
AD4
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P15
1 2
1 2
C157 0.1U_0402_16V7KWLAN@ C157 0.1U_0402_16V7KWLAN@
C156 0.1U_0402_16V7KWLAN@ C156 0.1U_0402_16V7KWLAN@
PCIE_ITX_PRX_P2
PCIE_ITX_PRX_N2
AA2
AA1
AB4
AB3
GPP_TX2P
GPP_TX1P
GPP_TX0N
GPP_TX1N
PCIE I/F GPP
PCIE I/F GPP
GPP_RX2P
GPP_RX0N
GPP_RX1P
GPP_RX1N
AE2
AD1
AD2
AD3
1 2
1 2
C158 0.1U_0402_16V7KC158 0.1U_0402_16V7K
C159 0.1U_0402_16V7KC159 0.1U_0402_16V7K
PCIE_ITX_PRX_P3
PCIE_ITX_PRX_N3
Y1
Y2
Y4
Y3
V1
V2
GPP_TX3P
GPP_TX4P
GPP_TX5P
GPP_TX2N
GPP_TX3N
GPP_TX4N
GPP_RX2N
GPP_RX3PV5GPP_RX3N
GPP_RX4PU5GPP_RX4NU6GPP_RX5PU8GPP_RX5N
U7
W6
1 2
1 2
1 2
C165 0.1U_0402_16V7KC165 0.1U_0402_16V7K
C164 0.1U_0402_16V7KC164 0.1U_0402_16V7K
C163 0.1U_0402_16V7KC163 0.1U_0402_16V7K
C162 0.1U_0402_16V7KC162 0.1U_0402_16V7K
SB_TX0P_C
SB_TX0N_C
SB_TX1P_C
SB_TX1N_C
AD7
AE7
AE6
SB_TX0P
SB_TX1P
SB_TX0N
GPP_TX5N
SB_RX0P
SB_RX0NY8SB_RX1P
AA8
AA7
1 2
1 2
1 2
1 2
1 2
C167 0.1U_0402_16V7KC167 0.1U_0402_16V7K
C166 0.1U_0402_16V7KC166 0.1U_0402_16V7K
C168 0.1U_0402_16V7KC168 0.1U_0402_16V7K
C169 0.1U_0402_16V7KC169 0.1U_0402_16V7K
SB_TX2P_C
SB_TX2N_C
SB_TX3P_C
SB_TX3N_C
AD5
AE5
AD6
AC6
AB6
SB_TX3P
SB_TX2P
SB_TX3N
SB_TX1N
SB_TX2N
PCIE I/F SB
PCIE I/F SB
SB_RX3PW5SB_RX3N
SB_RX1N
SB_RX2P
SB_RX2N
Y5
Y7
AA5
AA6
H_CADIP[0..15] 4
H_CADIN[0..15] 4
H_CADIN[0..15]
H_CADIP[0..15]H_CADOP[0..15]
1 2
1 2
R56 2K_0402_1%R56 2K_0402_1%
R55 1.27K_0402_1%R55 1.27K_0402_1%
H_CADIN0
H_CADIP1
H_CADIN1
H_CADIP0
PCIE_CALRP
PCIE_CALRN
E24
E25
D24
AC8
D25
AB8
HT_TXCAD1P
HT_TXCAD0P
HT_TXCAD0N
PCE_CALRP(PCE_BCALRP)
PCE_CALRN(PCE_BCALRN)
PART 1 OF 6
PART 1 OF 6
HT_RXCAD1P
HT_RXCAD0P
HT_RXCAD0N
U3A
U3A
RS780M_FCBGA528
RS780M_FCBGA528
Y25
Y24
V22
V23
RS780MCR3@
RS780MCR3@
H_CADOP0
H_CADON0
H_CADOP1
H_CADON1
H_CADIN2
H_CADIP2
H_CADIN3
H_CADIP3
F23
F22
F24
F25
HT_TXCAD3P
HT_TXCAD2P
HT_TXCAD3N
HT_TXCAD2N
HT_TXCAD1N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1N
V25
V24
U24
U25
H_CADON2
H_CADOP2
H_CADOP3
H_CADON3
H_CADIN4
H_CADIP4
H_CADIN5
H_CADIP5
J25
J24
H23
H22
HT_TXCAD5P
HT_TXCAD4P
HT_TXCAD5N
HT_TXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
T25
T24
P22
P23
H_CADON4
H_CADOP4
H_CADOP5
H_CADON5
H_CADIN6
H_CADIP6
H_CADIN7
H_CADIP7
K23
K22
K24
K25
HT_TXCAD7P
HT_TXCAD6P
HT_TXCAD7N
HT_TXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
P25
P24
N24
N25
H_CADOP6
H_CADON6
H_CADOP7
H_CADON7
H_CADIN8
H_CADIP8
H_CADIN9
H_CADIP9
G20
H21
F21
G21
HT_TXCAD9P
HT_TXCAD8P
HT_TXCAD9N
HT_TXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
AB25
AB24
AC24
AC25
H_CADON9
H_CADOP9
H_CADOP8
H_CADON8
H_CADIN10
H_CADIP10
H_CADIP11
H_CADIN11
H_CADIP12
J18
K17
J20
J21
HT_TXCAD11P
HT_TXCAD10P
HT_TXCAD11N
HT_TXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
Y22
Y23
AA24
AA25
H_CADOP12
H_CADOP11
H_CADON11
H_CADON10
H_CADOP10
H_CADIN12
H_CADIN13
H_CADIP13
H_CADIP14
M21
M19
L18
L19
J19
HT_TXCAD13P
HT_TXCAD12P
HT_TXCAD13N
HT_TXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
V21
V20
U20
W21
W20
H_CADOP14
H_CADOP13
H_CADON13
H_CADON12
H_CADIN14
H_CADIN15
H_CADIP15
P18
M18
P21
HT_TXCAD15P
HT_TXCAD14P
HT_TXCAD15N
HT_TXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
U19
U18
U21
H_CADOP15
H_CADON15
H_CADON14
H_CLKIP0 4
H_CLKIP1 4
H_CLKIN0 4
H_CLKIN1 4
L21
L20
H24
H25
HT_TXCLK1P
HT_TXCLK0P
HT_TXCLK1N
HT_TXCLK0N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
T22
T23
AB23
AA22
< Transmitter Calibration Resistor to HT_TXCALN >
1 2
H_CTLIP0 4
H_CTLIP1 4H_CTLOP14
H_CTLIN0 4
H_CTLIN1 4
R58 301_0402_1%R58 301_0402_1%
HT_TXCALP
HT_TXCALN
H_CTLIN0
H_CTLIP0
H_CTLIP1
H_CTLIN1
0718 Place within 1"
layout 1:2
M24
M25
P19
R18
B24
B25
HT_TXCALP
HT_TXCALN
HT_TXCTL0P
HT_TXCTL1P
HT_TXCTL0N
HT_TXCTL1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
NEED CHECK R57 & R58 WITH AMD
RS780M_FCBGA528RS780MCR3@
RS780M_FCBGA528RS780MCR3@
A24
R21
R20
C23
M22
M23
HT_RXCALP
HT_RXCALN
H_CTLON0
H_CTLOP0
H_CTLOP1
H_CTLON1
R57301_0402_1% R57301_0402_1%
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
Polarity inversion
A
PCIE_GTX_C_MRX_P[0..15] 19
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
Polarity inversion
Polarity inversion
Polarity inversion
PCIE_GTX_C_MRX_N[0..15] 19
Polarity inversion
Polarity inversion
Polarity inversion
1 1
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
Polarity inversion
PCIE_PTX_C_IRX_P027
PCIE_PTX_C_IRX_N027
PCIE_PTX_C_IRX_P326
PCIE_PTX_C_IRX_N326
PCIE_PTX_C_IRX_P227
PCIE_PTX_C_IRX_N227
< To LAN >
< To WLAN >
< To New Card >
1 2
H_CTLOP04
H_CLKOP04
H_CLKOP14
H_CTLON04
SB_RX1P20
SB_RX1N20
SB_RX0P20
SB_RX0N20
SB_RX3P20
SB_RX3N20
SB_RX2P20
SB_RX2N20
H_CADOP[0..15] 4
H_CADON[0..15] 4
H_CADON[0..15]
2 2
< From S1G2 CPU : x16 HT> < To S1G2 CPU : x16 HT>
3 3
H_CLKON04
H_CTLON14
H_CLKON14
0718 Place within 1"
layout 1:2
A
4 4
Page 11

0.1
0.1
0.1
E
D
C
U3C
U3C
AVDD=100mA
+AVDD1
B
UMA_LCD_TXOUT0_A0- 17
UMA_LCD_TXOUT0_A0+ 17
A22
B22
TXOUT_L0P(NC)
TXOUT_L0N(NC)
PART 3 OF 6
PART 3 OF 6
AVDD1(NC)
AVDD2(NC)
F12
E12
+AVDD2
< LVDS dual channel : channel 1 >
UMA_LCD_TXOUT0_A2- 17
UMA_LCD_TXOUT0_A1- 17
UMA_LCD_TXOUT0_A2+ 17
UMA_LCD_TXOUT0_A1+ 17
A21
B21
B20
A20
TXOUT_L1P(NC)
TXOUT_L2P(NC)
TXOUT_L1N(NC)
AVDDDI(NC)
AVSSDI(NC)
AVDDQ(NC)
F14
H15
H14
G15
+AVDDQ
< LVDS dual channel : channel 2 >
UMA_LCD_TZOUT0_B0+ 17
UMA_LCD_TZOUT0_B1+ 17
UMA_LCD_TZOUT0_B0- 17
UMA_LCD_TZOUT0_B1- 17
A19
B18
B19
A18
A17
B17
TXOUT_L3P(NC)
TXOUT_U0P(NC)
TXOUT_U0N(NC)
TXOUT_L2N(DBG_GPIO0)
TXOUT_L3N(DBG_GPIO2)
TXOUT_U1P(PCIE_RESET_GPIO3)
TXOUT_U1N(PCIE_RESET_GPIO2)
C_Pr(DFT_GPIO5)
Y(DFT_GPIO2)
COMP_Pb(DFT_GPIO4)
RED(DFT_GPIO0)
E17
F17
F15
REDb(NC)
G18
G17
UMA_CRT_R
UMA_CRT_R16
AVSSQ(NC)
UMA_LCD_TXCLK_ACLK- 17
UMA_LCD_TXCLK_ACLK+ 17
UMA_LCD_TZOUT0_B2+ 17
UMA_LCD_TZOUT0_B2- 17
D20
D21
TXOUT_U2P(NC)
GREEN(DFT_GPIO1)
F18
E18
UMA_CRT_G
UMA_CRT_G16
UMA_LCD_TZCLK_BCLK- 17
UMA_LCD_TZCLK_BCLK+ 17
D18
D19
B16
A16
D16
D17
TXOUT_U2N(NC)
TXOUT_U3N(NC)
TXCLK_LP(DBG_GPIO1)
TXCLK_LN(DBG_GPIO3)
TXCLK_UP(PCIE_RESET_GPIO4)
TXCLK_UN(PCIE_RESET_GPIO1)
TXOUT_U3P(PCIE_RESET_GPIO5)
CRT/TVOUT
CRT/TVOUT
BLUE(DFT_GPIO3)
DAC_VSYNC(PWM_GPIO6)
DAC_HSYNC(PWM_GPIO4)
GREENb(NC)
BLUEb(NC)
DAC_SCL(PCE_RCALRN)
DAC_SDA(PCE_TCALRN)
F8
E8
F19
E19
B11
A11
G14
UMA_CRT_VSYNC
UMA_CRT_HSYNC
R65 715_0402_1%GPM@ R65 715_0402_1%GPM@
UMA_CRT_B
UMA_CRT_B16
UMA_CRT_CLK16
UMA_CRT_DATA16
UMA_CRT_HSYNC14,16
UMA_CRT_VSYNC14,16
+VDDLTP18
+VDDLT18
A13
B13
B15
A14
B14
C14
A15
VDDLT18_2(NC)
VDDLT33_1(NC)
VDDLT18_1(NC)
VDDA18HTPLL
PLLVDD18(NC)
PLLVSS(NC)
B12
H17
D14
+NB_HTPVDD
+VDDA18HTPLL
VSSLT1(VSS)
VDDLT33_2(NC)
LVTM
LVTM
VDDA18PCIEPLL1
VDDA18PCIEPLL2
E7
D7
+VDDA18PCIEPLL
VSSLTP18(NC)
VDDLTP18(NC)
PLLVDD(NC)
DAC_RSET(PWM_GPIO1)
A12
+NB_HTPVDD
+NB_PLLVDD
1 2
R65 715_0402_1%GM@ R65 715_0402_1%GM@
+NB_PLLVDD
D15
C16
C18
C20
E20
C22
VSSLT2(VSS)
VSSLT3(VSS)
VSSLT4(VSS)
VSSLT5(VSS)
VSSLT6(VSS)
SYSRESETbD8POWERGOOD
LDTSTOPb
ALLOW_LDTSTOP
A10
C10
C12
NB_RESET#
NB_PWRGD
1 2
R67 0_0402_5%R67 0_0402_5%
NB_PWRGD21
PLT_RST#14,19,20,26,27,33,34
LDT_STOP#6,20
CPU_LDT_REQ#6,20
< LVDS digital power enable >
UMA_ENVDD 17
R79 0_0402_5%GM@ R79 0_0402_5%GM@
E9
VSSLT7(VSS)
LVDS_DIGON(PCE_TCALRP)
PM
PM
REFCLK_P/OSCIN(OSCIN)
HT_REFCLKN
HT_REFCLKP
REFCLK_N(PWM_GPIO3)
F11
E11
C24
C25
CLK_NBHT15
CLK_NBHT#15
NB_OSC_14.318M15
< LVDS backlight enable >
UMA_ENBKL 34
12
R73 100K_0402_5%GPM@ R73 100K_0402_5%GPM@
R73 100K_0402_5%GM@ R73 100K_0402_5%GM@
1 2
T17PAD T17PAD
F7
G12
LVDS_BLON(PCE_RCALRP)
LVDS_ENA_BL(PWM_GPIO2)
CLOCKs PLL PWR
CLOCKs PLL PWR
GFX_REFCLKP
GFX_REFCLKN
GPP_REFCLKP
GPP_REFCLKN
GPPSB_REFCLKP(SB_REFCLKP)
GPPSB_REFCLKN(SB_REFCLKN)
T2
T1
V4
V3
U1
U2
NBGFX_CLK15
NBGFX_CLK#15
CLK_SBLINK_BCLK15
CLK_SBLINK_BCLK#15
< Strap option pin or gate side-port memory IO >
< HDMI hot-plug detection >
SUS_STAT# 14,21
HPD 18,19,21
1 2
R78 0_0402_5%GM@ R78 0_0402_5%GM@
R78 0_0402_5%GPM@ R78 0_0402_5%GPM@
D10
D9
TMDS_HPD(NC)
MIS.
MIS.
I2C_CLKB9STRP_DATA
I2C_DATA
B8
A9
UMA_LCD_DDC_DAT17
UMA_LCD_DDC_CLK17
1 2
R80 1.8K_0402_5%R80 1.8K_0402_5%
AE8
AD8
D13
D12
HPD(NC)
DDC_DATA0/AUX0N(NC)
HDMIDAT_UMA18
TESTMODE
THERMALDIODE_P
THERMALDIODE_N
SUS_STAT#(PWM_GPIO5)
DDC_CLK0/AUX0P(NC)
DDC_DATA1/AUX1N(NC)
DDC_CLK1/AUX1P(NC)
RSVD
A8
A7
B7
B10
G11
12
R88 10K_0402_5%@ R88 10K_0402_5%@
+3VS
HDMICLK_UMA18
C8
AUX_CAL(NC)
AUX_CAL14
Strap pin
UMA_CRT_R
UMA_CRT_G
1 2
R62 140_0402_1%GM@ R62 140_0402_1%GM@
1 2
R63 150_0402_1%GM@ R63 150_0402_1%GM@
UMA_CRT_B
1 2
R64 150_0402_1%GM@ R64 150_0402_1%GM@
NB_PWRGD
1 2
R371 300_0402_5%R371 300_0402_5%
RS780 use 140 ohm, check RS880 use what value
+1.8VS
C198
0_0402_5%
C198
0_0402_5%
C198
0.1U_0402_16V7K
C198
L4
0_0603_5%GM@L40_0603_5%GM@
+AVDD1 +AVDD2
C170
0_0603_5%
C170
0_0603_5%
PM1@
PM1@
L2
BLM18PG121SN1D_0603GM@L2BLM18PG121SN1D_0603GM@
+3VS +1.8VS
1
C172
C172
1
C170
C170
1
1 2
0.1U_0402_16V7K
2
GM@
GM@
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
GM@
GM@
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
GM@
GM@
PM1@
PM1@
C172
0_0603_5%
C172
0_0603_5%
PM1@
PM1@
L4
0_0603_5%
L4
0_0603_5%
GPM@
GPM@
RS780M_FCBGA528
RS780M_FCBGA528
RS780MCR3@
RS780MCR3@
L2
0_0603_5%
L2
0_0603_5%
GPM@
GPM@
< Dedicated power for the DAC which can affect display quality > < Dedicated power for the DAC which can affect display quality >
+VDDLTP18
C171
0_0603_5%
C171
0_0603_5%
C171
2.2U_0603_6.3V4Z
C171
2.2U_0603_6.3V4Z
1
L3
BLM18PG121SN1D_0603GM@L3BLM18PG121SN1D_0603GM@
12
+NB_HTPVDD
1
L7
BLM18PG121SN1D_0603GM@L7BLM18PG121SN1D_0603GM@
1 2
+AVDDQ
C175
C175
1
BLM18PG121SN1D_0603GM@L6BLM18PG121SN1D_0603GM@
1 2
2
GM@
GM@
C176
2.2U_0603_6.3V4Z
C176
2.2U_0603_6.3V4Z
2
GM@
GM@
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
GM@
GM@
PM1@
PM1@
L3
0_0603_5%
L3
0_0603_5%
GPM@
GPM@
< Power for integrated DVI/HDMI PLL macro >
+1.8VS
C176
0_0603_5%
C176
0_0603_5%
PM1@
PM1@
L7
0_0603_5%
L7
0_0603_5%
GPM@
GPM@
< 1.8V power for system PLLs >
+1.8VS
C175
0_0603_5%
C175
0_0603_5%
PM1@
PM1@
L6
L6
0_0603_5%
L6
0_0603_5%
GPM@
GPM@
< DAC Bandgap Reference Voltage >
+1.8VS
+VDDLT18
C173
0_0402_5%
C173
0_0402_5%
C173
0.1U_0402_16V7K
C173
0.1U_0402_16V7K
1
PM1@
PM1@
L5
0_0603_5%
L5
0_0603_5%
GPM@
GPM@
< 1.8V IO power for the integrated DVI/HDMI interface >< 1.1V Power for system PLLs >
+1.8VS
C178
0_0603_5%
C178
0_0603_5%
PM1@
PM1@
L9
0_0603_5%
L9
0_0603_5%
GPM@
GPM@
+1.1VS
1 2
L10 BLM18PG121SN1D_0603L10 BLM18PG121SN1D_0603
< IO power for HyperTransport PLL >
+1.8VS +VDDA18HTPLL
2
GM@
GM@
C174
4.7U_0805_10V4Z
C174
4.7U_0805_10V4Z
1
2
GM@
GM@
L5
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
12
GM@ L5
GM@
+NB_PLLVDD
C178
2.2U_0603_6.3V4Z
C178
2.2U_0603_6.3V4Z
1
2
GM@
GM@
L9
BLM18PG121SN1D_0603GM@L9BLM18PG121SN1D_0603GM@
1 2
C179
2.2U_0603_6.3V4Z
C179
2.2U_0603_6.3V4Z
1
2
< 1.8V IO power for PCI-E PLLs >
+1.8VS
11 45Wednesday, February 25, 2009
11 45Wednesday, February 25, 2009
11 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
RS780 VEDIO/CLK GEN
RS780 VEDIO/CLK GEN
RS780 VEDIO/CLK GEN
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
+VDDA18PCIEPLL
C180
C180
1
1 2
L11 BLM18PG121SN1D_0603L11 BLM18PG121SN1D_0603
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2.2U_0603_6.3V4Z
2.2U_0603_6.3V4Z
2
B
A
< DAC internal reference to set full scale DAC current >
R72
4.7K_0402_5%
R72
1 2
4.7K_0402_5%
12
2 2
3 3
4 4
R71
4.7K_0402_5%
R71
4.7K_0402_5%
+1.1VS
1 1
A
Page 12

0.1
0.1
0.1
12 45Wednesday, February 25, 2009
12 45Wednesday, February 25, 2009
12 45Wednesday, February 25, 2009
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
RS780M&RX781 SIDE PORT
RS780M&RX781 SIDE PORT
RS780M&RX781 SIDE PORT
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
+1.8VS
+1.1VS
2008-09-25 2009-09-25
2008-09-25 2009-09-25
AA18
AA20
AA19
Y19
V17
AA17
MEM_DQ4(NC)
MEM_DQ3/DVO_D0(NC)
MEM_DQ5/DVO_D1(NC)
MEM_DQ2/DVO_DE(NC)
MEM_DQ0/DVO_VSYNC(NC)
MEM_DQ1/DVO_HSYNC(NC)
PAR 4 OF 6
PAR 4 OF 6
MEM_A0(NC)
MEM_A1(NC)
MEM_A2(NC)
MEM_A3(NC)
MEM_A4(NC)
AB12
AE16
V11
AE15
AA12
MEM_A5(NC)
AB16
U3D
U3D
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
MEM_DQ12(NC)
MEM_DQ6/DVO_D2(NC)
MEM_DQ7/DVO_D4(NC)
MEM_DQ8/DVO_D3(NC)
MEM_DQ9/DVO_D5(NC)
MEM_DQ10/DVO_D6(NC)
MEM_DQ11/DVO_D7(NC)
MEM_DQ13/DVO_D9(NC)
MEM_A6(NC)
MEM_A7(NC)
MEM_A8(NC)
MEM_A9(NC)
MEM_A10(NC)
MEM_A11(NC)
MEM_A12(NC)
MEM_A13(NC)
AD14
AD13
AD15
AC16
AE13
AC14
Y14
AB14
W17
AE19
Y17
W18
AD20
AE21
AD21
MEM_DM0(NC)
MEM_DQS1P(NC)
MEM_DQS1N(NC)
MEM_DQ14/DVO_D10(NC)
MEM_DQ15/DVO_D11(NC)
MEM_BA0(NC)
MEM_BA1(NC)
AE17
AD16
MEM_DM1/DVO_D8(NC)
MEM_DQS0P/DVO_IDCKP(NC)
MEM_DQS0N/DVO_IDCKN(NC)
MEM_BA2(NC)
MEM_RASb(NC)
MEM_CASb(NC)
MEM_WEb(NC)
MEM_CSb(NC)
MEM_CKE(NC)
Y12
W12
AB13
AB18
AD17
AD18
AE23
AD23
AE24
IOPLLVDD(NC)
IOPLLVDD18(NC)
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
MEM_ODT(NC)
MEM_CKP(NC)
MEM_CKN(NC)
V14
V15
W14
AE18
IOPLLVSS(NC)
MEM_VREF(NC)
MEM_COMPP(NC)
MEM_COMPN(NC)
RS780M_FCBGA528RS780MCR3@
RS780M_FCBGA528RS780MCR3@
AE12
AD12
2008-09-25 2009-09-25
Security Classification
Security Classification
Security Classification
/
/
/
1
Deciphered Date
Deciphered Date
Deciphered Date
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
2
B B
A A
2
Page 13

+1.1VS
L17FBMA-L11-201209-221LMA30T_0805 L17FBMA-L11-201209-221LMA30T_0805
1 2
E
C21210U_0805_10V4Z C21210U_0805_10V 4Z
C21110U_0805_10V4Z C21110U_0805_10V 4Z
1
2
C2230.1U_0402_16V7K C2230.1U_0402_16V7K
1
2
C2240.1U_0402_16V7K C2240.1U_0402_16V7K
1
2
C2211U_0402_6.3V4Z C2211U_0402_6.3V4Z
1
2
C2221U_0402_6.3V4Z C2221U_0402_6.3V4Z
1
2
C2191U_0402_6.3V4Z C2191U_0402_6.3V4Z
1
2
C2201U_0402_6.3V4Z C2201U_0402_6.3V4Z
D
+VDDA11PCIE
VDDA_12=2.5A
< Main IO power for PCI-E graphics, SB, and GPP interfaces >
J9
M9
K9
L9
VDDPCIE_1A6VDDPCIE_2B6VDDPCIE_3C6VDDPCIE_4D6VDDPCIE_5E6VDDPCIE_6F6VDDPCIE_7G7VDDPCIE_8H8VDDPCIE_9
PART 5/6
PART 5/6
VDDPCIE_11
VDDPCIE_10
R9
T9
V9
VDDPCIE_12
VDDPCIE_13P9VDDPCIE_14
VDDPCIE_15
K12
J14
U9
VDDC_1
VDDPCIE_16
VDDPCIE_17
VDDC_2
+1.1VS
12
PJP9
PJP9
+NB_CORE
VDD_CORE:GM=5A/PM=10A< Core power >
U16
J11
K15
M12
VDDC_3
VDDC_4
VDDC_5
PAD-OPEN 4x4m
PAD-OPEN 4x4m
1
C2320.1U_0402_16V 7K C2320.1U_0402_16V7K
C2440.1U_0402_16V 7K C2440.1U_0402_16V7K
C2310.1U_0402_16V 7K C2310.1U_0402_16V7K
C2300.1U_0402_16V 7K C2300.1U_0402_16V7K
C2430.1U_0402_16V 7K C2430.1U_0402_16V7K
C2420.1U_0402_16V 7K C2420.1U_0402_16V7K
C2410.1U_0402_16V 7K C2410.1U_0402_16V7K
C2400.1U_0402_16V 7K C2400.1U_0402_16V7K
C2470.1U_0402_16V 7K C2470.1U_0402_16V7K
L14
L11
M13
M15
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
C234
C234
+
+
1
C24510U_0805_10V4Z C24510U_0805_10V4Z
1
C23310U_0805_10V4Z C23310U_0805_10V4Z
2
2
2
2
2
2
2
2
2
N12
N14
VDDC_11
VDDC_12
P11
VDDC_13
POWER
POWER
330U_D2E_2.5VM
330U_D2E_2.5VM
2
2
2
1
1
1
1
1
1
1
1
1
P13
VDDC_14
DVT change to B size
P14
R12
R15
T11
T15
U12
T14
J16
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
+3VS
C253
0.1U_0402_16V4Z
C253
0.1U_0402_16V4Z
1
2
GM@
GM@
C250
0.1U_0402_16V4Z
C250
0.1U_0402_16V4Z
1
2
GM@
GM@
< Isolated power for side-port memory interface >
< 3.3V IO power >
H11
Y11
AD10
AC10
AB10
VDD_MEM2(NC)
VDD_MEM3(NC)
VDD_MEM4(NC)
VDD_MEM6(NC)
VDD_MEM5(NC)
H12
VDD33_1(NC)
VDD33_2(NC)
VSSAPCIE1A2VSSAPCIE2B1VSSAPCIE3D3VSSAPCIE4D5VSSAPCIE5E4VSSAPCIE6G1VSSAPCIE7G2VSSAPCIE8G4VSSAPCIE9
PART 6/6
PART 6/6
AE10
AA11
VDD_MEM1(NC)
H7
J4
R7
VSSAPCIE10
L1
L2
L4
L7
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
M6
N4
P6
R1
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
R2
R4
V7
U4
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
V8
V6
W1
W2
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
W4
W7
Y6
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30W8VSSAPCIE31
AA4
AB5
AB1
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
GROUND
GROUND
AB7
AC3
AC4
AE1
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
AE4
AB2
VSSAPCIE39
VSSAPCIE40
AE14
VSS1
D11
VSS2
E14
VSS3G8VSS4
E15
J15
VSS5
J12
VSS6
K14
VSS7
M11
VSS8
VSS9
L15
VSS10
0.1Custom
0.1Custom
0.1Custom
13 45Wednesday, February 25, 2009
13 45Wednesday, February 25, 2009
13 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
RS780M&RX781 PWR/GND
RS780M&RX781 PWR/GND
RS780M&RX781 PWR/GND
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
U3E
U3E
VDDHT_1
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
J17
L16
T16
P16
R16
H18
G19
+VDDHTRX
0.1U_0402_16V7K
0.1U_0402_16V7K
1
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
1
F20
E21
C218
0.1U_0402_16V7K
C218
0.1U_0402_16V7K
C217
0.1U_0402_16V7K
C217
0.1U_0402_16V7K
K16
M16
+VDDHT
C210
C210
1
B
C208
C208
1
< Digital IO power for HyperTransport interface >
C207
0.1U_0402_16V7K
C207
0.1U_0402_16V7K
C216
0.1U_0402_16V7K
C216
1
C206
0.1U_0402_16V7K
C206
0.1U_0402_16V7K
1
2
2
0.1U_0402_16V7K
1
C214
0.1U_0402_16V7K
C214
0.1U_0402_16V7K
1
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
B23
A23
D22
2
2
2
2
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
AE25
AD24
AC23
+VDDHTTX
C229
C229
1
C228
C228
1
C227
C227
1
C226
C226
1
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
Y20
V18
U17
W19
AB22
AA21
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
T17
P17
R17
M17
VDDA18PCIE_1
VDDA18PCIE_2
VDDHTTX_13
J10
P10
K10
+VDDA18PCIE
C239
C239
1
C238
C238
1
C237
C237
1
C236
C236
1
C246
C246
1
VDDA18PCIE_3
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_4
VDDA18PCIE_5
H9
W9
L10
T10
M10
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_8
VDDA18PCIE_9
Y9
R10
AA9
AB9
AD9
VDD18_1F9VDD18_2G9VDD18_MEM1(NC)
VDDA18PCIE_13
VDD18_MEM2(NC)
VDDA18PCIE_14
VDDA18PCIE_15
U10
AE9
AE11
AD11
C252
C252
1
< 1.8V IO transform power >
< 1.8V power for side-port memory interface >
RS780M_FCBGA528RS780MCR3@
RS780M_FCBGA528RS780MCR3@
U3F
U3F
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
GM@
GM@
VSSAHT1
VSSAHT2
A25
E22
D23
C252
0_0402_5%
C252
0_0402_5%
PM1@
PM1@
VSSAHT3
VSSAHT4
G22
1 2
L89 0_0603_5%GPM@ L89 0_0603_5%GPM@
L89 0_0603_5%GM@ L89 0_0603_5%GM@
VSSAHT5
VSSAHT6
G24
G25
VSSAHT7
VSSAHT8
J22
H19
VSSAHT9
VSSAHT10
L17
L22
VSSAHT11
VSSAHT12
VSSAHT13
L24
L25
M20
VSSAHT14
VSSAHT15
VSSAHT16
P20
N22
R19
VSSAHT17
VSSAHT18
VSSAHT19
R22
R24
R25
VSSAHT21
VSSAHT22
VSSAHT20
V19
U22
H20
VSSAHT23
VSSAHT24
VSSAHT25
W22
W24
W25
VSSAHT26
VSSAHT27
Y21
AD25
VSS11
L12
VSS12
M14
N13
VSS13
VSS14
P12
VSS15
P15
VSS16
R11
VSS17
R14
VSS18
T12
U14
VSS19
VSS20
U11
VSS21
U15
VSS22
V12
VSS23
W11
VSS24
W15
VSS25
AC12
VSS26
AA14
VSS27
Y18
VSS28
AB11
VSS29
AB15
VSS30
AB17
AB19
VSS31
VSS32
AE20
VSS34
VSS33
RS780M_FCBGA528
RS780M_FCBGA528
K11
AB21
RS780MCR3@
RS780MCR3@
Security Classification
Security Classification
Security Classification
/
/
/
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
L16 0_0805_5%L16 0_0805_5%
C209
C209
1
12
2A
+1.1VS
C215
C215
L18 0_0805_5%L18 0_0805_5%
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
12
2A < IO power for HyperTransport receive interface >
1 1
C225
4.7U_0805_10V4Z
C225
10U_0805_10V4Z
10U_0805_10V4Z
4.7U_0805_10V4Z
L19 0_0805_5%L19 0_0805_5%
1
2
12
2A < IO power for HyperTransport transmit interface >
+1.2V_HT
C235
C235
L22 0_0805_5%L22 0_0805_5%
1
12
2A < 1.8V IO power for PCI-E graphics, SB, and GPP interfaces >
+1.8VS
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
+1.8VS
C251
1U_0402_6.3V4Z
C251
1U_0402_6.3V4Z
1
2
+1.8VS
2 2
3 3
4 4
A
Page 14

0.1Custom
0.1Custom
0.1Custom
14 45Wednesday, February 25, 2009
14 45Wednesday, February 25, 2009
14 45Wednesday, February 25, 2009
E
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
D
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
E
LA-4971P
LA-4971P
LA-4971P
RS780M&RX781 STRAPS
RS780M&RX781 STRAPS
RS780M&RX781 STRAPS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
C
< DFT_GPIO[4:2] : STRAP_PCIE_GPP_CFG[2:0] >
< DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb >
Enables the Test Debug Bus using GPIO.
1 : Enable (RX780, RS780)
0 : Disable (RX780, RS780)
PIN: RS740-->RS780_AUX_CAL; RX780-->NB_TV_C; RS780--> VSYNC#
+3VS
B
R101
3K_0402_5%
R101
3K_0402_5%
12
R102
R102
3K_0402_5%@
3K_0402_5%@
12
These pin straps are used to configure PCI-E GPP mode.
SI2: Change to 3K pull high
000 : 00001
001 : 00010
010 : 01011
011 : 00100
100 : 01010
101 : 01100
111 : 01011
< DFT_GPIO1 : LOAD_EEPROM_STRAPS >
Selects Loading of STRAPS from EPROM
1 : Bypass the loading of EEPROM straps and use Hardware Default Values
0 : I2C Master can load strap values from EEPROM if connected, or use default values if not connected
RS740/RX780: DFT_GPIO1 RS780:SUS_STAT
< DFT_GPIO0: STRAP_DEBUG_BUS_PCIE_ENABLEb >
RX780: Enables the Test Debug Bus using PCIE bus
1 : Disable ( Can still be enabled using nbcfg register access )
0 : Enable
RS780: Enables Side port memory ( RS780 use HSYNC#)
1. Disable (RS780)
0 : Enable (RS780)
+3VS
PLT_RST# 11,19,20,26,27,33,34
R104
150_0402_1%@
R104
150_0402_1%@
1 2
D4
CH751H-40PT_SOD323-2@D4CH751H-40PT_SOD323-2@
2 1
R125
3K_0402_5%
R125
3K_0402_5%
12
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
< RS780 DFT_GPIO5 mux at CRT_VSYNC pull High to 3K >
UMA_CRT_VSYNC11,16
< RS780 use register to control PCI-E configure >
1 1
SUS_STAT#11,21
AUX_CAL11
< RS780 DFT_GPIO1 >
2 2
UMA_CRT_HSYNC11,16
< RS780 use HSYNC to enable SIDE PORT (internal pull high) >
3 3
A
4 4
Page 15

0.1Custom
0.1Custom
0.1Custom
E
D
C
+3VS_CLK
1 2
R167 0_0805_5%R167 0_0805_5%
+3VS
C451
1U_0402_6.3V4Z
C451
1U_0402_6.3V4Z
1
C450
0.1U_0402_16V7K
C450
0.1U_0402_16V7K
1
C449
0.1U_0402_16V7K
C449
0.1U_0402_16V7K
1
C448
0.1U_0402_16V7K
C448
0.1U_0402_16V7K
1
C447
0.1U_0402_16V7K
C447
0.1U_0402_16V7K
1
C446
0.1U_0402_16V7K
C446
0.1U_0402_16V7K
1
C445
0.1U_0402_16V7K
C445
0.1U_0402_16V7K
1
C444
22U_0805_6.3V6M
C444
22U_0805_6.3V6M
1
1
2
2
< To Card Reader >
2
CLK_48M_CR 29
2
2
2
1 2
2
R185 33_0402_5%R185 33_0402_5%
2
CLK_48M
C457
0.1U_0402_16V4Z
C457
0.1U_0402_16V4Z
2
< To SB700 USB host >
< To RS780 Clock block >
CLK_48M_USB 21
NB_OSC_14.318M 11
1 2
1 2
R170 33_0402_5%R170 33_0402_5%
R379 158_0402_1%R379 158_0402_1%
CLK_48M_CRUSB
NB_OSC_14.318M_R
SB_14.318M 20
1 2
R380 90.9_0402_1%R380 90.9_0402_1%
1 2
R187 33_0402_5%TIGRIS@ R187 33_0402_5%TIGRIS@
< To RS780 Clock block >
+3VS_CLK
1 2
CLK_CPU_BCLK 6
1 2
R946 0_0402_5%R946 0_0402_5%
1 2
C629 1U_0402_6.3V4ZC629 1U_0402_6.3V4Z
CLK_CPU_BCLK_R
+3VS_CLK
+3VS_CLK
+3VS_CLK
CLK_NBHT# 11
CLK_NBHT 11
R174 8.2K_0402_5%R174 8.2K_0402_5%
< To CPU >
R186
261_0402_1%
R186
261_0402_1%
1 2
@
@
CLK_CPU_BCLK# 6
1 2
R945 0_0402_5%R945 0_0402_5%
CLK_CPU_BCLK_R#
55
56
57
58
59
60
61
62
63
27M_SEL
64
SEL_SATA
65
66
67
CLK_XTAL_IN
68
CLK_XTAL_OUT
69
70
71
72
73
CLKREQ_NCARD#
PD#
GND
U10
U10
+3VS_CLK
1 2
1 2
1 2
R390 8.2K_0402_5%R390 8.2K_0402_5%
R325 8.2K_0402_5%R325 8.2K_0402_5%
R324 8.2K_0402_5%R324 8.2K_0402_5%
CLKREQ_MCARD2#
CLKREQ_LAN
+3VS_CLK
+VDDCLK_IO
54
53
52
VSS_CPU
VDD_CPU
VDD_CPU_I/O
CPU_K8_0#
CPU_K8_0
VSS_HTT
HTT_0#/66M_1
HTT_0/66M_0
VDD_HTT
VDD_REF
REF_2/SEL_27
REF_1/SEL_SATA
VSS_REF
XTAL_IN
XTAL_OUT
VDD_48
48MHz_1
48MHz_0
VSS_48
SCL1SDA2VDD_DOT3SRC_7#/27M4SRC_7/27M_SS
CLKREQ_NCARD# 27
CLKREQ_MCARD2# 27
CLK_SBSRC_BCLK 20
CLKREQ_NCARD#
CLKREQ_MCARD2#
+3VS_CLK
50
49
48
47
46
45
VSS_A
VDD_A
VSS_SATA
CLKREQ_1#51CLKREQ_2#
SRC_6/SATA
SRC_6#/SATA#
REF_0/SEL_HTT66
VSS_DOT6SRC_5#7SRC_58SRC_4#9SRC_410VSS_SRC11VDD_SRC_IO
5
+3VS_CLK
+3VS_CLK
+3VS_CLK
1 2
R372 10K_0402_5%R372 10K_0402_5%
44
42
41
40
39
38
SB_SRC_0
VDD_SATA
SB_SRC_0#
CLKREQ_3#43CLKREQ_4#
VDD_SB_SRC
SB_SRC_SLOW#
SRC_3#13SRC_314SRC_2#15SRC_216VDD_SRC17VDD_SRC_IO
12
+VDDCLK_IO
37
VDD_SB_SRC_IO
18
OSC_14M_NB
RS780 1.1V 158R/90.9R
SLG8SP626VTR_QFN72_10x10
SLG8SP626VTR_QFN72_10x10
VSS_SB_SRC
36
SB_SRC_1
35
SB_SRC_1#
34
ATIGCLK_0
33
ATIGCLK_0#
32
ATIGCLK_1
31
ATIGCLK_1#
30
VDD_ATIG
29
VDD_ATIG_IO
28
VSS_ATIG
27
ATIGCLK_2
26
ATIGCLK_2#
25
CLKREQ_0#
24
SRC_0
23
SRC_0#
22
SRC_1
21
SRC_1#
20
VSS_SRC
19
100M DIFF
100M DIFF
100M DIFF(IN/OUT)*
RX780 RS780
100M DIFF
NB CLOCKS
NB CLOCK INPUT TABLE
HT_REFCLKP
100M DIFF
14M SE (1.8V) 14M SE (1.1V)
NC vref
HT_REFCLKN
REFCLK_P
REFCLK_N
100M DIFF
GFX_REFCLK
GLAN
NB GFX
MiniCard_1
10/23 Delete for MiniCard1
CLK_PCIE_VGA 19
CLK_PCIE_VGA# 19
NBGFX_CLK 11
NBGFX_CLK# 11
+3VS_CLK
+VDDCLK_IO
CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26
CLKREQ_LAN 26
CLKREQ_LAN
CLK_PCIE_NCARD 27
NC or 100M DIFF OUTPUT
100M DIFF
GPP_REFCLK
GPPSB_REFCLK 100M DIFF 100M DIFF
New Card
CLK_PCIE_NCARD# 27
15 45Wednesday, February 25, 2009
15 45Wednesday, February 25, 2009
15 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
Clock Generator
Clock Generator
Clock Generator
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
+VDDCLK_IO
1 2
R168 0_0805_5%R168 0_0805_5%
+1.2V_HT
C456
0.1U_0402_16V4Z
C456
0.1U_0402_16V4Z
1
C455
0.1U_0402_16V4Z
C455
0.1U_0402_16V4Z
1
C454
0.1U_0402_16V4Z
C454
0.1U_0402_16V4Z
1
C453
0.1U_0402_16V4Z
C453
0.1U_0402_16V4Z
1
C452
22U_0805_6.3V6M
C452
22U_0805_6.3V6M
1
CLK_XTAL_IN
2
2
C461
0.1U_0402_16V4Z
C461
1
C460
C460
1
C459
C459
1
C458
C458
1
+3VS_CLK
1 1
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
2
2
2
CLK_XTAL_OUT
C465
22P_0402_50V8J
C465
22P_0402_50V8J
1
2
12
Y2
14.31818MHZ_20P_6X1430004201
Y2
14.31818MHZ_20P_6X1430004201
1
2
C464
C464
22P_0402_50V8J
22P_0402_50V8J
+3VS_CLK
Routing the trace at least 10mil
SMB_CK_CLK08,9,21,27
SMB_CK_DAT08,9,21,27
2 2
CLK_SBLINK_BCLK11 CLK_SBSRC_BCLK# 20
CLK_SBLINK_BCLK#11
SB LINK SB SRC
+VDDCLK_IO
CLK_PCIE_MCARD2#27
WLAN
+3VS_CLK
+VDDCLK_IO
CLK_PCIE_MCARD227
B
configure as 27M and 27M_SS output
1 *
0 configure as SRC_7 output
* default
R180
R180
27M_SEL
8.2K_0402_5%
8.2K_0402_5%
R181
R181
8.2K_0402_5%
8.2K_0402_5%
1 2
1 2
27M_SEL
configure as normal SRC(SRC_6) output
configure as SATA output
*0
* default
1
SEL_SATA
Use voltage divider resistor R379 & R380 to pull low
4 4
A
configure as single-ended 66MHz output1
*0 configure as differential 100MHz output
* default
NB_OSC_14.318M
+3VS_CLK
SEL_SATA
R179
R179
1 2
8.2K_0402_5%@
8.2K_0402_5%@
+3VS_CLK
3 3
Page 16

0.1Custom
0.1Custom
0.1Custom
+CRT_VCC+5VS +R_CRT_VCC
E
D
C475
0.1U_0402_16V4Z
C475
0.1U_0402_16V4Z
1
2
F2
1A_6VDC_MINISMDC110
F2
1A_6VDC_MINISMDC110
21
D36
RB491D_SOT23
D36
RB491D_SOT23
2 1
66111111771212228813133399141444101015155
JCRT
JCRT
+3VS
D34
D34
DAN217_SC59@
DAN217_SC59@
3
1
2
D37
D37
DAN217_SC59@
DAN217_SC59@
3
1
2
D35
D35
DAN217_SC59@
DAN217_SC59@
3
1
2
RED_L
GREEN_L
HSYNC
D_DDCDATA
RED_L
BLUE_L
+CRT_VCC
GREEN_L
17
G16G
VSYNC
D_DDCCLK
1
BLUE_L
5
ALLTO_C10532-11505-L_15P-T@
ALLTO_C10532-11505-L_15P-T@
2
C706
C706
220P_0402_50V7K
220P_0402_50V7K
C472
6P_0402_50V8K
C472
6P_0402_50V8K
1
C476
6P_0402_50V8K
C476
6P_0402_50V8K
1
C858
6P_0402_50V8K
C858
6P_0402_50V8K
1
16 45Wednesday, February 25, 2009
16 45Wednesday, February 25, 2009
16 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
CRT/TV-OUT Connector
CRT/TV-OUT Connector
CRT/TV-OUT Connector
Compal Electronics, Inc.
Compal Electronics, Inc.
< SYNC SIGNAL >
HSYNC
VSYNC
C470
10P_0402_50V8J@
C470
10P_0402_50V8J@
1
2
2
C474
10P_0402_50V8J@
C474
10P_0402_50V8J@
1
2
2
1 2
1 2
L83 10_0402_5%L83 10_0402_5%
L84 10_0402_5%L84 10_0402_5%
2
D_HSYNC
D_VSYNC
+CRT_VCC
R218
2K_0402_1%
R218
2K_0402_1%
PM@
PM@
R100
2K_0402_1%
R100
2K_0402_1%
PM@
PM@
R218
R218
R100
R100
6.8K_0402_5%GM@
6.8K_0402_5%GM@
6.8K_0402_5%GM@
6.8K_0402_5%GM@
< Display Data Channel >
D_DDCDATA
D_DDCCLK
C856
470P_0402_50V8J@
C856
470P_0402_50V8J@
1
2
C857
470P_0402_50V8J@
C857
470P_0402_50V8J@
1
2
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
< CRT CONNECTOR >
B
R662
0_0402_5%GM@
R662
0_0402_5%GM@
R666
0_0402_5%PM@
R666
0_0402_5%PM@
R664
R664
0_0402_5%GM@
0_0402_5%GM@
R663
R663
0_0402_5%PM@
0_0402_5%PM@
R665
R665
0_0402_5%GM@
0_0402_5%GM@
L48
NBQ100505T-800Y_0402
L48
NBQ100505T-800Y_0402
L49
NBQ100505T-800Y_0402
L49
L47
L47
R661
R661
NBQ100505T-800Y_0402
NBQ100505T-800Y_0402
NBQ100505T-800Y_0402
1 2
1 2
1 2
GREEN
RED
BLUE
0_0402_5%PM@
0_0402_5%PM@
C469
6P_0402_50V8K
C469
6P_0402_50V8K
1
C859
6P_0402_50V8K
C859
6P_0402_50V8K
1
C471
6P_0402_50V8K
C471
6P_0402_50V8K
1
R217
150_0402_1%
R217
150_0402_1%
12
R211
150_0402_1%
R211
150_0402_1%
12
R214
140_0402_1%GM@
R214
140_0402_1%GM@
12
R214
150_0402_1%
R214
150_0402_1%
Q10A
2N7002DW-7-F_SOT363-6
Q10A
+3VS
2
2N7002DW-7-F_SOT363-6
61
C181
33P_0402_50V8K@
C181
33P_0402_50V8K@
12
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
Q10B
2N7002DW-7-F_SOT363-6
Q10B
2N7002DW-7-F_SOT363-6
3
5
+3VS
R238
R238
R237
R237
4.7K_0402_5%GM@
4.7K_0402_5%GM@
4.7K_0402_5%GM@
4.7K_0402_5%GM@
4
1 2
C177
33P_0402_50V8K@
C177
33P_0402_50V8K@
12
1
5
+CRT_VCC
1 2
C477 0.1U_0402_16V4ZC477 0.1U_0402_16V4Z
4
U13
SN74AHCT1G125GW_SOT353-5
U13
SN74AHCT1G125GW_SOT353-5
Y
OE#
G3P
A
2
R_VSYNC
+3VS
12
4
U14
SN74AHCT1G125GW_SOT353-5
U14
SN74AHCT1G125GW_SOT353-5
Y
OE#
1
G3P
5
2
2
2
+CRT_VCC
A
2
1 2
C473 0.1U_0402_16V4ZC473 0.1U_0402_16V4Z
R_HSYNC
PM:VGA Board have pull high
FOR EMI
R673
R673
0_0402_5%GM@
0_0402_5%GM@
1 2
R674
R674
0_0402_5%PM@
0_0402_5%PM@
1 2
R676
R676
0_0402_5%GM@
0_0402_5%GM@
1 2
R675
R675
0_0402_5%PM@
0_0402_5%PM@
1 2
CRT_DATA
R672
0_0402_5%GM@
R672
0_0402_5%GM@
1 2
R670
R670
0_0402_5%PM@
0_0402_5%PM@
1 2
CRT_CLK
R669
0_0402_5%GM@
R669
0_0402_5%GM@
1 2
R671
R671
0_0402_5%PM@
0_0402_5%PM@
1 2
PM@
1 2
A
UMA_CRT_R11
1 2
1 2
UMA_CRT_G11
VGA_CRT_R19
1 2
1 2
VGA_CRT_G19
1 1
1 2
UMA_CRT_B11
VGA_CRT_B19
PM@
UMA_CRT_HSYNC11,14
VGA_CRT_HSYNC19
RS780 use 140 ohm, check RS880 use what value
2 2
UMA_CRT_VSYNC11,14
A
UMA_CRT_DATA11
VGA_CRT_VSYNC19
3 3
VGA_CRT_DATA19
UMA_CRT_CLK11
RS780 DAC_SCL & SDA is 5V tolerance
VGA_CRT_CLK19
4 4
Page 17

0.1
0.1
0.1
C267
0.1U_0402_16V7K
C267
0.1U_0402_16V7K
1
C874
680P_0402_50V7K
C874
680P_0402_50V7K
1
2
< EMI require >
2
17 45Wednesday, February 25, 2009
17 45Wednesday, February 25, 2009
17 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
LCD CONN.
LCD CONN.
LCD CONN.
+3VS
W=60mils
C264
0.1U_0402_16V7K
C264
0.1U_0402_16V7K
1
2
E
+LCD_VDD
B+
Inrush current = 0A
Q2
AO3413_SOT23
Q2
+3VS
C262
C262
2
D
R143
100K_0402_5%
R143
100K_0402_5%
12
+3VS
LCD/PANEL BD. Conn.
12
+LCD_VDD
R142 150_0603_5%R142 150_0603_5%
C
W=60mils
AO3413_SOT23
D
S
D
S
1 3
G
G
2
0.1U_0402_16V7K
0.1U_0402_16V7K
C195
C195
1
1
R140
47K_0402_5%
R140
47K_0402_5%
1 2
2
61
Q1A
Q1A
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
1
C263 4.7U_0805_10V4Z@ C263 4.7U_0805_10V4Z@
0.01U_0402_25V7K
0.01U_0402_25V7K
2
Q1B
Q1B
3
5
ENVDD
1 2
R668 0_0402_5%GM@ R668 0_0402_5%GM@
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
4
12
R144 100K_0402_5%R144 100K_0402_5%
1 2
R667 0_0402_5%PM@ R667 0_0402_5%PM@
UMA_ENVDD11
VGA_ENVDD19
+5VS
JLVDS
JLVDS
1
1
2
2
DAC_BRIG 34
LCD_TXCLK+
LCD_TXCLK-
3
5
7
9
3
5
7
9
4
6
8
10
4
6
8
10
INVT_PWM 34
LCD_TZCLK+
LCD_TZCLK-
11
13
17
15
11
13
17
15
12
14
18
12
14
18
16
LCD_TXOUT2+
LCD_TXOUT1-
LCD_TXOUT1+
LCD_TXOUT0+
LCD_TXOUT0-
+LCDVDD_R
LCD_EDID_CLK
LCD_EDID_DATA
21
23
25
27
191921
23
25
27
22
24
26
28
202016
22
24
26
28
LCD_TXOUT2-
LCD_TZOUT1+
LCD_TZOUT0-
LCD_TZOUT0+
C875
680P_0402_50V7K
C875
680P_0402_50V7K
1
Rated Current MAX:3000mA
12
C269
0.1U_0402_25V4Z
C269
0.1U_0402_25V4Z
L12 FBMA-L11-201209-221LMA30T_0805L12 FBMA-L11-201209-221LMA30T_0805
1
+LCD_INV
C268
68P_0402_50V8J
C268
68P_0402_50V8J
1
29
31
33
35
37
39
41
29
31
33
35
37
39
GMD
30
32
34
36
38
40
GND
ACES_87242-4001-09@
34
36
38
40
42
LCD_TZOUT2-
LCD_TZOUT2+
BKOFF#
ACES_87242-4001-09@
12
R146
R146
30
32
LCD_TZOUT1-
< EMI require >
2
2
2
100K_0402_5%
100K_0402_5%
1.5A
+LCD_VDD
C266
C266
1
12
L8 0_0805_5%L8 0_0805_5%
C265
C265
1
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
0.1U_0402_16V7K
0.1U_0402_16V7K
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
LCD_TZOUT2-
1 2
R591 0_0402_5%GM@ R591 0_0402_5%GM@
UMA_LCD_TZCLK_BCLK+11
LCD_TZOUT2-19
BKOFF#34
LCD_TZCLK+
1 2
R594 0_0402_5%GM@ R594 0_0402_5%GM@
UMA_LCD_TZCLK_BCLK-11
LCD_TZCLK+19
3 3
LCD_TZCLK-
LCD_TZCLK-19
1 2
R555 0_0402_5%GM@ R555 0_0402_5%GM@
UMA_LCD_DDC_CLK11
LCD_EDID_CLK +LCDVDD_R
1 2
R586 0_0402_5%GM@ R586 0_0402_5%GM@
UMA_LCD_DDC_DAT11
LCD_EDID_CLK19
LCD_EDID_DATA
LCD_EDID_DATA19
+3VS
UMA_LCD_DDC_DAT
UMA_LCD_DDC_CLK
1 2
1 2
R69 4.7K_0402_5%GM@ R69 4.7K_0402_5%GM@
R68 4.7K_0402_5%GM@ R68 4.7K_0402_5%GM@
4 4
B
A
INT_MIC_R31
B
LCD_TXOUT0+
1 2
1 2
R543 0_0402_5%GM@ R543 0_0402_5%GM@
R580 0_0402_5%GM@ R580 0_0402_5%GM@
A
UMA_LCD_TXOUT0_A0+11
LCD_TXOUT0+19
LCD_TXOUT0-
UMA_LCD_TXOUT0_A0-11
LCD_TXOUT0-19
LCD_TXOUT1+
1 2
R566 0_0402_5%GM@ R566 0_0402_5%GM@
UMA_LCD_TXOUT0_A1+11
1 1
LCD_TXOUT1+19
LCD_TXOUT1-
1 2
R578 0_0402_5%GM@ R578 0_0402_5%GM@
UMA_LCD_TXOUT0_A1-11
LCD_TXOUT1-19
LCD_TXOUT2+
1 2
R573 0_0402_5%GM@ R573 0_0402_5%GM@
UMA_LCD_TXOUT0_A2+11
LCD_TXCLK+
LCD_TXOUT2-
1 2
R574 0_0402_5%GM@ R574 0_0402_5%GM@
UMA_LCD_TXOUT0_A2-11
LCD_TXOUT2+19
LCD_TXOUT2-19
1 2
R540 0_0402_5%GM@ R540 0_0402_5%GM@
1 2
R559 0_0402_5%GM@ R559 0_0402_5%GM@
UMA_LCD_TXCLK_ACLK+11
LCD_TXCLK+19
LCD_TXCLK-
UMA_LCD_TXCLK_ACLK-11
LCD_TXCLK-19
LCD_TZOUT0+
1 2
R590 0_0402_5%GM@ R590 0_0402_5%GM@
UMA_LCD_TZOUT0_B0+11
LCD_TZOUT0+19
R681 0_0402_5%GM@ R681 0_0402_5%GM@
2 2
LCD_TZOUT0-
1 2
LCD_TZOUT0-19
UMA_LCD_TZOUT0_B0-11
LCD_TZOUT1+
1 2
R631 0_0402_5%GM@ R631 0_0402_5%GM@
UMA_LCD_TZOUT0_B1+11
USB20_P9_R_CAM32
USB20_N9_R_CAM32
LCD_TZOUT2+
LCD_TZOUT1-
1 2
R680 0_0402_5%GM@ R680 0_0402_5%GM@
UMA_LCD_TZOUT0_B1-11
LCD_TZOUT1+19
LCD_TZOUT1-19
1 2
R660 0_0402_5%GM@ R660 0_0402_5%GM@
1 2
R677 0_0402_5%GM@ R677 0_0402_5%GM@
UMA_LCD_TZOUT0_B2+11
UMA_LCD_TZOUT0_B2-11
LCD_TZOUT2+19
Page 18

Vgs = 10V
Id = 6A
Rds_on = 35m ohm
E
F3
H@ F3
H@
Inrush current = 0A
+HDMI_5V_OUT_M +HDMI_5V_OUT
D
D18
H@
D18
H@
< Power, reset and crystal >
C
D
D
RB161M-20_SOD123-2
RB161M-20_SOD123-2
2 1
+5VL
+3VL
C258
0.1U_0402_16V7K
C258
0.1U_0402_16V7K
1
2
H@
H@
< Place MOSFET close to HDMI connector >
1.1A_6V_MINISMDC110F-2
1.1A_6V_MINISMDC110F-2
2 1
6
S
S
4 5
+5VS
< HDMI_CEC level shift >
Q159
SI3456BDV-T1-E3_TSOP6
H@
Q159
SI3456BDV-T1-E3_TSOP6
H@
2
1
G
G
3
12
R160
1M_0402_5%
H@
R160
1M_0402_5%
H@
1 2
+VSB
21
+3VL+3VL
12
C876
0.1U_0402_25V6
H@
C876
0.1U_0402_25V6
H@
R557
10M_0402_5%
H@
R557
10M_0402_5%
H@
Q26
2N7002_SOT23-3
H@
Q26
2N7002_SOT23-3
H@
D
D
13
G
G
2
SUSP36,42
D13
CH751H-40PT_SOD323-2
CH751H-40PT_SOD323-2
R583
12
H@ R583
H@
H@ D13
H@
R157
10K_0402_5%
10K_0402_5%
H@ R157
H@
HDMI_CECIN
S
S
HDMI_CEC
27K_0402_5%
27K_0402_5%
2
G
G
13
D
S
D
S
H@
H@
Q149
Q149
2N7002_SOT23-3
2N7002_SOT23-3
Q150
Q150
H@
H@
D
D
13
G
G
2
R163
27K_0402_5%
27K_0402_5%
H@ R163
H@
1 2
HDMI_CECOUT
2N7002_SOT23-3
2N7002_SOT23-3
S
S
R165
100K_0402_5%
100K_0402_5%
12
H@ R165
H@
HDMI_SDATA
HDMI_SCLK
R212
2.2K_0402_5%
H@
R212
2.2K_0402_5%
H@
R188
2.2K_0402_5%
H@
R188
2.2K_0402_5%
H@
Q33
H@
Q33
H@
G
G
2
R236
10K_0402_5%
H@
R236
10K_0402_5%
H@
R210
10K_0402_5%
H@
R210
10K_0402_5%
H@
1 2
1 2
Q34
BSH111_SOT23-3
H@
Q34
BSH111_SOT23-3
H@
G
G
2
BSH111_SOT23-3
BSH111_SOT23-3
D
D
S
S
3 1
1 2
1 2
HDMI_DATA_CEC
+3VS+3VS
< Place MOSFET close to HDMI connector >
D
D
S
S
3 1
HDMI_CLK_CEC
+HDMI_5V_OUT
< Place MOSFET close to HDMI connector >
+3VL
+3VL
< HDMI DDC channel to device >
Q139
H@
Q139
H@
G
G
2
R209
4.7K_0402_5%
IHDMI@
R209
4.7K_0402_5%
IHDMI@
12
R176
4.7K_0402_5%
IHDMI@
R176
4.7K_0402_5%
IHDMI@
HDMI_SDATA
H@
H@
G
G
2
BSH111_SOT23-3
BSH111_SOT23-3
D
D
S
S
3 1
1 2
R298
0_0402_5%IHDMI@
R298
0_0402_5%IHDMI@
R299
0_0402_5%HDMI@
R299
0_0402_5%HDMI@
1 2
1 2
HDMIDAT_VGA19
HDMIDAT_UMA11
HDMI_SCLK
Q140
BSH111_SOT23-3
Q140
BSH111_SOT23-3
D
D
S
S
3 1
R302
R302
R301
0_0402_5%IHDMI@
R301
0_0402_5%IHDMI@
1 2
HDMICLK_UMA11
C850
0.1U_0402_16V4Z
C850
0.1U_0402_16V4Z
HDMI_HPD
0_0402_5%HDMI@
0_0402_5%HDMI@
+5VL
1 2
HDMICLK_VGA19
< Hot-plug detection & level shift >
2
R628
R628
1
5
C851
0.1U_0402_16V4Z
C851
0.1U_0402_16V4Z
2
H@
H@
1
H@
H@
100K_0402_5%
100K_0402_5%
1 2
H@
H@
HDMI_HPD_R
U39
SN74AHCT1G125GW_SOT353-5
SN74AHCT1G125GW_SOT353-5
4
H@ U39
H@
Y
OE#
G3P
A
2
1
R588
R588
2.2K_0402_5%H@
2.2K_0402_5%H@
+3VS
12
R589
R589
100K_0402_5%H@
100K_0402_5%H@
12
HPD 11,19,21
+3VL
0.1Custom
0.1Custom
0.1Custom
18 45Wednesday, February 25, 2009
18 45Wednesday, February 25, 2009
18 45Wednesday, February 25, 2009
LA-4971P
LA-4971P
LA-4971P
HDMI/CEC
HDMI/CEC
HDMI/CEC
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
R86
100K_0402_5%
R86
100K_0402_5%
12
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D57
CH751H-40PT_SOD323-2H@
D57
CH751H-40PT_SOD323-2H@
21
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
HDMI_HPD_R
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
E
D
C
CEC_INT# 34EC_SMB_CK134,38
R171
4.7K_0402_5%
4.7K_0402_5%
R169
4.7K_0402_5%
4.7K_0402_5%
H@ R171
H@
H@ R169
H@
1 2
1 2
CEC_FSHUPDCEC_RST#
CEC_TEST
12
11
13
P1_4/TXD0
B
P1_6/CLK0/SSI01
P1_5/RXD0/CNTR01/INT11#
< HDMI CEC Controller >
P3_7/CNTR0#/SSO/TXD1
P3_5/SSCK/SCL/CMP1_2
2
1
EC_SMB_CK1
+3VL
R182
R182
RESET#
3
4.7K_0402_5%H@
4.7K_0402_5%H@
12
U8
A
+3VL
C257
0.1U_0402_16V7KH@
C257
0.1U_0402_16V7KH@
C543
1U_0402_6.3V4ZH@
C543
1U_0402_6.3V4ZH@
1 2
1 2
CEC_FSHUPD (Pin13) Low= Force to update flash.
14
15
P1_3/KI3#/AN11/TZOUT
P1_2/KI2#/AN10/CMP0_2
XOUT/P4_7
VSS/AVSS
4
5
CEC_XOUT
R177
R177
R178
47K_0402_5%H@
R178
47K_0402_5%H@
1 2
1 1
HDMI_DATA_CEC
HDMI_CLK_CEC
18
17
16
P4_2/VREF
P1_0/KI0#/AN8/CMP0_0
P1_1/KI1#/AN9/CMP0_1
XIN/P4_6
MODE8P1_7/CNTR00/INT10#
VCC/AVCC
6
7
CEC_XIN
47K_0402_5%H@
47K_0402_5%H@
R183
4.7K_0402_5%H@
R183
4.7K_0402_5%H@
12
1 2
19
P3_3/TCIN/INT3#/SSI00/CMP1_0
P4_5/INT0#/RXD1
9
HDMI_CECIN HDMI_HPD_R
C256
C256
1
EC_SMB_DA1 34,38
EC_SMB_DA1
20
P3_4/SCS#/SDA/CMP1_1
R5F211B4D33SP-PLSP0020JB-AH@U8R5F211B4D33SP-PLSP0020JB-AH@
10
HDMI_CECOUT
0.1U_0402_16V7K
0.1U_0402_16V7K
2
H@
H@
23
GND20GND21GND22GND
D0-9CK+10CK_shield
CK-12CEC13Reserved
SCL15SDA16DDC/CEC_GND
+5V18HP_DET
JHDMI
JHDMI
17
19
8
11
14
< HDMI Connector >
HDMI_HPD
+HDMI_5V_OUT
HDMI_TX0+
HDMI_TX1-
HDMI_TX0-
HDMI_TX1+
1 2
1 2
1 2
C189 0.1U_0402_16V7KH@ C189 0.1U_0402_16V7KH@
C190 0.1U_0402_16V7KH@ C190 0.1U_0402_16V7KH@
C184 0.1U_0402_16V7KH@ C184 0.1U_0402_16V7KH@
C188 0.1U_0402_16V7KH@ C188 0.1U_0402_16V7KH@
HDMI_SCLK
HDMI_SDATA
HDMI_TX2+
HDMI_TX2-
1 2
1 2
1 2
C191 0.1U_0402_16V7KH@ C191 0.1U_0402_16V7KH@
C187 0.1U_0402_16V7KH@ C187 0.1U_0402_16V7KH@
HDMI_CEC
HDMI_R_CK+
HDMI_R_CK-
HDMI_R_D0-
HDMI_CLK+
HDMI_CLK-
1 2
1 2
C186 0.1U_0402_16V7KH@ C186 0.1U_0402_16V7KH@
C185 0.1U_0402_16V7KH@ C185 0.1U_0402_16V7KH@
HDMI_R_D1-
HDMI_R_D0+
SI:Add R616~R624 for EMI requset
HDMI_TXD0+10,19
HDMI_TXD0-10,19
HDMI_TXD1+10,19
HDMI_TXD1-10,19
HDMI_TXD2+10,19
HDMI_TXD2-10,19
HDMI_CLK0+10,19
HDMI_CLK0-10,19
2 2
D2+1D2_shield
D2-3D1+4D1_shield
D1-6D0+7D0_shield
2
5
HDMI_R_D1+
HDMI_R_D2+
HDMI_R_D2-
HDMI_R_CK-
R616
0_0402_5%@
R616
0_0402_5%@
1 2
HDMI_CLK-
< EMI solution >
Issued Date
Issued Date
R139 499_0402_1%HDMI@ R139 499_0402_1%HDMI@
R139 715_0402_1%IHDMI@ R139 715_0402_1%IHDMI@
223
1
1
L88
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
HDMI_R_D2+
R624
0_0402_5%@
R624
0_0402_5%@
1 2
HDMI_TX2+
A
Q136A
+5VS
H@ Q136A
H@
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2
TYCO_1939864-1_19P@
TYCO_1939864-1_19P@
3
223
1
4
L85
1
4
H@ L85
H@
6 1
1 2
1 2
R307 499_0402_1%HDMI@ R307 499_0402_1%HDMI@
R315 715_0402_1%IHDMI@ R315 715_0402_1%IHDMI@
R307 715_0402_1%IHDMI@ R307 715_0402_1%IHDMI@
HDMI_R_CK-
HDMI_R_CK+
< Termination resistor >
HDMI_R_CK+HDMI_CLK+
HDMI_R_D0-
R618
0_0402_5%@
R618
0_0402_5%@
R617
0_0402_5%@
R617
0_0402_5%@
1 2
1 2
WCM-2012-900T_0805
WCM-2012-900T_0805
HDMI_TX0-
R315 499_0402_1%HDMI@ R315 499_0402_1%HDMI@
WCM-2012-900T_0805H@L86
WCM-2012-900T_0805
H@
3 3
Q136B
+5VS
H@ Q136B
H@
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
4
5
3
1 2
1 2
R304 499_0402_1%HDMI@ R304 499_0402_1%HDMI@
R172 715_0402_1%IHDMI@ R172 715_0402_1%IHDMI@
R172 499_0402_1%HDMI@ R172 499_0402_1%HDMI@
R304 715_0402_1%IHDMI@ R304 715_0402_1%IHDMI@
HDMI_R_D0-
HDMI_R_D0+
HDMI_R_D0+
HDMI_R_D1-
3
4
1
4
R620
0_0402_5%@
R620
0_0402_5%@
R619
0_0402_5%@
R619
0_0402_5%@
223
1 2
1 2
1
L86
HDMI_TX0+
HDMI_TX1-
L87
H@ L87
H@
223
1
1
Q137A
H@ Q137A
H@
R297 715_0402_1%IHDMI@ R297 715_0402_1%IHDMI@
R297 499_0402_1%HDMI@ R297 499_0402_1%HDMI@
HDMI_R_D1-
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
2
6 1
1 2
1 2
R173 715_0402_1%IHDMI@ R173 715_0402_1%IHDMI@
R173 499_0402_1%HDMI@ R173 499_0402_1%HDMI@
HDMI_R_D1+
3
R621
R621
4
WCM-2012-900T_0805
WCM-2012-900T_0805
4
+5VS
HDMI_R_D1+
R623
R623
0_0402_5%@
0_0402_5%@
1 2
HDMI_TX1+
Q137B
+5VS
H@ Q137B
H@
5
R141 499_0402_1%HDMI@ R141 499_0402_1%HDMI@
HDMI_R_D2-HDMI_TX2-
0_0402_5%@
0_0402_5%@
1 2
WCM-2012-900T_0805H@L88
WCM-2012-900T_0805
4 4
4
3
1 2
R141 715_0402_1%IHDMI@ R141 715_0402_1%IHDMI@
HDMI_R_D2+
H@
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
1 2
HDMI_R_D2-
3
4
4
Page 19

0.1
0.1
0.1
19 45Wednesday, February 25, 2009
19 45Wednesday, February 25, 2009
19 45Wednesday, February 25, 2009
1
PCIE_MTX_C_GRX_N1
PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N0
110
112
114
116
118
120
122
124
126
128
130
GND
GND
GND
PEX_TX1
PEX_TX1#
2
PEX_RX1#
PEX_RX1
GND
JMXMB
JMXMB
109
111
113
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N0
PEX_RX0#
115
GND
PEX_TX0
PRSNT1#
PEX_TX0#
TV_Y/HDTV_Y
TV_C/HDTV_Pr
PEX_RX0
GND
PEX_REFCLK#
PEX_REFCLK
CLK_REQ#
PEX_RST#
RSVD
117
119
121
123
125
127
129
CLK_PCIE_VGA
CLK_PCIE_VGA#
PLT_RST#
PCIE_GTX_C_MRX_P0
PLT_RST#11,14,20,26,27,33,34
CLK_PCIE_VGA#15
CLK_PCIE_VGA15
VGA_CRT_B 16
VGA_CRT_G 16
VGA_CRT_R 16
VGA_CRT_R
VGA_CRT_B
VGA_CRT_GVGA_CRT_HSYNC
132
134
136
138
140
142
144
GND
GND
GND
VGA_RED
VGA_GRN
TV_CVBS/HDTV_Pb
RSVD
SMB_DAT
SMB_CLK
THERM#
VGA_HSYNC
VGA_VSYNC
131
133
135
137
139
141
143
VGA_CRT_VSYNC
VGA_CRT_CLK
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_CK26,34,35
EC_SMB_DA26,34,35
VGA_CRT_HSYNC16
VGA_CRT_VSYNC16
VGA_CRT_CLK16
LCD_TZCLK+ 17
LCD_TZCLK- 17
LCD_TZCLK+
LCD_TZCLK-
146
148
150
152
154
GND
GND
VGA_BLU
LVDS_UCLK
LVDS_UCLK#
DDCA_CLK
DDCA_DAT
IGP_UCLK#
IGP_UCLK
GND
145
147
149
151
153
VGA_CRT_DATA
VGA_CRT_DATA16
LCD_TZOUT2- 17
LCD_TZOUT2+
LCD_TZOUT2-
156
158
160
162
GND
LVDS_UTX3
LVDS_UTX3#
LVDS_UTX2#
RSVD
RSVD
RSVD
IGP_UTX2#
155
157
159
161
LCD_TZOUT1- 17
LCD_TZOUT2+ 17
LCD_TZOUT1+ 17
LCD_TZOUT1+
LCD_TZOUT1-
164
166
168
GND
LVDS_UTX2
LVDS_UTX1
LVDS_UTX1#
IGP_UTX2
GND
IGP_UTX1#
IGP_UTX1
163
165
167
LCD_TZOUT0- 17
LCD_TZOUT0+ 17
LCD_TZOUT0+
LCD_TZOUT0-
170
172
174
176
GND
GND
LVDS_UTX0
LVDS_UTX0#
GND
IGP_UTX0#
IGP_UTX0
GND
169
171
173
175
LCD_TXCLK-
178
177
LCD_TXOUT2- 17
LCD_TXCLK- 17
LCD_TXCLK+ 17
LCD_TXOUT2+ 17
LCD_TXOUT2+
LCD_TXOUT2-
LCD_TXCLK+
180
182
184
186
188
190
192
194
GND
GND
GND
LVDS_LTX3
LVDS_LTX2
LVDS_LCLK
LVDS_LTX3#
LVDS_LTX2#
LVDS_LCLK#
IGP_LCLK#/DVI_B_CLK#
IGP_LCLK/DVI_B_CLK
DVI_B_HPD/GND
RSVD
RSVD
GND
IGP_LTX2#/DVI_B_TX2#
IGP_LTX2/DVI_B_TX2
GND
179
181
183
185
187
189
191
193
LCD_EDID_DATA 17
LCD_TXOUT0- 17
LCD_TXOUT1- 17
LCD_TXOUT1+ 17
LCD_TXOUT0+ 17
LCD_EDID_CLK 17
LCD_EDID_CLK
LCD_EDID_DATA
LCD_TXOUT0+
LCD_TXOUT0-
LCD_TXOUT1+
LCD_TXOUT1-
196
198
200
202
204
206
208
210
GND
GND
DDCC_CLK
DDCC_DAT
LVDS_LTX1
LVDS_LTX0
LVDS_LTX1#
LVDS_LTX0#
IGP_LTX1#/DVI_B_TX1#
IGP_LTX1/DVI_B_TX1
GND
IGP_LTX0#/DVI_B_TX0#
IGP_LTX0/DVI_B_TX0
DVI_A_HPD
DVI_A_CLK#
DVI_A_CLK
195
197
199
201
203
205
207
209
HPD
VGA_HDMI_CLK+
VGA_HDMI_CLK-
HPD11,18,21
VGA_ENVDD 17
HDMIDAT_VGA 18
HDMICLK_VGA 18
VGA_ENBKL 34
VGA_ENBKL
VGA_ENVDD
HDMICLK_VGA
HDMIDAT_VGA
212
214
216
218
220
DDCB_CLK
DDCB_DAT
LVDS_BLEN
LVDS_PPEN
LVDS_BL_BRGHT
GND
DVI_A_TX2#
DVI_A_TX2
GND
DVI_A_TX1#
211
213
215
217
219
VGA_HDMI_TXD2+
VGA_HDMI_TXD2-
VGA_HDMI_TXD1-
+3VS
222
224
226
228
230
232
GND
FIX PIN
2V5RUN
3V3RUN
3V3RUN
3V3RUN
DVI_A_TX1
GND
DVI_A_TX0#
DVI_A_TX0
GND
FIX PIN
221
223
225
227
229
231
VGA_HDMI_TXD0+
VGA_HDMI_TXD0-
VGA_HDMI_TXD1+
QUASA_CA0330-230N20
QUASA_CA0330-230N20
HDMI_TXD2+ 10,18
HDMI_TXD2- 10,18
HDMI_TXD1+ 10,18
HDMI_TXD1- 10,18
HDMI_TXD0+ 10,18
1 2
1 2
1 2
1 2
1 2
R955 0_0402_5%HDMI@ R955 0_0402_5%HDMI@
R957 0_0402_5%HDMI@ R957 0_0402_5%HDMI@
R956 0_0402_5%HDMI@ R956 0_0402_5%HDMI@
R952 0_0402_5%HDMI@ R952 0_0402_5%HDMI@
R951 0_0402_5%HDMI@ R951 0_0402_5%HDMI@
R953 0_0402_5%HDMI@ R953 0_0402_5%HDMI@
VGA_HDMI_TXD0+
VGA_HDMI_TXD0-
VGA_HDMI_TXD1+
VGA_HDMI_TXD1-
VGA_HDMI_TXD2+
VGA_HDMI_TXD2-
HDMI_CLK0+ 10,18
HDMI_CLK0- 10,18
HDMI_TXD0- 10,18
1 2
1 2
1 2
R958 0_0402_5%HDMI@ R958 0_0402_5%HDMI@
R954 0_0402_5%HDMI@ R954 0_0402_5%HDMI@
VGA_HDMI_CLK+
VGA_HDMI_CLK-
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
1
MXM Connector
MXM Connector
MXM Connector
LA-4971P
LA-4971P
LA-4971P
Custom
Custom
Custom
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
Deciphered Date
Deciphered Date
Deciphered Date
3
PCIE_MTX_C_GRX_P[0..15] 10
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
4
PCIE_GTX_C_MRX_P[0..15] 10
5
3
Issued Date
Issued Date
PCIE_MTX_C_GRX_N[0..15] 10
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
< From NB > < To NB >
+5VALW
SUSP# 27,30,34,36,39,41
C865
0.1U_0402_16V4Z
C865
0.1U_0402_16V4Z
1
2
SUSP#
PM@
14
16
18
RUNPWROK
GND20GND22GND
5VRUN
PM@
24
23
140mil(3.5A)
1V8RUN21V8RUN41V8RUN61V8RUN81V8RUN101V8RUN121V8RUN
PWR_SRC1PWR_SRC3PWR_SRC5PWR_SRC7PWR_SRC9PWR_SRC11PWR_SRC13PWR_SRC15GND17GND19GND21GND
JMXMA
JMXMA
+MXM_B+ +1.8VS
PCIE_GTX_C_MRX_N[0..15] 10
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N13
26
28
30
32
34
36
38
40
42
44
46
48
50
52
GND
GND
GND
PRSNT2#
PEX_TX15
PEX_TX14
PEX_TX15#
PEX_TX14#
PEX_RX15#25PEX_RX1527GND29PEX_RX14#31PEX_RX1433GND35PEX_RX13#37PEX_RX1339GND41PEX_RX12#43PEX_RX1245GND47PEX_RX11#49PEX_RX1151GND53PEX_RX10#55PEX_RX1057GND59PEX_RX9#61PEX_RX963GND65PEX_RX8#67PEX_RX869GND71PEX_RX7#73PEX_RX775GND77PEX_RX6#79PEX_RX681GND83PEX_RX5#85PEX_RX587GND89PEX_RX4#91PEX_RX493GND95PEX_RX3#97PEX_RX399GND
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N14
GND
PEX_TX13
PEX_TX12
PEX_TX13#
PEX_TX12#
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N12
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P10
PCIE_MTX_C_GRX_P11
54
56
58
60
62
64
66
68
GND
GND
GND
PEX_TX9
PEX_TX11
PEX_TX10
PEX_TX9#
PEX_TX11#
PEX_TX10#
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_P9
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P8
70
72
74
76
78
80
82
GND
GND
PEX_TX8
PEX_TX7
PEX_TX8#
PEX_TX7#
PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_N6
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N5
84
86
88
90
92
94
96
98
GND
GND
PEX_TX6
PEX_TX5
PEX_TX6#
PEX_TX4
PEX_TX5#
PEX_TX4#
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N5
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P2
100
102
104
106
108
GND
GND
PEX_TX3
PEX_TX2
PEX_TX3#
PEX_TX2#
PEX_RX2#
PEX_RX2
GND
101
103
105
107
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N2
QUASA_CA0330-230N20
QUASA_CA0330-230N20
B+
160mil(4A)
12
L90 0_0805_5%PM@ L90 0_0805_5%PM@
+MXM_B+
C867
680P_0402_50V7K
C867
680P_0402_50V7K
1
2
12
L91 0_0805_5%PM@ L91 0_0805_5%PM@
C869
C869
1
PM@
PM@
160mil(4A)
68P_0402_50V8J
68P_0402_50V8J
2
4
5
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
C868
680P_0402_50V7K
C868
680P_0402_50V7K
1
2
PM@
PM@
D D
C C
B B
A A
Page 20

+3VS
0.1
0.1
0.1
+3VS
C501
100P_0402_25V8K@
C501
100P_0402_25V8K@
C503
100P_0402_25V8K@
C503
E
100P_0402_25V8K@
1 2
1 2
CLK_PCI_EC 24,34
CLK_PCI_SIO2 24,33
R965
300_0402_5%
R965
300_0402_5%
12
LPC_FRAME# 33,34
STRAP PIN
20 45Wednesday, February 25, 2009
20 45Wednesday, February 25, 2009
20 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
EC & TPM &Debug
PCI_CLK4 24
PCI_CLK5 24
PCI_CLK2 24
PCI_CLK3 24
CLK_PCI_PCM 28
R369
100_0402_5%@
R369
8.2K_0402_5%@
8.2K_0402_5%@
R303
100_0402_5%@
R303
100_0402_5%@
1 2
1 2
CLK_PCI_EC
PCI_REQ#0
100_0402_5%@
1 2
CLK_PCI_SIO2
R309
22_0402_5%
R309
22_0402_5%
1 2
PCICLK0P4PCICLK1P3PCICLK2P1PCICLK3
SB700
SB700
Part 1 of 5
Part 1 of 5
R175
R175
D
P2
T4
T3
PCICLK4
PCICLK5/GPIO41
PCI CLKS
PCI CLKS
R313
33_0402_5%
R313
33_0402_5%
12
N1
PCI_RST# 28
PCI_AD[0..31] 24,28
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
AD0U2AD1P7AD2V4AD3T1AD4V3AD5U1AD6V1AD7V2AD8T2AD9
PCIRST#
PCI_AD4
PCI_AD5
PCI_AD7
PCI_AD6
PCI_AD8
PCI_AD9
PCI_AD11
PCI_AD10
W1
R6
AD10T9AD12R7AD13R5AD14U8AD15U5AD16Y7AD17W8AD18V9AD19Y8AD20
AD11
PCI_AD14
PCI_AD13
PCI_AD12
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD19
PCI_AD18
PCI_AD20
AA8
PCI_AD22
PCI_AD23
PCI_AD21
AD21Y4AD22Y3AD23Y2AD24
PCI_AD25
PCI_AD24
PCI_AD26
AA2
AB4
AA1
AD25
PCI_AD28
PCI_AD27
AB3
AB2
AD26
AD27
AD28
PCI_AD29
PCI_AD31
PCI_AD30
AC1
AC2
AD1
AD29
AD30
PCI_CBE#0 28
PCI_CBE#1 28
PCI_CBE#0
PCI_CBE#1
PCI_CBE#2
AA7
AD31
CBE0#W2CBE1#U7CBE2#
PCI_CBE#2 28
PCI_CBE#3 28
PCI_FRAME# 28
PCI_CBE#3
Y1
AA6
W5
CBE3#
FRAME#
PCI_IRDY# 28
PCI_DEVSEL# 28
PCI_TRDY# 28
AA5
Y5
IRDY#
DEVSEL#
PCI_PAR 28
U6
PAR
TRDY#
PCI INTERFACE
PCI INTERFACE
PCI_STOP# 28
W6
STOP#
W4
PERR#
V7
SERR#
PCI_REQ#0 28
AC3
REQ0#
AD4
REQ1#
T15PAD T15PAD
PCI_GNT#0 28
AB7
AE6
AD2
AB6
GNT0#
REQ2#
REQ3#/GPIO70
REQ4#/GPIO71
AE4
GNT1#
AD5
GNT2#
AC6
T16PAD T16PAD
CLKRUN# 28
AD6
AE5
AD3
V5
LOCK#
CLKRUN#
GNT3#/GPIO72
GNT4#/GPIO73
PCI_PIRQA# 28
AC4
AE2
AE3
INTF#/GPIO34
INTE#/GPIO33
INTH#/GPIO36
INTG#/GPIO35
CLOCK GENERATOR
CLOCK GENERATOR
LPC_AD1 33,34
LPC_AD0 33,34
1 2
1 2
R310 22_0402_5%R310 22_0402_5%
R308 22_0402_5%R308 22_0402_5%
CLK_PCI_EC1 CLK_PCI_EC
CLK_PCI_SIOC
H24
H23
G22
E22
LAD0
LAD1
LPCCLK0
LPCCLK1
21
1 2
LPC_AD2 33,34
LPC_AD3 33,34
D17 CH751H-40PT_SOD323-2D17 CH751H-40PT_SOD323-2
R966 0_0402_5%@R966 0_0402_5%@
J25
J24
H25
H22
V15
AB8
AD7
LAD2
LAD3
LDRQ0#
LFRAME#
LDRQ1#/GNT5#/GPIO68
BMREQ#/REQ5#/GPIO65
LPC
LPC
RTC XTAL
RTC XTAL
SERIRQ 28,33,34
C3
SERIRQ
RTC_CLK 24
+SB_VBAT
B2
C2
VBAT
RTCCLK
INTRUDER_ALERT#
CPU
CPU
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SB700-PCIE/PCI/ACPI/LPC/RTC
SB700-PCIE/PCI/ACPI/LPC/RTC
SB700-PCIE/PCI/ACPI/LPC/RTC
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
RTC
RTC
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
C
+3VALW
B
PLT_RST# 11,14,19,26,27,33,34
PLT_RST#
4
Y
U16
NC7SZ08P5X_NL_SC70-5
U16
NC7SZ08P5X_NL_SC70-5
P5G
B2A
1
C506
0.1U_0402_16V4Z
C506
0.1U_0402_16V4Z
12
NB_RST#_R
A_RST#
U15A
U15A
N2
R312
33_0402_5%@
R312
33_0402_5%@
12
3
PCIE_TX2N
PCIE_TX2P
PCIE_TX1N
PCIE_TX1P
PCIE_TX0N
PCIE_TX0P
V25
V24
V22
V23
U24
U25
SB_RX0P_C
SB_RX0N_C
SB_RX1P_C
SB_RX1N_C
SB_RX2P_C
SB_RX2N_C
1 2
1 2
1 2
1 2
1 2
1 2
C496 0.1U_0402_16V7KC496 0.1U_0402_16V7K
C497 0.1U_0402_16V7KC497 0.1U_0402_16V7K
C492 0.1U_0402_16V7KC492 0.1U_0402_16V7K
C494 0.1U_0402_16V7KC494 0.1U_0402_16V7K
C493 0.1U_0402_16V7KC493 0.1U_0402_16V7K
C495 0.1U_0402_16V7KC495 0.1U_0402_16V7K
SB_RX0P10
SB_RX1P10
SB_RX2P10
SB_RX0N10
SB_RX1N10
SB_RX2N10
PCIE_TX3P
T23
SB_RX3P_C
SB_RX3N_C
1 2
C499 0.1U_0402_16V7KC499 0.1U_0402_16V7K
C498 0.1U_0402_16V7KC498 0.1U_0402_16V7K
SB_RX3P10
PCIE_TX3N
PCIE_RX0P
T22
U22
1 2
SB_TX0P10
SB_RX3N10
PCIE_RX1P
PCIE_RX1N
PCIE_RX0N
V19
U19
U21
SB_TX1P10
SB_TX1N10
SB_TX0N10
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
R20
R21
R18
SB_TX2P10
SB_TX2N10
SB_TX3P10
PCIE_CALRP
PCIE_RX3N
T25
R17
12
R305 562_0402_1%R305 562_0402_1%
SB_TX3N10
PCIE_CALRN
T24
12
R306 2.05K_0402_1%R306 2.05K_0402_1%
+PCIE_VDDR
PCIE_PVDD
PCIE_PVSS
P24
P25
+SB_PCIEVDD
C504
2.2U_0603_6.3V4Z
C504
2.2U_0603_6.3V4Z
1
2
1 2
L53 BLM18PG121SN1D_0603L53 BLM18PG121SN1D_0603
+1.2V_HT
Close to SB
PCIE_RCLKP/NB_LNK_CLKP
PCIE_RCLKN/NB_LNK_CLKN
N25
N24
CLK_SBSRC_BCLK15
CLK_SBSRC_BCLK#15
NB_HT_CLKP
NB_DISP_CLKP
NB_HT_CLKN
NB_DISP_CLKN
K23
K22
M24
M25
CPU_HT_CLKP
P17
M18
CPU_HT_CLKN
SLT_GFX_CLKP
SLT_GFX_CLKN
J19
M23
M22
GPP_CLK0N
GPP_CLK1P
GPP_CLK0P
J18
L20
GPP_CLK1N
GPP_CLK2P
L19
M19
M20
GPP_CLK2N
GPP_CLK3N
GPP_CLK3P
P22
N22
25M_48M_66M_OSC
25M_X1
J21
L18
SB_14.318M15
25M_X2
J20
Y3
Y3
Close to SB
12
C643
18P_0402_50V8J
C643
18P_0402_50V8J
1 2
X1A3X2
B3
SB_32KHI
SB_32KHO
CPU_LDT_REQ#
2
NC3NC
OUT4IN
32.768KHZ_12.5P_1TJS125BJ4A421P
32.768KHZ_12.5P_1TJS125BJ4A421P
1
R389
20M_0603_5%
R389
20M_0603_5%
C652
18P_0402_50V8J
C652
18P_0402_50V8J
1 2
ALLOW_LDTSTP
LDT_RST#
LDT_PG
LDT_STP#
PROCHOT#
F23
F22
F24
G24
G25
H_PROCHOT#
H_PWRGD
LDT_STOP#6,11
CPU_LDT_REQ#6,11
H_PROCHOT#6
H_PWRGD6,43
LDT_RST#6
H_PROCHOT#
12
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
SB700R3@
SB700R3@
+RTCBATT
+RTCVCC
D10
D10
3
R184
1K_0402_5%
R184
1K_0402_5%
12
R317
120_0402_5%
R317
120_0402_5%
1
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
+CHGRTC
BAS40-04_SOT23-3
BAS40-04_SOT23-3
2
1
2
C297
C297
0.1U_0402_16V7K
0.1U_0402_16V7K
C
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
< x4 PCIE A-link To NB >
A
1 1
< x4 PCIE A-link from NB >
2 2
1 2
J1
JUMP_43X39@J1JUMP_43X39@
R319 10K_0402_5%R319 10K_0402_5%
+3VS
3 3
+SB_VBAT
4 4
R316
R316
2
120_0402_5%
120_0402_5%
W=20mils
1 2
C510
1U_0402_6.3V4Z
C510
1U_0402_6.3V4Z
1
C509
0.1U_0402_16V7K
C509
0.1U_0402_16V7K
1
112
A
2
2
Page 21

0.1Custom
0.1Custom
0.1Custom
CLK_48M_USB 15
E
C617
100P_0402_25V8K
C617
100P_0402_25V8K
1 2
R323
11.8K_0402_1%
R323
11.8K_0402_1%
R311
100_0402_5%
R311
100_0402_5%
1 2
1 2
Reserve for EMI request
D
USB_RCOMP
C8
G8
USB_RCOMP
Part 4 of 5
Part 4 of 5
USBCLK/14M_25M_48M_OSC
SB700
SB700
E6
E7
F7
USB_FSD13P
USB_FSD12P
USB_FSD13N
USB MISC
USB MISC
E8
H11
USB_FSD12N
USB_HSD11P
USB 1.1
USB 1.1
J10
E11
F11
USB_HSD10P
USB_HSD11N
USB_HSD10N
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
USB-9 Int Camera
USB-8 WLAN
USB-7 FP
USB20_P8 27
USB20_N8 27
USB20_N9 32
USB20_P9 32
USB20_P9
A11
USB_HSD9P
USB20_P8
USB20_N9
B11
C10
USB_HSD8P
USB_HSD9N
USB20_P7 32
USB20_N8
USB20_N7
USB20_P7
G11
D10
USB_HSD7P
USB_HSD8N
USB20_N7 32
H12
USB_HSD7N
USB-6 Bluetooth
USB-5 New Card
USB-4 Card Reader (3 IN 1)
USB20_N6 32
USB20_P6 32
USB20_N6
USB20_P6
E12
USB_HSD6P
USB20_P5 27
USB20_N5
USB20_P5
C12
D12
E14
USB_HSD5P
USB_HSD6N
USB20_N4 29
USB20_P4 29
USB20_N5 27
USB20_N4
USB20_P4
B12
A12
USB_HSD4P
USB_HSD5N
USB_HSD4N
USB 2.0
USB 2.0
USB20_P2
G12
G14
H14
USB_HSD3P
USB_HSD3N
GPIO
GPIO
USB20_P2 25
USB_HSD2P
USB-0 Right side
USB-2 USB/eSATA
USB-1 Right side
USB20_N0 32
USB20_P0 32
USB20_N1 32
USB20_P1 32
USB20_N2 25
USB20_N0
USB20_P0
USB20_N1
USB20_P1
USB20_N2
H15
A13
B13
B14
A14
B18
F21
A18
IMC_GPIO9
IMC_GPIO8
USB_HSD1P
USB_HSD0P
USB_HSD2N
USB_HSD1N
USB_HSD0N
STRAP PIN
STRAP PIN
GPIO16 24
GPIO17 24
D21
F19
E20
E21
E19
D19
E18
G20
SCL2/IMC_GPIO11
SDA2/IMC_GPIO12
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
IMC_PWM2/IMC_GPO16
IMC_PWM1/IMC_GPIO15
USB OC
USB OC
IMC_PWM3/IMC_GPO17
IMC_PWM0/IMC_GPIO10
G21
D25
D24
C25
IMC_GPIO18
IMC_GPIO19
IMC_GPIO20
IMC_GPIO21
HD AUDIO
HD AUDIO
C24
B25
C23
IMC_GPIO22
IMC_GPIO23
IMC_GPIO24
IMC_GPIO25
B24
B23
A23
C22
IMC_GPIO26
IMC_GPIO27
IMC_GPIO28
IMC_GPIO29
INTEGRATED uC
INTEGRATED uC
A22
B22
B21
A21
IMC_GPIO30
IMC_GPIO31
IMC_GPIO32
D20
C20
A20
B20
IMC_GPIO33
IMC_GPIO34
IMC_GPIO35
IMC_GPIO36
B19
A19
D18
IMC_GPIO37
IMC_GPIO38
IMC_GPIO39
IMC_GPIO40
C18
IMC_GPIO41
INTEGRATED uC
INTEGRATED uC
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Secret Data
Compal Secret Data
Compal Secret Data
21 45Wednesday, February 25, 2009
21 45Wednesday, February 25, 2009
21 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
SB700 USB/AC97
SB700 USB/AC97
SB700 USB/AC97
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
USB_OC6#/IR_TX1/GEVENT6#
USB_OC4#/IR_RX0/GPM4#
USB_OC3#/IR_RX1/GPM3#
USB_OC1#/GPM1#
USB_OC2#/GPM2#
PCI_PME#/GEVENT4#
RI#/EXTEVNT0#
SLP_S3#F5SLP_S5#G1PWR_BTN#H2PWR_GOODH1SUS_STAT#K3TEST1H4TEST0H3GA20IN/GEVENT0#
SLP_S2/GPM9#
U15D
U15D
E1
E2
H7
C
TEST2
H5
SUS_STAT#
SB_TEST2
SB_TEST1
SB_TEST0
KBRST#/GEVENT1#
Y15
W15
SMBALERT#/THRMTRIP#/GEVENT2#
LPC_PME#/GEVENT3#
LPC_SMI#/EXTEVNT1#
S3_STATE/GEVENT5#
SYS_RESET#/GPM7#
WAKE#/GEVENT8#H6RSMRST#D3CLK_REQ3#/SATA_IS1#/GPIO6
BLINK/GPM6#
J6
J2
F1
F2
K4
K24
H_THERMTRIP#
EC_SWI#
NB_PWRGD
W14
EC_RSMRST#
SATA_IS0#/GPIO10
SMARTVOLT1/SATA_IS2#/GPIO4
SPKR/GPIO2
SCL0/GPOC0#
SDA0/GPOC1#
CLK_REQ0#/SATA_IS3#/GPIO0
CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39
CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
V17
W21
W18
W17
W20
AE18
AA19
AA18
AD18
SMB_CK_DAT0
SMB_CK_CLK0
SMB_CK_CLK1
DDR3_RST#/GEVENT7#
SMARTVOLT2/SHUTDOWN#/GPIO5
DDC1_SCL/GPIO9
DDC1_SDA/GPIO8
LLB#/GPIO66
SCL1/GPOC2#
SDA1/GPOC3#
K1
K2
C1
G5
Y19
Y18
AA20
SMB_CK_DAT1
demo circuit LID use RI#
SUS_STAT#11,14
KB_RST#34
PM_SLP_S3#34
PM_SLP_S5#34
PBTN_OUT#34
SB_PWRGD34,43
B
EC_SMI#34
GATEA2034
EC_SCI#34
EC_SWI#27,34
EC_RSMRST#34
H_THERMTRIP#6
NB_PWRGD11
SB_SPKR30
SMB_CK_DAT08,9,15,27
SMB_CK_CLK08,9,15,27
SMB_CK_CLK127
SMB_CK_DAT127
R400
4.7K_0402_5%@
R400
4.7K_0402_5%@
R16
0_0402_5%
R16
0_0402_5%
1 2
1 2
+3VS
HPD11,18,19
USB_OC0#/GPM0#
USB_OC5#/IR_TX0/GPM5#
F8
B9
A8
A9
E5
E4
B8
HDA_BITCLK
USB_OC#225,34
USB_OC#032
EC_LID_OUT#34
EXP_CPPE#27
1 2
1 2
R334 33_0402_5%R334 33_0402_5%
R333 33_0402_5%R333 33_0402_5%
R335 33_0402_5%R335 33_0402_5%
HDA_BITCLK_CODEC30
HDA_BITCLK_MDC33
AZ_SDIN3/GPIO46
AZ_BITCLKM1AZ_SDOUTM2AZ_SYNCL6AZ_RST#
HDA_SDOUT
1 2
1 2
R336 33_0402_5%R336 33_0402_5%
HDA_SDOUT_MDC33
HDA_SDOUT_CODEC30
AZ_SDIN2/GPIO44
AZ_SDIN1/GPIO43
AZ_SDIN0/GPIO42
J8
J7
L8
M3
M4
HDA_SDIN1
HDA_SDIN0
HDA_SYNC
1 2
1 2
R337 33_0402_5%R337 33_0402_5%
R338 33_0402_5%R338 33_0402_5%
HDA_SYNC_MDC33
HDA_SDIN030
HDA_SDIN133
AZ_DOCK_RST#/GPM8#
L5
HDARST#
R339 33_0402_5%R339 33_0402_5%
HDA_SYNC_CODEC30
1 2
1 2
R340 33_0402_5%R340 33_0402_5%
HDA_RST#_CODEC30
HDA_RST#_MDC33
HDARST#24
IMC_GPIO0
IMC_GPIO1
SPI_CS2#/IMC_GPIO2
IDE_RST#/F_RST#/IMC_GPO3
IMC_GPIO4
IMC_GPIO5
IMC_GPIO6
F25
E24
H19
E25
H20
H21
D22
IMC_GPIO7
D23
218S7EALA11FG_BGA528_SB700SB700R3@
218S7EALA11FG_BGA528_SB700SB700R3@
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
STRAP PIN
<S0>
SB_TEST2
SB_TEST1
SB_TEST0
EC_SWI#
SMB_CK_CLK0
A
R561
1K_0402_5%
R561
1K_0402_5%
R322
2.2K_0402_5%@
R322
2.2K_0402_5%@
R328
1.2K_0402_5%
R328
R320
R320
+3VALW
2.2K_0402_5%@
2.2K_0402_5%@
R321
2.2K_0402_5%@
R321
2.2K_0402_5%@
1 2
1 2
1 2
1.2K_0402_5%
12
1 2
+3VS
1 1
SMB_CK_DAT0
R329
1.2K_0402_5%
R329
1.2K_0402_5%
1 2
+3VALW
R331
R331
< S0~ S5 ASF only >
SMB_CK_DAT1
EC_RSMRST#
SMB_CK_CLK1
R327
100K_0402_5%
R327
100K_0402_5%
R332
2.2K_0402_5%
R332
2.2K_0402_5%
2.2K_0402_5%
2.2K_0402_5%
12
1 2
1 2
SUS_STAT#
R388
4.7K_0402_5%
R388
4.7K_0402_5%
1 2
+3VS
A
2 2
3 3
4 4
Page 22

ACIN 34,35,37
+3VALW
+3VALW
0.1
0.1
0.1
22 45Wednesday, February 25, 2009
22 45Wednesday, February 25, 2009
22 45Wednesday, February 25, 2009
E
D
AA24
AA25
IDE_IRQ
IDE_IORDY
Part 2 of 5
SB700
Part 2 of 5
SB700
Y22
AB23
IDE_A0
Y23
IDE_A1
IDE_A2
AB24
AD25
AC25
IDE_DRQ
IDE_IOR#
IDE_DACK#
AC24
Y25
Y24
IDE_CS1#
IDE_IOW#
AD24
AD23
IDE_CS3#
IDE_D0/GPIO15
AE22
AC22
AD21
AE20
AB20
IDE_D1/GPIO16
IDE_D2/GPIO17
IDE_D3/GPIO18
IDE_D4/GPIO19
IDE_D5/GPIO20
AD19
AE19
AC20
AD20
AE21
IDE_D6/GPIO21
IDE_D7/GPIO22
IDE_D8/GPIO23
IDE_D9/GPIO24
IDE_D10/GPIO25
ATA 66/100/133
ATA 66/100/133
AB22
AD22
AE23
IDE_D11/GPIO26
IDE_D12/GPIO27
IDE_D13/GPIO28
AC23
IDE_D14/GPIO29
IDE_D15/GPIO30
+3VALW
R571
100K_0402_5%
R571
100K_0402_5%
R572
100K_0402_5%
R572
100K_0402_5%
1 2
1 2
SLP_CHG#
SLP_CHG_M3
G6
D2
D1
F4
U15
J1
SPI_DI/GPIO12
SPI_DO/GPIO11
SPI_CLK/GPIO47
SPI_CS1#/GPIO32F3FANOUT1/GPIO48
LAN_RST#/GPIO13
ROM_RST#/GPIO14
SPI_HOLD#/GPIO31
SPI ROM
SPI ROM
R582
100K_0402_5%
R582
100K_0402_5%
1 2
SLP_CHG_M4
M5
M7
M8
FANOUT0/GPIO3
FANOUT2/GPIO49
P5
P8
R8
C6
TEMP_COMM
FANIN0/GPIO50
FANIN1/GPIO51
FANIN2/GPIO52
D41
CH751H-40PT_SOD323-2
D41
CH751H-40PT_SOD323-2
2 1
BT_DET# 32
EC_THERM# 34
SPK_SEL 30
SPK_SEL
BT_DET#
A4
B4
B6
A6
A5
B5
VIN0/GPIO53
VIN1/GPIO54
TEMPIN0/GPIO61
TEMPIN1/GPIO62
TEMPIN2/GPIO63
TEMPIN3/TALERT#/GPIO64
SATA PWR SERIAL ATA
SATA PWR SERIAL ATA
R562
150K_0402_5%
R562
150K_0402_5%
1 2
SLP_CHG# 25
SLP_CHG_M3 25
SLP_CHG_M4 25
C4
D4
D5
D6
VIN2/GPIO55
VIN3/GPIO56
VIN4/GPIO57
VIN5/GPIO58
HW MONITOR
HW MONITOR
A7
B7
VIN6/GPIO59
VIN7/GPIO60
L56
0_0603_5%
L56
0_0603_5%
12
+SB_AVDD
F6
AVDD
C526
2.2U_0603_6.3V4Z
C526
2.2U_0603_6.3V4Z
1
C525
0.1U_0402_16V4Z
C525
0.1U_0402_16V4Z
1
G7
AVSS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
2
2
Title
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
E
LA-4971P
LA-4971P
LA-4971P
SB700 SATA/IDE/SPI
SB700 SATA/IDE/SPI
SB700 SATA/IDE/SPI
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
SATA_TX2P
SATA_TX2N
SATA_RX2P
SATA_RX2N
SATA_TX3P
SATA_TX3N
SATA_RX3P
AE12
AE13
AD12
AD13
SATA_STX_DRX_P3
SATA_STX_DRX_N3
SATA_STX_DRX_P325
SATA_RXP2_C25
SATA_RXN2_C25
SATA_STX_DRX_N325
ODD
SATA_RX3N
AB14
AE14
AC14
SATA_RXP3_C25
SATA_RXN3_C25
SATA_TX4P
SATA_TX4N
SATA_RX4N
AD14
AD15
SATA_RX4P
SATA_TX5P
AE15
AB16
SATA_TX5N
SATA_RX5N
AE16
AC16
SATA_CAL
SATA_RX5P
V12
AD16
SATA_CAL
R342
1K_0402_1%
R342
1K_0402_1%
12
SATA_X1
Y12
SATA_X1
R343
10K_0402_5%
R343
10K_0402_5%
SATA_X1
12
SATA_TX0P
SATA_TX0N
SATA_RX0N
SATA_RX0P
SATA_TX1P
SATA_TX1N
SATA_RX1N
AE10
AC10
AD10
AD11
SATA_STX_DRX_P1
SATA_STX_DRX_N1
SATA_STX_DRX_P125
SATA_STX_DRX_N125
HDD1
SATA_RX1P
AB12
AE11
AC12
SATA_STX_DRX_P2
SATA_STX_DRX_N2
SATA_STX_DRX_P225
SATA_STX_DRX_N225
SATA_RXP1_C25
SATA_RXN1_C25
eSATA
U15B
U15B
AE9
C
B
AD9
AB10
SATA_X2
W11
AA12
SATA_X2
1 2
+3VS
R341
R341
12
Y4
25MHZ_20P
Y4
25MHZ_20P
12
PLLVDD_SATA
SATA_ACT#/GPIO67
W12
AA11
C523
1U_0402_6.3V4Z
C523
1U_0402_6.3V4Z
+PLLVDD_SATA
2
2
C522
C522
12
1U_0402_6.3V4Z
1U_0402_6.3V4Z
SATA_LED#35
L54
L54
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+1.2V_HT
10M_0402_5%
10M_0402_5%
SATA_X2
12
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
C
SB700R3@
SB700R3@
Issued Date
Issued Date
C625
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
1
+XTLVDD_SATA
1
2
@ C625
@
1
2
12
C524
C524
1U_0402_6.3V4Z
1U_0402_6.3V4Z
L55
L55
BLM18PG121SN1D_0603
BLM18PG121SN1D_0603
+3VS
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
XTLVDD_SATA
C516
C516
A
1 1
2 2
10P_0402_50V8J
10P_0402_50V8J
C517
C517
10P_0402_50V8J
10P_0402_50V8J
A
3 3
4 4
Page 23

0.1Custom
0.1Custom
0.1Custom
D7
A25
A2
B1
VSS_2
VSS_1
E
SB700
SB700
U15E
U15E
G19
F20
VSS_4
VSS_3
VSS_5
AVSS_SATA_1
T10
U10
K16
L4
K11
L10
L7
H8
VSS_8K9VSS_9
VSS_7
VSS_6
VSS_10
VSS_11
VSS_13
VSS_12
AVSS_SATA_5
AVSS_SATA_2
AVSS_SATA_3
AVSS_SATA_4
AVSS_SATA_6
AVSS_SATA_7
AVSS_SATA_8Y9AVSS_SATA_16
AVSS_SATA_9
W9
Y11
V11
V14
U11
U12
L11
Y14
L16
L12
L14
M10
VSS_17
VSS_14
VSS_15
VSS_16
VSS_18M6VSS_19
AVSS_SATA_11
AVSS_SATA_14
AVSS_SATA_12
AVSS_SATA_10
AVSS_SATA_13
Y17
AA9
AB9
AB13
AB11
M13
M11
M15
N12
VSS_21
VSS_20
VSS_22
VSS_23N4VSS_26P6VSS_27P9VSS_28
AVSS_SATA_15
AVSS_SATA_18
AVSS_SATA_19
AVSS_SATA_17
AE8
AC8
AD8
AB17
AB15
P10
P11
N14
VSS_29
VSS_24
VSS_25
AVSS_SATA_20
AVSS_USB_1
A15
P13
P15
VSS_32R1VSS_33R2VSS_34R4VSS_36
VSS_30
VSS_31
AVSS_USB_5D9AVSS_USB_8
AVSS_USB_4
AVSS_USB_3
AVSS_USB_2
D8
B15
C14
R10
R12
R9
VSS_37
VSS_35
AVSS_USB_6
AVSS_USB_7
AVSS_USB_9
D14
D11
D13
D15
T14
R14
T11
T12
VSS_41
VSS_38
VSS_39
VSS_40
AVSS_USB_10
AVSS_USB_11
AVSS_USB_12
AVSS_USB_13
H9
G9
F12
F14
E15
AB1
AE1
Y21
AB25
AB19
U14
VSS_46
VSS_49
VSS_44V6VSS_45
VSS_42U4VSS_48
VSS_47
VSS_43
GROUND
GROUND
AVSS_USB_21
AVSS_USB_20
AVSS_USB_16
AVSS_USB_15
AVSS_USB_19
AVSS_USB_14
AVSS_USB_17
AVSS_USB_18
J9
J15
J14
J11
J12
K10
H17
AE24
P23
R16
VSS_50
PCIE_CK_VSS_9
AVSS_USB_22
AVSS_USB_23
AVSS_USB_24
K12
K14
K15
U20
U18
T17
R19
V20
V18
PCIE_CK_VSS_14
PCIE_CK_VSS_13
PCIE_CK_VSS_12
PCIE_CK_VSS_11
PCIE_CK_VSS_15
PCIE_CK_VSS_10
PCIE_CK_VSS_2
PCIE_CK_VSS_1
J22
J17
H18
+5VS
W19
V21
W25
W22
W24
PCIE_CK_VSS_18
PCIE_CK_VSS_17
PCIE_CK_VSS_16
PCIE_CK_VSS_21
PCIE_CK_VSS_19
PCIE_CK_VSS_20
PCIE_CK_VSS_3
PCIE_CK_VSS_6
PCIE_CK_VSS_8
PCIE_CK_VSS_7
PCIE_CK_VSS_4
PCIE_CK_VSS_5
P16
K25
M17
M21
M16
+3VS
L17
AVSSCK
Part 5 of 5
Part 5 of 5
AVSSC
218S7EALA11FG_BGA528_SB700
218S7EALA11FG_BGA528_SB700
F9
SB700R3@
SB700R3@
23 45Wednesday, February 25, 2009
23 45Wednesday, February 25, 2009
23 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
SB700 Power/GND
SB700 Power/GND
SB700 Power/GND
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
+1.2V_HT
C52910U_0805_6.3V6M C52910U_0805_6.3V6M
C5381U_0402_6.3V4Z C5381U_0402_6.3V4Z
C5371U_0402_6.3V4Z C5371U_0402_6.3V4Z
C5321U_0402_6.3V4Z C5321U_0402_6.3V4Z
C5341U_0402_6.3V4Z C5341U_0402_6.3V4Z
12
12
12
12
R593
0_0805_5%
R593
0_0805_5%
1 2
1 2
C
+1.2V_HT_R
L15
M12
M14
N13
P12
P14
R11
T16
R15
VDD_1
VDD_2
VDD_3
VDD_4
VDD_5
VDD_6
VDD_7
VDD_9
VDD_8
CORE S0
CORE S0
Part 3 of 5
SB700
Part 3 of 5
SB700
+1.2V_HT
C5400.1U_0402_16V4Z C5400.1U_0402_16V4Z
C5270.1U_0402_16V4Z C5270.1U_0402_16V4Z
12
12
+1.2V_HT
L21
CKVDD_1.2V_1
PCI/GPIO I/O
PCI/GPIO I/O
L22
L24
CKVDD_1.2V_2
CKVDD_1.2V_3
L25
CKVDD_1.2V_4
+3VALW
R564
0_0805_5%
R564
0_0805_5%
1 2
+S5_3V
IDE/FLSH I/O
IDE/FLSH I/O
C55622U_0805_6.3V6M @C55622U_0805_6.3V6M @
C5592.2U_0603_6.3V4Z C5592.2U_0603_6.3V4Z
C5640.1U_0402_16V4Z C5640.1U_0402_16V4Z
C5612.2U_0603_6.3V4Z C5612.2U_0603_6.3V4Z
C5650.1U_0402_16V4Z C5650.1U_0402_16V4Z
C5630.1U_0402_16V4Z C5630.1U_0402_16V4Z
C5621U_0402_6.3V4Z C5621U_0402_6.3V4Z12C5691U_0402_6.3V4Z C5691U_0402_6.3V4Z
12
12
12
12
12
1 2
A17
A24
B17
J5
L1
S5_3.3V_1
S5_3.3V_2
S5_3.3V_3
S5_3.3V_4J4S5_3.3V_5
A-LINK I/O
POWER
POWER
A-LINK I/O
L64
0_0603_5%
L64
0_0603_5%
+S5_1.2V
L2
S5_3.3V_7
S5_3.3V_6
+1.2VALW
C5701U_0402_6.3V4Z C5701U_0402_6.3V4Z
12
12
3.3V_S5 I/OCORE S5
3.3V_S5 I/OCORE S5
L65
L65
G4
G2
S5_1.2V_2
S5_1.2V_1
+1.2VALW
C57310U_0805_10V4Z @C57310U_0805_10V4Z @
1 2
0_0603_5%
0_0603_5%
+1.2_USB
A10
SATA I/O
SATA I/O
C5750.1U_0402_16V4Z C5750.1U_0402_16V4Z
C5741U_0402_6.3V4Z C5741U_0402_6.3V4Z
12
12
B10
USB_PHY_1.2V_1
USB_PHY_1.2V_2
R346
1K_0402_5%
R346
1K_0402_5%
D14
CH751H-40PT_SOD323-2
D14
CH751H-40PT_SOD323-2
12
21
C579
C579
2
C578
C578
2
+V5_VREF
+AVDDCK_3.3V
AE7
J16
V5_VREF
AVDDCK_3.3V
+3VALW
1U_0603_10V4Z
1U_0603_10V4Z
1
L67
0_0603_5%
L67
0_0603_5%
12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
+AVDDCK_1.2V
+AVDDC
K17
E9
AVDDC
AVDDCK_1.2V
PLL CLKGEN I/O
PLL CLKGEN I/O
USB I/O
USB I/O
C5860.1U_0402_16V4Z C5860.1U_0402_16V4Z
C5852.2U_0603_6.3V4Z C5852.2U_0603_6.3V4Z
12
12
+1.2V_HT
L68
0_0603_5%
L68
0_0603_5%
12
+AVDDCK_1.2V
C5872.2U_0603_6.3V4Z C5872.2U_0603_6.3V4Z
C5880.1U_0402_16V4Z C5880.1U_0402_16V4Z
12
12
L69
L69
+3VS
C5892.2U_0603_6.3V4Z C5892.2U_0603_6.3V4Z
12
0_0603_5%
0_0603_5%
12
+AVDDCK_3.3V
C5900.1U_0402_16V4Z C5900.1U_0402_16V4Z
12
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Security Classification
Security Classification
Security Classification
/
/
/
D
Deciphered Date
Deciphered Date
Deciphered Date
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
VDDQ_2M9VDDQ_6
VDDQ_3
VDDQ_1L9VDDQ_4U9VDDQ_5
U15C
U15C
B
A
T15
12
C528 22U_0805_6.3V6M@C528 22U_0805_6.3V6M@
+3VS
1 1
U16
1 2
C530 1U_0402_6.3V4Z@C530 1U_0402_6.3V4Z@
C531 1U_0402_6.3V4Z@C531 1U_0402_6.3V4Z@
VDDQ_7V8VDDQ_8W7VDDQ_9
U17
1 2
1 2
1 2
C533 1U_0402_6.3V4Z@C533 1U_0402_6.3V4Z@
C536 1U_0402_6.3V4Z@C536 1U_0402_6.3V4Z@
VDDQ_11
VDDQ_12
VDDQ_10
Y6
AB5
AA4
AB21
1 2
1 2
1 2
1 2
No IDE device unmount CAP
C541 0.1U_0402_16V4Z@C541 0.1U_0402_16V4Z@
C542 0.1U_0402_16V4Z@C542 0.1U_0402_16V4Z@
C539 0.1U_0402_16V4Z@C539 0.1U_0402_16V4Z@
C535 1U_0402_6.3V4Z@C535 1U_0402_6.3V4Z@
VDD33_18_2
VDD33_18_3
VDD33_18_1
Y20
AA21
AE25
AA22
+3VS
VDD33_18_4
+PCIE_VDDR
L61
0_0805_5%
L61
0_0805_5%
12
12
C552 4.7U_0805_10V6KC552 4.7U_0805_10V6K
+1.2V_HT
PCIE_VDDR_2
PCIE_VDDR_1
P20
P19
P18
1 2
1 2
1 2
1 2
C555 1U_0402_6.3V4ZC555 1U_0402_6.3V4Z
C554 1U_0402_6.3V4ZC554 1U_0402_6.3V4Z
C553 1U_0402_6.3V4Z@C553 1U_0402_6.3V4Z@
C558 1U_0402_6.3V4ZC558 1U_0402_6.3V4Z
PCIE_VDDR_4
PCIE_VDDR_3
PCIE_VDDR_7
PCIE_VDDR_5
PCIE_VDDR_6
P21
R25
R22
R24
1 2
1 2
C557 0.1U_0402_16V4ZC557 0.1U_0402_16V4Z
C560 0.1U_0402_16V4ZC560 0.1U_0402_16V4Z
2 2
AVDD_SATA_1
AA14
AB18
+1.2V_SATA
L63
0_0805_5%
L63
0_0805_5%
12
+1.2V_HT
AVDD_SATA_4
AVDD_SATA_2
AVDD_SATA_3
AVDD_SATA_5
AVDD_SATA_6
AA15
AA17
AE17
AC18
AD17
12
1 2
C567 1U_0402_6.3V4ZC567 1U_0402_6.3V4Z
C566 22U_0805_6.3V6MC566 22U_0805_6.3V6M
AVDD_SATA_7
1 2
1 2
1 2
C568 1U_0402_6.3V4ZC568 1U_0402_6.3V4Z
C572 0.1U_0402_16V4ZC572 0.1U_0402_16V4Z
C571 0.1U_0402_16V4ZC571 0.1U_0402_16V4Z
AVDDTX_0
A16
B16
+AVDD_USB
L66
0_0805_5%
L66
0_0805_5%
12
+3VALW
AVDDTX_1
AVDDTX_2
AVDDTX_3
AVDDTX_5
AVDDTX_4
E17
C16
D16
D17
1 2
1 2
C577 10U_0805_10V4ZC577 10U_0805_10V4Z
C576 10U_0805_10V4ZC576 10U_0805_10V4Z
AVDDRX_2
AVDDRX_0
AVDDRX_4
AVDDRX_1
AVDDRX_3
F18
F15
F17
G18
G17
G15
1 2
1 2
1 2
1 2
1 2
C581 1U_0402_6.3V4ZC581 1U_0402_6.3V4Z
C583 0.1U_0402_16V4ZC583 0.1U_0402_16V4Z
C584 0.1U_0402_16V4ZC584 0.1U_0402_16V4Z
C582 0.1U_0402_16V4ZC582 0.1U_0402_16V4Z
C580 1U_0402_6.3V4ZC580 1U_0402_6.3V4Z
3 3
AVDDRX_5
218S7EALA11FG_BGA528_SB700SB700R3@
218S7EALA11FG_BGA528_SB700SB700R3@
B
A
4 4
Page 24

0.1
0.1
0.1
24 45Wednesday, February 25, 2009
24 45Wednesday, February 25, 2009
24 45Wednesday, February 25, 2009
E
GP16PCI_CLK2
D
Internal pull up
GP17
H,H = Reserved
EC
ENABLEDECDISABLED
L,H = LPC ROM (Default)
H,L = SPI ROM
L,L = FWH ROM
DEFAULT
AZ_RST_CD#
EXT. RTC
(PD on X1,
apply
32KHz to
INTERNAL
RTC
RTC_CLKLPC_CLK1
C
LPC_CLK0
NOTE: SB700 HAS INTERNAL 15K PULL UP RESISTOR FOR RTC_CLK
DEFAULT
CLKGEN
ENABLED
ENABLE PCI
MEM BOOT
RTC_CLK)
DEFAULT
CLKGEN
DISABLED
DEFAULT
DISABLE PCI
MEM BOOT
RESERVED
RESERVED
PCI_CLK4 PCI_CLK5
+3VALW +3VALW+3VALW +3VALW +3VALW +3VALW
R356
2.2K_0402_5%
R356
2.2K_0402_5%
12
R355
2.2K_0402_5%
R355
2.2K_0402_5%
12
@
@
R354
10K_0402_5%
R354
10K_0402_5%
12
@
@
R353
10K_0402_5%
R353
10K_0402_5%
12
@
@
R352
10K_0402_5%
R352
10K_0402_5%
12
@
@
R351
10K_0402_5%
R351
10K_0402_5%
12
@
@
R350
10K_0402_5%
R350
10K_0402_5%
12
@
@
SI2: mount 2.2K
R366
2.2K_0402_5%
R366
2.2K_0402_5%
12
@
@
R365
2.2K_0402_5%
R365
2.2K_0402_5%
12
R364
10K_0402_5%
R364
10K_0402_5%
12
R363
2.2K_0402_5%
R363
2.2K_0402_5%
12
@
@
R362
10K_0402_5%
R362
10K_0402_5%
12
R361
10K_0402_5%
R361
10K_0402_5%
12
R360
10K_0402_5%
10K_0402_5%
12
@ R360
@
Need to confirm if SB SPI ROM will mount
RESERVED
PCI_AD23
USE DEFAULT
PCIE STRAPS
PCI_AD25 PCI_AD24
USE IDE
PLL
USE ACPI
BCLK
DEFAULT
DEFAULT
DEFAULT
USE EEPROM
PCIE STRAPS
BYPASS IDE
PLL
BYPASS
ACPI
BCLK
R378
2.2K_0402_5%
R378
2.2K_0402_5%
12
@
@
R377
2.2K_0402_5%
R377
2.2K_0402_5%
12
@
@
R376
2.2K_0402_5%
R376
2.2K_0402_5%
12
@
@
R375
2.2K_0402_5%
R375
2.2K_0402_5%
12
@
@
E
LA-4971P
LA-4971P
LA-4971P
SB700 STRAPS
SB700 STRAPS
SB700 STRAPS
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
R359
10K_0402_5%
HDARST#21
GPIO1721
GPIO1621
2 2
10K_0402_5%
12
@ R359
@
R358
10K_0402_5%
R358
10K_0402_5%
12
R357
10K_0402_5%
R357
10K_0402_5%
12
USE PCI
PLL
DEFAULT
BYPASS
RESET
DEFAULT
HIGH
3 3
PCI PLL
USE
SHORT
PULL
PCI_AD27 PCI_AD26
USE
LONG
PCI_AD28
DEBUG STRAPS
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
PULL
LOW
RESET
PCI_AD2820,28
PCI_AD2720,28
PCI_AD2620,28
PCI_AD2520,28
PCI_AD2420,28
PCI_AD2320,28
R374
2.2K_0402_5%
R374
2.2K_0402_5%
12
@
@
R373
2.2K_0402_5%
R373
2.2K_0402_5%
12
@
@
B
A
4 4
R349
10K_0402_5%
R349
+3VS +3VS +3VS +3VS
10K_0402_5%
12
@
@
R348
10K_0402_5%
R348
10K_0402_5%
12
@
@
R347
10K_0402_5%
R347
10K_0402_5%
12
@
@
PCI_CLK220
PCI_CLK420
PCI_CLK520
RTC_CLK20
CLK_PCI_EC20,34
CLK_PCI_SIO220,33
PCI_CLK320
DEFAULT
IGNORE
DEBUG
USE
DEBUG
STRAPS
PCI_CLK3
BOOTFAIL
TIMER
PULL
HIGH
ENABLED
B
STRAPS
DEFAULT
BOOTFAIL
TIMER
DISABLED
PULL
LOW
REQUIRED STRAPS
A
1 1
Page 25

C418
0.1U_0402_16V7K
C418
0.1U_0402_16V7K
1
0.1Custom
0.1Custom
0.1Custom
2
USB_OC#2 21,34
C351
1000P_0402_50V7K
C351
1000P_0402_50V7K
1
2
25 45Wednesday, February 25, 2009
25 45Wednesday, February 25, 2009
25 45Wednesday, February 25, 2009
E
D
C
+5VS
1.1A
C417
0.1U_0402_16V7K
C417
0.1U_0402_16V7K
1
2
C416
1U_0402_6.3V4Z
@
C416
1U_0402_6.3V4Z
@
1
2
C415
10U_0805_10V4Z
C415
10U_0805_10V4Z
1
2
C414
10U_0805_10V4Z
C414
10U_0805_10V4Z
1
2
SATA_RXN3_C
SATA_STX_DRX_P3
SATA_STX_DRX_N3
1 2
1 2
1 2
C545 0.01U_0402_25V7K16inch@ C545 0.01U_0402_25V7K16inch@
C427 0.01U_0402_25V7K16inch@ C427 0.01U_0402_25V7K16inch@
C426 0.01U_0402_25V7K16inch@ C426 0.01U_0402_25V7K16inch@
Place component's closely ODD CONN.
SATA_RXP3_C
1 2
C544 0.01U_0402_25V7K16inch@ C544 0.01U_0402_25V7K16inch@
+5VS
SATA_RXN3_C 22
SATA_RXP3_C 22
1 2
1 2
C425 0.01U_0402_25V7K17inch@ C425 0.01U_0402_25V7K17inch@
C424 0.01U_0402_25V7K17inch@ C424 0.01U_0402_25V7K17inch@
SATA_STX_DRX_N3 22
SATA_STX_DRX_P3 22
1 2
1 2
C519 0.01U_0402_25V7K17inch@ C519 0.01U_0402_25V7K17inch@
C518 0.01U_0402_25V7K17inch@ C518 0.01U_0402_25V7K17inch@
W=60mils
+USB_VCCB
1.4A
U19
U19
C367 4.7U_0805_10V4Z@C367 4.7U_0805_10V4Z@
1 2
8
GND1IN
7
OUT6OUT
OUT
IN3EN#
2
+5VALW
1 2
R584 0_0402_5%R584 0_0402_5%
5
FLG
G528_SO8
G528_SO8
4
USB_CHG_EN#34
eSATA/USB Conn
W=60mils
+USB_VCCB
1
+
+
1
C352
0.1U_0402_16V7K
C352
0.1U_0402_16V7K
2
USB
USB
VBUS1D-2D+3GND4GND5A+6A-7GND8B-9B+10GND
JESATA
220U_6.3V_M
220U_6.3V_M
2
2
D15
@D15
@
1
1 2
R96 0_0402_5%
R96 0_0402_5%
@
@
JESATA
3
PJDLC05_SOT23-3
PJDLC05_SOT23-3
3
4
L46
L46
4
USB20_P2_R_S
USB20_N2_R_S
C350
C350
Reserve for EMI request
USB20_N2_R_SUSB20_N2_R
223
1
1
15
SHIELD12SHIELD13SHIELD14SHIELD
ESATA
ESATA
FOX_3Q318111@
FOX_3Q318111@
11
SATA_RXN2
SATA_TXN2
SATA_TXP2
SATA_RXP2
12
12
1 2
1 2
C361 0.01U_0402_25V7KC361 0.01U_0402_25V7K
C521 0.01U_0402_25V7KC521 0.01U_0402_25V7K
C357 0.01U_0402_25V7KC357 0.01U_0402_25V7K
C520 0.01U_0402_25V7KC520 0.01U_0402_25V7K
SATA_RXP2_C22
SATA_RXN2_C22
SATA_STX_DRX_P222
SATA_STX_DRX_N222
1 2
WCM-2012-900T_0805
WCM-2012-900T_0805
R95 0_0402_5%@R95 0_0402_5%@
E
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SATA HDD/ODD/ESATA_USB
SATA HDD/ODD/ESATA_USB
SATA HDD/ODD/ESATA_USB
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
SATA_STX_DRX_N3_16
SATA_STX_DRX_P3_16
SATA_RXP3_C_16
SATA_RXN3_C_16
1A+2A-3
4B-5B+6
7DP8
10MD11
GND
+5V9+5V
JODD
JODD
GND
GND
< 16" SATA ODD Conn >
B
A
SATA_STX_DRX_P1 22
SATA_STX_DRX_N1 22
SATA_RXN1_C 22
SATA_RXP1_C 22
1 2
1 2
1 2
1 2
C513 0.01U_0402_25V7KC513 0.01U_0402_25V7K
C412 0.01U_0402_25V7KC412 0.01U_0402_25V7K
C512 0.01U_0402_25V7KC512 0.01U_0402_25V7K
C410 0.01U_0402_25V7KC410 0.01U_0402_25V7K
+3VS
SATA_IRX_DTX_P1
SATA_TXP1
SATA_TXN1
SATA_IRX_DTX_N1
1A+2A-3
4B-5B+6
7
10
GND
GND
V338V339V33
1 1
GND
JHDD
JHDD
< SATA HDD1 Conn >
13
GND12GND
GND14GND
15
13V514V515V516
GND11GND12GND
+5VS
Issued Date
Issued Date
USB20_P2_R USB20_P2_R_S
SATA_IRX_DTX_N3
SATA_TXN3
SATA_TXP3
166
447
1
223355889
SATA_IRX_DTX_P3
71010
13
911111212
GND
14
GND
E&T_6905-E12N-00R@
E&T_6905-E12N-00R@
R961
43K_0402_1%
R961
43K_0402_1%
12
R964
51K_0402_1%
R964
51K_0402_1%
12
+5VS
SANTA_206401-1_RV@
SANTA_206401-1_RV@
JODDB
JODDB
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
< 17" SATA ODD Conn >
R960
75K_0402_1%
R960
17
GND
18
19
GND
Reserved
22
V1220V1221V12
24
C390
0.1U_0402_16V7K
C390
0.1U_0402_16V7K
1
C389
0.1U_0402_16V7K
C389
0.1U_0402_16V7K
1
C388
0.1U_0402_16V7K
C388
0.1U_0402_16V7K
1
Place closely JHDD0 SATA CONN.
OCTEK_SAT-22SO1G_RV@
OCTEK_SAT-22SO1G_RV@
GND23GND
1.2A
C387
10U_0805_10V4Z
C387
10U_0805_10V4Z
1
+5VS
C339
0.1U_0402_16V7K
C339
0.1U_0402_16V7K
1
2
@
2
2
2
2
@
+3VS rail reserve for SSDSSD HDD need 400mA for 3V(PHISON)
C338
0.1U_0402_16V7K
C338
0.1U_0402_16V7K
1
2
@
@
C337
0.1U_0402_16V7K
C337
0.1U_0402_16V7K
1
2
@
@
C336
10U_0805_10V4Z
@
C336
10U_0805_10V4Z
@
1
+3VS
2
2 2
75K_0402_1%
12
+USB_VCCB +USB_VCCB
U47
U47
1OE#11A
2OE#42A
10
10/22 Add for USB Sleep & Charge M3/M4
SLP_CHG_M322
< eSATA/USB >
3OE#
4OE#
13
USB20_P2_R_U USB20_P2_S_O
SLP_CHG_M422
R963
R963
12
1 2
USB20_N2_S_O
R962 100_0402_5%R962 100_0402_5%
3
6
11
1B
2B
4B
3A
4A
2
5
9
12
USB20_N2_R_U
51K_0402_1%
51K_0402_1%
+3VALW
73B8
GND
VCC
SN74CBT3125CPWR_TSSOP14P
SN74CBT3125CPWR_TSSOP14P
14
2
C872 0.1U_0402_16V4ZC872 0.1U_0402_16V4Z
+USB_VCCB
U48
U48
1
3 3
SLP_CHG# 22
1 2
SLP_CHG#
USB20_P2_R
C873 0.1U_0402_16V4ZC873 0.1U_0402_16V4Z
8
9
10
S
D+
VCC
2D+3GND
1D-
1D+
2
1
USB20_P2_R_U
USB20_N2_R_U
USB20_P221
USB20_N2_R
6
7
D-
OE#
2D-
5
4
USB20_N221
TS3USB221RSER_QFN10_2x1P5~D
TS3USB221RSER_QFN10_2x1P5~D
4 4
D=1D
D=2D
FUNCTION
LOW
HIGH
SLP_CHG#
LOW
SLP_CHG_M4
LOW HIGH
HIGH
SLP_CHG_M3
Mode 3
Mode 4
B
A
Page 26

E
2
+LAN_VDD12
2
CL5
0.1U_0402_16V4Z
CL5
0.1U_0402_16V4Z
1
CL4
0.1U_0402_16V4Z
CL4
0.1U_0402_16V4Z
1
CL15
CL15
2
+LAN_VDD12
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
Close to Pin45
CL14
CL14
2
+EVDD12
CL13
CL13
2
Close to Pin19
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
+3V_LAN
CL12
0.1U_0402_16V4Z
CL12
0.1U_0402_16V4Z
1
2
CL11
0.1U_0402_16V4Z
CL11
0.1U_0402_16V4Z
1
2
CL7
0.1U_0402_16V4Z
CL7
0.1U_0402_16V4Z
1
2
CL6
10U_0805_10V4Z
CL6
10U_0805_10V4Z
1
2
Close to Pin48
@
@
0.1
0.1
0.1
26 45Wednesday, February 25, 2009
26 45Wednesday, February 25, 2009
26 45Wednesday, February 25, 2009
E
Close to Pin10,13,30,36
D
T25 PADT25 PAD
C
CL3
0.1U_0402_16V4Z
CL3
0.1U_0402_16V4Z
1
2
CL2
0.1U_0402_16V4Z
CL2
0.1U_0402_16V4Z
1
2
+3V_LAN
12
1 2
RL2 1K_0402_5%RL2 1K_0402_5%
RL1 3.6K_0402_5%RL1 3.6K_0402_5%
+LAN_VDD12
+EVDD12
Close to Pin1,37,29
+3V_LAN
+LAN_VDD12
CL10
0.1U_0402_16V4Z
CL10
0.1U_0402_16V4Z
1
2
VCTRL12
RJ45_GND
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
RTL8103EL 10/100 LAN
RTL8103EL 10/100 LAN
RTL8103EL 10/100 LAN
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
LAN_SK_LAN_LINK#
LAN_DI
LAN_DO
35
34
33
LED1/EESK
LED3/EEDO
LED2/EEDI/AUX
HSOP20HSON
UL2
UL2
B
A
21
PCIE_PTX_IRX_P3
PCIE_PTX_IRX_N3
1 2
1 2
CL9 0.1U_0402_16V7KCL9 0.1U_0402_16V7K
CL8 0.1U_0402_16V7KCL8 0.1U_0402_16V7K
Place Close to Chip
PCIE_PTX_C_IRX_N310
PCIE_PTX_C_IRX_P310
LAN_ACTIVITY#
LAN_MDI1+
LAN_MDI0-
LAN_MDI0+
LAN_CS
2
3
5
38
32
LED0
EECS
MDIP0
MDIP1
MDIN0
RTL8103EL-GR
RTL8103EL-GR
HSIP15HSIN16REFCLK_P17REFCLK_M
18
CLK_PCIE_LAN#15
CLK_PCIE_LAN15
PCIE_ITX_C_PRX_P310
PCIE_ITX_C_PRX_N310
LAN_MDI1-
6
9
12
NC8NC
NC11NC
MDIN1
PERSTB27LANWAKEB
CLKREQB
25
PLT_RST#11,14,19,20,27,33,34
CLKREQ_LAN15
1 1
VCTRL12
4
48
NC
VCTRL12A
RSET
46
26
LAN_WAKE#
RL3
2.49K_0402_1%
RL3
2.49K_0402_1%
1 2
LAN_WAKE#34
19
30
VDDTX
ISOLATEB
41
28
ISOLATEB
LAN_X1
13
36
DVDD12
DVDD12
DVDD12
CKXTAL2
CKXTAL1
42
LAN_X2
10
DVDD12
39
NC
RL4
RL4
+3V_LAN
44
29
45
NC
VDD33
VCTRL12D
GND
NC23NC
7
24
LAN_WAKE#
10K_0402_5%
10K_0402_5%
1 2
1
40
37NC43
VDD33
AVDD33
GND
GND
GND
47
14
31
+3VS
NC
YL1
YL1
GNDTX
RTL8103EL-GR_LQFP48_7X7
RTL8103EL-GR_LQFP48_7X7
22
RL5
1K_0402_1%
RL5
1K_0402_1%
12
CL18
27P_0402_50V8J
CL18
27P_0402_50V8J
1
2
LAN_X2LAN_X1
12
25MHz_20pF_6X25000017
25MHz_20pF_6X25000017
1
2
CL17
CL17
27P_0402_50V8J
27P_0402_50V8J
ISOLATEB
RL6
15K_0402_5%
RL6
15K_0402_5%
2 2
RL9
75_0402_1%
RL9
75_0402_1%
RL8
75_0402_1%
RL8
75_0402_1%
1 2
1 2
CL27
1000P_0402_50V8-J
CL27
1000P_0402_50V8-J
CL26
1000P_0402_50V8-J
CL26
1000P_0402_50V8-J
1 2
1 2
10/21 Add CL26, CL27
for customer request
RJ45_MIDI0-
RJ45_MIDI0+
RJ45_MIDI1+
RJ45_MIDI1-
9
10CT11CT14
15
16
12
NC13NC
TX-
TX+
TD+1TD-2CT3CT6RD+7RD-
UL3
UL3
LAN_MDI0-
LAN_MDI0+
CL20
CL20
Place these components
colsed to LAN chip
RX-
RX+
NC4NC
8
5
LAN_MDI1-
LAN_MDI1+
0.01U_0402_25V7K
0.01U_0402_25V7K
CL21
0.01U_0402_25V7K
CL21
0.01U_0402_25V7K
12
12
Yellow LED-
JLAN
JLAN
< LAN Conn >
11
12
1
2
CL19
CL19
LFE8456E-R
LFE8456E-R
68P_0402_50V8J
68P_0402_50V8J
RL11
150_0402_1%
RL11
150_0402_1%
RL7
150_0402_1%
RL7
150_0402_1%
12
12
LAN_ACTIVITY#
Add RL11, RL12 for customer request
Change RL7, RL10 from 300 to 150
3 3
Yellow LED+
8
+3V_LAN
RJ45_MIDI1-
14
SHLD2
PR1-2PR1+
PR2+3PR3+4PR3-5PR2-6PR4+7PR4-
RJ45_MIDI0-
RJ45_MIDI1+
2
CL22
CL22
13
SHLD1
Green LED+
Green LED-
1
9
10
RJ45_MIDI0+
1
68P_0402_50V8J
68P_0402_50V8J
RL10
150_0402_1%
RL10
150_0402_1%
RL12
150_0402_1%
RL12
150_0402_1%
12
12
LAN_SK_LAN_LINK#
+3V_LAN
CL25
CL25
1
TYCO_2068888-1_12P-T@
TYCO_2068888-1_12P-T@
CL24
CL24
1
CL23
1000P_1808_3KV7K
CL23
1000P_1808_3KV7K
1 2
RJ45_GND LANGND
4.7U_0603_6.3V6K
4.7U_0603_6.3V6K
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
4 4
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
Page 27

0.1
0.1
0.1
CN6
0.1U_0402_16V4Z
CN6
0.1U_0402_16V4Z
1
2
EXPCARD@
EXPCARD@
E
Imax = 0.75A
CN5
CN5
1
+1.5VS_CARD
10U_0805_10V4Z
10U_0805_10V4Z
2
EXPCARD@
EXPCARD@
1
Imax = 1.35A
1
+3VS_CARD
CN4
0.1U_0402_16V4Z
CN4
0.1U_0402_16V4Z
2
EXPCARD@
EXPCARD@
CN3
10U_0805_10V4Z
CN3
10U_0805_10V4Z
2
EXPCARD@
EXPCARD@
CN2
CN2
1
Imax = 0.275A
CN1
CN1
1
+3VALW_CARD
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
EXPCARD@
EXPCARD@
10U_0805_10V4Z
10U_0805_10V4Z
2
EXPCARD@
EXPCARD@
27 45Wednesday, February 25, 2009
27 45Wednesday, February 25, 2009
27 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
NEW CARD/WLAN/KS
Compal Electronics, Inc.
NEW CARD/WLAN/KS
Compal Electronics, Inc.
NEW CARD/WLAN/KS
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
+1.5VS_CARD+1.5VS
60mils
1.5Vout111.5Vout
UN1
UN1
1.5Vin121.5Vin
C
CM19
4.7U_0805_10V4Z
CM19
4.7U_0805_10V4Z
1
2
WLAN@
WLAN@
CM18
0.1U_0402_16V4Z
CM18
0.1U_0402_16V4Z
1
2
+3VS
WLAN@
WLAN@
+1.5VS
2244668
CM17
0.01U_0402_25V7K
CM17
0.01U_0402_25V7K
1
B
+3VS
2
WLAN@
WLAN@
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151GND1
JWLAN
JWLAN
WL_OFF# 34
PLT_RST# 11,14,19,20,26,33,34
PLT_RST#
81010121214141616181820202222242426262828303032323434363638384040424244444646484850505252
USB20_P8 21
USB20_N8 21
SMB_CK_DAT1 21
SMB_CK_CLK1 21
SMB_CK_CLK1
SMB_CK_DAT1
USB20_N8
USB20_P8
54
53
GND2
FOX_AS0B226-S40N-7F@
FOX_AS0B226-S40N-7F@
13
14
40mils
5
3.3Vout33.3Vout
3.3Vin23.3Vin
4
+3VS +3VS_CARD
+3VALW_CARD
40mils
19
15
OC#
AUX_OUT
SYSRST#6SHDN#20STBY#
AUX_IN
17
PLT_RST#
+3VALW
PERST#
8
16
NC
PERST#
1
SUSP#19,30,34,36,39,41
SYSON34,36,42
7
21
GND
Thermal_Pad
CPPE#10CPUSB#
9
EXP_CPPE#
CP_USB#
RCLKEN
18
RCLKEN
TPS2231MRGPR-2EXPCARD@
TPS2231MRGPR-2EXPCARD@
30
GND31GND32GND29GND
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26GND27GND
JEXP
JEXP
CP_USB#
SMB_CK_CLK0
SMB_CK_DAT0
EC_SWI#
PERST#
CLKREQ#
EXP_CPPE#
SMB_CK_DAT08,9,15,21
SMB_CK_CLK08,9,15,21
+1.5VS_CARD
EC_SWI#21,34
+3VS_CARD
+3VALW_CARD
CLKREQ_NCARD# 15
EXP_CPPE#21
CLK_PCIE_NCARD15
CLK_PCIE_NCARD#15
PCIE_PTX_C_IRX_N010
PCIE_PTX_C_IRX_P010
PCIE_ITX_C_PRX_N010
USB20_N521
USB20_P521
PCIE_ITX_C_PRX_P010
SANTA_130812-3_LT
EXPCARD@
SANTA_130812-3_LT
EXPCARD@
28
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
Security Classification
Security Classification
Security Classification
/
/
/
D
Deciphered Date
Deciphered Date
Deciphered Date
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
CM22
4.7U_0805_10V4Z
CM22
4.7U_0805_10V4Z
1
2
WLAN@
WLAN@
CM21
0.1U_0402_16V4Z
CM21
0.1U_0402_16V4Z
1
2
A
< PCIe Mini Card for WLAN >
+1.5VS
WLAN@
WLAN@
CM20
0.01U_0402_25V7K
CM20
0.01U_0402_25V7K
1
2
WLAN@
WLAN@
1 1
E51_TXD_R
+3VS
1 2
CLKREQ_MCARD2#15
CLK_PCIE_MCARD2#15
CLK_PCIE_MCARD215
PCIE_ITX_C_PRX_P210
PCIE_ITX_C_PRX_N210
PCIE_PTX_C_IRX_P210
PCIE_PTX_C_IRX_N210
1 2
RM7 0_0402_5%RM7 0_0402_5%
RM6 0_0402_5%RM6 0_0402_5%
E51_TXD
E51_RXD E51_RXD_R
E51_TXD34
E51_RXD34
2 2
share with USB OC PIN
need always pull high
CP_USB#
EXP_CPPE#
1 2
1 2
RN2 100K_0402_5%EXPCARD@ RN2 100K_0402_5%EXPCARD@
RN1 100K_0402_5%EXPCARD@ RN1 100K_0402_5%EXPCARD@
+3VALW
PLT_RST#
1 2
RN3 100K_0402_5%EXPCARD@ RN3 100K_0402_5%EXPCARD@
CN7
0.1U_0402_16V4Z
CN7
0.1U_0402_16V4Z
1
2
@
@
RN4
10K_0402_5%
10K_0402_5%
12
@ RN4
@
RN5
10K_0402_5%
10K_0402_5%
12
+3VS +3VS +3VS
@ RN5
@
3 3
CLKREQ_NCARD#
4
@
@
Y
5
B2A
CLKREQ#
UN2
NC7SZ32P5X_NL_SC70-5
UN2
NC7SZ32P5X_NL_SC70-5
G3Vcc
1
Q21
2N7002_SOT23-3
@
Q21
2N7002_SOT23-3
@
D
S
D
S
13
G
G
2
RCLKEN
CLKREQ_NCARD#CLKREQ#
RN6
0_0402_5%
0_0402_5%
1 2
EXPCARD@ RN6
EXPCARD@
< Reserve for test >
4 4
A
Page 28

CB4
0.1U_0402_16V4Z
PCMCIA@
CB4
0.1U_0402_16V4Z
PCMCIA@
1
2
JPCM
JPCM
GND1DATA32DATA43DATA54DATA65DATA76CE1#7ADD108OE#9ADD1110ADD911ADD812ADD1313ADD1414WE#15READY16VCC17VPP18ADD1619ADD1520ADD1221ADD722ADD623ADD524ADD425ADD326ADD227ADD128ADD029DATA030DATA131DATA232WP33GND
GND35CD1#36DATA1137DATA1238DATA1339DATA1440DATA1541CE2#42VS1#43IORD#44IOWR#45ADD1746ADD1847ADD1948ADD2049ADD2150VCC51VPP52ADD2253ADD2354ADD2455ADD2556VS2#57RESET58WAIT#59INPACK#60REG#61BVD262BVD163DATA864DATA965DATA1066CD2#67GND
PCMCIA Socket
72
GND69GND70GND71GND
SANTA_130625-3_LT
@SANTA_130625-3_LT
@
34
68
0.1
0.1
0.1
28 45Wednesday, February 25, 2009
28 45Wednesday, February 25, 2009
28 45Wednesday, February 25, 2009
D
CB3
4.7U_0805_10V4Z
PCMCIA@
CB3
4.7U_0805_10V4Z
PCMCIA@
1
2
+5VS+3VS
2
3
4
+5V
GND
CB2
4.7U_0805_10V4Z
PCMCIA@
CB2
4.7U_0805_10V4Z
PCMCIA@
1
2
CB1
0.1U_0402_16V4Z
PCMCIA@
CB1
0.1U_0402_16V4Z
PCMCIA@
1
2
CB12
4.7U_0805_10V4Z
PCMCIA@
CB12
4.7U_0805_10V4Z
C
+S1_VCC
PCMCIA@
1
2
CB11
0.1U_0402_16V4Z
PCMCIA@
CB11
0.1U_0402_16V4Z
PCMCIA@
1
2
+3.3V1+3.3V
VCC3#8VCC5#
VCC/VPP5VCC/VPP
UB2
UB2
+S1_VCC
IDSEL SELECT POWER-ON-STRAPPING
OZ2210GN-B1_SO8
OZ2210GN-B1_SO8
7
6
1 2
1 2
RB17 33K_0402_5%PCMCIA@ RB17 33K_0402_5%PCMCIA@
RB16 33K_0402_5%PCMCIA@ RB16 33K_0402_5%PCMCIA@
(SEE NOTE & TABLE FOR OPTIONS)
UB1
UB1
S1_D3
PCMCIA@
PCMCIA@
S1_D10
124
125
123
103
D10/CAD31
VCC3#/VCCD1#/SCLK
VCC5#/VCCD0#/SDATA
VPP_PGM/VPPD0/SLATCH
CORE_VCC
CORE_VCC77CORE_VCC
CORE_VCC
PCI_VCC1PCI_VCC20PCI_VCC33AD314AD305AD296AD287AD278AD269AD2510AD2413AD2314AD2215AD2116AD2017AD1918AD1819AD1721AD1622AD1528AD1429AD1330AD1231AD1134AD1035AD936AD837AD738AD639AD540AD441AD342AD243AD144AD046VPP_VCC/VPPD1/IDSEL
64
97
115
S1_CD1#
S1_D9
S1_D4
S1_D11
S1_D1
S1_D8
102
101
100
D9/CAD30
D1/CAD29
S1_D6
S1_D12
S1_D5
S1_A0
S1_A1
S1_D0
99
110
109
A0/CAD26
D8/CAD28
D0/CAD27
S1_D13
S1_D7
S1_D14
S1_A3
S1_A2
S1_A4
108
106
105
A1/CAD25
A2/CAD24
A3/CAD23
S1_A10
S1_D15
S1_CE1#
S1_A6
S1_A5
S1_A25
104
118
A4/CAD22
A5/CAD21
A6/CAD20
S1_CE2#
S1_VS1
S1_OE#
S1_A7
S1_A17
S1_A24
95
94
A7/CAD18
A25/CAD19
A24/CAD1793A17/CAD16
S1_A11
S1_IORD#
S1_IOWR#
S1_A9
75
73
74
A9/CAD14
IOW#/CAD15
S1_A8
S1_A9
S1_IOWR#
S1_A17
S1_IORD#
S1_OE#
S1_A11
S1_CE2#
71
72
70
69
A11/CAD12
OE#/CAD11
CE2#/CAD10
IORD#/CAD13
S1_A14
S1_A18
S1_A13
S1_A10
S1_D7
S1_D15
68
85
A10/CAD9
D15/CAD8
S1_A19
S1_WE#
S1_D6
S1_D13
84
82
D7/CAD7
D13/CAD6
S1_RDY#
S1_A20
S1_D12
S1_D5
83
80
D6/CAD5
D12/CAD4
S1_A21
S1_D11
81
78
D5/CAD3
D11/CAD2
+S1_VCC
S1_D4
S1_D3
76
D4/CAD179D3/CAD0
S1_A15
S1_A22
S1_A24
S1_A16_R
S1_A12
S1_A23
RB18
33_0402_5%PCMCIA@
RB18
33_0402_5%PCMCIA@
1 2
S1_A15
S1_A21
S1_A20
S1_A23
S1_A16
S1_A22
107
114
117
116
113
A16/CCLK
A15/CIRDY#
A22/CTRDY#
A23/CFRAME#
A21/CDEVSEL#
C/BE3#11C/BE2#12C/BE1#49C/BE0#50PCI_CLK26DEVSEL#27FRAME#23IRDY#24TRDY#25STOP#47PAR48PERR#/SPKR_OUT
127
S1_A7
S1_A6
S1_A14
S1_WAIT#
S1_A13
61
58
60
91
A13/CPAR
A20/CSTOP#
A14/CPERR#
WAIT#/CSERR#
S1_RST
S1_A5
S1_VS2
S1_WAIT#
S1_INPACK#
S1_WE#
S1_RDY#
S1_A19
S1_WP
89
62
88
59
87
WE#/CGNT#
A19/CBLOCK#
WP/CCLKRUN#
INPACK#/CREQ#
RDY/IREQ#/CINT#
S1_A4
S1_A25
S1_A2
S1_INPACK#
S1_A1
S1_A3
S1_REG#
S1_RST
S1_VS1
S1_D14
S1_A18
S1_D2
119
98
86
63
D2/RFU
A18/RFU
D14/RFU
RESET/CRST#
51
S1_BVD1
S1_D9
S1_A0
S1_D1
S1_BVD2
S1_D8
S1_D0
S1_REG#
S1_BVD1
S1_BVD2
S1_VS2
S1_CD2#
S1_CD1#
121
56
122
92
90
111
VS1/CVS157VS2/CVS2
CD1#/CCD1#
CD2#/CCD2#
BVD2/LED/CAUDIO
BVD1/STSCHG#/RI#/CSTSCHG
REQ#2GNT#3RST#
PME#/RI_OUT#
MF6 55MF4 54MF3 53MF0
126
120
S1_D2
S1_WP
S1_CD2#
S1_D10
S1_A8
S1_CE1#
S1_A12
112
66
67
A8/CCBE1#
A12/CCBE2#
CE1/CCBE0#
REG#CCBE3#
52
GND
GND
GND
GND
GND
OZ601TN_TQFP128~DPCMCIA@
OZ601TN_TQFP128~DPCMCIA@
128
96
65
45
32
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
D
LA-4971P
LA-4971P
LA-4971P
CardBus O2 OZ601
CardBus O2 OZ601
CardBus O2 OZ601
Custom
Custom
Custom
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
C
B
A
PCI_AD[0..31]
PCI_AD[0..31]20,24
PCI_CBE#[0..3]
PCI_CBE#[0..3]20
CLKRUN#
SERIRQ
PCI_PIRQA#
CB8
0.1U_0402_16V4Z
CB8
0.1U_0402_16V4Z
1
CB7
0.1U_0402_16V4Z
CB7
0.1U_0402_16V4Z
1
CB6
0.1U_0402_16V4Z
CB6
0.1U_0402_16V4Z
1
CB5
10U_0805_10V4Z
CB5
10U_0805_10V4Z
1
+3VS
CLK_PCI_PCM
PCMCIA@
PCMCIA@
2
PCMCIA@
PCMCIA@
2
PCMCIA@
PCMCIA@
2
PCMCIA@
PCMCIA@
2
CB13
0.1U_0402_16V4Z
CB13
0.1U_0402_16V4Z
1
CB10
0.1U_0402_16V4Z
CB10
0.1U_0402_16V4Z
1
CB9
10U_0805_10V4Z
CB9
10U_0805_10V4Z
1
+3VS
PCI_AD29
PCI_AD30
PCI_AD31
PCMCIA@
PCMCIA@
2
PCMCIA@
PCMCIA@
2
PCMCIA@
PCMCIA@
2
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD24
PCI_AD25
PCI_AD23
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD19
PCI_AD17
PCI_AD18
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD12
PCI_AD13
PCI_AD11
PCI_AD8
PCI_AD10
PCI_AD9
PCI_AD3
PCI_AD7
PCI_AD5
PCI_AD4
PCI_AD6
IDSEL SELECT
PCI_AD2
PCI_AD1
PCI_CBE#3
IDSEL
PCI_AD0
RB19
100_0402_5%PCMCIA@
RB19
100_0402_5%PCMCIA@
1 2
PCI_AD20
AD18
PCI_CBE#2
PCI_CBE#0
PCI_CBE#1
AD25
PCI_DEVSEL#20
CLK_PCI_PCM20
PCM_SPK#
PCI_TRDY#20
PCI_STOP#20
PCI_IRDY#20
PCI_FRAME#20
PCI_PAR20
PIN 127 ball F4
Issued Date
Issued Date
RB20
0_0402_5%@
RB20
0_0402_5%@
12
PCI_GNT#020
PCI_REQ#020
PCI_RST#20
SERIRQ20,33,34
PCM_SPK#30
PCI_PIRQA#20
CLKRUN#
CLKRUN#20
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
RB22
33K_0402_5%
RB22
33K_0402_5%
RB24
33K_0402_5%
RB24
33K_0402_5%
RB23
33K_0402_5%
RB23
33K_0402_5%
1 2
1 2
1 2
+3VS
22K TO 47K PULL-UPS MUST BE PLACED
ON INTA#, PME#, SERIRQ# & CLKRUN#.
For EMI
1 1
RB21
@ RB21
@
10_0402_5%
10_0402_5%
CB14
1
1 2
@ CB14
@
10P_0402_50V8J
10P_0402_50V8J
2
NOTE: IDSEL SELECTION!
VPP_PGM
(123)
DOWN
VCC5#
(124)
DOWN
THIS DEVICE UTILIZES A "SELECTABLE IDSEL" SCHEME.
IDSEL CAN BE CONNECTED INTERNALLY TO ONE OF THREE
PCI AD LINES OR EXTERNAL IDSEL SIGNAL.
22K TO 47K PULL-UP & PULL-DOWN RESISTORS ARE
REQUIRED TO BE CONNECTED TO PINS 123 & 124 TO
SELECT ONE OF THE 4 POSSIBLE IDSEL CONNECTIONS.
THE TABLE BELOW SHOWS THE 4 POSSIBLE COMBINATIONS.
CONFIGURING IDSEL TO BE INTERNALLY CONNECTED ALLOWS
FOR A FULL PARALLEL POWER MODE. IF AN EXTERNALLY
CONNECTED IDSEL IS REQUIRED THEN AN INVERTER MUST
2 2
BE CONNECTED TO VPP_PGM TO CREATE VPP_VCC.
UP AD20UPDOWN
DOWN
3 3
UP UP
must check IDSEL, PCI_PIRQ#,
4 4
Page 29

CC15
CC15
0.1
0.1
0.1
10P_0402_50V8J@
10P_0402_50V8J@
CC14
10P_0402_50V8J@
CC14
10P_0402_50V8J@
29 45Wednesday, February 25, 2009
29 45Wednesday, February 25, 2009
29 45Wednesday, February 25, 2009
1
RC18
10_0402_5%@
RC18
10_0402_5%@
RC17
10_0402_5%@
RC17
10_0402_5%@
1 2
1 2
MSCLK
SDCLK
RC12
22_0402_5%CARD@
RC12
22_0402_5%CARD@
RC11
22_0402_5%CARD@
RC11
22_0402_5%CARD@
1 2
1 2
CC7
1U_0402_6.3V4Z
CC7
10
1
22
VREG
30
MS_D4
1U_0402_6.3V4Z
2
CARD@
CARD@
42
43
NC
XD_CLE_SP19
SD_DATA2
SD_DATA3
SD_MS_CLK
34
35
37
38
39
40
41
XD_ALE_SP17
XD_CE#_SP18
XD_RDY_SP14
SD_DAT2/XD_RE#_SP16
SD_DAT3/XD_WE#_SP15
SD_DAT5/XD_D0/MS_D6_SP12
SD_CLK/XD_D1/MS_CLK_SP11
SD_DAT4/XD_WP#/MS_D7_SP13
MS_DATA1
SD_MS_DATA0
SDWP#
SDCD#
MSCD#
MSBS
MS_DATA3_SD_DATA6
MS_DATA2_SD_DATA7
SD_DATA1
25
26
27
28
29
31
MS_INS#_SP9
SD_DAT0/XD_D6/MS_D0_SP7
SD_DAT7/XD_D2/MS_D2_SP8
SD_DAT6/XD_D7/MS_D3_SP10
18
19
20
21
23
EEDI
XD_D5_SP5
SD_WP_SP2
XD_CD#_SP1
SD_CD#_SP3
XD_D4/SD_DAT1_SP4
SD_DAT1/XD_D3/MS_D1_SP6
XTAL_CTR
13
24
MS_D5
XTAL_CTR
15
16
EEDO
17
EECS
SDCMD
36
EESK
SD_CMD
SDWP#
SD_MS_DATA0
SD_DATA1
1
3
2
RC7
0_0402_5%CARD@
RC7
0_0402_5%CARD@
12
+VCC_3IN1
CC10
1U_0402_6.3V4Z
CARD@
CC10
1U_0402_6.3V4Z
CARD@
1
2
CC11
0.1U_0402_16V4Z
CARD@
CC11
0.1U_0402_16V4Z
CARD@
1
2
LED ON
Description
Recommended
LED ON
Compatible with RTS5158E
SDCD#
SD_DATA2
SD_DATA3
MSCLK
SDCMD
MS_DATA3_SD_DATA6
MSCD#
MS_DATA2_SD_DATA7
SD_MS_DATA0
MS_DATA1
SDCLK
MSBS
YES
MS FORMATTER
4
5
6
7
9
10
11
12
13
14
16
17
18
15
20
19
21
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Compal Secret Data
Compal Secret Data
Compal Secret Data
YES
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
1
LA-4971P
LA-4971P
LA-4971P
RTS5159 Card Reader
RTS5159 Card Reader
RTS5159 Card Reader
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
2
Deciphered Date
Deciphered Date
Deciphered Date
MS-BS
SD-WP
SD-GND
MS-GND
3
UC2
UC2
CC6
0.1U_0402_16V4ZCARD@
CC6
0.1U_0402_16V4ZCARD@
12
4
5
AV_PLL
1
CC4
CC4
NC
NC
3
7
0.1U_0402_16V4ZCARD@
0.1U_0402_16V4ZCARD@
12
CARD_3V3
D3V3
9
33
11
+3VS_CR
+VCC_3IN1
+3VS_CR
RC2
0_0603_5%CARD@
RC2
0_0603_5%CARD@
D3V3
CC5
CC5
1
CARD@
CARD@
CC1
CC1
1
CARD@
CARD@
3V3_IN
RST#44MODE_SEL
XTLO47XTLI
8
45
48
RST#_R
XTLO
XTLI
MODE SEL
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
RC4
0_0603_5%@
RC4
0_0603_5%@
DM4DP
GPIO0
5
14
USB20_N4
USB20_P4
CR_LED#
USB20_P421
USB20_N421
RC10
RC10
0_0402_5%CARD@
0_0402_5%CARD@
12
2
RREF
DGND
12
32
DGND
MODE SEL
AGND
AGND
6
46
12
RC15
RC15
RC14
RC14
RC16
0_0402_5%
RC16
0_0402_5%
CARD@
CARD@
RTS5159-VDD-GRCARD@
RTS5159-VDD-GRCARD@
0_0402_5%
0_0402_5%
1 2
CARD@
CARD@
CARD@
CARD@
1 2
6.19K_0402_1%
6.19K_0402_1%
SD-DAT12SD-DAT0
< 3 in 1 Card Reader >
JREAD
JREAD
MS-INS
SD-CLK
SD-VCC
SD-GND
MS-DAT18MS-DAT0
MS-DAT2
MS-DAT3
Vf=2.0V(typ),2.4V(max)
SD-CMD
MS-SCLK
MS-VCC
SD-DAT3
MS-GND
SD-DAT2
GND122GND2
23
SD-CD
YES
YES
TAITW_R009-125-LR_RV@
YES
TAITW_R009-125-LR_RV@
3
USB AUTO DE-LINK
Issued Date
Issued Date
C
R
RC19
RC19
XTLI
0_0402_5%CARD@
0_0402_5%CARD@
1 2
NC
0
47P
NC
XTAL_CTR
RC20
0_0402_5%CARD@
RC20
0_0402_5%CARD@
1 2
NC
NC
680P
NC
CC9
CC9
XTLI
6P_0402_50V8D@
6P_0402_50V8D@
180P
10K
12
Issued Date
680P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Security Classification
Security Classification
Security Classification
10K
XTLO
YC1
12MHZ_16P_6X12000012
12MHZ_16P_6X12000012
@ YC1
@
CC12
6P_0402_50V8D@
CC12
6P_0402_50V8D@
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
1 2
+3VS
1 2
RST# RST#_R
CC8
1U_0402_6.3V4Z
CC8
100K_0402_5%
100K_0402_5%
1
1 2
1U_0402_6.3V4Z
CARD@
CARD@
RC8
+3VS_CR
RC8
CARD@
CARD@
confirm that whether can be removed
+3VALW
D D
CC13
0.1U_0402_16V4Z@
CC13
2
0.1U_0402_16V4Z@
1
2
+3VS
< Card Reader LED >
C C
RC13
120_0402_5%
RC13
120_0402_5%
12
CARD@
CARD@
DC1
DC1
21
HT-110UYG-CT_YEL/GRNCARD@
HT-110UYG-CT_YEL/GRNCARD@
CR_LED#
CR_LED: Low when card reader is being accessed.
B B
Cost-down option
CLK_48M_CR15
< 48MHz >
+3VS_CR
< 12MHz >
A A
Page 30

E
D
C
+3VS
RA1
0_0603_1%
RA1
0_0603_1%
12
1
30mil
1
+AVDD +3VS_DVDD
CA2
10U_0805_10V4Z
CA2
10U_0805_10V4Z
2
CA1
0.1U_0402_16V4Z
CA1
0.1U_0402_16V4Z
2
40mil
CA52
CA52
2
CA8
CA8
1
CA7
CA7
1
CA53
100P_0402_25V8K
CA53
100P_0402_25V8K
2
CA6
0.1U_0402_16V4Z
CA6
0.1U_0402_16V4Z
1
CA5
0.1U_0402_16V4Z
CA5
0.1U_0402_16V4Z
1
100P_0402_25V8K
100P_0402_25V8K
1
10U_0805_10V4Z
10U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
9
1
38
25
UA2
UA2
1
2
2
AMP_SPK_L 31
AMP_SPK_R 31
35
36
LOUT1_L
LOUT1_R
DVDD_IO
DVDD
AVDD2
AVDD1
LINE2-L14LINE2-R15MIC2_R
CA45100P_0402_25V8K CA45100P_0402_25V8K
1 2
48
45
39
41
SPDIFO1
SPDIFO2
LOUT2_L
LOUT2_R
MIC2_L16LINE1_L23LINE1_R
17
24
CA47100P_0402_25V8K CA47100P_0402_25V8K
CA46100P_0402_25V8K CA46100P_0402_25V8K
1 2
1 2
HP_R 31
HP_L 31
1 2
1 2
RA6 63.4_0402_1%RA6 63.4_0402_1%
RA5 63.4_0402_1%RA5 63.4_0402_1%
HPR
HPL
32
33
HPOUT_L
HPOUT_R
MIC1_L21MIC1_R
22
CA48100P_0402_25V8K CA48100P_0402_25V8K
1 2
+MIC2_VREFO
+MIC1_VREFO
CA12
1U_0402_6.3V4Z
CA12
1U_0402_6.3V4Z
CA51
1U_0402_6.3V4Z
CA51
1U_0402_6.3V4Z
12
37
12
MONO_IN
20
46
44
MONO_OUT
DMIC_CLK1/2
DMIC_CLK3/4
BEEP_IN
BITCLK6SDATA_OUT5SDATA_IN8GPIO0/DMIC_DATA1/2
HDA_SDIN0_R
RA7
33_0402_5%
RA7
33_0402_5%
12
12
10mil
18
28
MIC1_VREFO
LINE1_VREFO
LINE2_VREFO
RESET#11SYNC
10
CA16
2.2U_0603_6.3V6K
CA16
2.2U_0603_6.3V6K
10mil
19
MIC2_VREFO
2
CA50
CA50
2
CA19
CA19
1
CA18
CA18
1
CA49
CA49
2
RA10
RA10
12
1 2
CA17
CA17
1 2
AC_JDREF
AC_VREF
30
27
31
VREF
JDREF40AVSS126AVSS2
CPVREF
SENSE A
GPIO1/DMIC_DATA3/4
SENSE B34NC
3
13
SENSE_A
SENSE_B
100P_0402_25V8K
100P_0402_25V8K
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
10U_0805_10V4Z
10U_0805_10V4Z
2
1
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
29
42
CBP
CBN
EAPD
DVSS4DVSS
7
47
43
1 2
RA4 0_0402_5%RA4 0_0402_5%
MUTE#
100P_0402_25V8K
100P_0402_25V8K
20K_0402_1%
20K_0402_1%
AGND
1 2
1 2
1 2
1 2
CA57 0.1U_0603_50V7KCA57 0.1U_0603_50V7K
CA56 0.1U_0603_50V7KCA56 0.1U_0603_50V7K
CA55 0.1U_0603_50V7KCA55 0.1U_0603_50V7K
CA54 0.1U_0603_50V7KCA54 0.1U_0603_50V7K
ALC272-GR_LQFP48
ALC272-GR_LQFP48
need to re-link ALC272
A2 version
DGND
1 2
RA15 0_0603_5%RA15 0_0603_5%
MONO_IN
CA20
0.1U_0402_16V4Z
CA20
0.1U_0402_16V4Z
1
CA15
0.1U_0402_16V4Z
CA15
0.1U_0402_16V4Z
1 2
RA11
10K_0402_5%
RA11
10K_0402_5%
12
RA19
47K_0402_5%PCMCIA@
RA19
47K_0402_5%PCMCIA@
RA9
47K_0402_5%
RA9
47K_0402_5%
RA8
47K_0402_5%
RA8
47K_0402_5%
1 2
1 2
1 2
< MONO_IN SOURCE >
SB_SPKR21
PCM_SPK#28
EC_BEEP34
PCI Beep
EC Beep
CardBus Beep
0.1Custom
0.1Custom
0.1Custom
30 45Wednesday, February 25, 2009
30 45Wednesday, February 25, 2009
30 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
HD Audio ALC272 Codec
HD Audio ALC272 Codec
HD Audio ALC272 Codec
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+3VS
MUTE#31
RA37
4.7K_0402_5%
4.7K_0402_5%
12
@ RA37
@
< EMI require >
GPIO0-->SPK_SEL HIGH: HARMAN
LOW: NO-BRAND
CA42
0.01U_0402_25V7K
CA42
0.01U_0402_25V7K
1
2
@
@
HDA_RST#_CODEC21
SENSE_A
RA18
20K_0402_1%
RA18
20K_0402_1%
1 2
SENSE_B
RA17
RA17
RA16
5.1K_0402_5%
RA16
5.1K_0402_5%
1 2
20K_0402_1%MIC@
20K_0402_1%MIC@
1 2
Function
Ext. MIC
PORT-A (PIN 39, 41)
PORT-B (PIN 21, 22)
Codec Signals
39.2K
20K
Int. MIC
SPK out
FM tuner
PORT-D (PIN 35, 36)
PORT-F (PIN 16, 17)
PORT-E (PIN 14, 15)
10K PORT-C (PIN 23, 24)
5.1K
39.2K
20K
B
Headphone out
PORT-H (PIN 37)
PORT-I (PIN 32, 33)
A
10K
5.1K
CA4
10U_0805_10V4Z
CA4
10U_0805_10V4Z
1
2
CA3
10U_0805_10V4Z
CA3
10U_0805_10V4Z
1
2
RA3
0_0603_1%
RA3
0_0603_1%
12
B
CA10
1U_0402_6.3V4Z
1U_0402_6.3V4Z
1
J2
JUMP_43X39
JUMP_43X39
112
@ J2
@
2
4.75V
5
VOUT
VIN1SHDN#
UA1
UA1
@ CA10
@
CA11
0.22U_0402_10V4Z
0.22U_0402_10V4Z
@CA11
@
12
4
BP
GND
3
2
CA14
100P_0402_25V8K
CA14
100P_0402_25V8K
1 2
MIC2_L31
MIC2_R31
APL5151-475BC-TRL_SOT23-5@
APL5151-475BC-TRL_SOT23-5@
Int. Mic
MIC1_C_R31
MIC1_C_L31
Ext. Mic
+VDDA
2
+5VS
A
HDA_SDIN021
HDA_SDOUT_CODEC21
RA31
10_0402_5%
RA31
10_0402_5%
@
@
HDA_BITCLK_CODEC21
SPK_SEL22
HDA_SYNC_CODEC21
CA34
10P_0402_50V8J
CA34
10P_0402_50V8J
1
2
1 2
@
@
< EMI require >
ImpedanceSense Pin
SUSP#19,27,34,36,39,41
CA9
1U_0402_6.3V4Z
CA9
1U_0402_6.3V4Z
1
+5VALW
2
@
@
< SENSE_A & SENSE_B, place close to chip >
1 1
2 2
3 3
NBA_PLUG31
MIC_SENSE31
SENSE A
4 4
SENSE B
Page 31

E
D
+MIC1_VREFO
+MIC1_VREFO
MIC1_L
MIC1_R
DA1
CH751H-40PT_SOD323-2
DA1
CH751H-40PT_SOD323-2
DA2
CH751H-40PT_SOD323-2
DA2
CH751H-40PT_SOD323-2
21
21
RA23
4.7K_0402_5%
RA23
4.7K_0402_5%
4.7K_0402_5%
12
1K_0402_5%
1K_0402_5%
RA21
1K_0402_5%
RA21
1K_0402_5%
12
12
12
12
CA21 4.7U_0805_10V4ZCA21 4.7U_0805_10V4Z
CA22 4.7U_0805_10V4ZCA22 4.7U_0805_10V4Z
4.7K_0402_5%
12
RA22
RA22
RA20
RA20
+MIC2_VREFO
12
RA24 4.7K_0402_5%MIC@ RA24 4.7K_0402_5%MIC@
INT_MIC_R 17
RA38
0_0402_5%
LVDSSET@
RA38
0_0402_5%
LVDSSET@
1 2
1
close to JMIC
DA3
PACDN042Y3R_SOT23-3
DA3
PACDN042Y3R_SOT23-3
2
3
MIC@
MIC@
MIC@
MIC@
4
NC13NC2
112
JMIC
ACES_85204-0200N
ACES_85204-0200N
@JMIC
@
2
INT_MIC
J3
@J3
@
RA25
1K_0402_5%
RA25
1K_0402_5%
12
CA26
1U_0402_6.3V4Z
CA26
1U_0402_6.3V4Z
12
1
1
2
JUMP_43X39
JUMP_43X39
close to Codec
2
1 2
CA27 220P_0402_50V7KCA27 220P_0402_50V7K
RA26
1K_0402_5%
MIC@
RA26
1K_0402_5%
MIC@
12
CA28
1U_0402_6.3V4Z
MIC@
CA28
1U_0402_6.3V4Z
MIC@
12
1122334
JSPK
JSPK
SPK_L1
SPK_L2
2
3
DA4
PACDN042Y3R_SOT23-3
DA4
PACDN042Y3R_SOT23-3
1
1 2
1 2
LA3 FBMA-L11-160808-800LMT_0603LA3 FBMA-L11-160808-800LMT_0603
LA4 FBMA-L11-160808-800LMT_0603LA4 FBMA-L11-160808-800LMT_0603
SPKL+
SPKL-
ACES_85204-0400N@
ACES_85204-0400N@
4
SPK_R2
SPK_R1
2
3
DA5
PACDN042Y3R_SOT23-3
DA5
PACDN042Y3R_SOT23-3
1
1 2
1 2
LA5 FBMA-L11-160808-800LMT_0603LA5 FBMA-L11-160808-800LMT_0603
LA6 FBMA-L11-160808-800LMT_0603LA6 FBMA-L11-160808-800LMT_0603
SPKR-
SPKR+
JLINE
JLINE
< EMI require >
1
2
CA43 0.1U_0402_16V4ZCA43 0.1U_0402_16V4Z
FOX_JA6333L-B3T0-7F@
FOX_JA6333L-B3T0-7F@
123
456
HP_R_L
HP_L_L
2
3
1
1 2
1 2
LA7 KC FBM-L11-160808-121LMT 0603LA7 KC FBM-L11-160808-121LMT 0603
LA8 KC FBM-L11-160808-121LMT 0603LA8 KC FBM-L11-160808-121LMT 0603
HP_R30
HP_L30
NBA_PLUG30
DA6
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
@DA6
@
1
JEXMIC
JEXMIC
456
MIC1_L_R
MIC1_L_LMIC1_L
< EMI require >
2
CA44 0.1U_0402_16V4ZCA44 0.1U_0402_16V4Z
1 2
1 2
LA10 KC FBM-L11-160808-121LMT 0603LA10 KC FBM-L11-160808-121LMT 0603
LA9 KC FBM-L11-160808-121LMT 0603LA9 KC FBM-L11-160808-121LMT 0603
MIC1_R
0.1Custom
0.1Custom
0.1Custom
31 45Wednesday, February 25, 2009
31 45Wednesday, February 25, 2009
FOX_JA6333L-B3T0-7F@
FOX_JA6333L-B3T0-7F@
123
CA41
100P_0402_25V8K@
CA41
100P_0402_25V8K@
1
2
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
CA40
100P_0402_25V8K@
CA40
100P_0402_25V8K@
1
2
2
3
DA7
PACDN042Y3R_SOT23-3
PACDN042Y3R_SOT23-3
@DA7
@
1
Compal Secret Data
Compal Secret Data
Compal Secret Data
31 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
AMP/Audio Jack/HP/SPEAKER/VR
AMP/Audio Jack/HP/SPEAKER/VR
AMP/Audio Jack/HP/SPEAKER/VR
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
< Ext. Mic >
C
B
+5VS
MIC1_C_L30
MIC1_C_R30
CA25
0.1U_0402_16V4Z
CA25
0.1U_0402_16V4Z
1
CA24
0.1U_0402_16V4Z
CA24
0.1U_0402_16V4Z
1
CA23
10U_0805_10V4Z
CA23
10U_0805_10V4Z
1
2
2
2
< Int. Mic >
+5VS
RA28
100K_0402_5%
RA28
100K_0402_5%
12
@
@
10 dB
RA27
100K_0402_5%
RA27
100K_0402_5%
12
6
15
16
UA3
UA3
2008-09-25 2009-09-25
2008-09-25 2009-09-25
MIC2_L30
MIC2_R30
RA30
100K_0402_5%
RA30
100K_0402_5%
12
RA29
100K_0402_5%
100K_0402_5%
12
@ RA29
@
SPKL+
SPKR-
14
ROUT-
LIN+
9
4
LOUT+
5
LINE_C_OUTL
SPKL-
8
LOUT-
LIN-
AMP_BYPASS
Keep 10 mil width
10NC12
BYPASS
SPKR+
18
3
GAIN02GAIN1
RIN+
7
ROUT+
RIN-
17
LINE_C_OUTR
PVDD2
PVDD1
VDD
< Speaker Connector >
CA33
0.47U_0603_10V7K
CA33
0.47U_0603_10V7K
1
2
TPA6017A2_TSSOP20
TPA6017A2_TSSOP20
GND4
1
GND3
11
GND2
13
GND1
20
GND5
21
SHUTDOWN
19
< HeadPhone JACK >
RA32
100K_0402_5%
RA32
100K_0402_5%
12
+3VS
1
CA36
0.1U_0402_16V4Z
CA36
0.1U_0402_16V4Z
2
+3VS
CA35
0.1U_0402_16V4Z
CA35
0.1U_0402_16V4Z
1
1 2
5
+3VS
RA34
10K_0402_5%
RA34
10K_0402_5%
12
< Ext.MIC/LINE IN JACK >
14
VCC
CD1#1D12CP13SD1#4Q15Q1#6GND
UA5
UA5
4
UA4
UA4
Y
NC
74LVC1G14GW_SOT353-5
74LVC1G14GW_SOT353-5
P
G
3
A
2
RA35
10K_0402_5%
RA35
10K_0402_5%
1 2
13D212
11
CD2#
RA36
10K_0402_5%
RA36
10K_0402_5%
1 2
1
10Q209
CP2
SD2#
1
1
CA39
0.1U_0402_16V4Z
CA39
0.1U_0402_16V4Z
08
Q2#
7
CA38
CA38
CA37
CA37
MIC_SENSE30
2
74LCX74MTC_TSSOP14
74LCX74MTC_TSSOP14
ENCODER_PULSE 34
ENCODER_DIR 34
0.01U_0402_25V7K
0.01U_0402_25V7K
2
2
0.01U_0402_25V7K
0.01U_0402_25V7K
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
CA29
CA29
< TPA6017 Medium Range Amplifier >
1 1
CA30
0.033U_0402_25V7K
CA30
0.033U_0402_25V7K
0.033U_0402_25V7K
0.033U_0402_25V7K
AMP_SPK_R30
CA31
0.033U_0402_25V7K
CA31
0.033U_0402_25V7K
CA32
0.033U_0402_25V7K
CA32
0.033U_0402_25V7K
AMP_SPK_L30
RA33
10K_0402_5%
RA33
10K_0402_5%
MUTE#30
45K
25K
90K
70K
Rin(ohm)
6
10
15.6
21.6
0
0
0
0 111 1
GAIN0 GAIN1 Av(db)
2 2
< Volume Control >
3 3
+3VS
12
5
SW2
SW2
3
1A2
COM
B
DIP
4
SW_XRE094_3P
SW_XRE094_3P
4 4
DIP
A
Page 32

0.1Custom
0.1Custom
0.1Custom
32 45Wednesday, February 25, 2009
32 45Wednesday, February 25, 2009
32 45Wednesday, February 25, 2009
1 2
R437 0_0402_5%BT@ R437 0_0402_5%BT@
BT_DET#22
BT_RESET#
11223344556677889910
ACES_87213-1000G@
ACES_87213-1000G@
R439
BT@ R439
BT@
1 2
R438 4.7K_0402_5%@ R438 4.7K_0402_5%@
C479
C479
+3VS
BT@
BT@
(MAX=200mA)
C483
C483
1
BT@
BT@
+BT_VCC
C480
C480
4.7K_0402_5%
4.7K_0402_5%
1 2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
0.1U_0402_16V4Z
0.1U_0402_16V4Z
E
LA-4971P
LA-4971P
LA-4971P
USB/BT/FingerPrint
USB/BT/FingerPrint
USB/BT/FingerPrint
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
GND111GND2
JBT
JBT
10
E
C482
0.1U_0402_16V4Z
C482
+3VS
0.1U_0402_16V4Z
BT@
BT@
S
S
BT@
BT@
G
G
2
Q25
AO3413_SOT23
Q25
AO3413_SOT23
D
D
1 3
+BT_VCC
12
USB20_P6
USB20_N6
Inrush current = 0A
USB20_N621
D
C481
0.1U_0402_16V7K
C481
0.1U_0402_16V7K
2
BT@
BT@
C196
0.01U_0402_25V7K
C196
0.01U_0402_25V7K
1
1
2
R441
47K_0402_5%BT@
R441
47K_0402_5%BT@
1 2
USB20_P621
R432
100K_0402_5%
R432
100K_0402_5%
BT@
BT@
1 2
BT_PWR#34
+3VS
C
< BlueTooth Interface, USB port6 >
USB_OC#0 21
B
JUSBB
JUSBB
1662233558899
1 2
C438 4.7U_0805_10V4ZC438 4.7U_0805_10V4Z
1 2
W=60mils
R422 0_0402_5%R422 0_0402_5%
5
8
7
FLG
OUT6OUT
OUT
1.4A
GND1IN
IN3EN#
U25
G528_SO8
U25
G528_SO8
2
4
A
+5VALW +USB_VCCA
USB_EN#
+USB_VCCA
W=60mils
R107
0_0402_5%
0_0402_5%
@R107
@
1 2
BT@
BT@
R440
0_0402_5%BT@
R440
0_0402_5%BT@
1 2
BT_RST#34
< Bluetooth Connector >
44771010GND
1
L50
L50
USB20_N0_R
USB20_P0_R
223
1
1
11111212GND
13
14
USB20_N1_R
USB20_P1_R
3
R108
@R108
@
4
WCM-2012-900T_0805
WCM-2012-900T_0805
4
E&T_6905-E12N-00R@
E&T_6905-E12N-00R@
0_0402_5%
0_0402_5%
1 2
R109
0_0402_5%
0_0402_5%
@R109
@
1 2
L51
L51
223
1
1
3
R110
0_0402_5%
0_0402_5%
@R110
@
4
WCM-2012-900T_0805
WCM-2012-900T_0805
4
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
USB20_P9 21
USB20_N9 21
USB20_N9_R_CAM 17
3
223
1 2
< EMI require >
1
4
L60
WCM-2012-900T_0805
CAM@ L60
CAM@
JCAM
JCAM
1
112233445
4
USB20_P9_R
USB20_N9_R
5
WCM-2012-900T_0805
6
R103 0_0402_5%@ R103 0_0402_5%@
R20 close to JCAM
R20
0_0402_5%
R20
0_0402_5%
LVDSSET@
LVDSSET@
1 2
+CAM_VDD
W=20mils
C744
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
CAM@ C744
R428
R428
CAM@
0_0603_5%@
0_0603_5%@
1 2
R430
0_0603_5%CAM@
R430
1 2
0_0603_5%CAM@
1 2
USB20_P9_R_CAM 17
C468
0.1U_0402_16V4ZFP@
C468
R119
R119
0.1U_0402_16V4ZFP@
1 2
+3VS_FP
0_0603_5%FP@
0_0603_5%FP@
1 2
+3VS
JFP
JFP
6
GND5GND
1122334
4
1 2
R118 0_0603_5%FP@ R118 0_0603_5%FP@
USB20_P7
USB20_N7
USB20_P721
USB20_N721
ACES_85201-04051
ACES_85201-04051
1 2
R99 0_0402_5%@ R99 0_0402_5%@
R18 close to JCAM
R18
0_0402_5%
R18
0_0402_5%
LVDSSET@
LVDSSET@
1 2
ACES_88266-05001@
ACES_88266-05001@
GND27GND1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
USB_EN#34
< R e s e r v e f o r E M I r e q u e s t >
< R e s e r v e f o r E M I r e q u e s t >
< USB Right-side Board, USB port 0,1 >
< R e s e r v e f o r E M I r e q u e s t >< R e s e r v e f o r E M I r e q u e s t >
1 1
USB20_P021
USB20_N021
USB20_N121
USB20_P121
+5VS
< Int. Camera, USB port 9 >
2 2
+5VALW
3 3
< Finger Printer, USB port 7 >
4 4
Page 33

0.1Custom
0.1Custom
0.1Custom
33 45Thursday, February 26, 2009
33 45Thursday, February 26, 2009
HDA_BITCLK_MDC 21
33 45Thursday, February 26, 2009
E
< MDC 1.5 Conn >
D
+3VALW
4
RES02RES1
GND11IAC_SDATA_OUT
JMDC
JMDC
3
HDA_SDOUT_MDC
R496
R496
12
+3VALW
6
10
12
3.3V
GND38GND4
IAC_BITCLK
GND25IAC_SYNC7IAC_SDATA_IN
IAC_RESET#
9
11
HDA_SYNC_MDC
HDA_SDIN1_MDC
1 2
R495 33_0402_5%MDC@ R495 33_0402_5%MDC@
10_0402_5%
10_0402_5%
C777
10P_0402_50V8J
C777
10P_0402_50V8J
1
2
@
@
@
@
GND
ACES_88018-124GMDC@
ACES_88018-124GMDC@
18
GND
17
GND
16
GND
15
GND
14
GND
13
Connector for MDC Rev1.5
Connector for MDC Rev1.5
+3VALW
C780
4.7U_0805_10V4Z
MDC@
C780
4.7U_0805_10V4Z
MDC@
1
2
C779
0.1U_0402_16V4Z
MDC@
C779
0.1U_0402_16V4Z
MDC@
1
2
C778
1000P_0402_50V7K
MDC@
C778
1000P_0402_50V7K
MDC@
1
2
1 2
1 2
1 2
1 2
1 2
1 2
C609 100P_0402_25V8KC609 100P_0402_25V8K
C721 100P_0402_25V8KC721 100P_0402_25V8K
C725 100P_0402_25V8KC725 100P_0402_25V8K
C724 100P_0402_25V8KC724 100P_0402_25V8K
C730 100P_0402_25V8KC730 100P_0402_25V8K
C717 100P_0402_25V8KC717 100P_0402_25V8K
C728 100P_0402_25V8KC728 100P_0402_25V8K
KSO2
KSO4
KSO5
KSO0
KSO1
KSO3
KSO14
1 2
1 2
1 2
1 2
1 2
1 2
C733 100P_0402_25V8KC733 100P_0402_25V8K
C715 100P_0402_25V8KC715 100P_0402_25V8K
C740 100P_0402_25V8KC740 100P_0402_25V8K
C732 100P_0402_25V8KC732 100P_0402_25V8K
C737 100P_0402_25V8KC737 100P_0402_25V8K
KSO6
KSO7
KSO8
KSO9
KSO13
1 2
1 2
1 2
1 2
1 2
1 2
C741 100P_0402_25V8KC741 100P_0402_25V8K
C736 100P_0402_25V8KC736 100P_0402_25V8K
C738 100P_0402_25V8KC738 100P_0402_25V8K
C729 100P_0402_25V8KC729 100P_0402_25V8K
C716 100P_0402_25V8KC716 100P_0402_25V8K
C718 100P_0402_25V8KC718 100P_0402_25V8K
C726 100P_0402_25V8KC726 100P_0402_25V8K
KSO10
KSO11
KSO12
KSO15
KSI7
KSI2
KSI3
1 2
1 2
1 2
1 2
1 2
1 2
C731 100P_0402_25V8KC731 100P_0402_25V8K
C734 100P_0402_25V8KC734 100P_0402_25V8K
C723 100P_0402_25V8KC723 100P_0402_25V8K
C735 100P_0402_25V8KC735 100P_0402_25V8K
C739 100P_0402_25V8KC739 100P_0402_25V8K
KSI4
KSI0
KSI5
KSI6
KSI1
1 2
1 2
C714 100P_0402_25V8KC714 100P_0402_25V8K
C722 100P_0402_25V8KC722 100P_0402_25V8K
NUM_LED#
CAPS_LED#
1 2
1 2
C870 100P_0402_25V8KC870 100P_0402_25V8K
C871 100P_0402_25V8KC871 100P_0402_25V8K
KSO16
KSO17
E
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
SPI/LPC/PS2/MDC/FM/CIR
SPI/LPC/PS2/MDC/FM/CIR
SPI/LPC/PS2/MDC/FM/CIR
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
HDA_SDOUT_MDC21
HDA_SDIN121
HDA_SYNC_MDC21
HDA_RST#_MDC21
EC_SI_SPI_SO 34EC_SO_SPI_SI34
C606
10P_0402_50V8C
C606
Q
D5C
R518
R518
MX25L8005M2C-15G
MX25L8005M2C-15G
10P_0402_50V8C
1 2
10_0402_5%
10_0402_5%
1 2
EC_SPICLK
LPC_AD2 20,34
LPC_AD0 20,34
PLT_RST# 11,14,19,20,26,27,34
LPC_AD2
PLT_RST#
LPC_AD0
1
2
3
4
56
H1
7
8
9
10
+3VS
R622
0_0402_5%
R622
0_0402_5%
Please place the PAD under DDR DIMM.
< LPC Debug Port >
1 2
SERIRQ
SERIRQ20,28,34
LPC_AD3
LPC_AD320,34
LPC_AD1
LPC_AD120,34
LPC_FRAME#
CLK_PCI_SIO2 20,24
LPC_FRAME#20,34
R634
R634
DEBUG_PAD@H1DEBUG_PAD@
C639
C639
22_0402_5%
22_0402_5%
2
1 2
22P_0402_50V8J
22P_0402_50V8J
1
< KEYBOARD CONN 17" > < For EMI >
7
HOLD
S
1
SPI_CS#
2
6
EC_SPICLK
4
VSS
VCC
W
U46
U46
8
B
3
20mils
+3VL
SPI_CLK34
SPI_CS#34
C608
10P_0402_50V8C
C608
10P_0402_50V8C
1
2
@
< S P I F l a s h 8 M b * 1 >
< S P I F l a s h 8 M b * 1 >
< S P I F l a s h 8 M b * 1 >< S P I F l a s h 8 M b * 1 >
A
@
C607
10P_0402_50V8C
C607
10P_0402_50V8C
1
@
@
C786
0.1U_0402_16V4Z
C786
0.1U_0402_16V4Z
1
2
2
< KEYBOARD CONN 16" >
1 1
2 2
JKB2
JKB2
R502
R502
JKB1
JKB1
KSO16
+3VS
300_0402_5%
300_0402_5%
1 2
KSO16
KSO17
C783
0.1U_0402_16V4Z
C783
0.1U_0402_16V4Z
1
C782
0.1U_0402_16V4Z
C782
0.1U_0402_16V4Z
1
C781
0.1U_0402_16V4Z
C781
0.1U_0402_16V4Z
1
KSO17
3 3
KSO4
KSO1
KSO3
KSO0
KSO2
2
2
< For EMI >
2
KSO2
KSO4
KSO0
KSO1
KSO3
KSO5
KSO5
KSO6
KSO14
KSO14
KSO6
KSO7
KSO7
KSO13
KSO8
KSO13
KSO8
KSO9
KSO9
KSO10
KSO10
KSO11
KSO12
KSO12
KSO11
KSO15
KSI7
KSO15
KSI7
KSI2
KSI2
KSI3
KSI3
KSI4
KSI0
10111213141516171819202122232425262728293031323334
KSI0
KSI4
10111213141516171819202122232425262728293031323334
KSI5
KSI5
KSI6
KSI6
KSI1
R509
R509
KSI1
12
NUM_LED#
CAPS_LED#
123456789
+3VS
300_0402_5%
300_0402_5%
CAPS_LED# 34
NUM_LED# 34
123456789
Security Classification
Security Classification
Security Classification
/
/
KSI[0..7] 34,35
KSI[0..7]
/
KSO[0..17] 34,35
KSO[0..17]
ACES_88170-3400@
ACES_88170-3400@
ACES_88170-3400@
ACES_88170-3400@
4 4
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
Page 34

0.1Custom
0.1Custom
0.1Custom
ADP_I 39
ECAGND
E
D
67
+EC_AVCC
125
111
96
33
22
9
L25
0_0603_5%
L25
0_0603_5%
12
U33
U33
+3VL +3VL_EC
C
C812
C812
INVT_PWM 17
EC_BEEP 30
ACOFF
INVT_PWM
21
23
26
27
FANPWM1/GPIO12
BEEP#/PWM2/GPIO10
AVCC
INVT_PWM/PWM1/GPIO0F
VCC
VCC
VCC
VCC
VCC
VCC
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#3LFRAME#4LAD3
1
2
LPC_LFRAME#
SERIRQ
GATEA20
KB_RST#
SERIRQ20,28,33
GATEA2021
KB_RST#21
C154
0.22U_0603_16V4Z
C154
0.22U_0603_16V4Z
R145
100K_0402_5%
R145
100K_0402_5%
100P_0402_25V8K
100P_0402_25V8K
1 2
ACOFF 39
ACOFF/FANPWM2/GPIO13
5
LPC_AD3
LPC_AD320,33
LPC_FRAME#20,33
R530
@R530
@
1 2
1 2
BATT_TEMPA 38
ADP_V 39
BATT_TEMPA
63
64
65
66
75
76
AD4/GPIO42
AD3/GPIO3B
ADP_I/AD2/GPIO3A
SELIO2#/AD5/GPIO43
BATT_OVP/AD1/GPIO39
BATT_TEMP/AD0/GPIO38
AD Input
AD Input
PWM Output
PWM Output
LPC & MISC
LPC & MISC
LAD27LAD1
LAD0
PCICLK12PCIRST#/GPIO05
SCI#/GPIO0E
ECRST#37CLKRUN#/GPIO1D38KSO0/GPIO20
8
10
13
20
ECRST#
LPC_AD2
LPC_AD1
LPC_AD0
PLT_RST#
EC_SCI#
CLK_PCI_EC
WL_BT_LED#
LPC_AD120,33
LPC_AD220,33
LPC_AD020,33
EC_SCI#21
PLT_RST#11,14,19,20,26,27,33
33_0402_5%
33_0402_5%
DAC_BRIG 17
EN_DFAN1 4
USB_CHG_EN# 25
CHGVADJ 39
IREF 39
EN_DFAN1
CHGVADJ
IREF
68
70
71
72
83
DA3/GPIO3F
PSCLK1/GPIO4A
IREF/DA2/GPIO3E
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
DA Output
DA Output
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO3257KSI3/GPIO33
55
56
58
KSI1
KSI2
KSI3
KSI0
WL_BT_LED#35
USB_EN# 32
ENCODER_DIR 31
ENCODER_PULSE 31
TP_DATA 35
TP_CLK 35
ENCODER_PULSE
TP_CLK
TP_DATA
ENCODER_DIR
84
85
86
87
88
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
PS2 Interface
PS2 Interface
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
39
40
59
60
61
62
KSI7
KSO0
KSO1
KSI6
KSI5
KSI4
BT_RST# 32
USB_OC#2 21,25
WOL_EN# 36
WOL_EN#
BT_RST#
USB_OC#2
97
98
99
SDIDO/GPXOA02
SDICS#/GPXOA00
SDICLK/GPXOA01
Int. K/B
Int. K/B
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25
41
42
43
44
KSO4
KSO3
KSO2
KSO5
KSI[0..7]
KSO[0..17]
KSO[0..17]33,35
KSI[0..7]33,35
EC_SI_SPI_SO 33
EC_SO_SPI_SI 33
SPI_CS# 33
SPI_CLK 33
VGATE 43
109
119
120
126
128
SPICS#
SPIDI/RD#
SPIDO/WR#
SDIDI/GPXID0
SPICLK/GPIO58
SPI Flash ROM
SPI Flash ROM
SPI Device Interface
SPI Device Interface
Matrix
Matrix
KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
45
KSO6
KSO7
KSO13/GPIO2D
46
47
48
49
50
51
52
KSO12
KSO13
KSO8
KSO9
KSO11
KSO10
CEC_INT# 18
FSTCHG
CEC_INT#
73
74
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
53
54
81
KSO14
KSO15
KSO16
KSO17
VR_ON 43
R541
R541
CAPS_LED# 33
BATT_LOW_LED# 35
FSTCHG 39
BATT_FULL_LED# 35
PWR_ON_LED# 35
SYSON 27,36,42
SYSON
ACIN_D
BATT_LOW_LED#
VR_ON
BATT_FULL_LED#
PWR_ON_LED#
89
90
91
92
93
95
121
127
AC_IN/GPIO59
SYSON/GPIO56
CAPS_LED#/GPIO53
SUSP_LED#/GPIO55
FSTCHG/SELIO#/GPIO50
VR_ON/XCLK32K/GPIO57
BATT_LOW_LED#/GPIO54
BATT_CHGI_LED#/GPIO52
GPIO
GPIO
SM Bus
SM Bus
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
KSO17/GPIO49
77
78
79
80
82
EC_SMB_CK2
EC_SMB_DA2
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_DA118,38
EC_SMB_CK118,38
EC_SMB_CK26,19,35
EC_SMB_DA26,19,35
10K_0402_5%
10K_0402_5%
12
EC_SWI# 21,27
EC_ON 35,36
EC_RSMRST# 21
SB_PWRGD 21,43
SB_PWRGD
EC_RSMRST#
BKOFF#
EC_SWI#
100
101
102
103
104
105
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
EC_LID_OUT#/GPXO04
EC_RSMRST#/GPXO03
GPO
GPO
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
6
14
15
16
17
18
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
LID_SW#
PM_SLP_S3#21
PM_SLP_S5#21 EC_LID_OUT# 21
EC_SMI#21
LID_SW#35
HDPLOC 35
HDPACT 35
BKOFF# 17
WL_OFF# 27
HDPINT 35
WL_OFF#
106
BKOFF#/GPXO08
GPIO
GPIO
PBTN_OUT#/GPIO0C
19
BT_PWR#
HDPLOC
ENBKL
107
108
110
112
114
GPXID3
GPXO10
GPXO11
ENBKL/GPXID2
WL_OFF#/GPXO09
PM_SLP_S4#/GPXID1
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
25
28
29
30
31
32
34
ON/OFFBTN#
E51_TXD
FAN_SPEED1
PWR_SUSP_LED#
E51_RXD
BT_PWR#32
ON/OFFBTN#35
FAN_SPEED14
VLDT_EN36
E51_TXD27
E51_RXD27
PWR_SUSP_LED#35
PBTN_OUT# 21
LAN_WAKE# 26
SUSP# 19,27,30,36,39,41
EC_THERM# 22
12
PBTN_OUT#
SUSP#
LAN_WAKE#
C814 4.7U_0805_10V4ZC814 4.7U_0805_10V4Z
115
116
117
118
124
V18R
GPXID4
GPXID5
GPXID6
GPXID7
GPI
GPI
NUMLED#/GPIO1A
XCLK1
XCLK0
36
122
123
CRY1
NUM_LED#
NUM_LED#33
C813
15P_0402_50V8J
C813
15P_0402_50V8J
1 2
KB926QFD3_LQFP128_14X14
KB926QFD3_LQFP128_14X14
AGND
69
GND
113
GND
94
GND
35
GND
24
GND
11
R545
20M_0402_5%
20M_0402_5%
12
@ R545
@
1
OSC4OSC
C815
C815
NC3NC
Y7
32.768KHZ_12.5PF_9H03200413
Y7
32.768KHZ_12.5PF_9H03200413
2
ECAGND
C816
C816
1 2
L80 0_0603_5%L80 0_0603_5%
CRY2
+3VL_EC
15P_0402_50V8J
15P_0402_50V8J
1 2
12
L81 0_0603_5%L81 0_0603_5%
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1 2
+3VL_EC
+EC_AVCC
C809
1000P_0402_50V7K
C809
1000P_0402_50V7K
1
2
C808
0.1U_0402_16V4Z
C808
0.1U_0402_16V4Z
1
2
C807
1000P_0402_50V7K
C807
1000P_0402_50V7K
1
2
C806
0.1U_0402_16V4Z
C806
0.1U_0402_16V4Z
1
2
C805
0.1U_0402_16V4Z
C805
0.1U_0402_16V4Z
1
2
34 45Wednesday, February 25, 2009
34 45Wednesday, February 25, 2009
34 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
ENE KB926C
ENE KB926C
ENE KB926C
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
/
/
/
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
1 2
B
C810
15P_0402_50V8J
15P_0402_50V8J
@C810
@
1 2
1 2
C811 0.1U_0402_16V4ZC811 0.1U_0402_16V4Z
R533 47K_0402_5%R533 47K_0402_5%
12
B
Reserve for EMI request
+3VL
CLK_PCI_EC20,24
0_0402_5%PM@
0_0402_5%PM@
1 2
+3VL
R560
150K_0402_5%
R560
150K_0402_5%
1 2
ACIN 22,35,37
C326
100P_0402_25V8K
C326
100P_0402_25V8K
D33
CH751H-40PT_SOD323-2
D33
CH751H-40PT_SOD323-2
12
2 1
ACIN_D
4 4
A
VGA_ENBKL 19
+3VL
1 2
1 2
R539 10K_0402_5%R539 10K_0402_5%
R536 10K_0402_5%R536 10K_0402_5%
SUSP#
SYSON
+3VALW
12
12
R538 100K_0402_5%R538 100K_0402_5%
R513 100K_0402_5%R513 100K_0402_5%
LID_SW#
ON/OFFBTN#
UMA_ENBKL 11
12
12
R947 47K_0402_5%R947 47K_0402_5%
R948 47K_0402_5%R948 47K_0402_5%
KSO1
KSO2
3 3
R684
0_0402_5%GM@
R684
0_0402_5%GM@
R683
R683
1 2
ENBKL
Add for KB926D2 issue. Please refer to KB926D-AN1-100 for detail
12
R563 100K_0402_5%R563 100K_0402_5%
CEC_INT#
2 2
+5VS
1 2
1 2
R534 4.7K_0402_5%R534 4.7K_0402_5%
R535 4.7K_0402_5%R535 4.7K_0402_5%
TP_CLK
TP_DATA
+3VL
+3VS
A
1 2
1 2
1 2
1 2
R77 2.2K_0402_5%R77 2.2K_0402_5%
R70 2.2K_0402_5%R70 2.2K_0402_5%
R326 2.2K_0402_5%R326 2.2K_0402_5%
R330 2.2K_0402_5%R330 2.2K_0402_5%
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_DA2
EC_SMB_CK2
1 1
Page 35

0.1
0.1
0.1
HDPACT 34
CG13
1U_0402_6.3V4Z
CG13
1U_0402_6.3V4Z
1
2
1 2
1 2
CG1 0.033U_0402_16V7KG_1st@ CG1 0.033U_0402_16V7KG_1st@
VOUTX
3
UG1
2
G_1st@ UG1
G_1st@
+3VS_HDP
CG2 0.033U_0402_16V7KG_1st@ CG2 0.033U_0402_16V7KG_1st@
VOUTY
5
Voutx
Vouty
Vdd1
Vdd2
12
1 2
CG3 0.033U_0402_16V7KG_1st@ CG3 0.033U_0402_16V7KG_1st@
VOUTZ
7
Voutz
11
NC110NC2
NC314NC415NC5
ST
PD
FS8Rev
4
6
SELF_TEST
16
1
13
GND1
GND2
TSH35TR_LGA16
TSH35TR_LGA16
9
+3VS_HDP
+3VS_HDP
6
VDD
XOUT2YOUT3ZOUT
UG4
G_2nd@ UG4
G_2nd@
VOUTY
VOUTX
12
CG642 0.1U_0402_16V4ZG_2nd@ CG642 0.1U_0402_16V4ZG_2nd@
CG649 0.1U_0402_16V4ZG_2nd@ CG649 0.1U_0402_16V4ZG_2nd@
NC1NC8NC11NC12NC
4
VOUTZ
12
12
CG641 0.1U_0402_16V4ZG_2nd@ CG641 0.1U_0402_16V4ZG_2nd@
14
SLEEP#
0G-DET9G-SELECT10ST
7
SELF_TEST
+3VS_HDP
5
VSS
MMA7360LR2_LGA14
MMA7360LR2_LGA14
13
UG2
G@ UG2
G@
G@
+3VS_HDP+3VS
12
R689 0_0603_5%@R689 0_0603_5%@
+5VS +3VS_HDP
DG1
DG1
CH751H-40PT_SOD323-2G@
CH751H-40PT_SOD323-2G@
21
2
G@
UG3
UG3
G@
G@
CG12
1U_0402_6.3V4Z
CG12
1U_0402_6.3V4Z
1
G@
G@
CG14
0.22U_0402_10V4Z@
CG14
0.22U_0402_10V4Z@
12
4
5
BYP
OUT
IN1GND2SHDN#
3
+5VS
G9191-330T1U_SOT23-5
G9191-330T1U_SOT23-5
E
D
HDPLOC 34
RG9
47K_0402_5%
47K_0402_5%
1 2
G@ RG9
G@
12
11
13
P1_4/TXD0
P1_6/CLK0/SSI01
P1_5/RXD0/CNTR01/INT11#
P3_7/CNTR0#/SSO/TXD1
P3_5/SSCK/SCL/CMP1_2
RESET#
2
1
3
RG4
RG3
4.7K_0402_5%
4.7K_0402_5%
12
SELF_TEST
G@ RG4
G@
G@ RG3
G@
EC_SMB_CK26,19,34
+3VS_HDP
RG10
47K_0402_5%
47K_0402_5%
1
1 2
G@ RG10
G@
VOUTZ
14
16
15
P4_2/VREF
P1_3/KI3#/AN11/TZOUT
P1_2/KI2#/AN10/CMP0_2
XOUT/P4_7
VSS/AVSS
XIN/P4_6
4
5
6
4.7K_0402_5%
4.7K_0402_5%
RG5
4.7K_0402_5%
4.7K_0402_5%
12
12
G@ RG5
G@
CG6
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
G@ CG6
G@
VOUTX
VOUTY
18
17
19
20
P1_0/KI0#/AN8/CMP0_0
P1_1/KI1#/AN9/CMP0_1
P3_3/TCIN/INT3#/SSI00/CMP1_0
MODE8P1_7/CNTR00/INT10#
P4_5/INT0#/RXD1
VCC/AVCC
9
7
RG6
G@ RG6
G@
G@
G@
1
4.7K_0402_5%
4.7K_0402_5%
RG7
1K_0402_5%
1K_0402_5%
12
12
G@ RG7
G@
HDPINT
CG8
0.1U_0402_16V4Z
CG8
0.1U_0402_16V4Z
2
HDPINT34
10
C686
220P_0402_50V7K@
C686
220P_0402_50V7K@
C699
220P_0402_50V7K@
C699
EC_SMB_DA2 6,19,34
220P_0402_50V7K@
1 2
1 2
EC_REVBTN#
ON/OFFBTN#
< For EMI >
P3_4/SCS#/SDA/CMP1_1
1122334
JTOUCH
JTOUCH
+5VS
R5F211B4D31SP-PLSP0020JB-A
R5F211B4D31SP-PLSP0020JB-A
< Touch/B Connector >
C702
220P_0402_50V7K@
C702
220P_0402_50V7K@
1 2
EC_FRDBTN#
4
TP_CLK34
TP_DATA34
C708
220P_0402_50V7K@
C708
220P_0402_50V7K@
C705
220P_0402_50V7K@
C705
220P_0402_50V7K@
1 2
1 2
EC_MUTEBTN#
EC_PLAYBTN#
ON/OFFBTN#
KSO0
11223344556677889
JPWR1
JPWR1
ACES_85201-04051@
ACES_85201-04051@
KSO0 33,34
ON/OFFBTN#
KSO0
11223344556677889
JPOWER
JPOWER
< SW/B Connector >
EC_MUTEBTN#
EC_PLAYBTN#
EC_REVBTN#
EC_FRDBTN#
KSI2 33,34
KSI1 33,34
KSI3 33,34
KSI5 33,34
EC_MUTEBTN#
EC_PLAYBTN#
EC_REVBTN#
EC_FRDBTN#
BATT_FULL_LED# 34
91010
91010
35 45Wednesday, February 25, 2009
35 45Wednesday, February 25, 2009
35 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
12
GND11GND
12
GND11GND
BATT_LOW_LED# 34
LED/LID/PB/FB/SCREW HOLE
LED/LID/PB/FB/SCREW HOLE
LED/LID/PB/FB/SCREW HOLE
ACES_88514-104N@
ACES_88514-104N@
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
ACES_85201-1005N@
ACES_85201-1005N@
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
< G - Sensor >
C
H_3P0
@
@
1
@
@
1
@
@
1
@
@
1
@
@
1
@
@
1
ON/OFFBTN# 34
ON/OFFBTN#
3
4
2
1
TOP side
H_3P0
1
H26
H26
H_3P0
H_3P0
1
H25
H25
H_3P0
H_3P0
1
H24
H24
H_3P0
H_3P0
1
H23
H23
H_3P0
H_3P0
1
H22
H22
H_3P0
H_3P0
1
H21
H21
SMT1-05-A_4P
SMT1-05-A_4P
5
6
@
@
@
@
@
@
@
@
@
@
@
@
H_3P0
H_3P0
H20
H20
H_3P0
H_3P0
H19
H19
H_3P0
H_3P0
H18
H18
H_3P0
H_3P0
H17
H17
H_3P0
H_3P0
H16
H16
H_3P0
H_3P0
H15
H15
< Screw Hole >
B
A
SW5
SW5
debug phase using
< Power Button for Debug >
CG7
0.1U_0402_16V4Z
G@
CG7
0.1U_0402_16V4Z
G@
1
+3VS_HDP
1
FD4@FD4
H_3P7
H_3P7
H32
H32
H_3P2
H_3P2
H31
H31
H_3P2
H_3P2
H30
H30
H_3P1N
H_3P1N
H29
H29
H_3P0
H_3P0
H28
H28
H_3P0
H_3P0
H27
H27
1 1
H_3P7
H_3P7
@
@
1
1
1
1
1
1
1
H38
H38
H_3P7
H_3P7
@
@
1
H37
H37
H_3P7
H_3P7
@
@
1
H36
H36
H_3P7
H_3P7
@
@
1
H35
H35
H_3P7
H_3P7
@
@
1
H34
H34
H_3P7
H_3P7
@
@
1
H33
H33
51_ON# 37
D
D
13
@
@
H47
H47
@
@
H42
H42
@
@
H41
H41
@
@
@
@
H40
H40
@
@
H39
H39
Q19
2N7002_SOT23-3
Q19
2N7002_SOT23-3
S
S
G
G
2
R514
R514
EC_ON34,36
H_3P0
H_3P0
@
@
1
H_3P0N
H_3P0N
@
@
1
H_3P0N
H_3P0N
@
@
1
H_3P1X4P1N
H_3P1X4P1N
@
@
1
H_3P7
H_3P7
@
@
1
1 2
10K_0402_5%
10K_0402_5%
@
1
FD3@FD3
@
1
FD2@FD2
@
PCB Fedical Mark PAD
1
FD1@FD1
@
MDC: H30, H31
VGA: H38, H39
CPU: H32, H33, H34, H35
Mini Card : H36, H37
Others: H15, H16, H17, H18, H19, H20, H21, H22,
H23, H24, H25, H26, H27, H28, H29, H40, H47
ACIN 22,34,37
S
S
G
G
2
D
D
1 3
D54
D54
2 1
HT-110UYG-CT_YEL/GRN
HT-110UYG-CT_YEL/GRN
R515
120_0402_5%
R515
120_0402_5%
1 2
+3VALW
< DC-IN LED >
2 2
LID_SW# 34
1
2
C647
3
17inch@ C647
17inch@
10P_0402_50V8J
10P_0402_50V8J
VOUT
GND
1
VDD
U34
APX9132ATI-TRL_SOT23-3
APX9132ATI-TRL_SOT23-3
2
17inch@ U34
17inch@
< LID Switch >
+3VALW
Q20
2N7002_SOT23-3
Q20
2N7002_SOT23-3
17inch@C645
17inch@
C645
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
U36
16inch@ U36
16inch@
Vf=2.0V (typ), 2.4 V (max), If = 30mA (max)
Remove WiMAX LED control circuit
+3VALW
2
1
2
C648
3
16inch@ C648
16inch@
10P_0402_50V8J
10P_0402_50V8J
VOUT
GND
1
VDD
APX9132ATI-TRL_SOT23-3
APX9132ATI-TRL_SOT23-3
2
16inch@C646
16inch@
C646
0.1U_0402_16V4Z
0.1U_0402_16V4Z
1
2
3 3
1.C199 : U19
2.C200 : PU5
3.Top side of PU12 for noise bounce.
1 2
C199 0.22U_0603_16V4ZC199 0.22U_0603_16V4Z
< EMI reserve >
+5VALW
SATA_LED# 22
2
Q18A
2N7002DW-T/R7_SOT363-6
Q18A
2N7002DW-T/R7_SOT363-6
6 1
5
R546
10K_0402_5%
R546
10K_0402_5%12R548
R548
< HDD LED >
+3VS
< Ultra Bright Amber >
3
D70
D70
1
R773
120_0402_5%
R773
120_0402_5%
1 2
+3VALW
2
4.C202 : U25
5.C203 : PU9
1.U25
2.Botton side of JWLAN for keep noise return path.
3.Top side of PU12 for noise bounce.
4.Top side of PU5 for noise bounce.
5.U19
1 2
1 2
1 2
1 2
C203 0.22U_0603_16V4ZC203 0.22U_0603_16V4Z
C200 0.22U_0603_16V4ZC200 0.22U_0603_16V4Z
C201 0.22U_0603_16V4ZC201 0.22U_0603_16V4Z
C202 0.22U_0603_16V4ZC202 0.22U_0603_16V4Z
< BATT CHARGE/FULL LED >
WL_BT_LED# 34
4
Q18B
2N7002DW-T/R7_SOT363-6
Q18B
2N7002DW-T/R7_SOT363-6
3
D46
HT-110UYG-CT_YEL/GRN
D46
HT-110UYG-CT_YEL/GRN
2 1
120_0402_5%
120_0402_5%
1 2
< WL&BT LED >
+3VS
12
D50
HT-110UD_1204_AMBER
HT-110UD_1204_AMBER
WLAN@ D50
WLAN@
R550
120_0402_5%WLAN@
R550
120_0402_5%WLAN@
1 2
+3VS
< Ultra Bright Amber >
D68
D68
< POWER-ON & SUSPEND LED >
4 4
< Ultra Bright Yellow Green >
HT-210UD/UYG_AMB/GRN
HT-210UD/UYG_AMB/GRN
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Security Classification
Security Classification
Security Classification
Vf=1.9V(typ),2.4V(max) for amber
Vf=2.0V(typ),2.4V(max) for green
If=30mA(max)
PWR_ON_LED# 34
PWR_SUSP_LED# 34
2
1
1 2
R770 120_0402_5%R770 120_0402_5%
+3VALW
< Ultra Bright Yellow Green >
HT-210UD/UYG_AMB/GRN
HT-210UD/UYG_AMB/GRN
3
C
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
Page 36

E
2
D
Inrush current = 0A
1
+1.8VS
241
IRF8113PBF_SO8
IRF8113PBF_SO8
Q4
Q4
+1.8V
C
< +1.8V TO +1.8VS >
C841
10U_0805_10V4Z
C841
10U_0805_10V4Z
1
C848
1U_0402_6.3V4Z
C848
1U_0402_6.3V4Z
2
36
578
C842
C842
1
+VSB
R138
750K_0402_1%
R138
750K_0402_1%
1 2
13
D
D
C849
C849
1
1.8VS_ENABLE
R809
R809
12
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
SUSP
Q13
2N7002_SOT23-3
Q13
2N7002_SOT23-3
2
G
G
S
S
0.01U_0402_25V7K
0.01U_0402_25V7K
2
10M_0402_5%
10M_0402_5%
+VSB
R233
330K_0402_5%
R233
330K_0402_5%
12
R367
1K_0402_5%
1K_0402_5%
12
@ R367
@
C847
4.7U_0805_10V4Z
C847
4.7U_0805_10V4Z
1
61
1
12
2
C862
C862
1
C846
C846
Inrush current = 0A
1
+1.2V_HT
36
241
IRF8113PBF_SO8
IRF8113PBF_SO8
Q11
Q11
+1.2VALW
4.7U_0805_10V4Z
4.7U_0805_10V4Z
2
1U_0402_6.3V4Z
1U_0402_6.3V4Z
2
578
< +1.2VALW TO +1.2V_HT >
VLDT_EN#
2
C837
0.01U_0402_25V7K
C837
0.01U_0402_25V7K
2
R808
10M_0402_5%
R808
10M_0402_5%
EC_ON 34,35
5
Q143B
3
61
100K_0402_5%
100K_0402_5%
VLDT_EN#
SUSP 18,42
100K_0402_5%
100K_0402_5%
100K_0402_5%
100K_0402_5%
SYSON# SUSP EC_ON#
SYSON#42
Q143B
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
4
2
Q143A
Q143A
VLDT_EN
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
VLDT_EN34
SUSP# 19,27,30,34,39,41SYSON27,34,42
2
Q142A
2N7002DW-7-F_SOT363-6
Q142A
2N7002DW-7-F_SOT363-6
61
3
4
5
Q142B
Q142B
2N7002DW-7-F_SOT363-6
2N7002DW-7-F_SOT363-6
+5VL
Q12A
2N7002DW-T/R7_SOT363-6
Q12A
2N7002DW-T/R7_SOT363-6
+5VL+5VL +5VL
R598
100K_0402_5%
R598
100K_0402_5%
12
12
R597
R597
R596
R596
12
12
R595
R595
< Inversion of SYSON, SUSP#, VLDT_EN, EC_ON >
+1.1VS
+1.5VS
+1.2VALW
R294
470_0805_5%
R294
470_0805_5%
R293
470_0805_5%
R293
470_0805_5%
R292
470_0805_5%
R292
470_0805_5%
R288
470_0805_5%
R288
470_0805_5%
@
@
R368
R368
470_0805_5%
470_0805_5%
1 2
1 2
1 2
1 2
1 2
Q52
Q52
D
D
13
G
G
2
Q50
Q50
D
D
13
G
G
2
Q49
Q49
D
D
13
G
G
2
Q47
Q47
D
D
13
G
G
2
Q42
Q42
@
@
D
D
13
G
G
2
EC_ON# SYSON#
2N7002_SOT23-3
2N7002_SOT23-3
S
S
2N7002_SOT23-3
2N7002_SOT23-3
S
S
2N7002_SOT23-3
2N7002_SOT23-3
S
S
2N7002_SOT23-3
2N7002_SOT23-3
S
S
2N7002_SOT23-3
2N7002_SOT23-3
S
S
0.1
0.1
0.1
36 45Wednesday, February 25, 2009
36 45Wednesday, February 25, 2009
36 45Wednesday, February 25, 2009
E
LA-4971P
LA-4971P
LA-4971P
DC/DC Circuits
DC/DC Circuits
DC/DC Circuits
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008-09-25 2009-09-25
2008-09-25 2009-09-25
2008-09-25 2009-09-25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
C204
0.1U_0402_16V7K
C204
0.1U_0402_16V7K
1
2
+5VALW
B
+3VS
< close to PQ20, must EMI confirm >
C835
4.7U_0805_10V4Z
C835
4.7U_0805_10V4Z
1
2
C833
1U_0402_6.3V4Z
C833
1U_0402_6.3V4Z
Inrush current = 0A
1
Q35
Q35
3G4
S1S2S
D8D7D6D
2
RUNON
SI4800BDY_SO8
SI4800BDY_SO8
5
1
C864
C864
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
1 1
+5VS
A
+5VALW
< +5VALW TO +5VS >
+VSB
C197
0.1U_0402_16V7K
C197
0.1U_0402_16V7K
1
2
+3VS
R152
750K_0402_1%
R152
750K_0402_1%
12
13
D
D
R556
R556
12
RUNON
C834
C834
1
2
4.7U_0805_10V4Z
4.7U_0805_10V4Z
SUSP
2
G
G
Q17
2N7002_SOT23-3
Q17
2N7002_SOT23-3
S
S
10M_0402_5%
10M_0402_5%
0.01U_0402_25V7K
0.01U_0402_25V7K
2
2 2
< close to PQ20, must EMI confirm >
C838
4.7U_0805_10V4Z
C838
4.7U_0805_10V4Z
1
2
Inrush current = 0A
C839
1U_0402_6.3V4Z
C839
1U_0402_6.3V4Z
1
2
3G4
S1S2S
D8D7D6D
Q14
SI4800BDY_SO8
Q14
SI4800BDY_SO8
5
+3VALW +3VS
1
C840
C840
< +3VALW TO +3VS >
PJ29
JUMP_43X79
JUMP_43X79
112
2
@ PJ29
@
Vgs=-4.5V, Id=3A
Rds<97m ohm
+3VALW +3VALW +3V_LAN
< +3VALW TO +3V_LAN >
C194
C194
2
R17
100K_0402_5%
R17
100K_0402_5%
Q38
AO3413_SOT23
Q38
AO3413_SOT23
D
S
D
S
1 3
G
G
2
0.1U_0402_16V7K
0.1U_0402_16V7K
C182
0.01U_0402_25V7K
C182
0.01U_0402_25V7K
1
1
R19
47K_0402_5%
R19
47K_0402_5%
1 2
1 2
WOL_EN#
WOL_EN#34
C680
1U_0402_6.3V4Z
C680
1U_0402_6.3V4Z
1
2
Inrush current = 0A
C679
4.7U_0805_10V4Z
C679
4.7U_0805_10V4Z
1
2
@
@
2
< Discharge circuit >
3 3
+1.2V_HT +1.8V
+1.8VS +0.9V
+5VS +3VS
R284
R284
R280
470_0805_5%
R280
470_0805_5%
R279
470_0805_5%
R279
470_0805_5%
R239
470_0805_5%
R239
470_0805_5%
470_0805_5%
470_0805_5%
D
D
13
1 2
Q12B
Q12B
1 2
3
D
D
13
1 2
D
D
1 2
13
Q41
2N7002_SOT23-3
Q41
2N7002_SOT23-3
S
S
G
G
2
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
4
5
Q48
2N7002_SOT23-3
Q48
2N7002_SOT23-3
S
S
G
G
2
Q46
2N7002_SOT23-3
Q46
2N7002_SOT23-3
S
S
G
G
2
SUSP SUSP SUSP SUSPVLDT_EN# SYSON# SUSP
4 4
B
A
Page 37

0.1
0.1
0.1
PACIN
PC11
1000P_0402_50V7K
PC11
1000P_0402_50V7K
12
1 2
PR12 1K_1206_5%
PR12 1K_1206_5%
PR14 1K_1206_5%
PR14 1K_1206_5%
PD4
PD4
B+
1 2
1 2
PR16 1K_1206_5%
PR16 1K_1206_5%
N3
12
RLS4148_LL34-2
RLS4148_LL34-2
VIN
12
PR17
499K_0402_1%
PR17
499K_0402_1%
12
PR20
PR20
2.2M_0402_5%
2.2M_0402_5%
PR19
PR19
1 2
100K_0402_1%
100K_0402_1%
VL
PU1B
PU1B
PD5
PD5
RB715F_SOT323-3
RB715F_SOT323-3
5-6
+
P8G
7
1
2
EN040
PR24
PR24
12
RTCVREF
12
PR23
PR23
O
LM393DG_SO8
LM393DG_SO8
3
ACON39
499K_0402_1%
499K_0402_1%
PR26
191K_0402_1%
PR26
191K_0402_1%
12
PR25
10K_0402_1%
10K_0402_1%
66.5K_0402_1%
66.5K_0402_1%
@PR25
@
12
12
PC13
PC13
4
1000P_0402_50V7K
1000P_0402_50V7K
12
PC12
PC12
1000P_0402_50V7K
1000P_0402_50V7K
ACIN 22,34,35
PACIN 39
D
PR4
PR4
PACIN
10K_0402_1%
10K_0402_1%
1 2
PR2
5.6K_0402_5%
PR2
5.6K_0402_5%
12
VS
PR1
PR1
N1
1M_0402_1%
1M_0402_1%
1 2
C
PR5
PR5
PR3
84.5K_0402_1%
PR3
84.5K_0402_1%
12
VIN
1
O
PU1A
PU1A
P8G
+3-
2
22K_0402_1%
22K_0402_1%
1 2
12
PR7
10K_0402_1%
PR7
10K_0402_1%
12
12
PD1
PD1
GLZ4.3B_LL34-2
GLZ4.3B_LL34-2
LM393DG_SO8
LM393DG_SO8
4
PC6
.1U_0402_16V7K
PC6
.1U_0402_16V7K
12
PR6
20K_0402_1%
PR6
20K_0402_1%
12
RTCVREF
12
PR8
PR8
Vin Detector
High 18.384 17.901 17.430
Low 17.728 17.257 16.976
3.3V
10K_0402_1%
10K_0402_1%
12
PR27
PR27
47K_0402_1%
47K_0402_1%
2
G
G
13
D
D
PQ2
PQ2
S
S
+5VALWP
2
PQ3
DTC115EUA_SC70-3
PQ3
DTC115EUA_SC70-3
13
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
1
1
2
PJ10
JUMP_43X79@
PJ10
JUMP_43X79@
2
(4A, 160mils, Via NO.= 8)(100mA,40mils ,Via NO.= 2)
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
15.97V/14.84V FOR
ADAPTOR
Precharge detector
Compal Secret Data
Compal Secret Data
Compal Secret Data
37 46Wednesday, February 25, 2009
37 46Wednesday, February 25, 2009
37 46Wednesday, February 25, 2009
D
DCIN & DETECTOR
DCIN & DETECTOR
DCIN & DETECTOR
LA-4971P
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2009/9/252008/9/25
2009/9/252008/9/25
2009/9/252008/9/25
C
Deciphered Date
Deciphered Date
Deciphered Date
PBJ1
PBJ1
- +
PR18
PR18
12
RTCVREF
200_0603_5%
200_0603_5%
+RTCBATT
+RTCBATT
12
MAXEL_ML1220T10@
MAXEL_ML1220T10@
PC10
PC10
12
N2
2
IN
1
GND
OUT
PU2 G920AT24U_SOT89-3
PU2 G920AT24U_SOT89-3
3
PC9
10U_0805_10V4Z
PC9
10U_0805_10V4Z
3.3V
12
PR22
PR22
560_0603_5%
560_0603_5%
1 2
PR21
PR21
1 2
560_0603_5%
560_0603_5%
SP093MX0000
1U_0805_25V4Z
1U_0805_25V4Z
+VDDNBP +VDDNB+3VLP +3VL
Issued Date
Issued Date
1
1
2
PJ4
JUMP_43X39@
PJ4
JUMP_43X39@
2
PJ23
PJ23
1
1
2
JUMP_43X39@
JUMP_43X39@
2
(100mA,40mils ,Via NO.= 2)
VL +5VL
+NB_CORE+NB_COREP
1
1
1
1
2
2
PJ3
JUMP_43X118@
PJ3
PJ2
PJ2
JUMP_43X118@
JUMP_43X118@
JUMP_43X118@
2
2
(8A,320mils ,Via NO.= 16)
+1.8VP +1.8V
1
1
2
PJ1
JUMP_43X118@
PJ1
JUMP_43X118@
2
1
1
2
PJ6
JUMP_43X118@
PJ6
JUMP_43X118@
2
OCP(min) = 9.69A
( 7A, 280mils , Via NO.=14 )
+5VALW
1
1
2
PJ5
JUMP_43X118@
PJ5
JUMP_43X118@
2
1
1
2
PJ7
JUMP_43X39@
PJ7
JUMP_43X39@
2
(1A,40mils ,Via NO.= 2)
+2.5VSP +2.5VS
1
1
2
PJ9
JUMP_43X118@
PJ9
JUMP_43X118@
2
OCP(min) = 9.06A
(6A,240mils ,Via NO.=12)
+1.2VALWP +1.2VALW
1
1
2
PJ8
JUMP_43X39@
PJ8
JUMP_43X39@
2
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
OCP(min) = 9.15A
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
+1.5VS+1.5VSP
1
1
2
PJ12
JUMP_43X79@
PJ12
JUMP_43X79@
2
(3A,120mils ,Via NO.=6)
+0.9V+0.9VP
1
1
2
PJ11
JUMP_43X79@
PJ11
JUMP_43X79@
2
B
A
PC5
PC5
0.068U_0402_10V6K
0.068U_0402_10V6K
PC4
100P_0402_50V8J
PC4
100P_0402_50V8J
PL1
PL1
PF1
PF1
1 2
DC_IN_S2
21
DC_IN_S1
12
PC3
1000P_0402_50V7K
PC3
1000P_0402_50V7K
12
SMB3025500YA_2P
SMB3025500YA_2P
PC2
PC2
100P_0402_50V8J
100P_0402_50V8J
12
PC1
1000P_0402_50V7K
PC1
1000P_0402_50V7K
12
10A_125V_451010MRL
10A_125V_451010MRL
1-3-4
2
+
+
PJP1
PJP1
VS
PR10
68_1206_5%
PR10
68_1206_5%
12
1 2
PD3
PD3
12
PR9
PR9
68_1206_5%
68_1206_5%
12
RLS4148_LL34-2
RLS4148_LL34-2
BATT+
PQ1
PQ1
PC8
0.1U_0603_25V7K
PC8
0.1U_0603_25V7K
12
13
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
N1
12
12
PR13
PR13
PR11
PR11
200_0603_5%
200_0603_5%
1 2
CHGRTCP
PD2
RLS4148_LL34-2
PD2
RLS4148_LL34-2
VIN
SINGA_2DW-0005-B03@
SINGA_2DW-0005-B03@
2
PC7
0.22U_1206_25V7K
PC7
0.22U_1206_25V7K
PR15
PR15
22K_0402_1%
22K_0402_1%
1 2
100K_0402_1%
100K_0402_1%
51_ON#35
RTC Battery
VIN
B
A
DC301001M80
+CHGRTC
1 1
2 2
3 3
OCP(min) = 7.7A
(5A,200mils ,Via NO.= 10)
+3VALWP +3VALW
(5A,200mils ,Via NO.= 10)
+5VALWP
OCP(min) = 7.9A
(120mA,40mils ,Via NO.= 1)
+VSBP +VSB
4 4
(2A,80mils ,Via NO.= 4)
Page 38

0.1
0.1
0.1
S
S
1 2
47K_0402_1%
47K_0402_1%
PU3A
PU3A
1 2
PR33
PR33
13.7K_0402_1%
13.7K_0402_1%
PD6
PD6
P8G
+3-
1 2
ENTRIP2 6,40
12
1
O
2
TM_REF1
D
D
13
RLS4148_LL34-2
RLS4148_LL34-2
12
LM393DG_SO8
LM393DG_SO8
4
12
12
12
PQ5
SSM3K7002FU_SC70-3
PQ5
SSM3K7002FU_SC70-3
S
S
G
G
2
VL
PR38
PR38
100K_0402_1%
100K_0402_1%
PR40
100K_0402_1%
PR40
100K_0402_1%
12
1000P_0402_50V7K
1000P_0402_50V7K
PC18
PC18
15.4K_0402_1%
15.4K_0402_1%
PR36
PR36
0.22U_0805_16V7K
0.22U_0805_16V7K
PC17
PC17
38 46Wednesday, February 25, 2009
38 46Wednesday, February 25, 2009
38 46Wednesday, February 25, 2009
D
12
PD7
RLS4148_LL34-2
PD7
RLS4148_LL34-2
PR41
47K_0402_1%
PR41
47K_0402_1%
PR42
PR42
47K_0402_1%
47K_0402_1%
12
PH2
PH2
1 2
1 2
7
O
PU3B
PU3B
P8G
+5-
PR44
PR44
1 2
13.7K_0402_1%
13.7K_0402_1%
LM393DG_SO8
LM393DG_SO8
4
6
TM_REF1
PR46
PR46
12
12
PC21
PC21
15.4K_0402_1%
15.4K_0402_1%
VLVL
PH2 near main Battery CONN :
Recovery at 56 degree C
BAT. thermal protection at 92 degree C
LA-4971P
BATTERY CONN / OTP
BATTERY CONN / OTP
BATTERY CONN / OTP
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2009/9/252008/9/25
2009/9/252008/9/25
2009/9/252008/9/25
C
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
ENTRIP1 40
PQ4
SSM3K7002FU_SC70-3
PQ4
SSM3K7002FU_SC70-3
D
D
13
G
G
2
D
PR30
47K_0402_1%
PR30
47K_0402_1%
VL
VL
Recovery at 56 degree C
CPU thermal protection at 92 degree C
PH1 under CPU botten side :
C
PR31
PR31
12
PC16
PC16
0.1U_0603_25V7K
0.1U_0603_25V7K
12
VL
PH1
PH1
100K_0603_1%_TH11-4H104FT
100K_0603_1%_TH11-4H104FT
BATT+
PC15
0.01U_0402_25V7K
PC15
0.01U_0402_25V7K
12
PL2
PL2
1 2
SMB3025500YA_2P
SMB3025500YA_2P
PC14
1000P_0402_50V7K
PC14
1000P_0402_50V7K
VMB
B
12
+3VLP
21
PR29
PR29
PF2
PF2
47K_0402_1%
47K_0402_1%
1 2
15A_65V_451015MRL
15A_65V_451015MRL
PR28
PR28
1K_0402_1%
1K_0402_1%
1 2
PR32
1K_0402_1%
PR32
1K_0402_1%
12
PR35
100_0402_1%
PR35
100_0402_1%
1 2
+3VLP
12
PR37
PR37
6.49K_0402_1%
6.49K_0402_1%
PR39
1K_0402_1%
PR39
1K_0402_1%
12
BATT_TEMPA 34
EC_SMB_DA1 18,34
EC_SMB_CK1 18,34
100K_0603_1%_TH11-4H104FT
100K_0603_1%_TH11-4H104FT
+VSBP
12
13
PQ6
PQ6
TP0610K-T1-E3_SOT23-3
TP0610K-T1-E3_SOT23-3
12
12
PC20
PR43
PR43
0.1U_0603_25V7K
0.1U_0603_25V7K
@ PC20
@
2
PC19
0.22U_1206_25V7K
0.22U_1206_25V7K
@PC19
@
100K_0402_1%
100K_0402_1%
PR45
PR45
1 2
22K_0402_1%
22K_0402_1%
0.22U_0805_16V7K
0.22U_0805_16V7K
PQ7
PQ7
D
D
13
2
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
G
G
12
.1U_0402_16V7K
.1U_0402_16V7K
PC22
@ PC 22
@
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
1 2
PR34
PR34
100_0402_1%
BATT_P4
BATT_P5
BATT_P3
BATT_S1
EC_SMCA
EC_SMDA
A
2
1133445566889
2
PJP2
PJP2
7
7
GND11GND10GND12GND
9
13
Liverpool
1 1
100_0402_1%
BATT_S1
1133445566889
PJP3
@
@
SUYIN_200045MR009G171ZR
SUYIN_200045MR009G171ZR
PJP3
Sunderland
BATT_P3
2
2
EC_SMDA
BATT_P4
BATT_P5
EC_SMCA
9
7
7
GND11GND10GND12GND
13
@
@
SUYIN_200045MR009G171ZR
SUYIN_200045MR009G171ZR
2 2
B+
VL
3 3
PR48
PR48
1 2
PR47
PR47
100K_0402_1%
100K_0402_1%
0_0402_5%
0_0402_5%
1 2
POK40,41
A
4 4
Page 39

D
C
B
A
90W 4407A*1
120W 4407A*2
PQ10
PQ10
AO4407A_SO8
AO4407A_SO8
3 6
241
P2
578
PQ45
@PQ45
@
CHG_B+
1
1
2
PJ13
PJ13
2
B+
4
PR49
PR49
0.015_2512_1%
0.015_2512_1%
1
P3
PQ9
PQ9
AO4407A_SO8
AO4407A_SO8
241
241
PQ8
PQ8
AO4407A_SO8
AO4407A_SO8
578
AO4407A_SO8
AO4407A_SO8
3 6
241
CSIN
CSIP
JUMP_43X79@
JUMP_43X79@
3
2
578
3 6
12
36
578
VIN
PR51
PR51
1 2
47K_0402_1%
47K_0402_1%
12
10U_1206_25V6M
10U_1206_25V6M
PC24
PC24
12
10U_1206_25V6M
10U_1206_25V6M
PC23
PC23
PD9
PD9
PQ13
DTC115EUA_SC70-3
PQ13
DTC115EUA_SC70-3
13
DCIN
13
PQ11 TP0610K-T1-E3_SOT23-3
PQ11 TP0610K-T1-E3_SOT23-3
12
PR54
PR54
P3
100K_0402_1%
100K_0402_1%
1 2
PC26
PC26
5600P_0402_25V7K
5600P_0402_25V7K
PR50
200K_0402_1%
PR50
200K_0402_1%
PC27
0.1U_0603_25V7K
PC27
0.1U_0603_25V7K
12
2
PQ12
PQ12
PR53
47K_0402_1%
PR53
47K_0402_1%
DTA144EUA_SC70-3
DTA144EUA_SC70-3
12
ACOFF
PR55
PR55
PD8
PD8
1 2
1SS355_SOD323-2
1SS355_SOD323-2
1 2
PR52
PR52
10K_0402_1%
10K_0402_1%
SUSP# 19,27,30,34,36,41
FSTCHG
2
3
RB715F_SOT323-3
RB715F_SOT323-3
1
2
12
PR56
PR56
100K_0402_1%
100K_0402_1%
2
6251VDD
PR57
PR57
PD10
PD10
1 2
1SS355_SOD323-2
1SS355_SOD323-2
1 3
13
VIN
1 2
200K_0402_1%
200K_0402_1%
PD11
PD11
1 2
2
13
PQ14
PQ14
DTC115EUA_SC70-3
DTC115EUA_SC70-3
12
PC30
@ PC30
@
0.1U_0603_25V7K
0.1U_0603_25V7K
DCIN
24
DCIN
VDD1ACSET
PU4
PU4
12
2.2U_0603_6.3V6K
2.2U_0603_6.3V6K
PC28
PC28
12
12
10K_0402_1%
10K_0402_1%
PC29
PC29
1 2
FSTCHG34
12
PQ15
DTC115EUA_SC70-3
PQ15
DTC115EUA_SC70-3
PQ16
SSM3K7002FU_SC70-3
PQ16
SSM3K7002FU_SC70-3
2
D
D
13
G
G
2
PACIN
2
13
D
D
12
PC31
PC31
1SS355_SOD323-2
1SS355_SOD323-2
8
7
5
PR60
PR60
20_0603_5%
20_0603_5%
1 2
PC32
0.047U_0603_16V7K
PC32
0.047U_0603_16V7K
23
22
CSON
ACPRN
EN3CELLS
2
6251_EN CSON
100K_0402_1%
100K_0402_1%
PR59
PR59
PC33
PC33
680P_0402_50V7K@
680P_0402_50V7K@
.1U_0402_16V7K
.1U_0402_16V7K
PR58
150K_0402_1%
PR58
150K_0402_1%
S
S
G
G
PQ17
PQ17
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
S
S
0.1U_0603_25V7K
0.1U_0603_25V7K
PL3
PL3
PQ18
AO4466_SO8
PQ18
AO4466_SO8
4
CSOP
12
PR62
PR62
20_0603_5%
20_0603_5%
1 2
PR61
PR61
20_0603_5%
20_0603_5%
1 2
PC35
PC35
0.1U_0603_25V7K
0.1U_0603_25V7K
1 2
19
20
21
CSIN
CSOP
ICOMP5VCOMP
4
6
1 2
1 2
PR63 6.81K_0402_1%
PR63 6.81K_0402_1%
PC34 6800P_0402_25V7K
PC34 6800P_0402_25V7K
1 2
CSON
PC36
PC36
1 2
PQ19
SSM3K7002FU_SC70-3
PQ19
SSM3K7002FU_SC70-3
D
D
13
G
G
2
12
12
PR170
4.7_1206_5%
PR170
4.7_1206_5%
PQ20
PQ20
4
12
PC39
PC39
0.1U_0603_25V7K
0.1U_0603_25V7K
BST_CHGA
12
PR69
PR69
1 2
2.2_0603_5%
2.2_0603_5%
DH_CHG
BST_CHG
17
16
BOOT
UGATE
CHLIM
9
8
6251VREF
ADP_I34
PC38 .1U_0402_16V7K
PC38 .1U_0402_16V7K
12
PR68
PR68
154K_0402_1%
154K_0402_1%
PC41
PC41
PC40
PC40
PC129
680P_0603_50V7K
PC129
680P_0603_50V7K
12
AO4466_SO8
AO4466_SO8
PD12
RB751V-40TE17_SOD323-2
PD12
RB751V-40TE17_SOD323-2
6251VDDP
15
10
PR70
PR70
53.6K_0402_1%
53.6K_0402_1%
BATT+
3
4
PR66
PR66
0.02_2512_1%
0.02_2512_1%
1
2
CHG
1 2
12
10U_LF919AS-100M-P3_4.5A_20%
10U_LF919AS-100M-P3_4.5A_20%
8
1
7
2
3 6
5
PR64
PR64
2.2_0603_5%
2.2_0603_5%
LX_CHG
1 2
18
CSIP
PHASE
ICM7VREF
PR65
PR65
100_0402_1%
100_0402_1%
1 2
1 2
PC37
PC37
1 2
100P_0402_50V8J@
100P_0402_50V8J@
0.01U_0402_25V7K
0.01U_0402_25V7K
IREF34
S
S
13
PQ21
22K_0402_5%
22K_0402_5%
1 2
PACIN
PACIN37
ACON37
PQ21
DTC115EUA_SC70-3
DTC115EUA_SC70-3
PR67
PR67
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
10U_1206_25V6M
1
2
3 6
6251VDD
PR72
PR72
1 2
DL_CHG
14
VDDP
LGATE
VADJ
ACLIM
11
6251aclim
12
PR73
PR73
1 2
6251VREF
12
PC42
PC42
12
PR71
PR71
100K_0402_1%
100K_0402_1%
2
ACOFF
ACOFF34
4.7_0603_5%
4.7_0603_5%
PC43
4.7U_0805_6.3V6K
PC43
4.7U_0805_6.3V6K
1 2
13
PGND
GND
12
20K_0402_1%
20K_0402_1%
0.01U_0402_25V7K
0.01U_0402_25V7K
ISL6251AHAZ-T_QSOP24
ISL6251AHAZ-T_QSOP24
12
PR75
PR75
PR74
PR74
1 2
287K_0402_1%
287K_0402_1%
499K_0402_1%
499K_0402_1%
CHGVADJ34
ADP_V 34
PR202
PR202
10K_0402_1%
10K_0402_1%
1 2
PC130
PC130
12
12
VIN
PR171
PR171
PR49=0.02, PR70=24k, PR73=20k
PR49=0.015, PR70=53.6k, PR73=20k
PR49=0.015, PR70=8.25k, PR73=26.7k
PR49=0.02, PR70=75k, PR73=20kIada=0~3.421A(65W) CP=3.15A
CP=4.36A
CP=5.81A
Iada=0~4.737A(90W)
Iada=0~6.316A(120W)
CP= 92%*Iada
Iada=0~3.947A(75W) CP=3.63A
12
PR172
PR172
47K_0402_1%
309K_0402_1%
309K_0402_1%
CP mode
Vaclim=2.39*(Rb//152K/(Rt//152K+Rb//152K))
47K_0402_1%
12
PD14
@ PD14
@
GLZ4.3B_LL34-2
GLZ4.3B_LL34-2
Iinput=(1/PR49)((0.05*Vaclm)/2.39+0.05)
where Vaclm=1.09986V, Iinput=3.65A
Vaclm=0.7717V, Iinput=4.41A
Vaclm=0.4204V, Iinput=5.88A
.1U_0402_16V7K
.1U_0402_16V7K
0V
1.882V
CHGVADJ
Vcell
4V34.2V24.35V
CHGVADJ=(Vcell-4)/0.10627
CC=0.25A~3A
IREF=0.254V~3.048V
IREF=1.016*Icharge
VCHLIM need over 95mV
0.1
0.1
0.1
CHARGER
CHARGER
CHARGER
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Security Classification
Security Classification
Security Classification
3.2935V
-
GND Float
4
VDD
CELLS
CELL number
39 46Wednesday, February 25, 2009
39 46Wednesday, February 25, 2009
39 46Wednesday, February 25, 2009
D
LA-4971P
LA-4971P
LA-4971P
Date: Sheet of
Date: Sheet of
Date: Sheet of
C
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
VIN
1 1
2 2
3 3
4 4
Page 40

+5VALWP
1
+
+
220U_6.3VM_R15
220U_6.3VM_R15
PC55
PC55
2
ESR=15m
0.1
0.1
0.1
40 46
40 46
40 46
1
PL6
PL6
1 2
12
4.7U_LF919AS-4R7M-P3_5.2A_20%
PQ22
PQ22
AO4466_SO8
AO4466_SO8
8
7
12
12
12
PR81
PR81
150K_0402_1%
150K_0402_1%
1 2
ENTRIP1
ENTRIP2
PR80
PR80
1 2
150K_0402_1%
150K_0402_1%
5
4
4.7U_1206_25V6K
4.7U_1206_25V6K
PC47
PC47
4.7U_1206_25V6K
4.7U_1206_25V6K
PC46
PC46
2200P_0402_50V7K
2200P_0402_50V7K
PC45
PC45
1
2
3
4
5
6
PU5
PU5
B++
PR79
PR79
20K_0402_1%
20K_0402_1%
1 2
PR78
PR78
20K_0402_1%
20K_0402_1%
1 2
5VALWP
Imax = 5A
Ipeak = 7A
Iocp = 8.59A
2
PR77
PR77
30K_0402_1%
30K_0402_1%
1 2
12
3
0.22U_0603_10V7K
0.22U_0603_10V7K
PC44
PC44
PR76
PR76
13K_0402_1%
13K_0402_1%
1 2
2VREF_51125
+3VLP
12
4.7U_0805_10V6K
4.7U_0805_10V6K
PC51
PC51
4.7U_LF919AS-4R7M-P3_5.2A_20%
1
2
3 6
PC53
PC53
1 2
POK 38,41
0.1U_0402_16V7K
0.1U_0402_16V7K
PR83
PR83
1 2
BST_5V
22
23
24
VO1
ENTRIP1
PGOOD
VFB1
VREF
TONSEL
VFB2
ENTRIP2
VREG3
VO2
P PAD
8
7
25
9
BST_3V
PR82
PR82
1 2
1 2
PC52
PC52
0.1U_0402_16V7K
0.1U_0402_16V7K
8
7
5
0_0603_1%
0_0603_1%
UG_5V
21
VBST1
DRVH1
DRVH2
VBST2
10
UG_3V
0_0603_1%
0_0603_1%
LX_5V
20
LL1
LL2
11
LX_3V
PR85
4.7_1206_5%
4.7_1206_5%
@ PR85
@
12
4
PQ25
PQ25
AO4712_SO8
AO4712_SO8
LG_5V
19
DRVL1
DRVL2
12
LG_3V
f = 305kHz
PC57
@ PC57
@
680P_0603_50V7K
680P_0603_50V7K
1
2
3 6
f = 245kHz
VL
TPS51125RGER_QFN24_4X4
TPS51125RGER_QFN24_4X4
VCLK
18
VREG5
17
VIN
16
GND
15
SKIPSEL
14
EN0
13
EN037
12
PR86
PR86
1 2
499K_0402_1%
499K_0402_1%
B+
1 2
12
PR88
PR88
0_0402_5%@
0_0402_5%@
PR87
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Deciphered Date
Deciphered Date
4.7U_0805_10V6K
4.7U_0805_10V6K
PC58
PC58
12
B++
0.1U_0603_25V7K
0.1U_0603_25V7K
PC59
PC59
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2VREF_51125
100K_0402_1%
100K_0402_1%
PR87
Issued Date
Issued Date
Issued Date
Security Classification
Security Classification
Security Classification
1
LA-4971P
3VALWP/5VALWP
3VALWP/5VALWP
3VALWP/5VALWP
Wednesday, February 25, 2009
Wednesday, February 25, 2009
Wednesday, February 25, 2009
Custom
Custom
Custom
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
3
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
3.3VALWP
Imax = 5A
AO4712 Rds(on) = 15/18
5
Ipeak = 7A
Iocp = 8.59A
OCP = 7.94A
D D
B++
PJ30
PJ30
4
5
7
8
PQ23
PQ23
12
12
12
1
1
2
JUMP_43X118@
JUMP_43X118@
2
B+
4.7U_1206_25V6K
4.7U_1206_25V6K
PC50
PC50
4.7U_1206_25V6K
4.7U_1206_25V6K
PC49
PC49
2200P_0402_50V7K
2200P_0402_50V7K
PC48
PC48
AO4466_SO8
AO4466_SO8
C C
3 6
2
1
PL5
PL5
1 2
4.7U_LF919AS-4R7M-P3_5.2A_20%
4.7U_LF919AS-4R7M-P3_5.2A_20%
+3VALWP
PQ24
AO4712_SO8
PQ24
AO4712_SO8
5
7
8
12
PR84
@ PR84
@
4
12
4.7_1206_5%
4.7_1206_5%
+
+
1
PC54
PC54
3 6
2
1
PC56
@ PC56
@
680P_0603_50V7K
680P_0603_50V7K
2
220U_6.3VM_R15
220U_6.3VM_R15
ESR=15m
ENTRIP2 6,38ENTRIP1 38
PQ27
SSM3K7002FU_SC70-3
PQ27
SSM3K7002FU_SC70-3
D
S
D
S
13
G
G
2
2
G
G
13
D
S
D
S
PQ26
PQ26
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
B B
12
PR89
PR89
VL
PQ28
SSM3K7002FU_SC70-3
PQ28
SSM3K7002FU_SC70-3
D
D
13
G
G
2
100K_0402_1%
100K_0402_1%
1 2
VS
S
S
PR91
49.9K_0402_1%
PR91
49.9K_0402_1%
12
PR90
PR90
100K_0402_1%
100K_0402_1%
A A
4
5
Page 41

0.1
0.1
0.1
41 46Wednesday, February 25, 2009
41 46Wednesday, February 25, 2009
41 46Wednesday, February 25, 2009
1
1
LA-4971P
NB_COREP/1.2VALWP
NB_COREP/1.2VALWP
NB_COREP/1.2VALWP
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Deciphered Date
Deciphered Date
Deciphered Date
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
Date: Sheet of
2
3
B+
PJ15
PJ15
1
1
2
2
1.2V_B+
+1.2VALWP
JUMP_43X118@
JUMP_43X118@
+
+
1
2
220U_6.3VM_R15
+
+
1
2
100U_25V_M
100U_25V_M
PC173
PC173
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC70
PC70
12
12
PC69
PC69
8
7
5
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PQ31
PQ31
AO4466_SO8
AO4466_SO8
4
PL8
PL8
PR103
4.7_1206_5%
PR103
4.7_1206_5%
1 2
12
2.2UH_PCMC063T-2R2MN_8A_20%
2.2UH_PCMC063T-2R2MN_8A_20%
PC72
PC72
1 2
8
7
5
0.1U_0603_25V7K
0.1U_0603_25V7K
1
2
3 6
PQ32
PQ32
+5VALW
PC73
PC73
12
4
AO4712_SO8
AO4712_SO8
220U_6.3VM_R15
PC75
PC75
1
2
3 6
PC76
PC76
4.7U_0805_10V6K
4.7U_0805_10V6K
12
680P_0603_50V7K
680P_0603_50V7K
Compal Secret Data
Compal Secret Data
Compal Secret Data
+1.1V
B+
1
1
PJ14
PJ14
2
3
2
2
NB_B+
JUMP_43X118@
JUMP_43X118@
12
12
PC61
PC61
PC60
PC60
8
7
5
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
PQ29
PQ29
AO4466_SO8
AO4466_SO8
4
+NB_COREP
PL7
PL7
1 2
12
1.8UH_SIL104R-1R8PF_9.5A_30%
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
3 6
PC63
PC63
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
1
8
7
5
+
+
PC64
PC64
4.7_1206_5%
4.7_1206_5%
PR95
PR95
PQ30
PQ30
AO4712_SO8
AO4712_SO8
+5VALW
2
12
4
220U_6.3VM_R15
220U_6.3VM_R15
PC66
PC66
1
2
3 6
PC67
PC67
4.7U_0805_10V6K
4.7U_0805_10V6K
12
680P_0603_50V7K
680P_0603_50V7K
0_0603_1%
0_0603_1%
1 2
PR101
PR101
1 2
POK38,40
BST_1.2V
14
15
1
PU7
PU7
PC71
.1U_0402_16V7K
.1U_0402_16V7K
@PC71
@
12
0_0402_5%
0_0402_5%
DH_1.2V
VBST
TP
LX_1.2V
PR105
PR105
DL_1.2V
15.4K_0402_1%
15.4K_0402_1%
1 2
11
TRIP
VOUT3V5FILT
4
PR104
PR104
422_0603_1%
422_0603_1%
1 2
+5VALW
10
V5DRV
9
DRVL
6
12
PC74
PC74
13LL12
DRVH
EN_PSV
TON2VFB5PGOOD
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
PGND
8
GND
7
PC77
PR106
PR106
1 2
@PC77
@
47P_0402_50V8J
47P_0402_50V8J
1U_0603_10V6K
1U_0603_10V6K
1 2
12.1K_0402_1%
12.1K_0402_1%
12
PR107
20.5K_0402_1%
PR107
20.5K_0402_1%
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
BST_NB
LX_NB
DH_NB
PR97
PR97
DL_NB
15.4K_0402_1%
15.4K_0402_1%
PR94
PR94
0_0603_1%
0_0603_1%
1 2
14
PR92
PR92
255K_0402_1%
255K_0402_1%
4
1 2
PR93
PR93
33K_0402_1%
33K_0402_1%
15
1
PU6
PU6
PC62
PC62
12
1 2
SUSP#19,27,30,34,36,39
1 2
13LL12
11
TRIP
DRVH
VBST
TP
EN_PSV
VOUT3V5FILT
TON2VFB5PGOOD
4
.1U_0402_16V7K
.1U_0402_16V7K
PR96
PR96
422_0603_1%
422_0603_1%
1 2
+5VALW
9
10
DRVL
V5DRV
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
PGND
GND
6
PC68
1 2
@ PC68
@
47P_0402_50V8J
47P_0402_50V8J
12
PC65
PC65
1U_0603_10V6K
1U_0603_10V6K
8
7
PR98
PR98
1 2
9.53K_0402_1%
9.53K_0402_1%
12
PR99
20.5K_0402_1%
PR99
20.5K_0402_1%
PR102
PR102
PR100
PR100
1 2
255K_0402_1%
255K_0402_1%
5
D D
C C
B B
A A
5
Page 42

0.1
0.1
0.1
42 46Wednesday, February 25, 2009
42 46Wednesday, February 25, 2009
42 46Wednesday, February 25, 2009
+3VALW
PC90
1U_0603_6.3V6M
PC90
1U_0603_6.3V6M
1
12
1
LA-4971P
B+
1
1
PJ16
PJ16
2
JUMP_43X118@
JUMP_43X118@
2
51117_B+
2
12
12
PC79
PC79
PC78
PC78
8
7
5
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
4.7U_1206_25V6K
PQ33
PQ33
AO4466_SO8
AO4466_SO8
4
+1.8VP
PL9
PL9
1 2
12
1.8UH_SIL104R-1R8PF_9.5A_30%
1.8UH_SIL104R-1R8PF_9.5A_30%
1
2
3 6
PC81
PC81
1 2
0.1U_0603_25V7K
0.1U_0603_25V7K
1
8
7
5
+
+
PC82
PC82
4.7_1206_5%
4.7_1206_5%
PR111
PR111
PQ34
PQ34
AO4712_SO8
AO4712_SO8
+5VALW
2
12
4
220U_6.3VM_R15
220U_6.3VM_R15
PC84
PC84
1
2
3 6
PC86
PC86
4.7U_0805_10V6K
4.7U_0805_10V6K
12
680P_0603_50V7K
680P_0603_50V7K
PJ18
PJ18
112
JUMP_43X79@
JUMP_43X79@
5
6NC7NC8TP9
NC
VCNTL
GND2VREF
VIN
PU10
PU10
3
1
12
2
12
PC89
PC89
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
VOUT
4
PR117
PR117
1K_0402_1%
1K_0402_1%
+0.9VP
APL5331KAC-TRL_SO8
APL5331KAC-TRL_SO8
PC94
10U_0805_6.3V6M
PC94
10U_0805_6.3V6M
12
12
PC91
PC91
.1U_0402_16V7K
.1U_0402_16V7K
12
PR119
PR119
1K_0402_1%
1K_0402_1%
PQ36
SSM3K7002FU_SC70-3
PQ36
SSM3K7002FU_SC70-3
D
S
D
S
13
G
G
2
12
PC96
@PC96
@
PR121
PR121
0_0402_5%
0_0402_5%
1 2
.1U_0402_16V7K
.1U_0402_16V7K
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
1.8VP/0.9VP/1.5VSP2.5VSP
1.8VP/0.9VP/1.5VSP2.5VSP
1.8VP/0.9VP/1.5VSP2.5VSP
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Compal Secret Data
Compal Secret Data
Compal Secret Data
Date: Sheet of
Deciphered Date
Deciphered Date
Deciphered Date
2
BST_1.8VP
LX_1.8VP
DH_1.8VP
PR113
PR113
DL_1.8VP
15.4K_0402_1%
15.4K_0402_1%
PR110
PR110
0_0603_1%
0_0603_1%
1 2
3
14
PR108
PR108
255K_0402_1%
255K_0402_1%
4
5
1 2
PR109
PR109
0_0402_5%
0_0402_5%
1 2
SYSON27,34,36
15
1
PU8
PU8
PC80
@ PC80
@
12
1 2
13LL12
11
TRIP
DRVH
VBST
TP
EN_PSV
VOUT3V5FILT
TON2VFB5PGOOD
4
.1U_0402_16V7K
.1U_0402_16V7K
PR112
PR112
422_0603_1%
422_0603_1%
1 2
+5VALW
9
10
DRVL
V5DRV
TPS51117RGYR_QFN14_3.5x3.5
TPS51117RGYR_QFN14_3.5x3.5
PGND
GND
6
PC85
1 2
@ PC85
@
47P_0402_50V8J
47P_0402_50V8J
12
PC83
PC83
1U_0603_10V6K
1U_0603_10V6K
8
7
PR114
PR114
1 2
28.7K_0402_1%
28.7K_0402_1%
12
PR115
20.5K_0402_1%
PR115
20.5K_0402_1%
+3VS +1.8V
PJ17
PJ17
112
JUMP_43X79@
JUMP_43X79@
+5VALW
PC88
PC88
12
5
6NC7NC8TP9
NC
VCNTL
GND2VREF
VIN
PU9
PU9
3
1
12
2
PC87
PC87
1U_0603_6.3V6M
1U_0603_6.3V6M
VOUT
4
PR116
PR116
1.2K_0402_1%
1.2K_0402_1%
1 2
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
SYSON#36SUSP18,36
+1.5VSP
APL5331KAC-TRL_SO8
APL5331KAC-TRL_SO8
PC93
10U_0805_6.3V6M
PC93
10U_0805_6.3V6M
12
12
PC92
PC92
.1U_0402_16V7K
.1U_0402_16V7K
12
PR118
PR118
PQ35
PQ35
SSM3K7002FU_SC70-3
SSM3K7002FU_SC70-3
1K_0402_1%
1K_0402_1%
D
S
D
S
13
G
G
2
12
PC95
@PC95
@
PR120
PR120
0_0402_5%
0_0402_5%
1 2
SUSP
.1U_0402_16V7K
.1U_0402_16V7K
+2.5VSP
PC98
PC98
4.7U_0805_6.3V6K
4.7U_0805_6.3V6K
12
3
OUT
1
GND
PU11
PU11
IN
2
APL5508-25DC-TRL_SOT89-3
APL5508-25DC-TRL_SOT89-3
12
PC97
PC97
1U_0603_10V6K
1U_0603_10V6K
2
2
1
PJ19
JUMP_43X39@
PJ19
JUMP_43X39@
1
+3VS
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
3
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
D D
C C
B B
A A
Page 43

E
PL10
PL10
HCB4532KF-800T90_1812
HCB4532KF-800T90_1812
D
CPU_B+
C
B
A
B+
12
12
12
12
12
12
12
12
1 2
+
+
1
+
+
1
12
8
7
5
12
PC99
PC99
33P_0402_50V8K
33P_0402_50V8K
0.1U_0402_25V6
0.1U_0402_25V6
PC138
PC138
0.1U_0402_25V6
0.1U_0402_25V6
PC137
PC137
0.1U_0402_25V6
0.1U_0402_25V6
PC136
PC136
0.1U_0402_25V4K
0.1U_0402_25V4K
PC135
PC135
0.1U_0402_25V4K
0.1U_0402_25V4K
PC134
PC134
0.1U_0402_25V4K
0.1U_0402_25V4K
PC133
PC133
0.1U_0402_25V4K
0.1U_0402_25V4K
PC132
PC132
0.1U_0402_25V4K
0.1U_0402_25V4K
PC131
PC131
2
220U_25V_M
220U_25V_M
PC101
PC101
2
220U_25V_M
220U_25V_M
PC100
PC100
10U_1206_25V6M
10U_1206_25V6M
PC103
PC103
PQ37
PQ37
4
UGATE_NB
12
PC102
PC102
1000P_0402_50V7K
1000P_0402_50V7K
12
PR122
PR122
44.2K_0402_1%
44.2K_0402_1%
EMC
+VDDNBP
PC107
+
1
PL11
PL11
1 2
4.7U_LF919AS-4R7M-P3_5.2A_20%
4.7U_LF919AS-4R7M-P3_5.2A_20%
PR125
4.7_1206_5%
PR125
4.7_1206_5%
12
PQ38
8
7
5
PR124
PR124
2.2_0603_1%
2.2_0603_1%
BOOT_NB
PHASE_NB
12
PR126
PR126
22K_0402_1%
22K_0402_1%
12
PC105
PC105
0.1U_0603_16V7K
0.1U_0603_16V7K
PQ38
PC106
PC106
1 2
0.22U_0603_10V7K
0.22U_0603_10V7K
1 2
12
AO4466_SO8
AO4466_SO8
1
2
3 6
PC104
PC104
1000P_0402_50V7K
1000P_0402_50V7K
PR123
PR123
2_0603_5%
2_0603_5%
1 2
+5VS
220U_D2_4VM
+PC107
220U_D2_4VM
2
PC108
680P_0603_50V7K
PC108
680P_0603_50V7K
12
AO4712_SO8
AO4712_SO8
1
2
3 6
4
LGATE_NB
CPU_VDDNB_RUN_FB_H 6
PR130
PR130
12
PR129
PR129
0_0402_5%
0_0402_5%
PR128
PR128
2_0603_5%
2_0603_5%
1 2
CPU_B+
CPU_B+
LGATE_NB
PHASE_NB
12
9.09K_0402_1%
9.09K_0402_1%
12
PC109
PC109
+5VS +3VS
12
12
12
12
PQ39
PQ39
CPU_VDDNB_RUN_FB_L 6
12
UGATE_NB
PHASE_NB
PR133
PR133
0.1U_0603_25V7K
0.1U_0603_25V7K
PR132
105K_0402_1%@
PR132
105K_0402_1%@
12
PR131
0_0402_5%
PR131
0_0402_5%
12
12
12
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC170
PC170
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC169
PC169
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC111
PC111
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC110
PC110
TPCA8023-H_SO8
TPCA8023-H_SO8
4
UGATE0
0_0402_5%
0_0402_5%
37
38
39
40
41
42
43
44
45
46
47
48
PU12
PU12
PR137
PR137
12
PR135
10K_0402_1%@
PR135
10K_0402_1%@
PR134
PR134
105K_0402_1%
105K_0402_1%
+CPU_CORE_0
3
4
PL12
PL12
1
2
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
12
1
2
3 5
1 2
PC112
PC112
PR138
PR138
0_0603_1%
0_0603_1%
1 2
0.22U_0603_10V7K
0.22U_0603_10V7K
PHASE0
BOOT0
BOOT0
UGATE0
BOOT_NB
34
35
36
BOOT0
BOOT_NB
UGATE_NB
PHASE_NB
LGATE_NB
PGND_NB
OCSET_NB
RTN_NB
VSEN_NB
FSET_NB
COMP_NB
FB_NB
VCC
VIN
OFS/VFIXEN1PGOOD2SVC5ENABLE6OCSET
105K_0402_1%@
105K_0402_1%@
ISL6265_PWROK
PR140 0_0402_5%
PR140 0_0402_5%
PR139 0_0402_5%@PR139 0_0402_5%@
1 2
1 2
VGATE34
SB_PWRGD21,34
H_PWRGD6,20
PR143
PR143
3.65K_0402_1%
3.65K_0402_1%
PR141
4.7_1206_5%
PR141
4.7_1206_5%
PHASE0
33
PHASE0
UGATE0
PWROK3SVD
4
12
PR142
PR142
CPU_SVD6
CPU_SVC6
PC114
PC114
1 2
PC113
PC113
12
PQ41
PQ41
4
PQ40
@ PQ40
@
4
+5VS
LGATE0
31
32
PGND0
LGATE0
12
PR144
PR144
0_0402_5%
0_0402_5%
0_0402_5%
0_0402_5%
PR146
PR146
PR145
PR145
VR_ON34
12
680P_0603_50V7K
680P_0603_50V7K
4.02K_0402_1%
4.02K_0402_1%
113K_0402_1%
113K_0402_1%
ISN0
12
PR147
PR147
47K_0402_1%
47K_0402_1%
0.1U_0603_16V7K
0.1U_0603_16V7K
ISP0
CPU_B+
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
1
2
3 5
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
1
2
3 5
LGATE0
PC115
1U_0603_10V6K
PC115
1U_0603_10V6K
12
UGATE1
PHASE1
LGATE1
26
27
28
29
30
PVCC
PGND1
LGATE1
PHASE1
UGATE1
ISL6265HRTZ-T_QFN48_6X6
ISL6265HRTZ-T_QFN48_6X6
RBIAS7FB0
VDIFF0
8
9
11
10
12
12
1
PJ20
PJ20
2
BOOT1
25
BOOT1
VW012COMP0
1
2
JUMP_43X118@
JUMP_43X118@
1
1
2
PJ21
PJ21
2
+CPU_CORE_0 +CPU_CORE_1
12
12
12
12
PQ42
TPCA8023-H_SO8
PQ42
TPCA8023-H_SO8
TP
49
ISN1
24
ISP1
23
VW1
22
COMP1
21
FB1
20
VDIFF1
19
VSEN1
18
RTN1
17
RTN0
16
VSEN0
15
ISN0
14
ISP0
13
ISP0
+CPU_CORE_1
3
4
JUMP_43X118@
JUMP_43X118@
PL13
PL13
1
2
0.36UH_PCMC104T-R36MN1R17_30A_20%
0.36UH_PCMC104T-R36MN1R17_30A_20%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
PC172
PC172
1
2
3 5
PR152
PR152
PHASE1
RTN0
12
PR150
PR150
CPU_VDD0_RUN_FB_L6
PC118
PC118
1 2
0_0603_1%
0_0603_1%
1 2
BOOT1
RTN1
12
PR151 0_0402_5%
PR151 0_0402_5%
CPU_VDD1_RUN_FB_L6
12
0.22U_0603_10V7K
0.22U_0603_10V7K
PC171
PC171
PC117
PC117
PC116
PC116
4
UGATE1
ISN0
PR149
PR149
0_0402_5%
0_0402_5%
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
4.7U_0805_25V6-K
ISN1
ISP1
0_0402_5%
0_0402_5%
VSEN0
12
CPU_VDD0_RUN_FB_H6
PR156
3.65K_0402_1%
PR156
3.65K_0402_1%
PR155
4.7_1206_5%
PR155
4.7_1206_5%
1 2
10K_0402_1%
10K_0402_1%
PR173
@ PR173
@
+1.8V
12
PC120
PC120
1 2
PC119
680P_0603_50V7K
PC119
680P_0603_50V7K
12
PQ44
PQ44
4
PQ43
PQ43
4
VSEN1
12
PR157
PR157
0_0402_5%
0_0402_5%
CPU_VDD1_RUN_FB_H6
12
PR159
PR159
0.1U_0603_16V7K
0.1U_0603_16V7K
TPCA8028-H_SOP-ADVANCE8-5@
TPCA8028-H_SOP-ADVANCE8-5@
1
2
3 5
TPCA8028-H_SOP-ADVANCE8-5
TPCA8028-H_SOP-ADVANCE8-5
1
2
3 5
LGATE1
VW1
PC124
PC124
DIFF_1
PR161
PR161
VW0
PC121
PC121
DIFF_0
PR160
PR160
ISN1
47K_0402_1%
47K_0402_1%
ISP1
12
PR167
PR167
PC126
PC126
1000P_0402_50V7K
1000P_0402_50V7K
COMP1FB_1
12
PC125
PC125
180P_0402_50V8J
180P_0402_50V8J
12
4700P_0402_25V7K
4700P_0402_25V7K
PR165
PR165
12
255_0402_1%
255_0402_1%
12
PR164
PR164
PC123
PC123
1000P_0402_50V7K
1000P_0402_50V7K
COMP0
12
PC122
PC122
180P_0402_50V8J
180P_0402_50V8J
FB_0
12
4700P_0402_25V7K
4700P_0402_25V7K
PR162
PR162
12
255_0402_1%
255_0402_1%
12
6.81K_0402_1%
6.81K_0402_1%
12
PC128
PC128
1200P_0402_50V7K
1200P_0402_50V7K
12
PR166
PR166
54.9K_0402_1%
54.9K_0402_1%
12
12
1K_0402_5%
1K_0402_5%
12
6.81K_0402_1%
6.81K_0402_1%
12
PC127
PC127
1200P_0402_50V7K
1200P_0402_50V7K
12
PR163
PR163
54.9K_0402_1%
54.9K_0402_1%
12
12
1K_0402_5%
1K_0402_5%
0.1
0.1
0.1
43 46Wednesday, February 25, 2009
43 46Wednesday, February 25, 2009
43 46Wednesday, February 25, 2009
E
LA-4971P
+CPU_CORE
+CPU_CORE
+CPU_CORE
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
D
Deciphered Date
Deciphered Date
Deciphered Date
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
36.5K_0402_1%@
36.5K_0402_1%@
PR169
PR169
36.5K_0402_1%@
36.5K_0402_1%@
PR168
PR168
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
1 1
2 2
3 3
4 4
Page 44

Rev.
Rev.Rev.
Rev.
0.1
0.1
0.1
44 45Thursday, February 26, 2009
44 45Thursday, February 26, 2009
44 45Thursday, February 26, 2009
E
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
D
Compal Secret Data
Compal Secret Data
Compal Secret Data
2008/9/25 2009/9/25
2008/9/25 2009/9/25
2008/9/25 2009/9/25
LA-4971P
LA-4971P
LA-4971P
List History
List History
List History
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Custom
Custom
Custom
Deciphered Date
Deciphered Date
Deciphered Date
E
D
6. 2009/02/17 --> modify ADP_V too low situation. Add PR202 and change PD14 to unpop.
7. 2009/02/17 --> for noise solution : 1.change PL8 to 2.2uH molding. 2.change PC69, PC70 to 0805 size 4.7uF
add PC173 100uF. 3.change PC110, PC111, PC116, PC117 to 0805 size 4.7uF. 4.add PC169, PC170, PC171,
PC172 0805 size 4.7uF. 5.change PC101 to mount
Power circuit:
1. 2008/02/03 --> add +1.8V to CPU_VDD1_RUN_FB_L for Tigris platform
add PR173 10K unmount
2. 2008/02/03 --> add jump PJ20, PJ21 to connect +CPU_CORE_0 and +CPU_CORE_1 for Tigris platform
add PJ20, PJ21
3. 2008/02/03 --> remove PR148, PR153, PR154, PR158, HW already reserves these components
4. 2008/02/03 --> PU1 VCC issue, VCC later than input signals results in output pin drop
connect N1 to PU1 VCC
5. 2008/02/04 --> shift PR173 to pin17
C
B
57. 2009/02/09 --> change UG1's Value from TIS355AL3TR to TSH35TR
58. 2009/02/09 --> change UL3's P/N to SP050005V00
59. 2009/02/09 --> change R489 & R488 BOM structure
60. 2009/02/09 --> change R142 from 300 ohm to 150 ohm
61. 2009/02/09 --> change R143 from 1M ohm to 100K ohm
62. 2009/02/09 --> change JREAD footprint to TAITW_R009-125-LR_21P_RV-T
63. 2009/02/09 --> change C867 from 0.1u_0603 to 680pF_0402
64. 2009/02/09 --> change +HDMI_5V_OUT circuit, add D18, R160, Q26, R557, C876 and change power
65. 2009/02/11 --> change UG1 P/N to SA000039900
66. 2009/02/12 --> change CV2 to C706
67. 2009/02/12 --> change PCMCIA connector
68. 2009/02/12 --> remove WiMAX LED control circuit
69. 2009/02/17 --> remove Audio codec digital GND to analog GND net
70. 2009/02/17 --> add NPTH Hole H41, H42
71. 2009/02/17 --> change JTOUCH footprint
72. 2009/02/17 --> add CA12
Solution Description
Solution DescriptionSolution Description
Solution Description
Issue Description
Issue DescriptionIssue Description
Issue Description
Request
Owner
RequestRequest
Request
OwnerOwner
Owner
Date
DateDate
Date
73. 2009/02/17 --> change Int MIC ground to AGND between CA27 and J3
74. 2009/02/17 --> add JPOWER1 for co-lay
77. 2009/02/17 --> change JPOWER1 to JPWR1
78. 2009/02/23 --> change R70, R77 from 4.7K to 2.2K
79. 2009/02/23 --> change R178 from 4.7K to 47K
75. 2009/02/17 --> change NEWCARD power switch (UN1) to TI SA00001SL20
76. 2009/02/17 --> add CA45, CA46, CA47, CA48, CA49, CA50, CA51, CA52, CA53
76. 2009/02/17 --> replace RA12, RA13, RA14 with CA54, CA55, CA56 and add CA57
80. 2009/02/26 --> change SPI ROM from SST to MXIC
8. 2009/02/17 --> for common circuit. change 3/5V trip resistor PR80, PR81 to 150K
C
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
B
A
Title
TitleTitle
Title
Page#
Page#Page#
Page#
Version Change List ( P. I. R. List ) for Circuit
Version Change List ( P. I. R. List ) for CircuitVersion Change List ( P. I. R. List ) for Circuit
Version Change List ( P. I. R. List ) for Circuit
1. 2008/11/29 --> change SLP_CHG to SLP_CHG#
2. 2008/12/29 --> change HDMI_SCLK and HDMI_SDATA path circuit (add two MOSFETs)
3. 2008/12/29 --> connect HDPINT to pin 107 of EC, HDPACT to pin 110 of EC
4. 2008/12/29 --> Change 2nd source of G-sensor to new part
5. 2008/12/29 --> Change +3VALW to +3V_LAN soft-start circuit (R=4.7K ohm, C= 0.1uF )
6. 2008/12/29 --> Change +BT_VCC circuit (change BT_PWR from high active to low active in pin19 of EC)
7. 2008/12/29 --> Change +LCD_VDD circuit (change +3VALW to +3VS(R143) and add 0.1uF cap to +3VS)
8. 2008/12/29 --> add pull-down resistor R146 to BKOFF# to prevent backlight flash when power down
9. 2008/12/29 --> connect SHDN# of UG3 to +5VS and remove EC_HDPPD
Item
ItemItem
Item
1 1
10. 2008/12/29 --> connect PD of UG1 to GND and remove EC_HDPPD
11. 2008/12/29 --> Let 0G-DET of UG4 float
12. 2008/12/29 --> connect SLEEP# to +3VS_HDP and remove EC_HDPPD
13. 2008/12/29 --> Connect G-SELECT to GND
14. 2008/12/29 --> Connect pin10 of UG2 to GND and remove HDPPD
15. 2008/12/29 --> Add HDPLOC to pin14 of UG2
16. 2008/12/29 --> Change pin99 of EC from EC_HDPPD to USB_OC#2 and remove EC_HDPPD
17. 2008/12/29 --> Change pin107 of EC to HDPINT
18. 2008/12/29 --> Change pin110 of EC to HDPACT
19. 2008/12/29 --> Change pin114 of EC from USB_OC#2 to HDPLOC
20. 2008/12/29 --> add R689
21. 2009/01/13 --> change the footprint of L47, L48 and L49 to R_0402
22. 2009/01/19 --> add differential clock name CLK_CPU_BCLK_R & CLK_CPU_BCLK_R#
23. 2009/01/19 --> change 3 in 1 card reader connector to push-pull type
24. 2009/01/19 --> change the pin158 of MXM connector from GND to NC
2 2
25. 2009/01/19 --> add BOM structure of C1, C2 and C7 for Tigris
26. 2009/01/19 --> add R486, R487, R488, R489 & R27 for Tigris
27. 2009/01/19 --> add R497, R498, R499, R500 for tigris
28. 2009/01/19 --> add R29, R31 & R32 for Tigris
29. 2009/01/19 --> add C54 for Tigris
30. 2009/01/19 --> add R187 for Tigris
31. 2009/01/19 --> change RL2 from 10Kohm to 1Kohm suggested by vendor
32. 2009/01/19 --> change CL14 from 0.1uF to 1uF suggested by vendor
33. 2009/01/19 --> change RL4 from 100Kohm to 10Kohm suggested by vendor
34. 2009/01/19 --> remove kill switch and add R87
35. 2009/01/21 --> add card reader BTO
36. 2009/01/21 --> change Q33, Q34, Q139 & Q140 symbol
37. 2009/01/22 --> add +1.8V to CPU_VDD1_RUN_FB_L for Tigris platform (add PR173 10K unmount)
38. 2009/01/22 --> add jump PJ20, PJ21 to connect +CPU_CORE_0 and +CPU_CORE_1 for Tigris platform (add PJ20, PJ21)
39. 2009/01/22 --> remove PR148, PR153, PR154, PR158, HW already reserves these components
40. 2009/01/22 --> PU1 VCC issue, VCC later than input signals results in output pin drop (connect N1 to PU1 VCC)
41. 2009/02/02 --> add C182, C195, C196 for soft-start, change R441 to 47K ohm, change R19 to 47K ohm, change R140 to 47K ohm
42. 2009/02/02 --> change BT PWR from +5VS to +3VS(R432)
43. 2009/02/02 --> remove kill SW component, delete KILL_SW# on EC, connect WL_OFF# to JWLAN pin20 directly.
3 3
A
44. 2009/02/02 --> change +HDMI_5V_OUT circuit
45. 2009/02/03 --> change DA3~DA7 to SCA00000G00
46. 2009/02/03 --> change JREAD from TAITW_R009-135-LR_21P_RV-T to TAITW_R009-125-LR_RV
47. 2009/02/03 --> add J3 in int-MIC
48. 2009/02/04 --> change USB port of New card from port11 to port5
49. 2009/02/04 --> modify HDMI CEC power & related circuit.
50. 2009/02/05 --> add 3PCS Cap.=0.1uF_0402 (PC136 to PC138) on B+
51. 2009/02/05 --> add snubber circuit : PR155, PR141, PR111, PR103, PR95, PR170; PC119, PC113, PC84, PC75, PC66, PC129
52. 2009/02/05 --> change PR74 to 287K, PR75 to 499K
53. 2009/02/05 --> add C197 on +3VS and close to PQ20 (Place EMI confirm)
54. 2009/02/05 --> add C204 between +3VS with +5VALW and close to PQ20 (Place EMI confirm)
55. 2009/02/05 --> add D76, R966, R965 on LPC_FRAME#
56. 2009/02/09 --> change UG3
4 4
Page 45

0.1
0.1
0.1
45 45Wednesday, February 25, 2009
45 45Wednesday, February 25, 2009
45 45Wednesday, February 25, 2009
1
Compal Electronics, Inc.
Compal Electronics, Inc.
Compal Electronics, Inc.
Title
Title
Title
2009-09-252008-09-25
2009-09-252008-09-25
2009-09-252008-09-25
2
Compal Secret Data
Compal Secret Data
Compal Secret Data
PIR
PIR
PIR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Deciphered Date
Deciphered Date
Deciphered Date
1
2
< R3 for mass production BOM STRUCTURE >
RS880MN
3
U3
U3
RS880MN
< R1 for customer BOM STRUCTURE >
< Tigris >
4
U3
U3
RS780MN
RS880MC
U3
RS880MC R1RS880MCR1@
U3
RS880MN R1RS880MNR1@
RS880MN R1RS880MNR1@
RS880MC R1RS880MCR1@
U3
U3
RS880MC
RS780MN R3RS780MNR3@
RS780MN R3RS780MNR3@U3RS780MC R3RS780MCR3@
U3
RS780MC R3RS780MCR3@
U3
U3
RS780MC
RX881
RX881
RX781
U15
U15
RX881 R1RX881R1@
RX881 R1RX881R1@
U15
U15
RX781 R3RX781R3@
RX781 R3RX781R3@
SB710SB710
SB710 R1SB710R1@
SB710 R1SB710R1@
SB700R3SB700R3@
SB700R3SB700R3@
SB700
Issued Date
Issued Date
Issued Date
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Security Classification
Security Classification
Security Classification
Use MEMO : change UG1 R5F211B4D31SP (SA000037Y60) to R5F211B4D34SP (SA00003A600)
3
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
4
5
HW4 Product Improvement Record (P.I.R.)
< Liverpool & Sunderland >
D D
U3
U3
RS780MN
< R1 for customer BOM STRUCTURE > < R3 for mass production BOM STRUCTURE >
U3
U3
RS780MN R1RS780MNR1@
RS780MN R1RS780MNR1@
RS780MC R1RS780MCR1@
RS780MC R1RS780MCR1@
RS780MC
U3
U3
RX781
RX781 R1RX781R1@
RX781 R1RX781R1@
C C
U15
U15
SB700
SB700R1SB700R1@
SB700R1SB700R1@
PJP1
PJP1
DC-IN
< DC Jack >
PJP116inch_45@
PJP116inch_45@
PJP1
PJP1
DC-IN
B B
PJP117inch_45@
PJP117inch_45@
ZZZ
PCB 075 LA-4971P REV0.1 M/B
ZZZ
PCB 075 LA-4971P REV0.1 M/B
PCB
< PCB >
5
A A