Topstar H915G Schematic
5
4
3
2
1
Model Name: H915G
SHEETTITLE
DD
01
02
03
04
05
06
CC
07
08
09
10
11
12
13
BB
14
15
COVER SHEET
BLOCK DIAGRAM
BOM & PCB MODIFY HISTORY
P4_LGA775_A
P4_LGA775_B
P4_LGA775_C
P4_LGA775_D
VCORE POWER
GMCH-GRANTSDALE_HOST
GMCH-GARNTSDALE_DDR
GMCH-GRANTSDALE_PCI E, DMI
GMCH-GRANTSDALE_INT VGA
GMCH-GRANTSDALE_GND
GMCH-GRANTSDALE_PWR
DDR CHANNEL A
Revision 1.1
SHEETTITLE
23
24
25
26
27
28
29
30
31
CK410M CLOCK.
PCI SLOT 1, 2
PCI EXPRESS*1 SLOT 1,2,3
ITE8712HX
HWMO
IDE
KB_PS2
& IR
COM_LPT
USBFRONT
CONNECTOR
CPU_FAN & SYS_FAN32
33
34
35
36
37
ALC880 / ALC658
AUDIO JACK
AZALIA CODEC ALC880
ATX POWER CONN.
ALL POWER
16
17
18
19
20
21
AA
22
DDR CHANNEL B
DDR TERMINATION
PCI EXPRESS*16 SLOT
ICH6 PCI, USB, DMI, LAN
ICH6 IDE, GPIO, SATA, CTRL
ICH6 VCC, GND
FWH
5
4
38
39
40
41
42
43
44
3
POLY S/W
FRONT PANEL
REAR USB
CONNECTOR
ONBOARD LAN
RESERVED
RESERVED
COMPONENT SIDE
(1 oz. Copper)
VCC SIDE
(1 oz. Copper)
GND SIDE
(1 oz. Copper)
SOLDER SIDE
(1 oz. Copper)
2
ShenZhen Topstar Inductor
Page Name
Size
Project NameRev
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
Co.,Ltd
Cover Sheet
GDDR1
1 43Tuesday, December 28, 2004
1
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
4
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1
BLOCK DIAGRAM
DD
CLOCK GENERATOR
CKVDD = 3.3V
PAGE 19
INTEL Pentium4
LGA775
VCORE = 1.75V / SLEEP : 1.3V
VCC3
PAGE 4, 5, 6
VID0~4
PWM/OTHER POWER
VCORE = 1.75V (650-1100MHZ) / SLEEP : 1.3V
5VSB,-12V,+12V,VCC,VCC3,3VDUAL
VTT_DDR,2_5VSTR
PAGE 32,33,34
CHANNEL A
GAD0~31
ADSTB0,ADSTB0ADSTB1,ADSTB1-
PCI EXPRESS
BY 16 PORTS
VDDQ = 1.5V (AGP POWER 4X)
VCC3 = 3.3V
+12V = 12V
3VDUAL = 3.3V
VCC = 5V
CC
AGPUSB+ / -
PAGE 14
SBA0~7
SBSTB,SBSTB-
GCBE0~3ST0~2
GMCH
GRANTSDALE
VCORE = 1.75V / SLEEP : 1.3V
2_5VSTR = 2.5V(MEMORY)
VDDQ = 1.5V (AGP POWER 4X, HUBLINK)
HL0~10
CONTROL BUS
HUB LINK
PAGE 7 ,8 ,9,10
MAA0~14
MAA_CPC1~5
MAB_CPC1~5
MDD0~63
-DQSD0~7
DM0~7
ICH6
USB PORTS 0~7
VCC25 = 2.5V(I/O,MEMORY/I,VLINK/I)
3VDUAL = 3.3V(SUSPEND POWER)
VCC3 = 3.3V
RTCVDD = 3.3V
PAGE 15,16,17
AMRUSB+ / -
VCC = 5V
5VSB = 5V
5VUSB = 5V
PAGE 27
DDR SDRAM DIMM X 2
2_5VSTR = 2.5V(MEMORY,SUSPEND POWER)
VTT_DDR = 1.25V
PAGE 11
CHANNEL B
DDR SDRAM DIMM X 2
2_5VSTR = 2.5V(MEMORY,SUSPEND POWER)
VTT_DDR = 1.25V
PAGE 12
IDE Primary
VCC = 5V
PAGE 24
SERIAL ATA
VCC = 5V
PAGE 16
BB
PCI BUS
FWH/HWMO
PCI SLOT 1,2,3
+12 = 12V
-12 = -12V
VCC = 5V
VCC3 = 3V
3VDUAL = 3V
AC97/Azalia ALC880
+12V = 12V
VCC = 5V5VSB = 5V
AVDD = 5V
AA
AUDIO PORTS :
LIN_ OUT
TELE
CD_IN
LINE_IN
AUX_IN
5
FRONT AUDIO
PAGE 29
MIC
PAGE 30, 31
AC97 LINK
4
VCC = 5V
5VSB = 5V
+12 = 12V
PVCC = 5V
PCI EXPRESS BY 1
SLOT
PAGE 20, 21
KINNERTH-R/NORTHWAY
PAGE 35
FRONT PANEL /CPU FAN
PAGE 28
LPC BUS
3
VCC = 5V
VCC3 = 3V
LPC ITE8712HX
VCC = 5VVCC3 = 3.3V
VBAT = 3V
I/O PORTS :
COMB
COMA IR
LPT
2
PS2
FDD
PAGE 18, 23
PAGE 22
PAGE 25, 26
TOPSTAR DEVELOPER
ShenZhen Topstar Inductor
Co.,Ltd
Page Name
BOM & PCB MODIFY HISTORY
Size
Project NameRev
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
GDDR1
1
2 43Tuesday, December 28, 2004
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
4
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2
1
Model Name: H915G
Circuit or PCB layout change
for next version
Version: 1.1
PAGEChange ItemReason
DD
Component value change
history
DataChange ItemReason
CC
CHANGE CLOCK SOLUTION
CHANGE AUDIO TO AC97
change TESHI0 pull up
change LG775 PIN H29 NET "GTL_DET"
change GMCH "MCH_GTLREF" config
correct “-FPE” net
BB
AA
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Page Name
Size
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
5
4
3
2
the expressed written consent of TOPSTAR
Co.,Ltd
BOM & PCB MODIFY HISTORY
Project NameRev
GDDR1
3 43Tuesday, December 28, 2004
1
1.1
PDF created with pdfFactory trial version www.pdffactory.com
VCORE
5
4
3
2
1
BC1
10UF/X5R/6.3V
VCORE
DD
BC6
10UF/X5R/6.3V
CC
BB
BC2
10UF/X5R/6.3V
BC7
10UF/X5R/6.3V
BC3
10UF/X5R/6.3V
BC8
10UF/X5R/6.3V
BC4
10UF/X5R/6.3V
BC9
10UF/X5R/6.3V
HA[3..16]9
HA[17..31]9
BC5
10UF/X5R/6.3V
BC10
10UF/X5R/6.3V
HA[3..16]
HA[17..31]
U1A
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
-HREQ09
-HREQ19
-HREQ29
-HREQ39
-HREQ49
-HADSTB09
-HPCREQ9
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
-HADSTB19
-HREQ0
-HREQ1
-HREQ2
-HREQ3
-HREQ4
-HADSTB0
-HPCREQ
-HADSTB1
L5
A03#
P6
A04#
M5
A05#
L4
A06#
M4
A07#
R4
A08#
T5
A09#
U6
A10#
T4
A11#
U5
A12#
U4
A13#
V5
A14#
V4
A15#
W5
A16#
N4
RSVDA1
P5
RSVDA2
K4
REQ0#
J5
REQ1#
M6
REQ2#
K6
REQ3#
J6
REQ4#
R6
ADSTB0#
G5
PCREQ#
AB6
A17#
W6
A18#
Y6
A19#
Y4
A20#
AA4
A21#
AD6
A22#
AA5
A23#
AB5
A24#
AC5
A25#
AB4
A26#
AF5
A27#
AF4
A28#
AG6
A29#
AG4
A30#
AG5
A31#
AH4
A32#
AH5
A33#
AJ5
A34#
AJ6
A35#
AC4
RSVDA3
AE4
RSVDA4
AD5
ADSTB1#
LGA775
ADS#
BNR#
RSP#
BPRI#
DBSY#
DRDY#
HITM#
IERR#
INIT#
LOCK#
TRDY#
BINIT#
DEFER#
EDRDY#
MCERR#
AP0#
AP1#
BR0#
TESTHI08
TESTHI09
TESTHI10
DP0#
DP1#
DP2#
DP3#
GTLREF
RESET#
RS0#
RS1#
RS2#
HIT#
-HADS
D2
-BNR
C2
-HIT
D4
H4
-BPRI
G8
-DBSY
B2
-DRDY
C1
-HITM
E4
-IERR
AB2
-HINIT
P3
-HLOCK
C3
-HTRDY
E3
AD3
-DEFER
G7
-EDRDY
F2
AB3
U2
U3
-BR0
F3
TESTHI8
G3
TESTHI9
G4
TESTHI10
H5
J16
H15
H16
J17
GTLREF
H1
-CPURST
G23
-RS0
B3
-RS1
F5
-RS2
A3
*
220PF
-HADS 9
-BNR 9
-HIT 9
-BPRI 9
-DBSY 9
-DRDY 9
-HITM 9
-HLOCK 9
-HTRDY 9
-DEFER 9
-EDRDY 9
-BR0 9
C1
-RS0 9
-RS1 9
-RS2 9
C2
33PF
C4
20PF
-HINIT20
-CPURST 9
VTT_OL
VTT_OL
VTT_GMCH
VTT_OL
VTT_OR
BC11
0.01UF/X7R
R1
49.9,1%
Closed to
Pin-H1
R2
100,1%
R362
R462
R562
R662
R762
R862
C3
1UF/Y5V/10V
TESTHI8
TESTHI9
TESTHI10
-IERR
-BR0
-CPURST
GTLREF
VCORE
BC12
10UF/X5R/6.3V
VCORE
BC16
10UF/X5R/6.3V
AA
VCORE
BC30
10UF/X5R/6.3V
BC13
10UF/X5R/6.3V
BC17
10UF/X5R/6.3V
BC31
10UF/X5R/6.3V
BC14
10UF/X5R/6.3V
BC18
10UF/X5R/6.3V
5
BC15
10UF/X5R/6.3V
BC19
10UF/X5R/6.3V
BC20
10UF/X5R/6.3V
VCORE
10UF/X5R/6.3V
VCORE
10UF/X5R/6.3V
NS
BC21
BC25
BC22
10UF/X5R/6.3V
BC26
10UF/X5R/6.3V
NS
4
BC23
10UF/X5R/6.3V
BC27
10UF/X5R/6.3V
BC24
10UF/X5R/6.3V
BC28
10UF/X5R/6.3V
BC29
10UF/X5R/6.3V
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Page Name
Size
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
3
2
the expressed written consent of TOPSTAR
Co.,Ltd
Project NameRev
P4_LGA775-A
GDDR1
1
4 43Tuesday, December 28, 2004
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
4
3
2
1
Note:
VCCA & VCOREPLL
3
2N7002
2
TESTHI0
12
0.1UFC374
define doesn't same as
old P4 design kit
+
100UF
R17
EC5
0
As close as possible to
CPU socket
VCCA
VSSA
VCOREPLL
CPU_TEMP26,27
THERMDC26
BC34
1000PF
Trace width doesn't
less than 12 Mil
C9
1000PF
-SMI20
-A20M20
-FERR20
INTR20
NMI20
-IGNNE20
-STPCLK20
VID[0..5]
VID[0..5]8
CPUCLK23
-CPUCLK23
VCC_SENSE8
VSS_SENSE8
CPUCLK
-CPUCLK
R31 0
R32 0
VTT_GMCH
L1
VCC3
10UH/8/S
L2
10UH/8/S
GTL_DET[7,9]
R680110,1%
0.1UF
1 2
C375
DD
CC
C6
1UF/Y5V/10V
C7
1UF/Y5V/10V
R68161.9,1%
BC33
10UF/X5R/6.3V
NS
VCC3
R827249,1%
1
-SMI
-A20M
-FERR
INTR
NMI
-IGNNE
-STPCLK
VCCA
VSSA
VCOREPLL
VID0
VID1
VID2
VID3
VID4
VID5
-CPURST4,9
ITPCLK23
-ITPCLK23
A23
B23
D23
C23
AM2
AL5
AM3
AL6
AK4
AL4
AM5
F28
G28
AE8
AL1
AK1
AN3
AN4
AN5
AN6
F29
P2
SMI#
K3
A20M#
R3
FERR#/PBE#
K1
LINT0
L1
LINT1
N2
IGNNE#
M3
STPCLK#
VCCA
VSSA
RSVDC1
VCCIOPLL
VID0
VID1
VID2
VID3
VID4
VID5
RSVDC2
BCLK0
BCLK1
SKTOCC#
THERMDA
THERMDC
VCC_SENSE
VSS_SENSE
RSVDC3
RSVDC4
VTT_PKGSENSE
H_ITPCLK
-H_ITPCLK
U1C
Intel SCH update
LGA775
U1D
BB
VTT_OR
5
-ITP_RST
TDO
TDI
TMS
TCK
-TRST
SMBCLK15,16,18,20,23,24,25,41
SMBDATA15,16,18,20,23,24,25,41
AA
-BPM5
-BPM4
-BPM3
-BPM2
-BPM1
-BPM0
BSEL0
BSEL1
BSEL2
VTT_OR
XDP_412
XDP_612
XDP_1812
XDP_2812
MTYPE12
EXP_SLR12
XDP_3612
4
-SYS_RST20,39
TCK
TDI
TDO
TMS
-TRST
-BPM0
-BPM1
-BPM2
-BPM3
-BPM4
-BPM5
-SYS_RST
H_ITPCLK
-H_ITPCLK
FSBSEL0
FSBSEL1
FSBSEL2
FSBSEL023
FSBSEL123
FSBSEL223
AE1
TCK
AD1
TDI
AF1
TDO
AC1
TMS
AG1
TRST#
AJ2
BPM0#
AJ1
BPM1#
AD2
BPM2#
AG2
BPM3#
AF2
BPM4#
AG3
BPM5#
AC2
DBR#
AK3
ITPCLK0
AJ3
ITPCLK1
G29
BSEL0
H30
BSEL1
G30
BSEL2
LGA775
FSBSEL0BSEL0
FSBSEL1BSEL1
FSBSEL2BSEL2
R5310K
R5410K
R5510K
3
TESTHI00
TESTHI01
TESTHI11
TESTHI12
TESTHI02
TESTHI03
TESTHI04
TESTHI05
TESTHII06
TESTHI07
RSVDC5
RSVDC6
SLP#
RSVDC7
PWRGOOD
PROCHOT#
THERMTRIP#
COMP0
COMP1
COMP2
COMP3
RSVDC8
RSVDC9
RSVDC10
RSVDC11
RSVDC12
RSVDC13
N/CC1
N/CC2
N/CC3
N/CC4
N/CC5
N/CC6
BOOTSELECT
LL_ID0
LL_ID1
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTTPWRGD
VTT_OUT1
VTT_OUT2
VTT_SEL
-ITP_RST
ITP_CLKP
-ITP_CLKN
A29
B25
B29
B30
C29
A26
B27
C28
A25
A28
A27
C30
A30
C25
C26
C27
B26
D27
D28
D25
D26
B28
D29
D30
AM6
AA1
J1
F27
F26
W3
P1
W2
F25
G25
G27
G26
G24
F24
AK6
G6
L2
AH2
N1
AL2
M2
A13
T1
G2
R1
N5
AE6
C9
G10
D16
A20
E23
E24
F23
H2
J2
J3
Y1
V2
AA2
R50 0
R51 0
R521K
BSEL012
BSEL112
BSEL212
TESTHI0
TESTHI1
TESTHI11
TESTHI12
TESTHI2_7
RSVD_AK6
RSVD_G6
-CPUSLP
CPUPWROK
-PROCHOT
-THRMTRIP
COMP0
COMP1
COMP2
COMP3
BOOTSEL
LL_ID0
VTT_GMCH
NS
-CPUSLP20
CPUPWROK20
-THRMTRIP20
LL_ID0 8
VTT_PWRGD37
VTT_OR
VTT_OL
VCC3
-PROCHOT32
2
Locate at ICH6 Side
Page Name
Size
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
Place outside of CPU socket
VTT_OL
C5
0.1UF/Y5V/50V
VTT_GMCH
VTT_OL
VTT_OR
C304
0.1UF/Y5V/50V
C305
0.1UF/Y5V/50V
Project NameRev
R10100,1%
R11100,1%
R1460.4,1%
R1560.4,1%
R19470
R20470
R21470
R2262
R2462
R2562
R2662
R2762Q86
R2862
R2962
R30100
RN1680/8P4R
7 8
5 6
3 4
1 2
R33680
R34680
R35120
R3662
R3762
R3851
R3951
R4051
R4151
R4251
R4351
R4451
R4551
R4651
R4851
R4951
C10
33PF
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Co.,Ltd
P4_LGA775-B
GDDR1
NS
-CPUSLP
NS
NS
NS
1
COMP2
COMP3
COMP0
COMP1
FSBSEL0
FSBSEL1
FSBSEL2
TESTHI2_7
-THRMTRIP
-FERR
RSVD_G6
TESTHI12
TESTHI11
TESTHI1
CPUPWROK
C8
1000PF
VID5
VID2
VID0
VID4
VID1
VID3
-PROCHOT
BOOTSEL
RSVD_AK6
-BPM5
-BPM4
-BPM0
-BPM1
-BPM2
-BPM3
TMS
TDI
TDO
-TRST
TCK
5 43Tuesday, December 28, 2004
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
DD
4
3
2
1
HD[0..15]9
CC
HD[16..31]9
BB
HD[0..15]
HD[16..31]
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8
HD9
HD10
HD11
HD12
HD13
HD14
HD15
-DBI0
-DBI09
STBN09
STBP09
STBN19
STBP19
STBN0
STBP0
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
-DBI1
-DBI19
STBN1
STBP1
U1B
B4
D00#
C5
D01#
A4
D02#
C6
D03#
A5
D04#
B6
D05#
B7
D06#
A7
D07#
A10
D08#
A11
D09#
B10
D10#
C11
D11#
D8
D12#
B12
D13#
C12
D14#
D11
D15#
A8
DBI0#
C8
DSTBN0#
B9
DSTBP0
G9
D16#
F8
D17#
F9
D18#
E9
D19#
D7
D20#
E10
D21#
D10
D22#
F11
D23#
F12
D24#
D13
D25#
E13
D26#
G13
D27#
F14
D28#
G14
D29#
F15
D30#
G15
D31#
G11
DBI1#
G12
DSTBN1#
E12
DSTBP1
LGA775
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#
DBI2#
DSTBN2#
DSTBP2
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DBI3#
DSTBN3#
DSTBP3
HD32
G16
HD33
E15
HD34
E16
HD35
G18
HD36
G17
HD37
F17
HD38
F18
HD39
E18
HD40
E19
HD41
F20
HD42
E21
HD43
F21
HD44
G21
HD45
E22
HD46
D22
HD47
G22
-DBI2
D19
G20
G19
D20
D17
A14
C15
C14
B15
C18
B16
A17
B18
C21
B21
B19
A19
A22
B22
C20
A16
C17
STBN2
STBP2
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63
-DBI3
STBN3
STBP3
-DBI2 9
STBN2 9
STBP2 9
-DBI3 9
STBN3 9
STBP3 9
HD[32..47] 9
HD[48..63] 9
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5
DD
U1E
VCORE
CC
BB
AC23
AC24
AC25
AC26
AC27
AC28
AC29
AC30
AC8
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD8
AE11
AE12
AE14
AE15
AE18
AE19
AE21
AE22
AE23
AF11
AF12
AF14
AF15
AF18
AF19
AF21
AF22
AG11
AG12
AG14
AG15
AG18
AG19
AG21
AG22
AG25
AG26
AG27
AG28
AG29
AG30
AG8
AG9
AA8
VCC
AB8
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AE9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AF8
VCC
AF9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
LGA775
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AH11
AH12
AH14
AH15
AH18
AH19
AH21
AH22
AH25
AH26
AH27
AH28
AH29
AH30
AH8
AH9
AJ11
AJ12
AJ14
AJ15
AJ18
AJ19
AJ21
AJ22
AJ25
AJ26
AJ8
AJ9
AK11
AK12
AK14
AK15
AK18
AK19
AK21
AK22
AK25
AK26
AK8
AK9
AL11
AL12
AL14
AL15
AL18
AL19
AL21
AL22
AL25
AL26
AL29
AL30
AL8
AL9
VCORE
VCORE
4
U1F
AM11
AM12
AM14
AM15
AM18
AM19
AM21
AM22
AM25
AM26
AM29
AM30
AN11
AN12
AN14
AN15
AN18
AN19
AN21
AN22
AN25
AN26
AN29
AN30
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AM8
VCC
AM9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
AN8
VCC
AN9
VCC
J10
VCC
J11
VCC
J12
VCC
J13
VCC
J14
VCC
J15
VCC
J18
VCC
J19
VCC
J20
VCC
J21
VCC
J22
VCC
J23
VCC
J24
VCC
J25
VCC
J26
VCC
J27
VCC
J28
VCC
J29
VCC
J30
VCC
J8
VCC
J9
VCC
K23
VCC
K24
VCC
K25
VCC
K26
VCC
K27
VCC
K28
VCC
K29
VCC
K30
VCC
K8
VCC
L8
VCC
M23
VCC
M24
VCC
M25
VCC
M26
VCC
M27
VCC
M28
VCC
M29
VCC
M30
VCC
M8
VCC
LGA775
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
EMPAE3
EMPTB13
EMPTD1
EMPTD14
EMPTE5
EMPTE6
EMPTE7
EMPTF6
EMPTT2
EMPTV1
EMPTW1
EMPTY3
N23
N24
N25
N26
N27
N28
N29
N30
N8
P8
R8
T23
T24
T25
T26
T27
T28
T29
T30
T8
U23
U24
U25
U26
U27
U28
U29
U30
U8
V8
W23
W24
W25
W26
W27
W28
W29
W30
W8
Y23
Y24
Y25
Y26
Y27
Y28
Y29
Y30
Y8
AE3
B13
D1
D14
E5
E6
E7
F6
T2
V1
W1
Y3
VCORE
3
U1G
A12
AA23
AA24
AA25
AA26
AA27
AA28
AA29
AA30
AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30
AC3
AC6
AC7
AD4
AD7
AE10
AE13
AE16
AE17
AE20
AE24
AE25
AE26
AE27
AE28
AE29
AE30
AF10
AF13
AF16
AF17
AF20
AF23
AF24
AF25
AF26
AF27
AF28
AF29
AF30
VSS
A15
VSS
A18
VSS
A2
VSS
A21
VSS
A24
VSS
A6
VSS
A9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AA3
VSS
VSS
AA6
VSS
AA7
VSS
AB1
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AB7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE5
VSS
AE7
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF3
VSS
VSS
AF6
VSS
AF7
VSS
LGA775
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AG10
AG13
AG16
AG17
AG20
AG23
AG24
AG7
AH1
AH10
AH13
AH16
AH17
AH20
AH23
AH24
AH3
AH6
AH7
AJ10
AJ13
AJ16
AJ17
AJ20
AJ23
AJ24
AJ27
AJ28
AJ29
AJ30
AJ4
AJ7
AK10
AK13
AK16
AK17
AK2
AK20
AK23
AK24
AK27
AK28
AK29
AK30
AK5
AK7
AL10
AL13
AL16
AL17
AL20
AL23
AL24
AL27
AL28
AL3
AL7
AM1
AM10
AM13
AM16
AM17
AM20
AM23
AM24
AM27
AM28
AM4
AM7
2
U1H
AN1
VSS
AN10
VSS
AN13
VSS
AN16
VSS
AN17
VSS
AN2
VSS
AN20
VSS
AN23
VSS
AN24
VSS
AN27
VSS
AN28
VSS
AN7
VSS
B1
VSS
B11
VSS
B14
VSS
B17
VSS
B20
VSS
B24
VSS
B5
VSS
B8
VSS
C10
VSS
C13
VSS
C16
VSS
C19
VSS
C22
VSS
C24
VSS
C4
VSS
C7
VSS
D12
VSS
D15
VSS
D18
VSS
D21
VSS
D24
VSS
D3
VSS
D5
VSS
D6
VSS
D9
VSS
E11
VSS
E14
VSS
E17
VSS
E2
VSS
E20
VSS
E25
VSS
E26
VSS
E27
VSS
E28
VSS
E29
VSS
E8
VSS
F10
VSS
F13
VSS
F16
VSS
F19
VSS
F22
VSS
F4
VSS
F7
VSS
G1
VSS
H10
VSS
H11
VSS
H12
VSS
H13
VSS
H14
VSS
H17
VSS
H18
VSS
H19
VSS
H20
VSS
H21
VSS
H22
VSS
H23
VSS
H24
VSS
LGA775
1
GTL_DET[5,9]
H25
VSS
H26
VSS
H27
VSS
H28
VSS
H29
VSS
H3
VSS
H6
VSS
H7
VSS
H8
VSS
H9
VSS
J4
VSS
J7
VSS
K2
VSS
K5
VSS
K7
VSS
L23
VSS
L24
VSS
L25
VSS
L26
VSS
L27
VSS
L28
VSS
L29
VSS
L3
VSS
L30
VSS
L6
VSS
L7
VSS
M1
VSS
M7
VSS
N3
VSS
N6
VSS
N7
VSS
P23
VSS
P24
VSS
P25
VSS
P26
VSS
P27
VSS
P28
VSS
P29
VSS
P30
VSS
P4
VSS
P7
VSS
R2
VSS
R23
VSS
R24
VSS
R25
VSS
R26
VSS
R27
VSS
R28
VSS
R29
VSS
R30
VSS
R5
VSS
R7
VSS
T3
VSS
T6
VSS
T7
VSS
U1
VSS
U7
VSS
V23
VSS
V24
VSS
V25
VSS
V26
VSS
V27
VSS
V28
VSS
V29
VSS
V3
VSS
V30
VSS
V6
VSS
V7
VSS
W4
VSS
W7
VSS
Y2
VSS
Y5
VSS
Y7
VSS
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4
3
2
1
HA[3..31]
DD
CC
BB
U9_U
-HREQ04
-HREQ14
-HREQ24
-HREQ34
-HREQ44
-HADSTB04
-HADSTB14
STBP06
STBN06
STBP16
STBN16
STBP26
STBN26
STBP36
STBN36
-HADS4
-BNR4
-CPURST4
-DBSY4
-DEFER4
-DRDY4
-EDRDY4
-HITM4
-HLOCK4
-HPCREQ4
-HTRDY4
HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
-HREQ0
-HREQ1
-HREQ2
-HREQ3
-HREQ4
-HADSTB0
-HADSTB1
STBP0
STBN0
-DBI0
-DBI06
STBP1
STBN1
-DBI1
-DBI16
STBP2
STBN2
-DBI2
-DBI26
STBP3
STBN3
-DBI3
-DBI36
-HADS
-BNR
-BPRI
-BPRI4
-BR0
-BR04
-CPURST
-DBSY
-DEFER
-DRDY
-EDRDY
-HIT
-HIT4
-HITM
-HLOCK
-HPCREQ
-RS0
-RS04
-RS1
-RS14
-RS2
-RS24
-HTRDY
U9_U
H29
K29
J29
G30
G32
K30
L29
M30
L31
L28
J28
K27
K33
M28
R29
L26
N26
M26
N31
P26
N29
P28
R28
N33
T27
T31
U28
T26
T29
F33
E32
H31
G31
F31
J31
N27
E33
E35
E34
H26
F26
J26
J19
F19
K19
B29
C29
B26
M31
M35
E30
R33
G24
L35
J35
M32
P33
L34
N35
L33
E31
K34
P34
J32
N34
U9A
HA3*
HA4*
HA5*
HA6*
HA7*
HA8*
HA9*
HA10*
HA11*
HA12*
HA13*
HA14*
HA15*
HA16*
HA17*
HA18*
HA19*
HA20*
HA21*
HA22*
HA23*
HA24*
HA25*
HA26*
HA27*
HA28*
HA29*
HA30*
HA31*
HREQ0*
HREQ1*
HREQ2*
HREQ3*
HREQ4*
HADSTB0*
HADSTB1*
HDSTBP0
HDSTBN0*
HDINV0*
HDSTBP1
HDSTBN1*
HDINV1*
HDSTBP2
HDSTBN2*
HDINV2*
HDSTBP3
HDSTBN3*
HDINV3*
HADS*
HBNR*
HBPRI*
HBREQ0*
HCPURST*
HDBSY*
HDEFER*
HDRDY*
HEDRDY*
HHIT*
HHITM*
HLOCK*
HPCREQ*
HRS0*
HRS1*
HRS2
HTRDY*
CPU INTERFACE
GRANTSDALE_0
HD0*
HD1*
HD2*
HD3*
HD4*
HD5*
HD6*
HD7*
HD8*
HD9*
HD10*
HD11*
HD12*
HD13*
HD14*
HD15*
HD16*
HD17*
HD18*
HD19*
HD20*
HD21*
HD22*
HD23*
HD24*
HD25*
HD26*
HD27*
HD28*
HD29*
HD30*
HD31*
HD32*
HD33*
HD34*
HD35*
HD36*
HD37*
HD38*
HD39*
HD40*
HD41*
HD42*
HD43*
HD44*
HD45*
HD46*
HD47*
HD48*
HD49*
HD50*
HD51*
HD52*
HD53*
HD54*
HD55*
HD56*
HD57*
HD58*
HD59*
HD60*
HD61*
HD62*
HD63*
HXSWING
HXSCOMP
HXRCOMP
HVREF
HCLKINP
HCLKINN
HD0
J33
HD1
H33
HD2
J34
HD3
G35
HD4
H35
HD5
G34
HD6
F34
HD7
G33
HD8
D34
HD9
C33
HD10
D33
HD11
B34
HD12
C34
HD13
B33
HD14
C32
HD15
B32
HD16
E28
HD17
C30
HD18
D29
HD19
H28
HD20
G29
HD21
J27
HD22
F28
HD23
F27
HD24
E27
HD25
E25
HD26
G25
HD27
J25
K25
HD29
L25
HD30
L23
HD31
K23
HD32
J22
HD33
J24
HD34
K22
HD35
J21
HD36
M21
HD37
H23
HD38
M19
HD39
K21
HD40
H20
HD41
H19
HD42
M18
HD43
K18
HD44
K17
HD45
G18
HD46
H18
HD47
F17
HD48
A25
HD49
C27
HD50
C31
HD51
B30
HD52
B31
HD53
A31
HD54
B27
HD55
A29
HD56
C28
HD57
A28
HD58
C25
HD59
C26
HD60
D27
HD61
A27
HD62
E24
HD63
B25
HSWNG
A23
HSCOMP
D24
HRCOMP
B23
MCH_GTLREF
A24
MCHCLK
M23
-MCHCLK
M22
HD[0..63]
MCHCLK23
-MCHCLK23
HD[0..63] 6HA[3..31]4
VTT_GMCH
BC43
0.01UF/X7R
VTT_GMCH
R114
301,1%
R115
102
VTT_GMCH
HSWNGHD28
R116
60.4,1%
HSCOMP
C36
5PF
NS
HRCOMP
R117
20,1%
R112
49.9,1%
R113
100,1%
C35
0.01UF/X7R
GTL_DET[5,7]
MCH_GTLREF
BC44
0.1UF/Y5V/50V
C34
220PF
+12V
R829
8.2K,5% Q73
VCORE
R828619,1%
1
3
2
MCH_GTLREF
2N7002
U9_HT
U_FAN
AA
5
U9_U
HEATSINK
U_FAN
U_FAN
U9_U
U_FAN
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5
AN22
AP22
AN21
AP21
AM21
AP19
AR20
AN16
AN18
AM15
AN23
AP15
AP13
AN31
AP31
AL34
AN29
AN28
AP26
AR23
AM34
AL35
AK34
AL33
AL12
AN11
AP11
AR11
AP33
AR24
AR28
AR29
AM24
AN25
AB34
AC33
AP25
AN26
AC35
AC34
AB33
AH15
AE16
AJ12
AK12
AN2
AN3
AM2
AM3
AE7
1
2
3
4
5
6
7
8
U9E
SAMA0
SAMA1
SAMA2
SAMA3
SAMA4
SAMA5
SAMA6
SAMA7
SAMA8
SAMA9
SAMA10
SAMA11
SAMA12
RSVE6
SAWE*
SACAS*
SARAS*
SABA0
SABA1
RSVE5
SACS0*
SACS1*
SACS2*
SACS3*
SACKE0
SACKE1
SACKE2
SACKE3
RSVE1
RSVE2
RSVE3
RSVE4
SACK0
SACK0*
SACK1
SACK1*
SACK2
SACK2*
SACK3
SACK3*
SACK4
SACK4*
SACK5
SACK5*
SADDR1MA13
RSV_TP1
RSV_TP0
SMXSLEWIN0
SMXSLEWOUT0
SMVREF0
1
2
3
4
5
6
7
8
DDR INTERFACE
GRANTSDALE_0
MAAA0
MAAA1
MAAA2
MAAA3
MAAA4
-SCASA15,17
-SRASA15,17
-SWEA15,17
SBAA015,17
SBAA115,17
-CSA015,17
-CSA115,17
-CSA215,17
-CSA315,17
CKEA015,17
CKEA115,17
CKEA215,17
CKEA315,17
MAAA5
MAAA6
MAAA7
MAAA8
MAAA9
MAAA10
MAAA11
MAAA12
-SWEA
-SCASA
-SRASA
SBAA0
SBAA1
-CSA0
-CSA1
-CSA2
-CSA3
CKEA0
CKEA1
CKEA2
CKEA3
DCLKA0
-DCLKA0
DCLKA1
-DCLKA1
DCLKA2
-DCLKA2
DCLKA3
-DCLKA3
DCLKA4
-DCLKA4
DCLKA5
-DCLKA5
MAAA13
TP2
TP4
SM_XSLEWIN
DDRVREFA
SC5
0.1UF/Y5V/50V
NS
DD
CC
DCLKA015
-DCLKA015
DCLKA115
-DCLKA115
DCLKA215
-DCLKA215
DCLKA315
-DCLKA315
DCLKA415
-DCLKA415
DCLKA515
-DCLKA515
BB
AA
5
SADQS0
RSVE8
SADM0
SADQ0
SADQ1
SADQ2
SADQ3
SADQ4
SADQ5
SADQ6
SADQ7
SADQS1
RSVE7
SADM1
SADQ8
SADQ9
SADQ10
SADQ11
SADQ12
SADQ13
SADQ14
SADQ15
SADQS2
RSVE9
SADM2
SADQ16
SADQ17
SADQ18
SADQ19
SADQ20
SADQ21
SADQ22
SADQ23
SADQS3
RSVE10
SADM3
SADQ24
SADQ25
SADQ26
SADQ27
SADQ28
SADQ29
SADQ30
SADQ31
SADQS4
RSVE11
SADM4
SADQ32
SADQ33
SADQ34
SADQ35
SADQ36
SADQ37
SADQ38
SADQ39
SADQS5
RSVE12
SADM5
SADQ40
SADQ41
SADQ42
SADQ43
SADQ44
SADQ45
SADQ46
SADQ47
SADQS6
RSVE13
SADM6
SADQ48
SADQ49
SADQ50
SADQ51
SADQ52
SADQ53
SADQ54
SADQ55
SADQS7
RSVE14
SADM7
SADQ56
SADQ57
SADQ58
SADQ59
SADQ60
SADQ61
SADQ62
SADQ63
4
4
AG1
AG2
AF2
AE3
AF3
AH2
AJ2
AE2
AE1
AG3
AH3
AL3
AL2
AL1
AJ1
AK2
AN4
AP4
AJ3
AK3
AP2
AP3
AP7
AR7
AN7
AP5
AR5
AN8
AP9
AN5
AP6
AR8
AN9
AF17
AG17
AH16
AK16
AL17
AD17
AF19
AF16
AJ17
AE19
AH18
AM30
AL29
AK29
AH27
AK27
AN30
AK31
AL27
AJ28
AL30
AL31
AG35
AG33
AG34
AJ34
AH35
AG32
AF34
AJ33
AH33
AF33
AE33
AA34
AA35
AA33
AE35
AE34
Y33
W34
AD31
AD35
AA32
Y35
U34
U35
U33
V34
V33
R32
R34
W35
W33
T33
T35
DQSA0
DMA0
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
DQSA1
DMA1
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
DQSA2
DMA2
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
DQSA3
DMA3
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
DQSA4
DMA4
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
DQSA5
DMA5
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
DQSA6
DMA6
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
DQSA7
DMA7
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
SC6
0.1UF/Y5V/50V
NS
3
AM18
AP18
AN17
AR16
AR15
AN15
AP17
AL15
AP14
AN13
AN20
AR12
AM12
AL24
AR27
AN27
AP27
AM27
AR19
AP23
AP34
AN34
AN33
AM33
AN10
AP10
AN32
AP29
AP30
AP32
AH22
AG23
AL11
AJ11
AE26
AE25
AL23
AK22
AD29
AD28
AD32
AK15
AN14
AE10
AM9
AR9
AK9
AL9
AF9
AE8
AG8
AG4
AE5
AF5
U9F
SBMA0
SBMA1
SBMA2
SBMA3
SBMA4
SBMA5
SBMA6
SBMA7
SBMA8
SBMA9
SBMA10
SBMA11
SBMA12
RSVAL24
SBWE*
SBCAS*
SBRAS*
SBBA0
SBBA1
RSVAP23
SBCS0*
SBCS1*
SBCS2*
SBCS3*
SBCKE0
SBCKE1
SBCKE2
SBCKE3
RSVAN32
RSVAP29
RSVAP30
RSVAP32
SBCK0
SBCK0*
SBCK1
SBCK1*
SBCK2
SBCK2*
SBCK3
BLCK3*
SBCK4
SBCK4*
SBCK5
SBCK5*
SBDDR1MA13
RSV_TP3
RSV_TP2
SMYSLEWIN1
SMYSLEWOUT1
SMVREF1
SMRCOMP1
SMRCOMP0
RSVAE5
RSVAF5
SBDQS0
RSVAL4
SBDM0
SBDQ0
SBDQ1
SBDQ2
SBDQ3
SBDQ4
SBDQ5
SBDQ6
SBDQ7
SBDQS1
RSVAH10
SBDM1
SBDQ8
SBDQ9
SBDQ10
SBDQ11
SBDQ12
SBDQ13
SBDQ14
SBDQ15
SBDQS2
RSVAL14
SBDM2
SBDQ16
SBDQ17
SBDQ18
SBDQ19
SBDQ20
SBDQ21
SBDQ22
SBDQ23
SBDQS3
SBDQS3*
SBDM3
SBDQ24
SBDQ25
SBDQ26
SBDQ27
SBDQ28
SBDQ29
SBDQ30
SBDQ31
SBDQS4
RSVAG26
SBDM4
SBDQ32
SBDQ33
SBDQ34
SBDQ35
SBDQ36
SBDQ37
SBDQ38
SBDQ39
SBDQS5
RSVAH30
SBDM5
SBDQ40
SBDQ41
SBDQ42
SBDQ43
SBDQ44
SBDQ45
SBDQ46
SBDQ47
SBDQS6
RSVAC30
SBDM6
SBDQ48
SBDQ49
SBDQ50
SBDQ51
SBDQ52
SBDQ53
SBDQ54
SBDQ55
SBDQS7
RSVY28
SBDM7
SBDQ56
SBDQ57
SBDQ58
SBDQ59
SBDQ60
SBDQ61
SBDQ62
SBDQ63
GRANTSDALE_0
MAAB0
MAAB1
MAAB2
MAAB3
MAAB4
MAAB5
MAAB6
MAAB7
MAAB8
MAAB9
MAAB10
MAAB11
MAAB12
-SWEB
-SWEB16,17
-SCASB
-SCASB16,17
-SRASB
-SRASB16,17
SBAB0
SBAB016,17
SBAB1
SBAB116,17
-CSB0
-CSB016,17
-CSB1
-CSB116,17
-CSB2
-CSB216,17
-CSB3
-CSB316,17
CKEB0
CKEB016,17
CKEB1
CKEB116,17
CKEB2
CKEB216,17
CKEB3
CKEB316,17
DCLKB0
DCLKB016
DCLKB116
DCLKB216
DCLKB316
DCLKB416
DCLKB516
SM_YSLEWIN
DDRVREFB
SMRCOMPP
SMRCOMPN
-DCLKB0
DCLKB1
-DCLKB1
DCLKB2
-DCLKB2
DCLKB3
-DCLKB3
DCLKB4
-DCLKB4
DCLKB5
-DCLKB5
MAAB13
TP1
TP3
-DCLKB016
-DCLKB116
-DCLKB216
-DCLKB316
-DCLKB416
-DCLKB516
3
AK5
AL4
AJ5
AH7
AJ6
AL5
AN6
AG9
AH4
AM5
AL6
AK10
AH10
AH9
AJ7
AL7
AF11
AE11
AJ8
AL8
AG10
AG11
AK13
AL14
AH13
AE13
AF13
AG14
AD14
AD12
AH12
AF14
AD15
AD20
AF20
AG20
AD18
AK19
AE22
AH21
AL18
AH19
AF22
AD21
AH25
AG26
AG24
AF23
AF25
AL25
AJ26
AD23
AF24
AJ25
AL26
AH28
AH30
AH31
AJ29
AJ31
AG30
AG31
AK33
AK32
AG27
AF28
AB31
AC30
AD24
AE31
AF27
AB27
AB26
AE29
AE27
AC28
AC26
W27
Y28
W31
AA29
W29
U26
V29
Y26
AA28
W26
V28
DQSB0
DMB0
MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
DQSB1
DMB1
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
DQSB2
DMB2
MDB16
MDB17
MDB18
MDB19
MDB20
MDB21
MDB22
MDB23
DQSB3
DMB3
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
DQSB4
DMB4
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
DQSB5
DMB5
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
DQSB6
DMB6
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
DQSB7
DMB7
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63
2
DDR25V
R118
1K,1%
R119
1K,1%
R120
0
Page Name
Size
Project NameRev
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
2
the expressed written consent of TOPSTAR
DDR25V
R121
1K,1%
NS
R122
1K,1%
NS
DDR25V
R12380.6,1%
BC49
0.1UF/Y5V/50V
R12480.6,1%
MAAB[0..13]16,17
DMB[0..7]16,17
MDB[0..63]16,17
DQSB[0..7]16,17
MAAA[0..13]15,17
DMA[0..7]15,17
MDA[0..63]15,17
DQSA[0..7]15,17
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Co.,Ltd
DDRVREFA
BC45
1UF/Y5V/10V
DDRVREFB
BC47
1UF/Y5V/10V
NS
GMCH-DDR
GDDR1
1
BC46
0.1UF/Y5V/50V
BC48
0.1UF/Y5V/50V
NS
SMRCOMPN
SMRCOMPP
MAAB[0..13]
DMB[0..7]
MDB[0..63]
DQSB[0..7]
MAAA[0..13]
DMA[0..7]
MDA[0..63]
DQSA[0..7]
1043Tuesday, December 28, 2004
1
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
DD
4
3
2
1
EXP_A_RXP0
EXP_A_RXN0
EXP_A_RXP1
EXP_A_RXN1
EXP_A_RXP2
EXP_A_RXN2
EXP_A_RXP3
EXP_A_RXN3
EXP_A_RXP4
EXP_A_RXN4
EXP_A_RXP5
EXP_A_RXN5
EXP_A_RXN6
CC
DMI_0RXP19
DMI_0RXN19
DMI_1RXP19
DMI_1RXN19
DMI_2RXP19
DMI_2RXN19
DMI_3RXP19
DMI_3RXN19
BB
For DVO Function
SRCCLK_MCH23
-SRCCLK_MCH23
SDVO_CLDATA18
SDVO_CLCLK18
EXP_A_RXP7
EXP_A_RXN7
EXP_A_RXP8
EXP_A_RXN8
EXP_A_RXP9
EXP_A_RXN9
EXP_A_RXP10
EXP_A_RXN10
EXP_A_RXP11
EXP_A_RXN11
EXP_A_RXP12
EXP_A_RXN12
EXP_A_RXP13
EXP_A_RXN13
EXP_A_RXP14
EXP_A_RXN14
EXP_A_RXP15
EXP_A_RXN15
DMI_0RXP
DMI_0RXN
DMI_1RXP
DMI_1RXN
DMI_2RXP
DMI_2RXN
DMI_3RXP
DMI_3RXN
E11
F11
J11
H11
F9
E9
F7
E7
B3
B4
D5
E5
G6
G5
H8
H7
J6
J5
K8
K7
L6
L5
P10
R10
M8
M7
N6
N5
P7
P8
R6
R5
U5
U6
T9
T8
V7
V8
V10
U10
A11
B11
K13
J13
U9B
EXPARXP0
EXPARXN0
EXPARXP1
EXPARXN1
EXPARXP2
EXPARXN2
EXPARXP3
EXPARXN3
EXPARXP4
EXPARXN4
EXPARXP5
EXPARXN5
EXPARXP6
EXPARXN6
EXPARXP7
EXPARXN7
EXPARXP8
EXPARXN8
EXPARXP9
EXPARXN9
EXPARXP10
EXPARXN10
EXPARXP11
EXPARXN11
EXPARXP12
EXPARXN12
EXPARXP13
EXPARXN13
EXPARXP14
EXPARXN14
EXPARXP15
EXPARXN15
DMIRXP0
DMIRXN0
DMIRXP1
DMIRXN1
DMIRXP2
DMIRXN2
DMIRXP3
DMIRXN3
GCLKINP
GCLKINN
SDVOCTRLDATA
SDVOCTRLCLK
GRANTSDALE_0
EXPATXP0
EXPATXN0
EXPATXP1
EXPATXN1
EXPATXP2
EXPATXN2
EXPATXP3
EXPATXN3
EXPATXP4
EXPATXN4
EXPATXP5
EXPATXN5
EXPATXP6
EXPATXN6
EXPATXP7
EXPATXN7
EXPATXP8
EXPATXN8
EXPATXP9
EXPATXN9
EXPATXP10
EXPATXN10
EXPATXP11
EXPATXN11
EXPATXP12
EXPATXN12
EXPATXP13
EXPATXN13
EXPATXP14
EXPATXN14
EXPATXP15
EXPATXN15
DMITXP0
DMITXN0
DMITXP1
DMITXN1
DMITXP2
DMITXN2
DMITXP3
DMITXN3
EXPACOMPO
EXPACOMPI
C10
C9
A9
A8
C8
C7
A7
A6
C6
C5
C2
D2
E3
F3
F1
G1
G3
H3
H1
J1
J3
K3
K1
L1
L3
M3
M1
N1
N3
P3
P1
R1
R3
T3
T1
U1
U3
V3
V5
W5
Y10
W10
EXP_A_TXP0
EXP_A_TXN0
EXP_A_TXP1
EXP_A_TXN1
EXP_A_TXP2
EXP_A_TXN2
EXP_A_TXP3
EXP_A_TXN3
EXP_A_TXP4
EXP_A_TXN4
EXP_A_TXP5
EXP_A_TXN5
EXP_A_TXP6
EXP_A_TXN6
EXP_A_TXP7
EXP_A_TXN7
EXP_A_TXP8
EXP_A_TXN8
EXP_A_TXP9
EXP_A_TXN9
EXP_A_TXP10
EXP_A_TXN10
EXP_A_TXP11
EXP_A_TXN11
EXP_A_TXP12
EXP_A_TXN12
EXP_A_TXP13
EXP_A_TXN13
EXP_A_TXP14
EXP_A_TXN14
EXP_A_TXP15
EXP_A_TXN15
DMI_0TXP
DMI_0TXN
DMI_1TXP
DMI_1TXN
DMI_2TXP
DMI_2TXN
DMI_3TXP
DMI_3TXN
GRCOMP
DMI_0TXP19
DMI_0TXN19
DMI_1TXP19
DMI_1TXN19
DMI_2TXP19
DMI_2TXN19
DMI_3TXP19
DMI_3TXN19
EXP_A_TXP[0..15]
EXP_A_TXN[0..15]
EXP_A_RXP[0..15]EXP_A_RXP6
EXP_A_RXN[0..15]
VCC1_5
100nH/1.4A
(FPI0302-R□紋10M-01)
L8
100NH/S/1.4A
1
+
EC19
1000UF/6.3V
VCC1_5PCIEX
R125
24.9,1%
GRCOMP
EXP_A_TXP[0..15]18
EXP_A_TXN[0..15]18
EXP_A_RXP[0..15]18
EXP_A_RXN[0..15]18
VCC1_5PCIEX
BC50
10UF/X5R/6.3V
BC51
10UF/X5R/6.3V
VCC1_5PCIEX14
AA
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Page Name
Size
Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
5
4
3
2
the expressed written consent of TOPSTAR
Co.,Ltd
Project NameRev
GMCH-PCI E & DMI
GDDR1
1
1143Tuesday, December 28, 2004
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
4
3
2
1
AN19
AL28
AJ14
AH24
AD30
AJ21
AK21
AK24
AL21
AL20
AK18
AJ24
AJ23
AJ18
AJ20
H16
E15
D17
M16
F15
C15
A16
B15
C14
K15
L10
AG6
P30
L19
L12
K12
J12
H17
H15
H12
G12
F24
F12
E16
C16
U9G
BSEL0
BSEL1
BSEL2
RSVG1
RSVG2
MTYPE
EXP_SLR
RSVG3
RSVG4
RSVG5
VCC
NCG1
NCG2
NCG3
NCG4
NCG5
NCG6
NCG7
NCG8
NCG9
NCG10
NCG11
NCG12
NCG13
NCG14
NCG15
NCG16
NCG17
NCG18
NCG19
RSVRDG1
RSVRDG2
RSVRDG3
RSVRDG4
RSVRDG5
RSVRDG6
RSVRDG7
RSVRDG8
RSVRDG9
RSVRDG10
GRANTSDALE_0
CRTHSYNC
CRTVSYNC
CRTRED
CRTGREEN
CRTBLUE
CRTREDB
CRTGREENB
CRTBLUEB
CRTDDCDATA
CRTDDCCLK
DREFCLKINP
DREFCLKINN
CRTREF
NCG20
NCG21
NCG22
NCG23
NCG24
NCG25
NCG26
NCG27
NCG28
NCG29
EXTTS*
RSVG6
RSVG7
RSTIN*
PWORK
ICH_SYNC*
NCG30
RSVRDG11
RSVRDG12
RSVRDG13
RSVRDG14
RSVRDG15
RSVRDG16
RSVRDG17
RSVRDG18
RSVRDG19
RSVRDG20
E12
D12
F14
D14
H14
G14
E14
J14
L14
M15
M13
M12
A15
AR35
AR34
AR2
AR1
AP35
AP1
B35
B1
A34
A2
K16
G16
R35
AF7
AG7
M14
A35
V31
V30
U30
V32
Y30
AB29
R31
R30
AA31
AA30
DDCDATA
DDCCLK
DOTCLK
-DOTCLK
REFSET
TP34
20PF
R13310K
-PFMRST2
PWROK1
-ICHSYNC
SC7
GHSYNC
GVSYNC
R126
150
DOTCLK23
-DOTCLK23
R132
255,1%
SC8
10PF
R128
150
R127
150
DDR25V_MCH14
-PFMRST226
PWROK120,26
-ICHSYNC20
GHSYNC
GVSYNC
DDCDATA
DDCCLK
4.7K
R144
4.7K
R129
150
VCC3
53
1
2
R136 0
VCC3
53
1
2
R137 0
VCC
R141
4.7K
R145
4.7K
R131
150
R130
150
U13
NC7SZ32/SOT23-5
4
NS
U16
NC7SZ32/SOT23-5
4
NS
VCC3
1
2
SOT23
Q22
2N7002
G S
U10
BAV99/S
132
R13439
R13539
D
3
1
VCC3
2
SOT23
Q23
2N7002
132
VCC3
R138
2.2K
G S
D
U11
BAV99/S
132
3
132
1UF/Y5V/10V
U14
BAV99/S
VCC
R139
2.2K R140
R142100
R143100
U12
BAV99/S
C43
132
U15
BAV99/S
C37
5PF
C44
0.1UF/Y5V/50V
NS
HSYNC
VSYNC
VGADDCDATA
VGADDCCLK
C38
5PF
DDR25V_DAC14
VGA_R
VGA_G
VGA_B
C41
C39
5PF
VCC
C40
5PF
5PF
F1
470
C42
5PF
VGA_R
VGA_G
VGA_B
VGADDCDATA
VGADDCCLK
GVCC
HSYNC
VSYNC
VGA
1
R
2
G
3
B
11
MS0
12
MS1
4
MS2
15
MS3
9
NC
13
HS
14
VS
5
VSS
6
VSS
7
VSS
8
VSS
10
VSS
16
CASE
17
CASE
DB15 F HD VESA Blue
DD
CC
BB
BSEL05
BSEL15
BSEL25
XDP_18
XDP_28
MTYPE
EXP_SLR
XDP_36
XDP_6
XDP_4
VCC1_5
NB HEAT SINK FAN
MTYPE
AA
5
EXP_SLR
R1461K
R1471K
NS
NS
4
NB_FAN
H1X2/NB_FAN/X
NS
+12V
TOPSTAR DEVELOPER
ShenZhen Topstar Inductor
Page Name
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Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
3
2
the expressed written consent of TOPSTAR
Co.,Ltd
Project NameRev
GMCH-INTERNAL VGA
GDDR1
1243Tuesday, December 28, 2004
1
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
U9H
A10
VSS_1
A18
VSS_2
AA10
AA26
AA27
AB28
AB32
AB35
AC27
AC29
AC31
AC32
AD11
AD13
AD16
AD19
AD22
AD26
AD27
AD34
AE12
AE14
AE15
AE17
AE18
AE20
AE21
AE23
AE24
AE28
AE30
AE32
AF10
AF12
AF15
AF18
AF21
AF26
AF29
AF30
AF31
AF32
AF35
AG12
AG13
AG15
AG16
AG18
AG19
AG21
AG22
AG25
AG28
AG29
AH11
AH14
AH17
AH20
AH23
AH26
AH29
AH32
AH34
AJ10
AJ13
A26
A30
A33
AA1
AA2
AA3
AA4
AA5
AA6
AA7
AA8
AA9
AE4
AE6
AE9
AF1
AF4
AF6
AF8
AG5
AH1
AH5
AH6
AH8
A3
A5
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_14
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_26
VSS_28
VSS_29
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99
VSS_100
GRANTSDALE_0
DD
CC
BB
AA
5
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_147
VSS_148
VSS_149
VSS_146
VSS_156
VSS_150
VSS_152
VSS_151
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199
VSS_200
AJ15
AJ16
AJ19
AJ22
AJ27
AJ30
AJ32
AJ35
AJ4
AJ9
AK1
AK11
AK14
AK17
AK20
AK23
AK25
AK26
AK28
AK30
AK4
AK6
AK7
AK8
AL10
AL13
AL16
AL19
AL22
AL32
AM29
AM31
AM4
AM6
AM7
AM8
AN1
AP8
AR13
AR17
AR21
AR25
AR3
AR30
AR6
B12
B14
B16
B10
B7
B18
B24
B2
C17
C18
C23
C3
C35
C4
D10
D11
D15
D16
D18
D23
D25
D26
D28
D3
D30
D31
D32
D4
D6
D7
D8
D9
E1
E10
E17
E18
E2
E23
E26
E29
E4
E6
E8
F10
F16
F18
F2
4
4
3
U9I
F23
VSS_201
F25
VSS_202
F29
VSS_203
F30
VSS_204
F32
VSS_205
F35
VSS_206
F4
VSS_207
F5
VSS_208
F6
VSS_209
F8
VSS_210
G10
VSS_211
G11
VSS_212
G13
VSS_213
G15
VSS_214
G17
VSS_215
G19
VSS_216
G2
VSS_217
G20
VSS_218
G23
VSS_219
G26
VSS_220
G27
VSS_221
G28
VSS_222
G4
VSS_223
G7
VSS_224
G8
VSS_225
G9
VSS_226
H10
VSS_227
H13
VSS_228
H2
VSS_229
H21
VSS_230
H24
VSS_231
H25
VSS_232
H27
VSS_233
H30
VSS_234
H32
VSS_235
H34
VSS_236
H4
VSS_237
H5
VSS_238
H6
VSS_239
H9
VSS_240
J10
VSS_241
J15
VSS_242
J16
VSS_243
J17
VSS_244
J18
VSS_245
J2
VSS_246
J20
VSS_247
J23
VSS_248
J30
VSS_249
J4
VSS_250
J7
VSS_251
J8
VSS_252
J9
VSS_253
K10
VSS_254
K11
VSS_255
K14
VSS_256
K2
VSS_257
K20
VSS_258
K24
VSS_259
K26
VSS_260
K28
VSS_261
K31
VSS_262
K32
VSS_263
K35
VSS_264
K4
VSS_265
K5
VSS_266
K6
VSS_267
K9
VSS_268
L11
VSS_269
L13
VSS_270
L16
VSS_272
L17
VSS_273
L18
VSS_274
L2
VSS_275
L20
VSS_276
L21
VSS_277
L22
VSS_278
L24
VSS_279
L27
VSS_280
L30
VSS_281
L32
VSS_282
L4
VSS_283
L7
VSS_284
L8
VSS_285
L9
VSS_286
M10
VSS_287
M17
VSS_289
M2
VSS_290
M20
VSS_291
M24
VSS_292
M25
VSS_293
M27
VSS_294
M29
VSS_295
M34
VSS_296
M4
VSS_297
M5
VSS_298
M6
VSS_299
M9
VSS_300
GRANTSDALE_0
3
VSS_301
VSS_305
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_317
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_332
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_344
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_357
VSS_358
VSS_359
VSS_363
VSS_364
VSS_365
VSS_366
VSS_367
VSS_368
VSS_369
VSS_370
VSS_371
VSS_374
VSS_375
VSS_379
VSS_380
VSS_381
VSS_382
VSS_383
VSS_384
VSS_387
VSS_388
VSS_392
VSS_393
VSS_394
VSS_400
VSS_401
VSS_402
VSS_403
N10
N2
N28
N30
N32
N4
N7
N8
N9
P2
P27
P29
P31
P32
P35
P4
P5
P6
P9
R2
R26
R27
R4
R7
R8
R9
T10
T2
T28
T30
T32
T34
T4
T5
T6
T7
U17
U19
U2
U27
U29
U31
U32
U4
U7
U8
U9
V1
V18
V2
V26
V27
V35
V4
V6
V9
W17
W19
W28
W30
W32
Y29
Y31
Y32
Y34
2
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Page Name
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Custom
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
2
the expressed written consent of TOPSTAR
Co.,Ltd
Project NameRev
GMCH-GND
GDDR1
1
1343Tuesday, December 28, 2004
1
1.1
PDF created with pdfFactory trial version www.pdffactory.com
5
U9C
L10
1UH/8/S
45mA
5
AC11
AB11
AA13
AA14
AA16
AA18
AA20
AA21
AA22
AA23
AA24
AB13
AB14
AB15
AB16
AB17
AB18
AB19
AB20
AB21
AB22
AB23
AB24
W20
W16
W13
W14
W22
W24
Y20
Y19
Y17
Y16
U20
U16
T20
T19
T17
T16
N13
N14
N15
N16
N18
N20
N21
P13
P14
P15
P17
P19
P21
P22
R13
R14
R15
R16
R18
R20
R22
R23
T13
T14
T15
T21
T23
T24
U13
U14
U22
U24
V13
V14
V15
V21
V23
V24
Y13
Y14
Y15
Y21
Y23
Y24
45mA
10UH/8/S
55mA
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
VCCNCTF
GRANTSDALE_0
R85 1
L13
BC60
10UF/X5R/6.3V
1
+
EC23
220UF
1
+
EC26
220UF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
VSSNCTF
RSVRDC1
RSVRDC2
RSVRDC3
RSVRDC4
RSVRDC5
RSVRDC6
RSVRDC7
RSVRDC8
RSVRDC9
RSVRDC10
RSVRDC11
NCC1
NCC2
NCC3
NCC4
NCC5
NCC6
NCC7
NCC8
NCC9
NCC10
NCC11
NCC12
NCC13
NCC14
NCC15
NCC16
NCC17
NCC18
VCCA_GPLL
C56
0.1UF/Y5V/50V
VCCA_HPLL
C58
0.1UF/Y5V/50V
VCCA_DPLLA
C63
0.1UF/Y5V/50V
VCC1_5
DD
CC
BB
VCC1_5
VCC1_5
AA
VCC1_5
AC25
AB25
AA25
AA11
Y25
Y18
Y11
W25
W11
V25
V20
V16
V11
U25
U11
T25
T18
T11
R25
R11
P25
P11
N25
AD25
N11
M11
AA15
AA17
AA19
N17
N19
P16
P18
P20
R17
R19
R21
T22
U15
U21
U23
V22
W15
W21
W23
Y22
AC12
AC13
AC14
AC15
AC16
AC17
AC18
AC19
AC20
AC21
AC22
N12
N22
N23
N24
P12
P23
P24
R12
R24
T12
U12
V12
W12
Y12
AA12
AB12
AC23
AC24
4
VCC1_5
VCC1_5PCIEX11
VCCA_HPLL
VCCA_MPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_GPLL
DDR25V_MCH
DDR25V_DAC
VCC1_5
VCC1_5
L9
10UH/8/SR148 1
55mA
60mA
DDR25V_MCH12
DG 1.0 change to 180ohm/0805 FB
4
FB4
FB30/8/S
70mA
AD10
AC10
AB10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AC9
AC8
AC7
AC6
AC5
AC4
AC3
AC2
AC1
AB9
AB8
AB7
AB6
AB5
AB4
AB3
AB2
AB1
W18
V19
V17
U18
Y9
Y8
Y7
Y6
Y5
Y4
Y3
Y2
Y1
W9
W8
W7
W6
W4
W3
W2
W1
A17
B17
A12
B13
A14
A13
E13
D13
F13
U9D
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCC3G
VCCA_HPLL
VCCA_SMPLL
VCCA_DPLLA
VCCA_DPLLB
VCCA_3GPLL
VCC2
VCCA_DAC
VCCA_DAC
VSSA_DAC
GRANTSDALE_0
1
+
EC22
220UF
1
+
EC24
220UF
1
+
EC25
220UF
3
VCCA_DPLLB
12
C55
0.22UF
VCCA_MPLL
C59
0.1UF/Y5V/50V
DDR25V_DAC
C61
0.1UF/Y5V/50V
3
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
VTT_GMCHVTT_GMCH
VCC3
3
231
DDR25V
R547
3.3K
C47
0.1UF/Y5V/50V
SC3
0.1UF/Y5V/50V
NS
BC54
0.1UF/Y5V/50V
+
EC20
1000UF/6.3V
U17
1
IN
2
GND
3 4
ENBYP
MIC5205-25
RT9167-25
3VDUAL
SOT23
Custom
C48
0.1UF/Y5V/50V
SC4
0.1UF/Y5V/50V
NS
BC55
0.1UF/Y5V/50V
5
OUT
R545
100
SOT23
231
Q62
MMBT3904
C303
1UF/Y5V/10V
VCC1_5
Page Name
Size
Project NameRev
Date:Sheet of
PROPERTY NOTE: this document contains information confidential and property to
TOPSTAR and shall not be reproduced or transferred to other documents or disclosed
to others or used for any purpose other than that for which it was obtained without
the expressed written consent of TOPSTAR
DDR25V_MCH
C53
0.1UF/Y5V/50V
C57
0.01UF/X7R
DDR25V_MCH
R544
10/8
MMBT3904
231
VCC1_5
MMBT3904
R550
10K
ShenZhen Topstar Inductor
TOPSTAR DEVELOPER
Co.,Ltd
C52
2
C46
0.1UF/Y5V/50V
SC2
0.1UF/Y5V/50V
NS
BC53
0.1UF/Y5V/50V
BC59
0.1UF/Y5V/50V
R573
0
NS
Q61
R546
10K
Q65
2
1
BAT54C/SOT23-5
C45
AR33
AR31
AR26
AR22
AR18
AR14
AR10
AP28
AP24
AP20
AP16
AP12
AN35
AM32
AM28
AM26
AM25
AM23
AM22
AM20
AM19
AM17
AM16
AM14
AM13
AM11
AM10
AK35
H22
VTT
G22
VTT
G21
VTT
F22
VTT
F21
VTT
F20
VTT
E22
VTT
E21
VTT
E20
VTT
E19
VTT
D22
VTT
D21
VTT
D20
VTT
D19
VTT
C22
VTT
C21
VTT
C20
VTT
C19
VTT
B22
VTT
B21
VTT
B20
VTT
B19
VTT
A22
VTT
A21
VTT
A20
VTT
A19
VTT
AB30
B28
B5
B6
B7
B8
B9
C1
C11
C13
L15
Y27
C60
0.22UF
C62
0.01UF/X7R
DDR25V
VTT_GMCH
DDR25V_DAC12
0.1UF/Y5V/50V
VCC1_5
SC1
0.1UF/Y5V/50V
NS
DDR25V DDR25V
BC52
0.1UF/Y5V/50V
DDR25V
BC58
0.1UF/Y5V/50V
4.7UF
VCC3
Reserved When No
Power Sequence
Requirement
MMBT3904
3VDUAL
-SLP_S320,26,36,37
VCC1_5 DDR25V_MCH
C49
0.1UF/Y5V/50V
VCC1_5
1
+
EC67
1000UF/6.3V
BC56
0.1UF/Y5V/50V
MUST be 100MA
Q60
SOT23
3VDUAL
R549
47K
Q64
C302
1UF/Y5V/10V
GMCH-PWR
GDDR1
1
C50
0.1UF/Y5V/50V
C54
10UF/X5R/6.3V
SOT23
231
1
BC57
0.1UF/Y5V/50V
3VDUAL
R548
10K
Q63
MMBT3904
SOT23
231
1443Tuesday, December 28, 2004
C51
0.1UF/Y5V/50V
1.1
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