TOPRO TP6312 User Manual

TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
General Description
The TP6312 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/4 to 1/11-duty factor. It consists of 11 segment output lines, 6 grid output lines, 5 segment/grid output drivelines, a display memory, a control circuit, and a Key scan circuit. Serial data is input to TP6312 through a three-line serial interface. This VFD controller/driver is ideal as a peripheral device of a single-chip microcomputer.
Ordering Information
TP 6312
Footprint Version Package Type
Features
Multiple display modes (11-segment & 11-digit to
16-segment & 4-digit)
Key scanning (6 × 4 matrices) Dimming circuit (eight steps) High-voltage output (VLED ports (4 chs, 20 mA max) General-purpose input port (4 bits) No external resistor necessary for driver outputs
(P-ch open-drain + pull-down resistor output)
Serial interface (CLK, STB, D
Package Type
Footprint
F: LQFP S: 2.0 mm L: 3.2 mm
– 35V max)
DD
IN
, D
OUT
)
Block Diagram
DIN
DOUT
CLK
STB
R
Key1
to
Key4
4
Serial I/F
OSC
Command decoder
Display memory 16bit x 11 word
Timing generator key
scan
Key data memory
(4x6)
Dimming circuit
16 11
16-bit output latch16-bit output latch
11 6
Seg1
Segment driverSegment/grid driverGrid driver
5
5
Data selector
5
Seg11
Seg12/Gird11
Seg16/Gird7
Grid1
Grid6
SW1
to
SW4
4
4 bit latch
4 bit latch
1
LED
LED
VDD VSS VEE
(+5V) (0V) (-30V)
4
Version 1.1 Page 1 of 9 http://www.topro.com.tw September 2003
TP6312
Pin Configuration (Top View)
Grid 4
Grid 3
Grid 2
Grid 1
DD
V
LED 4
LED 3
LED 2
LED 1
VSS
OSC
44 43 42 41 40 39 38 37 36 35 34
Use all the power pins.
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
EE
Grid 6
Grid 5
33
1
SW 1
Seg15 / Grid 8
Seg16 / Grid 7
30
31
32
2
3
4
SW 2
SW 3
SW 4
V
Seg14 / Grid 9
Seg13 / Grid 10
Seg12 / Grid 11
26
27
28
29
5
6
7
8
OUT
DIN
CLK
VSS
D
Seg9
Seg10
Seg11
23
24
25
Seg8
Seg7
Seg6 / KS6
Seg5 / KS5
Seg4 / KS4
Seg3 / KS3
Seg2 / KS2
Seg1 / KS1
V
DD
KEY 4
KEY 3
12 13 14 15 16 17 18 19 20 21 22
9
10
11
STB
KEY 1
KEY 2
Pin Description
Pin No Symbol Pin Name Description
6 DIN Date input
5 D
Date output
OUT
9 STB Strobe
8 CLK Clock input
44 OSC Oscillator pin
/KS1 to
Seg
Seg
Seg
1
Seg
6
/Grid11 to
11
16
/KS6
/Grid7
High-voltage output High-voltage output
(Segment)
High-voltage output
(Grid)
High-voltage output
(Segment/grid)
15 to 20 21 to 25 Seg7 to Seg11 37 to 32 Grid1 to Grid6
26, 28 to 31
42 to 39 LED1 to LED4 LED output CMOS output. +20 mA max. 10 to 13 Key1 to Key4 Key data input
1 to 4 SW1 to SW4 Switch input
14, 38 VDD Logic power
7, 43 VSS Logic ground Connect this pin to system GND.
27 VEE Pull-down level VDD – 35 V max
Inputs serial data at rising edge of shift clock, starting from the lower bit. Outputs serial data at falling edge of shift clock, starting from the lower bit. This is N-ch open-drain output pin. Initializes the serial interface at rising or falling edge to make TP6312 waiting for reception of command. Data input after STB has fallen is processed as command. While command data is processed, current processing is stopped and serial interface is initialized. While STB is high, CLK is ignored. Reads serial data at rising edge, and outputs data at falling edge. Connects a resistor to this pin to determine the oscillation frequency to this pin. Segment output pins (Dual function as Key source).
Segment output pins. Grid output pins. These pins are selectable for segment or grid
driving. Data input to these pins is latched at the end of
display cycle. These pins constitute 4-bit general-purpose input port. 5V ± 10%
Version 1.1 Page 2 of 9 http://www.topro.com.tw September 2003
TP6312
1/4 TO 1/11-DUTY VFD CONTROLLER/DRIVER
Functional Description
Display RAM Address and Display Mode
The display RAM stores the data transmitted from an external device to TP6312 through the serial interface, and is assigned addresses as follows, in units of 8 bits:
Seg
Seg4 Seg8 Seg
1
00HU 01HL 01HU DIG1
00H
L
02HL 02HU 03HL 03HU DIG2 04HL 04HU 05HL 05HU DIG3 06HL 06HU 07HL 07HU DIG4
08HL 08HU 09HL 09HU DIG5 0AHL 0AHU 0BHL 0BHU DIG6 0CHL 0CHU 0DHL 0DHU DIG7 0EHL 0EHU 0FHL 0FHU DIG8 10HL 10HU 11HL 11HU DIG9 12HL 12HU 13HL 13HU DIG10 14HL 14HU 15HL 15HU DIG11
b
b
0
b
3 b4
7
XX HL XX HU
Lower 4 bits Higher 4 bits.
12
Seg16
Key Matrix and Key-Input Data Storage RAM
The Key matrix is of 6 × 4 configuration, as shown below.
KEY1
KEY2
The data of each Key is stored as illustrated below, and is read by a read command, starting from the least significant bit.
Key
Key4Key1 Key4
1
/ KS1 Seg2 / KS2
Seg
1
Seg3 / KS3 Seg4 / KS4
Reading s eque nce
Seg5 / KS5 Seg6 / KS6
b0 b3 b4 b7
LED Port
Data is written to the LED port by a write command, starting from the least significant bit of the port. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off. The data of bits 5 through 8 is ignored.
---- ---- ---- ---- b3 b2 b1 b0
LED1
Don't care
LED2 LED3 LED4
On power application, all LEDs are unlit.
SW Data
The SW data is read by a read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0.
MSB LSB
0 0 0 0 b3 b2 b1 b0
KEY3
KEY4
SW1 SW2 SW3 SW4
Commands
Seg1/KS1
Seg2/KS2
Seg3/KS3
Seg4/KS4
Seg5/KS5
Seg6/KS6
A command sets the display mode and status of the VFD driver. The first 1 byte input to TP6312 through the D
IN
pin after the STB pin has fallen is regarded as a command. If STB is high while a command/data is transmitted, serial communication is initialized, and the transmitting command/data is invalid; however, the
Version 1.1 Page 3 of 9 http://www.topro.com.tw September 2003
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