Texas Instruments UC5613Z, UC5613QPTR, UC5613QP, UC5613PWPTR, UC5613PWP Datasheet

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Complies with SCSI, SCSI-2 and
SPI-2 Standards
3pF Channel Capacitance during Disconnect
100µA Supply Current in Disconnect Mode
Meets SCSI Hot Plugging Capability
•−400mA Sourcing Current for
+400mA Sinking Current for Active Negation
Logic Command Disconnects all Termination Lines
Trimmed Termination Current to 5%
Trimmed Impedance to 5%
Current Limit and Thermal
Shutdown Protection
The UC5613 provides 9 lines of active termination for a SCSI (Small Com­puter Systems Interface) parallel bus. The SCSI standard recommends ac­tive termination at both ends of the cable segment.
The UC5613 provides a disconnect feature which, when opened or driven high, disconnects all terminating resistors and disables the regulator greatly redu cing stan dby power. The output c hannels remain high imped­ance even without Termpwr applied. A low channel capacitance of 3pF al­lows units at interim points of the bus to have little or no effect on the signal integrity.
The UC5613 is pin-for-pin compatibl e with its predeces sor, the UC5603 - 9 line Active Terminator. The only functiona l differ ence be twee n the UC5613 and UC5603 is the absence of the negative clamps. Parametrically, the UC5613 has a 5 % tol er ance o n im peda nce and current compared to a 3% tolerance on the UC5603. Custom power packages are utilized to allow normal operation at full power (1.2 watts).
Internal circuit trimming is utilized, first to trim the impedance to a 5% toler­ance; then, the output current is trimmed to a 5% tolerance. The output current trim is set as close a s possi ble to th e maximum value of the SCSI specification which maximizes the noise margin for fast SCSI operation.
Other features include thermal shutdown and current limit. This device is offered in low thermal resistance versions of the industry
standard 16 pin narrow body SOIC, 16 pin ZIP (zig-zag in line package), and 24 pin TSSOP.
UC5613
9-Line Low Capacitance SCSI Active Terminator
FEATURES DESCRIPTION
BLOCK DIAGRAM
Circuit Design Patented
3/97
UDG-94003-1
ABSOLUTE MAXIMUM RATINGS
Termpwr Vo ltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V
Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +7V
Regulator Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5A
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to +150°C
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to +150°C
Lead Temperature (Soldering, 10 Sec.) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
RECOMMENDED OPERATING CONDITIONS
Termpwr Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8V to 5.25V
Signal Line Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to +5V
Disconnect Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to Termpwr
CONNECTION DIAGRAMS
DIL-16 (Top View) N or J Package
UC5613
* DP packag e pi n 5 se rves as signal ground; pins 4, 12, 13 serve as heatsink/ground.
* PWP package pin 5 serves as signal ground; pins 6, 7, 8, 9, 17, 18, 19, and 20 serve as heatsink/ground.
ZIP-16 (Top View) Z Package
SOIC-16 (Top View) DP Package
TSSOP-24 (To p View) PWP Package
Note: Drawings are not to scale.
Unless otherwise sp ec ified all voltages are with respect to G r ou nd . C urre nt s are pos i­tive into, negative out of the specified terminal. Consult Packaging Section of Unitrode Integrated Circuits databook for thermal limita­tions and consid era ti on s of pac ka ges.
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