Datasheet TXB0104D, TXB0104PWR, TXB0104RUTR, TXB0104YZTR, TXB0104ZXUR Datasheet (Texas Instruments) [ru]

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TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

TXB0104 4-Bit Bidirectional Voltage-level Translator With Automatic Direction Sensing

and ±15-kV ESD Protection

1 Features 3 Description

• 1.2 V to 3.6 V on A Port and 1.65 V to 5.5 V on B Port (V

CCA

≤ V

CCB

)

• VCCIsolation Feature – If Either VCCInput Is at GND, All Outputs Are in the High-Impedance State

• OE Input Circuit Referenced to V

• Low Power Consumption, 5-μA Max I

• I

Supports Partial-Power-Down Mode Operation

off

CCA

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESD Protection Exceeds JESD 22 – A Port

– 2500-V Human-Body Model (A114-B) – 1500-V Charged-Device Model (C101)

– B Port

– ±15-kV Human-Body Model (A114-B) – 1500-V Charged-Device Model (C101)

2 Applications

• Headset

• Smartphone

• Tablet

• Desktop PC

This 4-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track V

CCA

. V

accepts any supply

CCA

voltage from 1.2 V to 3.6 V. The B port is designed to track V

CCB

. V

accepts any supply voltage from

CCB

1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V,

1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. V

should not exceed V

CCA

CCB

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

The TXB0104 is designed so that the OE input circuit is supplied by V

CCA

This device is fully specified for partial-power-down applications using I

. The I

off

circuitry disables the

off

outputs, preventing damaging current backflow through the device when it is powered down.

Device Information

PART NUMBER PACKAGE BODY SIZE (NOM)

UQFN (12) 2.00 mm x 1.70 mm SOIC (14) 8.65 mm x 3.91 mm BGA

TXB0104

(1) For all available packages, see the orderable addendum at

the end of the datasheet.

MICROSTAR 2.00 mm x 2.50 mm JUNIOR (12)

TSSOP (14) 5.00 mm x 4.40 mm VQFN (14) 3.50 mm x 3.50 mm DSBGA (12) 1.40 mm x 1.90 mm

(1)

Typical Application Block Diagram for TXB010X

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

www.ti.com

1 Features.................................................................. 1

2 Applications ........................................................... 1

3 Description ............................................................. 1

4 Revision History..................................................... 2

5 Pin Configuration and Functions......................... 3

6 Specifications......................................................... 5

6.1 Absolute Maximum Ratings ..................................... 5

6.2 Handling Ratings....................................................... 5

6.3 Recommended Operating Conditions....................... 5

6.4 Thermal Information.................................................. 6

6.5 Electrical Characteristics .......................................... 6

6.6 Timing Requirements: V

6.7 Timing Requirements: V

6.8 Timing Requirements: V

6.9 Timing Requirements: V

6.10 Timing Requirements: V

6.11 Switching Characteristics: V

6.12 Switching Characteristics: V

6.13 Switching Characteristics: V

6.14 Switching Characteristics: V

6.15 Switching Characteristics: V

= 1.2 V ......................... 7

CCA

= 1.5 V ± 0.1 V ............ 7

CCA

= 1.8 V ± 0.15 V .......... 7

CCA

= 2.5 V ± 0.2 V ............ 7

CCA

= 3.3 V ± 0.3 V .......... 8 12 Device and Documentation Support ................. 19

CCA

= 1.2 V ................. 8 12.1 Trademarks........................................................... 19

CCA

= 1.5 V ± 0.1 V .... 8 12.2 Electrostatic Discharge Caution............................ 19

CCA

= 1.8 V ± 0.15 V .. 8 12.3 Glossary................................................................ 19

CCA

= 2.5 V ± 0.2 V .... 9

CCA

= 3.3 V ± 0.3 V .... 9

CCA

6.16 Operating Characteristics...................................... 10

6.17 Typical Characteristics.......................................... 11

7 Parameter Measurement Information ................ 12

8 Detailed Description ............................................ 13

8.1 Overview................................................................. 13

8.2 Functional Block Diagram ....................................... 13

8.3 Feature Description................................................. 14

8.4 Device Functional Modes........................................ 15

9 Application and Implementation ........................ 16

9.1 Application Information............................................ 16

9.2 Typical Application ................................................. 16

10 Power Supply Recommendations ..................... 18

11 Layout................................................................... 18

11.1 Layout Guidelines ................................................. 18

11.2 Layout Example .................................................... 18

13 Mechanical, Packaging, and Orderable

Information........................................................... 19

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision F (March 2012) to Revision G Page

• Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout

section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information

section ................................................................................................................................................................................... 1

Changes from Revision E (February 2010) to Revision F Page

• Added notes to pin out graphics............................................................................................................................................. 3

Product Folder Links: TXB0104

D OR PW PACKAGE

(TOP VIEW)

GND

CCA

CCB

RGY PACKAGE

Exposed

Center

Pad

(TOP VIEW)

1 14

7 8

B1 B2 B3 B4 NC

A1 A2 A3 A4

CCB

GND

CCA

CCB

RUT PACKAGE

(TOP VIEW)

CCA

GND

GXU/ZXU PACKAGE

(TOP VIEW)

A B C

YZT PACKAGE

(TOP VIEW)

C B A

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5 Pin Configuration and Functions

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

A. N.C. − No internal connection B. For RGY, if the exposed center pad is used, it must only be connected as a secondary ground or left

electrically open. C. Pullup resistors are not required on both sides for Logic I/O. D. If pull up or pull down resistors are needed, the resistor value must be over 50 kΩ. E. 50 kΩ is a safe recommended value, if the customer can accept higher VOLor lower VOH, smaller pullup or

pulldown resistor is allowed, the draft estimation is VOL= V RDW/(4.5 k + RDW).

F. If pullup resistors are needed, please refer to the TXS0104 or contact TI. G. For detailed information, please refer to application note SCEA043.

NAME RUT NO. YZT NO.

× 4.5 k/(4.5 k + RPU) and VOH= V

CCOUT

Pin Functions

PIN BALL

FUNCTION

CCA

≤ 3.6 V and V

D, PW, OR GXU/

RGY NO. ZXU NO.

CCA

A1 2 2 A1 A3 Input/output 1. Referenced to V A2 3 3 A2 B3 Input/output 2. Referenced to V A3 4 4 A3 C3 Input/output 3. Referenced to V A4 5 5 A4 D3 Input/output 4. Referenced to V

NC 6 – – – No connection. Not internally connected.

GND 7 6 B4 D2 Ground

OE 8 12 B3 C2

1 1 B2 B2 A-port supply voltage 1.2 V ≤ V

3-state output-mode enable. Pull OE low to place all outputs in 3-state mode. Referenced to V

Product Folder Links: TXB0104

CCA

≤ V

CCB

CCOUT

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

Pin Functions (continued)

PIN BALL

NAME RUT NO. YZT NO.

D, PW, OR GXU/

RGY NO. ZXU NO.

NC 9 – – – No connection. Not internally connected.

B4 10 7 C4 D1 Input/output 4. Referenced to V B3 11 8 C3 C1 Input/output 3. Referenced to V B2 12 9 C2 B1 Input/output 2. Referenced to V B1 13 10 C1 A1 Input/output 1. Referenced to V

CCB

14 11 B1 A2 B-port supply voltage 1.65 V ≤ V

Pin Assignments (GXU / ZXU Package)

A B C

4 A4 GND B4 3 A3 OE B3 2 A2 V 1 A1 V

CCA CCB

Pin Assignments (YZT Package)

3 2 1

D A4 GND B4 C A3 OE B3 B A2 V A A1 V

CCA CCB

FUNCTION

CCB

≤ 5.5 V.

CCB

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B2 B1

Product Folder Links: TXB0104

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6 Specifications

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

6.1 Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

CCA

CCB

Supply voltage range V

Input voltage range V

Voltage range applied to any output in the high-impedance or power-off state

Voltage range applied to any output in the high or low

(2)

state

A port –0.5 4.6 B port –0.5 6.5 A port –0.5 4.6 B port -0.5 6.5 A port –0.5 V

B port –0.5 V Input clamp current VI< 0 –50 mA Output clamp current VO< 0 –50 mA Continuous output current –50 50 mA Continuous current through V

CCA

, V

, or GND –100 100 mA

CCB

–0.5 4.6 –0.5 6.5

CCA CCB

+ 0.5 + 0.5

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The value of V

CCA

and V

are provided in the recommended operating conditions table.

CCB

6.2 Handling Ratings

MIN MAX UNIT

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

Storage temperature range –65 150 °C

stg

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all

(1)

pins

, A Port

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all

(1)

pins

Electrostatic discharge V

(ESD)

, B Port

Charged device model (CDM), per JEDEC specification JESD22-C101, all pins

(2)

, A Port

(2)

, B Port

–15 15

2.5

1.5

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

CCA

Supply voltage V

CCB

High-level input voltage V

Low-level input voltage V

Voltage range applied to any A-port 0 3.6

output in the high-impedance 1.2 V to 3.6 V 1.65 V to 5.5 V V

or power-off state

(1) The A and B sides of an unused data I/O pair must be held in the same state, i.e., both at V (2) V (3) V

must be less than or equal to V

CCA

is the supply voltage associated with the input port.

CCI

Data inputs 1.2 V to 3.6 V 1.65 V to 5.5 V V OE 1.2 V to 3.6 V 1.65 V to 5.5 V V Data inputs 1.2 V to 5.5 V 1.65 V to 5.5 V 0 V OE 1.2 V to 3.6 V 1.65 V to 5.5 V 0 V

B-port 0 5.5

and must not exceed 3.6 V.

CCB

Product Folder Links: TXB0104

(1)(2)

CCB

× 0.65

CCI

CCA

or both at GND.

CCI

MIN MAX UNIT

1.2 3.6

1.65 5.5

(3)

CCI

× 0.65 5.5

(3)

× 0.35

CCI

× 0.35

CCA

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

www.ti.com

Recommended Operating Conditions (continued)

over operating free-air temperature range (unless otherwise noted)

CCA

Input transition

Δt/Δv 1.65 V to 3.6 V 40 ns/V

rise or fall rate

Operating free-air temperature –40 85 °C

A-port inputs 1.2 V to 3.6 V 1.65 V to 5.5 V 40

B-port inputs 1.2 V to 3.6 V

(1)(2)

CCB

MIN MAX UNIT

4.5 V to 5.5 V 30

6.4 Thermal Information

TXB0104

THERMAL METRIC

Junction-to-ambient thermal

θJA

resistance Junction-to-case (top) thermal

θJC(top)

resistance Junction-to-board thermal

θJB

resistance Junction-to-top characterization

parameter Junction-to-board characterization

parameter Junction-to-case (bottom) thermal

θJC(bot)

resistance

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(1)

D GXU/ZXU PW RGY RUT YZT UNIT

14 PINS 12 PINS 14 PINS 14 PINS 12 PINS 12 PINS

90.7 127.1 121.0 52.8 119.8 89.2

50.5 92.8 50.0 67.7 42.6 0.9

45.4 62.2 62.8 28.9 52.5 14.4 °C/W

14.7 2.3 6.4 2.6 0.7 3.0

45.1 62.2 62.2 29.0 52.3 14.4

─ ─ ─ ─ ─ ─

6.5 Electrical Characteristics

(1)(2)

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

CCA

1.2 V 1.1

OHA

OLA

OHB

OLB

OE VI= V

A port VIor VO= 0 to 3.6 V 0 V 0 V to 5.5 V –1 1 –2 2

off

B port VIor VO= 0 to 5.5 V 0 V to 3.6 V 0 V –1 1 –2 2

A or B port OE = GND 1.2 V to 3.6 V 1.65 V to 5.5 V –1 1 –2 2 μA

IOH= –20 μA V

IOL= 20 μA V

1.4 V to 3.6 V

1.2 V 0.3

1.4 V to 3.6 V 0.4 IOH= –20 μA 1.65 V to 5.5 V V IOL= 20 μA 1.65 V to 5.5 V 0.4 V

or GND 1.2 V to 3.6 V 1.65 V to 5.5 V –1 1 –2 2 μA

CCI

1.2 V 1.65 V to 5.5 V 0.06

CCA

VI= V IO= 0

CCI

or GND,

1.4 V to 3.6 V 1.65 V to 5.5 V 5

3.6 V 0 V 2 0 V 5.5 V –2

1.2 V 1.65 V to 5.5 V 3.4

CCB

VI= V IO= 0

CCI

or GND,

1.4 V to 3.6 V 1.65 V to 5.5 V 5

3.6 V 0 V –2 0 V 5.5 V 2

CCB

TA= 25°C –40°C to 85°C

MIN TYP MAX MIN MAX

CCA

– 0.4

CCB

– 0.4

UNIT

μA

(1) V (2) V

is the supply voltage associated with the input port.

CCI

is the supply voltage associated with the output port.

CCO

Product Folder Links: TXB0104

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TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

Electrical Characteristics

(1)(2)

(continued)

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS V

CCA

+ I

CCB

VI= V IO= 0

VI= V

CCZA

IO= 0, μA OE = GND

VI= V

CCZB

OE 1.2 V to 3.6 V 1.65 V to 5.5 V 3 4 pF

A port 5 6

B port 11 14

IO= 0, μA OE = GND

6.6 Timing Requirements: V

TA= 25°C, V

CCA

= 1.2 V

or GND,

CCI

or GND, 1.2 V 1.65 V to 5.5 V 0.05

CCI

or GND, 1.2 V 1.65 V to 5.5 V 3.3

CCI

CCA

Data rate 20 20 20 20 Mbps

Pulse duration Data inputs 50 50 50 50 ns

CCA

1.2 V 1.65 V to 5.5 V 3.5

1.4 V to 3.6 V 1.65 V to 5.5 V 10

1.4 V to 3.6 V 1.65 V to 5.5 V 5

1.2 V to 3.6 V 1.65 V to 5.5 V pF

= 1.2 V

CCB

= 1.8 V V

CCB

TYP TYP TYP TYP

TA= 25°C –40°C to 85°C

MIN TYP MAX MIN MAX

= 2.5 V V

= 3.3 V V

CCB

= 5 V

UNIT

μA

UNIT

6.7 Timing Requirements: V

= 1.5 V ± 0.1 V

CCA

over recommended operating free-air temperature range, V

Data rate 40 40 40 40 Mbps

Pulse duration Data inputs 25 25 25 25 ns

6.8 Timing Requirements: V

= 1.8 V ± 0.15 V

CCA

over recommended operating free-air temperature range, V

Data rate 60 60 60 60 Mbps

Pulse duration Data inputs 17 17 17 17 ns

6.9 Timing Requirements: V

= 2.5 V ± 0.2 V

CCA

over recommended operating free-air temperature range, V

Data rate 100 100 100 Mbps

Pulse duration Data inputs 10 10 10 ns

= 1.5 V ± 0.1 V (unless otherwise noted)

CCA

= 1.8 V V

CCB

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

= 2.5 V V

CCB

= 3.3 V V

CCB

= 5 V

MIN MAX MIN MAX MIN MAX MIN MAX

= 1.8 V ± 0.15 V (unless otherwise noted)

CCA

= 1.8 V V

CCB

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

= 2.5 V V

CCB

= 3.3 V V

CCB

= 5 V

MIN MAX MIN MAX MIN MAX MIN MAX

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V V

CCB

± 0.2 V ± 0.3 V ± 0.5 V

= 3.3 V V

CCB

= 5 V

MIN MAX MIN MAX MIN MAX

UNIT

Product Folder Links: TXB0104

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

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6.10 Timing Requirements: V

over recommended operating free-air temperature range, V

= 3.3 V ± 0.3 V

CCA

= 3.3 V ± 0.3 V (unless otherwise noted)

CCA

= 3.3 V V

CCB

± 0.3 V ± 0.5 V

CCB

= 5 V

MIN MAX MIN MAX

Data rate 100 100 Mbps

6.11 Switching Characteristics: V

TA= 25°C, V

PARAMETER UNIT

Pulse duration Data inputs 10 10 ns

= 1.2 V

CCA

= 1.2 V

CCA

trA, t trB, t t

SK(O)

= 1.8 V V

FROM TO

(INPUT) (OUTPUT)

CCB

TYP TYP TYP TYP

A B 6.9 5.7 5.3 5.5

dis

fA fB

B A 7.4 6.4 6 5.8

OE μs

OE ns

A 1 1 1 1 B 1 1 1 1 A 18 15 14 14

B 20 17 16 16 A-port rise and fall times 4.2 4.2 4.2 4.2 ns B-port rise and fall times 2.1 1.5 1.2 1.1 ns

Channel-to-channel skew 0.4 0.5 0.5 1.4 ns

= 2.5 V V

CCB

= 3.3 V V

CCB

= 5 V

Max data rate 20 20 20 20 Mbps

UNIT

6.12 Switching Characteristics: V

over recommended operating free-air temperature range, V

PARAMETER UNIT

dis

trA, t

trB, t

SK(O)

FROM TO

(INPUT) (OUTPUT)

A B 1.4 12.9 1.2 10.1 1.1 10 0.8 9.9 B A 0.9 14.2 0.7 12 0.4 11.7 0.3 13.7

OE μs

OE ns

A-port rise and fall times 1.4 5.1 1.4 5.1 1.4 5.1 1.4 5.1 ns B-port rise and fall times 0.9 4.5 0.6 3.2 0.5 2.8 0.4 2.7 ns

Channel-to-channel skew 0.5 0.5 0.5 0.5 ns

= 1.5 V ± 0.1 V

CCA

= 1.5 V ± 0.1 V (unless otherwise noted)

CCA

= 1.8 V V

CCB

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

= 2.5 V V

CCB

= 3.3 V V

CCB

= 5 V

MIN MAX MIN MAX MIN MAX MIN MAX

A 1 1 1 1

B 1 1 1 1

A 5.9 31 5.7 25.9 5.6 23 5.7 22.4

B 5.4 30.3 4.9 22.8 4.8 20 4.9 19.5

Max data rate 40 40 40 40 Mbps

6.13 Switching Characteristics: V

over recommended operating free-air temperature range, V

PARAMETER UNIT

FROM TO

(INPUT) (OUTPUT)

A B 1.6 11 1.4 7.7 1.3 6.8 1.2 6.5 B A 1.5 12 1.3 8.4 1 7.6 0.9 7.1

OE μs

= 1.8 V ± 0.15 V

CCA

= 1.8 V ± 0.15 V (unless otherwise noted)

CCA

= 1.8 V V

CCB

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

= 2.5 V V

CCB

= 3.3 V V

CCB

= 5 V

MIN MAX MIN MAX MIN MAX MIN MAX

A 1 1 1 1

B 1 1 1 1

Product Folder Links: TXB0104

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TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

Switching Characteristics: V

over recommended operating free-air temperature range, V

PARAMETER UNIT

dis

trA, t

trB, t

SK(O)

FROM TO

(INPUT) (OUTPUT)

OE ns

A-port rise and fall times 1 4.2 1.1 4.1 1.1 4.1 1.1 4.1 ns B-port rise and fall times 0.9 3.8 0.6 3.2 0.5 2.8 0.4 2.7 ns

Channel-to-channel skew 0.5 0.5 0.5 0.5 ns

= 1.8 V ± 0.15 V (continued)

CCA

= 1.8 V ± 0.15 V (unless otherwise noted)

CCA

= 1.8 V V

CCB

± 0.15 V ± 0.2 V ± 0.3 V ± 0.5 V

MIN MAX MIN MAX MIN MAX MIN MAX

A 5.9 31 5.1 21.3 5 19.3 5 17.4

B 5.4 30.3 4.4 20.8 4.2 17.9 4.3 16.3

= 2.5 V V

CCB

= 3.3 V V

CCB

= 5 V

Max data rate 60 60 60 60 Mbps

6.14 Switching Characteristics: V

over recommended operating free-air temperature range, V

PARAMETER UNIT

dis

trA, t

trB, t

SK(O)

FROM TO

(INPUT) (OUTPUT)

A B 1.1 6.3 1 5.2 0.9 4.7 B A 1.2 6.6 1.1 5.1 0.9 4.4

OE μs

OE ns

A-port rise and fall times 0.8 3 0.8 3 0.8 3 ns B-port rise and fall times 0.7 2.6 0.5 2.8 0.4 2.7 ns

Channel-to-channel skew 0.5 0.5 0.5 ns

= 2.5 V ± 0.2 V

CCA

= 2.5 V ± 0.2 V (unless otherwise noted)

CCA

= 2.5 V V

CCB

± 0.2 V ± 0.3 V ± 0.5 V

= 3.3 V V

CCB

MIN MAX MIN MAX MIN MAX

A 1 1 1 B 1 1 1 A 5.1 21.3 4.6 15.2 4.6 13.2 B 4.4 20.8 3.8 16 3.9 13.9

CCB

= 5 V

Max data rate 100 100 100 Mbps

6.15 Switching Characteristics: V

over recommended operating free-air temperature range, V

PARAMETER UNIT

dis

trA, t

trB, t

SK(O)

FROM TO

(INPUT) (OUTPUT)

A B 0.9 4.7 0.8 4 B A 1 4.9 0.9 3.8

OE μs

OE ns

A-port rise and fall times 0.7 2.5 0.7 2.5 ns B-port rise and fall times 0.5 2.1 0.4 2.7 ns

Channel-to-channel skew 0.5 0.5 ns

= 3.3 V ± 0.3 V

CCA

= 3.3 V ± 0.3 V (unless otherwise noted)

CCA

= 3.3 V V

CCB

± 0.3 V ± 0.5 V

CCB

= 5 V

MIN MAX MIN MAX

A 1 1 B 1 1 A 4.6 15.2 4.3 12.1 B 3.8 16 3.4 13.2

Max data rate 100 100 Mbps

Product Folder Links: TXB0104

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

6.16 Operating Characteristics

TA= 25°C

CCA

1.2 V 1.2 V 1.5 V 1.8 V 2.5 V 2.5 V 3.3 V V

PARAMETER TEST CONDITIONS UNIT

5 V 1.8 V 1.8 V 1.8 V 2.5 V 5 V to

TYP TYP TYP TYP TYP TYP TYP

A-port input, B-port output 7.8 10 9 8 8 8 9

pdA

B-port input, A-port output 12 11 11 11 11 11 11 A-port input, B-port output 38.1 28 28 28 29 29 29

pdB

B-port input, A-port output 25.4 19 18 18 19 21 22 A-port input, B-port output 0.01 0.01 0.01 0.01 0.01 0.01 0.01

pdA

B-port input, A-port output 0.01 0.01 0.01 0.01 0.01 0.01 0.01 A-port input, B-port output 0.01 0.01 0.01 0.01 0.01 0.01 0.03

pdB

B-port input, A-port output 0.01 0.01 0.01 0.01 0.01 0.01 0.04

CL= 0, f = 10 MHz,

tr= tf= 1 ns,

OE = V

(outputs enabled)

CCA

CL= 0, f = 10 MHz,

tr= tf= 1 ns,

OE = GND

(outputs disabled)

CCB

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3.3 V 5 V

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6.17 Typical Characteristics

= 3.3 V

CCB

Figure 1. Input capacitance for OE pin (CI) vs Power Supply

)

CCA

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

= 3.3 V

CCB

Figure 2. Capacitance for A port I/O pins (CiO) vs Power

Supply (V

CCA

)

= 1.8 V

CCA

Figure 3. Capacitance for B port I/O pins (CiO) vs Power Supply (V

CCB

)

Product Folder Links: TXB0104

From Output

Under Test

LOAD CIRCUIT FOR

ENABLE/DISABLE

TIME MEASUREMENT

2 × V

CCO

Open

50 kW

CCI

0 V

CCI

/2 V

CCI

VOLTAGE WAVEFORMS

PROPAGATION DELAY TIMES

VOLTAGE WAVEFORMS

PULSE DURATION

Input

PZL/tPLZ

PHZ/tPZH

2 × V

CCO

Open

TEST S1

A. CL includes probe and jig capacitance.

B. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. C. The outputs are measured one at a time, with one transition per measurement. D. t

PLH

and t

PHL

are the same as tpd.

E. V

CCI

is the VCC associated with the input port.

F. V

CCO

is the VCC associated with the output port.

G. All parameters and waveforms are not applicable to all devices.

50 kW

From Output

Under Test

1 MW

15 pF

LOAD CIRCUIT FOR MAX DATA RATE,

PULSE DURATION PROPAGATION

DELAY OUTPUT RISE AND FALL TIME

MEASUREMENT

PLH

PHL

0 V

CCO

CCI

/2 V

CCI

0.9 y V

CCO

0.1 y V

CCO

CCI

Input

Output

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

7 Parameter Measurement Information

www.ti.com

Figure 4. Load Circuits and Voltage Waveforms

Product Folder Links: TXB0104

TXB0104

www.ti.com

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

8 Detailed Description

8.1 Overview

The TXB0104 device is a 4-bit, directionless voltage-level translator specifically designed for translating logic voltage levels. The A port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept I/O voltages from 1.65 V to 5.5 V. The device is a buffered architecture with edge-rate accelerators (one-shots) to improve the overall data rate. This device can only translate push-pull CMOS logic outputs. If for open-drain signal translation, please refer to TI’s TXS010X products.

8.2 Functional Block Diagram

Product Folder Links: TXB0104

VT/4 kW

–(V

– V

)/4 kW

A. VT is the input threshold voltage of the TXB0104 (typically V

CCI

/2).

B. VD is the supply voltage of the external driver.

A B

CCA

CCB

One Shot

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

www.ti.com

8.3 Feature Description

8.3.1 Architecture

The TXB0104 architecture (see Figure 5) does not require a direction-control signal to control the direction of data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0104 can maintain a high or low, but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts flowing the opposite direction.

The output one-shots detect rising or falling edges on the A or B ports. During a rising edge, the one-shot turns on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly, during a falling edge, the one-shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up the high-to-low transition. The typical output impedance during output transition is 70 Ω at V 50 Ω at V

= 1.8 V to 3.3 V, and 40 Ω at V

CCO

= 3.3 V to 5 V.

CCO

= 1.2 V to 1.8 V,

CCO

8.3.2 Input Driver Requirements

Typical IINvs VINcharacteristics of the TXB0104 are shown in Figure 6. For proper operation, the device driving the data I/Os of the TXB0104 must have drive strength of at least ±2 mA.

Figure 5. Architecture of TXB0104 I/O Cell

Figure 6. Typical IINvs VINCurve

Product Folder Links: TXB0104

TXB0104

www.ti.com

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

Feature Description (continued)

8.3.3 Output Load Considerations

TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay on for approximately 10 ns. The maximum capacitance of the lumped load that can be driven also depends directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance that the TXB0104 output sees, so it is recommended that this lumped-load capacitance be considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level affects.

8.3.4 Enable and Disable

The TXB0104 has an OE input that is used to disable the device by setting OE = low, which places all I/Os in the high-impedance (Hi-Z) state. The disable time (t outputs acutally get disabled (Hi-Z). The enable time (ten) indicates the amount of time the user must allow for the one-shot circuitry to become operational after OE is taken high.

8.3.5 Pullup or Pulldown Resistors on I/O Lines

The TXB0104 is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0104 have low dc drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must be kept higher than 50 kΩ to ensure that they do not contend with the output drivers of the TXB0104.

For the same reason, the TXB0104 should not be used in applications such as I2C or 1-Wire where an opendrain driver is connected on the bidirectional data I/O. For these applications, use a device from the TI TXS01xx series of level translators.

) indicates the delay between when OE goes low and when the

dis

8.4 Device Functional Modes

The TXB0104 device has two functional modes, enabled and disabled. To disable the device, set the OE input to low, which places all I/Os in a high impedance state. Setting the OE input to high will enable the device.

Product Folder Links: TXB0104

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

www.ti.com

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

The TXB0104 can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. It can only translate push-pull CMOS logic outputs. If for open-drain signal translation, please refer to TI TXS010X products. Any external pulldown or pullup resistors are recommended larger than 50 kΩ.

9.2 Typical Application

9.2.1 Design Requirements

For this design example, use the parameters listed in Table 1. And make sure the V

CCA≤VCCB

Table 1. Design Parameters

DESIGN PARAMETERS EXAMPLE VALUE

Input voltage range 1.2 V to 3.6 V

Output voltage range 1.65 V to 5.5 V

9.2.2 Detailed Design Procedure

To begin the design process, determine the following:

• Input voltage range

- Use the supply voltage of the device that is driving the TXB0104 device to determine the input voltage range. For a valid logic high the value must exceed the VIHof the input port. For a valid logic low the value must be less than the VILof the input port.

• Output voltage range

- Use the supply voltage of the device that the TXB0104 device is driving to determine the output voltage range.

- Don’t recommend to have the external pullup or pulldown resistors. If mandatory, it is recommended the value should be larger than 50 kΩ.

• An external pulldown or pullup resistor decreases the output VOHand VOL. Use the below equations to draft estimate the VOHand VOLas a result of an external pulldown and pullup resistor.

VOH= V VOL= V

× RPD/ (RPD+ 4.5 kΩ)

CCx

× 4.5 kΩ / (RPU+ 4.5 kΩ)

CCx

Product Folder Links: TXB0104

www.ti.com

Where

• V

is the output port supply voltage on either V

CCx

• RPDis the value of the external pull down resistor

• RPUis the value of the external pull up resistor

• 4.5 kΩ is the counting the variation of the serial resistor 4 kΩ in the I/O line.

9.2.3 Application Curves

CCA

or V

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

CCB

Figure 7. Level-Translation of a 2.5-MHz Signal

Product Folder Links: TXB0104

TXB0104

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

10 Power Supply Recommendations

www.ti.com

During operation, ensure that V

CCA

≤ V

at all times. During power-up sequencing, V

CCB

CCA

≥ V

CCB

does not damage the device, so any power supply can be ramped up first. The TXB0104 has circuitry that disables all output ports when either VCCis switched off (V that it is supplied by V

and when the (OE) input is low, all outputs are placed in the high-impedance state. To

CCA

= 0 V). The output-enable (OE) input circuit is designed so

CCA/B

ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to GND through a pulldown resistor and must not be enabled until V

CCA

and V

are fully ramped and stable. The

CCB

minimum value of the pulldown resistor to ground is determined by the current-sourcing capability of the driver.

11 Layout

11.1 Layout Guidelines

To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.

• Bypass capacitors should be used on power supplies. And should be placed as close as possible to the V

pin and GND pin

CCB

• Short trace-lengths should be used to avoid excessive loading.

• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than

the one-shot duration, approximately 10 ns, ensuring that any reflection encounters low impedance at the source driver.

11.2 Layout Example

CCA

Product Folder Links: TXB0104

TXB0104

www.ti.com

SCES650G –APRIL 2006–REVISED NOVEMBER 2014

12 Device and Documentation Support

12.1 Trademarks

All trademarks are the property of their respective owners.

12.2 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

12.3 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Product Folder Links: TXB0104

PACKAGE OPTION ADDENDUM

www.ti.com

29-Oct-2014

PACKAGING INFORMATION

Orderable Device Status

TXB0104D ACTIVE SOIC D 14 50 Green (RoHS

TXB0104DG4 ACTIVE SOIC D 14 50 Green (RoHS

TXB0104DR ACTIVE SOIC D 14 2500 Green (RoHS

TXB0104DRG4 ACTIVE SOIC D 14 2500 Green (RoHS

TXB0104PWR ACTIVE TSSOP PW 14 2000 Green (RoHS

TXB0104PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS

TXB0104RGYR ACTIVE VQFN RGY 14 3000 Green (RoHS

TXB0104RGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS

TXB0104RUTR ACTIVE UQFN RUT 12 3000 Green (RoHS

TXB0104YZTR ACTIVE DSBGA YZT 12 3000 Green (RoHS

TXB0104ZXUR ACTIVE BGA

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

Package Type Package

(1)

MICROSTAR

JUNIOR

Drawing

Pins Package

Qty

Eco Plan

(2)

& no Sb/Br)

ZXU 12 2500 Green (RoHS

& no Sb/Br)

Lead/Ball Finish

(6)

MSL Peak Temp

(3)

Op Temp (°C) Device Marking

CU NIPDAU Level-1-260C-UNLIM -40 to 85 TXB0104

CU NIPDAU Level-1-260C-UNLIM -40 to 85 YE04

CU NIPDAU Level-2-260C-1 YEAR -40 to 85 YE04

CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 2KR

SNAGCU Level-1-260C-UNLIM -40 to 85 (2K ~ 2K7)

SNAGCU Level-1-260C-UNLIM -40 to 85 YE04

(4/5)

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Samples

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

29-Oct-2014

(3)

MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)

There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)

Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish

value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TXB0104 :

Automotive: TXB0104-Q1

•

NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com 17-Jun-2015

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

TXB0104DR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

TXB0104PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1

TXB0104RGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1

TXB0104RUTR UQFN RUT 12 3000 180.0 8.4 1.95 2.3 0.75 4.0 8.0 Q1 TXB0104YZTR DSBGA YZT 12 3000 180.0 8.4 1.49 1.99 0.75 4.0 8.0 Q2 TXB0104ZXUR BGA MI

CROSTA

R JUNI

Type

Package Drawing

Pins SPQ Reel

Diameter

(mm)

ZXU 12 2500 330.0 8.4 2.3 2.8 1.0 4.0 8.0 Q2

Reel

Width

W1 (mm)

(mm)B0(mm)K0(mm)P1(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 17-Jun-2015

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TXB0104DR SOIC D 14 2500 367.0 367.0 38.0

TXB0104PWR TSSOP PW 14 2000 367.0 367.0 35.0

TXB0104RGYR VQFN RGY 14 3000 367.0 367.0 35.0

TXB0104RUTR UQFN RUT 12 3000 202.0 201.0 28.0 TXB0104YZTR DSBGA YZT 12 3000 182.0 182.0 20.0 TXB0104ZXUR BGA MICROSTAR

JUNIOR

ZXU 12 2500 338.1 338.1 20.6

Pack Materials-Page 2

D: Max =

1.89 mm, Min =

1.83 mm

E: Max =

1.39 mm, Min =

1.33 mm

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards.

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Datasheet TXB0104D, TXB0104PWR, TXB0104RUTR, TXB0104YZTR, TXB0104ZXUR Datasheet (Texas Instruments) [ru]

Specifications and Main Features

Frequently Asked Questions

User Manual

1 Features 3 Description

2 Applications

Table of Contents

4 Revision History

5 Pin Configuration and Functions

6 Specifications

6.1 Absolute Maximum Ratings

6.2 Handling Ratings

6.3 Recommended Operating Conditions

6.4 Thermal Information

6.5 Electrical Characteristics

6.16 Operating Characteristics

6.17 Typical Characteristics

7 Parameter Measurement Information

8 Detailed Description

8.1 Overview

8.2 Functional Block Diagram

8.3 Feature Description

8.3.1 Architecture

8.3.2 Input Driver Requirements

8.3.3 Output Load Considerations

8.3.4 Enable and Disable

8.3.5 Pullup or Pulldown Resistors on I/O Lines

8.4 Device Functional Modes

9 Application and Implementation

9.1 Application Information

9.2 Typical Application

9.2.1 Design Requirements

9.2.2 Detailed Design Procedure

9.2.3 Application Curves

10 Power Supply Recommendations

11 Layout

11.1 Layout Guidelines

11.2 Layout Example

12 Device and Documentation Support

12.1 Trademarks

12.2 Electrostatic Discharge Caution

12.3 Glossary

13 Mechanical, Packaging, and Orderable Information