TEXAS INSTRUMENTS TUSB2046B, TUSB2046BI Technical data

RHB PACKAGE

(TOP VIEW)

VF PACKAGE

(TOP VIEW)

TUSB2046B

TUSB2046BI

www.ti.com

4-PORT HUB FOR THE UNIVERSAL SERIAL BUS

WITH OPTIONAL SERIAL EEPROM INTERFACE

Check for Samples: TUSB2046B, TUSB2046BI

1

FEATURES

• Fully Compliant With the USB Specification as
a Full-Speed Hub: TID #30220231

• 32-Terminal LQFP
Terminal Pitch or QFN Package with a 0.5-mm
Terminal Pitch

• 3.3-V Low Power ASIC Logic

• Integrated USB Transceivers

• State Machine Implementation Requires No

Firmware Programming

• One Upstream Port and Four Downstream
Ports

• All Downstream Ports Support Full-Speed and
Low-Speed Operations

• Two Power Source Modes
– Self-Powered Mode
– Bus-Powered Mode

• Power Switching and Overcurrent Reporting Is

Provided Ganged or Per Port

• Supports Suspend and Resume Operations

• Supports Programmable Vendor ID and

Product ID With External Serial EEPROM

• 3-State EEPROM Interface Allows EEPROM
Sharing

• Push-Pull Outputs for PWRON Eliminate the
Need for External Pullup Resistors

• Noise Filtering on OVRCUR Provides Immunity
to Voltage Spikes

• Package Pinout Allows 2-Layer PCB

• Low EMI Emission Achieved by a 6-MHz

Crystal Input

• Migrated From Proven TUSB2040 Hub

• Lower Cost Than the TUSB2040 Hub

• Enhanced System ESD Performance

• Supports 6-MHz Operation Through a Crystal

(1) JEDEC descriptor S-PQFP-G for low profile quad flat pack

Input or a 48-MHz Input Clock

(LQFP).

(1)

Package With a 0.8-mm

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2000–2011, Texas Instruments Incorporated

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

www.ti.com

DESCRIPTION/ORDERING INFORMATION

The TUSB2046B is a 3.3-V CMOS hub device that provides one upstream port and four downstream ports in
compliance with the Universal Serial Bus (USB) specification as a full-speed hub. Because this device is
implemented with a digital state machine instead of a microcontroller, no firmware programming is required.
Fully-compliant USB transceivers are integrated into the ASIC for all upstream and downstream ports. The
downstream ports support both full-speed and low-speed devices by automatically setting the slew rate according
to the speed of the device attached to the ports. The configuration of the BUSPWR terminal selects either the
bus-powered or the self-powered mode.

Configuring the GANGED input determines the power switching and overcurrent detection modes for the
downstream ports. External power-management devices, such as the TPS2044, are required to control the 5-V
source to the downstream ports according to the corresponding values of the PWRON terminal. Upon detecting
any overcurrent conditions, the power-management device sets the corresponding OVRCUR terminal of the
TUSB2046B to a logic low. If GANGED is high, all PWRON outputs switch together and if any OVRCUR is
activated, all ports transition to the power-off state. If GANGED is low, the PWRON outputs and OVRCUR inputs
operate on a per-port basis.

The TUSB2046B provides the flexibility of using a 6-MHz or a 48-MHz clock. The logic level of the TSTMODE
terminal controls the selection of the clock source. When TSTMODE is low, the output of the internal APLL
circuitry is selected to drive the internal core of the device. When TSTMODE is high, the TSTPLL/48MCLK input
is selected as the input clock source and the APLL circuitry is powered down and bypassed. The internal
oscillator cell is also powered down while TSTMODE is high.

Low EMI emission is achieved because the TUSB2046B is able to utilize a 6-MHz crystal input. Connect the
crystal as shown in Figure 6. An internal PLL then generates the 48-MHz clock used to sample data from the
upstream port and to synchronize the 12 MHz used for the USB clock. If low-power suspend and resume are
desired, a passive crystal or resonator must be used. However, a 6-MHz oscillator may be used by connecting
the output to the XTAL1 terminal and leaving the XTAL2 terminal open. The oscillator TTL output must not
exceed 3.6 V.

For 48-MHz operation, the clock cannot be generated with a crystal using the XTAL2 output because the internal
oscillator cell supports only the fundamental frequency.

See Figure 7 and Figure 8 in the input clock configuration section for more detailed information regarding the
input clock configuration.

The EXTMEM terminal enables or disables the optional EEPROM interface. When the EXTMEM terminal is high,
the product ID (PID) displayed during enumeration is the general-purpose USB hub. For this default, terminal 5 is
disabled and terminal 6 functions as the GANGED input terminal. If custom PID and vendor ID (VID) descriptors
are desired, the EXTMEM terminal must be low (EXTMEM = 0). For this configuration, terminals 5 and 6 function
as the EEPROM interface with terminals 5 and 6 functioning as EECLK and EEDATA, respectively. See Table 1
for a description of the EEPROM memory map.

Other useful features of the TUSB2046B include a package with a 0.8-mm terminal pitch for easy PCB routing
and assembly, push-pull outputs for the PWRON terminals eliminate the need for pullup resistors required by
traditional open-collector I/Os, and OVRCUR terminals have noise filtering for increased immunity to voltage
spikes.

2 Copyright © 2000–2011, Texas Instruments Incorporated

SUSPND

XTAL1

XTAL2

RESET

TSTPLL/48MCLK

EEDATA/GANGED

EECLK

10, 14, 18, 22

8

5

6

26

4

29

30

27

32

1

2

24

23 20 19 16 15 12 11

9, 13, 17, 21

BUSPWR

OVRCUR1 OVRCUR4–

PWRON1 PWRON4–

EXTMEM

DP0

DP4

DP3

DP2

DP1

DM0

DM4

DM3

DM2 DM1

USB

Transceiver

Suspend/Resume

Logic and

Frame Timer

HUB Repeater

SIE

USB

Transceiver

USB

Transceiver

USB

Transceiver

USB

Transceiver

OSC/PLL

Serial
EEPROM
Interface

Hub/Device

Command

Decoder

Port 4
Logic

Port 3
Logic

Port 2
Logic

Port 1
Logic

SIE Interface

Logic

Hub

Power

Logic

TUSB2046B

TUSB2046BI

www.ti.com

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

ORDERING INFORMATION

T

A

PACKAGE

0°C to 70°C LQFP – VF TUSB2046B

LQFP – VF Reel of 1000 USB2046BI

–40°C to 85°C Reel of 250 TUSB2046BIRHB

QFN – RHB Reel of 3000 TUSB2046BIRHBR

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(1)

Reel of 250

Reel of 1000

ORDERABLE PART NUMBER TOP-SIDE MARKING

TUSB2046BVF
TUSB2046BVFG4
TUSB2046BVFR
TUSB2046BVFRG4
TUSB2046BIVFR
TUSB2046BIVFRG4

Reel of 250 TUSB2046BIRHBT

TUSB
2046BI

FUNCTIONAL BLOCK DIAGRAM

Copyright © 2000–2011, Texas Instruments Incorporated 3

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

www.ti.com

TERMINAL FUNCTIONS

TERMINAL

NAME NO.

BUSPWR 8 I

DM0 2 I/O Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port.
DM1–DM4 I/O
DP0 1 I/O Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port.
DP1–DP4 I/O

EECLK 5 O terminal is disabled and must be left floating (unconnected). When EXTMEM is low, EECLK acts

EEDATA/
GANGED

EXTMEM 26 I low, terminals 5 and 6 are configured as the clock and data terminals of the serial EEPROM

GND 7, 28 GND terminals must be tied to ground for proper operation.

OVRCUR1 – 10, 14, overcurrent input is available for each of the four downstream ports. In the ganged mode, any
OVRCUR4 18, 22 OVRCUR input may be used and all OVRCUR terminals must be tied together. OVRCUR

PWRON1 – 9, 13, outputs eliminate the pullup resistors which open-drain outputs require. However, the external
PWRON4 17, 21 power switches that connect to these terminals must be able to operate with 3.3-V inputs because

RESET 4 I

SUSPND 32 O

TSTMODE 31 I

TSTPLL/
48MCLK

V

CC

XTAL1 30 I

XTAL2 29 O

11, 15, USB differential data minus. DM1–DM4 paired with DP1–DP4 support up to four downstream USB

19, 23 ports.

12, 16, USB differential data plus. DP1–DP4 paired with DM1–DM4 support up to four downstream USB

20, 24 ports.

6 I/O downstream ports. When EXTMEM is low, EEDATA/GANGED acts as a serial data I/O for the

27 I/O This terminal must be tied to ground for normal 6-MHz operation. If 48-MHz input clock is desired,

3, 25 3.3-V supply voltage

I/O DESCRIPTION

Power source indicator. BUSPWR is an active-high input that indicates whether the downstream
ports source their power from the USB cable or a local power supply. For the bus-power mode,
this terminal must be pulled to 3.3 V, and for the self-powered mode, this terminal must be pulled
low. Input must not change dynamically during operation.

EEPROM serial clock. When EXTMEM is high, the EEPROM interface is disabled. The EECLK
as a 3-state serial clock output to the EEPROM with a 100-μA internal pulldown.

EEPROM serial data/power-management mode indicator. When EXTMEM is high,
EEDATA/GANGED selects between ganged or per-port power overcurrent detection for the

EEPROM and is internally pulled down with a 100-μA pulldown. This standard TTL input must not
change dynamically during operation.

When EXTMEM is high, the serial EEPROM interface of the device is disabled. When EXTMEM is
interface, respectively.

Overcurrent input. OVRCUR1–OVRCUR4 are active low. For per-port overcurrent detection, one

I

terminals are active low inputs with noise filtering logic.
Power-on/-off control signals. PWRON1–PWRON4 are active low, push-pull outputs. Push-pull

O

these outputs cannot drive 5-V signals.
RESET is an active low TTL input with hysteresis and must be asserted at power up. When

RESET is asserted, all logic is initialized. Generally, a reset with a pulse width between 100 μs
and 1 ms is recommended after 3.3-V VCCreaches its 90%. Clock signal has to be active during
the last 60 μs of the reset window.

Suspend status. SUSPND is an active high output available for external logic power-down
operations. During the suspend mode, SUSPND is high. SUSPND is low for normal operation.

Test/mode terminal. TSTMODE is used as a test terminal during production testing. This terminal
must be tied to ground or 3.3-V VCCfor normal 6-MHz or 48-MHz operation, respectively.

Test/48-MHz clock input. TSTPLL/48MCLK is used as a test terminal during production testing.
a 48-MHz clock source (no crystal) can be connected to this input terminal.

Crystal 1. XTAL1 is a 6-MHz crystal input with 50% duty cycle. An internal PLL generates the
48-MHz and 12-MHz clocks used internally by the ASIC logic.

Crystal 2. XTAL2 is a 6-MHz crystal output. This terminal must be left open when using an
oscillator.

4 Copyright © 2000–2011, Texas Instruments Incorporated

TUSB2046B

TUSB2046BI

www.ti.com

ABSOLUTE MAXIMUM RATINGS

(1)

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V
V
V
I
I
T

T

Supply voltage range

CC

Input voltage range –0.5 VCC+ 0.5 V

I

Output voltage range –0.5 VCC+ 0.5 V

O

Input clamp current VI< 0 V or VI< V

IK

Output clamp current VO< 0 V or VO< V

OK

Storage temperature range –65 150 °C

stg

Operating free-air temperature range °C

A

(2)

CC

CC

–0.5 3.6 V

±20 mA
±20 mA

TUSB2046B 0 70
TUSB2046BI –40 85

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage levels are with respect to GND.

RECOMMENDED OPERATING CONDITIONS

PARAMETER MIN NOM MAX UNIT

V

CC

V

I

V

O

V

IH(REC)

V

IL(REC)

V

IH(TTL)

V

IL(TTL)

T

A

R

(DRV)

f

(OPRH)

f

(OPRL)

V

ICR

t

t

T

J

Supply voltage V

Input voltage, TTL/LVCMOS 0 V
Output voltage, TTL/LVCMOS 0 V
High-level input voltage, signal-ended receiver 2 V
Low-level input voltage, signal-ended receiver 0.8 V
High-level input voltage, TTL/LVCMOS 2 V
Low-level input voltage, TTL/LVCMOS 0 0.8 V

Operating free-air temperature °C

External series, differential driver resistor 22 (–5%) 22 (5%) Ω
Operating (dc differential driver) high speed mode 12 Mb/s
Operating (dc differential driver) low speed mode 1.5 Mb/s
Common mode, input range, differential receiver 0.8 2.5 V
Input transition times, TTL/LVCMOS 0 25 ns
Junction temperature range –40 115 °C

TUSB2046B 3 3.3 3.6
TUSB2046BI 3.3 3.6

CC
CC
CC

CC

TUSB2046B 0 70
TUSB2046BI –40 85

V
V
V

V

Copyright © 2000–2011, Texas Instruments Incorporated 5

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

ELECTRICAL CHARACTERISTICS

over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

TTL/LVCMOS IOH= –4 mA VCC– 0.5

V

OH

V

OL

V

IT+

V

IT–

V

hys

I

OZ

I

IL

I

IH

z

0(DRV)

V

ID

I

CC

(1) Applies for input buffers with hysteresis.
(2) Applies for open drain buffers.

High-level output voltage R

USB data lines

= 15 kΩ to GND 2.8 V

(DRV)

IOH= –12 mA (without R

) VCC– 0.5

(DRV)

TTL/LVCMOS IOL= 4 mA 0.5

Low-level output voltage R

Positive input threshold V

Negative-input threshold V

Input hysteresis

(1)

(VT+– VT–)

High-impedance output current μA

USB data lines

TTL/LVCMOS 1.8
Single-ended 0.8 V ≤ V
TTL/LVCMOS 0.8
Single-ended 0.8 V ≤ V
TTL/LVCMOS 0.3 0.7
Single-ended 0.8 V ≤ V
TTL/LVCMOS V = VCCor GND
USB data lines 0 V ≤ VO≤ V

= 1.5 kΩ to 3.6 V 0.3 V

(DRV)

IOL= 12 mA (without R

≤ 2.5 V 1.8

ICR

≤ 2.5 V 1

ICR

≤ 2.5 V 300 500

ICR

(2)

CC

) 0.5

(DRV)

Low-level input current TTL/LVCMOS VI= GND –1 μA
High-level input current TTL/LVCMOS VI= V
Driver output impedance USB data lines Static VOHor V
Differential input voltage USB data lines 0.8 V ≤ V

Input supply current

CC

OL

≤ 2.5 V 0.2 V

ICR

7.1 19.9 Ω

Normal operation 40 mA
Suspend mode 1 μA

www.ti.com

mV

±10
±10

1 μA

DIFFERENTIAL DRIVER SWITCHING CHARACTERISTICS Full Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, CL= 50 pF (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

t

r

t

f

t

(RFM)

V

(1) Characterized only. Limits are approved by design and are not production tested.

Transition rise time for DP or DM See Figure 1 and Figure 2 4 20 ns
Transition fall time for DP or DM See Figure 1 and Figure 2 4 20 ns
Rise/fall time matching
Signal crossover output voltage

O(CRS)

(1)

(1)

(tr/tf) × 100 90 110 %

1.3 2.0 V

DIFFERENTIAL DRIVER SWITCHING CHARACTERISTICS Low Speed Mode

over recommended ranges of operating free-air temperature and supply voltage, CL= 50 pF (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN MAX UNIT

t

r

t

f

t

(RFM)

V

Transition rise time for DP or DM
Transition fall time for DP or DM
Rise/fall time matching
Signal crossover output voltage

O(CRS)

(1)

(1) Characterized only. Limits are approved by design and are not production tested.

(1)

CL= 200 pF to 600 pF, See Figure 1 and Figure 2 75 300 ns

(1)

CL= 200 pF to 600 pF, See Figure 1 and Figure 2 75 300 ns
(tr/tf) × 100 80 120 %

(1)

CL= 200 pF to 600 pF 1.3 2.0 V

6 Copyright © 2000–2011, Texas Instruments Incorporated

15 kΩ

15 kΩ

1.5 kΩ

22 Ω

22 Ω

0.5

0

0 1 2

- Diff erential Receiver Input Sensitivity - V

1

1.5

3 4

V

ID

V

ICR

- Common Mode Input Rang e - V

0.8

3.6

0.2

1.3

2.5

V

hys

V

IT+

V

IT-

V

CC

V

IH

V

IL

0 V

Logic high

Logic low

TUSB2046B

TUSB2046BI

www.ti.com

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

Figure 1. Differential Driver Switching Load

Figure 2. Differential Driver Timing Waveforms

Copyright © 2000–2011, Texas Instruments Incorporated 7

Figure 3. Differential Receiver Input Sensitivity vs Common Mode Input Range

Figure 4. Single-Ended Receiver Input Signal Parameter Definitions

Printer

With 4-Port Hub

(Self-Powered)

Scanner

Digital

Scanner

PC

With Root Hub

Monitor

With 4-Port Hub (Self-Powered)

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

www.ti.com

APPLICATION INFORMATION

A major advantage of USB is the ability to connect 127 functions configured in up to 6 logical layers (tiers) to a
single personal computer (see Figure 5).

Figure 5. USB-Tiered Configuration Example

Another advantage of USB is that all peripherals are connected using a standardized four-wire cable that
provides both communication and power distribution. The power configurations are bus-powered and
self-powered modes. The maximum current that may be drawn from the USB 5-V line during power up is 100
mA. For the bus-powered mode, a hub can draw a maximum of 500 mA from the 5-V line of the USB cable. A
bus-powered hub must always be connected downstream to a self-powered hub unless it is the only hub
connected to the PC and there are no high-powered functions connected downstream. In the self-powered mode,
the hub is connected to an external power supply and can supply up to 500 mA to each downstream port.
High-powered functions may draw a maximum of 500 mA from each downstream port and may only be
connected downstream to self-powered hubs. Per the USB specification, in the bus-powered mode, each
downstream port can provide a maximum of 100 mA of current, and in the self-powered mode, each downstream
port can provide a maximum of 500 mA of current.

Both bus-powered and self-powered hubs require overcurrent protection for all downstream ports. The two types
of protection are individual-port management (individual-port basis) or ganged-port management (multiple-port
basis). Individual-port management requires power-management devices for each individual downstream port,
but adds robustness to the USB system because, in the event of an overcurrent condition, the USB host only
powers down the port that has the condition. The ganged configuration uses fewer power management devices
and thus has lower system costs, but in the event of an overcurrent condition on any of the downstream ports, all
the ganged ports are disabled by the USB host.

Using a combination of the BUSPWR and EEDATA/GANGED inputs, the TUSB2046B supports four modes of
power management: bus-powered hub with either individual-port power management or ganged-port power
management, and the self-powered hub with either individual-port power management or ganged-port power
management. Texas Instruments supplies the complete hub solution with the TUSB2036 (2/3-port), TUSB2046B,
and the TUSB2077 (7-port) hubs along with the power-management devices needed to implement a fully USB
specification-compliant system.

8 Copyright © 2000–2011, Texas Instruments Incorporated

XTAL1

C1 C2

C

L

XTAL2

TUSB2046B

TUSB2046BI

www.ti.com

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

USB Design Notes

The following sections provide block diagram examples of how to implement the TUSB2046B device. Note, even
though no resistors are shown, pullup, pulldown, and series resistors must be used to properly implement this
device.

Figure 6 is an example of how to generate the 6-MHz clock signal.

NOTE: This figure assumes a 6-MHz fundamental crystal that is parallel loaded. The component values of C1, C2, and R

are determined using a crystal from Fox Electronics – part number HC49U-6.00MHz 30\50\0-70\20, which means
±30 ppm at 25°C and ±50 ppm from 0°C to 70°C. The characteristics for the crystal include a load capacitance (CL) of
20 pF, maximum shunt capacitance (Co) of 7 pF, and the maximum ESR of 50 Ω. In order to insure enough negative
resistance, use C1 = C2 = 27 pF. The resistor Rdis used to trim the gain, and Rd= 1.5 kΩ is recommended.

d

Figure 6. Crystal Tuning Circuit

Input Clock Configuration

The input clock configuration logic of TUSB2046B is enhanced to accept a 6-MHz crystal or 48-MHz
on-the-board clock source with a simple tie-off change on TSTMODE (terminal 31).

• A 6-MHz input clock configuration is shown in Figure 7.
In this mode, both TSTMODE and TSTPLL/48MCLK terminals must be tied to ground. The hub is configured

to use the 6-MHz clock on terminals 30 and 29, which are XTAL1 and XTAL2, respectively, on the
TUSB2046B. This is identical to the TUSB2046.

Figure 7. 6-MHz Input Clock Configuration

• A 48-MHz input clock configuration is shown in Figure 8.
In this mode, both TSTMODE and XTAL1 terminals must be tied to 3.3-V VCC. The hub accepts the 48-MHz

clock input on TSTPLL/48MCLK (terminal 27). XTAL2 must be left floating (open) for this configuration. Only
the oscillator or the onboard clock source is accepted for this mode. A crystal can not be used for this mode,
since the chip’s internal oscillator cell only supports the fundamental frequency.

Copyright © 2000–2011, Texas Instruments Incorporated 9

30

29

31

27

XTAL1

XTAL2

TSTMODE

TSTPLL/48MCLK

TUSB2046B USB HUB

Open

48-MHz Oscillator

or on Board Clock Source

3.3 V

Ω

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

www.ti.com

Figure 8. 48-MHz Input Clock Configuration

Figure 9 is a block diagram example of how to connect the external EEPROM if a custom product ID and vendor

ID are desired. Figure 10 shows the EEPROM read operation timing diagram. Figure 11, Figure 12, and

Figure 13 illustrate how to connect the TUSB2046B device for different power source and port

power-management combinations.

10 Copyright © 2000–2011, Texas Instruments Incorporated

Figure 9. Typical Application of the TUSB2046B USB Hub

TUSB2046B

TUSB2046BI

www.ti.com

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

Programming the EEPROM

An SGS Thompson M93C46 EEPROM, or equivalent, stores the programmable VID and PID. When the
EEPROM interface is enabled (EXTMEM = 0), the EECLK and EEDATA are internally pulled down (100 μA)
inside the TUSB2046B. The internal pulldowns are disabled when the EEPROM interface is disabled
(EXTMEM = 1).

The EEPROM is programmed with the three 16-bit locations as shown in Table 1. Connecting terminal 6 of the
EEPROM high (ORG = 1) organizes the EEPROM memory into 64×16-bit words.

Table 1. EEPROM Memory Map

ADDRESS D15 D14 D13 D12–D8 D7–D0

00000 0 GANGED 00000 00000 00000000
00001 VID High-byte VID Low-byte
00010 PID High-byte PID Low-byte

XXXXXXXX

The D and Q signals of the EEPROM must be tied together using a 1-kΩ resistor with the common I/O
operations forming a single-wire bus. After system power-on reset, the TUSB2046B performs a one-time access
read operation from the EEPROM if the EXTMEM terminal is pulled low and the chip select(s) of the EEPROM is
connected to the system power-on reset. Initially, the EEDATA terminal is driven by the TUSB2046B to send a
start bit (1) which is followed by the read instruction (10) and the starting-word address (00000). Once the read
instruction is received, the instruction and address are decoded by the EEPROM, which then sends the data to
the output shift register. At this point, the hub stops driving the EEDATA terminal and the EEPROM starts driving.
A dummy (0) bit is then output and the first three 16-bit words in the EEPROM are output with the most
significant bit (MSB) first.

The output data changes are triggered by the rising edge of the clock provided by the TUSB2046B on the
EECLK terminal. The SGS-Thompson M936C46 EEPROM is recommended because it advances to the next
memory location by automatically incrementing the address internally. Any EEPROM used must have the
automatic internal address advance function. After reading the three words of data from the EEPROM, the
TUSB2046B puts the EEPROM interface into a high-impedance condition (pulled down internally) to allow other
logic to share the EEPROM. The EEPROM read operation is summarized in Figure 10. For more details on
EEPROM operation, refer to SGS-Thompson Microelectronics M93C46 Serial Microwire Bus EEPROM data
sheet.

Copyright © 2000–2011, Texas Instruments Incorporated 11

6 Bit

Address (000000)

Start

Read OP Code(10)

48 Data Bits

Don’t Care

D15

D14

D0

XX

A5

A1

A0

Dummy

Bit

MSB of The

First Word

Other

Data Bits

LSB of

Third Word

MSB of

Fourth Word

EEPROM Driving Data Line

Hub Driving Data Line

3-Stated

With Internal

Pulldown

S

C

D

Other

Address

Bits

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

www.ti.com

Figure 10. EEPROM Read Operation Timing Diagram

12 Copyright © 2000–2011, Texas Instruments Incorporated

EN IN

OC

OUT

D +

D -

5 V

GND

D +

D -

5 V

D +

D -

5 V

D +

D -

5 V

Downstream

Ports

ABC

D

ABC

D

GND

GND

GND

1 µF

Ferrite Beads

Ferrite Beads

Ferrite Beads

Ferrite Beads

3.3 V

OUT
OUT

IN

15 kΩ
15 kΩ

15 kΩ

15 kΩ

1.5 kΩ

15 kΩ

15 kΩ

15 kΩ

15 kΩ

SN75240

A

D

SN75240

A

3.3 V LDO

A

100 µF

B

100 µF

B

100 µF

B

100 µF

B

SN75240

A

TPS2041

A

NOTES: A.

B.

C. LDO is a 5-V-to-3.3-V voltage regulator
D. All USB DP, DM signal pairs require series resistors of approximately 27

TPS2041 and SN75240 are Texas Instruments devices. The outputs of the TPS204n are open drain. A 10-k pullup is

recommended.

120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR,

tantalum capacitor per port for immunity to voltage droop.

OCn Ω

Ω to ensure proper termination. An optional filter
capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub
terminal and the series resistor, as per section 7.1.6 of the USB specification.

TUSB2046B

TUSB2046BI

www.ti.com

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

Bus-Powered Hub, Ganged-Port Power Management

When used in bus-powered mode, the TUSB2046B supports up to four downstream ports by controlling a
TPS2041 device which is capable of supplying 100 mA of current to each downstream port. Bus-powered hubs
must implement power switching to ensure current demand is held below 100 mA when the hub is hot-plugged
into the system. Utilizing the TPS2041 for ganged-port power management provides overcurrent protection for
the downstream ports. The SN75240 transient suppressors reduce inrush current and voltage spikes on the data
lines. The OVRCUR signals must be tied together for a ganged operation.

Figure 11. TUSB2046B Bus-Powered Hub, Ganged-Port Power-Management Application

Copyright © 2000–2011, Texas Instruments Incorporated 13

Ω
Ω

Ω

Ω

Ω

Ω

1.5 kΩ

Ω

Ω

NOTES: A.

B.

C. LDO is a 5-V-to-3.3-V voltage regulator
D. All USB DP, DM signal pairs require series resistors of approximately 27

TPS2044, TPS2042, and SN75240 are Texas Instruments devices. The TPS2042 can be substituted for the TPS2044. The

outputs of the TPS204n are open drain. A 10-k pullup is recommended.

120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR,

tantalum capacitor per port for immunity to voltage droop.

OCn Ω

Ω to ensure proper termination. An optional filter
capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub
terminal and the series resistor, as per section 7.1.6 of the USB specification.

SN75240

A

SN75240

A

SN75240

A

TPS2044

A

100 µF

B

100 µF

B

100 µF

B

3.3 V LDO

C

D

100 µF

B

TUSB2046B
TUSB2046BI

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

www.ti.com

Self-Powered Hub, Ganged-Port Power Management

The TUSB2046B can also be implemented for ganged-port power management in a self-powered configuration.
The implementation is very similar to the bus-powered example with the exception that a self-powered port
supplies 500 mA of current to each downstream port. The overcurrent protection can be provided by a TPS2044
quad device or a TPS2024 single power switch.

14 Copyright © 2000–2011, Texas Instruments Incorporated

Figure 12. TUSB2046B Self-Powered Hub, Ganged-Port Power-Management Application

Ω
Ω

1.5 kΩ

Ω
Ω

Ω
Ω

NOTES: A.

B.

C. LDO is a 5-V-to-3.3-V voltage regulator
D. All USB DP, DM signal pairs require series resistors of approximately 27

TPS2044, TPS2042, and SN75240 are Texas Instruments devices. Two TPS2042 devices can be substituted for the TPS2044.

The outputs of the TPS204n are open drain. A 10-k pullup is recommended.

120 µF per hub is the minimum required per the USB specification. However, TI recommends a 100-µF, low ESR,

tantalum capacitor per port for immunity to voltage droop.

OCn Ω

Ω to ensure proper termination. An optional filter

capacitor of about 22 pF is recommended for EMI suppression. This capacitor, if used, must be placed between the hub
terminal and the series resistor, as per section 7.1.6 of the USB specification.

SN75240

A

TPS2044

A

SN75240

A

3.3 V LDO

C

D

100 µF

B

100 µF

B

100 µF

B

100 µF

B

SN75240

A

TUSB2046B

TUSB2046BI

www.ti.com

SLLS413G – FEBRUARY 2000–REVISED JULY 2011

Self-Powered Hub, Individual-Port Power Management

In a self-powered configuration, the TUSB2046B can be implemented for individual-port power management
when used with the TPS2044, because it is capable of supplying 500 mA of current to each downstream port and
can provide current limiting on a per-port basis. When the hub detects a fault on a downstream port, power is
removed from only the port with the fault and the remaining ports continue to operate normally. Self-powered
hubs are required to implement overcurrent protection and report overcurrent conditions. The SN75240 transient
suppressors reduce inrush current and voltage spikes on the data lines.

Figure 13. TUSB2046B Self-Powered Hub, Individual-Port Power-Management Application

Copyright © 2000–2011, Texas Instruments Incorporated 15

PACKAGE OPTION ADDENDUM

www.ti.com

2-Oct-2010

PACKAGING INFORMATION

Orderable Device

TUSB2046BIRHBR ACTIVE QFN RHB 32 3000 Green (RoHS

TUSB2046BIRHBRG4 ACTIVE QFN RHB 32 3000 Green (RoHS

TUSB2046BIRHBT ACTIVE QFN RHB 32 250 Green (RoHS

TUSB2046BIRHBTG4 ACTIVE QFN RHB 32 250 Green (RoHS

TUSB2046BIVFR ACTIVE LQFP VF 32 1000 TBD CU NIPDAU Level-3-220C-168 HR Contact TI Distributor

TUSB2046BIVFRG4 ACTIVE LQFP VF 32 1000 Green (RoHS

TUSB2046BVF ACTIVE LQFP VF 32 250 Green (RoHS

TUSB2046BVFG4 ACTIVE LQFP VF 32 250 Green (RoHS

TUSB2046BVFR ACTIVE LQFP VF 32 1000 Green (RoHS

TUSB2046BVFRG4 ACTIVE LQFP VF 32 1000 Green (RoHS

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

Status

(1)

Package Type Package

Drawing

Pins Package Qty

Eco Plan

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

& no Sb/Br)

(2)

Lead/

Ball Finish

CU NIPDAU Level-2-260C-1 YEAR Request Free Samples

CU NIPDAU Level-2-260C-1 YEAR Request Free Samples

CU NIPDAU Level-2-260C-1 YEAR Purchase Samples

CU NIPDAU Level-2-260C-1 YEAR Purchase Samples

CU NIPDAU Level-3-260C-168 HR Request Free Samples

CU NIPDAU Level-3-260C-168 HR Request Free Samples

CU NIPDAU Level-3-260C-168 HR Request Free Samples

CU NIPDAU Level-3-260C-168 HR Purchase Samples

CU NIPDAU Level-3-260C-168 HR Purchase Samples

MSL Peak Temp

(3)

Samples

(Requires Login)

or Sales Office

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability

information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that

lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

2-Oct-2010

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF TUSB2046B :

Automotive: TUSB2046B-Q1

•

NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com 30-Dec-2010

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package

Type

TUSB2046BIRHBR QFN RHB 32 3000 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2
TUSB2046BIRHBT QFN RHB 32 250 330.0 12.4 5.3 5.3 1.5 8.0 12.0 Q2

TUSB2046BIVFR LQFP VF 32 1000 330.0 16.4 9.6 9.6 1.9 12.0 16.0 Q2

TUSB2046BVFR LQFP VF 32 1000 330.0 16.4 9.6 9.6 1.9 12.0 16.0 Q2

Package
Drawing

Pins SPQ Reel

Diameter

(mm)

Reel

Width

W1 (mm)

A0

(mm)B0(mm)K0(mm)P1(mm)W(mm)

Pin1

Quadrant

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 30-Dec-2010

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TUSB2046BIRHBR QFN RHB 32 3000 340.5 333.0 20.6
TUSB2046BIRHBT QFN RHB 32 250 340.5 333.0 20.6

TUSB2046BIVFR LQFP VF 32 1000 346.0 346.0 33.0

TUSB2046BVFR LQFP VF 32 1000 333.2 345.9 31.8

Pack Materials-Page 2

MECHANICAL DATA

MTQF002B – JANUARY 1995 – REVISED MAY 2000

VF (S-PQFP-G32) PLASTIC QUAD FLATPACK

25

32

1,45
1,35

0,80

24

1

5,60 TYP

7,20

SQ

6,80

9,20

SQ

8,80

17

0,45
0,25

8

16

9

0,20

M

0,05 MIN

Seating Plane

0,13 NOM

Gage Plane

0,25

0°–7°

0,75
0,45

1,60 MAX

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0,10

4040172/D 04/00

1

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