Texas Instruments TRF2020PW Datasheet
TRF2020
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
D
Three Separate Loops: 1 UHF and 2 VHF
D
Operation to 1.2-GHz for Main Synthesizer
D
Operation to 250 MHz for Auxiliary
Synthesizers
D
Fast Lock-up Time
D
High-Speed Serial Data Bus
D
Low Power Consumption
D
Ideal for Global Systems for Mobile
Communications (GSM) Applications
description
The Texas Instruments (TI) TRF2020 is an
V
DD
CLOCK
DATA
STROBE
LD
V
SS
REF_IN
V
SSP
PDA2
SW2
V
DDP2
AUX2_IN
PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
integrated high performance frequency synthesizer device. The TRF2020 consists of one main
1.2-GHz synthesizer and two auxiliary 250-MHz
synthesizers. Each synthesizer has an independent dual-modulus prescaler and separate powerdown modes.
These features provide maximum flexibility for the design of 900-MHz wireless systems.
The main synthesizer consists of a 32/33-modulus prescaler with an 1 1-bit counter, a phase-frequency detector ,
and a charge pump. The phase-frequency detector is referenced to an internal reference frequency that is
derived from an external TCXO signal. The phase-frequency detector is also provided with a dead-zone
compensation circuit that reduces synthesizer phase noise during locked conditions.
Each auxiliary synthesizer consists of an independent 8/9-modulus prescaler with an 11-bit counter, a
phase-frequency detector, and a charge pump. Similar to the main synthesizer, each auxiliary synthesizer’s
phase-frequency detector is referenced to an internal reference frequency that is derived from an external
TCXO signal.
AUX1_IN
V
DDP1
PDA1
SW1
RPA
V
DDA
SWM
PDM
V
SSA
RPM
V
DDPM
RF_IN
The external TCXO signal is prescaled by an 11-bit counter and then distributed to three independent
postscalers. Each postscaler provides a selectable, divide-by-1, -2, -4, or -8 function before the reference signal
is distributed to the associated synthesizer phase detector. The reference frequency prescaler and independent
postscalers are software programmable.
To achieve minimum lock-up time, each synthesizer contains a speed-up mode charge pump capable of
providing 2 mA output current and an analog switch that can change the loop-filter time constant. The duration
of the speed-up mode operations can be independently controlled with software.
The states of the three internal lock detectors are provided on a programmable, combinational logic output; each
synthesizer can be selected independently or ANDed together.
The device is programmed over a three-wire, synchronous, serial data bus (clock, data, strobe) with achievable
bit rates as high as 20 Mbits/sec. The data is partitioned into words in such a manner that static parameters may
be sent once during initialization, and dynamic parameters, such as frequency , may be sent as often as needed.
The TRF2020 is offered in a 24-pin plastic thin-shrink small-outline package (TSSOP) and is characterized for
free-air operation from –40°C to 85°C.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1998, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
TRF2020
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
functional block diagram
R
RF_IN
AUX1_IN
13
S
24
1/32, 33
Prescaler
1/8, 9
Prescaler
5-Bit
Counter
Control Logic
RAB
3-Bit
Counter
11-Bit
Counter
511
11-Bit
Counter
Phase
Detector
FR
2
Charge
Pump
Speed-Up
Counter
6
C
Lock
Detect
15
RPM
18
SWM
17
PDM
U
2
5
LD
21
SW1
AUX2_IN
V
DDPM
V
DDP1
V
DDP2
V
SSP
REF_IN
Control Logic
311
T
12
14
23
11
8
1/8, 9
Prescaler
L
M
N
2
2
2
SDE
3-Bit
Counter
Control Logic
THJ
Main Reference Select
AUX-1 Reference Select
AUX-2 Reference Select
11-Bit
Counter
311
÷ 1 ÷ 2 ÷ 4 ÷ 8
7
11-Bit Reference
Counter
11
P
Reference Postscaler Select
Auxiliary Current Ratio
Phase
Detector
S
Speed-Up
Counter
6
G
Phase
Detector
T
Reference Counter
Power Enable
Lock Detect Select
Test Mode
AUX-2 Synthesizer
AUX-1 Synthesizer
Auxiliary Speed-Up
Main Current Ratio
Main Synthesizer
Charge
Pump
Current
Reference
Speed-Up
Counter
2
K
Charge
Pump
2
K
6
G
Address
Decoder
Word-3
Word-2
Word-1
Word-0
22
16
19
20
10
9
1
6
4
PDA1
V
SSA
V
DDA
RPA
SW2
PDA2
V
DD
V
SS
STROBE
3
2
DATA
CLOCK
22-Bit Shift Register
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
2 Bit
I/O
DESCRIPTION
TRF2020
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
Terminal Functions
TERMINAL
NAME NO.
AUX1_IN 24 I RF input auxiliary-1 synthesizer
AUX2_IN 12 I RF input auxiliary-2 synthesizer
CLOCK 2 I Clock input
DATA 3 I Data input
LD 5 O Lock detect output
PDA1 22 O Auxiliary-1 synthesizer phase detector output
PDA2 9 O Auxiliary-2 synthesizer phase detector output
PDM 17 O Main synthesizer phase detector output
REF_IN 7 I Reference input
RF_IN 13 I Main synthesizer RF input
RPA 20 I Reference current input for AUX-1 and AUX-2 charge pumps
RPM 15 I Reference current input for main charge pump
STROBE 4 I Strobe input
SWM 18 O Main analog switch output
SW1 21 O Auxiliary-1 analog switch output
SW2 10 O Auxiliary-2 analog switch output
V
DD
V
DDA
V
DDPM
V
DDP1
V
DDP2
V
SS
V
SSA
V
SSP
1 Digital supply voltage
19 Analog supply voltage
14 Main prescaler supply voltage
23 Auxiliary-1 prescaler supply voltage
11 Auxiliary-2 prescaler supply voltage
6 Digital ground
16 Analog ground
8 Prescaler ground
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage V
Supply voltage V
Voltage applied to any other pin, V
Power dissipation at or below T
Junction temperature, T
Ambient operating temperature, T
Storage temperature, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
–0.3 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DDP
V
–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD,
DDA
150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
J
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
STG
–0.3 V to VDD + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IN
= 25°C 300 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
–40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
†
recommended operating conditions
MIN NOM MAX UNIT
V
DDA
VDD, V
T
A
T
J
DDP
Analog supply voltage 2.75 3 4.5 V
Digital supply voltage 2.75 3 3.6 V
Operating free-air temperature –40 25 85 °C
Junction temperature –30 105 °C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
TRF2020
ť
ť
ť ť
ť
ť
ť ť
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
electrical characteristics with V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
OPER
I
STDBY
I
DDPM
I
DDP1
I
DDP2
NOTES: 1. Operational supply currents measured with RF_IN = 1200 MHz, AUX1_IN = 250 MHz, AUX2_IN = 250 MHz, f
Operational supply current R = S = T = 1 (see Note 1) 11 13 mA
Maximum standby current R = S = T = 0 10 µA
Main synthesizer operational supply current R = 1, S = T = 0 (see Note 1) 6 8 mA
Auxiliary-1 synthesizer operational supply current R = 0, S = 1, T = 0 (see Note 1) 3.3 4.5 mA
Auxiliary-2 synthesizer operational supply current R = 0, S = 0, T = 1 (see Note 1) 3.3 4.5 mA
All loops are in lock condition and normal mode. Operational supply current = I
DDA
= 4.5 V , V
= VDD = 3 V, TA = 25°C (unless otherwise noted)
DDP
= I
OPER
DDA
+ I
DDP1
+ I
DDP2
digital interface characteristics
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Clock
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
High-level input voltage
Low-level input voltage
High-level input current
Low-level input current
High-level output voltage LD IOH = 1 mA VDD – 0.4 V
Low-level output voltage LD IOH = –2 mA 0.4 V
Data
Strobe
Clock
Data
Strobe
Clock
Data
Strobe
Clock
Data
Strobe
0.7 V
DD
0 0.3 V
0 1 µA
0 1 µA
REF_IN
+ I
V
DD
= 39.6 MHz.
+ I
DDPM
DD
DD
V
V
ac electrical characteristics with V
DDA
main loop, RF_IN
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
RF_IN
P
RF_IN
f
COMP
Input signal frequency 2.75 ≤ V
Input sensitivity
Phase detector comparison 2.75 ≤ VDD ≤ 3.5 V 0 2 MHz
auxiliary loops, AUX1_IN and AUX2_IN
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
AUX_IN
P
AUX_IN
f
AUX_
COMP
Input signal frequency 2.75 ≤ V
Input sensitivity
Phase detector comparison 2.75 ≤ VDD ≤ 3.5 V 0 2 MHz
= 4.5 V , V
= VDD = 3 V , TA = 25°C (unless otherwise noted)
DDP
≤ 3.5 V 1200 MHz
DDP
2.75 ≤ V
R
source
2.75 ≤ V
R
source
≤ 3.5 V,
DDP
= 50 Ω
≤ 3.5 V 250 MHz
DDP
≤ 3.5 V,
DDP
= 50 Ω
–20 0 dBm
–20 0 dBm
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Z
Input impedance
|I
|
Output current PDM
V
0.5 V
|I
|
Output current PDA1
V
V
Á
Á
Á
Á
|I
|
Output current PDA2
V
V
Á
Á
Á
Á
reference divider, REF_IN
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
REF_IN
V
REF_IN
REF_IN
charge pump characteristics
main charge pump output
PDM
D
I
PDM
|I
PDM
∆I
PDM
|I
SWM
†
RPM = RPA = 27 kΩ to V
auxiliary-1 charge pump output
PDA1
D
I
PDA1
ÁÁ
|I
PDA1
∆I
PDA1
|I
SW1
†
RPM = RPA = 27 kΩ to V
auxiliary-2 charge pump output
PDA2
D
I
PDA2
ÁÁ
|I
PDA2
∆I
PDA2
|I
SW2
†
RPM = RPA = 27 kΩ to V
Input signal frequency 2.75 ≤ V
Input sensitivity 0.3 V
p
p
Resistive 100 kΩ
Capacitive 3 pF
PARAMETER TEST CONDITIONS
p
Relative output current variation PDM (see Figure 1)
|
Output current matching (see Figure 1)
|
Analog switch output current SWM, speed-up mode V
, F = K = 10.
SSA
PARAMETER TEST CONDITIONS
p
Relative output current variation PDA1
(see Figure 1)
|
БББББББББББ
Output current matching (see Figure 1)
|
Analog switch output current SW1, speed-up mode V
, F = K = 10.
SSA
PARAMETER TEST CONDITIONS
p
Relative output current variation PDA2
БББББББББББ
(see Figure 1)
|
Output current matching (see Figure 1)
|
Analog switch output current SW2, speed-up mode V
, F = K = 10.
SSA
normal mode
speed-up mode
normal mode
speed-up mode
normal mode
speed-up mode
TRF2020
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
≤ 3.5 V 40 MHz
DDP
– 0.8 V
=
PDM
DDA
RPM 5% tolerance,
V
+ 0.5 ≤ V
SSA
V
PDM
SWM
PDA1
= 0.5 V
= 0.5 V
= 0.5
PDM
DDA
DDA
DDA
RPA 5% tolerance
V
+ 0.5 ≤ V
SSA
V
PDA1
SW1
PDA2
= 0.5 V
= 0.5 V
= 0.5
PDA1
DDA
DDA
DDA
RPA 5% tolerance
V
+ 0.5 ≤ V
SSA
V
PDA2
SW2
= 0.5 V
= 0.5 V
PDA2
DDA
DDA
≤ V
≤ V
≤ V
DDA
DDA
DDA
†
– 0.5
†
†
– 0.5
– 0.5
MIN
400
1.5
1.5
MIN
400
1.5
1.5
MIN
400
1.5
1.5
DDP
TYP
MAX
500
600
2
2
TYP
MAX
500
600
2
ÁÁÁ
2
TYP
MAX
500
600
2
ÁÁÁ
2
2.5
15
2.5
2.5
15
2.5
2.5
15
2.5
p–p
UNIT
µA
mA
%
8
%
mA
UNIT
µA
mA
%
Á
8
%
mA
UNIT
µA
mA
Á
%
8
%
mA
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
TRF2020
IOZDisabled output current
RPM
RPA
V
DDA
10
nA
Normal and s eed u modes
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
Current
I
2
∆ I
REL
OUT
I
1
∆ I
I
SINK
OUT
MATCH
I
SOURCE
∆ I
OUT
REL
V
1
I
2
I
1
V
2
Voltage
Figure 1. Charge-Pump Output Current Definitions
The relative output current variation is defined as the percent difference between charge-pump current output
at two charge-pump output voltages and the mean charge-pump current output:
D
I
OUT REL
Ť
I
OUT MEAN
+2
Ť
(
I
2–I1
|(
I2)
)
x 100%; with V1 = 0.5 V, V2 = V
)|
I
1
DDA
– 0.5 V.
Output current matching is defined as the difference in charge-pump sinking current output and charge-pump
sourcing current output at a given charge-pump output (see Figure 1).
∆I
OUT MATCH
= I
SINK
– I
SOURCE
; with V1 ≤ Voltage ≤ V2.
charge-pump leakage currents, charge pumps not active
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
PDM
PDA1
p
PDA2
SWM
SW1
SW2
VO = 0.5V
=
Normal and speed-up modes
DDA
=
,
,
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
t
s
t
TRF2020
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
serial interface timing requirements with V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
C
I
R
I
f
clock
tr, t
f
tw(High) Pulse duration, CLOCK high 20 ns
tw(Low) Pulse duration, CLOCK low 20 ns
u
h
t
w(pulse)
Input capacitance 10 pF
Input resistance 10 k Ω
CLOCK frequency 13 20 MHz
CLOCK input rise and fall time 8 ns
Data before CLOCK high 15 ns
Strobe before CLOCK high
Data after CLOCK high 15 ns
Strobe after CLOCK high 15 ns
Strobe pulse width
= 4.5 V, V
DDA
= V
DDP
Under continuous operation 15 ns
First power on or programmed
from standby mode
= 3.0 V, TA = 25°C
DD
10C
60 kΩ
REF_IN
ext_coupling
2
PARAMETER MEASUREMENT INFORMATION
The timing relationship between the TRF2020 Data, Clock, and Strobe registers is shown in Figure 2.
DATA
CLOCK
STROBE
Data
Valid
D0 D1 D22 D23
Data
Change
t
su
t
h
t
w(LOW)
Clock Enabled
Shift in Data
t
w(HIGH)
t
su
Clock Disabled
t
w(PULSE)
Store Data
t
h
– V
– V
– V
– V
– V
– V
µs
s
IH
IL
IH
IL
IH
IL
Figure 2. Serial Data Interface Timing
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
TRF2020
SYNTHESIZER FOR GLOBAL SYSTEM
FOR MOBILE (GSM) CELLULAR TELEPHONES
SLWS020B – FEBRUAR Y 1995 – REVISED JANUAR Y 1998
TYPICAL CHARACTERISTICS
MAIN DIVIDER INPUT POWER
FREQUENCY AND SUPPLY VOLTAGE
0
TA = 25°C
–10
–20
–30
IP – Input Power – dBm
–40
–50
500
600
700
800
vs.
900
1100
1000
1200
1300
1400
f – Frequency – MHz
Figure 3
2.75 V
1500
3.5 V
1600
1700
1800
1900
2000
MAIN DIVIDER MINIMUM INPUT POWER
FREQUENCY AND TEMPERATURE
0
V
= V
DDA
–10
–20
–30
–40
MIP – Minimum Input Power – dBm
–50
500
600
700
= VDD = 2.75 V
DDP
TA = –40°C
TA = 25°C
800
900
1100
1000
f – Frequency – MHz
Figure 4
vs.
1200
1300
TA = 85°C
1400
1500
1600
1700
1800
1900
2000
REFERENCE DIVIDER MINIMUM INPUT VOLTAGE
vs.
FREQUENCY AND SUPPLY VOLTAGE
0.12
PP
MIV – Minimum Input Voltage – V
TA = 25°C
0.1
0.08
2.75 V
0.06
3.5 V
0.04
0.02
0
f – Frequency – MHz
Figure 5
REFERENCE DIVIDER MINIMUM INPUT VOLTAGE
vs.
FREQUENCY AND TEMPERATURE
0.12
V
= V
DDA
PP
0.1
0.08
0.06
0.04
MIV – Minimum Input Voltage – V
0.02
0
34323028262422201816141210864
403836
= VDD = 2.75 V
DDP
TA = –40°C
TA = 25°C
f – Frequency – MHz
TA = 85°C
34323028262422201816141210864
403836
Figure 6
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Loading...