Texas Instruments TPS76750QPWP, TPS76750QPWPR, TPS76750QDR, TPS76750QD, TPS76733QPWPR Datasheet
...
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
D
1 A Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V , 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and
Adjustable Versions
D
Dropout Voltage Down to 230 mV at 1 A
(TPS76750)
D
Ultra Low 85 µA Typical Quiescent Current
D
Fast Transient Response
D
2% Tolerance Over Specified Conditions for
Fixed-Output Versions
D
Open Drain Power-On Reset With 200-ms
Delay (See TPS768xx for PG Option)
D
8-Pin SOIC and 20-Pin TSSOP PowerPAD
(PWP) Package
D
Thermal Shutdown Protection
description
This device is designed to have a fast transient
response and be stable with 10-µF low ESR
capacitors. This combination provides high
performance at a reasonable cost.
TPS76733
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
3
10
IO = 1 A
2
10
1
10
0
10
– Dropout Voltage – mV
DO
V
–1
10
CO = 10 µF
–2
10
–40 0 20 120
–60 40 60 80 100
–20 140
TA – Free-Air Temperature – °C
IO = 10 mA
IO = 0
100
50
0
– Change in∆
O
V
–50
Output Voltage – mV
–100
0.5
O
I – Output Current – A
GND/HSINK
GND/HSINK
GND/HSINK
GND/HSINK
1
0
0
PWP PACKAGE
(TOP VIEW)
1
20
GND/HSINK
2
19
GND/HSINK
3
18
GND
4
NC
5
EN
6
IN
7
IN
8
NC
9
10
NC – No internal connection
D PACKAGE
(TOP VIEW)
GND
EN
IN
IN
1
2
3
4
NC
17
NC
16
RESET
15
FB/NC
14
OUT
13
OUT
12
GND/HSINK
11
GND/HSINK
RESET
8
FB/NC
7
OUT
6
5
OUT
TPS76733
LOAD TRANSIENT RESPONSE
CL = 100 µF
TA = 25°C
604020 80 100 140120 160 180 200
t – Time – µs
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
J
–40 C to 125 C
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
description (continued)
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV
at an output current of 1 A for the TPS76750) and is directly proportional to the output current. Additionally , since
the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent of output
loading (typically 85 µA over the full range of output current, 0 mA to 1 A). These two key specifications yield
a significant improvement in operating life for battery-powered systems. This LDO family also features a sleep
mode; applying a TTL high signal to EN
1 µA at TJ = 25°C.
The RESET output of the TPS767xx initiates a reset in microcomputer and microprocessor systems in the event
of an undervoltage condition. An internal comparator in the TPS767xx monitors the output voltage of the
regulator to detect an undervoltage condition on the regulated output voltage.
The TPS767xx is offered in 1.5-V, 1.8-V , 2.5-V, 2.7-V , 2.8-V, 3.0-V, 3.3-V and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.5 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 2% over line, load, and temperature ranges. The TPS767xx family is available in 8 pin SOIC
and 20 pin PWP packages.
T
–
°
The TPS76701 is programmable using an external resistor divider (see application
information). The D and PWP packages are available taped and reeled. Add an R
suffix to the device type (e.g., TPS76701QDR).
V
I
0.1 µF
°
(enable) shuts down the regulator, reducing the quiescent current to
AVAILABLE OPTIONS
OUTPUT
VOLTAGE
(V)
TYP
5.0 TPS76750Q TPS76750Q
3.3 TPS76733Q TPS76733Q
3.0 TPS76730Q TPS76730Q
2.8 TPS76728Q TPS76728Q
2.7 TPS76727Q TPS76727Q
2.5 TPS76725Q TPS76725Q
1.8 TPS76718Q TPS76718Q
1.5 TPS76715Q TPS76715Q
Adjustable
1.5 V to 5.5 V
TPS767xx
6
IN
7
IN
5
EN
GND
3
PACKAGED DEVICES
TSSOP
(PWP)
TPS76701Q TPS76701Q
OUT
OUT
16
14
13
RESET
+
SOIC
(D)
RESET
C
10 µF
V
O
†
O
2
†
See application information section for capacitor selection details.
Figure 1. Typical Application Configuration (For Fixed Output Options)
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
functional block diagram—adjustable version
IN
EN
_
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
RESET
+
V
= 1.1834 V
ref
+
_
GND
200 ms Delay
functional block diagram—fixed-voltage version
IN
EN
_
+
OUT
R1
FB/NC
R2
External to the device
RESET
OUT
V
= 1.1834 V
ref
+
_
GND
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
200 ms Delay
R1
R2
3
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
I/O
DESCRIPTION
I/O
DESCRIPTION
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
Terminal Functions – SOIC Package
TERMINAL
NAME NO.
EN 2 I Enable input
FB/NC 7 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 1 Regulator ground
IN 3, 4 I Input voltage
OUT 5, 6 O Regulated output voltage
RESET 8 O RESET output
Terminal Functions – PWP Package
TERMINAL
NAME NO.
EN 5 I Enable input
FB/NC 15 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
GND/HSINK 1, 2, 9, 10, 11,
12, 19, 20
IN 6, 7 I Input voltage
NC 4, 8, 17, 18 No connect
OUT 13, 14 O Regulated output voltage
RESET 16 O RESET output
Ground/heatsink
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing diagram
V
res
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
V
I
†
V
res
t
V
O
Threshold
Voltage
RESET
Output
Output
Undefined
†
V
is the minimum input voltage for a valid RESET . The symbol V
res
for semiconductor symbology.
‡
VIT –Trip voltage is typically 5% lower than the output voltage (95%VO) V
to V
is the hysteresis voltage.
IT+
‡
V
IT+
‡
V
IT–
200 ms
Delay
V
IT+
Less than 5% of the
output voltage
res
‡
‡
V
IT–
t
200 ms
Delay
Output
Undefined
t
is not currently listed within EIA or JEDEC standards
IT–
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
TPS76715Q, TPS76718Q, TPS76725Q, TPS76727Q
D
PWP
#
PWP
||
TPS76728Q, TPS76730Q TPS76733Q, TPS76750Q, TPS76701Q
FAST-TRANSIENT-RESPONSE 1-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS208C – MAY 1999 – REVISED SEPTEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN –0.3 V to VI + 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum RESET
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO (OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, TJ –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
All voltage values are with respect to network terminal ground.
PACKAGE
PACKAGE
#
This parameter is measured with the recommended copper heat sink pattern on a 1-layer PCB, 5-in × 5-in PCB, 1 oz. copper,
2-in × 2-in coverage (4 in2).
||
This parameter is measured with the recommended copper heat sink pattern on a 8-layer PCB, 1.5-in × 2-in PCB, 1 oz. copper
with layers 1, 2, 4, 5, 7, and 8 at 5% coverage (0.9 in2) and layers 3 and 6 at 100% coverage (6 in2). For more information, refer
to TI technical brief SLMA002.
voltage 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
0 568 mW 5.68 mW/°C 312 mW 227 mW
250 904 mW 9.04 mW/°C 497 mW 361 mW
DISSIPATION RATING TABLE 2 – FREE-AIR TEMPERATURES
AIR FLOW
(CFM)
0 2.9 W 23.5 mW/°C 1.9 W 1.5 W
300 4.3 W 34.6 mW/°C 2.8 W 2.2 W
0 3 W 23.8 mW/°C 1.9 W 1.5 W
300 7.2 W 57.9 mW/°C 4.6 W 3.8 W
TA < 25°C
POWER RATING
TA < 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 85°C
POWER RATING
Ĕ
recommended operating conditions
MIN MAX UNIT
Input voltage, V
Output voltage range, V
Output current, IO (Note 1) 0 1.0 A
Operating virtual junction temperature, TJ (Note 1) –40 125 °C
k
To calculate the minimum input voltage for your maximum output current, use the following equation: V
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
6
k
I
O
I(min)
device operate under conditions beyond those specified in this table for extended periods of time.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
= V
2.7 10 V
1.5 5.5 V
+ V
O(max)
DO(max load)
.
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