TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
250-mA Low-Dropout Voltage Regulator
D
Available in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V,
3.0-V, 3.3-V, 5.0-V Fixed Output and
Adjustable Versions
D
Dropout Voltage to 140 mV (Typ) at 250 mA
(TPS76650)
D
Ultra-Low 35-µA Typical Quiescent Current
D
3% Tolerance Over Specified Conditions for
Fixed-Output Versions
D
Open Drain Power Good
D
8-Pin SOIC Package
D
Thermal Shutdown Protection
description
This device is designed to have an ultra-low quiescent current and be stable with a 4.7-µF capacitor. This
combination provides high performance at a reasonable cost.
Because the PMOS device behaves as a low-value resistor, the dropout voltage is very low (typically 230 mV
at an output current of 250 mA for the TPS76650) and is directly proportional to the output current. Additionally ,
since the PMOS pass element is a voltage-driven device, the quiescent current is very low and independent
of output loading (typically 35 µA over the full range of output current, 0 mA to 250 mA). These two key
specifications yield a significant improvement in operating life for battery-powered systems. This LDO family
also features a sleep mode; applying a TTL high signal to EN
(enable) shuts down the regulator, reducing the
quiescent current to less than 1 µA (typ).
TA – Free-Air Temperature – °C
– Output Voltage – V
V
DO
TPS76633
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
–50 –25 0 25 50 75 100 125 150
VI = 3.2 V
IO = 10 mA
IO = 50 mA
IO = 150 mA
10
0
10
–1
10
–2
10
–3
IO = 250 mA
34
34.1
34.2
34.3
34.4
34.5
34.6
34.7
34.8
34.9
35.0
0 25 50 75 100 125 150 175 200 225 250
IL – Load Current – mA
TPS76633
GROUND CURRENT
vs
LOAD CURRENT
VO = 3.3 V
GND
I – Ground Current – Aµ
TA = 25°C
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1999, Texas Instruments Incorporated
1
2
3
4
8
7
6
5
NC/FB
PG
GND
EN
OUT
OUT
IN
IN
D PACKAGE
(TOP VIEW)
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
Power good (PG) is an active high output, which can be used to implement a power-on reset or a low-battery
indicator.
The TPS766xx is offered in 1.5-V, 1.8-V, 2.5-V, 2.7-V, 2.8-V, 3.0-V , 3.3-V and 5.0-V fixed-voltage versions and
in an adjustable version (programmable over the range of 1.25 V to 5.5 V). Output voltage tolerance is specified
as a maximum of 3% over line, load, and temperature ranges. The TPS766xx family is available in 8 pin SOIC
package.
AVAILABLE OPTIONS
OUTPUT VOLTAGE
(V)
PACKAGED DEVICES
T
J
TYP
SOIC
(D)
5.0 TPS76650D
3.3 TPS76633D
3.0 TPS76630D
2.8 TPS76628D
–
°
°
2.7 TPS76627D
–40 C to 125 C
2.5 TPS76625D
1.8 TPS76618D
1.5 TPS76615D
Adjustable
1.25 V to 5.5 V
TPS76601D
The TPS76601 is programmable using an external resistor divider (see application
information). The D package is available taped and reeled. Add an R suffix to the
device type (e.g., TPS76601DR).
†
See application information section for capacitor selection details.
PG
OUT
OUT
6
5
4
IN
IN
EN
GND
3
2
7
8
V
I
0.1 µF
PG
V
O
4.7 µF
+
TPS766xx
C
O
†
1
NC/FB
300 mΩ
Figure 1. Typical Application Configuration for Fixed Output Options
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
functional block diagram—adjustable version
_
+
V
ref
= 1.224 V
OUT
FB/NC
EN
GND
PG
_
+
IN
External to the device
R1
R2
functional block diagram—fixed-voltage version
_
+
V
ref
= 1.224 V
OUT
EN
GND
R1
R2
_
+
IN
PG
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Terminal Functions – SOIC Package
TERMINAL
NAME NO.
I/O
DESCRIPTION
EN 4 I Enable input
FB/NC 1 I Feedback input voltage for adjustable device (no connect for fixed options)
GND 3 Regulator ground
IN 5 I Input voltage
IN 6 I Input voltage
OUT 7 O Regulated output voltage
OUT 8 O Regulated output voltage
PG 2 O PG output
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Ĕ
Input voltage range‡, VI –0.3 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range at EN
–0.3 V to 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum PG voltage 16.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak output current Internally limited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See dissipation rating tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage, VO (OUT, FB) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating virtual junction temperature range, T
J
–40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD rating, HBM 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
All voltage values are with respect to network terminal ground.
DISSIPATION RATING TABLE 1 – FREE-AIR TEMPERATURES
PACKAGE
AIR FLOW
(CFM)
TA < 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
0 568 mW 5.68 mW/°C 312 mW 227 mW
D
250 904 mW 9.04 mW/°C 497 mW 361 mW
recommended operating conditions
MIN MAX UNIT
Input voltage, V
I
k
2.7 10 V
Output voltage range, V
O
1.2 5.5 V
Output current, IO (Note 1) 0 250 mA
Operating virtual junction temperature, TJ (Note 1) –40 125 °C
k
To calculate the minimum input voltage for your maximum output current, use the following equation: V
I(min)
= V
O(max)
+ V
DO(max load)
.
NOTE 1: Continuous current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the
device operate under conditions beyond those specified in this table for extended periods of time.
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
V
i
= V
O(typ)
+ 1 V, I
O
= 10 µA, EN = 0 V, CO = 4.7 µF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
5.5 V ≥ VO ≥ 1.25 V, TJ = 25°C V
O
TPS76601
5.5 V ≥ VO ≥ 1.25 V, TJ = –40°C to 125°C 0.97V
O
1.03V
O
TJ = 25°C, 2.7 V < VIN < 10 V 1.5
TPS76615
TJ = –40°C to 125°C, 2.7 V < VIN < 10 V 1.455 1.545
TJ = 25°C, 2.8 V < VIN < 10 V 1.8
TPS76618
TJ = –40°C to 125°C, 2.8 V < VIN < 10 V 1.746 1.854
TJ = 25°C, 3.5 V < VIN < 10 V 2.5
TPS76625
TJ = –40°C to 125°C, 3.5 V < VIN < 10 V 2.425 2.575
Output voltage
TJ = 25°C, 3.7 V < VIN < 10 V 2.7
(10 µA to 250 mA load)
(see
Note 2
)
TPS76627
TJ = –40°C to 125°C, 3.7 V < VIN < 10 V 2.619 2.781
V
(see Note 2)
TJ = 25°C, 3.8 V < VIN < 10 V 2.8
TPS76628
TJ = –40°C to 125°C, 3.8 V < VIN < 10 V 2.716 2.884
TJ = 25°C, 4.0 V < VIN < 10 V 3.0
TPS76630
TJ = –40°C to 125°C, 4.0 V < VIN < 10 V 2.910 3.090
TJ = 25°C, 4.3 V < VIN < 10 V 3.3
TPS76633
TJ = –40°C to 125°C, 4.3 V < VIN < 10 V 3.201 3.399
TJ = 25°C, 6.0 V < VIN < 10 V 5.0
TPS76650
TJ = –40°C to 125°C, 6.0 V < VIN < 10 V 4.850 5.150
Quiescent current (GND current)
10 µA < IO < 250 mA, TJ = 25°C 35
()
EN = 0V, (see Note 2)
IO = 250 mA, TJ = –40°C to 125°C 50
µ
A
Output voltage line regulation (∆VO/V
O
)
(see Notes 2 and 3)
VO + 1 V < VI ≤ 10 V, TJ = 25°C 0.01 %/V
Load regulation IO = 10 µA to 250 mA 0.5%
Output noise voltage
BW = 300 Hz to 50 kHz,
CO = 4.7 µF, TJ = 25°C
200 µVrms
Output current Limit VO = 0 V 0.8 1.2 A
Thermal shutdown junction temperature 150 °C
EN = V
I,
TJ = 25°C,
2.7 V < VI < 10 V
1 µA
Standby current
EN = V
I,
TJ = –40°C to 125°C
2.7 V < VI < 10 V
10 µA
FB input current TPS76601 FB = 1.5 V 2 nA
High level enable input voltage 2.0 V
Low level enable input voltage 0.8 V
Power supply ripple rejection (see Note 2)
f = 1 kHz, CO = 4.7 µF,
IO = 10 µA, TJ = 25°C
63 dB
Minimum input voltage for valid PG I
O(PG)
= 300µA 1.1 V
Trip threshold voltage VO decreasing 92 98 %V
O
PG
Hysteresis voltage Measured at V
O
0.5 %V
O
Output low voltage VI = 2.7 V, I
O(PG)
= 1mA 0.15 0.4 V
Leakage current V
(PG)
= 5 V 1 µA
p
EN = 0 V –1 0 1
Input current (EN)
EN = V
I
–1 1
µ
A
NOTE: 2. Minimum IN operating voltage is 2.7 V or V
O(typ)
+ 1 V, whichever is greater. Maximum IN voltage 10 V.
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range,
V
i
= V
O(typ)
+ 1 V, I
O
= 10 µA, EN = 0 V, CO = 4.7 µF (unless otherwise noted) (continued)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
IO = 250 mA, TJ = 25°C 310
TPS76628
IO = 250 mA, TJ = –40°C to 125°C 540
IO = 250 mA, TJ = 25°C 270
Dropout voltage
TPS76630
IO = 250 mA, TJ = –40°C to 125°C 470
g
(See Note 4)
IO = 250 mA, TJ = 25°C 230
mV
TPS76633
IO = 250 mA, TJ = –40°C to 125°C 400
IO = 250 mA, TJ = 25°C 140
TPS76650
IO = 250 mA, TJ = –40°C to 125°C 250
NOTES: 3. If VO ≤ 1.8 V then V
imin
= 2.7 V, V
imax
= 10 V:
Line Reg. (mV)
+ǒ%ńVǓ
V
O
ǒ
V
imax
*
2.7 V
Ǔ
100
1000
If VO ≥ 2.5 V then V
imin
= VO + 1 V, V
imax
= 10 V:
Line Reg. (mV)
+ǒ%ńVǓ
V
O
ǒ
V
imax
*ǒVO)
1V
Ǔ
Ǔ
100
1000
4. IN voltage equals VO(Typ) – 100 mV; TPS76601 output voltage set to 3.3 V nominal with external resistor divider. TPS76615,
TPS76618, TPS76625, and TPS76627 dropout voltage limited by input voltage range limitations (i.e., TPS76630 input voltage
needs to drop to 2.9 V for purpose of this test).
Table of Graphs
FIGURE
p
vs Load current 2, 3
Output voltage
vs Free-air temperature 4, 5
vs Load current 6, 7
Ground current
vs Free-air temperature 8, 9
Power supply ripple rejection vs Frequency 10
Output spectral noise density vs Frequency 11
Output impedance vs Frequency 12
Dropout voltage vs Free-air temperature 13, 14
Line transient response 15, 17
Load transient response 16, 18
Output voltage vs Time 19
Dropout voltage vs Input voltage 20
Equivalent series resistance (ESR) vs Output current 21 – 24
Equivalent series resistance (ESR) vs Added ceramic capacitance 25, 26
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 2
IL – Load Current – mA
– Output Voltage – V
V
O
TPS76633
OUTPUT VOLTAGE
vs
LOAD CURRENT
3.29
3.292
3.294
3.296
3.298
3.300
3.302
3.304
0 50 100 150 200 250
VI = 4.3 V
TA = 25°C
Figure 3
IL – Load Current – mA
– Output Voltage – V
V
O
TPS76615
OUTPUT VOLTAGE
vs
LOAD CURRENT
1.487
1.488
1.489
1.490
1.491
1.492
1.493
1.494
0 50 100 150 200 250
VI = 2.7 V
TA = 25°C
Figure 4
3.265
3.270
3.275
3.280
3.285
3.290
3.295
3.300
3.305
3.310
–50 –25 0 25 50 75 100 125 150
TA – Free-Air Temperature – °C
TPS76633
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– Output Voltage – V
V
O
VI = 4.3 V
IO = 10 µA
IO = 250 mA
Figure 5
TA – Free-Air Temperature – °C
TPS76615
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
1.475
1.480
1.485
1.490
1.495
1.500
1.505
–50 –25 0 25 50 75 100 125 150
VI = 2.7 V
IO = 10 µA
IO = 250 mA
– Output Voltage – V
V
O
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
34.0
34.1
34.2
34.3
34.4
34.5
34.6
34.7
34.8
34.9
35.0
0 25 50 75 100 125 150 175 200 225 250
IL – Load Current – mA
TPS76633
GROUND CURRENT
vs
LOAD CURRENT
VO = 3.3 V
TA = 25°C
GND
I – Ground Current – Aµ
Figure 7
33.0
33.1
33.2
33.3
33.4
33.5
33.6
33.7
33.8
33.9
34.0
0 25 50 75 100 125 150 175 200 225 250
IL – Load Current – mA
TPS76615
GROUND CURRENT
vs
LOAD CURRENT
VO = 1.5 V
TA = 25°C
GND
I – Ground Current – Aµ
Figure 8
TA – Free-Air Temperature – °C
TPS76633
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
10
15
20
25
30
35
40
45
50
55
–50 0 50 100 150
VO = 3.3 V
IO = 250 mA
GND
I – Ground Current – Aµ
Figure 9
TA – Free-Air Temperature – °C
TPS76615
GROUND CURRENT
vs
FREE-AIR TEMPERATURE
15
20
25
30
35
40
45
50
55
–50 0 50 100 150
VO = 1.5 V
IO = 250 mA
GND
I – Ground Current – Aµ
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
f – Frequency – Hz
TPS76633
POWER SUPPLY RIPPLE REJECTION
vs
FREQUENCY
10
20
30
40
50
60
70
10.00 100.00 1000.0010000.00100000.001000000.0010000000.
0
PSRR – Power Supply Ripple Rejection – dB
VI = 4.3 V
CO = 10 µF
IO = 250 mA
TA = 25°C
10 100 1k 10k 100k 1M 10M
Figure 11
f – Frequency – Hz
TPS76633
OUTPUT SPECTRAL NOISE DENSITY
vs
FREQUENCY
VI = 4.3 V
CO = 10 µF
TA = 25°C
1k 10k 100k
IO = 150 mA
IO = 1 mA
V HzOutput Spectral Noise Density – µ
10
1
10
0
10
–1
10
–2
100
f – Frequency – Hz
TPS76633
OUTPUT IMPEDANCE
vs
FREQUENCY
VI = 4.3 V
CO = 10 µF
TA = 25°C
10 1k 10k 1M
IO = 250 mA
IO = 1 mA
100 100k
– Output Impedance –Z
o
Ω
10
1
10
0
10
–1
10
–2
Figure 12
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 13
TA – Free-Air Temperature – °C
TPS76650
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
–50 –25 0 25 50 75 100 125 150
VI = 4.9 V
IO = 10 mA
IO = 50 mA
IO = 150 mA
10
0
10
–1
10
–2
10
–3
IO = 250 mA
– Output Voltage – V
V
DO
Figure 14
–50 –25 0 25 50 75 100 125 150
TA – Free-Air Temperature – °C
– Output Voltage – V
V
DO
TPS76633
DROPOUT VOLTAGE
vs
FREE-AIR TEMPERATURE
VI = 3.2 V
IO = 10 mA
IO = 50 mA
IO = 150 mA
10
0
10
–1
10
–2
10
–3
IO = 250 mA
Figure 15
V
O
– Change in
50
0
3.7
2.7
TPS76615
LINE TRANSIENT RESPONSE
V
I
t – Time – µs
0 300200100 400 500 700600 800 900 1000
– Input Voltage – V
∆
Output Voltage – mV
CL = 4.7 µF
TA = 25°C
–50
100
Figure 16
t – Time – µs
TPS76615
LOAD TRANSIENT RESPONSE
I – Output Current – mA
O
V
O
– Change in∆
Output Voltage – mV
CL = 4.7 µF
TA = 25°C
250
0
0
200
400
–200
–400
0 300200100 400 500 700600 800 900 1000
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 17
V
O
– Change in
100
50
4.3
TPS76633
LINE TRANSIENT RESPONSE
V
I
t – Time – µs
– Input Voltage – V
∆
Output Voltage – mV
CL = 4.7 µF
TA = 25°C
0
5.3
–100
–50
0 300200100 400 500 700600 800 900 1000
Figure 18
t – Time – µs
TPS76633
LOAD TRANSIENT RESPONSE
I – Output Current – mA
O
V
O
– Change in∆
Output Voltage – mV
CL = 4.7 µF
TA = 25°C
250
0
0
200
400
–200
0 300200100 400 500 700600 800 900 1000
Figure 19
t – Time – µs
TPS76633
OUTPUT VOLTAGE
vs
TIME (AT STARTUP)
3
2
V
O
– Output Voltage – V
0
1
4
Enable Pulse – V
0
0 300200100 400 500 700600 800 900 1000
4.3
Figure 20
VI – Input Voltage – V
– Output Voltage – V
V
DO
TPS76601
DROPOUT VOLTAGE
vs
INPUT VOLTAGE
0.00
0.10
0.20
0.30
0.40
0.50
0.60
2.50 3.00 3.50 4.00 4.50 5.00
IO = 250 mA
TA = 125°C
TA = 25°C
TA = –40°C
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 21
0.01
0.10
1.00
10.00
100.00
0 50 100 150 200 250
IO – Output Current – mA
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
†
vs
OUTPUT CURRENT
VI = 4.3 V
CO = 4.7 µF
VO = 3.3 V
TA = 25°C
Minimum ESR
ESR – Equivalent Series Resistance –
Ω
Maximum ESR
Region of Stability
10
2
10
1
10
0
10
–1
10
–2
Region of Instability
Region of Instability
Figure 22
0.01
0.10
1.00
10.00
100.00
0 50 100 150 200 250
IO – Output Current – mA
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
†
vs
OUTPUT CURRENT
VI = 4.3 V
CO = 4.7 µF
VO = 3.3 V
TA = 125°C
Minimum ESR
ESR – Equivalent Series Resistance –
Ω
Maximum ESR
Region of Stability
Region of Instability
10
2
10
1
10
0
10
–2
10
–1
Region of Instability
Figure 23
0.01
0.10
1.00
10.00
100.00
0 50 100 150 200 250
IO – Output Current – mA
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
†
vs
OUTPUT CURRENT
VI = 4.3 V
CO = 10 µF
VO = 3.3 V
TA = 25°C
Minimum ESR
ESR – Equivalent Series Resistance –
Ω
Maximum ESR
Region of Stability
Region of Instability
10
2
10
1
10
0
10
–2
10
–1
Region of Instability
Figure 24
0 50 100 150 200 250
IO – Output Current – mA
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
†
vs
OUTPUT CURRENT
VI = 4.3 V
CO = 10 µF
VO = 3.3 V
TA = 125°C
Minimum ESR
ESR – Equivalent Series Resistance –
Ω
Maximum ESR
Region of Stability
Region of Instability
10
2
10
1
10
0
10
–1
Region of Instability
10
–2
†
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to CO.
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 25
0.01
0.10
1.00
10.00
0 0.2 0.4 0.6 0.8 1.0
Added Ceramic Capacitance – µF
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
†
vs
ADDED CERAMIC CAPACITANCE
ESR – Equivalent Series Resistance –
Ω
10
1
10
0
10
–1
10
–2
VI = 4.3 V
CO = 4.7 µF
VO = 3.3 V
IO = 250 mA
TA = 25°C
Minimum ESR
Region of Instability
Region of Stability
Figure 26
Added Ceramic Capacitance – µF
TYPICAL REGION OF STABILITY
EQUIVALENT SERIES RESISTANCE
†
vs
ADDED CERAMIC CAPACITANCE
0.01
0.10
1.00
10.00
0 0.2 0.4 0.6 0.8 1.0
ESR – Equivalent Series Resistance –
Ω
10
1
10
0
10
–1
10
–2
VI = 4.3 V
CO = 10 µF
VO = 3.3 V
IO = 250 mA
TA = 25°C
Minimum ESR
Region of Instability
Region of Stability
IN
EN
OUT
+
GND
C
O
ESR
R
L
V
I
To Load
Figure 27. Test Circuit for Typical Regions of Stability (Figures 21 through 24) (Fixed Output Options)
†
Equivalent series resistance (ESR) refers to the total series resistance, including the ESR of the capacitor, any series resistance added
externally, and PWB trace resistance to CO.
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
The TPS766xx family includes eight fixed-output voltage regulators (1.5 V, 1.8 V, 2.5 V, 2.7 V, 2.8 V, 3.0 V,
3.3 V, and 5.0 V), and an adjustable regulator, the TPS76601 (adjustable from 1.25 V to 5.5 V).
device operation
The TPS766xx features very low quiescent current, which remains virtually constant even with varying loads.
Conventional LDO regulators use a pnp pass element, the base current of which is directly proportional to the
load current through the regulator (IB = IC/β). The TPS766xx uses a PMOS transistor to pass current; because
the gate of the PMOS is voltage driven, operating current is low and invariable over the full load range.
Another pitfall associated with the pnp-pass element is its tendency to saturate when the device goes into
dropout. The resulting drop in β forces an increase in IB to maintain the load. During power up, this translates
to large start-up currents. Systems with limited supply current may fail to start up. In battery-powered systems,
it means rapid battery discharge when the voltage decays below the minimum required for regulation. The
TPS766xx quiescent current remains low even when the regulator drops out, eliminating both problems.
The TPS766xx family also features a shutdown mode that places the output in the high-impedance state
(essentially equal to the feedback-divider resistance) and reduces quiescent current to 1 µA (typ). If the
shutdown feature is not used, EN
should be tied to ground. Response to an enable transition is quick; regulated
output voltage is reestablished in typically 160 µs.
minimum load requirements
The TPS766xx family is stable even at zero load; no minimum load is required for operation.
FB - pin connection (adjustable version only)
The FB pin is an input pin to sense the output voltage and close the loop for the adjustable option . The output
voltage is sensed through a resistor divider network to close the loop as it is shown in Figure 29. Normally , this
connection should be as short as possible; however, the connection can be made near a critical circuit to
improve performance at that point. Internally , FB connects to a high-impedance wide-bandwidth amplifier and
noise pickup feeds through to the regulator output. Routing the FB connection to minimize/avoid noise pickup
is essential.
external capacitor requirements
An input capacitor is not usually required; however, a ceramic bypass capacitor (0.047 µF or larger) improves
load transient response and noise rejection if the TPS766xx is located more than a few inches from the power
supply. A higher-capacitance electrolytic capacitor may be necessary if large (hundreds of milliamps) load
transients with fast rise times are anticipated.
Like all low dropout regulators, the TPS766xx requires an output capacitor connected between OUT and GND
to stabilize the internal control loop. The minimum recommended capacitance value is 4.7 µF and the ESR
(equivalent series resistance) must be between 300-mΩ and 20-Ω. Capacitor values 4.7 µF or larger are
acceptable, provided the ESR is less than 20 Ω. Solid tantalum electrolytic, aluminum electrolytic, and multilayer
ceramic capacitors are all suitable, provided they meet the requirements described previously.
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
external capacitor requirements (continued)
PG
OUT
OUT
6
5
4
IN
IN
EN
GND
3
2
7
8
V
I
0.1 µF
PG
V
O
4.7 µF
+
TPS766xx
C
O
1
NC/FB
300 mΩ
250 kΩ
Figure 28. Typical Application Circuit (Fixed Versions)
programming the TPS76601 adjustable LDO regulator
The output voltage of the TPS76601 adjustable regulator is programmed using an external resistor divider as
shown in Figure 29. The output voltage is calculated using:
VO+
V
ref
ǒ1
)
R1
R2
Ǔ
(1)
Where
V
ref
= 1.224 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 7-µA divider current. Lower value resistors can be
used but offer no inherent advantage and waste more power. Higher values should be avoided as leakage
currents at FB increase the output voltage error. The recommended design procedure is to choose
R2 = 169 kΩ to set the divider current at 7 µA and then calculate R1 using:
R1
+
ǒ
V
O
V
ref
*
1
Ǔ
R2
(2)
OUTPUT
VOLTAGE
R1 R2
2.5 V
3.3 V
3.6 V
4.0 V
5.0 V
UNIT
174
287
324
383
523
169
169
169
169
169
kΩ
kΩ
kΩ
kΩ
kΩ
OUTPUT VOLTAGE
PROGRAMMING GUIDE
V
O
V
I
PG
OUT
FB / NC
R1
R2
GND
EN
IN
≤ 0.8 V
≥ 2.0 V
TPS76601
PG
0.1 µF
250 kΩ
300 mΩ
C
O
Figure 29. TPS76601 Adjustable LDO Regulator Programming
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
power-good indicator
The TPS766xx features a power-good (PG) output that can be used to monitor the status of the regulator. The
internal comparator monitors the output voltage: when the output drops to between 92% and 98% of its nominal
regulated value, the PG output transistor turns on, taking the signal low. The open-drain output requires a pullup
resistor. If not used, it can be left floating. PG can be used to drive power-on reset circuitry or used as a
low-battery indicator.
regulator protection
The TPS766xx PMOS-pass transistor has a built-in back diode that conducts reverse currents when the input
voltage drops below the output voltage (e.g., during power down). Current is conducted from the output to the
input and is not internally limited. When extended reverse voltage is anticipated, external limiting may be
appropriate.
The TPS766xx also features internal current limiting and thermal protection. During normal operation, the
TPS766xx limits output current to approximately 0.8 µA (typ). When current limiting engages, the output voltage
scales back linearly until the overcurrent condition ends. While current limiting is designed to prevent gross
device failure, care should be taken not to exceed the power dissipation ratings of the package. If the
temperature of the device exceeds 150°C(typ), thermal-protection circuitry shuts it down. Once the device has
cooled below 130°C(typ), regulator operation resumes.
power dissipation and junction temperature
Specified regulator operation is assured to a junction temperature of 125°C; the maximum junction temperature
should be restricted to 125°C under normal operating conditions. This restriction limits the power dissipation
the regulator can handle in any given application. T o ensure the junction temperature is within acceptable limits,
calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, PD, which must be less than
or equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
P
D(max)
+
TJmax*T
A
R
q
JA
Where
T
J
max is the maximum allowable junction temperature
T
A
is the ambient temperature.
R
θJA
is the thermal resistance junction-to-ambient for the package, i.e., 176°C/W for the 8-terminal
SOIC.
The regulator dissipation is calculated using:
PD+
ǒ
VI*
V
O
Ǔ
I
O
Power dissipation resulting from quiescent current is negligible. Excessive power dissipation will trigger the
thermal protection circuit.
TPS76615, TPS76618, TPS76625, TPS76627
TPS76628, TPS76630, TPS76633, TPS76650, TPS76601
ULTRA LOW QUIESCENT CURRENT 250-mA LOW-DROPOUT VOLTAGE REGULATORS
SLVS237 – AUGUST 1999
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
4040047/B 03/95
0.228 (5,80)
0.244 (6,20)
0.069 (1,75) MAX
0.010 (0,25)
0.004 (0,10)
1
14
0.014 (0,35)
0.020 (0,51)
A
0.157 (4,00)
0.150 (3,81)
7
8
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
PINS **
0.008 (0,20) NOM
A MIN
A MAX
DIM
Gage Plane
0.189
(4,80)
(5,00)
0.197
8
(8,55)
(8,75)
0.337
14
0.344
(9,80)
16
0.394
(10,00)
0.386
0.004 (0,10)
M
0.010 (0,25)
0.050 (1,27)
0°–8°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
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pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
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In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
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intellectual property right of TI covering or relating to any combination, machine, or process in which such
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Copyright 1999, Texas Instruments Incorporated
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